JP7615630B2 - Photodetector and imaging device - Google Patents

Description

This disclosure relates to a photodetector and an imaging device.

Photodetectors are made by bonding an array of light-receiving elements, each sensitive to a specific wavelength of light, to a readout integrated circuit (ROIC) using bump electrodes. Quantum-type photodetectors generate a current corresponding to the intensity of the incident light, and the upper limit of their operating temperature is limited by the signal-to-noise (S/N) ratio, so they are used under cooling. For example, quantum well infrared photodetectors (QWIP) and quantum dot infrared photodetectors (QDIP) are cooled to about 80K during operation. Cooling at a low temperature suppresses the dark current of the element, reduces noise, and improves the S/N ratio. After the photodetector has finished operating, it is returned to room temperature (about 300K), and the thermal cycle between the cryogenic temperature and room temperature is repeated.

The thermal expansion coefficients of a photodiode array made of a compound semiconductor and a ROIC, which is generally made of a silicon (Si) substrate, are different. Because the difference between the operating temperature and room temperature is large, the difference in thermal expansion coefficients can cause stress on the bump electrodes, leading to defects such as short circuits between the bumps. Therefore, an underfill is injected between the photodiode array and the ROIC to reinforce the connection between them.

When each pixel of the light receiving element array is formed of a semiconductor mesa, the underfill is also injected between the mesas. In order to reduce the stress that occurs in the semiconductor light receiving element due to temperature changes between low and room temperatures, a configuration has been proposed in which the space between the mesas is filled with at least one of aluminum oxide and epoxy resin (see, for example, Patent Document 1).

JP 2017-195327 A

When a common electrode common to all pixels is placed on the light incident side of the light receiving element array, the common electrode is made of a material with a larger band gap than the absorption layer and is thinned to a thickness of about a few microns to transmit the incident light to the absorption layer. Compared to the Si substrate on the ROIC side, which is several hundred microns thick, the light receiving element array is very thin. Underfill is introduced to maintain the mechanical strength of the bump electrodes connecting the light receiving element array and the ROIC, but since the underfill is mainly composed of resin, its thermal expansion coefficient is one order of magnitude larger than that of Si and compound semiconductors. The underfill is prone to shrinkage at low temperatures, and if a strong stress is applied to the thin common electrode, cracks will occur in the common electrode, causing it to break.

The present disclosure aims to provide a configuration that prevents damage to the common electrode in a photodetector used under thermal cycling.

In one embodiment of the present disclosure, a photodetector includes a light receiving element array having light receiving elements sensitive to light of a predetermined wavelength, a readout circuit joined to the light receiving element array by a protruding electrode, and an underfill disposed between the readout circuit and the light receiving element array;
the light receiving element array has a common electrode on a side opposite to a surface bonded to the readout circuit;
The common electrode is transparent to light of the predetermined wavelength, and has a superlattice stress adjustment layer in at least a portion in a thickness direction.

In photodetectors used under thermal cycles, damage to the common electrode can be prevented.

FIG. 1 is a diagram illustrating a technical problem of a photodetector fixed with underfill. FIG. 2 is a schematic diagram illustrating a configuration of a photodetector according to an embodiment. 1A to 1C are diagrams showing the steps for producing a light-receiving element array. 1A to 1C are diagrams showing the steps for producing a light-receiving element array. 1A to 1C are diagrams showing the steps for producing a light-receiving element array. 1A to 1C are diagrams showing the steps for producing a light-receiving element array. FIG. 2 is a diagram showing a junction between a light receiving element array and a readout circuit. Imaging device using a photodetector

Before describing the configuration of the embodiment, the technical issues of a photodetector fixed with underfill will be described in more detail with reference to FIG. 1. The light receiving element array 300 is flip-chip bonded to the readout circuit 20 by protruding electrodes 42 to form a focal plane array (FPA). Underfill 41 is injected between the light receiving element array 300 and the readout circuit 20, and the protruding electrodes 42 are fixed by the underfill 41.

The light receiving element array 300 has an arrangement of multiple mesas 37 covered with an insulating film 39. Each mesa 37 includes a light absorbing layer 35 and forms an individual light receiving element or pixel. The light absorbing layer 35 is connected to a common electrode 301 via a first contact layer 34 on one side in the film thickness direction and to an individual electrode 38 via a second contact layer 36 on the other side.

As described above, the light receiving element array 300 and the readout circuit 20 are made of different materials and have different thermal expansion coefficients. When the readout circuit 20 is formed of a Si substrate, its thermal expansion coefficient is approximately 3.34×10 ⁻⁶ [K ⁻¹ ]. On the other hand, when GaSb is used as the compound semiconductor, the thermal expansion coefficient is 7.74×10 ⁻⁶ [K ⁻¹ ], and when GaAs is used, the thermal expansion coefficient is 5.70×10 ⁻⁶ [K ⁻¹ ], both of which are larger than the thermal expansion coefficient of Si.

The protruding electrodes 42 are secured by underfill 41 to prevent the electrodes 38 on the light receiving element side connected to the protruding electrodes 42 from shifting positions from the electrodes on the readout circuit 20 side due to the large temperature difference between room temperature and during operation, which may occur due to the difference in thermal expansion coefficients. The underfill 41 is also necessary to maintain the mechanical strength of the protruding electrodes 42 when the substrate on the common electrode 301 side is thinned after flip-chip bonding.

However, the thermal expansion coefficient of a typical underfill is about 50×10 ⁻⁶ [K ⁻¹ ], which is one order of magnitude larger than the thermal expansion coefficient of the compound semiconductor used in the light-receiving element array 300. Although there have been attempts to lower the thermal expansion coefficient by adding a filler to the underfill 41, the thermal expansion coefficient of the underfill 41 is still larger than the thermal expansion coefficient of Si and the compound semiconductor. If the underfill 41 shrinks in a low-temperature cycle, a strong stress is applied to the thin common electrode 301, causing the common electrode 301 to break.

Figure 2 is a schematic diagram showing the configuration of the photodetector 10 of the embodiment. In order to prevent damage to the common electrode, in the embodiment, a superlattice layer having an overall lattice constant smaller than that of the light absorption layer is introduced in at least a portion of the common electrode in the film thickness direction. This superlattice layer serves as a stress adjustment layer that relieves or offsets the stress caused by the underfill 41.

The photodetector 10 has a readout circuit 20, a light receiving element array 30 that is flip-chip bonded to the readout circuit 20 by protruding electrodes 42, and an underfill 41 filled between the readout circuit 20 and the light receiving element array 30.

The light receiving element array 30 has a common electrode 31 and a number of light receiving elements 320 connected to the common electrode 31. Each light receiving element 320 is formed of a mesa 37 including a light absorbing layer 35. The light absorbing layer 35 is sensitive to light of a specific wavelength. The common electrode 31 is disposed on the light incident side indicated by the white arrow, and is transparent to light of a wavelength to which the light absorbing layer 35 is sensitive. The common electrode 31 is formed of a material with a larger band gap energy than the light absorbing layer 35.

The common electrode 31 has a common electrode layer 313 that supplies a common potential to the multiple light receiving elements 320, and a stress adjustment layer 312 formed of a superlattice. The common electrode layer 313 is doped with impurities to reduce electrical resistance. In the stress adjustment layer 312, the lattice constant of the superlattice as a whole is smaller than the lattice constant of the light absorption layer 35. The stress adjustment layer 312 relieves or offsets the stress applied from the underfill 41 when the photodetector 10 operates at low temperatures.

For example, when the underfill 41 shrinks at low temperatures and compressive stress is applied to the common electrode layer 313, a layer that applies tensile stress to the common electrode layer 313 is disposed inside the common electrode 31, and the effect of the underfill shrinkage is mitigated by a force in the opposite direction to the compression caused by the underfill 41.

Since it is sufficient that the stress adjustment layer 312 is provided on at least a part of the common electrode 31, the common electrode 31 may have a three-layer structure, with the stress adjustment layer 312 disposed between the common electrode layer 311 and the common electrode layer 313 on the element side. In this case, the outermost common electrode layer 311 may function as a protective layer. If the superlattice of the stress adjustment layer 312 is exposed on the outermost surface of the light incidence side of the common electrode 31, the state of the surface may become unstable, particularly when antimony (Sb) is exposed on the surface, which may cause the incidence of light to become non-uniform. By covering the surface of the stress adjustment layer 312 with the common electrode layer 311, the structure or state of the common electrode 31 can be stabilized.

The stress adjustment layer 312 is a layer of a strained superlattice. The strained superlattice is formed by precisely controlling the thickness of semiconductor materials with different lattice constants and stacking thin films at the atomic layer level alternately, thereby suppressing the occurrence of dislocations and defects due to lattice mismatch and maintaining strong internal stress. Impurities may be added to the stress adjustment layer 312 to make it a conductive strained superlattice. In this case, the stress adjustment layer 312, together with the common electrode layer 313, can function as the electrode itself that supplies a common potential to each light receiving element 320.

As long as the overall lattice constant of the common electrode 31 is kept smaller than the lattice constant of the light absorbing layer 35, it is desirable that the lattice constant of the common electrode layer 313 be the same as or close to the lattice constant of the light absorbing layer 35. By lattice matching at the interface between the light absorbing layer 35 and the common electrode 31, good crystal quality is maintained. When the common electrode 31 has a three-layer structure, the lattice constants of the common electrode layers 313 and 311 may be the same as or close to the lattice constant of the light absorbing layer 35.

The lattice constant may vary in the thickness direction inside the stress adjustment layer 312. For example, in the case of a two-layer structure, the lattice constant of the superlattice located near the interface with the common electrode layer 313 may be approximated to the lattice constant of the common electrode layer 313, and the lattice constant may be made smaller the further away from the interface with the common electrode layer 313.

In the case of a three-layer structure, the lattice constant near the center in the thickness direction of the stress adjustment layer 312 may be smaller than the lattice constant of the superlattice located near the interface with the common electrode layer 313 and the interface with the common electrode layer 311. In this case, the lattice constant of the stress adjustment layer 312 decreases from the interface with the common electrode layer 313 toward the inside of the stress adjustment layer 312, becomes smallest near the center in the thickness direction of the stress adjustment layer 312, and gradually increases toward the interface with the common electrode layer 311 on the opposite side. The lattice constant inside the stress adjustment layer 312 can be changed by adjusting the combination of the type and thickness of the compound semiconductor that forms the superlattice.

The common electrode 31 is formed thin enough to transmit a sufficient amount of incident light to the light absorption layer 35, but thick enough to alleviate or offset the stress applied by the underfill 41. For example, it is 4 to 10 μm, and more preferably 6 to 8 μm. If the thickness of the common electrode 31 is less than 4 μm, it becomes difficult to ensure a sufficient thickness for the stress adjustment layer 312, and it becomes difficult to fully obtain the effect of stress alleviation. If the thickness of the common electrode 31 exceeds 10 μm, the amount of incident light that should normally reach the light absorption layer 35 decreases due to the effects of scattering, etc., and crosstalk may occur between adjacent pixels.

In the mesa 37 that forms the light receiving element 320, the light absorbing layer 35 is connected to the common electrode layer 313 by the first contact layer 34, and is connected to the individual electrodes 38 by the second contact layer 36. The sides of the mesa 37 and the periphery of the electrodes 38 are covered with an insulating film 39.

Underfill 41 is also filled between adjacent light receiving elements 320, and common electrode 31 is adjacent to underfill 41 with insulating film 39 sandwiched therebetween. By providing stress adjustment layer 312 on common electrode 31, damage to common electrode 31 can be prevented even if underfill 41 shrinks under thermal cycles.

Each light receiving element 320 of the light receiving element array 30 generates a current corresponding to the intensity of incident light of the target wavelength. The readout circuit 20 reads out the current generated by each light receiving element 320 and accumulates charge in a capacitor provided for each light receiving element 320. The photodetector 10 may convert the accumulated charge into a voltage using an amplifier, amplify it, and output it to supply the light detection result to the outside.

Figures 3A to 3D are diagrams showing an example of a manufacturing process for a light-receiving element array 30. In Figure 3A, a common electrode layer 311, a stress adjustment layer 312, a common electrode layer 313, a first contact layer 34, a light absorption layer 35, and a second contact layer 36 are epitaxially grown in this order on a substrate 310. A buffer layer may be disposed between the substrate 310 and the common electrode layer 311.

The substrate 310 is a substrate of a compound semiconductor such as GaAs, InP, or GaSb. The epitaxial growth of each layer on the substrate 310 is performed by a molecular beam epitaxy (MBE) method, a metal organic chemical vapor deposition (MOCVD) method, or the like. As long as the light receiving element 320 can detect light of the target wavelength, there are no particular limitations on the material of each epitaxially grown layer or the light detection structure. In the following example, a GaSb substrate is used as an example, and a configuration for detecting one long-wavelength infrared ray (8 to 12 μm) is described. In this case, an n-type GaSb substrate may be used to reduce the defect density of the substrate.

When forming a buffer layer on a GaSb substrate 310, a non-doped GaSb layer may be grown to a thickness of 1 μm. Non-doped means that no impurities are intentionally introduced during the growth process, and may contain low concentrations of unavoidable impurities.

As the common electrode layer 311, a non-doped InAs _0.91 Sb _0.09 layer lattice-matched with GaSb is grown to a thickness of 1 μm. As the stress adjustment layer 312, a non-doped InAs/GaSb or InAs/AlSb superlattice is grown to a thickness of 5 μm. By repeatedly forming InAs/GaSb or InAs/AlSb with a thickness of several nanometers per period, it is possible to hold stress due to differences in lattice constants inside the stress adjustment layer 312 while suppressing the occurrence of defects such as dislocations. A thin InSb layer for stress adjustment may be introduced at the interface of the InAs/GaSb or InAs/AlSb superlattice.

As the common electrode layer 313, a layer of p-type InAs _0.91 Sb _0.09 lattice-matched with GaSb is grown to a thickness of 1 μm. Be or the like is added as a p-type impurity at a concentration of 5×10 ¹⁷ to 3×10 ¹⁸ cm ⁻³ . When adding a p-type impurity to the common electrode layer 313, impurities of the same conductivity type may be added to the common electrode layer 311 and the stress adjustment layer 312, which are located below in the growth direction. In this case, the common electrode layer 311, the stress adjustment layer 312, and the common electrode layer 313 as a whole function as electrodes.

An InAs/GaSb superlattice doped with p-type impurities at a concentration of 3×10 ¹⁷ to 1×10 ¹⁸ cm ⁻³ is grown as the first contact layer 34. As an example, the p-type InAs/GaSb layer contains Be as an impurity, and is formed by repeating 100 periods of InAs with a thickness of 4.2 nm and GaSb with a thickness of 2.1 nm.

The light absorption layer 35 is a non-doped InAs/GaSb superlattice, i.e., no intentional impurities are added. As an example, 500 periods of InAs with a thickness of 4.2 nm and GaSb with a thickness of 2.1 nm are repeated. This light absorption layer 35 is sensitive to light with a wavelength of 8 to 12 μm.

For example, a stack of an InAs/GaSb superlattice layer doped with an n-type impurity at a concentration of 3×10 ¹⁷ cm ^-3 to 1×10 ¹⁸ cm ^-3 and an InAs layer doped with an n-type impurity at a concentration of 1×10 ¹⁸ cm ^-3 is grown as the second contact layer 36. The n-type InAs/GaSb superlattice layer contains, for example, Si as an impurity, and is formed by repeating 100 periods of InAs with a thickness of 4.2 nm and GaSb with a thickness of 2.1 nm. The InAs layer is, for example, a layer with a thickness of about 20 nm that contains Si as an impurity.

In the laminated structure of FIG. 3A, when an InAs/GaSb superlattice is used as the stress adjustment layer 312 of the common electrode 31 and the target wavelength of the light absorption layer 35 is long-wavelength infrared light, it is desirable to reduce the film thickness of the InAs used in the stress adjustment layer 312 relative to the InAs/GaSb (4.2 nm/2.1 nm) superlattice of the light absorption layer 35, thereby shifting the cutoff wavelength to the short-wavelength side. As a result, the target long-wavelength infrared light passes through the stress adjustment layer 312 and enters the light absorption layer 35.

An InSb layer with a larger lattice constant than InAs may be introduced as an interface layer into the InAs/GaSb superlattice of the light absorption layer 35 to achieve lattice matching with the GaSb substrate 310. The InSb layers may be placed above and below the GaSb layer, or may be placed on only one of them. When placing an InSb layer on a GaSb layer, In is supplied instead of Ga, and when placing an InSb layer on an InAs layer, Sb is supplied instead of As.

On the other hand, in the InAs/GaSb stress adjustment layer 312, the InSb layer at the interface is not intentionally inserted, and the lattice constant of the stress adjustment layer 312 as a whole is kept small to generate stress. When the stress adjustment layer 312 is formed of an InAs/AlSb superlattice, the cutoff wavelength is short, so the film thickness of the superlattice can be adjusted mainly from the viewpoint of stress. For example, the film thickness of InAs is made relatively thick and the film thickness of one period of InAs/AlSb is set to 4.2 nm/1.2 nm, thereby reducing the overall lattice constant. This makes it easier for stress to be generated in the opposite direction to the stress applied by the underfill. In this case, too, the overall stress can be adjusted by controlling the thickness of the InSb layer at the interface.

In FIG. 3B, a mesa 37 including a first contact layer 34, a light absorption layer 35, and a second contact layer 36 is formed. Specifically, a hard mask for pixel processing is formed on the surface of the stack of FIG. 3A with a silicon oxide (SiO ₂ ) film having a thickness of 500 nm. The SiO ₂ film is processed into a pattern of the mesa 37 by lithography and reactive ion etching (RIE). Using the processed hard mask, the second contact layer 36, the light absorption layer 35, and the first contact layer 34 are sequentially etched away to form the mesa 37. After the mesa is removed, the hard mask may be removed by wet etching, or may be left as a part of the insulating film 39 described later.

The Ga signal may be monitored during mesa etching. The Ga signal disappears when the InAsSb surface of the common electrode layer 313 is exposed, allowing the end point of mesa etching to be detected. This results in the formation of multiple mesas 37 separated by pixel isolation grooves 45.

In FIG. 3C, an insulating film 39 is formed on the entire surface by chemical vapor deposition (CVD). The insulating film 39 is, for example, a SiO ₂ film having a thickness of 500 μm. The insulating film 39 protects the sidewall of the mesa 37 and the surface of the common electrode layer 313. Next, a part of the insulating film 39 is etched by lithography and RIE to form a contact hole in a part of the upper part of the mesa 37. At this time, in the mesa for the dummy pixel arranged on the outer periphery of the light receiving element array 30, the insulating film 39 on the mesa sidewall and a part of the common electrode layer 313 are removed continuously from the contact hole. This etching groove leading to the common electrode layer 313 is a groove for wiring that applies a common potential.

Then, individual electrodes 38 are formed in the contact holes by a lift-off method using a resist process and deposition of a metal film. In the dummy pixels, a lead-out wiring to the common electrode layer 313 is formed together with the electrode 38. The electrode 38 is, for example, a metal electrode formed by depositing Ti/Pt/Au to 50/200/200 nm.

In FIG. 3D, bumps 322 are formed on the electrodes 38 by a lift-off method using a resist process and deposition of a metal film. Bumps of indium (In) may be formed as the bumps 322. This forms a light receiving element array 30 having a plurality of light receiving elements 320.

Figure 4 shows the bonding of the light receiving element array 30 and the readout circuit 20. The readout circuit 20 is formed in advance on a silicon substrate. The readout circuit 20 has a bump 22 formed on an electrode 21. The light receiving element array 30 has a bump 322 formed on an electrode 38.

The bonding process can be performed at either the wafer level or the chip level. For example, after dicing to chip the individual readout circuits 20 and the individual light receiving element arrays 30, the bumps 322 and the bumps 22 are bonded by flip chip bonding. This bump bonding forms protruding electrodes 42 that mechanically and electrically connect the light receiving element array 30 and the readout circuit 20.

Underfill 41 is filled between the light receiving element array 30 and the readout circuit 20. The underfill 41 improves the mechanical strength of the protruding electrodes 42. With the protruding electrodes 42 fixed with the underfill 41, the GaSb substrate 310 is removed. If a buffer layer is grown on the substrate 310, the buffer layer is also removed. For example, the GaSb substrate 310 and, if necessary, the buffer layer are removed by a combination of mechanical back grinding and chemical etching to expose the common electrode layer 311. An anti-reflection film may be formed on the light incident surface of the exposed common electrode layer 311. This provides a photodetector 10 with a thin common electrode 31 that has a stress relaxation effect on the light incident side.

In the photodetector 10 of the embodiment, the gaps between the multiple light receiving elements 320 connected to the thinned common electrode 31 are filled with underfill 41. In actual operation, the entire photodetector 10 is placed in a vacuum cooling chamber and used at extremely low temperatures. Even if the thin common electrode 31 is subjected to stress due to contraction of the underfill 41, the stress adjustment layer 312 can alleviate or offset the stress applied from the underfill 41. This can prevent damage to the common electrode 31 and improve the reliability, yield, etc. of the photodetector 10.

Figure 5 is a schematic diagram of an imaging device 1 using a photodetector 10. The imaging device 1 includes a photodetector 10, an arithmetic processing circuit 2 connected to the output of the photodetector 10, and a display device 3 connected to the output of the arithmetic processing circuit 2. The photodetector 10 is disposed in a vacuum cooling chamber 5. The vacuum cooling chamber 5 is provided with a window for light incidence. An optical system that focuses incident light onto a light receiving element array 30 may be disposed on the light incidence side of the photodetector 10.

When the photodetector 10 is sensitive to infrared light, the information of the infrared light detected by each light receiving element 320 represents the temperature distribution, gas concentration distribution, etc. of the object to be observed. The intensity information of the infrared light detected by each light receiving element 320 is read out by the readout circuit 20 and output as a voltage signal. The voltage signal output from the photodetector 10 is input to the arithmetic processing circuit 2. Before being input to the arithmetic processing circuit 2, the voltage signal may be converted into a digital signal. The arithmetic processing circuit 2 performs correction processing for sensitivity variation, etc. and image processing on the output signal from the readout circuit 20 to generate an image signal corresponding to the temperature distribution and gas distribution of the object to be observed. The display device 3 displays the image formed by the image signal.

The imaging device 1 can be used in fields such as security and infrastructure inspection. The photodetector 10 used in the imaging device 1 is a highly sensitive sensor that uses the photoelectric conversion effect of the light receiving element 320. Because the common electrode 31 has a stress relaxation function, even when used in cooling, the thin common electrode 31 is prevented from being destroyed by the contraction of the underfill, and operational reliability is maintained.

Although the present disclosure has been described above based on specific examples, the present disclosure is not limited to the above examples. As long as light of the target wavelength can be detected, the material, mesa structure, etc. of the light receiving element 320 are not particularly limited. In addition to an InAs/GaSb type II superlattice (T2SL: Type-II Superlattice) based on a GaSb substrate, a light receiving element such as a QWIP or QDIP based on a GaAs substrate may be used. As a light detection configuration, a diode structure such as a pin connection may be used, or one or more barrier layers that reduce dark current may be combined with a light absorption layer, such as an nBn, pBp, or CBIRD (Complementary Barrier Infrared Detector) double heterostructure. The light receiving element 320 may be a detection element that detects light of one wavelength, or a multiband detection element that detects two or more wavelengths.

REFERENCE SIGNS LIST 1 imaging device 2 arithmetic processing circuit 3 display device 5 vacuum cooling chamber 10 photodetector 20 readout circuit 21 electrode 22 bump 30 light receiving element array 31 common electrode 34 first contact layer 35 light absorbing layer 36 second contact layer 37 mesa 38 electrode 41 underfill 42 protruding electrode 311 common electrode layer (second common electrode layer)
312 Stress adjustment layer 313 Common electrode layer (first common electrode layer)
320 Light receiving element 322 Bump

Claims (9)

a light receiving element array having light receiving elements sensitive to light of a predetermined wavelength;
A read circuit;
a protruding electrode for connecting the light receiving element array and the readout circuit;
an underfill disposed between the readout circuit and the light receiving element array so as to surround the protruding electrode ;
having
the light receiving element array has a common electrode on a side opposite to a surface bonded to the readout circuit;
the common electrode is transparent to light of the predetermined wavelength and has a superlattice stress adjustment layer in at least a part of the thickness direction;
Photodetector. The photodetector of claim 1, wherein the overall lattice constant of the superlattice is smaller than the lattice constant of the light absorbing layer of the light receiving element. the common electrode has a first common electrode layer between the stress adjustment layer and the light receiving element,
The lattice constant of the first common electrode layer matches the lattice constant of the light absorbing layer.
3. The photodetector of claim 2. the common electrode has a second common electrode layer on an opposite side to the first common electrode layer with the stress adjustment layer interposed therebetween;
4. The photodetector of claim 3. the lattice constant of the stress adjustment layer varies in a thickness direction of the stress adjustment layer;
The photodetector according to any one of claims 2 to 4. The photodetector of claim 3, wherein the lattice constant of the stress-adjusting layer decreases with increasing distance from the interface with the first common electrode layer. The photodetector of claim 4, wherein the lattice constant of the stress adjustment layer is smaller at the center of the stress adjustment layer in the thickness direction than at the interface with the first common electrode layer and the interface with the second common electrode layer. the light absorbing layer is formed of an InAs/GaSb superlattice;
the stress-adjusting layer is a superlattice of InAs/GaSb or InAs/AlSb;
The photodetector according to any one of claims 2 to 7. A photodetector according to any one of claims 1 to 8;
a processing circuit connected to an output of the photodetector;
A display device connected to the arithmetic processing circuit;
An imaging device having the above configuration.

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