JP7616429B2 - Battery storage system and power storage system - Google Patents

Description

The present disclosure relates to a battery storage system and a power storage system equipped with a storage battery.

Various technologies have been disclosed for reducing power consumption in devices equipped with storage batteries. For example, Patent Document 1 discloses a technology for reducing power consumption in a smartphone equipped with a storage battery. In this technology, the operation of the control unit is stopped by controlling an enable signal supplied to a DC/DC converter that supplies a power supply voltage to the control unit.

Chinese Utility Model No. 213243599

In a battery storage system or power storage system equipped with a battery, for example, the battery is charged based on power supplied from an external power source, or the power of the battery is supplied to a load device. In such a system, it is expected that power consumption can be effectively reduced.

It is desirable to provide a battery system and a power storage system that can effectively reduce power consumption.

The storage battery system according to an embodiment of the present disclosure includes a storage battery module, a power terminal, a control circuit, and a power supply circuit. The storage battery module includes a storage battery and a storage battery monitoring circuit capable of monitoring the operating state of the storage battery. The power terminal is connected to the storage battery module and is capable of exchanging power with an external power device. The control circuit is capable of controlling the operation of the storage battery module. The power supply circuit is capable of supplying power to the control circuit and the storage battery monitoring circuit from at least one of an external power source and the storage battery module. The power supply circuit is selectively operable in one of the following operating modes: a first operating mode in which power is supplied to the control circuit and the storage battery monitoring circuit; a second operating mode in which, when the storage battery has not been charged for a predetermined time or longer and the charge level has fallen to a first predetermined value, the power supply circuit supplies power to the control circuit and the storage battery monitoring circuit intermittently; and a third operating mode in which, when the storage battery has not been charged and the charge level has fallen to a second predetermined value lower than the first predetermined value, the power supply to the control circuit and the storage battery monitoring circuit is stopped.

The power storage system according to an embodiment of the present disclosure includes a storage battery module, a power conversion device, a control circuit, and a power supply circuit. The storage battery module includes a storage battery and a storage battery monitoring circuit capable of monitoring the operating state of the storage battery. The power conversion device is connected to a first power node connected to an external power source and a second power node connected to the storage battery module, and is capable of converting power. The power supply circuit is capable of supplying power to the control circuit and the storage battery monitoring circuit from at least one of the external power source and the storage battery module. The power supply circuit is selectively operable in one of the following operation modes: a first operation mode in which power is supplied to the control circuit and the storage battery monitoring circuit; a second operation mode in which, when the storage battery has not been charged for a predetermined time or more and the charge level has fallen to a first predetermined value, the control circuit is supplied with power and the storage battery monitoring circuit is supplied with power intermittently; and a third operation mode in which, when the storage battery has not been charged and the charge level has fallen to a second predetermined value lower than the first predetermined value, the power supply to the control circuit and the storage battery monitoring circuit is stopped.

According to the battery system and power storage system in one embodiment of the present disclosure, power consumption can be effectively reduced.

1 is a block diagram illustrating an example configuration of a power system including a storage battery system according to an embodiment of the present disclosure. 2 is a circuit diagram illustrating a configuration example of a power supply circuit illustrated in FIG. 1 . 3 is an explanatory diagram illustrating an example of an operation of the power supply circuit shown in FIG. 2 in a normal operation mode. 3 is an explanatory diagram illustrating an operation example of the power supply circuit shown in FIG. 2 in a sleep mode. 3 is an explanatory diagram illustrating an operation example of the power supply circuit shown in FIG. 2 in a deep sleep mode. 3 is a state transition diagram showing transitions of operation modes in the power supply circuit shown in FIG. 2. FIG. 13 is a block diagram illustrating a configuration example of a power system including a storage battery system according to a modified example.

Below, the embodiments of the present disclosure are described in detail with reference to the drawings.

<Embodiment>
[Configuration example]
Fig. 1 shows an example of the configuration of a power system 1 including a storage battery system according to an embodiment. The power system 1 includes a solar power generation device 91, a load device 92, a control device 93, and a power storage system 2. In Fig. 1, signal paths are indicated by thin lines, and power supply paths are indicated by thick lines.

The solar power generation device 91 is configured to generate DC power by generating power based on sunlight. The solar power generation device 91 supplies the generated DC power to a power conditioner 10 (described later) of the power storage system 2. Note that in this example, a solar power generation device 91 is provided, but this is not limited thereto, and the solar power generation device 91 may not be provided, or another power generation device such as a wind power generation device may be provided.

The load device 92 is an AC load device that operates based on AC power. The load device 92 is connected to the power node NP1 and operates based on AC power supplied from the grid power supply 9 or AC power supplied from the power conditioner 10 (described later) of the power storage system 2.

The control device 93 is a higher-level device of the power storage system 2 and is configured to control the overall operation of the power system 1. The control device 93 is configured, for example, using a computer.

The power storage system 2 includes a power conditioner 10 and a storage battery system 3.

The power conditioner 10 is provided in a power supply path connecting a system power source 9 such as a commercial power source, a solar power generation device 91, and the storage battery system 3, and is configured to convert power. The power conditioner 10 is connected to a power node NP1 connected to the system power source 9 and the load device 92, a power terminal TP of the storage battery system 3, and the solar power generation device 91. In this example, the power conditioner 10 converts, for example, AC power supplied from the system power source 9 into DC power by AC/DC conversion, and supplies the converted DC power to the storage battery system 3. The power conditioner 10 also converts, for example, DC power supplied from the storage battery system 3 into AC power by DC/AC conversion, and supplies the converted AC power to the system power source 9 and the load device 92. In addition, the power conditioner 10, for example, converts the DC power supplied from the solar power generation device 91 by DC/DC conversion and supplies the converted DC power to the storage battery system 3, or converts the DC power supplied from the solar power generation device 91 into AC power by DC/AC conversion and supplies the converted AC power to the system power source 9 or the load device 92.

The storage battery system 3 is configured to charge the storage battery based on DC power supplied from the power conditioner 10, or to supply the power charged in the storage battery to the power conditioner 10. The storage battery system 3 has a storage battery control circuit 20 and a plurality of storage battery module packs 30.

The battery control circuit 20 is a so-called BMS (Battery Management System), and is configured to control the operation of the battery system 3 by controlling the charging and discharging of the multiple battery module packs 30 based on instructions from a control device 93, which is a higher-level device. The battery control circuit 20 communicates with the control device 93, which is a higher-level device, and also communicates with each of the multiple battery module packs 30. The battery control circuit 20 operates based on AC power supplied via power node NP1 and DC power supplied via power node NP2 led to the power terminal TP. The battery control circuit 20 has an AC/DC inverter 21, a DC/DC converter 22, a power supply circuit 23, and a control circuit 24.

The AC/DC inverter 21 is an isolated power conversion circuit, with an input terminal connected to the power node NP1 and an output terminal connected to the output terminal of the DC/DC converter 22 and the power supply circuit 23. The AC/DC inverter 21 converts the AC power supplied from the power node NP1 into DC power by AC/DC conversion, and supplies the converted DC power to the power supply circuit 23.

The DC/DC converter 22 is an isolated power conversion circuit, with an input terminal connected to the power node NP2 and an output terminal connected to the output terminal of the AC/DC inverter 21 and the power supply circuit 23. The DC/DC converter 22 converts the DC power supplied from the power node NP2 by DC/DC conversion, and supplies the converted DC power to the power supply circuit 23.

Thus, in the power system 1, the AC/DC inverter 21 and the DC/DC converter 22, which are such isolated power conversion circuits, are provided between the power conditioner 10 (primary circuit) and the power supply circuit 23 and the control circuit 24 (secondary circuit).

The power supply circuit 23 is configured to supply DC power supplied from at least one of the AC/DC inverter 21 and the DC/DC converter 22 to the control circuit 24 and the multiple storage battery module packs 30. The power supply circuit 23 supplies power to the control circuit 24 and the multiple storage battery module packs 30 based on the control signals SELFW, MODP supplied from the control circuit 24 and the control signal EXTW supplied from the control device 93, which is a higher-level device.

The control circuit 24 is configured to grasp the operating status of each of the multiple storage battery module packs 30 by communicating with the multiple storage battery module packs 30, and to control the operation of the storage battery system 3 based on instructions from a control device 93, which is a higher-level device. The control circuit 24 is configured to include, for example, a microcontroller. The firmware of the microcontroller is updated based on instructions from the control device 93, for example. The control circuit 24 is configured to control the operation of the power supply circuit 23 by supplying control signals SELFW and MODP to the power supply circuit 23.

This control circuit 24 operates based on the DC power supplied from the power supply circuit 23. The control circuit 24 has a DC/DC converter 24A. The DC/DC converter 24A is configured to convert the DC power supplied from the power supply circuit 23 by DC/DC conversion. The DC/DC converter 24A may be, for example, a switching power supply circuit or a linear regulator. The control circuit 24 operates based on the DC power converted by this DC/DC converter 24A.

Each of the multiple battery module packs 30 has a battery monitoring circuit 31, a DC/DC converter 32, a battery 34, and a sensor circuit 33.

The battery monitoring circuit 31 is configured to monitor the operating state of the battery 34 based on the measurement results of the sensor circuit 33. The battery monitoring circuit 31 is configured to include, for example, a microcontroller. The battery monitoring circuit 31 communicates with the control circuit 24 to supply information about the operating state of the battery 34 to the control circuit 24.

The battery monitoring circuit 31 has a DC/DC converter 31A. The DC/DC converter 31A is configured to convert the DC power supplied from the power supply circuit 23 by DC/DC conversion. The DC/DC converter 31A may be, for example, a switching power supply circuit or a linear regulator. The battery monitoring circuit 31 operates based on the DC power converted by the DC/DC converter 31A. The battery monitoring circuit 31 also operates to supply the DC power to the DC/DC converter 32.

The DC/DC converter 32 is an isolated power conversion circuit, and is configured to convert the DC power supplied from the battery monitoring circuit 31 by DC/DC conversion, and supply the converted DC power to the sensor circuit 33. Thus, in the battery module pack 30, the DC/DC converter 32, which is such an isolated power conversion circuit, is provided between the sensor circuit 33 and the battery 34 (primary circuit) and the battery monitoring circuit 31 (secondary circuit).

In this example, the DC/DC converter 32 converts the DC power supplied from the battery monitoring circuit 31 by DC/DC conversion, but this is not limited to this. Alternatively, for example, the DC/DC converter 32 may convert the DC power supplied from the battery 34 by DC/DC conversion and supply the converted DC power to the sensor circuit 33. In this case, the DC/DC converter 32 may be a non-insulated power conversion circuit.

The storage battery 34 is configured to store power. The storage battery 34 has a plurality of storage battery cells connected in series and parallel. The plurality of storage batteries 34 in the plurality of storage battery module packs 30 are connected in series and parallel. The plurality of storage batteries 34 are connected to a power node NP2, and are capable of exchanging DC power with the power conditioner 10 via a power terminal TP.

The sensor circuit 33 is configured to measure the operating state of the storage battery 34. Specifically, the sensor circuit 33 measures the voltage, current, and temperature of the storage battery 34. The sensor circuit 33 then supplies the measurement results to the storage battery monitoring circuit 31. The storage battery monitoring circuit 31 uses the current value of the storage battery 34 measured by the sensor circuit 33 to calculate the SOC (State Of Charge) level. The sensor circuit 33 is configured to operate based on the DC power supplied from the DC/DC converter 32.

(Power supply circuit 23)
2 shows an example of the configuration of the power supply circuit 23 in the storage battery control circuit 20. In addition, in this FIG. 2, an AC/DC inverter 21, a DC/DC converter 22, a control circuit 24, a plurality of storage batteries The diagram also illustrates a plurality of battery monitoring circuits 31 in the module pack 30, and a control device 93, which is a higher-level device. The power supply circuit 23 includes a switch SW, a transistor S1, resistive elements R5 and R1, and a capacitive element C1. a resistor R2, a transistor S3, resistors R11 and R12, a resistor R3, a capacitor C2, a resistor R4, a photocoupler P1, a resistor R6, a transistor S2, and a resistor R14. , R13, a transistor S4, and resistive elements R15 and R16.

The switch SW is a mechanical switch, one end of which is connected to the output terminal of the AC/DC inverter 21 and the output terminal of the DC/DC converter 22, and the other end of which is connected to the power node NP3.

The transistor S1 is a P-type field effect transistor (FET) with a gate connected to the resistor element R5, a source connected to the power node NP3, and a drain connected to the power node NP4. This power node NP4 is connected to the input terminal of the DC/DC converter 24A of the control circuit 24.

One end of the resistor element R5 is connected to the gate of the transistor S1, and the other end is connected to the node N1. One end of the resistor element R1 is connected to the power node NP3, and the other end is connected to the node N1. One end of the capacitance element C1 is connected to the power node NP3, and the other end is connected to the node N1.

One end of resistor element R2 is connected to node N1, and the other end is connected to the drain of transistor S3. Transistor S3 is an N-type field effect transistor with a gate connected to resistor elements R11 and R12, a drain connected to the other end of resistor element R2, and a source grounded. A control signal SELFW is supplied from control circuit 24 to one end of resistor element R11, and the other end is connected to the gate of transistor S3 and resistor element R12. One end of resistor element R12 is connected to the gate of transistor S3 and the other end of resistor element R11, and the other end is grounded.

One end of the resistive element R3 is connected to node N1, and the other end is connected to the capacitive element C2. One end of the capacitive element C2 is connected to the other end of the resistive element R3, and the other end is grounded. The capacitance value of the capacitive element C2 can be made larger than the capacitance value of the capacitive element C1, for example. Specifically, the capacitance value of the capacitive element C2 can be made approximately twice the capacitance value of the capacitive element C1, for example.

One end of resistor R4 is connected to node N1, and the other end is connected to node N2. The anode of the light-emitting diode of photocoupler P1 is connected to resistor R6, and the cathode is grounded. The collector of the phototransistor of photocoupler P1 is connected to node N2, and the emitter is grounded. A control signal EXTW is supplied to one end of resistor R6 from control device 93, which is a higher-level device, and the other end is connected to the anode of the light-emitting diode of photocoupler P1.

Transistor S2 is a P-type field effect transistor, the gate of which is connected to resistive element R14, the source of which is connected to power node NP4, and the drain of which is connected to the input terminal of each of the DC/DC converters 31A of the multiple battery monitoring circuits 31.

One end of the resistor element R14 is connected to the gate of transistor S2, and the other end is connected to node N3. One end of the resistor element R13 is connected to power node NP4, and the other end is connected to node N3. Transistor S4 is an N-type field effect transistor, with its gate connected to resistor elements R15 and R16, its drain connected to node N3, and its source grounded. One end of the resistor element R15 is supplied with a control signal MODP from the control circuit 24, and the other end is connected to the gate of transistor S4 and resistor element R16. One end of the resistor element R16 is connected to the gate of transistor S4 and the other end of resistor element R15, and the other end is grounded.

With this configuration, the power supply circuit 23 supplies power to the control circuit 24 and the multiple storage battery module packs 30 based on at least one of the DC power supplied from the AC/DC inverter 21 and the DC power supplied from the DC/DC converter 22. The power supply circuit 23 has three operation modes M including a normal operation mode M1, a sleep mode M2, and a deep sleep mode M3, and supplies power to the control circuit 24 and the multiple storage battery module packs 30 according to these operation modes M.

Figures 3A, 3B, and 3C show an example of the operation of transistors S1 and S2 in the power supply circuit 23, where Figure 3A shows a normal operation mode M1, Figure 3B shows a sleep mode M2, and Figure 3C shows a deep sleep mode M3.

In the normal operation mode M1, as shown in FIG. 3A, both the transistors S1 and S2 are maintained in the on state. This allows the power supply circuit 23 to continuously supply power to both the control circuit 24 and the multiple battery monitoring circuits 31. Each of the multiple battery monitoring circuits 31 supplies power to the sensor circuit 33 via the DC/DC converter 32, and the sensor circuit 33 measures the operating state of the battery 34 based on this power. The battery monitoring circuit 31 continues to monitor the operating state of the battery 34 based on the measurement result of the sensor circuit 33. The battery monitoring circuit 31 then supplies information about the operating state of the battery 34 to the control circuit 24. The control circuit 24 can control the operation of the battery system 3 based on the information supplied from the battery monitoring circuit 31 while communicating with the control device 93, which is a higher-level device.

In the sleep mode M2, as shown in FIG. 3B, the transistor S1 maintains the on state, and the transistor S2 is turned on and off so as to be intermittently on. As a result, the power supply circuit 23 continuously supplies power to the control circuit 24 and intermittently supplies power to the multiple battery monitoring circuits 31. Each of the multiple battery monitoring circuits 31 operates during the period when power is supplied from the power supply circuit 23, and supplies power to the sensor circuit 33 via the DC/DC converter 32. The sensor circuit 33 measures the operating state of the storage battery 34 based on this power. The storage battery monitoring circuit 31 monitors the operating state of the storage battery 34 based on the measurement result of the sensor circuit 33. On the other hand, each of the multiple battery monitoring circuits 31 does not operate during the period when power is not supplied from the power supply circuit 23. In this way, the storage battery monitoring circuit 31 intermittently monitors the operating state of the storage battery 34 and supplies information about the operating state of the storage battery 34 to the control circuit 24. The control circuit 24 can control the operation of the storage battery system 3 based on information supplied from the storage battery monitoring circuit 31 while communicating with the control device 93, which is a higher-level device.

For example, when the charging operation of the storage battery 34 has not been performed for a predetermined time or longer and the charge level of the storage battery 34 has dropped to a first predetermined value, the control circuit 24 sets the operation mode M of the power supply circuit 23 to this sleep mode M2. Here, the charge level may be, for example, the SOC level or the voltage level of the storage battery 34. When the charge level is the SOC level, the first predetermined value may be, for example, "20%". As a result, in the sleep mode M2, the storage battery system 3 can reduce power consumption while monitoring the operating state of the storage battery 34.

In deep sleep mode M3, as shown in FIG. 3C, transistors S1 and S2 remain in the off state. As a result, the power supply circuit 23 does not supply power to both the control circuit 24 and the multiple battery monitoring circuits 31. In this case, the control circuit 24 and the multiple battery monitoring circuits 31 do not operate. That is, the battery monitoring circuit 31 does not monitor the operating state of the battery 34, the control circuit 24 does not control the operation of the battery system 3, and does not communicate with the control device 93, which is a higher-level device.

For example, when the charging operation of the storage battery 34 is not being performed and the charge level of the storage battery 34 has dropped to a second predetermined value lower than the first predetermined value, the control circuit 24 sets the operation mode of the power supply circuit 23 to this deep sleep mode M3. When the charge level is the SOC level, the second predetermined value can be set to, for example, "0%". As a result, in the deep sleep mode M3, the storage battery system 3 can reduce power consumption and prevent further discharge of the storage battery 34. As a result, in the storage battery system 3, the storage battery 34 can be prevented from entering an overdischarge state or a deep discharge (deep discharge, complete discharge) state.

Here, the storage battery module pack 30 corresponds to a specific example of a "storage battery module" in the present disclosure. The storage battery 34 corresponds to a specific example of a "storage battery" in the present disclosure. The storage battery monitoring circuit 31 corresponds to a specific example of a "storage battery monitoring circuit" in the present disclosure. The power conditioner 10 corresponds to a specific example of an "external power device" and a "power conversion device" in the present disclosure. The system power supply 9 corresponds to a specific example of an "external power source" in the present disclosure. The control circuit 24 corresponds to a specific example of a "control circuit" in the present disclosure. The power supply circuit 23 corresponds to a specific example of a "power supply circuit" in the present disclosure. The normal operation mode M1 corresponds to a specific example of a "first operation mode" in the present disclosure. The sleep mode M2 corresponds to a specific example of a "second operation mode" in the present disclosure. The deep sleep mode M3 corresponds to a specific example of a "third operation mode" in the present disclosure. The power node NP1 corresponds to a specific example of a "first power node" in the present disclosure. The power node NP2 corresponds to a specific example of a "second power node" in the present disclosure. The power node NP3 corresponds to a specific example of a "third power node" in the present disclosure. The power node NP4 corresponds to a specific example of a "fourth power node" in the present disclosure. The AC/DC inverter 21 corresponds to a specific example of a "first power conversion circuit" in the present disclosure. The DC/DC converter 22 corresponds to a specific example of a "second power conversion circuit" in the present disclosure. The storage battery system 3 corresponds to a specific example of a "storage battery system" in the present disclosure. The power storage system 2 corresponds to a specific example of a "power storage system" in the present disclosure. The control device 93 corresponds to a specific example of an "external control device" in the present disclosure.

The transistor S1 corresponds to a specific example of a "first switch" in this disclosure. The transistor S2 corresponds to a specific example of a "second switch" in this disclosure. The transistor S3 corresponds to a specific example of a "third switch" in this disclosure. The phototransistor of the photocoupler P1 corresponds to a specific example of an "element" in this disclosure. The resistive element R1 corresponds to a specific example of a "first resistive element" in this disclosure. The resistive element R2 corresponds to a specific example of a "second resistive element" in this disclosure. The resistive element R3 corresponds to a specific example of a "third resistive element" in this disclosure. The resistive element R4 corresponds to a specific example of a "fourth resistive element" in this disclosure. The capacitive element C1 corresponds to a specific example of a "first capacitive element" in this disclosure. The capacitive element C2 corresponds to a specific example of a "second capacitive element" in this disclosure. The node N1 corresponds to a specific example of a "first node" in this disclosure. The node N2 corresponds to a specific example of a "second node" in this disclosure.

[Actions and Functions]
Next, the operation and function of the power system 1 of the present embodiment will be described.

(Overall operation overview)
First, an overview of the overall operation of the power system 1 will be described with reference to Fig. 1. The power conditioner 10 converts, for example, AC power supplied from a system power supply 9 into DC power by AC/DC conversion, and supplies the converted DC power to the storage battery system 3. The power conditioner 10 also converts, for example, DC power supplied from the storage battery system 3 into AC power by DC/AC conversion, and supplies the converted AC power to the system power supply 9 and the load device 92. The power conditioner 10 also converts, for example, DC power supplied from a solar power generation device 91 into DC/DC conversion, and supplies the converted DC power to the storage battery system 3, or converts the DC power supplied from the solar power generation device 91 into AC power by DC/AC conversion, and supplies the converted AC power to the system power supply 9 and the load device 92. The solar power generation device 91 generates DC power based on sunlight. The load device 92 operates based on AC power supplied from the system power supply 9 and AC power supplied from the power conditioner 10. The control device 93 controls the overall operation of the power system 1.

The AC/DC inverter 21 of the battery control circuit 20 converts the AC power supplied from the power node NP1 into DC power by AC/DC conversion, and supplies the converted DC power to the power supply circuit 23. The DC/DC converter 22 converts the DC power supplied from the power node NP2 by DC/DC conversion, and supplies the converted DC power to the power supply circuit 23. The power supply circuit 23 supplies the DC power supplied from at least one of the AC/DC inverter 21 and the DC/DC converter 22 to the control circuit 24 and the multiple battery module packs 30. The power supply circuit 23 supplies power to the control circuit 24 and the multiple battery module packs 30 based on the control signals SELFW and MODP supplied from the control circuit 24 and the control signal EXTW supplied from the control device 93, which is a higher-level device. The control circuit 24 communicates with the multiple battery module packs 30 to grasp the operating state of each of the multiple battery module packs 30. In addition, the control circuit 24 controls the operation of the storage battery system 3 based on instructions from a control device 93, which is a higher-level device.

In each of the multiple battery module packs 30, the battery monitoring circuit 31 supplies power to the sensor circuit 33 via the DC/DC converter 32. The sensor circuit 33 measures the operating state of the battery 34 and supplies the measurement results to the battery monitoring circuit 31. The battery monitoring circuit 31 monitors the operating state of the battery 34 based on the measurement results of the sensor circuit 33. The battery monitoring circuit 31 then communicates with the control circuit 24 to supply information about the operating state of the battery 34 to the control circuit 24.

(Detailed operation)
The control device 93 and the control circuit 24 control the operation of the power supply circuit 23, thereby controlling the power supply to the control circuit 24 and the storage battery monitoring circuits 31 of the multiple storage battery module packs 30. The operations of the control device 93, the control circuit 24, and the power supply circuit 23 will be described in detail below.

(Start-up of storage battery system 3)
Before the power supply of the storage battery system 3 is turned on, the switch SW of the power supply circuit 23 is in the OFF state. At this time, no power is supplied to the power supply circuit 23, and therefore no power is supplied to the control circuit 24 and the storage battery monitoring circuit 31. The control signals SELFW, MODP, and EXTW are at low levels, and the transistors S1 to S4 are all in the OFF state.

When the power supply circuit 23 is turned on and the switch SW of the power supply circuit 23 is turned on, the power supply circuit 23 is supplied with DC power from at least one of the AC/DC inverter 21 and the DC/DC converter 22. As a result, in the power supply circuit 23 (FIG. 2), a current flows from the power node NP3 to the resistance element R1, the resistance element R3, and the capacitance element C2 in that order, and the capacitance elements C1 and C2 are charged. As a result, the voltage of the node N1 gradually becomes lower than the voltage of the power node NP3, and the absolute value of the gate-source voltage Vgs of the transistor S1 gradually becomes larger. Then, after a time corresponding to the time constants of these circuits has elapsed, the transistor S1 changes from the off state to the on state. When the transistor S1 is turned on in this way, the power supply circuit 23 supplies the DC power supplied from at least one of the AC/DC inverter 21 and the DC/DC converter 22 to the control circuit 24 via the power node NP3, the transistor S1, and the power node NP4. The control circuit 24 starts operating based on this DC power.

Next, the control circuit 24 changes the control signal SELFW from low to high. This causes the transistor S3 to change from off to on, and the voltage of the node N1 becomes the voltage divided by the resistor elements R1 and R2. Thereafter, the transistor S1 is maintained in the on state.

Next, the control circuit 24 changes the control signal MODP from low level to high level. This causes the transistor S4 to change from off state to on state, and current flows from the power node NP4 to the resistor element R13 and the transistor S4 in that order. This causes the voltage of the node N3 to become lower than the voltage of the power node NP4, and the transistor S2 changes from off state to on state. When the transistor S2 is turned on in this manner, the power supply circuit 23 supplies the DC power supplied from at least one of the AC/DC inverter 21 and the DC/DC converter 22 to the multiple battery monitoring circuits 31 via the power node NP3, the transistor S1, the power node NP4, and the transistor S2. The multiple battery monitoring circuits 31 start operating based on this DC power.

In this way, the operation mode M of the power supply circuit 23 is set to the normal operation mode M1. In the normal operation mode M1, the power supply circuit 23 continuously supplies power to both the control circuit 24 and the multiple battery monitoring circuits 31. Each of the multiple battery monitoring circuits 31 supplies power to the sensor circuit 33 via the DC/DC converter 32, and the sensor circuit 33 measures the operation state of the storage battery 34 based on this power. The storage battery monitoring circuit 31 continues to monitor the operation state of the storage battery 34 based on the measurement result of the sensor circuit 33. The storage battery monitoring circuit 31 then supplies information about the operation state of the storage battery 34 to the control circuit 24. The control circuit 24 controls the operation of the storage battery system 3 based on the information supplied from the storage battery monitoring circuit 31 while communicating with the control device 93, which is a higher-level device.

Next, we will explain the transitions of operation mode M between normal operation mode M1, sleep mode M2, and deep sleep mode M3.

Figure 4 shows the transition of the operating mode M in the power supply circuit 23. The control circuit 24 and the control device 93, which is a higher-level device, supply control signals SELFW, MODP, and EXTW to the power supply circuit 23 to transition the operating mode M of the power supply circuit 23.

(Transition from normal operation mode M1 to sleep mode M2)
When the operation mode M of the power supply circuit 23 is the normal operation mode M1, if the charging operation of the storage battery 34 has not been performed for a predetermined time or more and the charge level of the storage battery 34 has dropped to a first predetermined value, the control circuit 24 transitions the operation mode M from the normal operation mode M1 to the sleep mode M2. Here, the charge level may be, for example, the SOC level or the voltage level of the storage battery 34. When the charge level is the SOC level, the first predetermined value may be, for example, "20%". In this case, the control circuit 24 changes the control signal MODP between a low level and a high level while maintaining the control signal SELFW at a high level.

When the control signal MODP is at a low level, the transistor S4 is turned off, the voltage of the node N3 is approximately the same as the voltage of the power node NP4, and the transistor S2 is turned off. In this case, the power supply circuit 23 does not supply DC power to the multiple battery monitoring circuits 31, so the battery module pack 30 including the battery monitoring circuit 31 does not operate. This allows the power consumption in the battery module pack 30 to be reduced.

When the control signal MODP is at a high level, transistor S4 is turned on, and transistor S2 is turned on. In this case, the power supply circuit 23 supplies DC power to the multiple battery monitoring circuits 31, and the battery module pack 30 including the battery monitoring circuits 31 operates. The battery monitoring circuit 31 monitors the operating state of the battery 34 based on the measurement results of the sensor circuit 33, and supplies information about the operating state of the battery 34 to the control circuit 24. In this way, the control circuit 24 grasps the operating state of each of the multiple battery module packs 30.

In the sleep mode M2, the battery monitoring circuit 31 operates intermittently. This allows the battery system 3 to effectively reduce power consumption while grasping the operating state of each of the multiple battery module packs 30. By operating intermittently, the battery monitoring circuit 31 can grasp the operating state of each of the multiple battery module packs 30, so that, for example, the battery 34 can be prevented from becoming an over-discharge state or a deep discharge state (deep discharge, complete discharge), and an abnormality in the battery 34 can be detected early.

(Transition from sleep mode M2 to normal operation mode M1)
When the operation mode M of the power supply circuit 23 is the sleep mode M2, the control circuit 24 transitions the operation mode M to the normal operation mode M1 based on its own judgment or an instruction from the control device 93, which is a higher-level device. Specifically, the control circuit 24 issues a restoration instruction to the power supply circuit 23 by setting both of the control signals SELFW and MODP to high levels.

When the control circuit 24 sets the control signal MODP to a high level, the transistor S4 is turned on, and the transistor S2 is turned on. In this case, the power supply circuit 23 supplies DC power to the multiple battery monitoring circuits 31. The battery module pack 30 including the battery monitoring circuits 31 starts operating.

In this way, the operating mode M of the power supply circuit 23 returns to the normal operating mode M1.

(Transition from normal operation mode M1 or sleep mode M2 to deep sleep mode M3)
When the operation mode M of the power supply circuit 23 is the normal operation mode M1 or the sleep mode M2, if the charging operation of the storage battery 34 is not being performed and the charge level of the storage battery 34 drops to a second predetermined value lower than the first predetermined value, the control circuit 24 transitions the operation mode M to the deep sleep mode M3. Here, the charge level may be, for example, the SOC level or the voltage level of the storage battery 34. When the charge level is the SOC level, the second predetermined value can be, for example, "0%". In this case, the control circuit 24 changes the control signal SELFW from a high level to a low level.

When the control circuit 24 sets the control signal SELFW to a low level, the transistor S3 is turned off. As a result, a current flows from the power node NP3 through the resistive element R1, the resistive element R3, and the capacitive element C2 in that order, and the capacitive element C2 is charged and the capacitive element C1 is discharged. As a result, the voltage of the node N1 gradually approaches the voltage of the power node NP3, and the absolute value of the gate-source voltage Vgs of the transistor S1 gradually decreases. Then, after a time corresponding to the time constants of these circuits has elapsed, the transistor S1 changes from the on state to the off state. When the transistor S1 is turned off in this way, the power supply circuit 23 stops supplying power to the control circuit 24 and the multiple storage battery monitoring circuits 31. As a result, the control circuit 24 sets the control signal MODP to a low level. As a result, the transistor S2 is turned off. In this way, the control circuit 24 and the multiple storage battery monitoring circuits 31 stop operating. This makes it possible to reduce the power consumption in the control circuit 24 and the multiple storage battery module packs 30.

(Transition from deep sleep mode M3 to normal operation mode M1)
When the operation mode M of the power supply circuit 23 is the deep sleep mode M3, the control device 93, which is a higher-level device, transitions the operation mode M to the normal operation mode M1. Specifically, the control device 93 issues a restoration instruction to the power supply circuit 23 by changing the control signal EXTW from a low level to a high level.

When the control device 93 sets the control signal EXTW to a high level, the photocoupler P1 passes a current from the collector of the photodiode to the emitter. As a result, a current flows from the power node NP3 through the resistor element R1, the resistor element R4, and the photocoupler P1 in this order, charging the capacitor element C1 and discharging the capacitor element C2. As a result, the voltage of the node N1 gradually becomes lower than the voltage of the power node NP3, and the absolute value of the gate-source voltage Vgs of the transistor S1 gradually becomes larger. Then, after a time corresponding to the time constants of these circuits has elapsed, the transistor S1 changes from an OFF state to an ON state. When the transistor S1 is thus turned ON, the power supply circuit 23 supplies the DC power supplied from at least one of the AC/DC inverter 21 and the DC/DC converter 22 to the control circuit 24 via the power node NP3, the transistor S1, and the power node NP4. The control circuit 24 starts operating based on this DC power. After that, the control device 93 sets the control signal EXTW to a low level.

Next, the control circuit 24 changes the control signal SELFW from low to high. This causes the transistor S3 to change from off to on, and the voltage of the node N1 becomes the voltage divided by the resistor elements R1 and R2. Thereafter, the transistor S1 is maintained in the on state.

Next, the control circuit 24 changes the control signal MODP from low to high. This causes the transistor S4 to change from off to on, the voltage of the node N3 to become lower than the voltage of the power node NP4, and the transistor S2 to change from off to on. When the transistor S2 is turned on in this manner, the power supply circuit 23 supplies DC power to the battery monitoring circuit 31 via the power node NP3, the transistor S1, the power node NP4, and the transistor S2. The battery monitoring circuit 31 starts operating based on this DC power.

In this way, the operating mode M of the power supply circuit 23 returns to the normal operating mode M1.

For example, when the operation mode M of the power supply circuit 23 is normal operation mode M1, if the charging/discharging operation of the storage battery 34 has not been performed for a predetermined time or longer and the SOC level has dropped to, for example, "20%", the control circuit 24 transitions the operation mode M of the power supply circuit 23 to sleep mode M2. As a result, the power supply circuit 23 continuously supplies power to the control circuit 24 and intermittently supplies power to the multiple storage battery monitoring circuits 31. In this way, the storage battery system 3 can reduce power consumption while monitoring the operating state of the storage battery 34.

In addition, for example, during a power outage of the system power supply 9, the power storage system 2 supplies the power generated by the solar power generation device 91 to the load device 92, or supplies the power of the storage battery 34 to the load device 92. For example, when night falls during a power outage and the power generated by the solar power generation device 91 drops, the power generation operation of the solar power generation device 91 stops, so the power storage system 2 supplies the power of the storage battery 34 to the load device 92. In this case, since the charging operation of the storage battery 34 is not performed, for example, the SOC level drops. When the charging operation of the storage battery 34 is not performed for a predetermined time or more and the SOC level of the storage battery 34 drops to, for example, "20%, " the control circuit 24 transitions the operation mode M of the power supply circuit 23 to the sleep mode M2. As a result, the power supply circuit 23 continues to supply power to the control circuit 24 and intermittently supplies power to the multiple storage battery monitoring circuits 31. Then, when the SOC level of the storage battery 34 decreases and the SOC level decreases to, for example, "0%, " the control circuit 24 transitions the operation mode M of the power supply circuit 23 to the deep sleep mode M3. As a result, the power supply circuit 23 stops supplying power to the control circuit 24 and the plurality of storage battery monitoring circuits 31. After that, the power conditioner 10 stops the DC/AC conversion based on the direct current power supplied from the plurality of storage battery module packs 30. In this way, by providing a period in which the power supply circuit 23 operates in the sleep mode M2, it is possible to extend the time until the SOC level decreases to a predetermined value (for example, "0"). In addition, by providing a period in which the power supply circuit 23 operates in the deep sleep mode M3, it is possible to extend the time until the state of the storage battery 34 approaches an overdischarge state or a deep discharge state.

In the storage battery system 3, the firmware of the control circuit 24 is updated based on instructions from the control device 93, which is a higher-level device. When updating the firmware, the operation mode M of the power supply circuit 23 may be the normal operation mode M1 or the sleep mode M2. That is, even in the sleep mode M2, the power supply circuit 23 supplies power to the control circuit 24, so that the control circuit 24 can update the firmware by communicating with the control device 93.

When the control circuit 24 updates the firmware, the control circuit 24 performs a reset operation, and therefore sets the voltages of the control signals SELFW and MODP to low levels. When the operation mode M of the power supply circuit 23 is the normal operation mode M1 or the sleep mode M2, when the control signal SELFW becomes low level, the transistor S3 becomes off. At this time, the capacitive element C1 tries to hold the gate-source voltage Vgs of the transistor S1, so the transistor S1 maintains its on state, and the power supply circuit 23 maintains the power supply to the control circuit 24. When the control signal MODP becomes low level, the transistor S4 becomes off state, so the transistor S2 becomes off state, and the power supply to the battery monitoring circuit 31 is stopped. Then, after completing the reset operation, the control circuit 24 changes the control signal SELFW from low level to high level. This causes the transistor S3 to become on state, and as a result, the transistor S1 is maintained in the on state thereafter.

In this way, in the storage battery system 3, the firmware can be updated in the sleep mode M2. As shown in FIG. 4, the operation mode M of the power supply circuit 23 becomes the sleep mode M2 when a charging operation has not been performed for a predetermined time or more. In this way, the storage battery system 3 can update the firmware even when a charging operation has not been performed for a predetermined time or more. For example, in the technology described in Patent Document 1, the power supply to the control unit is stopped in the sleep mode, so the firmware cannot be updated. In the storage battery system 3, the firmware can be updated even in the sleep mode M2, so that the firmware can be updated at a more flexible timing when necessary.

In the battery storage system 3, the capacitance element C1 is provided, so that even if the control signal SELFW is transiently at a low level, the transistor S1 can be maintained in the on state for a time length corresponding to the time constant of the capacitance element C1 and the resistance element R1. In this way, since the transistor S1 does not transiently go into the off state, it is possible to prevent the operation mode M from transitioning to the deep sleep mode M3, and also to reduce the possibility of firmware update failure.

In addition, for example, in the case of a smartphone, when updating firmware, it is generally recommended to connect a charger to the smartphone and supply power to the smartphone. Therefore, the user needs to connect the charger to the smartphone. In the storage battery system 3, when updating the firmware of the control circuit 24, the power supply to the control circuit 24 is maintained, so there is no need to provide such an additional power supply path. Therefore, in the storage battery system 3, for example, the administrator of the storage battery system 3 does not need to set up an additional power supply to the control circuit 24 when updating firmware, so the workload of the administrator can be reduced.

In addition, in the storage battery system 3, the control circuit 24 and the control device 93, which is a higher-level device, control the operation mode M of the power supply circuit 23. That is, for example, after the administrator of the storage battery system 3 performs an operation to turn on the switch SW when the storage battery system 3 is powered on, the administrator of the storage battery system 3 does not need to operate the storage battery system 3, for example, when transitioning to operation mode M. This reduces the workload of the administrator of the storage battery system 3.

In addition, in the storage battery system 3, when the operation mode M is set to the sleep mode M2 or the deep sleep mode M3, the transistors S1 and S2 provided in the power supply path are controlled. As a result, for example, the DC/DC converter 24A provided in the control circuit 24 and the DC/DC converter 31A provided in the storage battery monitoring circuit 31 are not limited to switching power supplies, and various circuits such as linear regulators can be used. That is, for example, as in the technology described in Patent Document 1, when the operation of the control unit is stopped by controlling the enable signal supplied to the DC/DC converter that supplies the power supply voltage to the control unit, at least a part of the circuit of the DC/DC converter operates, so this part of the circuit may consume power. Therefore, it is desirable for this DC/DC converter to use a circuit configuration with less quiescent power. On the other hand, in the storage battery system 3, since the transistors S1 and S2 provided in the power supply path are controlled, for example, when the transistor S1 is turned off, the power supply circuit 23 does not supply power to the control circuit 24, so the DC/DC converter 24A provided in the control circuit 24 does not consume power. Therefore, for example, a circuit such as a linear regulator with a slightly large quiescent power can be used as the DC/DC converter 24A.

Thus, the battery storage system 3 includes a battery module pack 30 having a battery 34 and a battery monitoring circuit 31 that monitors the operating state of the battery 34, a power terminal TP connected to the battery module pack 30 and transmitting power between the battery module pack 30 and the power conditioner 10, a control circuit 24 that controls the operation of the battery module pack 30, and a power supply circuit 23 that supplies power to the control circuit 24 and the battery monitoring circuit 31 from at least one of the system power source 9 and the battery module pack 30. The power supply circuit 23 selectively operates in one of the following operation modes: a normal operation mode M1 in which power is supplied to the control circuit 24 and the storage battery monitoring circuit 31; a sleep mode M2 in which power is supplied to the control circuit 24 and the storage battery monitoring circuit 31 intermittently when the storage battery 34 has not been charged for a predetermined time or more and the charge level has dropped to a first predetermined value; and a deep sleep mode M3 in which power supply to the control circuit 24 and the storage battery monitoring circuit 31 is stopped when the storage battery 34 has not been charged and the charge level has dropped to a second predetermined value lower than the first predetermined value. As a result, in the storage battery system 3, for example, in the sleep mode M2, the operation state of each of the multiple storage battery module packs 30 can be grasped while reducing power consumption. In addition, for example, in the deep sleep mode M3, the power consumed in the storage battery system 3 can be further reduced. As a result, the storage battery system 3 can effectively reduce power consumption.

In addition, in the storage battery system 3, an AC/DC inverter 21 that converts power is provided on a path connecting the power node NP1 connected to the system power source 9 and the power supply circuit 23, and a DC/DC converter 22 that converts power is provided on a path connecting the power node NP2 connected to the storage battery module pack 30 and the power supply circuit 23. This allows the storage battery system 3 to stably operate the control circuit 24 and the storage battery monitoring circuit 31. For example, when the SOC level of the storage battery 34 is low, the control circuit 24 and the storage battery monitoring circuit 31 can be operated based on the power supplied from the system power source 9. Also, for example, when the system power source 9 is in a power outage, the control circuit 24 and the storage battery monitoring circuit 31 can be operated based on the power supplied from the storage battery 34.

2, the battery system 3 is provided with a transistor S1 that connects the power node NP3 led to the AC/DC inverter 21 and the DC/DC converter 22 to the power node NP4 connected to the control circuit 24 by being turned on, and a transistor S2 that connects the power node NP4 to the battery monitoring circuit 31 by being turned on. As a result, the battery system 3 can control the power supply to the control circuit 24 and the battery monitoring circuit 31 by controlling the transistors S1 and S2, for example. Specifically, for example, the control circuit 24 can operate the power supply circuit 23 in the sleep mode M2 by maintaining the transistor S1 in the on state and turning the transistor S2 intermittently on. Also, for example, the control circuit 24 can operate the power supply circuit 23 in the deep sleep mode M3 by turning the transistor S1 off. As a result, the battery system 3 can effectively reduce power consumption.

[effect]
As described above, in this embodiment, a storage battery module pack having a storage battery and a storage battery monitoring circuit that monitors the operating state of the storage battery, a power terminal connected to the storage battery module pack and exchanging power with a power conditioner, a control circuit that controls the operation of the storage battery module pack, and a power supply circuit that supplies power to the control circuit and the storage battery monitoring circuit from at least one of a system power source and the storage battery module pack. The power supply circuit selectively operates in one of the following operation modes: a normal operation mode in which power is supplied to the control circuit and the storage battery monitoring circuit, a sleep mode in which power is supplied to the control circuit and the storage battery monitoring circuit intermittently when the storage battery is not charged for a predetermined time or more and the charge level has fallen to a first predetermined value, and a deep sleep mode in which power supply to the control circuit and the storage battery monitoring circuit is stopped when the storage battery is not charged and the charge level has fallen to a second predetermined value lower than the first predetermined value. This makes it possible to effectively reduce power consumption.

In this embodiment, an AC/DC inverter that converts power is provided on a path connecting a power node connected to a system power supply and a power supply circuit, and a DC/DC converter that converts power is provided on a path connecting a power node connected to a storage battery module pack and a power supply circuit. This allows the control circuit and storage battery monitoring circuit to operate stably.

In this embodiment, a transistor is provided that, when turned on, connects the power node NP3 led to the AC/DC inverter and the DC/DC converter with the power node NP4 connected to the control circuit, and a transistor that, when turned on, connects the power node NP4 with the battery monitoring circuit. This makes it possible to control the power supply to the control circuit and the battery monitoring circuit, for example, by controlling these transistors.

[Modification 1]
For example, in the above-described embodiment, a photocoupler P1 is provided as shown in FIG. 2, but this is not limited to this. Instead of this, for example, a semiconductor switch such as a bipolar transistor or a field effect transistor may be provided, or a relay may be provided.

[Modification 2]
In the above embodiment, as shown in FIG. 1, the power system 1 is connected to the power grid 9, but the present invention is not limited thereto. For example, as shown in FIG. 5, the power system 1 may not be connected to the power grid 9 as in the power system 1A. The power system 1A includes a solar power generation device 91, a load device 92, a control device 93, and a power storage system 2A. The solar power generation device 91 is connected to a power node NP1A. The power storage system 2A includes a power conditioner 10 and a storage battery system 3A. The storage battery system 3A includes a storage battery control circuit 20A. The storage battery control circuit 20A includes a DC/DC converter 21A. The DC/DC converter 21A is an insulated power conversion circuit, and has an input terminal connected to the power node NP1A and an output terminal connected to the output terminal of the DC/DC converter 22 and the power supply circuit 23. The DC/DC converter 21A converts the DC power supplied from the power node NP1A into DC power by DC/DC conversion, and supplies the converted DC power to the power supply circuit 23. Here, the solar power generation device 91 corresponds to a specific example of an “external power supply” in the present disclosure. The power node NP1A corresponds to a specific example of a “first power node” in the present disclosure. The DC/DC converter 21A corresponds to a specific example of a “first power conversion circuit” in the present disclosure.

The present technology has been explained above using examples, but the present technology is not limited to these examples and can be modified in various ways.

For example, in the above-described embodiment, the time from when switch SW is turned on until control signal SELFW changes from low level to high level is set by the time constant of resistive elements R1, R3 and capacitive elements C1, C2 in power supply circuit 23. In other words, this operation is performed by open-loop control of an analog circuit. However, this is not limited to this, and this operation may be performed by closed-loop control of an analog circuit. Also, it may be performed by open-loop control of a digital circuit, or it may be performed by closed-loop control of a digital circuit.

Note that the effects described in this specification are merely examples and are not limiting, and other effects may also exist.

Claims (10)

A storage battery module including a storage battery and a storage battery monitoring circuit capable of monitoring an operating state of the storage battery;
a power terminal connected to the storage battery module and capable of transmitting and receiving power between the storage battery module and an external power device;
A control circuit capable of controlling an operation of the storage battery module;
a power supply circuit capable of supplying power to the control circuit and the storage battery monitoring circuit from at least one of an external power source and the storage battery module;
The power supply circuit is capable of selectively operating in one of the following operation modes: a first operation mode in which power is supplied to the control circuit and the battery monitoring circuit; a second operation mode in which, when no charging operation of the storage battery is being performed for a predetermined time or more and the charge level has dropped to a first predetermined value, power is supplied to the control circuit and power is intermittently supplied to the battery monitoring circuit; and a third operation mode in which, when no charging operation of the storage battery is being performed and the charge level has dropped to a second predetermined value that is lower than the first predetermined value, power supply to the control circuit and the battery monitoring circuit is stopped. a first power conversion circuit that is provided on a path connecting a first power node connected to the external power supply and the power supply circuit, and that is capable of converting power;
The battery system according to claim 1 , further comprising: a second power conversion circuit capable of converting power, the second power conversion circuit being provided on a path connecting a second power node connected to the battery module and the power supply circuit. The power supply circuit includes:
a first switch that is turned on to connect a third power node connected to the first power conversion circuit and the second power conversion circuit to a fourth power node connected to the control circuit;
The battery system according to claim 2 , further comprising: a second switch that is turned on to connect the fourth power node and the battery monitoring circuit. The storage battery system according to claim 3 , wherein the control circuit is capable of operating the power supply circuit in the second operating mode by maintaining the first switch in an on state and intermittently turning on the second switch. The battery system according to claim 3 , wherein the control circuit is capable of causing the power supply circuit to operate in the third operation mode by turning off the first switch. the first switch is a field effect transistor having a gate, a source connected to the third power node, and a drain connected to the fourth power node;
6. The battery system according to claim 3, wherein the power supply circuit includes a first capacitance element having one end connected to the source of the field effect transistor and the other end connected to a first node led to the gate of the field effect transistor. The power supply circuit includes:
a first resistive element having one end connected to the source of the field effect transistor and the other end connected to the first node;
a second resistive element having one end connected to the first node and the other end;
a third switch that is turned on to connect the other end of the second resistance element to a ground node,
The battery system according to claim 6 , wherein the control circuit is capable of turning on the first switch by turning on the third switch. The storage battery system according to claim 5 , wherein the control circuit is capable of changing the operation mode of the power supply circuit from the third operation mode to the first operation mode by changing the first switch from an off state to an on state. the first switch is a field effect transistor having a gate, a source connected to the third power node, and a drain connected to the fourth power node;
The power supply circuit includes:
a first resistive element having one end connected to the source of the field effect transistor and the other end connected to a first node led to the gate of the field effect transistor;
a third resistive element having one end connected to the first node and the other end;
a second capacitance element having one end connected to the other end of the third resistance element and the other end connected to a ground node;
a fourth resistive element having one end connected to the first node and the other end connected to a second node;
The storage battery system according to claim 8 , further comprising: an element capable of turning on a current path from the second node to a ground node by being turned on based on a control signal from an external control device. A storage battery module including a storage battery and a storage battery monitoring circuit capable of monitoring a state of the storage battery;
a power conversion device connected to a first power node connected to an external power supply and a second power node connected to the storage battery module, the power conversion device being capable of converting power;
A control circuit capable of controlling an operation of the storage battery module;
a power supply circuit capable of supplying power to the control circuit and the storage battery monitoring circuit from at least one of the external power source and the storage battery module;
The power supply circuit is capable of selectively operating in one of a first operation mode in which it supplies power to the control circuit and the battery monitoring circuit, a second operation mode in which it supplies power to the control circuit and intermittently supplies power to the battery monitoring circuit when no charging operation of the storage battery has been performed for a predetermined time or more and the charge level has dropped to a first predetermined value, and a third operation mode in which it stops supplying power to the control circuit and the battery monitoring circuit when no charging operation of the storage battery has been performed and the charge level has dropped to a second predetermined value lower than the first predetermined value.

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