JP7618100B2 - Power Conversion Equipment - Google Patents

Description

This application relates to a power conversion device.

2. Description of the Related Art A contactless power supply technology is known that utilizes magnetic coupling between coils to supply power through space.
A contactless power supply device described in Patent Document 1, which is a conventional power conversion device, includes a coil that receives and transmits power in a contactless manner by magnetic coupling with the outside, a bridge circuit in which one end of the coil is connected to one AC terminal via a resonant capacitor and the other end of the coil is connected to the other AC terminal, and a smoothing capacitor connected between DC terminals of the bridge circuit, and a load is connected across the smoothing capacitor. The bridge circuit has an anti-parallel connection circuit of a semiconductor switch and a diode in each of the upper and lower arms. A control device turns on the semiconductor switch of the upper or lower arm of the bridge circuit during a period when power supply from the outside to the coil is stopped, and when power supply is started, performs a switching operation of each semiconductor switch of the bridge circuit after detecting a zero crossing of the current of the coil.

Patent No. 5928865

In the conventional technology described in the above-mentioned Patent Document 1, switching is performed in synchronization with the high-frequency power received contactlessly, so a highly accurate current sensor is required, and a delay time occurs due to zero-cross detection of the current. This makes it difficult to achieve stable and highly accurate output control.

This application discloses technology to solve the above problems, and aims to provide a power conversion device using non-contact power supply technology that is capable of stable and highly accurate output control without using a high-precision current sensor.

The power conversion device disclosed in the present application includes a first coil that receives and transmits power in a non-contact manner by magnetic coupling with the outside, a first bridge circuit that has multiple semiconductor switches between DC buses and converts power between AC and DC, with the AC side connected to the first coil, a current detector that detects DC current flowing on the DC side of the first bridge circuit, and a first control circuit that controls the first bridge circuit. The first control circuit controls the switching of the multiple semiconductor switches using first and second frequencies that are two different switching frequencies, calculates a time ratio for using the first and second frequencies so as to reduce the rate of change of the DC current for each calculation cycle, and controls a first and second period, which are set by dividing the calculation cycle by the time ratio, using the first and second frequencies, respectively.

The power conversion device disclosed in this application uses contactless power supply technology, making it possible to achieve stable, highly accurate output control without using a high-precision current sensor.

1 is a configuration diagram showing a power conversion device according to a first embodiment; 4 is a waveform diagram showing an output voltage of a bridge circuit in the power transmitting device according to the first embodiment. FIG. 3 is a waveform diagram of a gate signal used in the power conversion device according to the first embodiment. FIG. 3 is a waveform diagram of a gate signal used in the power conversion device according to the first embodiment. FIG. 5A and 5B are diagrams illustrating changes over time in the phase difference between a gate signal of a power transmitting device and a gate signal of a power receiving device according to the first embodiment. 5A and 5B are diagrams illustrating changes over time in the phase difference between a gate signal of a power transmitting device and a gate signal of a power receiving device according to the first embodiment. FIG. 2 is a diagram showing first and second frequencies used in the power conversion device according to the first embodiment. 4 is a diagram for explaining first and second frequencies used in the power conversion device according to the first embodiment. FIG. 4A to 4C are diagrams illustrating constant current control of the power conversion device according to the first embodiment. FIG. 2 is a control block diagram showing constant current control of the power conversion device according to the first embodiment. 5A to 5C are diagrams illustrating the operation of constant current control of the power conversion device according to the first embodiment. 4 is a diagram showing a current waveform under constant current control of the power conversion device according to the first embodiment. FIG. FIG. 11 is a control block diagram showing current control of a power conversion device according to a second embodiment. 13 is a diagram showing a current waveform by current control of the power conversion device according to the second embodiment. FIG. 13 is a diagram showing a current waveform by current control of the power conversion device according to the second embodiment. FIG. 13 is a flowchart showing current control of the power conversion device according to another example of the second embodiment. FIG. 11 is a control block diagram showing current control of a power conversion device according to another example of the second embodiment. 13 is a waveform diagram showing a gate signal and an output voltage of a bridge circuit used in a power transmitting device according to embodiment 3. FIG. FIG. 11 is a waveform diagram of a gate signal used in the power conversion device according to the third embodiment. 13 is a flowchart showing current control of a power conversion device according to another example of the fourth embodiment. FIG. 13 is a configuration diagram showing a power conversion device according to a fifth embodiment. 13 is a flowchart showing current control of a power conversion device according to another example of the fifth embodiment.

Embodiment 1.
Hereinafter, embodiments will be described with reference to the drawings.
FIG. 1 is a configuration diagram showing a power conversion device according to a first embodiment.
1, a power conversion device 1 is connected, for example, between a DC power source 2 and a load 3 to supply DC power to the load 3. The power conversion device 1 includes a power receiving device 10 connected to the load 3 and a power transmitting device 20 connected to the DC power source 2, and the power receiving device 10 receives power transmitted from the power transmitting device 20.
It should be noted that the power conversion device 1 is capable of bidirectional operation, and it is possible that the power transmitting device 20 receives the power transmitted from the power receiving device 10 .

The power receiving device 10 includes a power receiving coil 11 as a first coil, a first bridge circuit 12, and a resonant circuit 13. Two AC terminals of the first bridge circuit 12 are connected to both ends of the power receiving coil 11 via the resonant circuit 13. The power receiving device 10 also includes a first control circuit 14 that controls the output of the first bridge circuit 12, and a current detector 15 that detects a DC current I flowing to the load 3 on the DC side of the first bridge circuit 12.
The power receiving coil 11 receives and transmits electric power in a non-contact manner by magnetic coupling with the outside. In this case, the power receiving coil 11 is magnetically coupled with a power transmitting coil 21 as a second coil in the power transmitting device 20, and thereby transmits and receives electric power between the power receiving coil 11 and the power transmitting coil 21 in a non-contact manner via a magnetic field.

The first bridge circuit 12 has a plurality of semiconductor switches Q1 to Q4 between the DC bus bars, receives power at the power receiving coil 11, converts the AC power through the resonant circuit 13 into DC power, and outputs it to the load 3.
The first bridge circuit 12 is a full bridge circuit composed of two leg circuits QA and QB connected in parallel. The leg circuit QA is composed of a semiconductor switch Q1 and a semiconductor switch Q2 connected in series, and the leg circuit QB is composed of a semiconductor switch Q3 and a semiconductor switch Q4 connected in series.
The first bridge circuit 12 is not limited to a full-bridge configuration, but may be a half-bridge configuration or another configuration.

The semiconductor switches Q1 to Q4 are IGBTs (Insulated Gate Bipolar Transistors) with diodes connected in inverse parallel, or MOSFETs (Metal Oxide Semiconductor Field Effect Transistors) with diodes connected between the source and drain. The diodes may be built into the semiconductor switches Q1 to Q4, or may be connected separately to the outside.

The first control circuit 14 generates a gate signal G1 to the semiconductor switches Q1 to Q4 of the first bridge circuit 12, and controls the switching of the semiconductor switches Q1 to Q4, thereby controlling the output of the first bridge circuit 12.
The first control circuit 14 is connected to send the generated gate signal G1 to each of the semiconductor switches Q1 to Q4, and the current detector 15 is connected to send information about the detected direct current I to the first control circuit 14.
Then, the first control circuit 14 generates a gate signal G 1 based on the DC current I detected by the current detector 15 .

The resonant circuit 13 includes resonant reactors L1 and L2, series resonant capacitors C1 and C2, and a parallel resonant capacitor C3. The resonant reactors L1 and L2 and the parallel resonant capacitor C3 are connected in series, and the series resonant capacitors C1 and C2 and the receiving coil 11 are connected in parallel to the parallel resonant capacitor C3. The resonant circuit 13 compensates for leakage inductance of the transmitting coil 21 and the receiving coil 11, and has the effect of improving the power factor and efficiency. In addition, the resonant circuit 13 described in the present application becomes parallel resonant when the receiving coil 11 is removed, and has the effect of suppressing unintended excessive current.
The resonant circuit 13 is not limited to the one shown in the figure, and other connection configurations may be used.

Next, a description will be given of the power transmitting device 20. Descriptions of parts similar to those of the power receiving device 10 will be omitted as appropriate.
The power transmitting device 20 includes a power transmitting coil 21, a second bridge circuit 22, a smoothing capacitor C, and a resonant circuit 23. Two AC terminals of the second bridge circuit 22 are connected to both ends of the power transmitting coil 21 via the resonant circuit 23. The power transmitting device 20 also includes a second control circuit 24 that controls the output of the second bridge circuit 22.

The second bridge circuit 22 has a plurality of semiconductor switches S1 to S4 between the DC bus bars, converts the DC power of a smoothing capacitor C connected in parallel to the DC power source 2 into AC power, and outputs it to the transmitting coil 21 via a resonant circuit 23.
The semiconductor switches S1 to S4 are made of IGBTs with diodes connected in inverse parallel, or MOSFETs with diodes connected between the source and drain, etc. The diodes may be built into the semiconductor switches S1 to S4, or may be connected externally.

The second bridge circuit 22 is a full bridge circuit composed of two leg circuits SA and SB connected in parallel. The leg circuit SA is composed of semiconductor switches S1 and S2 connected in series, and the leg circuit SB is composed of semiconductor switches S3 and S4 connected in series.
The second bridge circuit 22 is not limited to a full-bridge configuration, and may be a half-bridge configuration or another configuration.

The second control circuit 24 generates a gate signal G2 to the semiconductor switches S1 to S4 of the second bridge circuit 22, and controls the switching of the semiconductor switches S1 to S4, thereby controlling the output of the second bridge circuit 22.
The second control circuit 24 is connected to send the generated gate signal G2 to each of the semiconductor switches S1 to S4.

The resonant circuit 23 is configured to include resonant reactors L1 and L2, series resonant capacitors C1 and C2, and a parallel resonant capacitor C3, similar to the resonant circuit 13 in the power receiving device 10. However, the configuration does not have to be the same as that of the resonant circuit 13 in the power receiving device 10.
As described above, the AC power output by the second bridge circuit 22 is supplied to the power transmitting coil 21 via the resonant circuit 23. The power transmitting coil 21 is magnetically coupled to the power receiving coil 11 via a magnetic field, thereby transmitting power between the power transmitting coil 21 and the power receiving coil 11 in a non-contact manner.

Next, a description will be given of the operation of the power conversion device 1. The power conversion device 1 allows for bidirectional power transmission, but in this case, power transmission from the power transmission device 20 to the power receiving device 10 will be described.
FIG. 2 is a waveform diagram showing an example of an output voltage of the second bridge circuit 22 in the power transmitting device 20 according to the first embodiment.
As shown in FIG. 2, the output voltage Vout of the second bridge circuit 22 is a square wave voltage in which a positive voltage VA and a negative voltage (−VA) appear alternately.
The gate signal G2, which is a PWM (pulse width modulation) signal generated by the second control circuit 24 and sent to each of the semiconductor switches S1 to S4, is input to a gate drive circuit (not shown) provided in each of the semiconductor switches S1 to S4. Each gate drive circuit drives the gate terminal of each of the semiconductor switches S1 to S4.

The output voltage Vout from the second bridge circuit 22 is input to the power transmission coil 21 via the resonant circuit 23. This causes an AC current to flow through the power transmission coil 21, generating a magnetic field around it. This magnetic field is linked to the power receiving coil 11 in the power receiving device 10, and an induced electromotive force is generated in the power receiving coil 11 by electromagnetic induction, causing the power receiving device 10 to receive power.

The first bridge circuit 12 in the power receiving device 10 turns on and off the semiconductor switches Q1 to Q4 to convert the received AC power into DC power and supply the DC power to the load 3. In this embodiment, the first control circuit 14 generates a PWM (pulse width modulation) signal, and based on a gate signal G1, the first control circuit 14 generates a PWM (pulse width modulation) signal, the first bridge circuit 12 turns on and off the semiconductor switches Q1 to Q4.
Even if all the semiconductor switches Q1 to Q4 are turned off and the first bridge circuit 12 functions as a diode bridge, the received AC power is rectified and DC power can be supplied to the load 3.

FIG. 3 is a waveform diagram of gate signals G1, G2 used in power conversion device 1 according to the first embodiment.
In the gate signal G1 to the first bridge circuit 12 in the power receiving device 10, the signals to the semiconductor switch elements Q1, Q2, Q3, and Q4 are simply indicated as Q1, Q2, Q3, and Q4 for convenience. In the gate signal G2 to the second bridge circuit 22 in the power transmitting device 20, the signals to the semiconductor switches S1, S2, S3, and S4 are simply indicated as S1, S2, S3, and S4 for convenience.
In the figure, the on/off of a gate signal, for example Q1, corresponds to the on/off of the semiconductor switch Q1.

3, in the second bridge circuit 22 in the power transmitting device 20, S1 and S4 alternate between being simultaneously on and off, and S2 and S3 alternate between being simultaneously on and off so that the on-off states of S1 and S4 are inverted. Each gate signal G2 (S1 to S4) switches between on and off at approximately 1/2 the switching period Ts.
The reason for making it almost 1/2 is to take into account the presence of dead time. In reality, it is not possible to make it exactly 1/2, and it is necessary to set the off period slightly longer than the on period, and this difference period is called dead time. In the embodiments of this application, the presence or absence of this dead time and the length of the dead time do not have any particular impact, so they will not be mentioned hereinafter.
The second bridge circuit 22 outputs a positive voltage VA as the output voltage Vout during a period when S1 and S4 are simultaneously turned on and S2 and S3 are simultaneously turned off, and outputs a negative voltage (-VA) as the output voltage Vout during a period when S1 and S4 are simultaneously turned off and S2 and S3 are simultaneously turned on (see Figure 2).

In the first bridge circuit 12 in the power receiving device 10, Q1 and Q4 alternate between being simultaneously on and off, and Q2 and Q3 alternate between being simultaneously on and off so that the on and off states of Q1 and Q4 are inverted. Each gate signal G1 (Q1 to Q4) switches between on and off at approximately 1/2 the switching period Tq.
The first control circuit 14 uses a switching period Tq that is set to be equal to the switching period Ts used by the second control circuit 24 .

As shown in Figure 3, the gate signal G1 (Q1 to Q4) of the first bridge circuit 12 has a phase difference θ with the gate signal G2 (S1 to S4) of the second bridge circuit 22. For example, the rising timing of Q1 and Q4 is delayed from the rising timing of the corresponding S1 and S4 by the phase difference θ. In this case, the phase difference θ indicates the delayed phase of the gate signal G2 (S1 to S4) from the gate signal G2 (S1 to S4), and the rightward direction in the figure is considered positive.

The power conversion device 1 can control the power transmitted from the power transmitting device 20 to the power receiving device 10 by changing the phase difference θ. The transmitted power is reduced by reducing the phase difference θ, and the transmitted power is increased by increasing the phase difference θ. This means that the impedance when the power receiving device 10 receives power can be changed by the phase difference θ.
Therefore, by changing the phase difference θ while keeping the output voltage Vout of the second bridge circuit 22 on the power transmitting device 20 side constant, the power transmitted to the power receiving device 10 side can be changed, thereby changing the power supplied to the load 3.

Fig. 4 is a waveform diagram of the gate signals G1, G2 used in the power conversion device 1 according to the embodiment 1, similar to Fig. 3. In this case, an example is shown in which the polarity of the phase difference θ is negative (to the left in the figure).
In this case, the power transmitted from the power transmitting device 20 to the power receiving device 10 becomes negative, that is, the power transmission direction is reversed and power is transmitted from the power receiving device 10 to the power transmitting device 20.

As described above, in the power conversion device 1, the phase difference θ between the gate signal G1 (Q1 to Q4) of the first bridge circuit 12 and the gate signal G2 (S1 to S4) of the second bridge circuit 22 can be changed to control the transmitted power.
As described above, the switching period Tq used in the first control circuit 14 is set to be equal to the switching period Ts used in the second control circuit 24. However, since the power transmitting device 20 and the power receiving device 10 are configured separately and are not electrically connected, it is difficult to completely match the actual switching period Tq with the switching period Ts. For this reason, the phase difference θ between the generated gate signal G1 (Q1 to Q4) and the gate signal G2 (S1 to S4) changes over time.
Such a change in the phase difference θ occurs even if the state of the load 3 or the DC power supply 2 is constant. Furthermore, the change occurs even if the settings related to the generation of the gate signals G1 and G2 remain constant.

5 and 6 are diagrams illustrating a change over time in the phase difference θ between the gate signal G2 of the power transmitting device 20 and the gate signal G1 of the power receiving device 10 according to the first embodiment. In this case, the description will be given using Q1 as the gate signal G1 and S1 as the gate signal G2.
As shown in FIG. 5, when the switching period Ts is smaller than the switching period Tq, the phase difference θ of Q1 based on S1 shifts to the right with the lapse of time and changes with an amount of change Δθ>0, that is, increases.
Also, as shown in FIG. 6, when the switching period Ts is greater than the switching period Tq, the phase difference θ of Q1 based on S1 shifts to the left with the lapse of time and changes with an amount of change Δθ<0, that is, decreases.

Such a change in the phase difference θ over time causes fluctuations in the transmitted power, but in this embodiment, the phase difference θ is controlled so as to be constant on a time average, thereby suppressing fluctuations in the transmitted power.
The control of the power receiving device 10 will be described in detail below.
The first control circuit 14 sets two different switching frequencies, a first frequency fq1 and a second frequency fq2 (>fq1), for use in switching control of the semiconductor switches Q1 to Q4 of the first bridge circuit 12.
In the power transmitting device 20, the second control circuit 24 controls the switching of the semiconductor switches S1 to S4 of the second bridge circuit 22 at a switching frequency fs (=1/Ts).

7 and 8 are diagrams illustrating the first and second frequencies used in the power conversion device 1 according to the first embodiment.
As shown in FIG. 7, the first frequency fq1 and the second frequency fq2 used in the first bridge circuit 12 are set to have a magnitude relationship (fq1<fs<fq2) such that the switching frequency fs used in the second bridge circuit 22 is located between them.

Specifically, for example, the first frequency fq1 and the second frequency fq2 are set as follows.
As shown in Fig. 8, the switching frequency fs used in the second bridge circuit 22 of the power transmitting device 20 is Fs(n), where n is the count number of the PWM timer of the microcomputer built into the first and second control circuits 14 and 24. Fs(n) is the frequency when the count number in the second control circuit 24 is n. Fq(n) is the frequency when the count number in the first control circuit 14 is n, and in this case, Fq(n) is slightly shifted toward the higher frequency side than Fs(n).
Then, the frequency Fq(n+1) in the first control circuit 14 when the count number is n+1 is set as the first frequency fq1, and the frequency Fq(n-1) in the first control circuit 14 when the count number is n-1 is set as the second frequency fq2.

In this way, the switching frequency is set using the count number of the PWM timer of the microcomputer built into the first and second control circuits 14, 24. For example, in the case of a microcomputer equipped with a clock with a frequency of 100 MHz, the count number of the PWM timer is set to 1000 to switch the semiconductor switch at a switching frequency of 100 kHz. In a clock with a frequency of 100 MHz, one clock is 10 ns, so 1000 counts correspond to 10 μs. One period of 10 μs is converted to a frequency of 100 kHz, and this state is expressed as Fs(1000)=100 kHz.
When the switching frequency fs used in the second bridge circuit 22 is Fs(1000), the first frequency fq1 and the second frequency fq2 used in the first bridge circuit 12 are set to Fq(1001) and Fq(999), respectively.

The count numbers are merely examples, and the first frequency fq1 and the second frequency fq2 may be a combination of Fq (1002) and Fq (998), respectively. The count numbers set on the second bridge circuit 22 side, in this case 1000, may be set as a reference, so long as one is a larger number and the other is a smaller number.
In addition, under the condition that fq1<fs (=Fs(n))<fq2 is satisfied, the first frequency fq1 and the second frequency fq2 can also be applied as a combination of Fq(n) and Fq(n-1), or as a combination of Fq(n+1) and Fq(n), etc.

The count number n or switching frequency fs used on the second bridge circuit 22 side is set in advance by notification via communication, etc., but the means for this is not particularly limited.

Using the two switching frequencies, the first frequency fq1 and the second frequency fq2 thus set, the first control circuit 14 controls the first bridge circuit 12. This control is a constant current control that keeps the DC current I output from the power receiving device 10 to the load 3 constant, and thereby controls the above-mentioned phase difference θ to be constant on a time average.
FIG. 9 is a diagram illustrating constant current control of the power conversion device 1 according to the first embodiment.
FIG. 10 is a control block diagram showing constant current control of the power conversion device 1 according to the first embodiment.

The first control circuit 14 calculates the time ratios α, (1-α) using the first frequency fq1 and the second frequency fq2 for each calculation period Tc. The time ratios α, (1-α) are 0<α<1, 0<(1-α)<1. The first control circuit 14 then divides the calculation period Tc by the calculated time ratios α, (1-α) to set the first period TA and the second period TB. For the first period TA and the second period TB, the first frequency fq1 and the second frequency fq2 are used as the switching frequencies to control the switching of the first bridge circuit 12.

In calculating the time ratios α and (1-α), the first control circuit 14 obtains information on the DC current I output to the load 3 from the current detector 15, calculates the time ratio α so as to reduce the rate of change of the DC current I, and then calculates the time ratio (1-α). This calculation is performed every calculation period Tc, and the calculated time ratios α and (1-α) are updated every calculation period Tc.

As shown in FIG. 9, the calculation period Tc is divided into a first period TA and a second period TB, and as the switching frequency, a first frequency fq1 is used in the first period TA, and a second frequency fq2 is used in the second period TB. The first period TA and the second period TB are set to periods αTc and (1-α)Tc based on the calculated time ratios α and (1-α). If the new time ratios α and (1-α) calculated in this period (the current calculation period) are set as time ratios αa and (1-αa) for the sake of convenience, then in the next calculation period, the first period TA and the second period TB are set to periods αa·Tc and (1-αa)·Tc.

The constant current control by the first control circuit 14 will be described below with reference to FIG.
The first bridge circuit 12 operates under switching control by a gate signal G1 generated by a gate signal generating circuit 14a in the first control circuit 14, and outputs a direct current I to the load 3. The first control circuit 14 acquires the value of the direct current I detected by the current detector 15, in this case, for each calculation cycle Tc via a low-pass filter 31. The output of the low-pass filter 31 is input to a circuit 32 that outputs a previous value. The circuit 32 is, for example, a memory circuit, and outputs the output Ilpf[n-1] of the low-pass filter 31 in the (n-1)th calculation cycle at the timing when the output Ilpf[n] of the low-pass filter 31 in the nth calculation cycle is input.

The subtractor 33 calculates the rate of change ΔI of the DC current I, which is the difference between the information Ilpf[n-1] of the DC current I in the previous calculation cycle and the information Ilpf[n] of the DC current I in the current calculation cycle, based on both the input and output values of the circuit 32.
The calculated rate of change ΔI of DC current I is subtracted from the rate of change command value ΔI* (=0) by a subtractor 34 to obtain a deviation. This deviation is then processed by an operator 35, which multiplies it by a constant, to calculate Δα. An integrator 36 integrates the input Δα to calculate a time ratio α, and the time ratio α is input to a gate signal generating circuit 14a in the first control circuit 14.

The gate signal generating circuit 14a sets a first period TA and a second period TB based on the time ratio α, and generates a gate signal G1 for each of the first and second periods TA and TB using the first frequency fq1 and the second frequency fq2, respectively, as the switching frequency.

As described above, the first control circuit 14 calculates the time ratio α, which is the manipulated variable, for each calculation period Tc so as to bring the rate of change ΔI of the DC current I closer to the rate of change command value ΔI* (=0), i.e., so as to reduce the rate of change ΔI, which is the controlled variable, as much as possible.

In a specific control operation, when the rate of change ΔI of the DC current I is positive, Δα<0, and in the next calculation period Tc, the time ratio α is reduced, the first period TA in which the first frequency fq1 is used as the switching frequency is shortened, and the second period TB in which the second frequency fq2 is used as the switching frequency is lengthened. Also, when the rate of change ΔI of the DC current I is negative, Δα>0, and in the next calculation period Tc, the time ratio α is increased, the first period TA in which the first frequency fq1 is used as the switching frequency is lengthened, and the second period TB in which the second frequency fq2 is used as the switching frequency is shortened. When the rate of change ΔI of the DC current I is 0, Δα=0, and the time ratio α does not change in the next calculation period Tc, and the lengths of the first period TA and the second period TB do not change.

Such control calculations can be implemented using, for example, P (proportional) control, PI (proportional integral) control, PD (proportional differential) control, or PID (proportional integral differential) control.
Alternatively, a permissible range may be set for the rate of change ΔI of DC current I, and the time ratio α may not be changed when the rate of change ΔI is within the range, and the time ratio α may be changed when the rate of change ΔI is outside the range.

11 is a diagram for explaining the operation of the constant current control of the power conversion device 1 according to the embodiment 1. For the sake of explanation, the time scale is changed and some extreme changes are shown.
11, in a period in which the first frequency fq1 is used as the switching frequency of the first bridge circuit 12, the phase difference θ between the gate signal G1 (Q1 to Q4) and the gate signal G2 (S1 to S4) of the second bridge circuit 22 in the power transmitting device 20 increases over time. This is because the switching frequency of the first bridge circuit 12, in this case the first frequency fq1, is lower than the switching frequency fs of the second bridge circuit 22.
As the phase difference θ increases, the DC current I also increases, and the power transmitted from the power transmitting device 20 to the power receiving device 10 also increases.

Furthermore, in a period in which the second frequency fq2 is used as the switching frequency of the first bridge circuit 12, the phase difference θ between the gate signal G1 (Q1 to Q4) and the gate signal G2 (S1 to S4) of the second bridge circuit 22 in the power transmitting device 20 decreases over time. This is because the switching frequency of the first bridge circuit 12, in this case the second frequency fq2, is higher than the switching frequency fs of the second bridge circuit 22.
As the phase difference θ decreases, the DC current I also decreases, and the power transmitted from the power transmitting device 20 to the power receiving device 10 also decreases.
In FIG. 11, only Q1 is shown as the gate signal G1, and only S1 is shown as the gate signal G2.

In this way, the DC current I increases during the period when the first frequency fq1 is used, and the DC current I decreases during the period when the second frequency fq2 is used. By adjusting the length of these periods, the increase and decrease in the DC current I can be balanced, and the DC current I can be controlled to a constant value.

FIG. 12 is a diagram showing a current waveform under constant current control of the power conversion device 1 according to the first embodiment.
As described above, the first control circuit 14 calculates the time ratio α for each calculation period Tc so as to reduce the rate of change ΔI of the DC current I as much as possible, that is, so as to keep the DC current I constant. Then, the first control circuit 14 updates the time ratio α for each calculation period Tc, and sets the first period TA and the second period TB by dividing the calculation period Tc by the time ratio α, (1-α).
12, in each calculation cycle Tc, the DC current I increases in a first period TA, and then decreases in a subsequent second period TB, so that the DC current I is controlled to a substantially constant value Ia. At this time, the above-mentioned phase difference θ is also controlled to a constant value on a time average.

As described above, in the power conversion device 1 according to this embodiment, the power receiving device 10 receives power by being provided with a power receiving coil 11 that receives and transmits power in a non-contact manner by magnetic coupling with the outside. The first control circuit 14, which controls the output of the first bridge circuit 12 of the power receiving device 10, controls the switching of the semiconductor switches Q1 to Q4 using the first and second frequencies fq1 and fq2, which are two different switching frequencies. The first control circuit 14 then calculates the time ratios α and (1-α) using the first and second frequencies fq1 and fq2 so as to reduce the rate of change ΔI of the direct current I for each calculation period Tc, and controls the first and second periods TA and TB, which are set by dividing the calculation period Tc by the time ratios α and (1-α), using the first and second frequencies fq1 and fq2, respectively.

In such a power conversion device 1, only the DC current I is detected and used for control, and zero-cross detection as in conventional technology is not required. Therefore, the power conversion device 1 that transmits power using contactless power supply technology can control the DC current I to a constant value without requiring a high-precision current sensor, enabling stable and high-precision output control. Since there is no problem with detection deviations in the zero-cross timing due to the magnitude of the current and voltage, it is particularly effective for application to high-power high-frequency signals.

When controlling the DC current I to be constant, information on the phase difference θ with the gate signal G2 (S1 to S4) on the power transmission device 20 side is not required, and the power conversion device according to the present application may be configured to omit the power transmission device 20.

Embodiment 2.
In the above-described first embodiment, the first control circuit 14 performs constant current control to keep the DC current I output to the load 3 constant, and calculates and updates the time ratio α for each calculation period Tc. Then, the calculation period Tc is divided by the time ratio α, and control is performed using the first and second frequencies fq1 and fq2, respectively. In this case, the DC current I is controlled to a roughly constant value Ia, but does not follow the command value I*.
In the second embodiment, the first control circuit 14 performs constant current control in the same manner as in the first embodiment, and adjusts the time ratio α so that the DC current I approaches the command value I*. The other configurations are the same as those in the first embodiment.

FIG. 13 is a control block diagram showing current control of the power conversion device 1 according to the second embodiment.
13, the first control circuit 14 performs constant current control for each calculation period Tc, similar to that of the first embodiment. That is, the value of the DC current I detected by the current detector 15 is obtained for each calculation period Tc via a low-pass filter 31, and the output Ilpf[n] of the low-pass filter 31 is input to a circuit 32 that outputs a previous value. At the timing of this input, the circuit 32 outputs the output Ilpf[n-1] of the low-pass filter 31 for the previous calculation period. A subtractor 33 calculates a rate of change ΔI of the DC current I based on both the input and output values of the circuit 32.

The calculated rate of change ΔI of the DC current I is subtracted from the rate of change command value ΔI* (=0) by subtractor 34 to obtain a deviation. This deviation is then processed by calculator 35, which multiplies it by a constant, to calculate Δα. The integrator 36 integrates the input Δα to calculate the time ratio α.

Furthermore, the first control circuit 14 acquires the value of the DC current I via a low-pass filter 31 at intervals different from the calculation cycle Tc, for example at least several times longer than the calculation cycle Tc, and calculates a current deviation ΔIx from the command value I* of the DC current I at a subtractor 37. This current deviation ΔIx is processed by an operator 38 that multiplies it by a constant, for example, to calculate a correction value Δαx for correcting the time ratio α.
The integrator 36 integrates the input Δα for each calculation period Tc to calculate the time ratio α, and also receives a correction value Δαx for each period longer than the calculation period Tc and integrates it in the same way as Δα, thereby correcting and adjusting the time ratio α. Then, the time ratio α is calculated for each calculation period Tc.

The time ratio α calculated by the integrator 36 is input to the gate signal generating circuit 14 a in the first control circuit 14 .
The gate signal generating circuit 14a sets a first period TA and a second period TB based on the time ratio α, and generates a gate signal G1 for each of the first and second periods TA and TB using the first frequency fq1 and the second frequency fq2 as the switching frequencies, respectively.

Note that the command value tracking control, in which the DC current I tracks the command value I*, is performed in addition to the constant current control, and adjusts the time ratio α obtained by the constant current control.
In a specific control operation, when the current deviation ΔIx of the DC current I from the command value I* is positive, the correction value Δαx>0. As a result, in the next calculation cycle Tc, the time ratio α is adjusted in the increasing direction, the first period TA in which the first frequency fq1 is used as the switching frequency is adjusted to be longer, and the second period TB in which the second frequency fq2 is used as the switching frequency is adjusted to be shorter.

Moreover, when the current deviation ΔIx is negative, the correction value Δαx<0. As a result, in the next calculation cycle Tc, the time ratio α is adjusted downward, the first period TA in which the first frequency fq1 is used as the switching frequency is adjusted to be shorter, and the second period TB in which the second frequency fq2 is used as the switching frequency is adjusted to be longer.
When the current deviation ΔIx is 0, the correction value Δαx=0, the time ratio α is not adjusted, and the lengths of the first period TA and the second period TB are not adjusted.

Such control calculations can be performed using, for example, P (proportional) control, PI (proportional integral) control, PD (proportional differential) control, or PID (proportional integral differential) control.
Alternatively, a permissible range may be set for the DC current I, and the correction value Δαx may not be changed when the DC current I is within the range, and the correction value Δαx may be changed when the DC current I is outside the range.

14 and 15 are diagrams showing current waveforms by current control of the power conversion device 1 according to embodiment 2. Fig. 14 shows a case where the DC current I is lower than the command value I*, and Fig. 15 shows a case where the DC current I is higher than the command value I*.
As described above, the first control circuit 14 performs constant current control so that the DC current I is constant, while performing command value tracking control so that the DC current I approaches the command value I*.
The first control circuit 14 calculates and updates the time ratio α for each calculation period Tc, and divides the calculation period Tc by the time ratio α (1-α) to set a first period TA and a second period TB. As shown in Figures 14 and 15, the DC current I increases in the first period TA, and decreases in the following second period TB.

When the DC current I is lower than the command value I*, a positive correction value Δαx is calculated by command value tracking control that brings the DC current I closer to the command value I*, and the time ratio α calculated by constant current control is adjusted to increase. As a result, as shown in Fig. 14, the first period TA during which the DC current I increases is adjusted to be longer, and the second period TB during which the DC current I decreases is adjusted to be shorter, so that the DC current I increases on average while alternately increasing and decreasing, and gradually approaches the command value I*.
In this case, the phase difference θ between the gate signal G1 (Q1 to Q4) of the first bridge circuit 12 and the gate signal G2 (S1 to S4) of the second bridge circuit 22 in the power transmission device 20 is controlled to increase on time average.

When the DC current I is higher than the command value I*, a negative correction value Δαx is calculated by command value tracking control that brings the DC current I closer to the command value I*, and the time ratio α calculated by the constant current control is adjusted to decrease. As a result, as shown in Fig. 15, the first period TA during which the DC current I increases is adjusted to be shorter, and the second period TB during which the DC current I decreases is adjusted to be longer, so that the DC current I decreases on average while alternately increasing and decreasing, and gradually approaches the command value I*.
In this case, the phase difference θ between the gate signal G1 (Q1 to Q4) and the gate signal G2 (S1 to S4) is controlled so as to decrease on time average.

As described above, in this second embodiment, similarly to the first embodiment, the first control circuit 14 calculates the time ratios α, (1-α) using the first and second frequencies fq1, fq2, which are two different switching frequencies, so as to reduce the rate of change ΔI of the DC current I for each calculation period Tc. Furthermore, the first control circuit 14 adjusts the time ratios α, (1-α) so that the DC current I approaches the command value I*. Then, the first and second periods TA, TB, which are set by dividing the calculation period Tc by the calculated time ratios α, (1-α), are controlled using the first and second frequencies fq1, fq2, respectively.
Therefore, as in the above-mentioned embodiment 1, it is possible to control the DC current I to a constant value while making it follow the command value I* without requiring a high-precision current sensor, thereby enabling more stable and highly accurate output control.

In addition, the first control circuit 14 adjusts the time ratio α by calculating the correction value Δαx that corrects the time ratio α for each period longer than the calculation period Tc, so that the constant current control that keeps the DC current I constant and the command value tracking control that makes the DC current I follow the command value I* can be reliably achieved without interfering with each other. It is desirable for the period for calculating the correction value Δαx to be significantly longer than the calculation period Tc by several times or more.

In the above embodiment 2, the first control circuit 14 performs constant current control of the DC current I while simultaneously performing command value tracking control. However, the two types of control may be switched between, as will be described below with reference to the drawings.
Fig. 16 is a flowchart showing current control in a power conversion device according to another example of embodiment 2. Fig. 17 is a control block diagram showing current control in a power conversion device according to another example of embodiment 2.

As shown in FIG. 16, the first control circuit 14 first periodically determines whether the DC current I is within a target range (step S1), and if the DC current I is within the target range, performs constant current control of the DC current I (step S2).
In step S1, if the DC current I falls outside the target range, the first control circuit 14 stops the constant current control of the DC current I and performs command value tracking control of the DC current I until the DC current I reaches within the target range (step S3).
The target range of the DC current I includes the command value I* of the DC current I, and is set with a predetermined width above and below the command value I*.

When switching between the two types of control in this way, as shown in FIG. 17, the first control circuit 14 independently performs constant current control of the DC current I and command value tracking control of the DC current I.
In the constant current control of the DC current I, the constant current control similar to that shown in Fig. 10 in the above-mentioned embodiment 1 is performed for each calculation period Tc. That is, the value of the DC current I detected by the current detector 15 is obtained for each calculation period Tc via the low-pass filter 31, and the rate of change ΔI of the DC current I is calculated. Δα is calculated so that the calculated rate of change ΔI of the DC current I approaches the rate of change command value ΔI* (=0), and an integrator 36 integrates Δα to calculate a time ratio α.
The time ratio α calculated by the integrator 36 is input to the gate signal generating circuit 14 a in the first control circuit 14 .

The gate signal generating circuit 14a sets the first period TA and the second period TB based on the time ratio α, and generates the gate signal G1 for each of the first and second periods TA and TB using the first frequency fq1 and the second frequency fq2 as the switching frequency, respectively. The output of the first bridge circuit 12 is controlled by the gate signal G1.

In the command value tracking control of the DC current I, the first control circuit 14 acquires information on the DC current I via the low-pass filter 31 for each calculation period Tc, and calculates a current deviation ΔIx from the command value I* of the DC current I in a subtractor 37. This current deviation ΔIx is arithmetically processed in a calculator 38 that multiplies it by a constant, for example, to calculate a correction value Δαx for correcting the time ratio α.
The integrator 36 integrates the input correction value Δαx for each calculation period Tc to calculate the time ratio α. The time ratio α calculated by the integrator 36 is input to the gate signal generation circuit 14a in the first control circuit 14.

As in the case of the constant current control described above, the gate signal generating circuit 14a sets the first period TA and the second period TB based on the time ratio α, and generates the gate signal G1 for each of the first and second periods TA and TB using the first frequency fq1 and the second frequency fq2 as the switching frequency, respectively. The output of the first bridge circuit 12 is controlled by the gate signal G1.

When switching between the two types of control in this manner, as in embodiment 2 above, it is possible to control the DC current I to a constant value while also having it follow the command value I* without the need for a high-precision current sensor, thereby enabling more stable and highly accurate output control.

Embodiment 3.
In the above-described first embodiment, the first bridge circuit 12 in the power receiving device 10 and the second bridge circuit 22 in the power transmitting device 20 are output-controlled by gate signals G1 and G2 that alternately switch the diagonal semiconductor switches (Q1, Q4), (Q2, Q3), (S1, S4), and (S2, S3) between simultaneous on and off.
In this third embodiment, the first and second bridge circuits 12, 22 are full bridge circuits, and the outputs of the first and second bridge circuits 12, 22 are controlled by phase shift control that increases or decreases the switching phase difference between the two leg circuits (QA, QB) and (SA, SB) in the first and second bridge circuits 12, 22.

FIG. 18 is a waveform diagram showing the gate signal G2 and the output voltage of the second bridge circuit 22 used in the power transmitting device 20 according to the third embodiment.
As shown in FIG. 18, in the second bridge circuit 22 in the power transmitting device 20, each gate signal G2 (S1 to S4) switches between on and off at approximately ½ of the switching period Ts.
Of the gate signals G2 (S1 to S4), the on/off states of the two gate signals (S1, S2) and (S3, S4) to the leg circuits SA and SB are inverted. Also, the gate signals (S3, S4) to the leg circuit SB have a phase difference Φs with the gate signal (S1, S2) to the leg circuit SA. For example, the rising timing of S3 and S4 lags behind the rising timing of the diagonally opposite signals S2 and S1 by a phase difference Φs.

The second bridge circuit 22 outputs a positive voltage VA as the output voltage Vout during the period when S1 and S4 are simultaneously on, and outputs a negative voltage (-VA) as the output voltage Vout during the period when S2 and S3 are simultaneously on. The output voltage Vout is a square wave voltage in which positive and negative voltage pulses appear alternately. By changing the phase difference Φs, the width of the voltage pulses in the output voltage Vout also changes, and the transmitted power from the power transmitting device 20 can also be controlled.

19 is a waveform diagram of the gate signals G1, G2 used in the power conversion device 1 according to the embodiment 3. The gate signal G2 (S1 to S4) used in the power transmission device 20 is the one shown in FIG.
In the first bridge circuit 12 in the power receiving device 10, each gate signal G1 (Q1 to Q4) switches between on and off at approximately half the switching period Tq.
Of the gate signals G1 (Q1 to Q4), the two gate signals (Q1, Q2) and (Q3, Q4) to leg circuits QA and QB are inverted on and off. The gate signal (Q3, Q4) to leg circuit QB has a phase difference Φq with the gate signal (Q1, Q2) to leg circuit QA. For example, the rising timing of Q3 and Q4 lags behind the rising timing of diagonally opposite Q2 and Q1 by a phase difference Φq.

In addition, the gate signal G1 (Q1 to Q4) of the first bridge circuit 12 has a phase difference θ with the gate signal G2 (S1 to S4) of the second bridge circuit 22. The rising timing of Q1 and Q2 is delayed from the rising timing of the corresponding S1 and S2 by the phase difference θ. In this case, the phase difference θ indicates the delayed phase of the gate signal G1 (Q1 to Q4) from the gate signal G2 (S1 to S4), and the rightward direction in the figure is considered positive.

In the power receiving device 10, the phase difference Φq between the gate signal (Q3, Q4) to the leg circuit QB and the gate signal (Q1, Q2) to the leg circuit QA can be changed to control the transmitted power from the power transmitting device 20 to the power receiving device 10.
Furthermore, as described in the above embodiment 1, by changing the phase difference θ between the gate signal G1 (Q1 to Q4) of the first bridge circuit 12 and the gate signal G2 (S1 to S4) of the second bridge circuit 22, it is possible to control the transmitted power from the power transmitting device 20 side to the power receiving device 10 side.

The above phase difference θ and the phase differences Φq, Φs of the phase shift control in each of the first and second bridge circuits 12, 22 can be changed independently, and the transmitted power can be controlled independently.

In this embodiment, as in the above-described first embodiment, the first control circuit 14, which controls the output of the first bridge circuit 12 of the power receiving device 10, controls the switching of the semiconductor switches Q1 to Q4 using first and second frequencies fq1 and fq2, which are two different switching frequencies. The first control circuit 14 calculates the time ratios α and (1-α) using the first and second frequencies fq1 and fq2 so as to reduce the rate of change ΔI of the DC current I for each calculation period Tc, and controls the first and second periods TA and TB, which are set by dividing the calculation period Tc by the time ratios α and (1-α), using the first and second frequencies fq1 and fq2, respectively.
In this embodiment as well, the same effects as those of the first embodiment can be obtained, and since phase shift control is also used, more precise output control is possible.

In addition, by applying the above-mentioned embodiment 2, the first control circuit 14 may perform command value tracking control in addition to constant current control of the DC current I.

Embodiment 4.
In this embodiment 4, as shown in the above embodiment 3, the first and second bridge circuits 12, 22 are output-controlled by phase shift control, and further, the first control circuit 14 performs command value tracking control within the phase shift control, in addition to constant current control of the DC current I.
10 in the first embodiment, the constant current control is performed to reduce the rate of change ΔI of the DC current I. That is, the time ratio α of the first and second periods TA, TB using the first and second frequencies fq1, fq2 is calculated and updated for each calculation period Tc.

For command value tracking control, the phase difference Φq, which is the amount of phase shift in the phase shift control of the first bridge circuit 12, is adjusted. That is, the phase difference Φq between the gate signal (Q3, Q4) to the leg circuit QB and the gate signal (Q1, Q2) to the leg circuit QA is adjusted so that the DC current I tracks the command value I*. In this case, the first control circuit 14 calculates a correction value for correcting the phase difference Φq every period longer than the calculation period Tc, for example, every period longer than several times the calculation period Tc, to correct the phase difference Φq.
In this way, the first control circuit 14 simultaneously performs both the constant current control and the command value tracking control of the DC current I, and the DC current I follows the command value I* while alternately increasing and decreasing. Note that, since the cycle for performing the command value tracking control and the calculation cycle Tc of the constant current control are significantly different, the two types of control can be performed reliably without interfering with each other.

In the fourth embodiment, the first control circuit 14 performs constant current control of the DC current I while simultaneously performing command value tracking control. However, the first control circuit 14 may switch between the two types of control.
FIG. 20 is a flowchart showing current control of the power conversion device 1 according to another example of the fourth embodiment.
As shown in FIG. 20, the first control circuit 14 first periodically determines whether the DC current I is within a target range (step SS1), and if the DC current I is within the target range, calculates the time ratio α for each calculation period Tc to perform constant current control of the DC current I (step SS2).

In step SS1, if the DC current I falls outside the target range, the first control circuit 14 stops the constant current control of the DC current I and performs command value tracking control of the DC current I. This control increases or decreases the phase difference Φq so that the DC current I follows the command value I*, and continues until the DC current I reaches within the target range (step SS3).
The target range of the DC current I includes the command value I* of the DC current I, and is set with a predetermined width above and below the command value I*.

In this embodiment, the same effects as in the first embodiment can be obtained, and by utilizing phase shift control, the first control circuit 14 uses command value tracking control in addition to constant current control of the DC current I, making it possible to achieve more precise output control.

Embodiment 5.
In the fifth embodiment, a power conversion device including a communication means between a power receiving device 10 and a power transmitting device 20 will be described.
21 is a configuration diagram showing a power conversion device according to embodiment 5. Descriptions of the same parts as those in embodiment 1 above will be omitted as appropriate.
21 , the power conversion device 1A includes a power receiving device 10 connected to a load 3 and a power transmitting device 20 connected to a DC power source 2. The power receiving device 10 includes a power receiving coil 11, a first bridge circuit 12, a resonant circuit 13, a first control circuit 14, and a current detector 15. The power transmitting device 20 includes a power transmitting coil 21, a second bridge circuit 22, a smoothing capacitor C, a resonant circuit 23, and a second control circuit 24.

In addition, the power receiving device 10 includes a transmitter 41, and the power transmitting device 20 includes a receiver 42. The first control circuit 14 in the power receiving device 10 transmits information on the direct current I acquired from the current detector 15 from the transmitter 41 to the receiver 42 in the power transmitting device 20. The second control circuit 24 in the power transmitting device 20 acquires the information on the direct current I received by the receiver 42.

In this embodiment 5, as shown in the above embodiment 3, the outputs of the first and second bridge circuits 12, 22 are controlled by phase shift control, and further, the first control circuit 14 performs constant current control of the DC current I. In addition, the second control circuit 24 that controls the second bridge circuit 22 performs command value tracking control of the DC current I.
10 in the first embodiment, the constant current control is performed to reduce the rate of change ΔI of the DC current I. That is, the time ratio α of the first and second periods TA, TB using the first and second frequencies fq1, fq2 is calculated and updated for each calculation period Tc.

For command value tracking control, the second control circuit 24 adjusts the phase difference Φs, which is the amount of phase shift when controlling the phase shift of the second bridge circuit 22. The second control circuit 24 acquires information on the DC current I from the power receiving device 10 side through communication, and adjusts the phase difference Φs between the gate signal (S3, S4) to the leg circuit SB and the gate signal (S1, S2) to the leg circuit SA so that the DC current I follows the command value I*. In this case, the second control circuit 24 calculates a correction value for correcting the phase difference Φs every period longer than the calculation period Tc of the first control circuit 14, for example, every period that is significantly longer than the calculation period Tc by several times or more, to correct the phase difference Φs.

In this way, in the power conversion device 1A, both constant current control of the DC current I by the first control circuit 14 and command value tracking control of the DC current I by the second control circuit 24 are performed simultaneously, and the DC current I tracks the command value I* while alternately increasing and decreasing.
In addition, since the cycle in which the command value tracking control is performed and the calculation cycle Tc of the constant current control are significantly different, the two types of control do not interfere with each other and can be performed reliably.

In the above fifth embodiment, the case has been described in which the constant current control of the DC current I is performed while the command value tracking control is simultaneously performed, but the two types of control may be switched between.
FIG. 22 is a flowchart showing current control of the power conversion device 1A according to another example of the fifth embodiment.
As shown in FIG. 22, the first control circuit 14 first periodically determines whether the DC current I is within a target range (step ST1), and if the DC current I is within the target range, calculates the time ratio α for each calculation period Tc to perform constant current control of the DC current I (step ST2).

In step ST1, if the DC current I falls outside the target range, the first control circuit 14 stops the constant current control of the DC current I, and the second control circuit 24, which controls the output of the second bridge circuit 22, performs command value tracking control of the DC current I. This control increases or decreases the phase difference Φs in the phase shift control of the second bridge circuit 22 so that the DC current I follows the command value I*, and continues until the DC current I reaches within the target range (step ST3).
The target range of the DC current I includes the command value I* of the DC current I, and is set with a predetermined width above and below the command value I*.

In this embodiment, the same effects as those of the above-mentioned embodiment 1 can be obtained, and in addition to the first control circuit 14 performing constant current control of the DC current I, the second control circuit 24 performs command value tracking control of the DC current I, making it possible to achieve more precise output control.

In the above embodiment 5, the power conversion device 1A is shown to have a transmitter 41 and a receiver 42 and to communicate wirelessly, but the configuration of the communication means is not limited to this, and it is sufficient if information on the direct current I can be obtained on the power transmission device 20 side.

Although the present application describes various exemplary embodiments and examples, the various features, aspects, and functions described in one or more embodiments are not limited to application to a particular embodiment, but may be applied to the embodiments alone or in various combinations.
Therefore, countless modifications not illustrated are conceivable within the scope of the technology disclosed in the present application, including, for example, modifying, adding, or omitting at least one component, and further, extracting at least one component and combining it with a component of another embodiment.

1, 1A power conversion device, 11 receiving coil, 12 first bridge circuit, 14 first control circuit, 15 current detector, 21 transmitting coil, 22 second bridge circuit, 24 second control circuit, fq1 first frequency, fq2 second frequency, fs switching frequency, G1, G2 gate signal, I DC current, ΔI rate of change, I* command value, Q1 to Q4, S1 to S4 semiconductor switches, QA, QB leg circuit, SA, SB leg circuit, Tc calculation period, TA first period, TB second period, α time ratio, Δαx correction value, θ phase difference, Φs, Φq phase difference.

Claims (14)

a first coil that receives and transmits electric power in a non-contact manner by magnetic coupling with an external device;
a first bridge circuit having a plurality of semiconductor switches between DC buses for AC-DC power conversion, the first bridge circuit having an AC side connected to the first coil;
a current detector for detecting a DC current flowing through a DC side of the first bridge circuit;
a first control circuit that controls the first bridge circuit,
The first control circuit is
Controlling switching of the plurality of semiconductor switches using first and second frequencies that are different from each other;
calculating a time ratio for using the first and second frequencies in each calculation period so as to reduce a rate of change of the DC current;
a first period and a second period set by dividing the calculation cycle by the time ratio are controlled using the first frequency and the second frequency, respectively;
Power conversion equipment. the first control circuit uses the time ratio calculated in the current calculation cycle in the next calculation cycle to set the first and second periods;
The power conversion device according to claim 1 . The first control circuit adjusts the time ratio so that the DC current approaches a command value.
The power conversion device according to claim 1 or 2. the first control circuit calculates a correction value for correcting the time ratio for each period longer than the calculation period to adjust the time ratio.
The power conversion device according to claim 3 . the first control circuit switches between a control of calculating the time ratio so as to reduce a rate of change of the DC current and a control of adjusting the time ratio so that the DC current approaches the command value, based on whether the DC current falls within a target range including the command value.
The power conversion device according to claim 3 . The first bridge circuit is composed of two leg circuits connected in parallel,
the first control circuit controls the switching of the semiconductor switches in the two leg circuits by a phase shift control for increasing or decreasing a phase difference, and adjusts the phase difference so that the DC current approaches a command value.
The power conversion device according to claim 1 or 2. the first control circuit calculates a correction value for correcting the phase difference for each period longer than the calculation period to adjust the phase difference.
The power converter according to claim 6. the first control circuit switches between a control of calculating the time ratio so as to reduce a rate of change of the DC current and a control of adjusting the phase difference so that the DC current approaches the command value, based on whether the DC current falls within a target range including the command value.
The power converter according to claim 6. a second coil that is magnetically coupled to the first coil in a non-contact manner and that exchanges electric power with the first coil;
a second bridge circuit having a plurality of semiconductor switches between the DC bus bars for AC-DC power conversion, the second bridge circuit having an AC side connected to the second coil;
a second control circuit that controls the second bridge circuit,
the second control circuit controls switching of the plurality of semiconductor switches in the second bridge circuit by using a switching frequency between the two switching frequencies used in the first bridge circuit;
The power conversion device according to any one of claims 1 to 8. The time ratio is calculated so that a time average phase difference between a gate signal for controlling switching of the first bridge circuit and a gate signal for controlling switching of the second bridge circuit converges to a constant value.
The power converter according to claim 9. The second bridge circuit is composed of two leg circuits connected in parallel,
the second control circuit controls switching of the semiconductor switches in the two leg circuits of the second bridge circuit by phase shift control for increasing or decreasing a phase difference;
The power conversion device according to claim 9 or 10. a second coil that is magnetically coupled to the first coil in a non-contact manner and that exchanges electric power with the first coil;
a second bridge circuit in which two leg circuits, each having a semiconductor switch, are connected in parallel to perform power conversion between AC and DC, the AC side of which is connected to the second coil;
a second control circuit that controls the second bridge circuit,
The second control circuit is
performing switching control of the semiconductor switches in the two leg circuits of the second bridge circuit by phase shift control for increasing or decreasing a phase difference, using a switching frequency between the two switching frequencies used in the first bridge circuit;
acquiring a value of the DC current flowing through the DC side of the first bridge circuit, and adjusting the phase difference so that the DC current approaches a command value;
The power conversion device according to claim 1 or 2. the second control circuit calculates a correction value for correcting the phase difference and adjusts the phase difference for each period longer than the calculation period of the first control circuit.
The power converter according to claim 12. a control by the first control circuit for calculating the time ratio so as to reduce a rate of change of the DC current and a control by the second control circuit for adjusting the phase difference so that the DC current approaches the command value are switched based on whether the DC current falls within a target range including the command value.
The power converter according to claim 12.

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