JP7619013B2 - Electro-optical device, manufacturing method thereof, and electronic device - Google Patents

Description

The present invention relates to an electro-optical device, a method for manufacturing an electro-optical device, and electronic equipment.

Electronic devices such as projectors use devices such as liquid crystal displays that can change the optical characteristics of each pixel.

The device described in Patent Document 1 has a lower layer wiring, an interlayer insulating film covering the lower layer wiring, a middle layer wiring formed on the interlayer insulating film, and a plug connecting the lower layer wiring and the middle layer wiring. The plug is formed to fill a through hole formed in the interlayer insulating film. This makes it highly likely that a cavity will be formed inside the plug, and a recess will be formed on the surface of the plug.

JP 2001-237312 A

If there is a step due to a recess on the surface of the plug, it may have a negative effect on the wiring on the plug. This may result in poor film formation of the wiring and poor connection between the wiring and the plug, resulting in a decrease in display quality.

One aspect of the electro-optical device of the present invention comprises a first conductive portion, a second conductive portion, an insulating film arranged between the first conductive portion and the second conductive portion and having a contact hole, a first plug arranged in the contact hole and electrically connecting the first conductive portion and the second conductive portion, having a recess formed by a portion formed along a side of the contact hole contacting the second conductive portion on the side opposite the first conductive portion in the contact hole , a portion of the portion formed along the side of the contact hole contacting the second conductive portion, a buried portion that fills the recess , and a second plug that contacts another portion of the portion of the first plug formed along the side of the contact hole and is arranged to contact the second conductive portion and the buried portion.

One aspect of a manufacturing method for an electro-optical device of the present invention includes the steps of: forming a first conductive portion; forming an insulating film on the first conductive portion; forming a contact hole in the insulating film; forming a first plug formed along a side surface of the contact hole and having a recess provided on a second conductive portion side opposite the first conductive portion side in the contact hole; forming a buried portion in the recess; forming a second conductive portion on the insulating film, the second conductive portion contacting a part of a portion of the first plug formed along the side surface of the contact hole on the side opposite the first conductive portion side in the contact hole and electrically connecting to the first conductive portion via the first plug; and forming a second plug contacting another part of the portion of the first plug formed along the side surface of the contact hole and contacting the second conductive portion and the buried portion.
Includes.

One aspect of the electronic device of the present invention includes the electro-optical device described above and a control unit that controls the operation of the electro-optical device.

1 is a plan view of an electro-optical device according to a first embodiment. 2 is a cross-sectional view of the electro-optical device shown in FIG. 1 taken along line AA. 2 is an equivalent circuit diagram showing an electrical configuration of a first substrate in FIG. 1 . FIG. 3 is a cross-sectional view illustrating a schematic view of a first substrate in FIG. 2 . 5 is a cross-sectional view showing the contact portion shown in FIG. 4. 5 is a cross-sectional view showing another contact portion shown in FIG. 4. 5A to 5C are diagrams illustrating a flow of a manufacturing method for the electro-optical device according to the first embodiment. 1A to 1C are views for explaining a plug forming step. 1A to 1C are views for explaining a plug forming step. 11A to 11C are diagrams for explaining a buried portion forming step. 11A to 11C are diagrams for explaining a buried portion forming step. FIG. 11 is a cross-sectional view showing a buried portion in a second embodiment. 11A to 11C are views for explaining a buried portion forming step and a second conductive portion forming step. FIG. 1 is a perspective view showing a personal computer as an example of an electronic device. FIG. 1 is a plan view showing a smartphone as an example of an electronic device. FIG. 1 is a schematic diagram illustrating a projector as an example of an electronic device.

Below, preferred embodiments of the present invention will be described with reference to the attached drawings. Note that the dimensions or scale of each part in the drawings may differ from the actual dimensions, and some parts are shown diagrammatically to facilitate understanding. Furthermore, the scope of the present invention is not limited to these forms unless otherwise specified in the following description to the effect that the present invention is limited thereto.

1. Electro-optical device 1A. First embodiment 1Aa. Basic configuration FIG. 1 is a plan view of an electro-optical device 100 according to a first embodiment. FIG. 2 is a cross-sectional view of the electro-optical device 100 shown in FIG. 1 taken along line A-A. In FIG. 1, the second substrate 3 is omitted. In addition, for convenience of explanation, the following description will be given using the mutually orthogonal X-axis, Y-axis, and Z-axis as appropriate. In addition, one direction along the X-axis is denoted as the X1 direction, and the direction opposite to the X1 direction is denoted as the X2 direction. Similarly, one direction along the Y-axis is denoted as the Y1 direction, and the direction opposite to the Y1 direction is denoted as the Y2 direction. One direction along the Z-axis is denoted as the Z1 direction, and the direction opposite to the Z1 direction is denoted as the Z2 direction. In addition, in the following description, viewing in the Z1 direction or Z2 direction is referred to as "planar view."

The electro-optical device 100 shown in Figures 1 and 2 is a transmissive liquid crystal device of an active matrix driving system. As shown in Figure 2, the electro-optical device 100 has a first substrate 2 having translucency, a second substrate 3 having translucency, a frame-shaped sealing member 4, and a liquid crystal layer 5. The first substrate 2, the liquid crystal layer 5, and the second substrate 3 are arranged in this order in the Z1 direction. The shape of the electro-optical device 100 shown in Figure 1 in a plan view is rectangular, but it may be circular, for example. Note that "translucency" means transparency to visible light, and preferably means that the transmittance of visible light is 50% or more.

The first substrate 2 shown in FIG. 2 is a light-transmitting element substrate having a plurality of TFTs (Thin Film Transistors) to be described later. The first substrate 2 has a first base 21, a wiring section 20, a plurality of pixel electrodes 24, and a first alignment film 29, which are arranged in this order toward the liquid crystal layer 5. The first base 21 is composed of a flat plate having light-transmitting and insulating properties. The first base 21 is formed of, for example, glass or quartz. The wiring section 20 includes a plurality of electrodes and a plurality of wirings. The plurality of pixel electrodes 24 are electrodes for applying an electric field to the liquid crystal layer 5. Each pixel electrode 24 is composed of a transparent conductive material such as ITO (Indium Tin Oxide) or IZO (Indium Zinc Oxide). The first alignment film 29 aligns the liquid crystal molecules of the liquid crystal layer 5. Examples of materials for the first alignment film 29 include polyimide and silicon oxide. Although not shown, the first substrate 2 has a number of dummy pixel electrodes that surround the pixel electrodes 24 in a plan view. The first substrate 2 will be described in detail later.

The second substrate 3 is a translucent opposing substrate disposed opposite the first substrate 2. The second substrate 3 has a second base 31, an insulating film 32, a common electrode 33, and a second alignment film 34, which are disposed in this order toward the liquid crystal layer 5. The second base 31 is composed of a flat plate having translucency and insulation. The second base 31 is formed of, for example, glass or quartz. The insulating film 32 is formed of, for example, a silicon-based inorganic material having translucency and insulation, such as silicon oxide. The common electrode 33 is an opposing electrode disposed with respect to the plurality of pixel electrodes 24 via the liquid crystal layer 5. The common electrode 33 is an electrode for applying an electric field to the liquid crystal layer 5. The common electrode 33 is formed of, for example, a transparent conductive material such as ITO or IZO. The second alignment film 34 aligns the liquid crystal molecules of the liquid crystal layer 5. Examples of materials constituting the second alignment film 34 include polyimide and silicon oxide.

Although not shown, the second substrate 3 has a light-shielding partition that surrounds the multiple pixel electrodes 24 in a plan view. "Light-shielding" means light-shielding properties against visible light, and preferably means that the visible light transmittance is less than 50%, and more preferably 10% or less.

The sealing member 4 is disposed between the first substrate 2 and the second substrate 3. The sealing member 4 is formed of an adhesive containing various curable resins such as epoxy resin. The sealing member 4 contains a gap material made of an inorganic material such as glass in order to control the distance between the first substrate 2 and the second substrate 3. The distance between the first substrate 2 and the second substrate 3 may be controlled by disposing a spacer that is a separate material from the sealing member 4.

The liquid crystal layer 5 is disposed within the region surrounded by the first substrate 2, the second substrate 3, and the sealing member 4. The liquid crystal layer 5 is disposed between the first substrate 2 and the second substrate 3, and is an electro-optical layer whose optical properties change in response to an electric field. The liquid crystal layer 5 contains liquid crystal molecules with positive or negative dielectric anisotropy. The orientation of the liquid crystal molecules changes in response to the voltage applied to the liquid crystal layer 5.

As shown in FIG. 1, a plurality of scanning line driving circuits 11, a signal line driving circuit 12, and a plurality of external terminals 13 are arranged on the first substrate 2. Some of the plurality of external terminals 13 are connected to wiring (not shown) drawn from the scanning line driving circuit 11 or the signal line driving circuit 12. The plurality of external terminals 13 also include a terminal to which a common potential is applied. This terminal is electrically connected to the common electrode 33 of the second substrate 3 via wiring and conductive material (not shown).

The electro-optical device 100 has a display area A10 that displays an image, and a peripheral area A20 that is located outside the display area A10 in a planar view. A plurality of pixels P arranged in a matrix are provided in the display area A10. A plurality of pixel electrodes 24 are arranged in a one-to-one relationship for the plurality of pixels P. The aforementioned common electrode 33 is provided in common to the plurality of pixels P. The peripheral area A20 also surrounds the display area A10 in a planar view. A scanning line driving circuit 11 and a signal line driving circuit 12 are arranged in the peripheral area A20. Although not shown, the peripheral area A20 also includes a dummy pixel area in which a plurality of dummy pixel electrodes are arranged.

In this embodiment, the electro-optical device 100 is a transmissive type. In this embodiment, the light incident on the second substrate 3 is modulated while it is being emitted from the first substrate 2, thereby displaying an image. Note that the light incident on the first substrate 2 may be modulated while it is being emitted from the second substrate 3, thereby displaying an image. The electro-optical device 100 may also be a reflective type. In this case, for example, the common electrode 33 has translucency, and the pixel electrode 24 has reflectivity. In the case of the reflective type, the light incident on the second substrate 3 is reflected by the pixel electrode 24, and is modulated while it is being emitted from the second substrate 3 again, thereby displaying an image. Furthermore, in the case of the reflective type, the first substrate 2 does not need to have translucency, and may be, for example, a silicon substrate into which elements, etc. can be fabricated.

The electro-optical device 100 is also applied to display devices that perform color display, such as personal computers and smartphones, which will be described later. When applied to such display devices, color filters are appropriately used for the electro-optical device 100. The electro-optical device 100 is also applied to, for example, a projection-type projector, which will be described later. In this case, the electro-optical device 100 functions as a light valve. In this case, the color filters are omitted for the electro-optical device 100.

1Ab. Electrical Configuration of the First Substrate 2 FIG. 3 is an equivalent circuit diagram showing the electrical configuration of the first substrate 2 of FIG. 1. As shown in FIG. 3, the first substrate 2 has a plurality of transistors 23, n scanning lines 244, m signal lines 242, and n first constant potential lines 245. n and m are each an integer of 2 or more. The transistors 23 are arranged corresponding to each intersection of the n scanning lines 244 and the m signal lines 242. Each transistor 23 is, for example, a TFT that functions as a switching element. Each transistor 23 includes a gate, a source, and a drain.

Each of the n scanning lines 244 extends in the X1 direction, and the n scanning lines 244 are arranged at equal intervals in the Y2 direction. Each of the n scanning lines 244 is electrically connected to the gates of the corresponding transistors 23. The n scanning lines 244 are electrically connected to the scanning line driving circuit 11 shown in FIG. 1. Scanning signals G1, G2, ..., and Gn are supplied line-sequentially to the 1 to n scanning lines 244 from the scanning line driving circuit 11.

Each of the m signal lines 242 shown in FIG. 3 extends in the Y2 direction, and the m signal lines 242 are arranged at equal intervals in the X1 direction. Each of the m signal lines 242 is electrically connected to the sources of the corresponding transistors 23. The m signal lines 242 are electrically connected to the signal line drive circuit 12 shown in FIG. 1. Image signals S1, S2, ..., and Sm are supplied in parallel to the 1 to m signal lines 242 from the signal line drive circuit 12.

The n scanning lines 244 and m signal lines 242 shown in FIG. 3 are electrically insulated from each other and are arranged in a grid pattern in a plan view. An area surrounded by two adjacent scanning lines 244 and two adjacent signal lines 242 corresponds to a pixel P. Each pixel electrode 24 is electrically connected to the drain of the corresponding transistor 23.

Each of the n first constant potential lines 245 extends in the X1 direction, and the n first constant potential lines 245 are arranged at equal intervals in the Y2 direction. The n first constant potential lines 245 are electrically insulated from the m signal lines 242 and the n scanning lines 244, and are arranged at intervals from these. A fixed potential such as ground potential is applied to each of the first constant potential lines 245. Each of the n first constant potential lines 245 is electrically connected to a corresponding number of storage capacitors 25. Each storage capacitor 25 is a capacitance element for holding the potential of the pixel electrode 24. The multiple storage capacitors 25 are electrically connected to the multiple pixel electrodes 24 in a one-to-one relationship. The multiple storage capacitors 25 are electrically connected to the drains of the multiple transistors 23 in a one-to-one relationship.

When the scanning signals G1, G2, ..., and Gn are successively activated and the n scanning lines 244 are successively selected, the transistor 23 connected to the selected scanning line 244 is turned on. Then, image signals S1, S2, ..., and Sm having a size corresponding to the gradation to be displayed are taken into the pixel P corresponding to the selected scanning line 244 via the m signal lines 242 and applied to the pixel electrode 24. As a result, a voltage corresponding to the gradation to be displayed is applied to the liquid crystal capacitance formed between the pixel electrode 24 and the common electrode 33 in FIG. 2, and the orientation of the liquid crystal molecules changes according to the applied voltage. The applied voltage is also held by the storage capacitance 25. This change in the orientation of the liquid crystal molecules modulates the light, making it possible to display gradations.

1Ac. First substrate 2
Fig. 4 is a cross-sectional view that illustrates a schematic view of the first substrate 2 in Fig. 2. Fig. 4 focuses on one pixel P. The configuration of the wiring section 20 illustrated in Fig. 4 is an example. Therefore, the configuration of the wiring section 20 may be any configuration other than the example illustrated in Fig. 4.

As shown in FIG. 4, the first base 21 has a recess for a light shield in which a light shield 241 having light shielding properties and electrical conductivity is disposed. The recess for the light shield is formed, for example, by a damascene method. Examples of materials for the light shield 241 include metals such as tungsten (W), titanium (Ti), chromium (Cr), iron (Fe), and aluminum (Al), metal nitrides, and metal silicides. Among these, tungsten is preferable. Among various metals, tungsten has excellent heat resistance, and its OD (Optical Density) value is unlikely to decrease even by heat treatment during manufacturing. Therefore, when the light shield 241 contains tungsten, the light shield 241 can particularly effectively prevent light from entering the transistor 23.

The wiring section 20 is disposed between the first substrate 21 and the pixel electrode 24. The wiring section 20 has an insulating laminate 22 and various electrodes and wirings as shown in FIG. 2. Each laminate 22 has insulating layers 221, 222, 223, 224, 225, 226, 227, 228, and 229 arranged in this order toward the pixel electrode 24. Each of these layers is a silicon oxide film formed, for example, by thermal oxidation or a CVD (chemical vapor deposition) method.

The various electrodes and wirings arranged in the laminate 22 include the transistor 23, the scanning line 244, the signal line 242, and the first constant potential line 245 shown in FIG. 2, as well as the drain wiring 243, the source wiring 246, the second constant potential line 248, and the connection wiring 247. In addition, contact parts 271, 272, 273, 274, 275, 276, 277, 278, 279, 281, 282, and 283 are arranged in the laminate 22.

Between the insulating layer 221 and the insulating layer 222, the semiconductor layer 231 of the transistor 23 is disposed. Between the insulating layer 222 and the insulating layer 223, the gate electrode 232 of the transistor 23 is disposed. Between the insulating layer 223 and the insulating layer 224, the source wiring 246, the drain wiring 243, and the scanning line 244 are disposed. Between the insulating layer 224 and the insulating layer 225, the first constant potential line 245 is disposed. Between the insulating layer 225 and the insulating layer 226, the first capacitance 251 of the storage capacitance 25 is disposed. Between the insulating layer 226 and the insulating layer 227, the second capacitance 252 of the storage capacitance 25 is disposed. Between the insulating layer 227 and the insulating layer 228, the signal line 242 is disposed. Between the insulating layer 228 and the insulating layer 229, the second constant potential line 248 and the connection wiring 247 are disposed.

The transistor 23 has a semiconductor layer 231, a gate electrode 232, and a gate insulating film 233. The semiconductor layer 231 has a source region 231a, a drain region 231b, a channel region 231c, a first LDD (Lightly Doped Drain) region 231d, and a second LDD region 231e. The semiconductor layer 231 is formed by depositing, for example, polysilicon, and the region other than the channel region 231c is doped with an impurity that increases conductivity. The impurity concentration in the first LDD region 231d and the second LDD region 231e is lower than the impurity concentration in the source region 231a and the drain region 231b. At least one of the first LDD region 231d and the second LDD region 231e, particularly the first LDD region 231d, may be omitted.

The gate electrode 232 overlaps with the channel region 231c of the semiconductor layer 231 in a plan view. The gate electrode 232 is formed, for example, by doping polysilicon with impurities that increase the conductivity. The gate electrode 232 may be formed using a material having conductivity such as metal, metal silicide, and metal compound. A gate insulating film 233 is interposed between the gate electrode 232 and the channel region 231c. The gate insulating film 233 is composed of silicon oxide formed, for example, by thermal oxidation or a CVD method.

The source region 231a of the transistor 23 is connected to the source wiring 246 through a contact portion 271 that penetrates the insulating layer 222 and the insulating layer 223. The source wiring 246 is connected to the signal line 242 through a contact portion 275 that penetrates the insulating layers 224, 225, 226, and 227. The drain region 231b is connected to the drain wiring 243 through a contact portion 272 that penetrates the insulating layers 222 and 223. The drain wiring 243 is connected to the second capacitance 252 of the storage capacitance 25 through a contact portion 276 that penetrates the insulating layers 224, 225, and 226. The gate electrode 232 is connected to the scanning line 244 through a contact portion 273 that penetrates the insulating layer 223. The scanning line 244 is also connected to the above-mentioned light shield 241 through a contact portion 274 that penetrates the insulating layers 221, 222, and 223. The light shield 241 may function as a gate electrode together with the gate electrode 232 of the transistor 23.

The shield section 270 is connected to the first constant potential line 245. A fixed potential is supplied to the shield section 270 from the first constant potential line 245. The shield section 270 functions as a shield that prevents leakage electric fields from the scanning line 244 from affecting the transistor 23 and the drain wiring 243, and as a light-shielding section for the semiconductor layer 231. For this reason, the shield section 270 passes between the scanning line 244 and the drain wiring 243 from the first constant potential line 245 and extends halfway in the thickness direction of the insulating layer 223. In addition, the shield section 270 overlaps with the second LDD region 231e in a planar view.

The storage capacitance 25 has a first capacitance 251 and a second capacitance 252. The first capacitance 251 has a pair of capacitance electrodes 2511 and 2512 and a dielectric layer 2513. The dielectric layer 2513 is disposed between the capacitance electrodes 2511 and 2512. The capacitance electrode 2511 is connected to the first constant potential line 245 via a contact portion 277 that penetrates the insulating layer 225. The capacitance electrode 2512 is connected to the connection wiring 247 via a contact portion 279 that penetrates the insulating layers 226, 227, and 228. The connection wiring 247 is connected to the pixel electrode 24 via a contact portion 283 that penetrates the insulating layer 229.

The second capacitance 252 has a portion that overlaps with the first capacitance 251 in a plan view. The second capacitance 252 has a pair of capacitance electrodes 2521 and 2522 and a dielectric layer 2523. The dielectric layer 2523 is disposed between the capacitance electrodes 2521 and 2522. The capacitance electrode 2521 is connected to the capacitance electrode 2512 of the first capacitance 251 via a contact portion 278 that penetrates the insulating layer 226. The capacitance electrode 2522 is connected to the first constant potential line 245 via a contact portion 281 that penetrates the insulating layers 225 and 226. The capacitance electrode 2522 is also connected to the second constant potential line 248 via a contact portion 282 that penetrates the insulating layers 227 and 228.

A fixed potential such as ground potential is applied to the second constant potential line 248, similar to the first constant potential line 245. The fixed potential supplied to the first constant potential line 245 and the fixed potential supplied to the second constant potential line 248 are the same potential. Furthermore, the connection wiring 247 is arranged in the same layer as the second constant potential line 248, but in a different layer from the signal line 242. By not arranging the signal line 242 and the connection wiring 247 in the same layer, adjacent coupling between them is suppressed.

The materials of the aforementioned source wiring 246, drain wiring 243, scanning line 244, first constant potential line 245, signal line 242, connection wiring 247, second constant potential line 248, capacitance electrode 2511, capacitance electrode 2512, capacitance electrode 2521 and capacitance electrode 2522 include metals such as tungsten, titanium, chromium, iron and aluminum, metal nitrides and metal silicides. Specifically, for example, each of the capacitance electrodes 2511, 2512, 2521 and 2522 is made of a titanium nitride film. Also, for example, each of the source wiring 246, drain wiring 243, scanning line 244, first constant potential line 245, signal line 242, connection wiring 247 and second constant potential line 248 is made of, for example, a laminate of a titanium nitride film, an aluminum film and a titanium nitride film. By including an aluminum film, it is possible to achieve a lower resistance compared to the case where the electrodes are made of only a titanium nitride film.

In addition, the materials for the contact parts 271-279, 281-283 and the shield part 270 include, for example, metals such as tungsten, cobalt (Co) and copper, metal nitrides and metal silicides. Among these, it is preferable that the material mainly contains tungsten. By including tungsten, highly precise columnar contact parts can be easily formed. In addition, since the contact parts 271-279, 281-283 and the shield part 270 are each columnar in shape, the arrangement space for the contact parts 271-279, 281-283 and the shield part 270 can be made smaller than when they are so-called trench-shaped. Therefore, the decrease in the aperture ratio can be suppressed.

In addition, each of the contact parts 271-279, 281-283 and the shield part 270 may be a single layer, but may also be multiple layers. For example, each of the contact parts 271-279, 281-283 and the shield part 270 may be a laminated structure of a layer mainly made of tungsten and a layer containing tungsten nitride.

1Ad. Contact portion 275 and its neighboring structure FIG. 5 is a cross-sectional view showing the contact portion 275 shown in FIG. 4. In the following, a case where the contact portion 275 is an example of a "plug" will be described. In this case, the source wiring 246 is an example of a "first conductive portion", and the signal line 242 is an example of a "second conductive portion". In this case, the insulating layers 224 to 227 are examples of an "insulating film" disposed between the source wiring 246 and the signal line 242.

As shown in FIG. 5, the contact portion 275 is disposed in the insulating layers 224 to 227. Specifically, the contact portion 275 penetrates the insulating layers 224 to 227. More specifically, a contact hole H1, which is a through hole that penetrates the insulating layers 224 to 227, is formed in the insulating layers 224 to 227, and the contact portion 275 is disposed in the contact hole H1.

The contact portion 275 electrically connects the source wiring 246 and the signal line 242. In the illustrated example, the contact portion 275 is directly connected to each of the source wiring 246 and the signal line 242. The contact portion 275 has a surface 2752 on the source wiring 246 side and a surface 2751 on the signal line 242 side. The surface 2752 is the contact surface with the source wiring 246, and the surface 2751 is the contact surface with the signal line 242.

The surface 2751 of the contact portion 275 has a recess 2750 in its center. The recess 2750 is a depression formed in the surface 2751. A void V1 is also formed inside the contact portion 275. In the illustrated example, the void V1 does not communicate with the interior of the recess 2750, but there may be cases where the void V1 communicates with the interior of the recess 2750.

When the contact portion 275 is formed so as to fill the contact hole H1, there is a high possibility that a void V1 will be formed inside the contact portion 275. In addition, a recess 2750 is formed in the surface 2751 of the contact portion 275. If such a recess 2750 exists, an excessively large step will be created on the surface 2751. The step may adversely affect the signal line 242 arranged on the contact portion 275. Specifically, for example, there is a risk of film formation defects occurring on the signal line 242. As a result, there is a risk of poor connection between the contact portion 275 and the signal line 242.

In order to suppress the occurrence of such adverse effects, in this embodiment, the embedded portion 261 is disposed in the recess 2750. Specifically, the embedded portion 261 fills the recess 2750. By providing the embedded portion 261, the effect of the step of the surface 2751 of the contact portion 275 on the signal line 242 can be reduced compared to the case where the embedded portion 261 is not provided. Therefore, the adverse effect of the recess 2750 of the contact portion 275 on the signal line 242 can be suppressed. Specifically, the occurrence of film formation defects of the signal line 242 and connection defects between the contact portion 275 and the signal line 242 can be suppressed. Therefore, the deterioration of the display quality can be suppressed.

For example, a method of reducing the width of the contact hole H1 is conceivable so that the void V1 and the recess 2750 are not formed in the contact portion 275. However, depending on the device for forming the contact hole H1, it may be difficult to make the width of the contact hole H1 sufficiently small. For example, a method of increasing the thickness of the contact portion 275 is conceivable so that the void V1 and the recess 2750 are not formed in the contact portion 275. However, there is a problem in that the thicker the contact portion 275 is, the more likely the contact portion 275 is to be damaged. Therefore, by using the embedded portion 261 as in this embodiment, the adverse effect on the wiring caused by the recess 2750 of the contact portion 275 can be easily suppressed.

Each of the embedded portion 261 and the contact portion 275 is in contact with the signal line 242. Each of the surface 2611 of the embedded portion 261 facing the signal line 242 and the surface 2751 of the contact portion 275 are contact surfaces that are in contact with the signal line 242. By providing the embedded portion 261 so as to be in contact with the signal line 242, the effect on the signal line 242 caused by the step of the surface 2751 of the contact portion 275 can be reduced compared to a case in which the embedded portion 261 is not in contact with the signal line 242.

Although not shown, in a plan view, the portion of the surface 2751 of the contact portion 275 other than the recess 2750 surrounds the surface 2611 of the embedded portion 261. The embedded portion 261 is located in the center of the contact portion 275 in a plan view.

Surface 2611, which is the contact surface of embedded portion 261 with signal line 242, surface 2751, which is the contact surface of contact portion 275 with signal line 242, and surface 2271, which is the contact surface of insulating layer 227 with signal line 242, are continuous and have no steps. That is, surface 2751, surface 2611, and surface 2271 form a flat surface. By forming a flat surface with surface 2751, surface 2611, and surface 2271, it is possible to reduce the effect of the step of surface 2751 of contact portion 275 on signal line 242 compared to the case where a step surface is formed with surface 2751, surface 2611, and surface 2271. The flat surface means that there is substantially no step.

The material of the embedded portion 261 is, for example, an inorganic material having insulating properties. Specifically, the material of the embedded portion 261 is, for example, a silicon-based inorganic material such as silicon oxide and silicon oxynitride. Since the embedded portion 261 is made of this material, the embedded portion 261 that fills the recess 2750 can be easily formed by using a so-called touch-up CMP (chemical mechanical polishing) method, for example, before forming the signal line 242. The touch-up CMP method is a method in which a film that will become the embedded portion 261 is formed before forming the signal line 242, and part of the film is removed by the CMP method to form the embedded portion 261 that fills the recess 2750.

When the embedded portion 261 has insulating properties, as shown in FIG. 5, the embedded portion 261 is not in contact with the insulating layer 227. Specifically, the embedded portion 261 is not disposed between the insulating layer 227 and the signal line 242. Therefore, the embedded portion 261 is not disposed between the signal line 242 and the portion of the surface 2751 of the contact portion 275 excluding the recess 2750. Note that, when the embedded portion 261 is provided over the entire surface 2751 of the contact portion 275, the contact portion 275 and the signal line 242 are not electrically connected. Therefore, when the embedded portion 261 has insulating properties, it is preferable that the embedded portion 261 is not disposed between the insulating layer 227 and the signal line 242.

Also, for example, the embedded portion 261 may not be insulating, but may be conductive. When the embedded portion 261 is conductive, in addition to direct conduction between the signal line 242 and the contact portion 275, conduction between the signal line 242 and the contact portion 275 via the embedded portion 261 is possible. Therefore, when the embedded portion 261 is conductive, the occurrence of poor connection between the contact portion 275 and the signal line 242 can be more effectively suppressed than when the embedded portion 261 is insulating.

When the embedded portion 261 is conductive, the material of the embedded portion 261 may be, for example, metals such as tungsten, cobalt, and copper, metal nitrides, and metal silicides. Among these, it is preferable that the embedded portion 261 contains tungsten. By containing tungsten, the recess 2750 can be filled easily and precisely. In addition, when the material of the contact portion 275 contains tungsten, the material of the embedded portion 261 is tungsten or titanium nitride, which can increase the adhesion between the embedded portion 261 and the contact portion 275.

If the embedded portion 261 is conductive, a portion of the embedded portion 261 may be disposed between the insulating layer 227 and the signal line 242.

Although the above description has been given taking the example of the contact portion 275 being a "plug," any of the other contact portions 271 to 279, 281, 282, and 283 may also correspond to a "plug." In this case, one of the two wirings or electrodes connected to the "plug" corresponds to the "first conductive portion," and the other corresponds to the "second conductive portion." Furthermore, the layer of the laminate 22 in which the "plug" is arranged corresponds to an "insulating film." Furthermore, the "plug" has a "recess," and a "buried portion" is formed to fill the "recess."

1Ae. Contact parts 281, 282 and their neighboring structures FIG. 6 is a cross-sectional view showing the other contact parts 281 and 282 shown in FIG. 4. In the following, a case where the contact part 281 is an example of a "first plug" will be described. In this case, the contact part 282 is an example of a "second plug". In addition, the first constant potential line 245 is an example of a "first conductive part", and the capacitance electrode 2522 of the second capacitance 252 is an example of a "second conductive part". In addition, in this case, the insulating layers 225 and 226 are an example of an "insulating film" disposed between the source wiring 246 and the signal line 242.

As shown in FIG. 6, the contact portion 281 is disposed in the insulating layers 225 and 226. Specifically, the contact portion 281 penetrates the insulating layers 225 and 226. More specifically, the insulating layers 225 and 226 are provided with a contact hole H2 that is a through hole penetrating them, and the contact portion 281 is disposed in the contact hole H2.

The contact portion 281 electrically connects the first constant potential line 245 and the capacitance electrode 2522. The contact portion 281 has a surface 2812 on the first constant potential line 245 side and a surface 2811 on the capacitance electrode 2522 side. The surface 2812 is a contact surface with the first constant potential line 245, and the surface 2811 is a contact surface with the capacitance electrode 2522.

The surface 2811 of the contact portion 281 has a recess 2810 in its center. The recess 2810 is a depression formed in the surface 2811. A void V2 is also formed inside the contact portion 281. In the illustrated example, the void V2 does not communicate with the interior of the recess 2810, but there may be cases where the void V2 communicates with the interior of the recess 2810.

In addition, the embedded portion 262 is disposed in the recess 2810. Specifically, the embedded portion 262 fills the recess 2810. By providing the embedded portion 262, it is possible to reduce the adverse effect on the capacitance electrode 2522 caused by the step of the surface 2811 of the contact portion 281 compared to the case where the embedded portion 262 is not provided. Specifically, it is possible to suppress the occurrence of film formation defects of the capacitance electrode 2522 and connection defects between the contact portion 281 and the capacitance electrode 2522. Therefore, it is possible to suppress the deterioration of the display quality.

As shown in FIG. 6, the contact portion 282 is disposed in the insulating layers 227 and 228. Specifically, the contact portion 282 penetrates the insulating layers 227 and 228. More specifically, the insulating layers 227 and 228 are provided with a contact hole H3 that is a through hole penetrating them, and the contact portion 282 is disposed in the contact hole H3.

The contact portion 282 electrically connects the capacitance electrode 2522 of the second capacitance 252 to the second constant potential line 248. The contact portion 282 also has a surface 2822 on the capacitance electrode 2522 side and a surface 2821 on the second constant potential line 248 side. The surface 2822 is a contact surface with the capacitance electrode 2522, and the surface 2821 is a contact surface with the second constant potential line 248.

The surface 2821 of the contact portion 282 has a recess 2820 in its center. The recess 2820 is a depression formed in the surface 2821. A void V3 is also formed inside the contact portion 282. In the illustrated example, the void V3 does not communicate with the interior of the recess 2820, but there may be cases where the void V3 communicates with the interior of the recess 2820.

In addition, the recess 2820 is provided with an embedded portion 263. Specifically, the embedded portion 263 fills the recess 2820. By providing the embedded portion 263, it is possible to reduce the adverse effect on the second constant potential line 248 caused by the step of the surface 2821 of the contact portion 282 compared to the case where the embedded portion 263 is not provided. Specifically, it is possible to suppress the occurrence of film formation defects of the second constant potential line 248 and connection defects between the contact portion 282 and the second constant potential line 248. Therefore, it is possible to suppress the deterioration of the display quality.

Note that the contact portion 282 does not have to have the recess 2820 and the void V3. In this case, the embedded portion 263 is omitted.

In addition, contact portion 282 is directly connected to contact portion 281. Therefore, a part of contact portion 282 contacts a part of contact portion 281. In other words, contact portion 282 is a so-called half stack in which a part of contact portion 282 overlaps contact portion 281. In the illustrated example, specifically, a part of contact portion 282 contacts a part of contact portion 281 and a part of embedded portion 262.

When the two contact portions 281 and 282 are directly stacked as shown in FIG. 6, the embedded portion 262 can reduce the effect of the recess 2810 of the contact portion 281 on the contact portion 282. Specifically, poor connection between the contact portion 281 and the contact portion 282 can be suppressed.

The contact portion 282 may be a so-called full stack in which the entire surface 2822 overlaps the contact portion 281. In this case, the surface 2822 of the contact portion 282 contacts the contact portion 281 and the embedded portion 262. When the contact portion 282 is a so-called full stack, the inclusion of the embedded portion 262 can provide a particularly significant effect of suppressing poor connection between the contact portion 281 and the contact portion 282.

7 is a diagram showing the flow of a method for manufacturing the electro-optical device 100 according to the first embodiment. In FIG. 7, of the manufacturing steps for the electro-optical device 100, the manufacturing steps for the contact portion 275 and its vicinity are representatively shown.

As shown in FIG. 7, the manufacturing method of the electro-optical device 100 includes a first conductive portion forming process S11, an insulating film forming process S12, a plug forming process S13, a buried portion forming process S14, and a second conductive portion forming process S15. In the following, the example of the "plug" will be described as a representative example of the contact portion 275.

Although not shown, in the first conductive portion forming process S11, source wiring 246 is formed as the "first conductive portion". The source wiring 246 is formed, for example, by forming a metal film by sputtering or vapor deposition, and then etching the metal film using a resist mask. In addition, in the insulating film forming process S12, insulating layers 224-227 are formed as the "insulating film". The insulating layers 224-227 are formed, for example, by thermal oxidation or a vapor deposition method such as CVD. In addition, although not shown, in the insulating film forming process S12, contact holes H1 penetrating the insulating layers 224-227 are formed, for example, by etching.

8 and 9 are diagrams for explaining the plug formation process S13. In the plug formation process S13, for example, as shown in FIG. 8, a conductive material layer 275x is formed, and then, as shown in FIG. 9, a contact portion 275 is formed as a "plug" from the conductive material layer 275x. The contact portion 275 is formed so as to fill the contact hole H1 penetrating the insulating layers 224 to 227. The contact portion 275 is formed by depositing a metal material in the contact hole H1 by, for example, a sputtering method or a deposition method such as a CVD method. Specifically, as shown in FIG. 8, a conductive material layer 275x made of tungsten or the like is formed in the contact hole H1 and on the insulating layer 227. Thereafter, the conductive material layer 275x is polished by a CMP method or the like to remove the portion of the conductive material layer 275x on the insulating layer 227. As a result, the contact portion 275 filling the contact hole H1 is formed as shown in FIG. 9. In addition, an annealing process is appropriately performed in the formation of the contact portion 275.

When the contact portion 275 is formed in a columnar shape to fill the contact hole H1, a void V1 is formed inside the contact portion 275, and a recess 2750 is formed on the contact portion 275, as shown in FIG. 8. The recess 2750 is formed in the center of the surface 2751 of the contact portion 275.

Each of FIG. 10 and FIG. 11 is a diagram for explaining the embedded portion forming process S14. In the embedded portion forming process S14, the embedded portion 261 is formed. First, as shown in FIG. 10, a material layer 261a of the embedded portion 261 is formed on the contact portion 275 and the insulating layer 228 by, for example, a CVD (chemical vapor deposition) method.

Next, a part of the material layer 261a is removed by a so-called touch-up CMP method to form a buried portion 261 that fills the recess 2750, as shown in FIG. 11. Specifically, before forming the signal line 242, the material layer 261a is formed on the insulating layer 227, and a part of the material layer 261a is removed by a CMP method to form the buried portion 261 that fills the recess 2750. By performing such a touch-up CMP method, the buried portion 261 can be easily and reliably formed. Even if it is difficult to fill the recess 2750 by simply thickening the conductive material layer 275x, the buried portion 261 that fills the recess 2750 with the material layer 261a can be easily and reliably filled. In addition, by performing the touch-up CMP method, a flat surface can be formed on the surface 2611 of the buried portion 261, the surface 2751 of the contact portion 275, and the surface 2271 of the insulating layer 227. In addition, by using the touch-up CMP method, it is possible to efficiently remove unnecessary oxide layers and foreign matter that may be formed on the material layer 261a. By using the touch-up CMP method, it is possible to reduce the connection resistance between the contact portion 275 and the signal line 242. In other words, by using the touch-up CMP method, it is possible to obtain good resistance between the contact portion 275 and the signal line 242.

Next, although not shown, in the second conductive portion formation process S15, the signal line 242 is formed. For example, the signal line 242 is formed by forming a metal film by sputtering or vapor deposition, and then etching the metal film using a resist mask.

As described above, the manufacturing method of the electro-optical device 100 includes a first conductive portion forming process S11, an insulating film forming process S12, a plug forming process S13, a buried portion forming process S14, and a second conductive portion forming process S15. This method provides the source wiring 246, the contact portion 275, the buried portion 261, and the signal line 242. The buried portion 261 that fills the recess 2750 of the contact portion 275 is formed, thereby suppressing film formation defects of the signal line 242 formed on the contact portion 275. Therefore, an electro-optical device 100 in which deterioration of display quality is suppressed can be obtained.

1B. Second embodiment A second embodiment will be described. In the following examples, the elements having the same functions as those in the first embodiment will be designated by the reference numerals used in the description of the first embodiment, and detailed descriptions thereof will be omitted as appropriate.

Figure 12 is a cross-sectional view showing the embedded portion 261A in the second embodiment. In this embodiment, the embedded portion 261A is used instead of the embedded portion 261. Note that, below, regarding the embedded portion 261A, differences from the embedded portion 261 in the first embodiment will be described, and descriptions of similar points will be omitted as appropriate.

As shown in FIG. 12, a part of the embedded portion 261A is disposed between the insulating layer 227 and the signal line 242. Specifically, the embedded portion 261A has a first portion 2615A and a second portion 2616A. The first portion 2615A is a portion disposed in the recess 2750. The second portion 2616A is a flat portion disposed between the signal line 242 and a portion of the surface 2751 excluding the recess 2750. In addition, the surface 2611A on the signal line 242 side of the embedded portion 261A contacts the signal line 242. Note that the surface 2751 of the contact portion 275 and the surface 2271 of the insulating layer 227 do not contact the signal line 242.

The embedded portion 261A is conductive. The embedded portion 261A also serves as part of the signal line 242. Because the embedded portion 261A is conductive, even if the embedded portion 261A has the second portion 2616A, electrical continuity between the signal line 242 and the contact portion 275 via the embedded portion 261A is possible. This makes it possible to further suppress the occurrence of poor connection between the contact portion 275 and the signal line 242.

The embedded portion 261A is formed as follows. In this embodiment, part of the embedded portion forming process S14 and part of the second conductive portion forming process S15 are performed in parallel with each other.

Figure 13 is a diagram for explaining the buried portion formation process S14 and the second conductive portion formation process S15. For example, a material layer 261Aa that becomes the buried portion 261A is formed by a deposition method such as a CVD method. Then, the surface of the material layer 261Aa is planarized by a CMP method. By forming the conductive material layer 261a before forming the signal line 242, the buried portion 261A that fills the recess 2750 can be easily and reliably formed.

Next, as shown in FIG. 13, a metal film 242a that will become the signal line 242 is formed by sputtering or vapor deposition on the material layer 261Aa that has been subjected to the CMP method. That is, the signal line 242 is formed after the material layer 261Aa is subjected to the CMP method. Thereafter, the metal film 242a and the material layer 261a are etched using a resist mask to form the signal line 242 and the embedded portion 261A shown in FIG. 12.

As with the first embodiment, the second embodiment described above also reduces degradation of display quality more than in the past.

2. Modifications The above-described embodiment may be modified in various ways. Specific modifications that may be applied to the above-described embodiment are illustrated below. Two or more aspects selected from the following examples may be combined as appropriate to the extent that they are not mutually inconsistent.

In the above-described embodiments, the transistor 23 is a TFT, but it may be, for example, a metal-oxide-semiconductor field-effect transistor (MOSFET).

In each of the above-described embodiments, an active matrix electro-optical device 100 is exemplified, but the driving method of the electro-optical device 100 is not limited to this, and may be, for example, a passive matrix method, etc.

The driving method of the "electro-optical device" is not limited to the vertical electric field method, and may be a horizontal electric field method. In the first embodiment, the pixel electrodes 24 are provided on the first substrate 2, and the common electrode 33 is provided on the second substrate 3, but an electrode for applying an electric field to the liquid crystal layer 5 may be provided on only one of the first substrate 2 or the second substrate 3. Note that, for example, an IPS (In Plane Switching) mode is an example of the horizontal electric field method. Also, examples of the vertical electric field method include a TN (Twisted Nematic) mode, a VA (Vertical Alignment), a PVA mode, and an OCB (Optically Compensated Bend) mode.

In each of the above embodiments, the first substrate 2 has a "plug", but the second substrate 3 may have a "plug".

3. Electronic Devices The electro-optical device 100 can be used in various electronic devices.

Figure 14 is a perspective view showing a personal computer 2000, which is an example of an electronic device. The personal computer 2000 has an electro-optical device 100 that displays various images, a main body 2010 on which a power switch 2001 and a keyboard 2002 are installed, and a control unit 2003. The control unit 2003 includes, for example, a processor and a memory, and controls the operation of the electro-optical device 100.

Figure 15 is a plan view showing a smartphone 3000, which is an example of an electronic device. The smartphone 3000 has an operation button 3001, an electro-optical device 100 that displays various images, and a control unit 3002. The screen content displayed on the electro-optical device 100 changes in response to the operation of the operation button 3001. The control unit 3002 includes, for example, a processor and a memory, and controls the operation of the electro-optical device 100.

Figure 16 is a schematic diagram showing a projector, which is an example of an electronic device. The projection display device 4000 is, for example, a three-panel projector. The electro-optical device 1r is an electro-optical device 100 corresponding to the red display color, the electro-optical device 1g is an electro-optical device 100 corresponding to the green display color, and the electro-optical device 1b is an electro-optical device 100 corresponding to the blue display color. In other words, the projection display device 4000 has three electro-optical devices 1r, 1g, and 1b corresponding to the red, green, and blue display colors, respectively. The control unit 4005 includes, for example, a processor and a memory, and controls the operation of the electro-optical device 100.

The illumination optical system 4001 supplies the red component r of the light emitted from the illumination device 4002, which is a light source, to the electro-optical device 1r, the green component g to the electro-optical device 1g, and the blue component b to the electro-optical device 1b. Each of the electro-optical devices 1r, 1g, and 1b functions as an optical modulator such as a light valve that modulates each monochromatic light supplied from the illumination optical system 4001 according to the display image. The projection optical system 4003 combines the light emitted from each of the electro-optical devices 1r, 1g, and 1b and projects it onto the projection surface 4004.

The above electronic devices include the electro-optical device 100 described above and the control unit 2003, 3002, or 4005. The electro-optical device 100 suppresses degradation of display quality. Therefore, by including the electro-optical device 100, it is possible to improve the display quality of the personal computer 2000, the smartphone 3000, or the projection display device 4000.

The electronic devices to which the electro-optical device of the present invention can be applied are not limited to the devices exemplified above, and include, for example, PDAs (Personal Digital Assistants), digital still cameras, televisions, video cameras, car navigation devices, in-vehicle displays, electronic organizers, electronic paper, calculators, word processors, workstations, videophones, and POS (Point of Sale) terminals. Furthermore, examples of electronic devices to which the present invention can be applied include printers, scanners, copiers, video players, and devices equipped with touch panels.

The present invention has been described above based on a preferred embodiment, but the present invention is not limited to the above-mentioned embodiment. Furthermore, the configuration of each part of the present invention can be replaced with any configuration that exhibits the same function as the above-mentioned embodiment, and any configuration can be added.

In the above explanation, a liquid crystal device has been described as an example of an electro-optical device of the present invention, but the electro-optical device of the present invention is not limited to this. For example, the electro-optical device of the present invention can also be applied to an image sensor, etc. In addition, the present invention can be applied to a display panel using light-emitting elements such as organic electroluminescence (EL), inorganic electroluminescence, or light-emitting polymers, in the same manner as in the above-mentioned embodiment. In addition, the present invention can be applied to an electrophoretic display panel using microcapsules containing a colored liquid and white particles dispersed in the liquid, in the same manner as in the above-mentioned embodiment.

2...first substrate, 3...second substrate, 4...sealing member, 5...liquid crystal layer, 11...scanning line driving circuit, 12...signal line driving circuit, 13...external terminal, 20...wiring section, 21...first base, 22...laminated body, 23...transistor, 24...pixel electrode, 25...storage capacitance, 29...first alignment film, 31...second base, 32...insulating film, 33...common electrode, 34...second alignment film, 100...electro-optical device, 221-119...insulating layer, 231...semiconductor layer, 231a...source region, 231b...drain region, 231c...channel region, 231d...first LDD region, 231e...second LDD region, 232...gate electrode, 233...gate insulator Insulating film, 241...light shield, 242...signal line, 242a...metal film, 243...drain wiring, 244...scanning line, 245...first constant potential line, 246...source wiring, 247...connection wiring, 248...second constant potential line, 251...first capacitance, 252...second capacitance, 261...embedded portion, 270...shield portion, 271-279, 281-283...contact portion, 2511...capacitive electrode, 2512...capacitive electrode, 2513...dielectric layer, 2521...capacitive electrode, 2522...capacitive electrode, 2523...dielectric layer, A10...display area, A20...peripheral area, H1, H2, H3...contact holes, V1, V2, V3...voids.

Claims (9)

A first conductive portion;
A second conductive portion;
an insulating film disposed between the first conductive portion and the second conductive portion and having a contact hole;
a first plug that is disposed in the contact hole, electrically connects the first conductive portion and the second conductive portion, has a recess formed by a portion formed along a side surface of the contact hole contacting the second conductive portion on the side opposite to the first conductive portion in the contact hole , and a portion of the portion formed along the side surface of the contact hole contacts the second conductive portion ;
A filling portion that fills the recess;
a second plug arranged to contact another portion of the first plug formed along the side of the contact hole and to contact the second conductive portion and the buried portion . The electro-optical device according to claim 1 , wherein a contact surface of the buried portion with the second conductive portion, a contact surface of the first plug with the second conductive portion, and a contact surface of the insulating film with the second conductive portion are continuous. 3. The electro-optical device according to claim 1, wherein the material of the buried portion is an inorganic material having insulating properties. The electro-optical device according to claim 3 , wherein the buried portion is not in contact with the insulating film. The electro-optical device according to claim 1 , wherein the buried portion is conductive. The electro-optical device according to claim 5 , wherein the buried portion also serves as a part of the second conductive portion. forming a first conductive portion;
forming an insulating film on the first conductive portion;
forming a contact hole in the insulating film;
forming a first plug having a recess formed along a side surface of the contact hole and provided on a second conductive portion side opposite to the first conductive portion side in the contact hole;
forming a filling portion in the recess;
forming, on the insulating film, the second conductive portion that contacts a part of a portion of the first plug formed along a side surface of the contact hole on a side opposite to the first conductive portion in the contact hole, and is electrically connected to the first conductive portion via the first plug;
forming a second plug in contact with another portion of the first plug formed along the side surface of the contact hole and in contact with the second conductive portion and the buried portion;
A method for manufacturing an electro-optical device, comprising: In the step of forming the buried portion,
The method for manufacturing an electro-optical device according to claim 7 , wherein the buried portion is formed by forming a material layer on the insulating film and removing a part of the material layer by a CMP method. The electro-optical device according to claim 1 ,
and a control unit for controlling an operation of the electro-optical device.

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