JP7620388B2 - Manufacturing method for ceramic electronic component and cover sheet - Google Patents

Description

The present invention relates to a method for manufacturing ceramic electronic components and a cover sheet.

Ceramic electronic components such as multilayer ceramic capacitors have a capacitance region in which internal electrode layers and dielectric layers are alternately stacked, and cover layers that cover the capacitance region from above and below (see, for example, Patent Document 1). There is a demand for such ceramic electronic components to be small and have a large capacity. Therefore, there is a demand to make the dielectric layers and internal electrode layers thinner and increase the number of layers.

JP 2004-356305 A

However, as the number of stacked internal electrode layers increases, the difference in shrinkage characteristics increases due to the difference in sintering completion temperature between the capacitance region and the cover layer, and cracks may occur in the cover layer during the sintering process.

The present invention has been made in consideration of the above problems, and aims to provide a method for manufacturing a ceramic electronic component and a cover sheet that can suppress cracks in the cover layer.

The method for manufacturing a ceramic electronic component according to the present invention includes a preparation step of preparing a ceramic laminate including a laminated portion in which dielectric green sheets having barium titanate as the main ceramic component and patterns of metal conductive paste are alternately laminated, and a cover sheet containing glass having barium titanate as the main ceramic component and arranged on the upper and lower surfaces in the lamination direction of the laminated portion, and a firing step of firing the ceramic laminate, characterized in that the amount of glass added to the barium titanate in the cover sheet is 0.1 wt % or more and 10 wt % or less, the glass softening point (Ts) of the glass is 900°C or less, and the difference (Ts-Tg) between the glass softening point (Ts) and the glass transition point (Tg) of the glass is 300°C or less.

In the method for manufacturing the ceramic electronic component, the number of internal electrode layers obtained from the metal conductive paste in the ceramic laminate by the firing process may be 1,300 layers/mm or more.

In the method for manufacturing the ceramic electronic component, the thickness of the cover layer obtained from the cover sheet by the firing process may be 10 μm or more and 30 μm or less.

In the method for manufacturing ceramic electronic components, the metal conductive paste may contain nickel as a main metal component.

The cover sheet according to the present invention comprises barium titanate as a main ceramic component and glass, the amount of the glass added to the barium titanate being 0.1 wt % or more and 10 wt % or less, the glass softening point (Ts) of the glass being 900°C or less, and the difference (Ts-Tg) between the glass softening point (Ts) and the glass transition point (Tg) of the glass being 300°C or less.

The present invention provides a method for manufacturing a ceramic electronic component and a cover sheet that can suppress cracks in the cover layer.

FIG. 2 is a partial cross-sectional perspective view of a multilayer ceramic capacitor. 2 is a cross-sectional view taken along line AA in FIG. 1. 2 is a cross-sectional view taken along line BB in FIG. 1. 1A to 1C are diagrams illustrating a flow of a method for manufacturing a multilayer ceramic capacitor. FIG. 2A is a diagram illustrating an example of a sheet member, and FIG. 2B is a diagram illustrating an example of a ceramic laminate. FIG. 2 is a diagram showing the fracture strength during the sintering process.

The following describes the embodiment with reference to the drawings.

(Embodiment)
FIG. 1 is a partially sectional perspective view of a multilayer ceramic capacitor 100 according to an embodiment. FIG. 2 is a cross-sectional view taken along line A-A in FIG. 1. FIG. 3 is a cross-sectional view taken along line B-B in FIG. 1. As illustrated in FIGS. 1 to 3, the multilayer ceramic capacitor 100 includes a laminated chip 10 having a rectangular parallelepiped shape, and external electrodes 20a, 20b provided on two opposing end faces of the laminated chip 10. Of the four faces of the laminated chip 10 other than the two end faces, the two faces other than the upper and lower faces in the lamination direction are referred to as side faces. The external electrodes 20a, 20b extend on the upper, lower and two side faces in the lamination direction of the laminated chip 10. However, the external electrodes 20a, 20b are spaced apart from each other.

The laminated chip 10 has a configuration in which dielectric layers 11 containing a ceramic material that functions as a dielectric and internal electrode layers 12 containing a metal material are alternately laminated. The edges of each internal electrode layer 12 are alternately exposed to the end face of the laminated chip 10 on which the external electrode 20a is provided and the end face on which the external electrode 20b is provided. As a result, each internal electrode layer 12 is alternately conductive to the external electrode 20a and the external electrode 20b. As a result, the laminated ceramic capacitor 100 has a configuration in which multiple dielectric layers 11 are laminated via the internal electrode layers 12. In addition, in the laminate of the dielectric layers 11 and the internal electrode layers 12, the internal electrode layer 12 is arranged on the outermost layer in the lamination direction, and the upper and lower surfaces of the laminate are covered by the cover layer 13. The cover layer 13 is mainly composed of a ceramic material. For example, the material of the cover layer 13 is the same as that of the dielectric layer 11 in terms of the main ceramic material.

The size of the multilayer ceramic capacitor 100 is, for example, 0.25 mm long, 0.125 mm wide, and 0.125 mm high, or 0.4 mm long, 0.2 mm wide, and 0.2 mm high, or 0.6 mm long, 0.3 mm wide, and 0.3 mm high, or 1.0 mm long, 0.5 mm wide, and 0.5 mm high, or 3.2 mm long, 1.6 mm wide, and 1.6 mm high, or 4.5 mm long, 3.2 mm wide, and 2.5 mm high, but is not limited to these sizes.

The internal electrode layers 12 are mainly composed of base metals such as Ni (nickel), Cu (copper), and Sn (tin). Noble metals such as Pt (platinum), Pd (palladium), Ag (silver), and Au (gold), or alloys containing these metals, may also be used as the internal electrode layers 12. The dielectric layers 11 are mainly composed of a ceramic material having a perovskite structure represented by the general formula ABO _3. The perovskite structure includes ABO _3-α , which is deviated from the stoichiometric composition. In this embodiment, BaTiO ₃ (barium titanate) is used as the ceramic material.

As illustrated in FIG. 2, the region where the internal electrode layer 12 connected to the external electrode 20a and the internal electrode layer 12 connected to the external electrode 20b face each other is a region that generates capacitance in the multilayer ceramic capacitor 100. Therefore, this region is referred to as the capacitance region 14. In other words, the capacitance region 14 is a region where two adjacent internal electrode layers 12 connected to different external electrodes face each other.

The region where the internal electrode layers 12 connected to the external electrode 20a face each other without an internal electrode layer 12 connected to the external electrode 20b being interposed is called the end margin 15. The region where the internal electrode layers 12 connected to the external electrode 20b face each other without an internal electrode layer 12 connected to the external electrode 20a being interposed is also an end margin 15. In other words, the end margin 15 is a region where the internal electrode layers 12 connected to the same external electrode face each other without an internal electrode layer 12 connected to a different external electrode being interposed. The end margin 15 is a region that does not generate capacitance.

As shown in FIG. 3, in the laminated chip 10, the area extending from the two sides of the laminated chip 10 to the internal electrode layer 12 is called the side margin 16. In other words, the side margin 16 is a region that is provided to cover the ends of the multiple internal electrode layers 12 that are laminated in the laminated structure and extend to the two side surfaces.

The multilayer ceramic capacitor 100 is required to be small and have a large capacity. Therefore, it is possible to increase the number of layers by thinning the dielectric layers 11 and the internal electrode layers 12. For example, in the 1005 shape with a height of 0.5 mm, the number of layers of the internal electrode layers 12 is about 550 layers (1100 layers/mm), and a capacity of 22 μF is realized. In the 0603 shape with a height of 0.3 mm, the number of layers of the internal electrode layers 12 is about 350 layers (1170 layers/mm), and a capacity of 4.7 μF is realized. In the 0402 shape with a height of 0.2 mm, the number of layers of the internal electrode layers 12 is about 170 layers (850 layers/mm), and a capacity of 0.47 μF is realized. Each cover layer 13 has a thickness of about 10 μm to 30 μm. The number of layers per unit thickness (mm) represents the number of layers per unit thickness of the entire laminated chip 10 (including the capacitance region 14 and the cover layer 13).

In this way, when the number of layers of the internal electrode layer 12 increases, the difference in shrinkage characteristics increases due to the difference in sintering completion temperature between the capacitance region 14 and the cover layer 13, and there is a risk of cracks occurring in the cover layer 13 during the sintering process. In particular, when the number of layers per unit thickness of the internal electrode layer 12 exceeds 1,300 layers/mm, the impact of the difference in shrinkage characteristics becomes particularly large.

Therefore, in this embodiment, a method for manufacturing a multilayer ceramic capacitor 100 that can suppress cracks in the cover layer 13 is described. Figure 4 is a diagram illustrating the flow of the method for manufacturing a multilayer ceramic capacitor 100.

(Raw material powder preparation process)
The A-site elements and B-site elements contained in the dielectric layer 11 are usually contained in the dielectric layer 11 in the form of a sintered body of _ABO3 particles. For example, _BaTiO3 is a tetragonal compound having a perovskite structure and exhibits a high dielectric constant. This _BaTiO3 can generally be obtained by synthesizing barium titanate by reacting a titanium raw material such as titanium dioxide with a barium raw material such as barium carbonate. Various methods have been known so far as a method for synthesizing the ceramics constituting the dielectric layer 11, such as a solid-phase method, a sol-gel method, a hydrothermal method, and the like. Any of these methods can be adopted in this embodiment.

To the obtained ceramic powder, a specific additive compound is added according to the purpose. Examples of additive compounds include oxides of Mo (molybdenum), Nb (niobium), Ta (tantalum), W (tungsten), Mg (magnesium), Mn (manganese), V (vanadium), Cr (chromium), rare earth elements (Y (yttrium), Sm (samarium), Eu (europium), Gd (gadolinium), Tb (terbium), Dy (dysprosium), Ho (holmium), Er (erbium), Tm (thulium), and Yb (ytterbium)), as well as oxides or glasses of Co (cobalt), Ni, Li (lithium), B (boron), Na (sodium), K (potassium), and Si (silicon).

For example, the average particle size of the ceramic powder is preferably 50 to 300 nm from the viewpoint of thinning the dielectric layer 11. For example, the ceramic powder obtained as described above may be pulverized as necessary to adjust the particle size, or may be combined with a classification process to adjust the particle size. In this manner, a dielectric material is obtained.

Next, a cover material for forming the cover layer 13 is prepared. The main component ceramic of the cover material can be the same as the dielectric material described above. Next, a specified additive compound is added to the main component ceramic of the cover material according to the purpose. Examples of additive compounds include oxides of Mo, Nb, Ta, W, Mg, Mn, V, Cr, rare earth elements (Y, Sm, Eu, Gd, Tb, Dy, Ho, Er, Tm, and Yb), and oxides or glasses of Co, Ni, Li, B, Na, K, and Si.

In this embodiment, glass is added to the main component ceramic of the cover material in order to give flexibility to the cover layer 13 in the firing process. If the amount of glass added is too small, there is a risk that the cover layer 13 may not be able to be sufficiently flexible in the firing process. Therefore, in this embodiment, the amount of glass added to the main component ceramic is set to 0.1 wt% or more. It is preferable that the amount of glass added to the main component ceramic is 0.5 wt% or more. On the other hand, if the amount of glass added is too large, the glass may be impregnated into the capacitance region 14, causing abnormal grain growth of the dielectric layer 11 and significant spheroidization of the internal electrode layer 12, which may result in a decrease in the continuity rate of the internal electrode layer 12 (deterioration of capacity) and a decrease in reliability such as poor insulation. In other words, there is a risk that the electrical characteristics of the capacitance region 14 may deteriorate. Therefore, in this embodiment, the amount of glass added to the main component ceramic of the cover material is set to 10 wt% or less. It is preferable that the amount of glass added to the main component ceramic is 5.0 wt% or less. Note that "wt%" here refers to the weight of glass relative to the total weight of the main ceramic and glass components. Therefore, if the amount of glass added is 10 wt%, the main ceramic component is 90 wt%.

In addition, cracks that occur in the cover layer 13 during the firing process tend to occur in a temperature range where there is a difference in shrinkage between the cover layer 13 and the capacitance region 14. Therefore, it is desirable to add glass that softens at or below the temperature at which there is a difference in shrinkage between the cover layer 13 and the capacitance region 14. In addition, since the sintering completion temperature of the cover layer 13 tends to be higher than the sintering completion temperature of the capacitance region 14 during the firing process, it is desirable to lower the sintering completion temperature of the cover layer 13. Therefore, in this embodiment, glass with a glass softening point (Ts) of 900°C or less is used. The glass softening point (Ts) is preferably 800°C or less, and more preferably 600°C or less.

In addition, in order to ensure sufficient flexibility of the cover layer 13 in the firing process, this embodiment focuses on the difference (Ts-Tg) between the glass softening point (Ts) and the glass transition point (Tg). The difference (Ts-Tg) is also an index of viscosity behavior against heat. The smaller this difference (Ts-Tg) is, the easier it is for glass to penetrate into the voids in the ceramic, the main component of the cover material, in the firing process, ensuring the flexibility of the cover layer 13. Therefore, in this embodiment, the difference (Ts-Tg) is set to 300°C or less. It is preferable that the difference (Ts-Tg) is 200°C or less.

For example, glass components that lower the glass softening point (Ts) include _Li2O (lithium oxide), _Na2O (sodium oxide), _K2O (potassium oxide), MgO (magnesium oxide), CaO (calcium oxide), SrO (strontium oxide), BaO (barium oxide), ZnO ₍ zinc oxide), _SnO (tin oxide), _B2O3 (boron oxide), _P2O5 (diphosphorus pentoxide), and the like. Examples of glass _components that increase the glass softening point (Ts) include _Al2O3 (aluminum oxide), _CeO2 (cerium oxide), CuO (copper oxide), _Fe2O3 (iron oxide), _Ag2O (silver oxide), _WO3 (tungsten oxide), _MoO3 (molybdenum oxide ₎ , _Nb2O3 ( _niobium oxide), _Ta2O5 (tantalum oxide ₎ , _Ga2O3 (gallium oxide), _Sb2O3 (antimony oxide), _Cs2O ( _cesium oxide ₎ , etc. Examples of glass _components that decrease the glass transition point (Tg) include _Li2CO3 (lithium carbonate), _Bi2O3 (bismuth oxide), ZnO _{, B2O3 ,} etc. By adjusting the combination and composition ratio of these components, it is possible to adjust the glass softening point (Ts) and glass transition point (Tg) to obtain glass having a glass softening point (Ts) of 900° C. or less and a difference (Ts−Tg) of 300° C. or less.

(Lamination process)
Next, a binder such as polyvinyl butyral (PVB) resin, an organic solvent such as ethanol or toluene, and a plasticizer are added to the obtained dielectric material and wet mixed. The obtained slurry is used to coat a strip-shaped dielectric green sheet 41 having a thickness of, for example, 0.8 μm or less on a substrate by, for example, a die coater method or a doctor blade method, and then dried.

Next, as shown in FIG. 5(a), a metal conductive paste 42 for forming an internal electrode containing an organic binder is printed on the surface of the dielectric green sheet 41 by screen printing, gravure printing, or the like. This results in a sheet member 43. The metal material contained in the metal conductive paste has, for example, an average particle size of 150 nm or less. The standard deviation of the particle size is 15 or less. This results in a sharp particle size distribution. The average particle size is preferably 100 nm or less, and more preferably 70 nm or less. The standard deviation of the particle size is preferably 15 or less, and more preferably 12 or less. The slope of the cumulative particle size distribution is preferably 8 or more. The slope of the cumulative particle size distribution can be defined as the slope between D20 and D80 (= 1/(logD80-logD20) when the cumulative particle size distribution is logarithmically plotted.

Ceramic particles are added to the metal conductive paste 42 as a co-material. The main component ceramic of the ceramic particles is not particularly limited, but is preferably the same as the main component ceramic of the dielectric layer 11. For example, barium titanate may be uniformly dispersed as the co-material. The co-material has an average particle size of, for example, 10 nm or less. The standard deviation of the particle size is 5 or less. This allows a sharp particle size distribution to be obtained. The average particle size is preferably 15 nm or less, and more preferably 10 nm or less. The standard deviation of the particle size is preferably 5 or less, and more preferably 3 or less. The slope of the cumulative particle size distribution is preferably 7 or more. The slope of the cumulative particle size distribution can be defined as the slope between D20 and D80 (= 1/(logD80-logD20) when the cumulative particle size distribution is logarithmically plotted.

After that, as shown in FIG. 5(b), with the base material peeled off from the sheet member 43, the sheet member 43 is laminated a predetermined number of layers (e.g., 100 to 500 layers) so that the metal conductive paste 42 is staggered and the edges of the metal conductive paste 42 are alternately exposed on both end faces in the longitudinal direction of the dielectric green sheet 41. This results in a laminated portion.

Next, a binder such as polyvinyl butyral (PVB) resin, an organic solvent such as ethanol or toluene, and a plasticizer are added to the cover material obtained in the raw powder preparation process and wet mixed. Using the obtained slurry, a cover sheet 44 is applied to the substrate by, for example, a die coater method or a doctor blade method, and then dried. A predetermined number of cover sheets 44 (for example, 2 to 10 layers) are laminated on the top and bottom of the laminated portion, heat-pressed, and cut to a predetermined chip size (for example, 1.0 mm x 0.5 mm), and then a metal conductive paste that will become the external electrodes 20a and 20b is applied to both sides of the cut laminate by a dipping method or the like and dried. This results in a ceramic laminate. Note that a predetermined number of cover sheets 44 may be laminated and pressed, and then attached to the top and bottom of the laminated dielectric green sheet 41. In the ceramic laminate, the number of layers of the sheet member 43 is, for example, 1300 layers/mm or more. In addition, in the ceramic laminate, the thickness of the portion corresponding to each cover layer 13 is, for example, 10 μm or more and 30 μm or less.

Metal conductive paste 42 corresponding to the internal electrode layer 12 may be printed at multiple locations on one dielectric green sheet 41. In this case, the resulting sheet members 43 are stacked, a cover sheet 44 is pressed, and then cut into chips of a predetermined size (e.g., 1.0 mm x 0.5 mm). Metal conductive paste that will become the base layer for the external electrodes 20a, 20b may be applied to both end faces of the cut laminate by a dipping method or the like and then dried.

(Firing process)
The molded body thus obtained is subjected to a binder removal process in an N ₂ atmosphere at 250 to 500° C., and then fired at 1100 to 1300° C. for 10 minutes to 2 hours in a reducing atmosphere with an oxygen partial pressure of 10 ⁻⁵ to 10 ⁻⁸ atm. In this way, a multilayer ceramic capacitor 100 is obtained. In addition, by increasing the temperature rise rate in the firing process, the main component metal is sintered before the common material is discharged from the metal conductive paste 42, so that the common material is likely to remain in the internal electrode layer 12. Therefore, the average temperature rise rate from room temperature to the maximum temperature in the firing process is preferably 30° C./min or more, and more preferably 45° C./min or more. In addition, if the average temperature rise rate is too high, the organic components remaining in the molded body (those that could not be removed by the binder removal process alone) are not sufficiently discharged, and there is a risk of problems such as cracks occurring during the firing process. Therefore, the average temperature rise rate is preferably 80° C./min or less, and more preferably 65° C./min or less.

(Reoxidation treatment process)
Thereafter, a re-oxidation treatment may be performed at 600° C. to 1000° C. in a N ₂ gas atmosphere.
(Plating process)
Thereafter, the undercoat layers of the external electrodes 20a, 20b are coated with a metal such as Cu, Ni, Sn, etc. by plating.

According to the method for manufacturing a multilayer ceramic capacitor according to the present embodiment, the amount of glass added to the main component ceramic in the cover material is 0.1 wt% or more and 10 wt% or less, thereby suppressing deterioration of the electrical characteristics of the capacitance region 14 while providing flexibility to the cover layer 13 in the firing process. In addition, by adding glass having a glass softening point (Ts) of 900°C or less to the cover material, the sintering completion temperature of the cover layer 13 can be lowered. Furthermore, by adding glass having a difference (Ts-Tg) between the glass softening point (Ts) and the glass transition point (Tg) of 300°C or less to the cover material, the glass becomes more likely to be impregnated into the voids of the main component ceramic of the cover material in the firing process, and the flexibility of the cover layer 13 can be ensured. From the above, it is possible to suppress the occurrence of cracks in the cover layer 13 in the firing process. Therefore, even if the multilayer ceramic capacitor 100 is made smaller and thinner, it is possible to achieve high flexural strength that does not cause cracks due to impact during mounting.

In the above embodiments, a multilayer ceramic capacitor has been described as an example of a ceramic electronic component, but the present invention is not limited to this. For example, other electronic components such as a varistor or a thermistor may also be used.

(Examples 1 to 10, Comparative Examples 1 to 3)
The multilayer ceramic capacitor according to the embodiment was fabricated and its characteristics were examined.

(Preparation of dielectric material)
Barium titanate powder was prepared as the main ceramic powder for the dielectric material.
Necessary additives were added to the barium titanate powder, and the mixture was thoroughly wet-mixed and pulverized in a ball mill to obtain a dielectric material.

(Preparation of cover material)
Barium titanate powder was prepared as the main component ceramic powder of the cover material. In Example 1, 10.0 wt % of glass having a glass softening point (Ts) of 600° C. and a difference (Ts-Tg) of 100° C. was added to the barium titanate powder. Other necessary additives were added to the barium titanate powder, and the mixture was thoroughly wet mixed and pulverized in a ball mill to obtain a cover material.

In Example 2, 5.0 wt% of glass with a glass softening point (Ts) of 600°C and a difference (Ts-Tg) of 100°C was added. In Example 3, 1.0 wt% of glass with a glass softening point (Ts) of 600°C and a difference (Ts-Tg) of 100°C was added. In Example 4, 0.1 wt% of glass with a glass softening point (Ts) of 600°C and a difference (Ts-Tg) of 100°C was added. In Example 5, 10.0 wt% of glass with a glass softening point (Ts) of 600°C and a difference (Ts-Tg) of 200°C was added. In Example 6, 10.0 wt% of glass with a glass softening point (Ts) of 700°C and a difference (Ts-Tg) of 200°C was added. In Example 7, 10.0 wt% of glass with a glass softening point (Ts) of 800°C and a difference (Ts-Tg) of 200°C was added. In Example 8, 10.0 wt% of glass with a glass softening point (Ts) of 900°C and a difference (Ts-Tg) of 200°C was added. In Example 9, 10.0 wt% of glass with a glass softening point (Ts) of 900°C and a difference (Ts-Tg) of 300°C was added. In Comparative Example 1, no glass was added. In Comparative Example 2, 10.0 wt% of glass with a glass softening point (Ts) of 900°C and a difference (Ts-Tg) of 350°C was added. In Comparative Example 3, 20.0 wt% of glass with a glass softening point (Ts) of 600°C and a difference (Ts-Tg) of 100°C was added.

(Fabrication of multilayer ceramic capacitors)
A butyral-based organic binder and toluene and ethyl alcohol as solvents were added to the dielectric material, and a dielectric green sheet 41 was produced by a doctor blade method. A metal conductive paste 42 for forming an internal electrode layer was printed on the obtained dielectric green sheet 41. 390 sheets of sheet members 43 on which the metal conductive paste 42 was printed were stacked on the dielectric green sheet 41.

A cover sheet 44 was prepared by adding butyral as an organic binder and toluene and ethyl alcohol as a solvent to the cover material by the doctor blade method. The cover sheet 44 was laminated on the top and bottom of the laminate of the sheet member 43 and heat-pressed. The thickness of the cover sheet 44 was set to 15 μm. Then, it was cut into a predetermined shape and subjected to a binder removal treatment in a N ₂ atmosphere. Ni external electrodes were formed on the obtained laminate by a dip method, and the laminate was fired at 1250° C. in a reducing atmosphere (O ₂ partial pressure: 10 ⁻⁵ to 10 ⁻⁸ atm) to obtain a sintered body. The shape dimensions were 0.6 mm in length, 0.3 mm in width, and 0.3 mm in height. The sintered body was subjected to a reoxidation treatment under the condition of 800° C. in a N ₂ atmosphere, and then a metal coating of Cu, Ni, and Sn was applied to the surface of the external electrode terminal by plating, and a multilayer ceramic capacitor 100 was obtained. The average temperature rise rate from room temperature to the maximum temperature was 30° C./min or more and 80° C./min. After firing, the dielectric layer 11 had a thickness of 0.35 μm. The internal electrode layer 12 had a thickness of 0.35 μm. The cover layer 13 had a thickness of 15 μm. The number of layers of the internal electrode layer 12 per unit thickness was 1,300 layers/mm. These conditions are shown in Table 1.

(analysis)
The multilayer ceramic capacitors of Examples 1 to 9 and Comparative Examples 1 to 3 were examined for deterioration in the electrical characteristics of the capacitance region 14. Specifically, the presence or absence of deterioration in the continuity rate of the internal electrode layers 12 (capacitance reduction) and deterioration in reliability such as insulation failure was examined. If the capacity was reduced by 5% or more from the design capacity, it was judged as failing "X". If a short circuit occurred, it was also judged as failing "X". If the capacity was not reduced by 5% or more from the design capacity and no short circuit occurred, it was judged as passing "O".

Next, the occurrence of cracks in the cover layer 13 was examined for the multilayer ceramic capacitors of Examples 1 to 9 and Comparative Examples 1 to 3. If no cracks occurred in the cover layer 13, the crack suppression was judged to pass "O", and if cracks occurred in the cover layer 13, the crack suppression was judged to fail "X". The presence or absence of cracks was confirmed using an optical microscope at 100x magnification.

Next, the fracture strength during the sintering process was examined for the multilayer ceramic capacitors of Examples 1 to 9 and Comparative Examples 1 to 3. Specifically, the fracture strength was examined by applying a load in an observation furnace and checking the load at the time of fracture. If the fracture load at 800°C was more than twice as large as the normal load, it was judged as passing (good), and if it was less than twice as large, it was judged as failing.

In Comparative Example 1, cracks occurred in the cover layer 13. This is believed to be because no glass was added to the cover material, which prevented the cover layer 13 from being flexible during the firing process. In addition, Comparative Example 1 was judged to have a failure in terms of breaking strength. This is believed to be because cracks occurred in the cover layer 13, which reduced its strength.

In Comparative Example 2, cracks also occurred in the cover layer 13. This is believed to be because the difference (Ts - Tg) exceeded 300°C, and the flexibility of the cover layer 13 was insufficient. Furthermore, in Comparative Example 2, the breaking strength was judged to be unacceptable. This is believed to be because the strength was reduced due to the occurrence of cracks in the cover layer 13.

In Comparative Example 3, it was determined that the electrical characteristics were deteriorated. This is thought to be because the amount of glass added to the cover material exceeded 10 wt%, causing glass to permeate the capacitance region 14, resulting in abnormal grain growth in the dielectric layer 11 and deterioration in the continuity rate of the internal electrode layer 12.

In contrast, in Examples 1 to 9, the electrical properties did not deteriorate, no cracks occurred in the cover layer 13, and sufficient fracture strength was obtained. This is believed to be because the amount of glass added, which has a glass softening point (Ts) of 900°C or less and a difference (Ts-Tg) between the glass softening point (Ts) and the glass transition point (Tg) of 300°C or less, was set to 0.1 wt% to 10 wt% relative to the main component ceramic. Figure 6 shows the fracture strength during the sintering process. The solid line in Figure 6 represents the results of Comparative Example 1. The circles in Figure 6 represent the results of Example 1. As shown in Figure 6, in Example 1, the fracture strength was higher around 800°C, where the fracture strength is lowest during the sintering process, than in Comparative Example 1.

Although the embodiments of the present invention have been described in detail above, the present invention is not limited to the specific embodiments, and various modifications and variations are possible within the scope of the gist of the present invention as described in the claims.

REFERENCE SIGNS LIST 10 laminated chip 11 dielectric layer 12 internal electrode layer 13 cover layer 14 capacitance area 15 end margin 16 side margin 20a, 20b external electrode 100 laminated ceramic capacitor

Claims (5)

a preparation step of preparing a ceramic laminate including a laminated portion in which dielectric green sheets having barium titanate as a main component ceramic and patterns of metal conductive paste are alternately laminated, and a cover sheet including barium titanate as a main component ceramic and glass and disposed on the upper and lower surfaces of the laminated portion in the lamination direction;
A firing step of firing the ceramic laminate,
% or more relative to the barium titanate, the glass has a glass softening point (Ts) of 600°C or more and 900°C or less, and a difference (Ts-Tg) between the glass softening point (Ts) and the glass transition point (Tg) of the glass is 300°C or less. The method for manufacturing a ceramic electronic component according to claim 1, characterized in that the number of internal electrode layers obtained from the metal conductive paste in the ceramic laminate by the firing process is 1300 layers/mm or more. The method for manufacturing a ceramic electronic component according to claim 1 or 2, characterized in that the thickness of the cover layer obtained from the cover sheet by the firing process is 10 μm or more and 30 μm or less. The method for manufacturing a ceramic electronic component according to any one of claims 1 to 3, characterized in that the metal conductive paste contains nickel as the main metal component. Barium titanate as the main ceramic component,
Glass;
The amount of the glass added to the barium titanate is 0.1 wt % or more and 10 wt % or less, the glass softening point (Ts) of the glass is 600°C or more and 900°C or less, and the difference (Ts-Tg) between the glass softening point (Ts) and the glass transition point (Tg) of the glass is 300°C or less.

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