JP7627628B2 - Composite Electronic Components - Google Patents

Description

The present invention relates to a composite electronic component, and in particular to a composite electronic component having an insulating layer with an embedded electronic component and a coil pattern.

Patent Document 1 discloses a composite electronic component that includes an insulating layer in which electronic components are embedded and a coil pattern. For example, FIG. 3 of Patent Document 1 discloses a configuration in which two coil patterns are stacked on an insulating layer in which electronic components are embedded. Also, FIG. 7 of Patent Document 1 discloses a configuration in which two coil patterns are arranged side by side on an insulating layer in which electronic components are embedded.

International Publication No. 2013/105397

However, the composite electronic component described in Patent Document 1 has a coil pattern arranged on only one side of the insulating layer in which the electronic components are embedded, making it difficult to ensure sufficient inductance, and there is also the problem that the composite electronic component as a whole is prone to warping due to the difference in thermal expansion coefficient between the insulating layer and the electronic components.

Therefore, the present invention aims to ensure sufficient inductance and suppress the occurrence of warping in a composite electronic component having an insulating layer in which electronic components are embedded.

The composite electronic component according to the present invention is characterized by comprising an insulating layer, first and second coil patterns provided on one surface side of the insulating layer and magnetically coupled to each other, third and fourth coil patterns provided on the other surface side of the insulating layer and magnetically coupled to each other, and an electronic component embedded in the insulating layer and connected to at least the first and second coil patterns.

According to the present invention, since the coil patterns are arranged on both sides of the insulating layer in which the electronic components are embedded, sufficient inductance can be ensured. Moreover, since the symmetry in the stacking direction is improved, the occurrence of warping is also suppressed.

The composite electronic component according to the present invention further includes first, second, third and fourth signal terminals and a ground terminal, and the electronic component is an ESD protection component connected between the first and second signal terminals and the ground terminal, and one end of the first and second coil patterns may be connected to the first and second signal terminals, respectively, one end of the third and fourth coil patterns may be connected to the third and fourth signal terminals, respectively, and the other end of the first and second coil patterns may be connected to the other end of the third and fourth coil patterns, respectively. This makes it possible to provide a common mode filter with ESD protection function. In this case, the first coil pattern and the second coil pattern overlap each other, and the third coil pattern and the fourth coil pattern overlap each other, and the diameter or number of turns of the first and second coil patterns may be different. This makes it easy to change the design for characteristic adjustment.

The composite electronic component according to the present invention further comprises fifth and sixth coil patterns provided on one surface side of the insulating layer and magnetically coupled to each other, seventh and eighth coil patterns provided on the other surface side of the insulating layer and magnetically coupled to each other, and fifth, sixth, seventh and eighth signal terminals, and the ESD protection component is further connected between the fifth and sixth signal terminals and the ground terminal, one end of the fifth and sixth coil patterns is connected to the fifth and sixth signal terminals, respectively, one end of the seventh and eighth coil patterns is connected to the seventh and eighth signal terminals, respectively, and the other end of the fifth and sixth coil patterns is connected to the other end of the seventh and eighth coil patterns, respectively. This makes it possible to provide an array product incorporating two common mode filters.

In this case, the first coil pattern and the fifth coil pattern may be formed in the same wiring layer and may be symmetrical in a planar view, the second coil pattern and the sixth coil pattern may be formed in the same wiring layer and may be symmetrical in a planar view, the third coil pattern and the seventh coil pattern may be formed in the same wiring layer and may be symmetrical in a planar view, and the fourth coil pattern and the eighth coil pattern may be formed in the same wiring layer and may be symmetrical in a planar view. This allows the characteristics of the two common mode filters to be matched and makes pattern design easier.

In this way, according to the present invention, it is possible to ensure sufficient inductance and suppress the occurrence of warping in a composite electronic component having an insulating layer in which electronic components are embedded.

FIG. 1 is a schematic perspective view showing the appearance of a composite electronic component 1 according to an embodiment of the present invention. 2(a) is a schematic cross-sectional view taken along line AA shown in FIG. 1, and FIG. 2(b) is a schematic cross-sectional view taken along line BB shown in FIG. FIG. 3 is a schematic plan view showing the shape of the conductor pattern provided on the conductor layer L1. FIG. 4 is a schematic plan view showing the shape of the conductor pattern provided on the conductor layer L2. FIG. 5 is a schematic plan view showing the shape of the conductor pattern provided on the conductor layer L3. FIG. 6 is a schematic plan view showing the shape of a conductor pattern provided on the conductor layer LESD. FIG. 7 is a schematic plan view showing the shape of the conductor pattern provided on the conductor layer L4. FIG. 8 is a schematic plan view showing the shape of the conductor pattern provided on the conductor layer L5. FIG. 9 is an equivalent circuit diagram of the composite electronic component 1.

A preferred embodiment of the present invention will now be described in detail with reference to the accompanying drawings.

Figure 1 is a simplified perspective view showing the appearance of a composite electronic component 1 according to one embodiment of the present invention.

The composite electronic component 1 according to this embodiment is a surface-mount chip component, and as shown in FIG. 1, includes an element body 10, and signal terminals 21 to 28 and four ground terminals 29 formed on the surface of the element body 10.

Figure 2(a) is a schematic cross-sectional view taken along line A-A in Figure 1, and Figure 2(b) is a schematic cross-sectional view taken along line B-B in Figure 1.

As shown in FIG. 2, the element body 10 has a structure in which insulating layers 11 to 14 made of resin or the like are laminated. Of these, insulating layer 14 is provided on one surface 11a of insulating layer 11, and insulating layers 12 and 13 are provided on the other surface 11b of insulating layer 11. A conductor layer L4 is formed on one surface 11a of insulating layer 11. Conductor layer L4 is covered by insulating layer 14. A conductor layer L5 is formed on the surface of insulating layer 14. Conductor layer L5 is covered by solder resist 32. A conductor layer L3 is formed on the other surface 11b of insulating layer 11. Conductor layer L3 is covered by insulating layer 12. A conductor layer L2 is formed on the surface of insulating layer 12. Conductor layer L2 is covered by insulating layer 13. A conductor layer L1 is formed on the surface of insulating layer 13. Conductor layer L1 is covered by solder resist 31.

The ESD protection component 2 is embedded in the insulating layer 11. Because the ESD protection component 2 is made of a semiconductor substrate, its thermal expansion coefficient is significantly different from that of the insulating layers 11 to 14. However, in this embodiment, the ESD protection component 2 is embedded in approximately the center in the stacking direction, and the insulating layers 12 to 14 are provided on both sides of it, so that there is high symmetry in the stacking direction and the composite electronic component 1 as a whole is less likely to warp due to temperature changes. The ESD protection component 2 is embedded in the insulating layer 11 using a face-down method, and the terminal electrodes of the ESD protection component 2 are connected to a conductor pattern provided on the conductor layer LESD.

Figures 3 to 8 are schematic plan views showing the shapes of the conductor patterns provided on conductor layers L1, L2, L3, LESD, L4, and L5, respectively.

As shown in FIG. 3, conductor patterns 41 to 49 are provided on the conductor layer L1. The conductor patterns 41 to 49 are connected to the signal terminals 21 to 28 and the ground terminal 29, respectively.

As shown in FIG. 4, coil patterns C3 and C7 and conductor patterns 51-59, 53a, and 57a are provided on conductor layer L2. Conductor patterns 51-59 are connected to conductor patterns 41-49, respectively, through vias provided in insulating layer 13. Furthermore, the outer peripheral end and inner peripheral end of coil pattern C3 are connected to conductor patterns 53 and 53a, respectively. The outer peripheral end and inner peripheral end of coil pattern C7 are connected to conductor patterns 57 and 57a, respectively.

As shown in FIG. 5, coil patterns C4 and C8 and conductor patterns 61-69, 64a, and 68a are provided on conductor layer L3. Conductor patterns 61-69 are connected to conductor patterns 51, 52, 53a, 54-56, 57a, 58, and 59, respectively, through vias provided in insulating layer 12. In addition, the outer peripheral end and inner peripheral end of coil pattern C4 are connected to conductor patterns 64 and 64a, respectively. The outer peripheral end and inner peripheral end of coil pattern C8 are connected to conductor patterns 68 and 68a, respectively.

All of coil patterns C3, C4, C7, and C8 have a conductor pattern wound approximately three turns. Coil patterns C3 and C4 overlap in the stacking direction, and their pattern shapes are nearly identical except for the positions of the outer and inner circumferential ends. Similarly, coil patterns C7 and C8 overlap in the stacking direction, and their pattern shapes are nearly identical except for the positions of the outer and inner circumferential ends. Furthermore, the pattern shapes of coil patterns C3 and C7 are symmetrical in a plan view, and the pattern shapes of coil patterns C4 and C8 are symmetrical in a plan view.

As shown in FIG. 6, the conductor layer LESD is provided with conductor patterns 71-78 and terminal electrodes 81, 82, 85, 86, and 89 of the ESD protection component 2. The conductor patterns 71-78 and terminal electrode 89 are connected to the conductor patterns 61-63, 64a, 65-67, 68a, and 69, respectively, through vias provided in the insulating layer 11. The terminal electrodes 81, 82, 85, and 86 are connected to the conductor patterns 61, 62, 65, and 66, respectively, through vias provided in the insulating layer 11.

As shown in FIG. 7, coil patterns C1 and C5 and conductor patterns 91 to 98 are provided on conductor layer L4. Conductor patterns 91 to 98 are connected to conductor patterns 71 to 78, respectively, through vias provided in insulating layer 11. Furthermore, the outer peripheral end and inner peripheral end of coil pattern C1 are connected to conductor patterns 91 and 93, respectively. The outer peripheral end and inner peripheral end of coil pattern C5 are connected to conductor patterns 95 and 97, respectively.

As shown in FIG. 8, coil patterns C2 and C6 and conductor patterns 102, 104, 106, and 108 are provided on conductor layer L5. Conductor patterns 102, 104, 106, and 108 are connected to conductor patterns 92, 94, 96, and 98, respectively, through vias provided in insulating layer 14. In addition, the outer peripheral end and inner peripheral end of coil pattern C2 are connected to conductor patterns 102 and 104, respectively. The outer peripheral end and inner peripheral end of coil pattern C6 are connected to conductor patterns 106 and 108, respectively.

All of the coil patterns C1, C2, C5, and C6 have a conductor pattern wound approximately four turns. Coil patterns C1 and C2 overlap in the stacking direction, and their pattern shapes are nearly identical except for the positions of the outer and inner circumferential ends. Similarly, coil patterns C5 and C6 overlap in the stacking direction, and their pattern shapes are nearly identical except for the positions of the outer and inner circumferential ends. Furthermore, the pattern shapes of coil patterns C1 and C5 are symmetrical in a plan view, and the pattern shapes of coil patterns C2 and C6 are symmetrical in a plan view.

Figure 9 is an equivalent circuit diagram of the composite electronic component 1 according to this embodiment.

As shown in FIG. 9, in the composite electronic component 1 according to this embodiment, coil patterns C1 and C3 are connected in series between signal terminals 21 and 23, coil patterns C2 and C4 are connected in series between signal terminals 22 and 24, coil patterns C5 and C7 are connected in series between signal terminals 25 and 27, and coil patterns C6 and C8 are connected in series between signal terminals 26 and 28. Coil patterns C1 and C2 are magnetically coupled, coil patterns C3 and C4 are magnetically coupled, coil patterns C5 and C6 are magnetically coupled, and coil patterns C7 and C8 are magnetically coupled. Furthermore, a protection element integrated in the ESD protection component 2 is inserted between the signal terminals 21, 22, 25, and 26 and the ground terminal 29.

As a result, the composite electronic component 1 according to this embodiment constitutes an array of common mode filters with ESD protection functions. The coil patterns C1, C2, C5, and C6 are arranged on one surface 11a of the insulating layer 11 in which the ESD protection component 2 is embedded, and the coil patterns C3, C4, C7, and C8 are arranged on the other surface 11b. This makes it possible to sufficiently increase the inductance of each common mode filter and reduce warping of the composite electronic component 1 caused by the difference in thermal expansion coefficient between the insulating layers 11 to 14 and the ESD protection component 2.

In addition, coil patterns C1, C2, C5, C6 and coil patterns C3, C4, C7, C8 are sufficiently separated in the stacking direction, and the pattern shapes of the two, specifically the diameter and number of turns, are different from each other, so magnetic coupling between the two is suppressed. Therefore, even if the pattern shapes of coil patterns C1, C2, C5, C6 are changed to adjust the characteristics, the characteristics of coil patterns C3, C4, C7, C8 hardly change, making design changes easy. Moreover, since the two coil patterns located on the same conductor layer are symmetrical in a plan view, there is almost no difference in characteristics between the two common mode filters, and pattern design is also easy.

Although the preferred embodiment of the present invention has been described above, the present invention is not limited to the above embodiment, and various modifications are possible without departing from the spirit of the present invention, and it goes without saying that these are also included within the scope of the present invention.

For example, in the above embodiment, the ESD protection component 2 is embedded in the insulating layer 11, but the electronic components embedded in the insulating layer 11 are not limited to this. Also, the composite electronic component 1 in the above embodiment is an array product that incorporates two common mode filters, but the present invention is not limited to this.

1 Composite electronic component 2 ESD protection component 10 Base body 11-14 Insulating layer 11a One surface of insulating layer 11b Other surface of insulating layer 21-28 Signal terminal 29 Ground terminal 31, 32 Solder resist 41-49, 51-57, 53a, 57a, 61-69, 64a, 68a, 71-78, 91-98, 102, 104, 106, 108 Conductor pattern 81, 82, 85, 86, 89 Terminal electrode C1-C8 Coil pattern L1-L5, LESD Conductor layer

Claims (3)

An insulating layer;
a first coil pattern and a second coil pattern provided on one surface side of the insulating layer and magnetically coupled to each other;
third and fourth coil patterns provided on the other surface side of the insulating layer and magnetically coupled to each other;
fifth and sixth coil patterns provided on the one surface side of the insulating layer and magnetically coupled to each other;
seventh and eighth coil patterns provided on the other surface side of the insulating layer and magnetically coupled to each other;
an electronic component embedded in the insulating layer and connected to at least the first and second coil patterns;
a first signal terminal, a second signal terminal, a third signal terminal, a fourth signal terminal, a fifth signal terminal, a sixth signal terminal, a seventh signal terminal, and an eighth signal terminal ;
the electronic component is an ESD protection component connected between the first and second signal terminals and the ground terminal,
one end of the first coil pattern is connected to the first signal terminal, and one end of the second coil pattern is connected to the second signal terminal,
one end of the third coil pattern is connected to the third signal terminal, and one end of the fourth coil pattern is connected to the fourth signal terminal,
one end of the fifth coil pattern is connected to the fifth signal terminal, and one end of the sixth coil pattern is connected to the sixth signal terminal,
one end of the seventh coil pattern is connected to the seventh signal terminal; and one end of the eighth coil pattern is connected to the seventh signal terminal.
the other ends of the first and second coil patterns are connected to the other ends of the third and fourth coil patterns, respectively;
the other ends of the fifth and sixth coil patterns are connected to the other ends of the seventh and eighth coil patterns, respectively;
The composite electronic component is characterized in that the ESD protection component is further connected between the fifth and sixth signal terminals and the ground terminal . the first coil pattern and the second coil pattern overlap each other,
2. The composite electronic component according to claim 1 , wherein the third coil pattern and the fourth coil pattern overlap each other and have a different diameter or number of turns from the first and second coil patterns. the first coil pattern and the fifth coil pattern are formed in the same wiring layer and are symmetrical in a plan view;
the second coil pattern and the sixth coil pattern are formed in the same wiring layer and are symmetrical in a plan view;
the third coil pattern and the seventh coil pattern are formed in the same wiring layer and are symmetrical in a plan view;
3. The composite electronic component according to claim 1, wherein the fourth coil pattern and the eighth coil pattern are formed in the same wiring layer and are symmetrical in a plan view.

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