JP7632254B2 - Wafer edge evaluation method - Google Patents

Description

The present invention relates to a method for evaluating the edge of a wafer, and in particular to a method for evaluating contact scratches on the edge of a wafer caused by contact with an external object.

In various processes in the wafer manufacturing process, such as inter-process transfer and batch cleaning, the peripheral edge of the wafer comes into contact with various external objects, such as the wafer holder of various processing equipment and the wafer holder of a robot arm used for wafer transfer, and contact scratches may be introduced to the wafer edge due to this contact with external objects. Due to the miniaturization of device structures and the increase in the number of chips obtained per wafer, the quality required for the wafer edge is becoming higher and higher. In addition, in device processes, there is a problem that film peeling and dust generation may occur due to contact scratches on the wafer edge. Furthermore, it has been pointed out that contact scratches on the edge may cause crack extension or wafer breakage during heat treatment. Therefore, a method is required to evaluate with high accuracy the presence and degree of contact scratches on the wafer edge caused by contact with external objects.

Patent Document 1 describes a method for observing and capturing images of the edge of a wafer using a total of three CCD cameras, each of which observes the top, side, and bottom of the edge of the wafer, and evaluating contact scratches on the edge of the wafer caused by contact with an external object based on the captured images.

JP 2003-139523 A

However, as a result of the inventors' investigations, it was found that the method of Patent Document 1 does not allow for visual confirmation of contact scratches with small irregularities on the edge of the wafer. With advances in wafer manufacturing processes, contact scratches on the edge of the wafer caused by contact with external objects tend to have smaller irregularities. Therefore, the inventors recognized the problem that the method of Patent Document 1 does not allow for sufficient accuracy in evaluating contact scratches on the edge of the wafer caused by contact with external objects.

In view of the above problems, the present invention aims to provide a method for evaluating the edge portion of a wafer that can evaluate with high accuracy contact scratches on the edge portion of a wafer caused by contact with an external object.

In order to solve the above problems, the present inventors have conducted extensive research and have found that
(A) By growing an epitaxial layer from the flat surface to the edge surface of the wafer, stacking faults can be generated in the epitaxial layer starting from contact scratches present on the edge surface of the wafer due to contact with an external object;
(B) It was discovered that even if the contact scratches cannot be directly observed by observing the edge surface of the wafer, the stacking faults can be visually observed by observing the surface of the epitaxial layer, and therefore contact scratches with small irregularities can be evaluated with high accuracy.

Also,
(C) Since the amount of damage introduced by ion implantation differs between the contact scratch area and normal area on the edge surface of the wafer, it was discovered that by implanting ions into the edge surface of the wafer prior to epitaxial growth, the contact scratches can be emphasized, and as a result, contact scratches with smaller unevenness can be evaluated with high accuracy.

The present invention, which has been completed based on the above findings, has the following essential features.
[1] an epitaxial growth step of growing an epitaxial layer from a flat surface to an end surface of a wafer, and generating stacking faults in the epitaxial layer originating from the contact scratches when the end surface of the wafer has contact scratches caused by contact with an external object;
an observation step of observing a surface of the epitaxial layer at the end face of the wafer to grasp at least one of the presence or absence and the degree of the stacking faults as an observation result;
an evaluation step of evaluating at least one of the presence or absence and the degree of the contact scratches on the edge surface of the wafer based on the observation results;
The method for evaluating a wafer edge portion includes the steps of:

[2] The method for evaluating the edge portion of a wafer described in [1] above, which includes a step of implanting ions into the edge portion of the wafer prior to the epitaxial growth step.

[3] The method for evaluating a wafer edge portion according to the above [2], wherein the ions include one or more selected from monomer ions consisting of one selected from B, P, As, C, and Si, and cluster ions containing carbon and hydrogen.

[4] The method for evaluating a wafer end surface described in any one of [1] to [3] above, in which the thickness of the epitaxial layer on the flat surface adjacent to the end surface of the wafer is 5 μm or more in the epitaxial growth process.

[5] The method for evaluating a wafer edge portion according to any one of [1] to [4] above, wherein the observation step (I) involves observation and image acquisition using an imaging device, or (II) involves magnified observation and image acquisition using a combination of a microscope and an imaging device.

[6] The method for evaluating a wafer edge portion described in [5] above, in which the observation or the magnified observation, and the image acquisition are performed on the entire circumference of the edge portion of the wafer.

[7] The method for evaluating the end surface of a wafer according to any one of [1] to [6] above, wherein the wafer is a polished silicon wafer that has been subjected to at least one of a transport process in a state where the wafer is contained in a wafer container and a cleaning process using a batch-type cleaning device.

The wafer edge evaluation method of the present invention makes it possible to evaluate with greater precision contact scratches on the wafer edge caused by contact with an external object.

1A to 1C are diagrams for explaining a method of observing a wafer edge portion in a conventional method and an embodiment of the present invention for evaluating a wafer edge portion. FIG. 2 is a diagram illustrating an experimental flow of Example 1. 1A and 1B are diagrams showing a state in which wafers are accommodated in the FOSB in Example 1, in which (a) shows a state in which the lid is open, and (b) shows a state in which the lid is closed. 1 is a diagram showing a contact state between a wafer holder in a FOSB and a wafer edge portion in Example 1. FIG. 13 shows the results of observing the entire circumference of a wafer end surface according to a comparative example of Example 1. 1 shows the results of observing the entire circumference of a wafer end surface according to the first embodiment of the present invention. 1 shows the results of evaluation of contact scratches in the comparative example and the inventive example of Example 1. 1A to 1C are diagrams for explaining the mechanism by which contact scratches become apparent due to epitaxial growth in Example 1. FIG. 13 is a diagram illustrating an experimental flow of Example 2. 13 is a diagram showing a wafer holder of a transfer robot arm and a cleaning tank in a cleaning apparatus according to a second embodiment. FIG. 13 is a diagram showing a contact state between a wafer holder of a transfer robot arm or a cleaning tank and an edge portion of a wafer in Example 2. FIG. 13 shows the results of observation of the entire circumference of a wafer end surface according to a comparative example of Example 2. 13 shows the results of observing the entire circumference of a wafer end surface according to the second embodiment of the present invention. 1 shows the results of evaluation of contact scratches in the comparative example and the inventive example of Example 2. 11A to 11C are diagrams for explaining the mechanism by which contact scratches become apparent due to ion implantation and epitaxial growth in Example 2. FIG. 13 is a diagram illustrating an experimental flow of Example 3. 13 is a graph showing the evaluation results of contact scratches in Example 3.

A method for evaluating a wafer end surface according to an embodiment of the present invention includes the steps of:
an epitaxial growth step of growing an epitaxial layer from the flat surface to an end surface of the wafer, and generating stacking faults in the epitaxial layer starting from the contact scratches when the end surface of the wafer has contact scratches caused by contact with an external object;
an observation step of observing a surface of the epitaxial layer at the end face of the wafer to grasp at least one of the presence or absence and the degree of the stacking faults as an observation result;
an evaluation step of evaluating at least one of the presence or absence and the degree of the contact scratches on the edge surface of the wafer based on the observation results;
has.

In addition, a method for evaluating a wafer end surface according to another embodiment of the present invention includes a step of implanting ions into the end surface of the wafer prior to the epitaxial growth step. That is, the ion implantation step is an optional step in the present invention, and an embodiment in which the ion implantation step is not implemented also constitutes the present invention. However, the method for evaluating a wafer end surface in an embodiment includes the following steps:
implanting ions into an edge portion of the wafer;
an epitaxial growth step of growing an epitaxial layer from the flat surface to an end surface of the wafer, and generating stacking faults in the epitaxial layer starting from the contact scratches when the end surface of the wafer has contact scratches caused by contact with an external object;
an observation step of observing a surface of the epitaxial layer at the end face portion of the wafer and grasping at least one of the presence or absence and the degree of the stacking faults as an observation result;
an evaluation step of evaluating at least one of the presence or absence and the degree of the contact scratches on the edge surface of the wafer based on the observation results;
has.

[Wafer]
In this embodiment, the wafer to be evaluated may be a polished wafer obtained by polishing a wafer cut from a single crystal ingot with abrasive grains, performing a surface treatment by a chemical method, and performing chemical-mechanical polishing using an abrasive grain liquid, or may be an annealed wafer obtained by further performing an annealing treatment. These wafers are preferably single crystal silicon wafers.

Contact scratches caused by contact with external objects are likely to occur during the transport process when the wafers are stored in a wafer storage container, and during the wafer cleaning process using a batch-type cleaning device.

In regard to the transport process, for example, when a wafer is stored in a storage container called a FOUP (Front Opening Unified Pod) and the wafer is transported between processes, contact scratches can be introduced to the wafer edge surface by contact between the wafer holding part of the FOUP and the wafer edge surface. In regard to the transport process, for example, when a wafer is stored in a storage container called a FOSB (Front Opening Shipping Box) and the wafer is transported, contact scratches can be introduced to the wafer edge surface by contact between the wafer holding part of the FOSB and the wafer edge surface.

In addition, with regard to the wafer cleaning process, when the wafer is transported into the cleaning tank of the batch cleaning device by the transport robot arm, contact between the wafer holder of the transport robot arm and the wafer edge may cause contact scratches to be introduced into the wafer edge. In addition, with regard to the wafer cleaning process, when the wafer is fixed into the cleaning tank, contact between the wafer holder in the cleaning tank and the wafer edge may cause contact scratches to be introduced into the wafer edge.

In view of the above, in this embodiment, the wafer to be evaluated is preferably a polished silicon wafer that has undergone at least one of a transport process in a wafer storage container and a cleaning process using a batch-type cleaning device.

[Ion implantation process]
In this embodiment, it is preferable to perform a step of implanting ions into the edge of the wafer prior to the epitaxial growth step described below. The amount of damage caused by ion implantation differs between the contact scratch area and the normal area on the edge of the wafer. Therefore, by implanting ions into the edge of the wafer prior to the epitaxial growth step, the contact scratches can be emphasized, and as a result, contact scratches with smaller unevenness can be evaluated with high accuracy.

As shown in FIG. 15, the ion implantation process is performed by irradiating ions from one of a pair of flat surfaces (front and back) of the wafer toward the wafer surface. Here, the "front" of the wafer is the surface on which a semiconductor device is manufactured or a heterogeneous substrate is attached, and the "back" of the wafer is the flat surface opposite the front. An identifier (laser mark) recording product information is engraved on the front or back of the wafer. For this reason, the front and back of the wafer are clearly distinguished. The edge of the wafer is the outer periphery connecting the front and back of the wafer, and is composed of an "edge side" including the outermost periphery of the wafer, an "edge upper" on the front side of the edge side, and an "edge lower" on the back side of the edge side. Here, the outermost periphery of the wafer is located at the intersection of the thickness centerline of the wafer and the edge of the wafer in a cross section perpendicular to the wafer flat surface that includes the center of the wafer flat surface. The "edge side" of a wafer is defined as the edge portion of the wafer that is located within ±10% of the wafer thickness, centered on the centerline of the wafer thickness, in a cross section that includes the center of the wafer's flat surface and is perpendicular to the wafer's flat surface.

The ion implantation process is performed by irradiating ions from one side (front side) of the wafer toward the wafer surface. This makes it possible to highlight contact scratches located on the "upper end surface" of the wafer end surface, as shown in Figure 15.

The ions to be implanted preferably include one or more selected from monomer ions consisting of one selected from B, P, As, C, and Si, and cluster ions containing carbon and hydrogen.

The acceleration voltage of the monomer ions is generally 150 to 2000 keV/atom and may be appropriately set within this range. The dose of the monomer ions is not particularly limited either, but may be set within a range of, for example, 1×10 ¹³ atoms/cm ² to 1×10 ¹⁶ atoms/cm ^2. From the viewpoint of emphasizing contact scratches, it is preferably set to 5×10 ¹⁴ atoms/cm ² or more, and more preferably set to 1×10 ¹⁵ atoms/cm ² or more.

In this specification, the term "cluster ions" refers to ions obtained by bombarding gaseous molecules with electrons to dissociate the bonds of the gaseous molecules into atomic aggregates of various numbers of atoms, fragmenting the atomic aggregates to ionize them, and then performing mass separation on the ionized atomic aggregates of various numbers of atoms to extract ionized atomic aggregates of specific mass numbers. In other words, the term "cluster ions" refers to ions obtained by giving a positive or negative charge to clusters of atoms that are agglomerates of multiple atoms, and is clearly distinguished from monoatomic ions such as carbon ions and monomolecular ions such as carbon monoxide ions. The number of atoms constituting a cluster ion is usually about 5 to 100. For example, CLARIS (registered trademark) manufactured by Nissin Ion Equipment Co., Ltd. can be used as a cluster ion implantation device using this principle.

The conditions for irradiating cluster ions include the constituent elements of the cluster ions, the dose of the cluster ions, the cluster size, the acceleration voltage of the cluster ions, and the beam current value.

The constituent elements of the cluster ion preferably contain carbon and hydrogen, and more preferably consist of carbon and hydrogen.

The gaseous molecules that are the source of the cluster ions are not particularly limited as long as they can produce cluster ions of the desired cluster size. For example, if cyclohexane (C ₆ H ₁₂ ) is used as the source gas, cluster ions whose constituent elements are carbon and hydrogen can be produced and extracted. In particular, it is preferable to use clusters C _n H _m ( ₃ ≦n≦16, 3≦m≦10, n and m are both integers) produced using pyrene (C _{16 H 10} ), dibenzyl (C ₁₄ H ₁₄ ), etc. as the source material. This is because it is easy to control a small-sized cluster ion beam.

The cluster size can be appropriately set to 2 to 100, preferably 60 or less, more preferably 50 or less. In this specification, "cluster size" means the number of atoms constituting one cluster ion. In the experimental example described later, C ₃ H ₅ with a cluster size of 8 was used. The cluster size can be adjusted by adjusting the gas pressure of the gas ejected from the nozzle, the pressure of the vacuum vessel, the voltage applied to the filament during ionization, etc. The cluster size can be obtained by determining the cluster number distribution by mass analysis using a quadrupole high-frequency electric field or time-of-flight mass analysis, and taking the average value of the cluster number.

The dose of the cluster ions can be adjusted by controlling the ion irradiation time. The dose of each element constituting the cluster ions is determined by the cluster ion species and the dose of the cluster ions (ions/cm ² ). In this embodiment, the dose of carbon is not particularly limited and can be in the range of about 1×10 ¹⁴ atoms/cm ² or more and 1×10 ¹⁶ atoms/cm ² or less. From the viewpoint of emphasizing the contact scratches, it is preferably 5×10 ¹⁴ atoms/cm ² or more, and more preferably 1×10 ¹⁵ atoms/cm ² or more.

The acceleration voltage of the cluster ions can be more than 0 keV/ion and less than 200 keV/ion, preferably 100 keV/ion or less, and more preferably 80 keV/ion or less. The acceleration voltage of the cluster ions can be more than 0 keV/atom and 50 keV/atom or less, preferably 40 keV/atom or less per carbon atom. Two methods are generally used to adjust the acceleration voltage: (1) electrostatic acceleration and (2) radio frequency acceleration. The former method is to arrange multiple electrodes at equal intervals and apply equal voltages between them to create a uniform accelerating electric field in the axial direction. The latter method is the linear linac method, in which ions are accelerated using radio frequency while running in a straight line.

The beam current value of the cluster ions is not particularly limited, but can be appropriately determined, for example, from the range of 50 to 5000 μA. The beam current value of the cluster ions can be adjusted, for example, by changing the decomposition conditions of the raw material gas in the ion source.

[Epitaxial growth process]
In this embodiment, it is important to perform an epitaxial growth step in which an epitaxial layer is grown from the flat surface (front surface) of the wafer to the end surface portion without performing the ion implantation step (see FIG. 8) or preferably after performing the ion implantation step (see FIG. 15). As a result, as shown in FIGS. 8 and 15, when contact scratches caused by contact with an external object exist on the end surface portion of the wafer, stacking faults originating from the contact scratches can be generated in the epitaxial layer. That is, the contact scratches existing on the end surface portion of the wafer can be made apparent as stacking faults on the surface of the epitaxial layer.

As shown in Figures 8 and 15, in the epitaxial growth process, an epitaxial layer is grown from the flat surface (front surface) of the wafer to the edge surface. Specifically, an epitaxial layer is formed on the "upper edge surface" and "side edge surface" of the edge surface of the wafer. An epitaxial layer is not formed on the "lower edge surface" of the edge surface of the wafer. For this reason, for example, as shown in Figure 8, contact scratches located on at least one of the "upper edge surface" and "side edge surface" of the wafer edge surface can be made visible as stacking faults.

As shown in FIG. 15, by performing an ion implantation process, contact scratches located on the "upper surface" of the wafer edge can be emphasized, and then an epitaxial growth process can be performed. In this case, even if the contact scratches are smaller in unevenness, the contact scratches can be made visible as stacking faults.

The epitaxial layer is preferably a silicon epitaxial layer. The silicon epitaxial layer can be formed under typical conditions. For example, hydrogen is used as a carrier gas, and source gases such as dichlorosilane and trichlorosilane are introduced into the chamber. Although the growth temperature varies depending on the source gas used, epitaxial growth can be performed on the wafer by the CVD method at a temperature in the range of approximately 1000 to 1200°C.

From the viewpoint of making contact scratches present on the edge of the wafer manifest as stacking faults on the surface of the epitaxial layer, in the epitaxial growth process, the thickness of the epitaxial layer on the flat surface (front surface) adjacent to the edge of the wafer is preferably 5 μm or more, and more preferably 10 μm or more. On the other hand, since the size of stacking faults is proportional to the thickness of the epitaxial layer, if the epitaxial layer is extremely thick, it becomes difficult to evaluate the degree of the contact scratches that are the origin of the stacking faults, so it is preferable to make the thickness of the epitaxial layer on the flat surface (front surface) adjacent to the edge of the wafer 50 μm or less.

[Observation process]
In the observation step, the surface of the epitaxial layer at the end face of the wafer is observed to grasp at least one of the presence or absence and the degree of the stacking fault as the observation result. In the observation step, it is preferable to (I) perform observation and image acquisition by an imaging device, or (II) perform magnified observation and image acquisition by combining a microscope and an imaging device. The imaging device is not particularly limited, but examples thereof include a CCD image sensor and a CMOS image sensor. The microscope is not particularly limited, and both an optical microscope and an electron microscope can be used, but it is preferable to use an optical microscope. And, it is preferable that the observation and image acquisition by the imaging device, and the magnified observation and image acquisition by the optical microscope incorporating the imaging device are targeted at the entire circumference of the end face of the wafer. That is, it is preferable to use a CCD image sensor or an optical microscope to acquire an image of the entire circumference of the end face of the wafer.

[Evaluation process]
In the evaluation step, at least one of the presence or absence and the degree of contact scratches on the edge of the wafer is evaluated based on the observation results. For example, when there are no stacking faults on the surface of the epitaxial layer, it can be evaluated that there are no contact scratches on the edge of the wafer, and when there are stacking faults on the surface of the epitaxial layer, it can be evaluated that there are contact scratches on the edge of the wafer. In addition, the number, density, area, etc. of stacking faults in a specific region or the entire periphery region of the surface of the epitaxial layer can be obtained, and the degree of contact scratches on the edge of the wafer can be evaluated based on the number, density, area, etc. of these stacking faults.

The method for evaluating the wafer edge surface according to the present embodiment described above makes it possible to evaluate with higher accuracy contact scratches on the wafer edge surface caused by contact with an external object.

Example 1
The experimental flow of Example 1 is shown in FIG. 2. The samples are eight polished silicon wafers that have been subjected to general wafer processing. The samples are immediately after polishing, and no contact scratches with other devices are formed on the end faces. First, the notch position is rotated 90°, and the eight samples are placed in a FOSB (Front-Opening Shipping Box). The lid of the FOSB is repeatedly opened and closed as shown in FIG. 3(a) and (b), so that the samples are pressed in multiple times and contacted with the wafer holder in the FOSB, introducing contact scratches on the end faces of the samples. Contact with the wafer holder in the FOSB resulted in contact scratches on the end faces of the samples as shown in FIG. 4.

After that, as an evaluation of the comparative example, the end face was inspected using a CCD camera. The end face was inspected by measuring the entire circumference (observing and capturing images of the entire circumference of the end face) using a wafer end face inspection device as shown in Figure 1.

Then, as an evaluation according to the invention, an epitaxial layer was grown from the front surface of the sample to the end face, and the end face was again measured all around (observed and photographed all around) using the same inspection device. The epitaxial growth was performed at a growth rate of 1.0 μm/min at a temperature of 1120° C. using SiHCl ₃ as source gas. The epitaxial layer had a thickness of 10 μm at the flat portion, a dopant species of phosphorus, and a resistivity of 10 Ω·cm.

[Evaluation Results]
The results of evaluation of the same contact scratch by the comparative example and the inventive example are shown in Figs. 5 and 6. In the comparative example, no contact scratches were detected, but in the inventive example, the length and shape of the contact scratches could be confirmed. The positions of contact scratches around the entire circumference measured in the comparative example and the inventive example are shown in Fig. 7. Fig. 7 shows eight samples superimposed when the notch position is set to the circumferential position 0°. As shown in Fig. 7, in the comparative example, no contact scratches were detected around the entire circumference, but in the inventive example, it was confirmed that the notch position was rotated 90° and contact scratches were formed at the position where the wafer holder in the FOSB was contacted. It is considered that the contact scratches formed on the side of the end face due to contact with the wafer holder in the FOSB became apparent as stacking faults during epitaxial growth, as shown in Fig. 8.

Example 2
The experimental flow of Example 2 is shown in FIG. 9. The samples are 13 polished silicon wafers that have been subjected to general wafer processing. The samples are immediately after polishing, and no contact scratches with other devices have been formed on the end faces of the samples. First, in order to intentionally introduce contact scratches on the end faces of the 13 samples, the samples were placed in the cleaning tank of a batch-type cleaning machine by a transport robot arm as shown in FIG. 10, and then the operation of removing the samples from the cleaning tank by the transport robot arm (emphasized transfer) was repeated three times. The wafer holder of the transport robot arm and the wafer holder of the cleaning tank have grooves engraved on them, and the wafer end faces are held by being inserted into the grooves. Therefore, by repeating the transfer, contact scratches were formed on the upper and lower end faces of the sample wafers as shown in FIG. 11.

After that, as an evaluation of the comparative example, the end face was inspected using a CCD camera. The end face was inspected by measuring the entire circumference (observing and capturing images of the entire circumference of the end face) using a wafer end face inspection device as shown in Figure 1.

Furthermore, as an evaluation of the invention example, ion implantation and epitaxial growth were performed on the sample, and the end face was again measured (observed and photographed) using the same inspection device. The ion implantation was performed under the following conditions: ion implantation species: C ₃ H ₅ , implanted carbon dose: 1.0×10 ¹⁵ atoms/cm ² , acceleration voltage: 80 keV, beam current value: 850 μA, tilt: 0°, twist: 0°. The epitaxial growth was performed at a growth rate of 1.0 μm/min at a temperature of 1120° C. using SiHCl ₃ as source gas. The epitaxial layer had a thickness of 10 μm at the flat portion, a dopant species: phosphorus, and a resistivity of 10 Ω·cm.

[Evaluation Results]
The results of evaluation of the same contact scratch by the comparative example and the inventive example are shown in Figs. 12 and 13. In the comparative example, almost no contact scratches were detected, but in the inventive example, the length and shape of the contact scratches could be confirmed. Fig. 14 shows the positions of contact scratches around the circumference measured by the comparative example and the inventive example. Fig. 14 shows the overlap of 13 samples when the notch position is set to the circumferential position of 0°. As shown in Fig. 14, in the comparative example, almost no contact scratches could be detected, but in the inventive example, it was confirmed that contact scratches were formed at positions corresponding to the wafer holder of the transfer robot arm and the wafer holder of the cleaning tank. It is considered that the contact scratches formed on the upper surface of the end face were accentuated by the implantation damage of ion implantation as shown in Fig. 15, and became apparent as stacking faults during epitaxial growth.

Example 3
The experimental flow of Example 3 is shown in FIG. 16. The samples are 10 polished silicon wafers that have been subjected to general wafer processing. The samples are immediately after polishing, and no contact scratches with other devices are formed on the end faces. As in Example 2, in order to intentionally introduce contact scratches on the end faces, the transfer operation is repeated multiple times using the transfer robot arm and cleaning tank of the batch cleaning machine. The operation of placing the sample in the cleaning tank of the batch cleaning machine by the transfer robot arm and then removing it from the cleaning tank by the transfer robot arm (highlighted transfer) was repeated three times.

Then, as an evaluation of the comparative example, the entire circumference of the end face was measured using an optical microscope (observation and imaging of the entire circumference of the end face).

Further, as an evaluation of the invention examples 1 and 2, ion implantation and epitaxial growth were performed on the samples, and the end face was again measured (observed and photographed) using an optical microscope. The ion implantation was performed under the following conditions: ion implantation species: C ₃ H ₅ , implantation carbon dose: 5.0×10 ¹⁴ atoms/cm ² in invention example 1, and 1.0×10 ¹⁵ atoms/cm ² in invention example 2, acceleration voltage: 80 keV, beam current value: 850 μA, tilt: 0°, twist: 0°. The epitaxial growth was performed at a growth rate of 1.0 μm/min at a temperature of 1120° C. using SiHCl ₃ as source gas. The epitaxial layer had a thickness of 10 μm at the flat part, a dopant species: phosphorus, and a resistivity of 10 Ω·cm.

[Evaluation Results]
17 shows the total circumferential area (average value per wafer) of contact scratches detected in the comparative example and invention examples 1 and 2. No contact scratches were detected in the comparative example, but contact scratches were detected in invention examples 1 and 2. In addition, a comparison of invention examples 1 and 2 shows that contact scratches could be evaluated with higher sensitivity in invention example 2, which had a higher dose implantation condition.

The wafer edge evaluation method of the present invention makes it possible to evaluate with greater precision contact scratches on the wafer edge caused by contact with an external object.

Claims (7)

implanting ions into an edge portion of the wafer;
Next, an epitaxial growth step is performed in which an epitaxial layer is grown from the flat surface to the end surface of the wafer, and when a contact scratch due to contact with an external object is present on the end surface of the wafer, stacking faults are generated in the epitaxial layer starting from the contact scratch;
an observation step of observing a surface of the epitaxial layer at the end face of the wafer to grasp at least one of the presence or absence and the degree of the stacking faults as an observation result;
an evaluation step of evaluating at least one of the presence or absence and the degree of the contact scratches on the edge surface of the wafer based on the observation results;
The method for evaluating a wafer edge portion includes the steps of: 2. The method for evaluating a wafer end surface according to claim 1 , wherein the ions include at least one selected from the group consisting of monomer ions consisting of one selected from B, P, As, C, and Si, and cluster ions containing carbon and hydrogen. 3. The method for evaluating a wafer end surface according to claim 1, wherein in the epitaxial growth step, a thickness of the epitaxial layer on the flat surface adjacent to the end surface of the wafer is set to 5 μm or more. The method for evaluating a wafer end surface according to any one of claims 1 to 3 , wherein the observation step includes (I) observation and image acquisition using an imaging device, or (II) magnified observation and image acquisition using a combination of a microscope and an imaging device. The method for evaluating a wafer edge portion according to claim 4 , wherein the observation or the magnified observation and the image acquisition are performed on an entire circumference of the edge portion of the wafer. 6. The method for evaluating an end surface portion of a wafer according to claim 1 , wherein the wafer is a polished silicon wafer that has been subjected to at least one of a transport process in a state where the wafer is accommodated in a wafer accommodation container and a cleaning process using a batch-type cleaning device. an epitaxial growth step of growing an epitaxial layer from the flat surface to an end surface of the wafer, and generating stacking faults in the epitaxial layer starting from the contact scratches when the end surface of the wafer has contact scratches caused by contact with an external object;
an observation step of observing a surface of the epitaxial layer at the end face of the wafer to grasp at least one of the presence or absence and the degree of the stacking faults as an observation result;
an evaluation step of evaluating at least one of the presence or absence and the degree of the contact scratches on the edge surface of the wafer based on the observation results;
having
In the observation step, (I) observation and image acquisition are performed using an imaging device, or (II) magnified observation and image acquisition are performed using a combination of a microscope and an imaging device,
The method for evaluating a wafer edge portion, wherein the observation or the magnified observation, and the image acquisition are performed on an entire circumference of the edge portion of the wafer.

Images