JP7634848B2 - Method for manufacturing germanium semiconductor device and germanium semiconductor device - Google Patents

Description

The present invention relates to a method for manufacturing a germanium semiconductor device and a germanium semiconductor device.

In recent years, the development of optoelectronic integration technology using silicon photonics has progressed. The basic optical components of silicon photonics are silicon (Si)-based optical waveguides and germanium (Ge) photodetectors, and compact optical modules that monolithically integrate these on the same substrate (see Patent Document 1) are expected to be applied to communication systems.

Regarding germanium semiconductor technology, Patent Document 2 describes a stress-enhanced MOS transistor and its manufacturing method. This manufacturing method includes the steps of forming a trench on a silicon substrate near a channel region, epitaxially growing a first SiGe layer to fill a portion of the trench, and epitaxially growing a second SiGe layer having a lower germanium concentration than the first SiGe layer to completely fill the trench. The silicon substrate has a (100) crystal plane orientation, the channel region is oriented in the [110] direction, and the side of the trench has a (011) crystal plane orientation. In the step of epitaxially growing the first SiGe layer, the growth conditions are adjusted so that the growth rate on the (011) crystal plane is higher than that on the (100) crystal plane. In this way, by initially increasing the germanium content of the SiGe layer and then decreasing it, it is possible to suppress a decrease in contact resistance while ensuring compressive stress in the longitudinal direction of the transistor channel.

Although not related to germanium semiconductor technology, Patent Document 3 describes the formation of a p-type epitaxial layer in a number of first trenches formed in the surface layer of an n-type silicon substrate. The n-type silicon substrate has a (100) plane or a plane equivalent thereto as its surface, the multiple first trenches extend in the <001> direction of the n-type silicon substrate, and the side surfaces of the first trenches form a (010) plane and a (0-10) plane. As a result, voids are unlikely to remain when a pn junction is formed by embedding and growing an epitaxial layer in the trench, making it possible to create a structure with a low interface state density.

Patent No. 5761754 JP 2010-510684 A JP 2013-102213 A

In order for a germanium receiver that receives near-infrared light to receive light that propagates through free space rather than light that propagates through an optical waveguide, high light-receiving sensitivity is required, which requires a germanium crystal layer that is sufficiently thick, on the order of several microns. However, when forming a germanium crystal layer of sufficient thickness on a silicon substrate, there is a problem in that it takes a long time for the crystal to grow, resulting in poor manufacturing efficiency.

Therefore, an object of the present invention is to provide a method for manufacturing a germanium semiconductor device that can grow a germanium crystal layer of sufficient thickness in a short period of time. Another object of the present invention is to provide a germanium semiconductor device that has a germanium crystal layer of sufficient thickness, thereby enabling the light receiving sensitivity of the photoreceiver to be increased.

In order to solve the above problems, the method for manufacturing a germanium semiconductor device according to the present invention comprises the steps of forming a trench parallel to the <010> direction in the main surface of a silicon substrate having a {100} surface orientation, and embedding germanium in the trench by chemical vapor deposition, the chemical vapor deposition being performed under pressure conditions in which a source gas is supplied as a molecular flow.

According to the present invention, it is possible to promote the crystal growth of germanium not only from the bottom surface of the trench but also from the sidewall surface. Therefore, a germanium crystal layer with sufficient thickness can be formed in a short time.

In the present invention, the pressure condition is preferably 100 Pa or less. This can promote germanium crystal growth not only from the bottom surface of the trench but also from the sidewall surface, shortening the time required to fill the trench with germanium.

The method for manufacturing a germanium semiconductor device according to the present invention preferably further comprises a step of forming a silicon protective film that covers the upper surface of the germanium embedded in the trench. This increases the reliability of the germanium embedded in the trench, while increasing the lattice distortion of the germanium to lower the band gap energy and lengthen the light absorption wavelength.

The germanium semiconductor device according to the present invention is characterized in that it comprises a silicon substrate having a {100} surface orientation and a trench formed in its main surface, and a germanium crystal layer embedded in the trench, the trench being formed parallel to the <010> direction.

The present invention makes it possible to realize a germanium receiver with enhanced light receiving sensitivity by using a germanium crystal layer with sufficient thickness.

In the present invention, the width of the trench is preferably 1 μm or less. If the width of the trench is 1.0 μm or less, the time required to fill the trench with germanium can be shortened by crystal growth from the sidewall surface of the trench.

In the present invention, the depth of the trench is preferably 2 μm or more, and more preferably 3 μm or more. If the depth of the trench is 2 μm or more, the thickness of the germanium crystal layer can be made 2 μm or more, thereby enabling the light absorption rate in the germanium receiver to be 50% or more. Furthermore, if the depth of the trench is 3 μm or more, the thickness of the germanium crystal layer can be made 3 μm or more, thereby enabling the light absorption rate in the germanium receiver to be 70% or more.

In the present invention, it is preferable that the sidewall surface of the trench is an inclined surface with an inclination angle of 1 degree or more and 10 degrees or less with respect to the vertical surface. If the inclination angle of the sidewall surface 11a is 0.3 degrees or more and 10 degrees or less, cavities are less likely to occur when germanium is embedded, and the quality of the germanium crystal layer can be improved.

In the present invention, it is preferable that a plurality of the trenches are provided at equal intervals on the main surface of the silicon substrate. Also, it is preferable that the step of forming the trenches includes forming a plurality of the trenches at equal intervals on the main surface of the silicon substrate. This makes it possible to realize a germanium photoreceiver that not only has high light receiving sensitivity per unit area but also has a large light receiving area.

The germanium semiconductor device according to the present invention preferably further comprises a silicon protective film covering the upper surface of the germanium crystal layer. This increases the reliability of the germanium crystal layer in the trench, while increasing the lattice distortion of the germanium to lower the band gap energy and lengthen the light absorption wavelength.

According to the present invention, it is possible to provide a germanium semiconductor device in which the light receiving sensitivity is enhanced by a germanium crystal layer having a sufficient thickness. In addition, according to the present invention, it is possible to provide a manufacturing method for a germanium semiconductor device that is capable of growing a germanium crystal layer of sufficient thickness in a short period of time.

1(a) and (b) are diagrams showing the structure of a germanium semiconductor device according to a first embodiment of the present invention, where FIG. 1(a) is a schematic plan view and FIG. 1(b) is a schematic sectional view taken along line X-X of FIG. 1(a). FIG. 2 is a schematic perspective view showing the configuration of a trench. 3A to 3C are process diagrams illustrating a method for manufacturing a germanium semiconductor device. 4A and 4B are schematic diagrams for explaining the crystal growth mechanism of germanium in a trench. 5(a) and (b) are diagrams showing the configuration of a germanium semiconductor device according to a second embodiment of the present invention, where FIG. 5(a) is a schematic plan view and FIG. 5(b) is a schematic sectional view taken along line X-X of FIG. 5(a). FIG. 6 is a schematic cross-sectional view showing the structure of a germanium semiconductor device according to the third embodiment of the present invention. 7(a) and (b) are explanatory diagrams of trench patterns according to a comparative example and an embodiment, where FIG. 7(a) is a plan view of a silicon wafer, FIG. 7(b) is a plan view of a trench pattern according to a comparative example, and FIG. 7(c) is a plan view of a trench pattern according to an embodiment. 8(a) and (b) are TEM images showing the state of a germanium crystal layer embedded in a trench, where FIG. 8(a) shows the state of germanium embedded in a trench according to a comparative example, and FIG. 8(b) shows the state of germanium embedded in a trench according to an embodiment. 9A to 9C are schematic cross-sectional views showing evaluation models of germanium semiconductor devices, in which (a) shows a comparative example, (b) shows Example 1, and (c) shows Example 2. FIG. 10 is a diagram showing the lattice strain distribution of an evaluation model according to a comparative example of a germanium semiconductor device. FIG. 11 is a diagram showing the lattice strain distribution of an evaluation model according to the first embodiment of a germanium semiconductor device. FIG. 12 is a diagram showing the lattice strain distribution of an evaluation model according to the second embodiment of a germanium semiconductor device. FIG. 13 is a graph showing changes in lattice distortion and optical absorption wavelength of the evaluation model according to Example 1, in which (a) is a graph showing the relationship between the thickness of the germanium crystal layer and the magnitude of lattice distortion, and (b) is a graph showing the relationship between the thickness of the germanium crystal layer and the band gap energy as well as the optical absorption wavelength. FIG. 14 is a graph showing changes in lattice distortion and optical absorption wavelength of the evaluation model according to Example 2, in which (a) is a graph showing the relationship between the thickness of the germanium crystal layer and the magnitude of lattice distortion, and (b) is a graph showing the relationship between the thickness of the germanium crystal layer and the band gap energy as well as the optical absorption wavelength.

The following describes in detail a preferred embodiment of the present invention with reference to the attached drawings.

Figures 1(a) and (b) show the structure of a germanium semiconductor device according to a first embodiment of the present invention, where Figure 1(a) is a schematic plan view and Figure 1(b) is a schematic cross-sectional view taken along line X-X in Figure 1(a).

As shown in Figures 1(a) and (b), the germanium semiconductor device 1 includes a silicon substrate 10 having a main surface 10a that is a (001) plane or a crystal plane equivalent thereto, a trench 11 formed in the main surface 10a of the silicon substrate 10, and a germanium crystal layer 20 embedded in the trench 11. The crystal plane equivalent to the (001) plane of the silicon substrate 10 is generally referred to as a {100} plane.

The silicon substrate 10 is, for example, an n-type silicon substrate, and the trench 11 is formed parallel to the [010] direction of the silicon substrate 10. Therefore, as shown in FIG. 2, the surface orientation of the sidewall surface 11a of the trench 11 is the (100) or (-100) surface, and has a crystallographically equivalent crystal surface to the main surface 10a. The surface orientation of the bottom surface 11b of the trench 11 is the (001) surface, similar to the main surface 10a of the silicon substrate 10. The trench 11 may be formed parallel to the [100] direction of the silicon substrate 10. In this case, the surface orientation of the sidewall surface 11a of the trench 11 is the (010) or (0-10) surface, which is a crystallographically equivalent crystal surface to the main surface 10a. In other words, the trench 11 parallel to the [100] direction is equivalent to the trench 11 parallel to the [010] direction.

It is preferable that the length L of the trench 11 is as long as possible. This makes it possible to maximize the area of the germanium crystal layer 20 and increase the light receiving area of the germanium receiver.

The depth D of the trench 11 is 2 μm or more. This allows a germanium crystal layer 20 of sufficient thickness to be formed in the trench 11, and a germanium receiver with high light receiving sensitivity capable of receiving light propagating through free space can be realized. It is more preferable that the depth D of the trench 11 is 3 μm or more. By making the depth D of the trench 11 2 μm or more, the optical absorptance of near-infrared light with a wavelength of approximately 1.55 μm can be increased to 50% or more. Furthermore, the thickness of the germanium crystal layer 20 can be made 3 μm or more, and the optical absorptance of near-infrared light with a wavelength of approximately 1.55 μm can be increased to 70% or more.

The width Wt of the trench 11 is preferably 1.0 μm or less. If the width Wt of the trench 11 is too wide, it takes a long time to fill the trench 11 with the germanium crystal layer 20. On the other hand, if the width Wt of the trench 11 is too narrow, it becomes difficult to form the trench 11 and fill the trench 11 with the germanium crystal layer 20. Therefore, the width Wt of the trench 11 is preferably 0.3 μm or more. In this way, if the width Wt of the trench 11 is 0.3 μm or more and 1.0 μm or less, the time required to fill the trench 11 with the germanium crystal layer 20 can be shortened by crystal growth from the sidewall surface 11a of the trench 11.

The sidewall surface 11a of the trench 11 is preferably slightly inclined, and the angle of the inclined surface with respect to the vertical surface is preferably 0.3 to 10 degrees. If the sidewall surface 11a is slightly inclined, cavities are less likely to occur when germanium is embedded, and the quality of the germanium crystal layer 20 can be improved. If the inclination angle of the sidewall surface 11a is greater than 10 degrees, the deviation of the plane orientation of the sidewall surface 11a with respect to the (100) plane or the (-100) plane becomes large, the effect of promoting the crystal growth of germanium from the sidewall surface 11a becomes small, and the amount of germanium embedded is insufficient, making it impossible to obtain a germanium crystal layer 20 of sufficient thickness. Also, if the inclination angle is less than 0.3 degrees, the effect of inclining the sidewall surface 11a cannot be obtained.

The germanium crystal layer 20 has a conductivity type opposite to that of the silicon substrate 10, and forms a pn junction with the silicon substrate 10. For example, when the silicon substrate 10 is an n-type semiconductor, the germanium crystal layer 20 is a p-type semiconductor. In this case, the germanium crystal layer 20 is preferably formed by sequentially laminating a p ^- germanium layer and a p ⁺ germanium layer. It is also possible for the silicon substrate 10 to be a p-type semiconductor, and the germanium crystal layer 20 to be an n-type semiconductor.

When the germanium crystal layer 20 is embedded in the trench 11, not only its bottom surface but also its side surfaces are bound by silicon, so tensile strain is generated in the germanium crystal layer 20 due to the difference in thermal expansion coefficient between germanium and silicon. When the lattice strain in the germanium crystal increases, the band gap energy of germanium decreases. As a result, the optical absorption wavelength of germanium can be lengthened, and a wideband photoreceiver that covers the L-band wavelengths can be realized.

Figures 3(a) to (c) are process diagrams for explaining the manufacturing method of the germanium semiconductor device 1.

As shown in FIG. 3(a), in the manufacture of the germanium semiconductor device 1, a silicon substrate 10 with a {100} plane orientation is prepared. The silicon substrate 10 may be a bulk silicon wafer, an epitaxial silicon wafer, or an SOI (Silicon On Insulator) wafer.

3B, a trench 11 having a depth of 2 μm or more is formed in the main surface 10a of the silicon substrate 10. In forming the trench 11, after forming a SiO ₂ film on the main surface 10a of the silicon substrate 10, the SiO ₂ film is patterned by photolithography and dry etching to form a SiO ₂ mask 22. This exposes the trench formation region of the main surface 10a of the silicon substrate 10. Next, the trench 11 is formed in the main surface 10a of the silicon substrate 10 by dry etching using the SiO ₂ mask 22.

Usually, the cutting direction of a silicon substrate (silicon chip) from a silicon wafer and the wiring direction on the silicon substrate 10 are often set to the <110> direction of the silicon substrate 10. When a trench 11 parallel to the <110> direction is formed on the main surface 10a of the silicon substrate 10 consisting of a (001) plane, the plane orientation of the sidewall surface 11a of the trench 11 becomes a (1-10) plane or a (-110) plane, which is not a crystal plane equivalent to the main surface 10a. However, in this embodiment, the trench 11 is formed parallel to the <010> direction tilted 45 degrees from the <110> direction, so that the plane orientation of the sidewall surface 11a of the trench 11 can be a (100) plane or a (-100) plane, and a crystal plane equivalent to the main surface 10a can be formed.

3(c), a germanium crystal layer 20 is formed inside the trench 11 exposed from the opening of the SiO ₂ mask 22. The germanium crystal layer 20 is preferably formed by UHVCVD (Ultra-High Vacuum CVD) in which the furnace pressure during crystal growth is set to a low pressure of 100 Pa or less. At this time, the germanium crystal layer 20 is deposited only in the trench 11 and not on the upper surface of the SiO ₂ mask 22, so that the germanium crystal layer 20 can be selectively grown in the trench 11.

Then, a pair of electrode patterns (not shown) are formed that are connected to the silicon substrate 10 and the germanium crystal layer 20, respectively, to complete the trench-filled germanium semiconductor device 1.

Figures 4(a) and (b) are schematic diagrams for explaining the mechanism of germanium crystal growth in trench 11.

When the trench 11 is formed along the [110] direction of the silicon substrate 10, for example, the surface orientation of the sidewall surface 11a of the trench 11 perpendicular to the (001) surface, which is the main surface 10a of the silicon substrate 10, is the (1-10) surface or the (-110) surface. In this case, as shown in FIG. 4(a), germanium crystal growth from the sidewall surface 11a is suppressed, and germanium crystal growth occurs mainly from the bottom surface 11b. Therefore, it takes a long time to fill the trench 11 with the germanium crystal layer 20. Typically, the typical rate of germanium crystal growth on the (001) surface of the silicon substrate is about 10 nm/min, and since a low-temperature buffer layer with a slow growth rate needs to be formed in the early stages of growth, a growth time of nearly 10 hours is required to form a germanium crystal layer of 3 μm or more.

On the other hand, when the trench 11 is formed along the [010] direction tilted 45 degrees from the [110] direction of the silicon substrate 10, the surface orientation of the sidewall surface 11a of the trench 11 perpendicular to the (001) surface, which is the main surface 10a of the silicon substrate 10, becomes the (100) surface or the (-100) surface (see FIG. 2). Here, chemical vapor deposition is performed under pressure conditions in which the source gas is supplied as a molecular flow so that the source gas molecules reach the bottom of the trench 11. The mean free path of the source gas is larger than the depth D of the trench 11, and the source gas can be supplied to the bottom and sidewall surfaces inside the trench. As shown in FIG. 4(b), crystal growth occurs from the sidewall surface 11a of the trench 11 at the same growth rate as the bottom surface 11b. If the width W of the trench 11 is, for example, 1 μm, regardless of the depth D of the trench 11, the germanium crystal layer 20 will grow 0.5 μm from both sidewall surfaces 11a of the trench 11, completing the filling of the inside of the trench 11.

As described above, the method for manufacturing the germanium semiconductor device 1 according to this embodiment forms trenches 11 parallel to the <010> direction in the main surface 10a of the silicon substrate 10 consisting of a {100} plane, and forms a germanium crystal layer 20 in the trench 11 by chemical vapor deposition. This promotes crystal growth of germanium not only from the bottom surface 11b of the trench 11 but also from the sidewall surface 11a, and allows a germanium crystal layer 20 with a thickness of 2 μm or more to be formed in a short period of time.

Figures 5(a) and (b) show the configuration of a germanium semiconductor device according to a second embodiment of the present invention, where Figure 5(a) is a schematic plan view and Figure 5(b) is a schematic cross-sectional view taken along line X-X in Figure 5(a).

As shown in Figures 5(a) and (b), this germanium semiconductor device 1 has multiple trenches 11 arranged at equal intervals at a predetermined pitch on a silicon substrate 10, and a germanium crystal layer 20 embedded in each trench 11. The rest of the configuration is the same as in the first embodiment.

In order to increase the light receiving efficiency of the germanium receiver, it is desirable to make the area of the germanium crystal layer 20 as large as possible. However, as described above, when attempting to form the germanium crystal layer 20 over the entire surface of the main surface 10a of the silicon substrate 10, the crystals only grow vertically, which creates the problem that it takes a long time to form a germanium crystal layer with a sufficient thickness of 2 μm or more.

In contrast, in this embodiment, a germanium crystal layer 20 of sufficient thickness can be formed in a short time by crystal growth not only in the vertical direction from the bottom surface 11b of each trench 11 but also in the horizontal direction from the side wall surface 11a. The silicon region between two adjacent trenches 11, 11 becomes a dead space where the germanium crystal layer 20 cannot be provided, but since light that reaches the silicon region is attracted to the germanium crystal layer 20, which has a higher refractive index than silicon, the presence of some silicon region does not cause any particular problem. The light absorption rate of the germanium crystal layer 20 increases in proportion to its area, but increases exponentially with respect to its thickness. In other words, the light absorption efficiency increases dramatically when the thickness of the germanium crystal layer 20 is made thicker than the area of the germanium crystal layer 20, so increasing the thickness of the germanium crystal layer 20 is very effective in increasing the light receiving sensitivity of the germanium photodetector.

As described above, according to this embodiment, it is possible to ensure both the thickness and area of the germanium crystal layer 20, and further increase the light receiving sensitivity of the germanium receiver.

Figure 6 is a schematic cross-sectional view showing the configuration of a germanium semiconductor device according to a third embodiment of the present invention.

As shown in FIG. 6, the germanium semiconductor device 1 is characterized in that the entire upper surface of the silicon substrate 10, including the upper surface of the germanium crystal layer 20 embedded in the trench 11, is covered with a silicon protective film 12 (Si cap). The other configurations are the same as those of the first embodiment. When the upper surface of the germanium crystal layer 20 is covered with the silicon protective film 12, not only the bottom and side surfaces of the germanium crystal layer 20 but also the upper surface are bound by silicon, so that the tensile strain generated in the germanium crystal layer 20 due to the difference in thermal expansion coefficient with silicon can be increased. When the tensile strain in the germanium crystal increases, the band gap energy of germanium decreases, so that the light absorption wavelength of germanium can be lengthened.

In order to increase the light absorption wavelength, it is better to increase the lattice distortion of the germanium crystal layer 20 as much as possible, and to achieve this, it is desirable to bring the cross-sectional aspect ratio of the germanium crystal layer 20 as close to 1 as possible. However, bringing the cross-sectional aspect ratio closer to 1 reduces the thickness of the germanium crystal layer 20 (≒ trench depth D), and the light receiving sensitivity decreases. Therefore, in designing a Ge light receiver, it is necessary to prioritize light receiving sensitivity while striking a balance between the two.

Although the preferred embodiment of the present invention has been described above, the present invention is not limited to the above embodiment, and various modifications are possible without departing from the spirit of the present invention, and it goes without saying that these are also included within the scope of the present invention.

For example, in the above embodiment, a germanium semiconductor device and a method for manufacturing the same are given as examples that are suitable for manufacturing germanium receivers with high light receiving sensitivity, but the present invention is not limited to such applications and can be applied to various germanium semiconductor devices and methods for manufacturing the same that require the formation of a thick germanium crystal layer.

<Evaluation of crystal growth of trench-filled Ge>
A 4-inch silicon wafer 10W (see FIG. 7(a)) with a {100} plane orientation and a <110> orientation flat was prepared, and 25 silicon chips 10C having the same pattern were formed on the main surface of the silicon wafer 10W. Each silicon chip 10C was provided with a formation region E1 of a trench pattern according to a comparative example (see FIG. 7(b)) extending in the <-110> direction, and a formation region E2 of a trench pattern according to an embodiment (see FIG. 7(c)) extending in the <010> direction inclined at 45 degrees from the <110> direction. That is, both the trench pattern according to the comparative example and the trench pattern according to the embodiment were simultaneously formed on the same silicon wafer 10W. These trench patterns were formed by photolithography and RIE (Reactive Ion Etching).

The trench pattern in the comparative example had five trenches 11 extending in the <-110> direction arranged at intervals of 20 μm, with the length L of the trench 11 being 10 mm, the width Wt of the trench 11 being 0.6 μm, the depth D of the trench 11 being 1 to 2 μm, and the space width Ws between adjacent trenches 11, 11 being 20 μm.

The trench pattern in the embodiment was the same as that in the comparative example, except that five trenches 11 extending in the <010> direction were arranged at intervals of 20 μm.

Next, germanium was embedded in the trench 11. The germanium was formed by ultra-high vacuum chemical vapor deposition (UHVCVD) using _GeH4 as a source gas, and a molecular flow region with a pressure of 10 Pa or less in the growth furnace was used. Specifically, the growth conditions were set so that a germanium crystal layer with a thickness of 0.5 μm was obtained on the {100} plane.

After the germanium crystal layer was embedded in the trenches 11, the silicon wafer 10W was subjected to FIB (Focused Ion Beam) processing. In the FIB processing, a Pt protective film was formed in advance by sputtering on the main surface of the silicon wafer 10W on which the germanium embedded layer was formed, and then the silicon wafer 10W was cut in a direction perpendicular to the extension direction of the trenches 11 (the direction of the dashed line C in Figures 6(b) and (c)). The cross section of the germanium crystal layer was then observed with a TEM (Transmission Electron Microscope).

Figures 8(a) and (b) are TEM images showing the state of germanium crystal layers embedded in trenches, with Figure 8(a) showing the state of germanium embedded in a trench in a comparative example, and Figure 8(b) showing the state of germanium embedded in a trench in an embodiment.

As shown in FIG. 8(a), in the trench pattern according to the comparative example formed in the <-110> direction, germanium could be embedded in a depth region up to a height T of about 0.5 μm from the bottom surface, but the inside of the trench could not be filled sufficiently with germanium. As a result, a cavity surrounded by a Pt protective film was generated above the germanium. This incomplete embedding state of germanium was the same for all the trenches of the 25 silicon chips. This is thought to be because the crystal growth of germanium from the sidewall surface of the trench was suppressed. When the sidewall surface of the trench is not vertical, crystal growth occurs not only from the bottom surface but also from the sidewall surface in the early stage of growth, but when the sidewall surface becomes almost vertical and the {110} surface with a slow growth rate appears, the crystal growth stops, so it was not possible to embed a sufficient amount of germanium inside the trench.

On the other hand, as shown in FIG. 8(b), in the trench pattern according to the embodiment formed in the <010> direction, germanium could be embedded in a depth region up to a height T of about 0.9 μm from the bottom surface. This sufficient embedding state of germanium was the same for all trenches of the 25 silicon chips. This is thought to be because the crystal growth of germanium occurred from the sidewall surface in the same way as it did on the bottom surface.

<Consideration of the effect of strain in Ge crystal on optical absorption wavelength>
The effect of strain in a Ge crystal on the optical absorption wavelength of Ge was evaluated by simulation.

<Comparative example: Ge film structure>
The lattice distortion and band gap energy of a 1 μm thick Ge film (conventional structure) formed on the entire top surface of a Si substrate were evaluated by simulation. As shown in Fig. 9(a), the thickness of the Si substrate was set to 0.625 mm, and the area was assumed to be 1 mm wide and 1 mm deep. The thermal expansion coefficient of Ge was set to 5.9 x 10 ^-6 [1/K], and the thermal expansion coefficient of Si was set to 2.6 x 10 ^-6 [1/K].

Next, the magnitudes of strain ε _xx , ε _yy , and ε _zz in the X, Y, and Z directions of strain generated in Ge when the temperature of the evaluation model of this comparative example was lowered from 600° C. to 25° C. were calculated. The results are shown in FIG. 10. The calculation results are summarized in Table 1. In Table 1, ε _total is the sum of the magnitudes of strain ε _xx , ε _yy , and ε _zz in the three directions, and is equivalent to the volume change rate of Ge.

As shown in FIG. 10 and Table 1, in the case of the Ge film, the magnitude of strain in the X and Y directions was the same, and a tensile strain of 0.188% was induced. On the other hand, the magnitude of strain in the Z direction was -0.1419%. This is because no force was acting in the film thickness direction, but the lattice itself was pulled laterally in the plane, resulting in a compressive strain being induced in the Ge film thickness direction. The sum of the strains in the three directions ε _total = ε _xx + ε _yy + ε _zz was 0.2357%.

From the obtained lattice distortion, the band gap energy Eg at the gamma point of the energy band structure of Ge was calculated by the following linear approximation formula.

As a result, the band gap energy Eg of Ge was 0.7809 eV and the absorption edge wavelength was 1588 nm.

In Table 1, Eg ^C-HH shows the calculated band gap energy between the conduction band and the heavy hole valence band at the gamma point of Ge, and Eg ^C-LH shows the calculated band gap energy between the conduction band and the light hole valence band at the gamma point of Ge. ^{Eg C-HH} and Eg ^C-LH are band gap energies that take into account the separation of the top of the valence band due to the heavy holes and light holes that were ignored in the first-order approximation formula, and have a high degree of approximation accuracy. They can be calculated using the following formula.

As a result of the above calculation, Eg ^C-HH was 0.7871 eV, the absorption edge wavelength was 1575 nm, ^{Eg C-LH} was 0.7746 eV, and the absorption edge wavelength was 1601 nm.

Example 1: Ge-embedded wire structure/no Si cap
The evaluation model of Example 1 had a structure in which a trench was formed on the top surface of a 0.625 mm thick Si substrate, and Ge was embedded in the trench (see FIG. 9(b)). In addition, a region with a width of 1 mm and a depth of 1 mm was assumed. The trench width was 1 μm, the length (depth) was 1 mm, and the trench depth was set to five values of 1, 2, 3, 4, and 5 μm. In this evaluation model, the side and bottom surfaces of Ge were bound to Si, but the top surface of Ge was left open without being covered with a Si cap.

Next, the magnitudes ε _xx , ε _yy , and ε _zz of the strains in the X, Y, and Z directions of Ge generated when the temperature of the evaluation model of Example 1 was lowered from 600° C. to 25° C. were calculated. The results are shown in FIG. 11 and FIG. 13(a) and (b). Table 2 summarizes the calculation results.

In the case of the Ge-embedded fine wire structure, the strain ε _yy in the Y direction did not change compared to the Ge film. The strain ε _xx in the X direction became smaller compared to the Ge film, and the compressive strain became stronger as the trench depth (Ge film thickness) became larger. On the other hand, the strain ε _zz in the Z direction, which was compressive in the Ge film, increased, and became tensile strain at a trench depth (Ge film thickness) of 2 μm or more. It was found that the sum of the strains in the three directions ε _total was minimum when the trench depth (Ge film thickness) was 1 μm (i.e., the cross-sectional aspect ratio was 1), and increased with the Ge film thickness to the same value as in the case of the Ge film.

When the Ge film thickness is 1 μm (minimum value), the band gap energy Eg ^C-HH between the conduction band and the heavy hole valence band at the gamma point is 0.7903 eV, and the absorption edge wavelength is 1569 nm. Also, the band gap energy Eg ^C-LH between the conduction band and the light hole valence band at the gamma point of Ge is 0.7818 eV, and the absorption edge wavelength is 1586 nm. Compared to the Ge film, the band gap energy is larger and the absorption edge wavelength is smaller.

On the other hand, when the Ge film thickness is 5 μm (maximum value), the band gap energy Eg ^C-HH between the conduction band and the heavy hole valence band at the gamma point is 0.7860 eV, and the absorption edge wavelength is 1578 nm. Also, the band gap energy Eg ^C-LH between the conduction band and the light hole valence band at the gamma point is 0.7762 eV, and the absorption edge wavelength is 1597 nm. These are the same band gap energy and absorption edge wavelength as those of the Ge film.

Example 2: Ge-embedded thin-wire structure/with Si cap
The evaluation model of Example 2 had a structure in which a trench was formed on the top surface of a 0.623 mm thick Si substrate, Ge was embedded in the trench, and the entire top surface of the Si substrate was covered with a 2 μm thick Si film (see FIG. 9(c)). In addition, a region with a width of 1 mm and a depth of 1 mm was assumed. The trench width was 1 μm, the length (depth) was 1 mm, and the trench depth was set to five values of 1, 2, 3, 4, and 5 μm. In this evaluation model, Ge was bound to Si not only on the side and bottom surfaces but also on the top surface.

Next, the magnitudes ε _xx , ε _yy , and ε _zz of the strains in the X, Y, and Z directions of Ge generated when the temperature of the evaluation model of Example 2 was lowered from 600° C. to 25° C. were calculated. The results are shown in FIG. 12 and FIG. 14(a) and (b). Table 3 summarizes the calculation results.

When the entire circumference of the Ge-embedded thin wire is covered with Si, the Z-direction strain ε _xx becomes even larger. The sum of the strains in the three directions ε _total is maximum when the trench depth (Ge film thickness) is 1 μm (i.e., the cross-sectional aspect ratio is 1). Although it decreases with increasing Ge film thickness, it is still larger than the value in the case of the Ge film.

When the Ge film thickness is 1 μm (minimum value), the band gap energy Eg ^C-HH between the conduction band and the heavy hole valence band at the Ge gamma point is 0.7789 eV, and the absorption edge wavelength is 1592 nm. This is about 20 nm larger than the absorption edge wavelength of 1575 nm for the Ge film. The band gap energy Eg ^C-LH between the conduction band and the light hole valence band at the Ge gamma point is 0.7736 eV, and the absorption edge wavelength is 1603 nm. Eg ^C-LH is the same as for the Ge film, and the absorption edge wavelength is almost the same, but the heavy holes have a larger density of states than the light holes, and contribute greatly to the optical absorption coefficient. The optical absorption coefficient increases in the energy (wavelength) region where ^{Eg C-HH} is reduced, which has the effect of improving the light receiving characteristics.

On the other hand, when the Ge film thickness is 5 μm (maximum value), the band gap energy Eg ^C-HH between the conduction band and heavy hole valence band at the Ge gamma point is 0.7846 eV, and the absorption edge wavelength is 1580 nm. Also, the band gap energy Eg ^C-LH between the conduction band and heavy hole valence band at the Ge gamma point is 0.7742 eV, and the absorption edge wavelength is 1602 nm. Eg ^C-HH is smaller than in the case of the Ge film, and the optical absorption coefficient increases, which has the effect of improving the light receiving characteristics.

REFERENCE SIGNS LIST 1 Germanium semiconductor device 10 Silicon substrate 10C Silicon chip 10W Silicon wafer 10a Main surface of silicon substrate 11 Trench 11a Trench sidewall surface 11b Trench bottom surface 12 Silicon protective film 20 Germanium crystal layer 22 SiO ₂ mask D Trench pattern depth E1, E2 Trench pattern formation region L Trench pattern length Ws Trench pattern spacing Wt Trench pattern width

Claims (11)

forming a trench parallel to a <010> direction in a main surface of a silicon substrate having a {100} surface orientation;
and filling the trench with germanium by chemical vapor deposition.
The depth of the trench is 2 μm or more,
4 is a schematic diagram showing a method for manufacturing a germanium semiconductor device according to the present invention; FIG. 5 is a schematic diagram showing a method for manufacturing a germanium semiconductor device according to the present invention; The method for manufacturing a germanium semiconductor device according to claim 1, wherein the width of the trench is 1 μm or less. 3. The method for manufacturing a germanium semiconductor device according to claim 1 , wherein a sidewall surface of the trench is inclined at an angle of 0.3 degrees or more and 10 degrees or less with respect to a vertical surface. 4. The method for producing a germanium semiconductor device according to claim 1 , wherein the pressure condition is 100 Pa or less. 5. The method for manufacturing a germanium semiconductor device according to claim 1 , wherein the step of forming the trenches comprises forming a plurality of the trenches at equal intervals in the main surface of the silicon substrate. 6. The method for manufacturing a germanium semiconductor device according to claim 1 , further comprising the step of forming a silicon protection film covering an upper surface of said germanium buried in said trench. A silicon substrate having a {100} surface orientation and a trench formed in a main surface thereof;
a germanium crystalline layer embedded in the trench;
The depth of the trench is 2 μm or more,
4. A germanium semiconductor device, comprising: a first insulating layer formed on said first insulating film; a second insulating layer formed on said first insulating film; 8. The germanium semiconductor device according to claim 7 , wherein the width of said trench is 1 [mu]m or less. 9. The germanium semiconductor device according to claim 7 , wherein a sidewall surface of said trench is inclined at an angle of 0.3 degrees or more and 10 degrees or less with respect to a vertical surface. 10. The germanium semiconductor device according to claim 7 , wherein a plurality of said trenches are provided at equal intervals. 11. The germanium semiconductor device according to claim 7 , further comprising a silicon protective film covering an upper surface of said germanium crystal layer.