JP7638202B2 - Method for manufacturing semiconductor device - Google Patents

Description

This disclosure relates to a method for manufacturing a semiconductor device.

Patent document 1 discloses a method for etching an interlayer insulating film using a plasma etching device to form contact holes. The method includes a step of detecting the end point of etching the interlayer insulating film using an etching end point detection device that measures the etching end point based on a change in the emission intensity of light of a specific wavelength emitted from the plasma region of the plasma etching device.

Japanese Patent Application Publication No. 11-003882

When detecting the end point of etching based on the intensity of the light emitted by the product produced during etching, the accuracy of detecting the end point of etching decreases if the intensity of the light emitted is weak.

The present disclosure is intended to solve such problems, and aims to provide a method for manufacturing a semiconductor device that enhances the intensity of the light emitted by the product produced during etching, thereby enabling the endpoint of etching to be detected with high accuracy.

The method for manufacturing a semiconductor device according to the present disclosure includes forming a semiconductor element in an element region of a semiconductor substrate, adding at least one protrusion onto an upper surface, which is one main surface in a dicing line region of the semiconductor substrate, forming a film on the upper surface in the dicing line region, forming the film so that the film covers a first step on a side surface of the at least one protrusion and the upper surface of the film has a second step, plasma etching the film, detecting an end point of the plasma etching based on the intensity of light emitted by a product generated in the plasma etching of the film, and etching a region in the dicing line region other than the region on the upper surface to which the at least one protrusion is added before the formation of the at least one protrusion, or etching a region in the dicing line region other than the region on the upper surface to which the at least one protrusion is added after the formation of the at least one protrusion and before the formation of the film, thereby making the first step larger .

This disclosure provides a method for manufacturing a semiconductor device that can accurately detect the end point of etching.

1A to 1C are diagrams showing a state during manufacturing in the manufacturing method of a semiconductor device according to a first embodiment; 1A to 1C are diagrams showing a state during manufacturing in the manufacturing method of a semiconductor device according to a first embodiment; 1A to 1C are diagrams showing a state during manufacturing in the manufacturing method of a semiconductor device according to a first embodiment; 1A to 1C are diagrams showing a state during manufacturing in the manufacturing method of a semiconductor device according to a first embodiment; 1A to 1C are diagrams showing a state during manufacturing in the manufacturing method of a semiconductor device according to a first embodiment; 1A to 1C are diagrams showing a state during manufacturing in the manufacturing method of a semiconductor device according to a first embodiment; 13A to 13C are diagrams showing a state during manufacturing in a manufacturing method of a semiconductor device according to a second embodiment; 1A to 1C are diagrams showing a state during manufacturing in the manufacturing method of a semiconductor device according to a first embodiment; 1A to 1C are diagrams showing a state during manufacturing in the manufacturing method of a semiconductor device according to a first embodiment; 1A to 1C are diagrams showing a state during manufacturing in the manufacturing method of a semiconductor device according to a first embodiment; 13A and 13B are diagrams showing an example of an arrangement of protrusions provided in a dicing line region; 1 is a diagram showing a semiconductor device according to a first embodiment; FIG. 2 is a diagram showing an element region and a dicing line region of a semiconductor substrate. 2 is a flowchart of a method for manufacturing a semiconductor device according to the first embodiment.

<A. First embodiment>
<A-1. Introduction>
Etching is one of the methods used in manufacturing semiconductor devices. For example, plasma etching is used when forming contact holes in an interlayer insulating film.

If the etching time is too short, the etching will not be sufficient, and problems will occur, such as the contact holes not reaching the diffusion region or the lower wiring, causing non-conduction. Conversely, if the etching time is too long, the etching will be excessive, and problems will occur, such as the diffusion region or the lower wiring being over-etched, causing considerable damage to the underlying layer. If etching is terminated after a predetermined time has elapsed, it is difficult to prevent these problems.

One method for ending etching at a more appropriate time is to use an End Point Detector (EPD) to detect the end point of etching based on the light emission intensity of the etching product. However, for example, when forming a contact hole by etching, if the area to be etched (i.e., the opening area of the resist used during etching) is small and the light emission intensity of the etching product released from the plasma region is weak, it is difficult to accurately determine the etching end point even when an EPD is used.

In the following, in this embodiment, a method for detecting the end point of etching with high accuracy will be described using the example of forming a contact hole in an element region by etching. However, the method described below can be applied to cases other than forming a contact hole by etching. For example, it can be applied to forming a through hole for connecting a first metal layer and a second metal layer formed on a semiconductor substrate.

<A-2. Manufacturing method＞
FIG. 14 is a flow chart showing a method for manufacturing a semiconductor device according to the present embodiment.

First, in step S1, a semiconductor substrate 3 is prepared. As shown in FIG. 13, the semiconductor substrate 3 has an element region 1 and a dicing line region 2. In the following, as an example, a description will be given assuming that the semiconductor substrate 3 is a silicon semiconductor substrate. However, the semiconductor substrate 3 may be a semiconductor substrate of a semiconductor other than a silicon semiconductor. For example, the semiconductor substrate 3 may be a SiC semiconductor or a GaN semiconductor substrate. The semiconductor substrate 3 has one main surface and the other main surface that face each other.

The semiconductor substrate 3 is an n-type silicon semiconductor substrate. Even if a p-type silicon semiconductor substrate is used as the semiconductor substrate 3, a semiconductor device having the same functions and effects as when an n-type silicon semiconductor substrate is used as the semiconductor substrate 3 can be manufactured. When a p-type silicon semiconductor substrate is used as the semiconductor substrate 3, the conductivity type of each region in the manufactured semiconductor device is opposite to that when the semiconductor substrate 3 is an n-type silicon semiconductor substrate.

The concentration of the impurity contained in the semiconductor substrate 3 is appropriately selected depending on the breakdown voltage of the semiconductor device to be manufactured. The semiconductor substrate 3 contains, for example, arsenic or phosphorus as an n-type impurity. The concentration of the n-type impurity in the semiconductor substrate 3 is, for example, 1.0E+12/cm ³ to 1.0E+15/cm ³ .

Next, in step S2, a semiconductor element structure is partially formed in each element region 1 of the semiconductor substrate 3. In step S2, the semiconductor element structure is partially formed by, for example, a process such as ion implantation or epitaxial growth. Each element region 1 includes an active region through which a main current flows and a termination region for maintaining the breakdown voltage of the semiconductor device. In a plan view, the termination region surrounds the periphery of the active region. For example, a well-known breakdown voltage maintaining structure can be appropriately selected and provided in the termination region. Also, as shown in FIG. 13, in the semiconductor substrate 3, each element region 1 is surrounded by a dicing line region 2. In other words, the active region is surrounded by the dicing line region 2.

Next, in step S3, as shown in Figures 1, 10, and 11, protrusions 4 are formed on the upper surface 3a, which is one of the main surfaces of the dicing line region 2. Figure 11 is an enlarged view of region 20 in Figure 13, and shows an example of the in-plane arrangement of protrusions 4. Figure 1 is a cross-sectional view taken along line A-A in Figure 11. Figure 10 is an enlarged view of the vicinity of protrusion 4 in Figure 1, and shows an example of the detailed configuration of protrusion 4.

As shown in FIG. 11, at least some of the multiple protrusions 4 are formed, for example, in the dicing line region 2 in a line in the X direction, which is a direction within the surface of the semiconductor substrate 3.

As shown in FIG. 11, at least some of the multiple protrusions 4 are formed in a matrix in the dicing line region 2, for example, in the X direction within the plane of the semiconductor substrate 3 and in the Y direction intersecting the X direction.

The protrusions 4 may be arranged in a different manner in addition to those arranged as shown in FIG. 11.

The film 5 to be etched (see FIG. 2) formed to cover the step 4a on the side of the protrusion 4 in step S4 described later is formed three-dimensionally by tracing the shape of the protrusion 4. As a result, the surface area of the upper surface of the film 5 to be etched, i.e., the area to be etched, becomes larger than the area of the film 5 to be etched in a planar view. By increasing the surface area of the upper surface of the film 5 to be etched, the emission intensity of the product generated by etching the film 5 to be etched in the plasma etching in step S5 described later becomes higher. By finely arranging the protrusions 4 in the in-plane direction, the surface area of the upper surface of the film 5 to be etched becomes larger. For example, as shown in FIG. 11, four or more protrusions 4 are formed in a square region 21 on the upper surface 3a in the dicing line region 2, the length of one side of which is 10 times the size of the step 4a of the protrusion 4.

The arrangement of the protrusions 4 may be any arrangement that can increase the surface area of the upper surface of the etched film 5 formed in step S4. The protrusions 4 may be arranged in a stripe pattern in the dicing line region 2. Furthermore, the protrusion 4 may be, for example, a single protrusion having a fine pattern within the surface.

The protrusion 4 may have a flush side as shown in FIG. 1, or the side may not be flush. As shown in FIG. 8, the protrusion 4 may have a different in-plane area depending on the height position, and the step 4b on the side may be a step-like step. FIG. 8 shows an example in which the step 4b on the side of the protrusion 4 is a two-step step, but the step on the side of the protrusion 4 may be a step-like step with three or more steps. By making the step 4b a step-like step, the surface area of the upper surface of the etched film 5 formed by tracing the shape of the protrusion 4 becomes larger.

10, the protrusion 4 includes, for example, a TEOS (Tetraethyl orthosilicate) layer 11, a SiN layer 10, and a polysilicon layer 12. The TEOS layer 11, the SiN layer 10, and the polysilicon layer 12 are stacked in this order from the side closer to the semiconductor substrate 3. Although not shown in FIG. 1, a film in which a TEOS layer, a SiN layer, and a polysilicon layer are stacked may be formed on the active region of the element region 1, similar to the protrusion 4 on the dicing line region 2 shown in FIG. 10. For example, in the active region, a TEOS layer as an interlayer insulating film, a SiN layer as an underlying insulating film, and a polysilicon layer as a resistor are formed. The protrusion 4 is formed, for example, as a protrusion in which the TEOS layer 11, the SiN layer 10, and the polysilicon layer 12 are laminated in the same process in which the TEOS layer, the SiN layer, and the polysilicon layer are laminated on the active region. By forming the protrusion 4 in the same process in which a film is formed in the active region, the protrusion 4 can be provided in the dicing line region 2 while suppressing manufacturing costs. Some of the multiple protrusions 4 may be protrusions including the TEOS layer 11, the SiN layer 10, and the polysilicon layer 12.

Next, in step S4, the film to be etched 5 is formed as shown in FIG. 2 and FIG. 6. FIG. 6 is an enlarged view of the vicinity of the protrusion 4 in FIG. 2. The film to be etched 5 is formed so that it covers the step 4a on the side surface of the protrusion 4. By forming it in this manner, a step 5a is also formed on the upper surface of the film to be etched 5. As a result, the surface area of the upper surface of the film to be etched 5 is increased compared to when the protrusion 4 is not present.

The film to be etched 5 is, for example, a TEOS film. The film to be etched 5 may be a film including multiple layers. For example, as shown in FIG. 9, the film to be etched 5 includes a TEOS layer 8a, an SOG (Spin On Glass) layer 9, and a TEOS layer 8b.

Next, in step S5, plasma etching is performed on the film 5 to be etched. Before performing plasma etching on the film 5 to be etched, a photoresist 6 is formed on the film 5 to be etched, as shown in FIG. 3. The photoresist 6 is formed so as to have openings in the region where the contact hole 7 is to be formed (see FIG. 4) and in the region where the protrusion 4 of the dicing line region 2 is provided.

In step S5, the film 5 to be etched in the portion corresponding to the contact hole 7 and the film 5 to be etched around the protrusion 4 are etched. The portion of the film 5 to be etched that is formed on the upper surface 3a of the element region 1 is selectively etched, and after step S5 is completed, the contact hole 7 is formed in the film 5 to be etched as shown in FIG. 4.

In the plasma etching in step S5, the light emitted from the plasma region includes light emitted by products generated by plasma etching the film 5 to be etched. In step S5, the intensity of the light emitted by products generated by plasma etching the film 5 to be etched is detected, and the etching end point is detected based on the intensity of the light emitted. For example, when a TEOS film, which is the film 5 to be etched, is etched using plasma of a gas containing _CF4 , the etching end point is detected based on the intensity of the light emitted by _SiF4 generated by the reaction of _SiO2 + 4F → _SiF4 + _O2 .

The intensity of the light emitted by the product generated by plasma etching the film to be etched 5 is detected, for example, using an EPD. In step S5, for example, a reference value for the intensity of the light emitted by the product generated by plasma etching the film to be etched 5 is set in advance, and when the intensity of the light emitted by the product generated by plasma etching the film to be etched 5 falls below the reference value, it is determined that the etching of the film to be etched 5 has ended, and the plasma etching is terminated.

The film to be etched 5 is formed to cover the step 4a, and the surface area of the upper surface of the film to be etched 5 is increased, so the intensity of the light emitted by the product generated when the film to be etched 5 is plasma etched is increased. This allows the etching end point to be detected with high accuracy. For example, even if the area of the film to be etched 5 in the element region 1 that is etched is small, the etching end point can be detected with high accuracy.

Next, in step S6, the remaining structure of the semiconductor element is formed. As a result, as shown in FIG. 5, a semiconductor element 101 is formed in the element region 1. In step S6, for example, as shown in FIG. 5, an electrode 13 is formed so as to pass through a contact hole 7 and be electrically connected to the semiconductor substrate 3. In FIG. 5, the structure inside the semiconductor substrate 3 and the structure on the underside of the semiconductor substrate 3 are omitted.

Next, in step S7, dicing is performed along the dicing line region 2. This results in individual semiconductor devices.

As described above, in the manufacturing method of the semiconductor device of this embodiment, at least one protrusion 4 is added on the upper surface 3a in the dicing line region 2, and the film to be etched 5 is formed on the upper surface 3a in the dicing line region 2 so that the film to be etched 5 covers the step 4a on the side of at least one protrusion 4, and the upper surface of the film to be etched 5 has a step 5a. Then, in the plasma etching of the film to be etched 5, the end point of the plasma etching is detected based on the intensity of the light emitted by the product generated in the plasma etching of the film to be etched 5. The film to be etched 5 formed to cover the step 4a is formed so that the upper surface of the film to be etched 5 has a step 5a. The surface area of the upper surface of the film to be etched 5 is increased by the amount of the step 5a, and the surface area of the upper surface of the film to be etched 5 is larger than the area of the film to be etched 5 in a plan view. As a result, the amount of the film to be etched 5 removed in the etching of step S5 increases, so that the reaction product from there increases, and the light emission intensity of the reaction product increases. This allows the end point of etching to be detected with high accuracy. Being able to accurately detect the etching end point makes it possible, for example, to prevent insufficient etching and excessive etching of the underlying layer.

The plasma etching in step S5 may be anisotropic etching or isotropic etching. In the case of isotropic etching, as shown in FIG. 12, the film 5 to be etched does not remain on the sidewall of the protrusion 4, so that the attenuation of the light emitted by the product produced in the plasma etching of the film 5 to be etched becomes sharper, and the end point can be detected more accurately.

When the plasma etching in step S5 is isotropic etching, a semiconductor device 100 is obtained that has a dicing line region 2 around the element region 1 in which a semiconductor element is formed in a plan view, has at least one protrusion 4 on the upper surface 3a in the dicing line region 2, and has no film covering the side surface of each of the at least one protrusion 4. At least one of the at least one protrusion 4 includes, for example, a TEOS layer 11, a SiN layer 10, and a polysilicon layer 12. The semiconductor device 100 may include the entire semiconductor substrate 3 before dicing, or may be a semiconductor substrate in which each element region 1 is divided by dicing. In dicing, the semiconductor substrate 3 is not necessarily cut in the entire dicing line region 2, but may be cut in a region narrower than the width of the dicing line region 2. Therefore, the semiconductor device 100 after dicing and division has, for example, a dicing line region 2 on the outer periphery, has at least one protrusion 4 on the upper surface 3a in the dicing line region 2, and has no film covering the side surface of each of the at least one protrusion 4.

<B. Second embodiment>
7, a recess 30 is formed in a semiconductor substrate 3. Except for the formation of the recess 30, the method for manufacturing a semiconductor device according to the present embodiment is similar to the method for manufacturing a semiconductor device according to the first embodiment.

For example, after the protrusions 4 are formed in step S3 and before the film to be etched is formed in step S4, etching is performed in the regions of the upper surface 3a of the semiconductor substrate 3 where the protrusions 4 are not formed, thereby forming the recesses 30. Also, for example, before the protrusions 4 are formed in step S3, etching is performed in the regions of the upper surface 3a of the semiconductor substrate 3 other than the regions where the protrusions 4 are formed, thereby forming the recesses 30, and then the protrusions 4 are formed in step S3.

By forming the recess 30, the step on the side of the protrusion 4 becomes larger, and as a result, the surface area of the upper surface of the film to be etched 5 formed to cover the side of the protrusion 4 becomes larger. Therefore, the amount of the film to be etched 5 that is removed in the etching of step S5 increases, and the reaction products generated therefrom increase, and the emission intensity of the reaction products increases. This makes it possible to detect the end point of the etching with greater accuracy. This makes it possible, for example, to prevent insufficient etching and prevent excessive etching of the underlying layer.

The embodiments can be freely combined, modified, or omitted as appropriate.

1 Element region, 2 Dicing line region, 3 Semiconductor substrate, 3a Upper surface, 4 Protrusion, 4a, 4b, 5a Step, 5 Film to be etched, 6 Photoresist, 7 Contact hole, 8a, 8b, 11 TEOS layer, 9 SOG layer, 10 SiN layer, 12 Polysilicon layer, 13 Electrode, 30 Recess, 100 Semiconductor device, 101 Semiconductor element.

Claims (8)

forming a semiconductor element in an element region of a semiconductor substrate;
adding at least one protrusion onto an upper surface, which is one of the main surfaces, in a dicing line region of the semiconductor substrate;
forming a film on the upper surface in the dicing line region;
In the formation of the film, the film is formed so that the film covers a first step on a side surface of the at least one protrusion and a top surface of the film has a second step;
Plasma etching the film;
In the plasma etching, an end point of the plasma etching is detected based on an intensity of light emitted by a product generated in the plasma etching of the film;
etching a region of the upper surface in the dicing line region other than the region to which the at least one protrusion is added before forming the at least one protrusion, or etching a region of the upper surface in the dicing line region other than the region to which the at least one protrusion is added after forming the at least one protrusion and before forming the film, thereby making the first step larger;
A method for manufacturing a semiconductor device. 2. The method of manufacturing a semiconductor device according to claim 1,
In the formation of the film, the film is also formed on the upper surface of the element region;
In the plasma etching, a portion of the film formed on the upper surface of the element region is selectively etched.
A method for manufacturing a semiconductor device. forming a semiconductor element in an element region of a semiconductor substrate;
adding at least one protrusion onto an upper surface, which is one of the main surfaces, in a dicing line region of the semiconductor substrate;
forming a film on the upper surface in the dicing line region;
In the formation of the film, the film is formed so that the film covers a first step on a side surface of the at least one protrusion and a top surface of the film has a second step;
Plasma etching the film;
In the plasma etching, an end point of the plasma etching is detected based on an intensity of light emitted by a product generated in the plasma etching of the film;
The first step is a step having two or more steps.
A method for manufacturing a semiconductor device. 4. A method for manufacturing a semiconductor device according to claim 1 , comprising the steps of:
the film includes a first TEOS layer, a SOG layer, and a second TEOS layer;
A method for manufacturing a semiconductor device. 5. A method for manufacturing a semiconductor device according to claim 1 , comprising the steps of:
the at least one protrusion is a plurality of protrusions;
At least some of the protrusions are arranged on the upper surface in the dicing line region of the semiconductor substrate, and are aligned in a first direction in the plane of the upper surface.
A method for manufacturing a semiconductor device. forming a semiconductor element in an element region of a semiconductor substrate;
adding at least one protrusion onto an upper surface, which is one of the main surfaces, in a dicing line region of the semiconductor substrate;
forming a film on the upper surface in the dicing line region;
In the formation of the film, the film is formed so that the film covers a first step on a side surface of the at least one protrusion and a top surface of the film has a second step;
Plasma etching the film;
In the plasma etching, an end point of the plasma etching is detected based on an intensity of light emitted by a product generated in the plasma etching of the film;
the at least one protrusion is a plurality of protrusions;
At least some of the plurality of protrusions are arranged in a matrix on the upper surface in the dicing line region of the semiconductor substrate, in a first direction within the upper surface and in a second direction intersecting the first direction.
A method for manufacturing a semiconductor device. forming a semiconductor element in an element region of a semiconductor substrate;
adding at least one protrusion onto an upper surface, which is one of the main surfaces, in a dicing line region of the semiconductor substrate;
forming a film on the upper surface in the dicing line region;
In the formation of the film, the film is formed so that the film covers a first step on a side surface of the at least one protrusion and a top surface of the film has a second step;
Plasma etching the film;
In the plasma etching, an end point of the plasma etching is detected based on an intensity of light emitted by a product generated in the plasma etching of the film;
the at least one protrusion is a plurality of protrusions;
four or more of the plurality of protrusions are arranged within a square region, the square region having a side length ten times the size of the first step, on the upper surface in a dicing line region of the semiconductor substrate;
A method for manufacturing a semiconductor device. 8. A method for manufacturing a semiconductor device according to claim 1 , comprising the steps of:
At least one of the at least one protrusions includes a polysilicon layer, a SiN layer, and a TEOS layer;
A method for manufacturing a semiconductor device.

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