JP7639669B2 - Power Conversion Equipment - Google Patents

Description

The present invention relates to a method for controlling a power conversion device equipped with virtual synchronous generator control.

Conventionally, for example, Patent Document 1 has proposed a synchronization control method in which, when synchronizing a generator with a power supply system, the generator speed is controlled by feeding back the frequency and phase of the power supply system to be synchronized, thereby synchronizing the phase of the generator with the power supply system.

On the other hand, there are prior art examples of power conversion devices that use a virtual synchronous generator model (VSG (Virtual Synchronous Generators) model) control that simulates the oscillation equation of a synchronous generator, such as those in Patent Documents 2 and 3. The power conversion device operates like a generator (virtual generator) that operates at a frequency determined by the oscillation equation.

JP 2003-284246 A JP 2017-127141 A Patent No. 6386718

The system configuration assumed in this invention is shown in Figure 1, and the VSG model inside the power converter is shown in Figure 2. The system configuration assumes synchronous input to the power system, as in Patent Document 1, but there is a power converter that performs virtual synchronous generator control instead of a generator, and a distributed power source is connected to the system.

In FIG. 1, a distributed power source 3 and a premises load 4 are connected to the output side of the power supply system 1 via circuit breakers 2a, 2b, and 2c.

5 is a power converter equipped with semiconductor switching elements that converts DC power to AC power by virtual synchronous generator control. The AC output side of the power converter 5 is connected to the common connection point 8 of the circuit breaker 2a and the circuit breakers 2b and 2c via the LC filter section 6, the transformer 7, and the circuit breaker 2d.

9 is a synchronization control unit that performs synchronization control by feeding back a signal (Vsys) detected by an instrument transformer 10 that indicates the system voltage of the power supply system 1.

11 is an output power calculation unit that calculates the output power of the power converter 5 based on the current value obtained by detecting the output current of the LC filter unit 6 using a current transformer 12 and converting it into a coordinate value using a uvw/dq coordinate converter 13, and the voltage value obtained by detecting the output voltage of the LC filter unit 6 using an instrument transformer 14 and converting it into a coordinate value using a uvw/dq coordinate converter 15, and outputs the output power as an electrical output Pe.

16 is a voltage controller (AVR) that controls the voltage value output from the coordinate converter 15 to be the output voltage command value |Vac|* of the power converter 5.

17 is a VSG model that receives the machine input command Pm, the output Pm_sync of the synchronization control unit 9, and the output Pe of the output power calculation unit 11 as inputs, and outputs the output frequency ωr using the configuration shown in FIG. 2, which will be described later.

18 is an integrator that integrates the output frequency ωr output from the VSG model 17 and outputs the phase θr.

The output voltage of the voltage controller 16 is coordinate-converted by the dq/uvw coordinate converter 19 to obtain the uvw-phase voltage commands.

20 is a PWM modulator that generates a gate signal that controls the semiconductor switching elements of the power converter 5 by comparing the uvw phase voltage commands with a carrier signal.

The uvw/dq coordinate converters 13, 15 and dq/uvw coordinate converter 19 each perform coordinate conversion using the phase θr output from the integrator 18.

In FIG. 2, which shows the configuration of the VSG model 17, the synchronous control output Pm_sync (the output of the synchronous control unit 9 in FIG. 1) and the machine input command Pm are added by an adder 21, and the sum output is subtracted by an electrical output Pe (the output of the output power calculation unit 11 in FIG. 1) in a subtractor 22.

23 is a subtractor that subtracts the output of the governor term (the output obtained by multiplying the previous value of the frequency deviation component by the governor gain) described below from the sum output of the adder 22.

24 is an integrator that integrates the output of the subtractor 23 by the calculation period Ts/inertia constant M.

The output of the integrator 24 is added to the output of the buffer 26 (described below) in the adder 25 to obtain the frequency deviation Δωr.

The buffer 26 delays the frequency deviation Δωr for one calculation and outputs the previous value of the frequency deviation component.

27 is a multiplier that multiplies the previous value of the frequency deviation component output from the buffer 26 by the governor gain Kgov, and the output of the multiplier 27 becomes the output of the governor term.

28 is an adder that adds 1, which represents the rated frequency, to the frequency deviation Δωr output from adder 25 to output the output frequency ωr.

Here, consider a case where the output frequency of the power converter 5, which performs virtual synchronous generator control, is controlled by feedback control (synchronization control) of frequency and phase, and synchronization is input to the power supply system 1. The content of the synchronization control can be proportional control or proportional-integral control, which uses the phase difference between the synchronization target and the VSG model as a deviation, or a combination of frequency offset and phase control as in Patent Document 1. The output Pm_sync of the synchronization control is added to the machine input command Pm of the VSG model 17 to control the output frequency.

At this time, depending on the design of the inertia constant M of the VSG model, the governor gain Kgov, and the synchronization control unit, the output frequency ωr of the VSG model 17 may suddenly change, increasing the rate of change of frequency (RoCoF), which may cause a distributed power source (3) such as a solar PCS connected to the power conversion device to erroneously detect islanding.

In a virtual synchronous generator, the inertia constant M and governor gain Kgov can be freely changed at any time, so synchronous control is required that operates while keeping the frequency change rate below a certain level, regardless of the parameters.

The present invention aims to solve the above problem, and its purpose is to limit the rate of change of the output frequency of a VSG model in a power conversion device in which virtual synchronous generator control is performed by a VSG model.

In order to solve the above problem, the power conversion device according to claim 1 is
A power conversion device that is connected to a common connection point between a power supply system and a distributed power supply so as to be interconnectable with the distributed power supply, and that performs virtual synchronous generator control using a VSG (Virtual Synchronous Generators) model,
The VSG model is
an adding/subtracting unit that subtracts an electric output obtained by detecting an output power of a power conversion device from an added output of a synchronous control output obtained by performing synchronous control by feeding back a signal that detects a voltage of the power supply system and a machine input command;
an integral term that integrates a difference between an output of the adding/subtracting unit and a previous value of a frequency deviation component multiplied by a governor gain, using an inertia constant and a calculation period, to output a frequency deviation component;
a governor term that multiplies a previous value of the frequency deviation component output from the integral term by a governor gain;
an output frequency generating unit that adds a rated frequency component to the frequency deviation component to generate an output frequency;
a change rate limiting processing unit in the adding/subtracting unit that applies a change rate limiting process to the synchronous control output before it is added to the machine input, the change rate limiting processing unit having a subtractor that subtracts the output of the governor term from the synchronous control output to obtain a change amount of the synchronous control output, a limiter that limits the change amount of the synchronous control output obtained by the subtractor to within a set frequency change rate limit value range, and an adder that adds the output of the governor term to the output of the limiter;
The present invention is characterized in that it is provided with:

The power conversion device according to claim 2,
A power conversion device that is connected to a common connection point between a power supply system and a distributed power supply so as to be interconnectable with the distributed power supply, and that performs virtual synchronous generator control using a VSG (Virtual Synchronous Generators) model,
The VSG model is
an adder/subtractor that adds a synchronous control output resulting from synchronous control performed by feeding back a signal that detects the voltage of the power supply system and a machine input command, and then subtracts an electric output that detects the output power of a power conversion device from the added output;
an integral term that integrates a difference between an output of the adding/subtracting unit and a previous value of a frequency deviation component multiplied by a governor gain, using an inertia constant and a calculation period, to output a frequency deviation component;
a governor term that multiplies a previous value of the frequency deviation component output from the integral term by a governor gain;
an output frequency generating unit that adds a rated frequency component to the frequency deviation component to generate an output frequency;
a change rate limiting processing unit in the adding/subtracting unit that applies a change rate limiting process to an added output of the synchronous control output and a machine input command, the change rate limiting processing unit having a subtractor that subtracts an output of the governor term from the added output of the synchronous control output and the machine input command, a limiter that limits the output of the subtractor within a set frequency change rate limit value range, and an adder that adds the output of the governor term to the output of the limiter;
The present invention is characterized in that it is provided with:

The power conversion device according to claim 3 is the power conversion device according to claim 1 or 2,
The frequency change rate limiting value ωratelim of the change rate limiting processor in the VSG model is set to satisfy the following formula (4).

(Pin is the output of the addition and subtraction unit, M is the inertia constant of the integral term, Kgov is the governor gain in the governor term, Δωr(n-1) is the previous value of the frequency deviation component)

(1) According to the invention described in claims 1 and 3, the rate of change in the output frequency of the VSG model due to changes in the synchronous control output is limited, making it possible to prevent erroneous detection of islanding of a distributed power source connected to a power conversion device under synchronous control.
(2) According to the invention described in claims 2 and 3, the rate of change in the output frequency of the VSG model due to changes in the synchronous control output and the mechanical input is limited, making it possible to prevent erroneous detection of islanding of a distributed power source connected to a power conversion device under synchronous control.

1 is a system configuration diagram of a power conversion device to which the present invention is applied; FIG. 1 is a diagram showing the configuration of a conventional VSG model. FIG. 2 is a configuration diagram of a VSG model according to the first embodiment of the present invention. FIG. 11 is a configuration diagram of a VSG model according to a second embodiment of the present invention. FIG. 1 is a diagram showing the configuration of a simplified VSG model.

The following describes an embodiment of the present invention with reference to the drawings, but the present invention is not limited to the following embodiment.

In this embodiment 1, the VSG model 17 in the system configuration of FIG. 1 is configured as shown in FIG. 3. In FIG. 3, the same parts as in FIG. 2 are denoted by the same reference numerals. The difference between FIG. 3 and FIG. 2 is that a change rate limiting processing unit 30 that limits the change rate of the output frequency ωr of the VSG model 17 is provided between the input part of the synchronous control output Pm_sync and one input end of the adder 21, and the other parts are configured in the same way as in FIG. 2.

The adder 21 and subtractor 22 constitute the addition/subtraction unit of the present invention, the buffer 26 and multiplier 27 constitute the governor term of the present invention, and the adder 28 constitutes the output frequency generation unit of the present invention.

The subtractor 31 in the rate-of-change limiting processing unit 30 calculates the amount of change in the synchronous control output by subtracting the governor term output, i.e., the value obtained by multiplying the previous output frequency deviation Δωr (output of the buffer 26) by the governor gain Kgov (output of the multiplier 27), from the synchronous control output Pm_sync.

32 in the change rate limiting processing unit 30 is a limiter that inputs the change amount of the synchronous control output output from the subtractor 31 as is if it is within the range of ±M*frequency change rate limit value ωratelim, and limits the change amount to M*ωratelim if it is outside ±M*ωratelim.

The output of limiter 32 is added to the output of the governor term (the output of multiplier 27) in adder 33, and the output of adder 33 is added to the machine input command Pm in adder 21.

The configuration and operation of the subtractor 22 and subsequent components, which subtract the electrical output Pe from the output of the adder 21, are the same as those described in Figure 2, but for analysis purposes, the VSG model is simplified as shown in Figure 5.

In Figure 5, the same parts as in Figure 3 are indicated by the same reference numerals, and the input Pin represents the output of the adder-subtractor unit of the present invention, i.e., the output of the subtractor 22.

In FIG. 5, the rate of change dωr/dt of the frequency deviation Δωr(n) (n is the number of calculations) output from the adder 25 is calculated from the previous value Δωr(n-1) stored in the buffer 26, the input Pin, and the calculation period Ts, as shown in the following equations (1) and (2).

Here, the Pin condition for suppressing the rate of change dωr/dt to be equal to or less than the frequency rate of change limit value ωratelim is calculated using the following equations (3) and (4).

Therefore, by applying a limiting process to Pin so as to satisfy equation (4), it is possible to limit the frequency change rate to a value equal to or less than the frequency change rate limit value ωratelim.

Now, if we apply equation (4) to the VSG model in Figure 2, Pin becomes the following equation (5).

To suppress the rate of change dωr/dt, the frequency deviation Δωr output from the adder 25 may be directly limited, but since the mechanical input Pm and electrical output Pe of the input respond to fluctuations during command changes and system disturbances, there are cases where it is undesirable to limit the frequency rate of change. Therefore, by using the input limit using equation (4), the frequency rate of change limit is imposed only on the terms that are to be subject to the rate of change limit.

As described above, according to the first embodiment, the limiting process of formula (4) is applied only to the synchronous control output Pm_sync, thereby limiting the frequency change rate of the VSG model due to changes in the synchronous control output. The frequency change rate due to changes in the mechanical input Pm or the electrical output Pe is not limited. By limiting the frequency change rate due to the input from the synchronous control to less than a certain value, it is possible to prevent erroneous detection of isolated operation of the distributed power source (3) connected to the power conversion device under synchronous control.

In this second embodiment, the VSG model 17 in the system configuration of FIG. 1 is configured as shown in FIG. 4. In FIG. 4, the same parts as in FIG. 2 are denoted by the same reference numerals. The difference between FIG. 4 and FIG. 2 is that a change rate limiting processing unit 40 that limits the change rate of the output frequency ωr of the VSG model 17 is provided between the output side of the adder 21 and the positive input terminal of the subtractor 22, and the other parts are configured in the same way as in FIG. 2.

The adder 21 and subtractor 22 constitute the addition/subtraction unit of the present invention, the buffer 26 and multiplier 27 constitute the governor term of the present invention, and the adder 28 constitutes the output frequency generation unit of the present invention.

The subtractor 41 in the change rate limiting processing unit 40 is a subtractor that calculates the amount of change in Pm' by subtracting the governor term output, i.e., the value obtained by multiplying the deviation Δωr of the previous output frequency (the output of the buffer 26) by the governor gain Kgov (the output of the multiplier 27), from the mechanical input Pm', which is the sum output of the adder 21.

In the change rate limiting processing unit 40, 42 is a limiter that inputs the output of the subtractor 41 (the amount of change in Pm') as is if it is within the range of ±M*frequency change rate limit value ωratelim, and limits the amount of change to M*ωratelim if it is outside ±M*ωratelim.

The output of limiter 42 is added to the output of the governor term (the output of multiplier 27) in adder 43, and the output of adder 43 has the electrical output Pe subtracted from it in subtractor 22. The configuration and operation of subtractor 22 and subsequent components are the same as those described in FIG. 2.

In this second embodiment, as in the first embodiment, the configuration after the subtractor 22 is considered as a simplified VSG model as shown in FIG. 5, and the rate of change of the output frequency of the VSG model can be limited based on the above equations (1) to (4).

As described above, according to the second embodiment, by providing the change rate limiting process of formula (4) after adding the mechanical input command Pm and the synchronous control output Pm_sync (output of adder 21), the frequency change rate of the VSG model due to changes in the synchronous control output and the mechanical input command is limited. The frequency change rate due to the influence of changes in the electrical output Pe is not limited. By limiting the frequency change rate due to the mechanical input and the input from the synchronous control to less than a certain value, it is possible to prevent erroneous detection of islanding of the distributed power source (3) connected to the power conversion device under synchronous control.

Here, the selection conditions between Example 1 and Example 2 will be explained. When the fluctuation of the synchronous control output Pm_sync is large, it is better to use Example 1. When the fluctuation of the machine input command Pm or the machine input Pm' is large, it is better to use Example 2.

REFERENCE SIGNS LIST 1...power supply system 2a to 2d...circuit breaker 3...distributed power source 4...premises load 5...power converter 9...synchronization control unit 11...output power calculation unit 13, 15...uvw/dq coordinate converter 16...voltage controller 17...VSG model 18, 24...integrator 19...dq/uvw coordinate converter 20...PWM modulator 21, 25, 28, 33, 43...adder 22, 23, 31, 41...subtractor 26...buffer 27...multiplier 30, 40...change rate limiting processing unit

Claims (3)

A power conversion device that is connected to a common connection point between a power supply system and a distributed power supply so as to be interconnectable with the distributed power supply, and that performs virtual synchronous generator control using a VSG (Virtual Synchronous Generators) model,
The VSG model is
an adding/subtracting unit that subtracts an electric output obtained by detecting an output power of a power conversion device from an added output of a synchronous control output obtained by performing synchronous control by feeding back a signal that detects a voltage of the power supply system and a machine input command;
an integral term that integrates a difference between an output of the adding/subtracting unit and a previous value of a frequency deviation component multiplied by a governor gain, using an inertia constant and a calculation period, to output a frequency deviation component;
a governor term that multiplies a previous value of the frequency deviation component output from the integral term by a governor gain;
an output frequency generating unit that adds a rated frequency component to the frequency deviation component to generate an output frequency;
a change rate limiting processing unit in the adding/subtracting unit that applies a change rate limiting process to the synchronous control output before it is added to the machine input, the change rate limiting processing unit having a subtractor that subtracts the output of the governor term from the synchronous control output to obtain a change amount of the synchronous control output, a limiter that limits the change amount of the synchronous control output obtained by the subtractor to within a set frequency change rate limit value range, and an adder that adds the output of the governor term to the output of the limiter;
A power conversion device comprising: A power conversion device that is connected to a common connection point between a power supply system and a distributed power supply so as to be interconnectable with the distributed power supply, and that performs virtual synchronous generator control using a VSG (Virtual Synchronous Generators) model,
The VSG model is
an adder/subtractor that adds a synchronous control output resulting from synchronous control performed by feeding back a signal that detects the voltage of the power supply system and a machine input command, and then subtracts an electric output that detects the output power of a power conversion device from the added output;
an integral term that integrates a difference between an output of the adding/subtracting unit and a previous value of a frequency deviation component multiplied by a governor gain, using an inertia constant and a calculation period, to output a frequency deviation component;
a governor term that multiplies a previous value of the frequency deviation component output from the integral term by a governor gain;
an output frequency generating unit that adds a rated frequency component to the frequency deviation component to generate an output frequency;
a change rate limiting processing unit in the adding/subtracting unit that applies a change rate limiting process to an added output of the synchronous control output and a machine input command, the change rate limiting processing unit having a subtractor that subtracts an output of the governor term from the added output of the synchronous control output and the machine input command, a limiter that limits the output of the subtractor within a set frequency change rate limit value range, and an adder that adds the output of the governor term to the output of the limiter;
A power conversion device comprising: 3. The power conversion device according to claim 1, wherein a frequency change rate limiting value ωratelim of a change rate limiting processor in the VSG model is set so as to satisfy the following formula (4).

(Pin is the output of the addition and subtraction unit, M is the inertia constant of the integral term, Kgov is the governor gain in the governor term, and Δωr(n-1) is the previous value of the frequency deviation component.)

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