JP7655828B2 - Gate driver for power semiconductor device and power conversion device - Google Patents

Description

The present invention relates to a gate drive device for a power semiconductor device and a power conversion device.

Various gate drive devices have been proposed that turn on and off each of the semiconductor switching elements, which are multiple power semiconductor elements connected in series.

For example, in a semiconductor switch circuit including a plurality of voltage-driven semiconductor elements connected in series to form an arm, and a gate drive circuit that supplies a gate signal to the gate terminal of each of the plurality of voltage-driven semiconductor elements in each arm, a control device for series-connected voltage-driven semiconductor elements is known, characterized in that the gate lines connecting the gate drive circuit to the gate terminals of each of the voltage-driven semiconductor elements in each arm are magnetically coupled to each other (see, for example, Patent Document 1).

For example, a gate drive device for turning on and off a plurality of voltage-driven semiconductor elements connected in series to each arm of a power conversion device is known, which includes an overvoltage determination circuit that detects the voltage applied to the voltage-driven semiconductor elements and determines whether it is an overvoltage, and an overdrive circuit that turns on the voltage-driven semiconductor elements with a voltage higher than the normal forward bias voltage when the voltage-driven semiconductor elements are turned on. When an imbalance occurs in the voltage applied to each voltage-driven semiconductor element due to a difference in the turn-on timing of each of the voltage-driven semiconductor elements connected in series and an overvoltage is detected by the overvoltage determination circuit, the overdrive circuit turns on the voltage-driven semiconductor element to which an overvoltage has been applied with a voltage higher than the normal forward bias voltage, thereby preventing the application of an overvoltage to the voltage-driven semiconductor elements and the resulting element destruction (see, for example, Patent Document 2).

Patent No. 4396036 Patent No. 4449190

In the invention described in Patent Document 1 (JP Patent No. 4396036), the gate lines of the voltage-driven semiconductor element are magnetically coupled, and if the current values flowing through the gate lines differ when the voltage-driven semiconductor element is turned on or off, the impedance of the gate lines is instantly changed according to the difference, thereby matching the gate currents and suppressing the variation in switching timing. However, the invention described in Patent Document 1 (JP Patent No. 4396036) has the effect of correcting the time difference in gate voltage due to the delay of the gate voltage signal and matching the switching timing of the on operation or off operation when the gate threshold voltages (the gate voltages at which the voltage-driven semiconductor element starts to turn on) of the voltage-driven semiconductor elements are the same, but the effect is small when the gate threshold voltages are different. In many cases, the gate threshold voltage varies depending on the voltage-driven semiconductor element, so the effect of matching the switching timing of the on operation and the off operation is poor, and the imbalance of the applied voltage during the on operation and the off operation becomes large.

For example, by applying the technology of setting the gate voltage of an element that turns on slowly, as in the invention described in Patent Document 2 (Patent Publication No. 4449190), to the invention described in Patent Document 1, it is possible to align the switching timing of the on-operation of each of multiple voltage-driven semiconductor elements, but it is not possible to align the switching timing of the off-operation of each of multiple power semiconductor elements. Also, if the gate voltage is set high, the on-operation of the voltage-driven semiconductor element that operates slowly can be accelerated due to the delay in the gate voltage signal, and the switching timing can be aligned, but the off-operation is delayed compared to when the gate voltage is not high, so the switching timing of each voltage-driven semiconductor element when it turns off is significantly shifted, and the imbalance of the applied voltage becomes large.

Therefore, in a gate drive device for multiple power semiconductor elements connected in series and a power conversion device equipped with the same, there is a need for technology that can align the switching timing for the on and off operations of each power semiconductor element and suppress imbalances in the voltages applied to the power semiconductor elements, even if there is variation in the transmission time of the gate signal and the characteristics of the power semiconductor elements.

According to one aspect of the present disclosure, a gate drive device for a plurality of power semiconductor elements connected in series includes a gate drive voltage variable unit provided in correspondence with the power semiconductor elements and outputting a variable gate drive voltage, gate lines that supply the gate drive voltage output from the gate drive voltage variable unit to the gate terminals of the corresponding power semiconductor elements, and a magnetic coupling unit that magnetically couples each of the gate lines to each other.

Here, in the above gate drive device, the gate drive voltage variable unit may vary the potential of the gate drive voltage to be output in accordance with the difference in electrical characteristics between the power semiconductor elements.

In addition, in the above gate drive device, the gate drive voltage variable section corresponding to the power semiconductor element having the first gate threshold voltage may output a positive side potential and a negative side potential of the gate drive voltage that are lower than the positive side potential and the negative side potential of the gate drive voltage output by the gate drive voltage variable section corresponding to the power semiconductor element having the second gate threshold voltage higher than the first gate threshold voltage.

In addition, in the above gate drive device, each of the gate drive voltage variable sections has a positive side potential output section that outputs a positive side potential of the gate drive voltage, and a negative side potential output section that is connected in series to the positive side potential output section and outputs a negative side potential of the gate drive voltage, and in each of the gate drive voltage variable sections, the potential at the intermediate terminal that is the connection point between the positive side potential output section and the negative side potential output section is the same as the potential at the output terminal of the power semiconductor element corresponding to the gate drive voltage variable section, and the potential difference between the positive side potential output by the gate drive voltage variable section corresponding to the power semiconductor element having the second gate threshold voltage and the potential at the intermediate terminal may be greater than the potential difference between the positive side potential output by the gate drive voltage variable section corresponding to the power semiconductor element having the first gate threshold voltage and the potential at the intermediate terminal.

In addition, in the above gate drive device, each of the gate drive voltage variable sections has a positive side potential output section that outputs a positive side potential of the gate drive voltage, and a negative side potential output section that is connected in series to the positive side potential output section and outputs a negative side potential of the gate drive voltage, and in each of the gate drive voltage variable sections, the potential at the intermediate terminal that is the connection point between the positive side potential output section and the negative side potential output section is the same as the potential at the output terminal of the power semiconductor element corresponding to the gate drive voltage variable section, and the potential difference between the potential at the intermediate terminal of the gate drive voltage variable section corresponding to the power semiconductor element having the second gate threshold voltage and the negative side potential output by the gate drive voltage variable section may be smaller than the potential difference between the potential at the intermediate terminal of the gate drive voltage variable section corresponding to the power semiconductor element having the first gate threshold voltage and the negative side potential output by the gate drive voltage variable section.

In addition, in the above gate drive device, the gate drive voltage variable section corresponding to the power semiconductor element having the first gate threshold voltage may output a positive side potential and a negative side potential of the gate drive voltage that are higher than the positive side potential and the negative side potential of the gate drive voltage output by the gate drive voltage variable section corresponding to the power semiconductor element having a third gate threshold voltage lower than the first gate threshold voltage.

In the gate drive device, each of the gate drive voltage variable sections has a positive side potential output section that outputs a positive side potential of the gate drive voltage, and a negative side potential output section that is connected in series to the positive side potential output section and outputs a negative side potential of the gate drive voltage, and in each of the gate drive voltage variable sections, the potential at the intermediate terminal that is the connection point between the positive side potential output section and the negative side potential output section is the same as the potential at the output terminal of the power semiconductor element corresponding to the gate drive voltage variable section, and the potential difference between the positive side potential output by the gate drive voltage variable section corresponding to the power semiconductor element having the third gate threshold voltage and the potential at the intermediate terminal may be smaller than the potential difference between the positive side potential output by the gate drive voltage variable section corresponding to the power semiconductor element having the first gate threshold voltage and the potential at the intermediate terminal.

In addition, in the above gate drive device, each of the gate drive voltage variable sections has a positive side potential output section that outputs a positive side potential of the gate drive voltage, and a negative side potential output section that is connected in series to the positive side potential output section and outputs a negative side potential of the gate drive voltage, and in each of the gate drive voltage variable sections, the potential at the intermediate terminal that is the connection point between the positive side potential output section and the negative side potential output section is the same as the potential at the output terminal of the power semiconductor element corresponding to the gate drive voltage variable section, and the potential difference between the potential at the intermediate terminal of the gate drive voltage variable section corresponding to the power semiconductor element having the third gate threshold voltage and the negative side potential output by the gate drive voltage variable section may be larger than the potential difference between the potential at the intermediate terminal of the gate drive voltage variable section corresponding to the power semiconductor element having the first gate threshold voltage and the negative side potential output by the gate drive voltage variable section.

The gate drive device may further include a temperature sensor provided corresponding to each of the power semiconductor elements, and each of the gate drive voltage variable units may change the positive and negative potentials of the gate drive voltage according to the temperature of the power semiconductor element detected by the corresponding temperature sensor.

In addition, in the gate drive device, each of the positive and negative potentials of the gate drive voltage output from the gate drive voltage variable section corresponding to the power semiconductor element corresponding to the temperature sensor that detected the first temperature may be lower than each of the positive and negative potentials of the gate drive voltage output from the gate drive voltage variable section corresponding to the power semiconductor element corresponding to the temperature sensor that detected the second temperature that is lower than the first temperature.

In addition, in the gate drive device, the gate drive voltage variable section corresponding to the power semiconductor element corresponding to the temperature sensor that detected the first temperature may output a positive side potential and a negative side potential of the gate drive voltage that are higher than the positive side potential and the negative side potential of the gate drive voltage output by the gate drive voltage variable section corresponding to the power semiconductor element corresponding to the temperature sensor that detected a third temperature higher than the first temperature.

According to one aspect of the present disclosure, the power conversion device includes the gate drive device, a power conversion circuit section having an arm with a plurality of power semiconductor elements connected in series and performing power conversion operation in response to the on/off operation of the power semiconductor elements, and a power conversion control section that controls the power conversion operation of the power conversion circuit section.

Here, in the above power conversion device, each of the gate drive voltage variable units may change the positive side potential and the negative side potential of the gate drive voltage according to the value of the current output from the power conversion circuit unit.

In addition, in the above power conversion device, each of the gate drive voltage variable units may change the positive side potential and the negative side potential of the gate drive voltage according to the value of a current command generated by the power conversion control unit to control the on/off operation of the power conversion circuit unit.

According to one aspect of the present disclosure, in a gate drive device for multiple power semiconductor elements connected in series and a power conversion device including the same, even if there is variation in the transmission time of the gate signal or the characteristics of the power semiconductor elements, it is possible to align the switching timing for the on and off operations of each of the power semiconductor elements and suppress imbalances in the voltages applied to the power semiconductor elements.

FIG. 2 is a circuit diagram illustrating a gate driver according to one embodiment of the present disclosure. 11 is a circuit diagram showing a modified example of a gate drive voltage variable section in the gate drive device according to an embodiment of the present disclosure. FIG. FIG. 2 illustrates a magnetic coupling portion in a gate drive device according to an embodiment of the present disclosure. FIG. 1 illustrates a power converter including a gate drive according to one embodiment of the present disclosure. 5 is a circuit diagram showing an arm provided in the power conversion device shown in FIG. 4. FIG. 11 is a diagram for explaining the definition of the gate voltage imbalance degree when two power semiconductor elements have different characteristics, where (A) shows the definition of the gate voltage imbalance degree during off operation, and (B) shows the definition of the gate voltage imbalance degree during on operation. FIG. 11 is a diagram illustrating simulation results of the degree of imbalance when there is a magnetic coupling of gate lines in Patent Document 1 (Japanese Patent No. 4396036) and when there is a variation in the characteristics of power semiconductor elements; 11A and 11B are diagrams illustrating simulation results of imbalance in an embodiment of the present disclosure when there is variation in the characteristics of power semiconductor elements; 1 is a circuit diagram showing a gate driver for turning on and off three power semiconductor devices connected in series according to an embodiment of the present disclosure; FIG. 1 is a circuit diagram showing a gate driver according to a first modified example of an embodiment of the present disclosure. 13 is a diagram illustrating a simulation result of the imbalance degree in the first modified example of the embodiment of the present disclosure when there is variation in the characteristics of the power semiconductor elements; FIG. 1 is a diagram illustrating an example of the relationship between the temperature, the gate-source voltage, and the drain current of a power semiconductor device. FIG. 11 is a circuit diagram showing a gate driver according to a second modified example of an embodiment of the present disclosure.

The gate drive device and power conversion device for power semiconductor devices will be described below with reference to the drawings. In each drawing, similar components are given similar reference symbols. In addition, the scale of these drawings has been appropriately changed to facilitate understanding. The illustrated forms are one example for carrying out the invention, and the invention is not limited to these forms.

The gate drive device according to each embodiment of the present disclosure drives a plurality of power semiconductor elements connected in series to turn on and off. Examples of power semiconductor elements include MOSFETs, IGBTs, thyristors, GTOs, and transistors. A MOSFET has a gate terminal, a drain terminal, and a source terminal as its terminals. An IGBT has a gate terminal, an emitter terminal, and a collector terminal as its terminals. A transistor has a base terminal, an emitter terminal, and a collector terminal as its terminals. A thyristor and a GTO have a gate terminal, an anode terminal, and a cathode terminal as its terminals. Below, as an example, a case where the power semiconductor element is configured with a MOSFET will be described, but each embodiment of the present disclosure can be applied even if the power semiconductor element is an IGBT, a thyristor, a GTO, or a transistor. Furthermore, when the power semiconductor element is configured with an IGBT, the "drain" is replaced with the "collector" and the "source" is replaced with the "emitter", and each embodiment of the present disclosure is applied. Furthermore, when the power semiconductor element is configured as a transistor, the "gate" is replaced with the "base", the "drain" is replaced with the "collector", and the "source" is replaced with the "emitter" in each embodiment of the present disclosure. Furthermore, when the power semiconductor element is configured as a thyristor or a GTO, the "gate" is replaced with the "base", the "drain" is replaced with the "anode", and the "source" is replaced with the "cathode" in each embodiment of the present disclosure. Furthermore, the "output terminal of the power semiconductor element" corresponds to the "source terminal" of a MOSFET, the "emitter terminal" of an IGBT and a transistor, and the "cathode terminal" of a thyristor and a GTO.

Figure 1 is a circuit diagram showing a gate driver according to one embodiment of the present disclosure. Hereinafter, components with the same reference symbols in different drawings have the same functions.

A gate driver 1 according to an embodiment of the present disclosure drives a plurality of power semiconductor elements connected in series to turn on and off. Here, as an example, a description will be given of an example in which two power semiconductor elements _QA and _QB connected in series are driven on and off.

A diode D _A is connected in anti-parallel to the power semiconductor element Q _A. Similarly, a diode D _B is connected in anti-parallel to the power semiconductor element Q _B.

The gate drive device 1 includes gate drive voltage variable units 11-A and 11-B, gate lines 12-A and 12-B, and a magnetic coupling unit 13.

The gate drive voltage variable unit 11-A is provided corresponding to the power semiconductor element Q _A , and the gate drive voltage variable unit 11-B is provided corresponding to the power semiconductor element Q _B. One or both of the gate drive voltage variable units 11-A and 11-B output a variable gate drive voltage according to the difference in electrical characteristics between the power semiconductor elements, in particular the difference in gate threshold voltage. The details of the gate drive voltage variable unit 11-A and the gate drive voltage variable unit 11-B will be described later.

The gate line 12-A supplies the gate drive voltage output from the gate drive voltage variable unit 11-A to the gate terminal of the corresponding power semiconductor element Q _A. The gate line 12-B supplies the gate drive voltage output from the gate drive voltage variable unit 11-B to the gate terminal of the corresponding power semiconductor element Q _B.

The magnetic coupling unit 13 magnetically couples the gate line 12-A and the gate line 12-B. FIG. 3 is a diagram illustrating a magnetic coupling unit in a gate driver according to an embodiment of the present disclosure. The magnetic coupling unit 13 has a magnetic body 30. The gate lines 12-A and 12-B are wound around the magnetic body 30. For example, as shown in FIG. 3, when a gate current Ig ₁ flows, a magnetic flux Φ1 is generated in the magnetic body 30 and crosses the gate line 12-B. Similarly, when a gate current Ig ₂ flows, a magnetic flux Φ2 is generated in the magnetic body 30 and crosses the gate line 12-A. This magnetically couples the gate lines 12-A and 12-B. The number of turns _N1 of the gate line 12-A to the magnetic body 30 is the same as the number of turns _N2 of the gate line 12-B to the magnetic body 30, and when the gate currents _Ig1 and _Ig2 are equal, |Φ1|=|Φ2| holds, and when the gate currents _Ig1 and _Ig2 have opposite polarities, Φ1 and Φ2 have opposite polarities.

For example, if the timing of the power semiconductor element _QA and the power semiconductor element _QB to turn off is not synchronized, and the power semiconductor element _QA turns off before the power semiconductor element _QB , when the gate current _Ig1 flows out before the gate current _Ig2, the magnetic flux Φ1 and the magnetic flux Φ2 are not equal, so that a magnetic flux of |Φ1-Φ2| is generated in the magnetic body 30, and they are magnetically coupled. At this time, an inductance _L1 is generated in the gate line 12-A, and an inductance _L2 is generated in the gate line 12-B, and these inductances _L1 and _L2 are proportional to |Φ1-Φ2|. The greater the imbalance between the gate current _Ig1 and the gate current _Ig2 , the larger the inductances _L1 and _L2 become. Also, as the inductances _L1 and _L2 increase, the impedance of the gate lines 12-A and 12-B increases, making it difficult for the gate currents _Ig1 and _Ig2 to flow. As a result, the impedance of the gate lines 12-A and 12-B changes according to the imbalance between the gate currents Ig ₁ and Ig ₂ , so that the gate currents Ig ₁ and Ig ₂ can be made to match each other.

Next, we will explain the details of the gate drive voltage variable unit 11-A and the gate drive voltage variable unit 11-B.

One or both of the gate drive voltage variable units 11-A and 11-B output a variable gate drive voltage.

The gate drive voltage variable section 11-A has a positive side potential output section 21P-A that outputs a positive side potential VP _A of the gate drive voltage, a negative side potential output section 21N-A that is connected in series to the positive side potential output section 21P-A and outputs a negative side potential VN _A of the gate drive voltage, a positive side switch 23P-A, and a negative side switch 23N-A. The gate drive voltage variable section 11-B has a positive side potential output section 21P-B that outputs a positive side potential VP _B of the gate drive voltage, a negative side potential output section 21N-B that is connected in series to the positive side potential output section 21P-B and outputs a negative side potential VN _B of the gate drive voltage, a positive side switch 23P-B, and a negative side switch 23N-B.

The positive switch 23P-A in the gate drive voltage variable unit 11-A and the positive switch 23P-B in the gate drive voltage variable unit 11-B perform on and off operations in synchronization, that is, the on and off timings of these positive switches 23P-A and 23P-B are the same. Similarly, the negative switch 23N-A in the gate drive voltage variable unit 11-A and the negative switch 23N-B in the gate drive voltage variable unit 11-B perform on and off operations in synchronization, that is, the on and off timings of these negative switches 23N-A and 23N-B are the same. In one embodiment of the present disclosure, the gate drive voltage variable unit 11-A and the gate drive voltage variable unit 11-B each generate a variable gate drive voltage as described below, and then control the voltage applied to the gate terminals of the power semiconductor elements Q _A and Q _B by turning on and off the positive switches 23P-A and 23P-B and the negative switches 23N-A and 23N-B.

In the gate drive voltage variable section 11-A, while controlling so that the potential difference "VP _A -VN _{A "} between the positive potential VP _A output by the positive potential output section 21P-A and the negative potential VN _A output by the negative potential output section 21N-A is constant, the potential VRA at the intermediate terminal 22-A which is the connection point between the positive potential output section 21P-A and the negative potential output section 21N- _A and the potential VQ _A at the source terminal which is the output terminal of the power semiconductor element Q _A corresponding to the gate drive voltage variable section 11-A are controlled so as to be the same potential. For example, by connecting the intermediate terminal 22-A and the source terminal of the power semiconductor element _QA , _VRA = _VQA is realized, and while the potential difference "VP _A - VNA _" between the positive potential VP _A output by the positive potential output section 21P-A and the negative potential _VNA output by the negative potential output section 21N-A is kept constant, one or both of the potential difference "VP _A - VR _A " between the positive potential VP _A output by the positive potential output section 21P-A and the potential VR _A at the intermediate terminal 22-A and the potential difference "VR _A - _VNA " between the potential VR _A at the intermediate terminal 22-A and the negative potential _VNA output by the negative potential output section 21N-A are made variable.

In the gate drive voltage variable section 11-B, while controlling so that the potential difference "VP _B -VN _{B "} between the positive potential VP _B output by the positive potential output section 21P-B and the negative potential VN _B output by the negative potential output section 21N-B is constant, the potential VR _B at the intermediate terminal 22-B which is the connection point between the positive potential output section 21P-B and the negative potential output section 21N-B and the potential VQ _B at the source terminal which is the output terminal of the power semiconductor element Q _B corresponding to the gate drive voltage variable section 11-B are controlled to be the same potential. For example, by connecting the intermediate terminal 22-B and the source terminal of the power semiconductor element Q _B , VR _B = VQ _B is realized, and while the potential difference "VP _B -VN B" between the positive potential VP _B output by the positive potential output section 21P-B and the negative potential VN _B output by the negative potential output section 21N-B is kept constant, one or both of the potential difference "VP _B -VR _{B "} between the positive potential VP _B output by the positive potential output section 21P-B and the potential VR _B at the intermediate terminal 22-B and the potential difference "VR _B -VN _B " between the potential VR _B at the intermediate terminal 22-B and the negative potential VN _B output by the negative potential output section 21N-B are made variable.

Furthermore, for example, when the power semiconductor element _QA has a first gate threshold voltage _VthA and the power semiconductor element _QB has a second gate threshold voltage _VthB higher than the first gate threshold voltage (i.e., when _VthA < _VthB ), the positive side potential VP A and negative side potential VN A of the gate drive voltage output from the gate drive voltage variable unit 11-A corresponding to the _power semiconductor element _QA having the first gate threshold voltage _VthA are each set to be lower than the positive side potential _{VP B and} negative side potential VN _B of the gate drive voltage output from the gate drive voltage variable unit 11-B corresponding to the power semiconductor element _QB having the second gate drive voltage _VthB .

More specifically, when V _thA < V _thB , for example, the positive side potential output section 21P-A of the gate drive voltage variable section 11-A corresponding to the power semiconductor element Q _A having the gate threshold voltage V _thA outputs a positive side potential VP _A of the gate drive voltage that is lower than the positive side potential VP _B of the gate drive voltage output by the positive side potential output section 21P-B of the gate drive voltage variable section 11-B corresponding to the power semiconductor element Q _B having the gate threshold voltage V _thB , and the negative side potential output section 21N-A of the gate drive voltage variable section 11-A outputs a negative side potential VN _A of the gate drive voltage that is lower than the negative side potential VN _B of the gate drive voltage output by the negative side potential output section 21N-B of the gate drive voltage variable section 11-B corresponding to the power semiconductor element Q _B having the gate threshold voltage V _thB . Here, the potential difference "VP B -VR B " between the positive potential VP _B output by the positive potential output section 21P-B of the gate drive voltage variable section 11-B corresponding to the power semiconductor element Q _B having the _gate threshold voltage V _thB and the potential VR _B at the intermediate terminal 22-B is made larger than the potential difference "VP _A -VR _{A "} between the positive potential VP _A output by the positive potential output section 21P-A of the gate drive voltage variable section 11-A corresponding to the power semiconductor element Q _A having the gate threshold voltage V _thA and the potential at the intermediate terminal 22-A. Additionally/alternatively, the potential difference "VR B -VN B " between the potential VR _B at the intermediate terminal 22-B of the gate drive voltage variable unit 11-B corresponding to the power semiconductor element Q _B having the gate threshold voltage V _thB and the negative potential VN _B output by the negative potential output unit 21N-B of the gate drive voltage variable unit 11-B is made smaller than the potential difference "VR _A -VN _A " between the potential VRA at the intermediate terminal 22-A of the gate drive voltage variable unit 11- _A corresponding to the power semiconductor element Q _A having the gate threshold voltage V _thA and the negative potential VN _A output by the negative potential output unit _21N -A of the gate drive voltage variable unit 11- _A .

Furthermore, for example, when the power semiconductor element _QA has a first gate threshold voltage _VthA and the power semiconductor element _QB has a third gate threshold voltage _VthB lower than the first gate threshold voltage (i.e., when _VthA > _VthB ), each of the positive side potential VP A and negative side potential VN _A of the gate drive voltage output from the gate drive voltage variable unit 11-A corresponding to the power semiconductor element _QA having the first gate threshold voltage _VthA is set to be higher than each of the positive side potential VP _B and negative side potential VN _B of the gate drive voltage output from the gate drive voltage variable unit 11-B corresponding to the power semiconductor element _QB having _the third gate drive voltage _VthB .

That is, when V _thA > V _thB , for example, the positive side potential output unit 21P-A of the gate drive voltage variable unit 11-A corresponding to the power semiconductor element Q _A having the gate threshold voltage V _thA outputs a positive side potential VP _A of the gate drive voltage that is higher than the positive side potential VP _B of the gate drive voltage output by the positive side potential output unit 21P-B of the gate drive voltage variable unit 11- _B corresponding to the power semiconductor element Q B having the gate threshold voltage V _thB , and the negative side potential output unit 21N-A of the gate drive voltage variable unit 11-A outputs a negative side potential VN _A of the gate drive voltage that is higher than the negative side potential VN _B of the gate drive voltage output by the negative side potential output unit 21N-B of the gate drive voltage variable unit 11-B corresponding to the power semiconductor element Q _B having the gate threshold voltage V _thB . Here, the potential difference "VP B -VR B " between the positive potential VP _B output by the positive potential output section 21P-B of the gate drive voltage variable section 11-B corresponding to the power semiconductor element Q _B having the _gate threshold voltage V _thB and the potential VR _B at the intermediate terminal 22-B is set to be smaller than the potential difference "VP _A -VR _{A "} between the positive potential VP _A output by the positive potential output section 21P-A of the gate drive voltage variable section 11-A corresponding to the power semiconductor element Q _A having the gate threshold voltage V _thA and the potential VR _A at the intermediate terminal 22-A. Additionally/alternatively, the potential difference "VR B -VN B " between the potential VR _B at the intermediate terminal 22-B of the gate drive voltage variable unit 11-B corresponding to the power semiconductor element Q _B having the gate threshold voltage V _thB and the negative potential VN _B output by the negative potential output unit 21N-B of the gate drive voltage variable unit 11-B is made larger than the potential difference "VR _A -VN _A " between the potential VRA at the intermediate terminal 22-A of the gate drive voltage variable unit 11- _A corresponding to the power semiconductor element Q _A having the gate threshold voltage V _thA and the negative potential VN _A output by the negative potential output unit _21N -A of the gate drive voltage variable unit 11- _A .

In this way, one or both of the gate drive voltage variable units 11-A and 11-B output a variable gate drive voltage. When both the gate drive voltage variable units 11-A and 11-B output a variable gate drive voltage, the voltage range to be changed can be made smaller, and the absolute values of the positive and negative potentials of the gate drive voltage of the power semiconductor element become smaller, which has the advantage of reducing the burden on the power semiconductor element.

2 is a circuit diagram showing a modified example of a gate drive voltage variable section in a gate drive device according to an embodiment of the present disclosure, in which power semiconductor elements _QA and _QB are omitted.

The gate drive voltage variable unit 11-A has a plurality of DC power supplies 21-A connected in series, and a changeover switch 26-A. Intermediate taps are provided between the DC power supplies, and the changeover switch 26-A is connected to one of the intermediate taps to change the potential difference "VP A -VR A " between the positive side potential VP _A and the potential VR _A of the changeover switch 26-A (corresponding to the potential VR _A at the intermediate terminal 22 _{- A} in FIG. 1), and the potential difference "VR _A -VNA _" between the potential VR _A of the changeover switch 26-A and the negative side potential _VNA .

Similarly, the gate drive voltage variable unit 11-B has a plurality of DC power supplies 21-B connected in series, and a changeover switch 26-B. Intermediate taps are provided between the DC power supplies, and when the changeover switch 26-B is connected to one of the intermediate taps, the potential difference "VP _B -VR B " between the positive potential VP B and the potential VR _B of the changeover switch 26-B (corresponding to the potential VR _B at the intermediate terminal 22- _B in FIG. 1) and the potential difference "VR _B -VN _B " between the potential VR _B of the changeover switch 26- _B and the negative potential VN _B change.

In this way, the gate drive voltage variable units 11-A and 11-B shown in Fig. 2 can output potentials VP _A , VR _B , VN _A , VP _B , VR _B and VN _B similar to those in Fig. 1. The relationships between the gate threshold voltages _VthA and _VthB and the potential differences "VP _A -VR _A ", "VR _A -VN _A ", "VP _B -VR _B " and "VR _B -VN _B ", and the relationships between the potentials VQ _A and VQ _B at the source terminals of the power semiconductor elements Q _A and Q _B and the potentials VR _A and VR _B are similar to those described with reference to Fig. 1.

The above-mentioned gate drive device 1 can also drive the power semiconductor elements on and off in a power conversion device that is configured with multiple arms connected in series, each arm having multiple power semiconductor elements connected in series.

Fig. 4 is a diagram showing a power conversion device including a gate driver according to an embodiment of the present disclosure. Fig. 5 is a circuit diagram showing an arm provided in the power conversion device shown in Fig. 4. Here, as an example, an example in which the arm 50 is formed by two power semiconductor elements _QA and _QB connected in series will be described.

The power conversion device 100 according to one embodiment of the present disclosure includes the above-mentioned gate drive device 1, a power conversion circuit section 2 having an arm 50 with multiple power semiconductor elements connected in series and performing power conversion operation in response to the on/off operation of the power semiconductor elements, and a power conversion control section 3 that controls the power conversion operation of the power conversion circuit section 2.

As shown in Fig. 5, the arm 50 is composed of, for example, two power semiconductor elements _QA and _QB connected in series. A terminal _P1 is drawn from the drain terminal of the power semiconductor element _QA , and a terminal _P2 is drawn from the source terminal of the power semiconductor element _QB . In the power conversion circuit unit 2, the terminal _P2 of one arm 50 is connected to the terminal _P1 of the other arm 50, and the connection point is connected to one terminal of the load. In the example shown in Fig. 4, two arms 50 are connected in series to form one leg 60, and the power conversion circuit unit 2 is composed of the two legs 60.

A DC power supply 200 is connected to a leg 60 composed of the arms 50 connected in series. A load 300 is connected between a terminal _T1 between the arms 50 connected in series in one leg ₆₀ and a terminal T2 between the arms 50 connected in series in the other leg 60.

A gate drive device 1 is provided corresponding to each arm 50. The power semiconductor element _QA and the power semiconductor element _QB in each arm 50 are turned on and off by the corresponding gate drive device 1. That is, the gate drive voltage variable unit 11-A and the gate drive voltage variable unit 11-B generate variable gate drive voltages as described above, and then control the voltages applied to the gate terminals of the power semiconductor elements _QA and QB by turning on and off the positive side switches 23P-A and 23P- _B and the negative side switches 23N-A and 23N-B.

The power conversion control unit 3 controls the ON and OFF operations of the positive side switches 23P-A and 23P-B and the negative side switches 23N-A and 23N-B in each gate drive device 1. That is, the power conversion control unit 3 controls the ON and OFF operations of the positive side switches 23P-A and 23P-B and the negative side switches 23N-A and 23N-B in each gate drive device 1 to control the voltage applied to the gate terminals of the power semiconductor elements _QA and _QB , and as a result, the power semiconductor elements _QA and _QB perform ON and OFF operations. As a result, the power conversion circuit unit 2 performs a power conversion operation of converting the DC power supplied from the DC power source 200 into a desired power and supplying it to the load 300. The power conversion control unit 3 generates a gate command signal for controlling the on and off operations of each of the positive-side switches 23P- _A and 23P-B and each of the negative-side switches 23N-A and 23N-B in each gate drive device 1 so as to eliminate the deviation between the detection value ⁱ of the current flowing from the positive-side terminal T1 to the load 300 and the current command i*, which is the control target value.

An arithmetic processing device (processor) is provided within the power conversion device 100. This arithmetic processing device has a power conversion control unit 3. The power conversion control unit 3 of the arithmetic processing device is, for example, a functional module realized by a computer program executed on the processor. For example, when the power conversion control unit 3 is constructed in the form of a computer program, the arithmetic processing device can be operated in accordance with the computer program to realize the relevant function. The computer program for executing the processing of the power conversion control unit 3 may be provided in a form recorded on a computer-readable recording medium such as a semiconductor memory, a magnetic recording medium, or an optical recording medium. Alternatively, the power conversion control unit 3 may be realized as a semiconductor integrated circuit into which a computer program that realizes the relevant function is written.

Next, the degree of imbalance in the gate voltages during ON and OFF operations when the characteristics of two power semiconductor elements _QA and _QB are different will be described.

6A and 6B are diagrams for explaining the definition of the gate voltage imbalance degree when the characteristics of two power semiconductor elements are different, where (A) shows the definition of the gate voltage imbalance degree during off operation, and (B) shows the definition of the gate voltage imbalance degree during on operation. As an example, a case will be described in which a power semiconductor element _QA has a first gate threshold voltage _VthA and a power semiconductor element _QB has a second gate threshold voltage _VthB higher than the first gate threshold voltage (i.e., _VthA < _VthB ).

6A, as a phenomenon occurring when power semiconductor elements _QA and _QB are off, when the gate potential of power semiconductor element _QA is changed from a certain positive potential to a certain negative potential, the drain-source voltage of power semiconductor element _QA changes from 0 [V] to Vds _A [V], and when the gate potential of power semiconductor element _QB is changed from a certain positive potential to a certain negative potential, the drain-source voltage of power semiconductor element _QB changes from 0 [V] to Vds _B [V]. At this time, the imbalance of the gate voltages during off operation is defined as ΔVds _off [%] as shown in Equation 1.

Furthermore, as shown in FIG. 6B , when the average value of the drain-source voltages of the power semiconductor elements _QA and _QB in the off state when the gate potentials of the power semiconductor elements _QA and _QB are at a certain negative potential is defined as Vds _ave [V], and when the gate potentials of the power semiconductor elements _QA and _QB are changed from a certain negative potential to a certain positive potential to turn on the power semiconductor elements _QA and _QB , the difference between Vds _ave [V] and a maximum rise voltage which is a jump in the drain-source voltage of either one of the power semiconductor elements that occurs and Vp [V] is defined as Vp [V], the imbalance of the gate voltages during on operation is ΔVds _on [%], as shown in Equation 2.

Figure 7 illustrates the results of a simulation of the degree of imbalance when there is and is not magnetic coupling of the gate lines in Patent Document 1 (Patent Publication No. 4396036) when there is variation in the characteristics of the power semiconductor elements.

As shown in FIG. 7, according to the invention described in Patent Document 1, when the characteristics of power semiconductor elements _QA and _QB are different (V _thA <V _thB ), the degree of imbalance increases both when there is magnetic coupling of the gate lines and when there is not, and even if there is magnetic coupling of the gate lines, the effect of aligning the timing of the ON operation and the timing of the OFF operation of power semiconductor element _QA and power semiconductor element _QB is small.

Figure 8 illustrates simulation results for the degree of imbalance in one embodiment of the present disclosure when there is variation in the characteristics of power semiconductor elements.

A simulation was performed assuming that when 3.3 kV breakdown voltage SiC-MOSFET power semiconductor elements Q _A and Q _B (V _thA < V _thB ) with different characteristics are connected in series, a current of 750 A flows when a voltage of 3.6 kV is applied, and there is no delay in each gate signal. In this simulation, the difference "VP A - VN A " between the positive side potential VP _A and the negative side potential VN _A output from the gate drive voltage variable unit 11- _A is fixed at 28 V, the difference "VP _B - VN _{B "} between the positive side potential VP _B and the negative side potential VN _B output from the gate drive voltage variable unit 11- _B is fixed at 28 V, the positive side potential VP _B output from the gate drive voltage variable unit 11-B is fixed at 17 V, and the negative side potential VN _B is fixed at -11 V. Under these conditions, a simulation was performed in which the positive side potential VP _A /negative side potential VN _A in gate drive voltage variable unit 11-A was changed to "17V/-11V", "16.75V/-11.25V", "16.5V/-11.5V", and "16.25V/-11.75V", resulting in the degree of imbalance when on and off as shown in Figure 8. It can be seen from Figure 8 that the degree of imbalance when on and off can be reduced by setting the positive side voltage VP _A /negative side voltage VN _A of power semiconductor element Q _A between 16.5V/-11.5V and 16.25V/-11.75V.

As described above, an example of turning on and off two power semiconductor elements connected in series has been described, but the gate drive device 1 according to one embodiment of the present disclosure can also turn on and off three or more power semiconductor elements connected in series.

9 is a circuit diagram showing a gate driver for turning on and off three power semiconductor elements connected in series according to an embodiment of the present disclosure. As an example, an example of turning on and off three power semiconductor elements _QA , _QB , and _QC connected in series will be described.

A diode D _A is connected in anti-parallel to the power semiconductor element Q _A. Similarly, a diode D _B is connected in anti-parallel to the power semiconductor element Q _B , and a diode D _C is connected in anti-parallel to the power semiconductor element Q _C.

The gate drive device 1 includes gate drive voltage variable units 11-A, 11-B, and 11-C, gate lines 12-A, 12-B, and 12-C, and a magnetic coupling unit 13.

The gate drive voltage variable unit 11-A is provided corresponding to the power semiconductor element Q _A , the gate drive voltage variable unit 11-B is provided corresponding to the power semiconductor element Q _B , and the gate drive voltage variable unit 11-C is provided corresponding to the power semiconductor element Q _C. Some or all of the gate drive voltage variable units 11-A, 11-B, and 11-C each output a variable gate drive voltage.

The gate drive voltage variable section 11-A has a positive side potential output section 21P-A that outputs a positive side potential VP _A of the gate drive voltage, a negative side potential output section 21N-A that is connected in series to the positive side potential output section 21P-A and outputs a negative side potential VN _A of the gate drive voltage, a positive side switch 23P-A, and a negative side switch 23N-A. The gate drive voltage variable section 11-B has a positive side potential output section 21P-B that outputs a positive side potential VP _B of the gate drive voltage, a negative side potential output section 21N-B that is connected in series to the positive side potential output section 21P-B and outputs a negative side potential VN _B of the gate drive voltage, a positive side switch 23P-B, and a negative side switch 23N-B. In addition, the gate drive voltage variable section 11-C has a positive side potential output section 21P-C that outputs a positive side potential VP _C of the gate drive voltage, a negative side potential output section 21N-C that is connected in series to the positive side potential output section 21P-C and outputs a negative side potential VN _C of the gate drive voltage, a positive side switch 23P-C, and a negative side switch 23N-C.

The positive-side switch 23P-A in the gate drive voltage variable unit 11-A, the positive-side switch 23P-B in the gate drive voltage variable unit 11-B, and the positive-side switch 23P-C in the gate drive voltage variable unit 11-C perform on and off operations in synchronization, i.e., the on and off timings of these positive-side switches 23P-A, 23P-B, and 23P-C are the same. Similarly, the negative-side switch 23N-A in the gate drive voltage variable unit 11-A, the negative-side switch 23N-B in the gate drive voltage variable unit 11-B, and the negative-side switch 23N-C in the gate drive voltage variable unit 11-C perform on and off operations in synchronization, i.e., the on and off timings of these negative-side switches 23N-A, 23N-B, and 23N-C are the same. In one embodiment of the present disclosure, gate drive voltage variable unit 11-A, gate drive voltage variable unit 11-B and gate drive voltage variable unit 11-C each generate a variable gate drive voltage as described below, and then control the voltage applied to the gate terminals of power semiconductor elements Q _A , Q B and Q C by turning on and off positive side switches 23P-A, 23P- _{B and 23P-C and negative side switches 23N-A, 23N-B} and 23N- _C .

In the gate drive voltage variable section 11-A, while controlling so that the potential difference "VP _A -VN _{A "} between the positive potential VP _A output by the positive potential output section 21P-A and the negative potential VN _A output by the negative potential output section 21N-A is constant, the potential VRA at the intermediate terminal 22-A which is the connection point between the positive potential output section 21P-A and the negative potential output section 21N- _A and the potential VQ _A at the source terminal which is the output terminal of the power semiconductor element Q _A corresponding to the gate drive voltage variable section 11-A are controlled so as to be the same potential. For example, by connecting the intermediate terminal 22-A and the source terminal of the power semiconductor element _QA , _VRA = _VQA is realized, and while the potential difference "VP _A - VNA _" between the positive potential VP _A output by the positive potential output section 21P-A and the negative potential _VNA output by the negative potential output section 21N-A is kept constant, one or both of the potential difference "VP _A - VR _A " between the positive potential VP _A output by the positive potential output section 21P-A and the potential VR _A at the intermediate terminal 22-A and the potential difference "VR _A - _VNA " between the potential VR _A at the intermediate terminal 22-A and the negative potential _VNA output by the negative potential output section 21N-A are made variable.

In the gate drive voltage variable section 11-B, while controlling so that the potential difference "VP _B -VN _{B "} between the positive potential VP _B output by the positive potential output section 21P-B and the negative potential VN _B output by the negative potential output section 21N-B is constant, the potential VR _B at the intermediate terminal 22-B which is the connection point between the positive potential output section 21P-B and the negative potential output section 21N-B and the potential VQ _B at the source terminal which is the output terminal of the power semiconductor element Q _B corresponding to the gate drive voltage variable section 11-B are controlled to be the same potential. For example, by connecting the intermediate terminal 22-B and the source terminal of the power semiconductor element Q _B , VR _B = VQ _B is realized, and while the potential difference "VP _B -VN B" between the positive potential VP _B output by the positive potential output section 21P-B and the negative potential VN _B output by the negative potential output section 21N-B is kept constant, one or both of the potential difference "VP _B -VR _{B "} between the positive potential VP _B output by the positive potential output section 21P-B and the potential VR _B at the intermediate terminal 22-B and the potential difference "VR _B -VN _B " between the potential VR _B at the intermediate terminal 22-B and the negative potential VN _B output by the negative potential output section 21N-B are made variable.

In the gate drive voltage variable section 11-C, while controlling so that the potential difference "VP _C -VN _{C "} between the positive potential VP _C output by the positive potential output section 21P-C and the negative potential VN _C output by the negative potential output section 21N-C is constant, the potential VR _C at the intermediate terminal 22-C which is the connection point between the positive potential output section 21P-C and the negative potential output section 21N-C and the potential VQ _C at the source terminal which is the output terminal of the power semiconductor element Q _C corresponding to the gate drive voltage variable section 11-C are at the same potential. For example, by connecting the intermediate terminal 22-C and the source terminal of the power semiconductor element Q _C , VR _C = VQ _C is realized, and while the potential difference "VP C - VN C " between the positive potential VP _C output by the positive potential output section 21P-C and the negative potential VN _C output by the negative potential output section 21N- _C is kept constant, one or both of the potential difference "VP _C - VR _C " between the positive potential VP _C output by the positive potential output section 21P-C and the potential VR _C at the intermediate terminal 22-C and the potential difference "VR _C - VN _C " between the potential VR _C at the intermediate terminal 22-C and the negative potential VN _C output by the negative potential output section 21N- _C are made variable.

Furthermore, for example, when the gate threshold voltage V _thA of power semiconductor element _QA , the gate threshold voltage V _thB of power semiconductor element _QB , and the gate threshold voltage V _thC of power semiconductor element _QC have a magnitude relationship of V _thA < V _thB < V _thC , each of the positive side potential VP _A and negative side potential VN A of the gate drive voltage output from gate drive voltage variable unit 11- _A corresponding to power semiconductor element _QA having gate threshold voltage _{V thA is} made lower than each of the positive side potential VP _B and negative side potential VN _B of the gate drive voltage output from gate drive voltage variable unit 11-B corresponding to power semiconductor element QB having gate drive voltage V _thB . Additionally/alternatively, each of the positive potential VP _B and negative potential VN _B of the gate drive voltage output from the gate drive voltage variable unit 11-B corresponding to the power semiconductor element Q _B having the gate threshold voltage V _thB is set lower than each of the positive potential VP _C and negative potential VN _C of the gate drive voltage output from the gate drive voltage variable unit 11-C corresponding to the power semiconductor element Q _C having the gate drive voltage V _thC .

More specifically, when V _thA < V _thB < V _thC , the positive side potential output section 21P-A of the gate drive voltage variable section 11-A corresponding to the power semiconductor element Q _A having the gate threshold voltage V _thA outputs a positive side potential VP _A of the gate drive voltage that is lower than the positive side potential VP _B of the gate drive voltage output by the positive side potential output section 21P-B of the gate drive voltage variable section 11-B corresponding to the power semiconductor element Q _B having the gate threshold voltage V _thB , and the negative side potential output section 21N-A of the gate drive voltage variable section 11-A outputs a negative side potential VN _A of the gate drive voltage that is lower than the negative side potential VN _B of the gate drive voltage output by the negative side potential output section 21N-B of the gate drive voltage variable section 11-B corresponding to the power semiconductor element Q _B having the gate threshold voltage V _thB . Here, the potential difference "VP B -VR B " between the positive potential VP _B output by the positive potential output section 21P-B of the gate drive voltage variable section 11-B corresponding to the power semiconductor element Q _B having the _gate threshold voltage V _thB and the potential VR _B at the intermediate terminal 22-B is made larger than the potential difference "VP _A -VR _{A "} between the positive potential VP _A output by the positive potential output section 21P-A of the gate drive voltage variable section 11-A corresponding to the power semiconductor element Q _A having the gate threshold voltage V _thA and the potential at the intermediate terminal 22-A. Additionally/alternatively, the potential difference "VR B -VN B " between the potential VR _B at the intermediate terminal 22-B of the gate drive voltage variable unit 11-B corresponding to the power semiconductor element Q _B having the gate threshold voltage V _thB and the negative potential VN _B output by the negative potential output unit 21N-B of the gate drive voltage variable unit 11-B is made smaller than the potential difference "VR _A -VN _A " between the potential VRA at the intermediate terminal 22-A of the gate drive voltage variable unit 11- _A corresponding to the power semiconductor element Q _A having the gate threshold voltage V _thA and the negative potential VN _A output by the negative potential output unit _21N -A of the gate drive voltage variable unit 11- _A .

Similarly, when V _thA < V _thB < V _thC , the positive side potential output unit 21P-B of the gate drive voltage variable unit 11-B corresponding to the power semiconductor element Q _B having the gate threshold voltage V _thB outputs a positive side potential VP _B of the gate drive voltage that is lower than the positive side potential VP _C of the gate drive voltage output by the positive side potential output unit 21P-C of the gate drive voltage variable unit 11- _C corresponding to the power semiconductor element Q C having the gate threshold voltage V _thC , and the negative side potential output unit 21N-B of the gate drive voltage variable unit 11-B outputs a negative side potential VN _B of the gate drive voltage that is lower than the negative side potential VN _C of the gate drive voltage output by the negative side potential output unit 21N-C of the gate drive voltage variable unit 11-C corresponding to the power semiconductor element Q _C having the gate threshold voltage V _thC . Here, the potential difference "VP C -VR C " between the positive potential VP _C output by the positive potential output section 21P-C of the gate drive voltage variable section 11- _{C corresponding to the power semiconductor element Q C having} the gate threshold voltage V _thC and the potential VR _C at the intermediate terminal 22-C is made larger than the potential difference "VP _B -VR _{B "} between the positive potential VP _B output by the positive potential output section 21P-B of the gate drive voltage variable section 11-B corresponding to the power semiconductor element Q _B having the gate threshold voltage V _thB and the potential at the intermediate terminal 22-B. Additionally/alternatively, the potential difference "VR C -VN C " between the potential VR _C at the intermediate terminal 22-C of the gate drive voltage variable unit 11-C corresponding to the power semiconductor element Q _C having the gate threshold voltage V _thC and the negative potential VN _C output by the negative potential output unit 21N-C of the gate drive voltage variable unit 11-C is made smaller than the potential difference "VR _B -VN _B " between the potential VR _B at the intermediate terminal 22-B of the gate drive voltage variable unit 11-B corresponding to the power semiconductor element Q _B having the gate threshold voltage _{V thB} and the negative potential VN _B output by the negative potential output unit 21N-B of the gate drive voltage variable unit 11- _B .

Furthermore, for example, when the gate threshold voltage V _thA of power semiconductor element _QA , the gate threshold voltage V _thB of power semiconductor element _QB , and the gate threshold voltage V _thC of power semiconductor element _QC have a magnitude relationship of V _thA > V _thB > V _thC , each of the positive side potential VP _A and negative side potential VN A of the gate drive voltage output from gate drive voltage variable unit 11- _A corresponding to power semiconductor element _QA having gate threshold voltage _{V thA is} made higher than each of the positive side potential VP _B and negative side potential VN _B of the gate drive voltage output from gate drive voltage variable unit 11-B corresponding to power semiconductor element QB having gate drive voltage V _thB . Additionally/alternatively, each of the positive potential VP _B and negative potential VN _B of the gate drive voltage output from the gate drive voltage variable unit 11-B corresponding to the power semiconductor element Q _B having the gate threshold voltage V _thB is made higher than each of the positive potential VP _C and negative potential VN _C of the gate drive voltage output from the gate drive voltage variable unit 11-C corresponding to the power semiconductor element Q _C having the gate drive voltage V _thC .

That is, when V _thA > V _thB > V _thC , for example, the positive side potential output unit 21P-A of the gate drive voltage variable unit 11-A corresponding to the power semiconductor element Q _A having the gate threshold voltage V _thA outputs a positive side potential VP _A of the gate drive voltage that is higher than the positive side potential VP _B of the gate drive voltage output by the positive side potential output unit 21P-B of the gate drive voltage variable unit 11-B corresponding to the power semiconductor element Q _B having the gate threshold voltage V _thB , and the negative side potential output unit 21N-A of the gate drive voltage variable unit 11-A outputs a negative side potential VN _A of the gate drive voltage that is higher than the negative side potential VN _B of the gate drive voltage output by the negative side potential output unit 21N-B of the gate drive voltage variable unit 11-B corresponding to the power semiconductor element Q _B having the gate threshold voltage V _thB . Here, the potential difference "VP B -VR B " between the positive potential VP _B output by the positive potential output section 21P-B of the gate drive voltage variable section 11-B corresponding to the power semiconductor element Q _B having the _gate threshold voltage V _thB and the potential VR _B at the intermediate terminal 22-B is set to be smaller than the potential difference "VP _A -VR _{A "} between the positive potential VP _A output by the positive potential output section 21P-A of the gate drive voltage variable section 11-A corresponding to the power semiconductor element Q _A having the gate threshold voltage V _thA and the potential VR _A at the intermediate terminal 22-A. Additionally/alternatively, the potential difference "VR B -VN B " between the potential VR _B at the intermediate terminal 22-B of the gate drive voltage variable unit 11-B corresponding to the power semiconductor element Q _B having the gate threshold voltage V _thB and the negative potential VN _B output by the negative potential output unit 21N-B of the gate drive voltage variable unit 11-B is made larger than the potential difference "VR _A -VN _A " between the potential VRA at the intermediate terminal 22-A of the gate drive voltage variable unit 11- _A corresponding to the power semiconductor element Q _A having the gate threshold voltage V _thA and the negative potential VN _A output by the negative potential output unit _21N -A of the gate drive voltage variable unit 11- _A .

Similarly, when V _thA > V _thB > V _thC , for example, the positive side potential output unit 21P-B of the gate drive voltage variable unit 11-B corresponding to the power semiconductor element Q _B having the gate threshold voltage V _thB outputs a positive side potential VP _B of the gate drive voltage that is higher than the positive side potential VP _C of the gate drive voltage output by the positive side potential output unit 21P-C of the gate drive voltage variable unit 11-C corresponding to the power semiconductor element Q _C having the gate threshold voltage V thC, and the negative side potential output unit 21N- _B of the gate drive voltage variable unit 11-B outputs a negative side potential VN _C of the gate drive voltage that is higher than the negative side potential VN _C of the gate drive voltage output by the negative side potential output unit 21N-C of the gate drive voltage variable unit 11-C corresponding to the power semiconductor element Q _C having the gate threshold voltage V _thC . Here, the potential difference "VP C -VR C " between the positive potential VP _C output by the positive potential output section 21P-C of the gate drive voltage variable section 11- _{C corresponding to the power semiconductor element Q C having} the gate threshold voltage V _thC and the potential VR _C at the intermediate terminal 22-C is made smaller than the potential difference "VP _B -VR _{B "} between the positive potential VP _B output by the positive potential output section 21P-B of the gate drive voltage variable section 11-B corresponding to the power semiconductor element Q _B having the gate threshold voltage V _thB and the potential VR _B at the intermediate terminal 22-B. Additionally/alternatively, the potential difference "VR C -VN C " between the potential VR _C at the intermediate terminal 22-C of the gate drive voltage variable unit 11-C corresponding to the power semiconductor element Q _C having the gate threshold voltage V _thC and the negative potential VN _C output by the negative potential output unit 21N-C of the gate drive voltage variable unit 11-C is made larger than the potential difference "VR _B -VN _B " between the potential VR _B at the intermediate terminal 22-B of the gate drive voltage variable unit 11-B corresponding to the power semiconductor element Q _B having the gate threshold voltage _{V thB} and the negative potential VN _B output by the negative potential output unit 21N-B of the gate drive voltage variable unit 11- _B .

The gate line 12-A supplies the gate drive voltage output from the gate drive voltage variable unit 11-A to the gate terminal of the corresponding power semiconductor element Q _A. The gate line 12-B supplies the gate drive voltage output from the gate drive voltage variable unit 11-B to the gate terminal of the corresponding power semiconductor element Q _B. The gate line 12-C supplies the gate drive voltage output from the gate drive voltage variable unit 11-C to the gate terminal of the corresponding power semiconductor element Q _C.

The magnetic coupling portion 13 magnetically couples the gate lines 12-A and 12-B, and magnetically couples the gate lines 12-B and 12-C.

Thus, the gate drive device 1 according to one embodiment of the present disclosure has a configuration in which the same number of gate drive voltage variable units and gate lines as the number of power semiconductor elements connected in series are provided, and the gate lines are magnetically coupled to each other at the magnetic coupling unit. According to one embodiment of the present disclosure, even if there is variation in the transmission time of the gate signal for the power semiconductor elements or the characteristics of the power semiconductor elements, it is possible to align the switching timing for the on and off operations of each of the power semiconductor elements, thereby suppressing imbalances in the voltages applied to the power semiconductor elements.

Next, we will explain a first modified example of one embodiment of the present disclosure.

10 is a circuit diagram showing a gate driver according to a first modified example of an embodiment of the present disclosure. As an example, an example in which two power semiconductor elements Q _A and Q _B connected in series are turned on and off will be described, but the first modified example can also be applied to a case in which three or more power semiconductor elements connected in series are turned on and off. In addition, as an example, a case in which the gate drive voltage variable units 11-A and 11-B have the configuration shown in FIG. 2 will be described, but the first modified example can also be applied to a case in which the gate drive voltage variable units 11-A and 11-B have the configuration shown in FIG. 1.

As described with reference to Figures 4 and 5, for the power conversion circuit section 2 configured with an arm 50 having multiple power semiconductor elements connected in series, the gate drive device 1 can drive the power semiconductor elements in the arm 50 to turn on and off. Since the characteristics of the power semiconductor elements change depending on the magnitude of the current flowing between the drain and source, the gate drive device 1 according to the first modified example changes the positive and negative potentials of the gate drive voltage according to the current flowing between the drain and source, and even if the characteristics of each of the power semiconductor elements change depending on the magnitude of the current flowing between the drain and source, the switching timing for the on and off operations of each of the power semiconductor elements is aligned, thereby suppressing imbalances in the voltages applied to the power semiconductor elements.

The power conversion control unit 3 holds, as information related to the current, a value i of the current output from the power conversion circuit unit 2 or a value i ^* of a current command generated by the power conversion control unit 3 to control the power conversion operation of the power conversion circuit unit 2. Each of the gate drive voltage variable units 11-A and 11-B changes the positive side potential and the negative side potential of the gate drive voltage according to the value i of the current output from the power conversion circuit unit 2 or the value i ^* of a current command generated by the power conversion control unit 3 to control the power conversion operation of the power conversion circuit unit 2. For this reason, as shown in FIG. 10, the gate drive voltage variable unit 11-A further includes a selector circuit 24-A, and the gate drive voltage variable unit 11-B further includes a selector circuit 24-B.

A center tap is provided between each of the multiple DC power supplies 21-A connected in series, and each center tap is connected to an intermediate terminal 22-A via a switch unit composed of a MOSFET. The on/off of the MOSFET in each switch unit is controlled by a selector circuit 24-A. The selector circuit 24-A changes the potential difference "VP A -VR A " between the positive side potential VP A and the potential VR A of the intermediate terminal 22-A, and the potential difference "VR A -VN A ^" between the potential VR _A of the intermediate terminal 22-A and the negative side potential VN _A by turning on one of the multiple MOSFETs according to the value _i of the current output from the power _conversion circuit unit 2 or the value i _* of a current command generated by the power _conversion control unit 3 to control the power conversion operation of the power conversion circuit _{unit 2} .

Similarly, an intermediate tap is provided between each of the multiple DC power supplies 21-B connected in series, and each intermediate tap is connected to an intermediate terminal 22-B via a switch unit composed of a MOSFET. The on/off of the MOSFET in each switch unit is controlled by a selector circuit 24-B. The selector circuit 24-B changes the potential difference "VP B -VR B " between the positive side potential VP B and the potential VR B of the intermediate terminal 22-B, and the potential difference "VR B -VN B ^" between the potential VR _B of the intermediate terminal 22-B and the negative side potential VN _B by turning on one of the multiple MOSFETs according to the value _i of the current output _from the power conversion _circuit unit 2 or the value i* of a current command generated by the power conversion control unit ₃ to control the power conversion operation of the power conversion circuit _{unit 2} .

Figure 11 illustrates a simulation result of the degree of imbalance in a first modified example of an embodiment of the present disclosure when there is variation in the characteristics of the power semiconductor elements.

A simulation was performed in which 3.3 kV breakdown voltage SiC-MOSFET power semiconductor elements Q _A and Q _B (V _thA <V _thB ) with different characteristics were connected in series and a voltage of 3.6 kV was applied, with the drain-source currents set to 750 A, 500 A, and 50 A. In this simulation, it was assumed that there was no delay in each gate signal, the difference "VP _A - VN _A " between the positive side potential VP _A and the negative side potential VN _A output from the gate drive voltage variable unit 11-A was constant at 28 V, the difference "VP _B - VN _B " between the positive side potential VP _B and the negative side potential VN _B output from the gate drive voltage variable unit 11-B was constant at 28 V, the positive side potential VP _B output from the gate drive voltage variable unit 11-B was constant at 17 V, and the negative side potential VN _B was constant at -11 V. Under these conditions, a simulation was performed in which the positive side potential VP _A /negative side potential VN _A output from the gate drive voltage variable unit 11-A was changed to "17V/-11V", "16.75V/-11.25V", "16.5V/-11.5V", and "16.25V/-11.75V" for drain-source currents of 750A, 500A, and 50A, respectively. The imbalance between the on and off states as shown in Figure 11 was obtained. It can be seen from FIG. 11 that the imbalance ΔVds off when off can be reduced when the current flowing between the drain and source is 750 _A and the positive side potential VP _A /negative side potential VN _A is between 16.5 V/-11.5 V and 16.25 V/-11.25 V, when the current flowing between the drain and source is 300 _A and the positive side potential VP _A /negative side potential VN _A is 16.5 V/-11.5 V, and when the current flowing between the drain and source is 50 A and the positive side potential VP A /negative side _potential VN A is 17 V/-11 V.

Next, we will explain a second variant of an embodiment of the present disclosure.

Figure 12 illustrates the relationship between the temperature, gate-source voltage, and drain current of a power semiconductor device.

The temperature of the power semiconductor element rises due to self-heating during on/off operation. Therefore, for example, due to design constraints or the arrangement position of the power semiconductor element, a temperature difference may occur for each power semiconductor element in the power conversion device. FIG. 12 shows, as an example, the relationship between the gate-source voltage Vgs [V] and the drain current Id [A] when the temperature of the power semiconductor element made of SiC-MOSFET is 25° C. and 175° C. As can be seen from FIG. 12, the gate threshold voltage decreases as the temperature of the power semiconductor element increases. In this way, the temperature difference between the power semiconductor elements causes variations in the gate threshold voltage, and the imbalance of the applied voltage during on operation and off operation increases. Therefore, in a second example of an embodiment of the present disclosure, the positive side potential and the negative side potential of the gate drive voltage are changed according to the temperature of the power semiconductor element, and even if the characteristics change due to the heat generation of each power semiconductor element, the switching timing for the on operation and the off operation of each power semiconductor element is aligned, thereby suppressing the imbalance of the voltage applied to the power semiconductor element.

13 is a circuit diagram showing a gate driver according to a second modified example of an embodiment of the present disclosure. As an example, an example in which two power semiconductor elements Q _A and Q _B connected in series are turned on and off will be described, but the second modified example can also be applied to a case in which three or more power semiconductor elements connected in series are turned on and off. Also, as an example, a case in which the gate drive voltage variable units 11-A and 11-B have the configuration shown in FIG. 2 will be described, but the second modified example can also be applied to a case in which the gate drive voltage variable units 11-A and 11-B have the configuration shown in FIG. 1.

The gate drive device 1 further includes temperature sensors 25-A and 25-B provided corresponding to the power semiconductor elements _QA and _QB , respectively. The temperature sensors 25-A and 25-B are preferably provided at the portions of the power semiconductor elements _QA and QB that generate the most heat. The gate drive voltage variable units 11-A and 11- _B each change the positive side potential and the negative side potential of the gate drive voltage according to the temperature of the power semiconductor element detected by the corresponding temperature sensor 25-A or 25-B. For this reason, as shown in FIG. 13, the gate drive voltage variable unit 11-A further includes a selector circuit 24-A, and the gate drive voltage variable unit 11-B further includes a selector circuit 24-B.

A center tap is provided between each of the multiple DC power supplies 21-A connected in series, and each center tap is connected to an intermediate terminal 22-A via a conductor provided with a MOSFET. The on/off of the MOSFET on each conductor is controlled by a selector circuit 24-A. The selector circuit 24-A changes the potential difference "VP A -VR _A " between the positive side potential VP _A and the potential VR A of the intermediate terminal 22-A, and the potential difference "VR _A -VN _A " between the potential VR _A of the intermediate terminal 22-A and the negative side potential VN _A by turning on one of the multiple MOSFETs in accordance with the temperature of the power semiconductor element Q _A detected by a temperature _sensor 25- _A .

Similarly, an intermediate tap is provided between each of the multiple DC power supplies 21-B connected in series, and each intermediate tap is connected to an intermediate terminal 22-B via a conductor provided with a MOSFET. The on/off of the MOSFET on each conductor is controlled by a selector circuit 24-B. The selector circuit 24-B changes the potential difference "VP B -VR B " between the positive potential VP _B and the potential VR _B of the intermediate terminal 22-B, and the potential difference "VR _B -VN _B " between the potential VR _B of the intermediate terminal 22-B and the negative potential VN _B , by turning on one of the multiple MOSFETs in accordance with the temperature of the power semiconductor element Q _B detected by the temperature _{sensor 25} - _B .

For example, when the power semiconductor element Q _A detected by the temperature sensor 25-A is at a first temperature Temp _A and the power semiconductor element Q _B detected by the temperature sensor 25-B is at a second temperature Temp _B lower than the first temperature Temp _A (i.e., when Temp _A > Temp _B ), each of the positive side potential VP _A and negative side potential VN B of the gate drive voltage output from the gate drive voltage variable unit 11-A corresponding to the power semiconductor element Q _A corresponding to the temperature sensor 25- _A that detected the first temperature Temp _A is set lower than each of the positive side potential VP B and negative side potential VN _B of the gate drive voltage output from the gate drive voltage variable unit 11- _B corresponding to the power semiconductor element Q _B corresponding to the temperature sensor 25-B that detected the second temperature Temp _B.

More specifically, when Temp _A > Temp _B , for example, the positive side potential output unit 21P-A of the gate drive voltage variable unit 11- _A corresponding to the power semiconductor element Q _A having the temperature Temp _A outputs a positive side potential VP A of the gate drive voltage that is lower than the positive side potential VP _B of the gate drive voltage output by the positive side potential output unit 21P-B of the gate drive voltage variable unit 11-B corresponding to the power semiconductor element _{Q B} having the temperature Temp _B , and the negative side potential output unit 21N-A of the gate drive voltage variable unit 11-A outputs a negative side potential VN _A of the gate drive voltage that is lower than the negative side potential VN _B of the gate drive voltage output by the negative side potential output unit 21N-B of the gate drive voltage variable unit 11-B corresponding to the power semiconductor element Q B having the temperature Temp _B. Here, the potential difference "VP B -VR B " between the positive potential VP _B output by the positive potential output section 21P-B of the gate drive voltage variable section 11-B corresponding to the power semiconductor element Q _B having a temperature Temp _B and the potential VR _B at the intermediate terminal 22- _B is set to be larger than the potential difference "VP _A -VR _A " between the positive potential VP _A output by the positive potential output section 21P-A of the gate drive voltage variable section 11- _{A corresponding to the power semiconductor element Q A having a temperature Temp A and the} potential at the intermediate terminal 22-A. Further/alternatively, the potential difference "VR B -VN B " between the potential VR _B at the intermediate terminal 22-B of the gate drive voltage variable unit 11-B corresponding to the power semiconductor element Q _B having the temperature Temp _{B and} the negative potential VN _B output by the negative potential output unit 21N-B of the gate drive voltage variable unit 11-B is made smaller than the potential difference "VR _A -VN _A " between the potential VR _A at the intermediate terminal 22-A of the gate drive voltage variable unit 11-A corresponding to the power semiconductor element Q _A having the temperature Temp _A and the negative potential VN _A output by the negative potential output unit 21N-A of the gate drive voltage variable unit ₁₁ - _A .

Furthermore, for example, when the power semiconductor element Q _A detected by the temperature sensor 25-A is at a first temperature Temp _A , and the power semiconductor element Q _B detected by the temperature sensor 25-B is at a third temperature Temp _B higher than the first temperature Temp _A (i.e., when Temp _A < Temp _B ), each of the positive side potential VP _A and negative side potential VN A of the gate drive voltage output from the gate drive voltage variable unit 11-A corresponding to the power semiconductor element Q _A corresponding to the temperature sensor 25- _A that detected the first temperature Temp _A is set to be higher than each of the positive side potential VP _B and negative side potential VN _B of the gate drive voltage output from the gate drive voltage variable unit 11-B corresponding to the power semiconductor element Q _B corresponding to the temperature sensor 25-B that detected the third temperature Temp _B.

More specifically, when Temp _A < Temp _B , for example, the positive side potential output section 21P- _A of the gate drive voltage variable section 11-A corresponding to the power semiconductor element Q _A having the temperature Temp _A outputs a positive side potential VP A of the gate drive voltage that is higher than the positive side potential VP _B of the gate drive voltage output by the positive side potential output section 21P-B of the gate drive voltage variable section 11-B corresponding to the power semiconductor element _{Q B} having the temperature Temp _B , and the negative side potential output section 21N-A of the gate drive voltage variable section 11-A outputs a negative side potential VN _A of the gate drive voltage that is higher than the negative side potential VN _B of the gate drive voltage output by the negative side potential output section 21N-B of the gate drive voltage variable section 11-B corresponding to the power semiconductor element Q B having the temperature Temp _B. Here, the potential difference "VP B -VR B " between the positive potential VP _B output by the positive potential output section 21P-B of the gate drive voltage variable section 11-B corresponding to the power semiconductor element Q _B having a temperature Temp _B and the potential VR _B at the intermediate terminal 22- _B is set to be smaller than the potential difference "VP _A -VR _A " between the positive potential VP _A output by the positive potential output section 21P-A of the gate drive voltage variable section 11- _{A corresponding to the power semiconductor element Q A having a temperature Temp A and the} potential at the intermediate terminal 22-A. Additionally/alternatively, the potential difference "VR B -VN B " between the potential VR _B at the intermediate terminal 22-B of the gate drive voltage variable unit 11-B corresponding to the power semiconductor element Q _B having the temperature Temp _{B and} the negative potential VN _B output by the negative potential output unit 21N-B of the gate drive voltage variable unit 11-B is made larger than the potential difference "VR _A -VN _A " between the potential VR _A at the intermediate terminal 22-A of the gate drive voltage variable unit 11-A corresponding to the power semiconductor element Q _A having the temperature Temp _A and the negative potential VN _A output by the negative potential output unit 21N-A of the gate drive voltage variable unit ₁₁ - _A .

The first and second modified examples described above may be implemented in combination. In this case, the positive and negative potentials of the gate drive voltage are changed according to the value of the current output from the power conversion circuit unit 2 or the value of the current command generated by the power conversion control unit 3 to control the power conversion operation of the power conversion circuit unit 2, and the temperature of the power semiconductor element detected by the temperature sensor.

As described above, according to one embodiment and each of the modified examples of the present disclosure, even if there is variation in the transmission time of the gate signal on the gate line or in the characteristics of the power semiconductor elements, it is possible to align the switching timing for the on and off operations of each of the power semiconductor elements, thereby suppressing imbalances in the voltages applied to the power semiconductor elements.

REFERENCE SIGNS LIST 1 Gate drive device 2 Power conversion circuit section 3 Power conversion control section 11-A, 11-B, 11-C Gate drive voltage variable section 12-A, 12-B, 12-C Gate line 13 Magnetic coupling section 21-A, 21-B DC power supply 21P-A, 21P-B, 21P-C Positive potential output section 21N-A, 21N-B, 21N-C Negative potential output section 22-A, 22-B, 22-C Intermediate terminal 23P-A, 23P-B, 23P-C Positive switch 23N-A, 23N-B, 23N-C Negative switch 24-A, 24-B Selector circuit 25-A, 25-B Temperature sensor 26-A, 26-B, 26-C Changeover switch 30 Magnetic body 50 Arm 60 leg 100 power conversion device 200 DC power supply 300 load C capacitor D _A , D _B , D _C diodes P ₁ , P ₂ terminals Q _A , Q _B , Q _C power semiconductor element T ₁ terminal T ₂ terminal

Claims (12)

A gate driver for a plurality of power semiconductor devices connected in series, comprising:
a gate drive voltage variable unit provided corresponding to the power semiconductor element and outputting a variable gate drive voltage , the gate drive voltage variable unit varying a potential of the gate drive voltage to be output in response to a difference in electrical characteristics between the power semiconductor elements;
a gate line for supplying the gate driving voltage output from the gate driving voltage variable unit to a gate terminal of each of the corresponding power semiconductor devices;
a magnetic coupling portion that magnetically couples the gate lines to each other;
Equipped with
the gate drive voltage variable section corresponding to the power semiconductor element having a first gate threshold voltage outputs a positive side potential and a negative side potential of the gate drive voltage that are lower than the positive side potential and the negative side potential of the gate drive voltage output by the gate drive voltage variable section corresponding to the power semiconductor element having a second gate threshold voltage higher than the first gate threshold voltage,
Each of the gate drive voltage variable sections includes a positive potential output section that outputs a positive potential of the gate drive voltage, and a negative potential output section that is connected in series to the positive potential output section and outputs a negative potential of the gate drive voltage,
a gate drive device in which, in each of the gate drive voltage variable sections, a potential at an intermediate terminal which is a connection point between the positive potential output section and the negative potential output section and a potential at an output terminal of the power semiconductor element corresponding to the gate drive voltage variable section are the same potential . 2. The gate drive device according to claim 1, wherein a potential difference between the positive side potential output by the gate drive voltage variable section corresponding to the power semiconductor element having the second gate threshold voltage and a potential at the intermediate terminal is greater than a potential difference between the positive side potential output by the gate drive voltage variable section corresponding to the power semiconductor element having the first gate threshold voltage and a potential at the intermediate terminal. Each of the gate drive voltage variable sections includes a positive potential output section that outputs a positive potential of the gate drive voltage, and a negative potential output section that is connected in series to the positive potential output section and outputs a negative potential of the gate drive voltage,
in each of the gate drive voltage variable sections, a potential at an intermediate terminal which is a connection point between the positive potential output section and the negative potential output section is equal to a potential at an output terminal of the power semiconductor device corresponding to the gate drive voltage variable section;
3. The gate drive device according to claim 1, wherein a potential difference between a potential at the intermediate terminal of the gate drive voltage variable section corresponding to the power semiconductor element having the second gate threshold voltage and the negative potential output by the gate drive voltage variable section is smaller than a potential difference between a potential at the intermediate terminal of the gate drive voltage variable section corresponding to the power semiconductor element having the first gate threshold voltage and the negative potential output by the gate drive voltage variable section . 2. The gate drive device according to claim 1, wherein the gate drive voltage variable section corresponding to the power semiconductor element having a first gate threshold voltage outputs a positive side potential and a negative side potential of the gate drive voltage that are higher than the positive side potential and the negative side potential of the gate drive voltage output by the gate drive voltage variable section corresponding to the power semiconductor element having a third gate threshold voltage that is lower than the first gate threshold voltage. Each of the gate drive voltage variable sections includes a positive potential output section that outputs a positive potential of the gate drive voltage, and a negative potential output section that is connected in series to the positive potential output section and outputs a negative potential of the gate drive voltage,
in each of the gate drive voltage variable sections, a potential at an intermediate terminal which is a connection point between the positive potential output section and the negative potential output section is equal to a potential at an output terminal of the power semiconductor device corresponding to the gate drive voltage variable section;
5. The gate drive device according to claim 4, wherein a potential difference between the positive side potential output by the gate drive voltage variable section corresponding to the power semiconductor element having the third gate threshold voltage and a potential at the intermediate terminal is smaller than a potential difference between the positive side potential output by the gate drive voltage variable section corresponding to the power semiconductor element having the first gate threshold voltage and a potential at the intermediate terminal. Each of the gate drive voltage variable sections includes a positive potential output section that outputs a positive potential of the gate drive voltage, and a negative potential output section that is connected in series to the positive potential output section and outputs a negative potential of the gate drive voltage,
in each of the gate drive voltage variable sections, a potential at an intermediate terminal which is a connection point between the positive potential output section and the negative potential output section is equal to a potential at an output terminal of the power semiconductor device corresponding to the gate drive voltage variable section;
6. The gate drive device according to claim 4, wherein a potential difference between a potential at the intermediate terminal of the gate drive voltage variable section corresponding to the power semiconductor element having the third gate threshold voltage and the negative potential output by the gate drive voltage variable section is greater than a potential difference between a potential at the intermediate terminal of the gate drive voltage variable section corresponding to the power semiconductor element having the first gate threshold voltage and the negative potential output by the gate drive voltage variable section . a temperature sensor provided corresponding to each of the power semiconductor devices;
7. The gate drive device according to claim 1, wherein each of the gate drive voltage variable parts changes a positive side potential and a negative side potential of the gate drive voltage in response to a temperature of the power semiconductor element detected by the corresponding temperature sensor. 8. The gate drive device according to claim 7, wherein the gate drive voltage variable section corresponding to the power semiconductor element corresponding to the temperature sensor that detected a first temperature outputs a positive side potential and a negative side potential of the gate drive voltage that are lower than the positive side potential and the negative side potential of the gate drive voltage output by the gate drive voltage variable section corresponding to the power semiconductor element corresponding to the temperature sensor that detected a second temperature that is lower than the first temperature. 9. The gate drive device according to claim 7, wherein the gate drive voltage variable section corresponding to the power semiconductor element corresponding to the temperature sensor that detected a first temperature outputs a positive side potential and a negative side potential of the gate drive voltage that are higher than the positive side potential and the negative side potential of the gate drive voltage output by the gate drive voltage variable section corresponding to the power semiconductor element corresponding to the temperature sensor that detected a third temperature higher than the first temperature. A gate drive device according to any one of claims 1 to 9 ;
a power conversion circuit section having an arm on which a plurality of the power semiconductor elements connected in series are provided, the power conversion circuit section performing a power conversion operation in response to an on/off operation of the power semiconductor elements;
a power conversion control unit that controls a power conversion operation of the power conversion circuit unit;
A power conversion device comprising: The power conversion device according to claim 10 , wherein each of the gate drive voltage variable sections changes a positive side potential and a negative side potential of the gate drive voltage in accordance with a value of a current output from the power conversion circuit section. 11. The power conversion device according to claim 10, wherein each of the gate drive voltage variable units changes a positive side potential and a negative side potential of the gate drive voltage according to a value of a current command generated by the power conversion control unit to control a power conversion operation of the power conversion circuit unit.

Images