JP7666964B2 - Method for manufacturing solar cell and solar cell - Google Patents

Description

The present invention relates to a method for manufacturing a solar cell and a solar cell.

Patent documents 1 to 3 disclose techniques relating to connections between electrodes of two polarities and wiring members in a back electrode type solar cell.
- having first wiring and second wiring intersecting the first electrode and the second electrode,
the first wiring is connected to the first electrode at a point where it intersects with the first electrode, and is insulated from the second electrode by an insulating layer at a point where it intersects with the second electrode;
The second wiring is connected to the second electrode at a point where it intersects with the second electrode, and is insulated from the first electrode by an insulating layer at a point where it intersects with the first electrode.
It is stated that:

In addition, Patent Document 3 describes a back electrode type solar cell,
-having p-electrode wiring and n-electrode wiring intersecting the p-electrode and the n-electrode,
・Insulating resin is formed on the back side,
The p-electrode wiring is connected to the p-electrode by a conductive member in a hole in the insulating resin at a point where it intersects with the p-electrode, and is insulated from the n-electrode by the insulating resin at a point where it intersects with the n-electrode,
The n-electrode wiring is connected to the n-electrode by a conductive member in a hole in the insulating resin at a point where it intersects with the n-electrode, and is insulated from the p-electrode by the insulating resin at a point where it intersects with the p-electrode.
It is stated that:

JP 2018-133567 A JP 2015-159286 A JP 2014-127550 A

In order to reduce the cost of such solar cells, the inventor(s) of the present application have devised the use of a relatively inexpensive metal, such as Cu (e.g., a film formed using a PVD method such as sputtering, followed by wet etching) as the material for the metal electrode layer, instead of the relatively expensive known Ag paste. Note that contact electrodes made of Ag paste are used only in the parts that make contact with the wiring members.

The inventor(s) of the present application have also devised a method for simplifying the manufacturing process of such solar cells by using the insulating layer and contact electrode (Ag paste) for ensuring insulation and contact with the wiring members as a resist for wet etching of the metal electrode layer (e.g., Cu) and transparent electrode layer.

However, according to the knowledge of the present inventor(s), in such solar cells and their manufacturing methods, when annealing (heating) is performed after wet etching of the metal electrode layer and transparent electrode layer, the metal components of the metal electrode layer, such as Cu, diffuse into the semiconductor substrate, resulting in a decrease in the performance of the solar cell.

The present invention aims to provide a solar cell and a manufacturing method thereof that can suppress deterioration in solar cell performance while simplifying the manufacturing process and reducing the cost of solar cells.

The method for manufacturing a solar cell according to the present invention is a method for manufacturing a back electrode type solar cell including a semiconductor substrate, a first conductive type semiconductor layer, a first transparent electrode layer, and a first metal electrode layer, which are stacked in sequence in a first region that is a part of one main surface side of the semiconductor substrate, and a second conductive type semiconductor layer, a second transparent electrode layer, and a second metal electrode layer, which are stacked in sequence in a second region that is another part of the one main surface side of the semiconductor substrate, the method including a transparent electrode layer material film forming step of forming a series of transparent electrode layer material films on the first conductive type semiconductor layer and the second conductive type semiconductor layer on the one main surface side of the semiconductor substrate, a metal electrode layer material film forming step of forming a series of metal electrode layer material films on the transparent electrode layer material film, a conductive protective layer material film forming step of forming a series of conductive protective layer material films on the metal electrode layer material film, and forming the conductive protective layer material film in the first region into a first non-insulating region. a first insulating layer entirely covering the conductive protection layer material film in the second region except for a second non-insulating region, and a second insulating layer entirely covering the conductive protection layer material film in the second region except for a second non-insulating region, wherein the first insulating layer and the second insulating layer are spaced apart from each other; a contact electrode forming step of forming contact electrodes in the first non-insulating region and the second non-insulating region; and a transparent electrode layer and metal electrode layer forming step of forming a patterned first transparent electrode layer, a patterned first metal electrode layer, and a patterned first conductive protection layer, by removing exposed portions of the material film of the conductive protection layer, and the material film of the metal electrode layer and the material film of the transparent electrode layer corresponding to the exposed portions, using an etching method using the first insulating layer, the second insulating layer, and the contact electrode as a mask. In the contact electrode formation process, the contact electrode is formed by printing and curing or drying a printing material containing particulate metal material and resin material, and in the transparent electrode layer and metal electrode layer formation process, the material film of the conductive protective layer protects the metal electrode layer, the transparent electrode layer, the semiconductor layer, and the semiconductor substrate from the etching solution that penetrates through the contact electrode.

The solar cell according to the present invention is a back electrode type solar cell including a semiconductor substrate, a first conductive type semiconductor layer, a first transparent electrode layer, and a first metal electrode layer, which are stacked in order in a first region that is a part of one main surface side of the semiconductor substrate, and a second conductive type semiconductor layer, a second transparent electrode layer, and a second metal electrode layer, which are stacked in order in a second region that is the other part of the one main surface side of the semiconductor substrate, and includes a first conductive protective layer formed on the first metal electrode layer, a second conductive protective layer formed on the second metal electrode layer, a first insulating layer that entirely covers the first conductive protective layer except for the first non-insulating region, a second insulating layer that entirely covers the second conductive protective layer except for the second non-insulating region, and contact electrodes formed in the first non-insulating region and the second non-insulating region, the contact electrodes being formed by printing and curing a printing material containing a particulate metal material and a resin material.

According to the present invention, it is possible to suppress the deterioration of the performance of solar cells even while simplifying the manufacturing process and reducing the cost of solar cells.

FIG. 2 is a diagram showing the solar cell according to the embodiment as viewed from the back surface side. 2 is a cross-sectional view of the solar cell taken along line IIA-IIA in FIG. 1 . 2 is a cross-sectional view of the solar cell taken along line IIB-IIB in FIG. 1 . 3A to 3C are diagrams illustrating a semiconductor layer forming step in the method for manufacturing a solar cell according to the present embodiment. 1A to 1C are diagrams showing electrode layer material film forming steps in the manufacturing method for a solar cell according to the present embodiment, that is, a transparent electrode layer material film forming step, a metal electrode layer material film forming step, and a conductive protective layer material film forming step. 3A to 3C are diagrams illustrating an insulating layer forming step in the method for manufacturing a solar cell according to the present embodiment. 5A to 5C are diagrams illustrating a contact electrode forming step in the manufacturing method for the solar cell according to the embodiment. 2A to 2C are diagrams illustrating electrode layer forming steps in the method for manufacturing a solar cell according to the present embodiment, that is, a transparent electrode layer forming step, a metal electrode layer forming step, and a conductive protective layer forming step. 2 is a cross-sectional view of a solar cell of a comparative example, taken along line IIA-IIA in FIG. 1 . 2 is a cross-sectional view of a solar cell of a comparative example, taken along line IIB-IIB in FIG. 1 . 5A to 5C are diagrams illustrating a semiconductor layer forming step in a solar cell manufacturing method according to a comparative example. 1A to 1C are diagrams showing an electrode layer material film forming step, that is, a transparent electrode layer material film forming step and a metal electrode layer material film forming step, in a manufacturing method for a solar cell of a comparative example. 1A to 1C are diagrams illustrating an insulating layer forming step in a solar cell manufacturing method according to a comparative example. 11A to 11C are diagrams illustrating a contact electrode forming step in a solar cell manufacturing method according to a comparative example. 4A to 4C are diagrams illustrating electrode layer forming steps, that is, a transparent electrode layer forming step and a metal electrode layer forming step, in a solar cell manufacturing method of a comparative example.

Below, an example of an embodiment of the present invention will be described with reference to the attached drawings. Note that the same reference numerals will be used to refer to the same or equivalent parts in each drawing. For convenience, hatching and component reference numerals may be omitted, in which case other drawings should be referenced.

(Solar Cell of the Present Embodiment)
Fig. 1 is a view of the solar cell according to this embodiment as viewed from the back surface side. Fig. 2A is a cross-sectional view of the solar cell in Fig. 1 taken along line IIA-IIA, and Fig. 2B is a cross-sectional view of the solar cell in Fig. 1 taken along line IIB-IIB. The solar cell 1 shown in Figs. 1, 2A, and 2B is a back electrode type (also called a back contact type or back junction type) heterojunction solar cell.

The solar cell 1 comprises a semiconductor substrate 11 having two principal surfaces, and the principal surface of the semiconductor substrate 11 has a first region 7 and a second region 8. In the following, the principal surface of the semiconductor substrate 11 that receives light is referred to as the light-receiving surface, and the principal surface (one principal surface) of the semiconductor substrate 11 opposite the light-receiving surface is referred to as the back surface.

The first region 7 has a band-like shape and extends in the Y direction (second direction). Similarly, the second region 8 has a band-like shape and extends in the Y direction. The first region 7 and the second region 8 are alternately arranged in the X direction (first direction) that intersects with the Y direction.

The solar cell 1 includes a passivation layer 13 and an optical adjustment layer 15, which are stacked in order on the light receiving surface side of the semiconductor substrate 11. The solar cell 1 also includes a passivation layer 23, a first conductive type semiconductor layer 25, a first electrode layer 27, and a first insulating layer 41, which are stacked in order on a portion (first region 7) of the back side of the semiconductor substrate 11. The solar cell 1 also includes a passivation layer 33, a second conductive type semiconductor layer 35, a second electrode layer 37, and a second insulating layer 42, which are stacked in order on another portion (second region 8) of the back side of the semiconductor substrate 11. The solar cell 1 also includes a first contact electrode 51 corresponding to the first electrode layer 27, and a second contact electrode 52 corresponding to the second electrode layer 37.

The semiconductor substrate 11 is formed of a crystalline silicon material such as single crystal silicon or polycrystalline silicon. The semiconductor substrate 11 is, for example, an n-type semiconductor substrate in which a crystalline silicon material is doped with an n-type dopant. The semiconductor substrate 11 may be, for example, a p-type semiconductor substrate in which a crystalline silicon material is doped with a p-type dopant. An example of an n-type dopant is phosphorus (P). An example of a p-type dopant is boron (B). The semiconductor substrate 11 functions as a photoelectric conversion substrate that absorbs incident light from the light-receiving surface side and generates photocarriers (electrons and holes).

By using crystalline silicon as the material for the semiconductor substrate 11, the dark current is relatively small, and a relatively high output (stable output regardless of illuminance) can be obtained even when the intensity of the incident light is low.

The passivation layer 13 is formed on the light-receiving surface side of the semiconductor substrate 11. The passivation layer 23 is formed in a first region 7 on the back side of the semiconductor substrate 11. The passivation layer 33 is formed in a second region 8 on the back side of the semiconductor substrate 11. The passivation layers 13, 23, and 33 are formed of a material whose main component is, for example, an intrinsic (i-type) amorphous silicon material. The passivation layers 13, 23, and 33 suppress recombination of carriers generated in the semiconductor substrate 11 and increase the carrier recovery efficiency.

The optical adjustment layer 15 is formed on the passivation layer 13 on the light-receiving surface side of the semiconductor substrate 11. The optical adjustment layer 15 functions as an anti-reflection layer that prevents reflection of incident light, and also functions as a protective layer that protects the light-receiving surface side of the semiconductor substrate 11 and the passivation layer 13. The optical adjustment layer 15 is formed of an insulating material such as silicon oxide (SiO), silicon nitride (SiN), or a composite thereof such as silicon oxynitride (SiON).

The first conductive type semiconductor layer 25 is formed on the passivation layer 23, i.e., in the first region 7 on the back side of the semiconductor substrate 11. On the other hand, the second conductive type semiconductor layer 35 is formed on the passivation layer 33, i.e., in the second region 8 on the back side of the semiconductor substrate 11. That is, the first conductive type semiconductor layer 25 and the second conductive type semiconductor layer 35 have a band-like shape and extend in the Y direction. The first conductive type semiconductor layer 25 and the second conductive type semiconductor layer 35 are alternately arranged in the X direction. A part of the second conductive type semiconductor layer 35 may overlap a part of the adjacent first conductive type semiconductor layer 25 (not shown).

The first conductive type semiconductor layer 25 is formed of, for example, an amorphous silicon material. The first conductive type semiconductor layer 25 is, for example, a p-type semiconductor layer in which an amorphous silicon material is doped with a p-type dopant (for example, the above-mentioned boron (B)).

The second conductive type semiconductor layer 35 is formed of, for example, an amorphous silicon material. The second conductive type semiconductor layer 35 is, for example, an n-type semiconductor layer in which an amorphous silicon material is doped with an n-type dopant (for example, the above-mentioned phosphorus (P)). Note that the first conductive type semiconductor layer 25 may be an n-type semiconductor layer, and the second conductive type semiconductor layer 35 may be a p-type semiconductor layer.

The first electrode layer 27 is formed on the first conductive type semiconductor layer 25, i.e., in the first region 7 on the back side of the semiconductor substrate 11. On the other hand, the second electrode layer 37 is formed on the second conductive type semiconductor layer 35, i.e., in the second region 8 on the back side of the semiconductor substrate 11. That is, the first electrode layer 27 and the second electrode layer 37 are strip-shaped and extend in the Y direction. The first electrode layer 27 and the second electrode layer 37 are alternately provided in the X direction.

The first electrode layer 27 has a first transparent electrode layer 28, a first metal electrode layer 29, and a first conductive protection layer 27P, which are stacked in this order on the first conductive semiconductor layer 25. On the other hand, the second electrode layer 37 has a second transparent electrode layer 38, a second metal electrode layer 39, and a second conductive protection layer 37P, which are stacked in this order on the second conductive semiconductor layer 35.

The first transparent electrode layer 28 and the second transparent electrode layer 38 are formed of a transparent conductive material. Examples of transparent conductive materials include ITO (Indium Tin Oxide: a composite oxide of indium oxide and tin oxide), ZnO (Zinc Oxide: zinc oxide), etc.

The first metal electrode layer 29 and the second metal electrode layer 39 are formed of a metal material. The metal material used is a material that is less expensive than the known conductive paste material containing Ag powder, such as Cu or Al.

The first conductive protective layer 27P and the second conductive protective layer 37P are formed of a transparent conductive material, similar to the first transparent electrode layer 28 and the second transparent electrode layer 38 described above. The first conductive protective layer 27P functions to protect the metal electrode layer 29 from printing damage when printing the contact electrodes 51 and 52. The first conductive protective layer 27P also functions to protect the first metal electrode layer 29, the first transparent electrode layer 28, the semiconductor layers 25 and 23, and the semiconductor substrate 11 from the etching solution when simultaneously etching and annealing (heating) the metal electrode layers 29 and 39 and the transparent electrode layers 28 and 38. Similarly, the second conductive protective layer 37P functions to protect the metal electrode layer 39 from printing damage when printing the contact electrodes 51 and 52. In addition, the second conductive protective layer 37P functions to protect the second metal electrode layer 39, the second transparent electrode layer 38, the semiconductor layers 35 and 33, and the semiconductor substrate 11 from the etching solution during simultaneous etching and annealing (heating) of the metal electrode layers 29 and 39 and the transparent electrode layers 28 and 38. The details of these functions will be described later.

To achieve these functions, it is preferable that the first transparent electrode layer 28 and the second transparent electrode layer 38 are amorphous (non-crystalline) transparent conductive films, and the first conductive protection layer 27P and the second conductive protection layer 37P are crystalline transparent conductive films. In a crystalline transparent conductive film, when a cross section is observed, for example, with a TEM, a larger area in the film is occupied by crystal grains, compared to an amorphous transparent conductive film. Therefore, the etching rate (speed) of a crystalline transparent conductive film is lower (slower) than that of an amorphous transparent conductive film.

The first insulating layer 41 is formed on the first electrode layer 27, i.e., in the first region 7 on the back side of the semiconductor substrate 11. The second insulating layer 42 is formed on the second electrode layer 37, i.e., in the second region 8 on the back side of the semiconductor substrate 11. That is, the first insulating layer 41 and the second insulating layer 42 are strip-shaped and extend in the Y direction, as shown in FIG. 1. The first insulating layer 41 and the second insulating layer 42 are alternately provided in the X direction.

The first insulating layer 41 entirely covers the first electrode layer 27, except for the first non-insulating region 41a. Similarly, the second insulating layer 42 entirely covers the second electrode layer 37, except for the second non-insulating region 42a.

The first non-insulating region 41a is not covered with the first insulating layer 41 and is composed of an opening exposing the first electrode layer 27. The first non-insulating region 41a is arranged on a first straight line X1 extending in the X direction (first direction). Similarly, the second non-insulating region 42a is not covered with the second insulating layer 42 and is composed of an opening exposing the second electrode layer 37. The second non-insulating region 42a is arranged on a second straight line X2 different from the first straight line X1 extending in the X direction (first direction). The first straight line X1 and the second straight line X2 intersect the first electrode layer 27 and the second electrode layer 37 and are arranged alternately in the Y direction (second direction).

Materials for the first insulating layer 41 and the second insulating layer 42 include, for example, silicon oxide (SiO), silicon nitride (SiN), or a composite thereof such as silicon oxynitride (SiON). Thermosetting resins such as epoxy resins or resin esters that can be applied by screen printing and baked can also be used. Inorganic particles such as silica or talc may be mixed into these resins to improve printability or chemical resistance.

A first contact electrode 51 is formed in the first non-insulating region 41a of the first insulating layer 41, and a second contact electrode 52 is formed in the second non-insulating region 42a of the second insulating layer 42. That is, the first contact electrode 51 is formed on the first electrode layer 27 and is disposed on the first straight line X1. On the other hand, the second contact electrode 52 is formed on the second electrode layer 37 and is disposed on the second straight line X2.

The first contact electrode 51 and the second contact electrode 52 are formed by printing and curing a printing material containing particulate metal material such as Cu, Ag, Al, etc. and a resin material, or a printing material containing a solvent in addition to the metal material and the resin material. Among these, an Ag paste material is preferred as the printing material from the viewpoint of contact with the solder for connection to the wiring member.

The width in the Y direction (second direction) of the first non-insulating region 41a of the first insulating layer 41, i.e., the width in the Y direction (second direction) of the first contact electrode 51, is greater than the width of the first wiring member 91. Similarly, the width in the Y direction (second direction) of the second non-insulating region 42a, i.e., the width in the Y direction (second direction) of the second contact electrode 52, is greater than the width of the second wiring member 92. For example, the widths of the first non-insulating region 41a and the second non-insulating region 42a, i.e., the widths of the first contact electrode 51 and the second contact electrode 52, are 1 mm or more and 50 mm or less. This ensures alignment clearance when connecting the wiring members.

As shown in Figures 1, 2A and 2B, the first electrode layer 27 and the second electrode layer 37 are separated at the boundary between the first region 7 and the second region 8. That is, the first transparent electrode layer 28 and the second transparent electrode layer 38 are separated, the first metal electrode layer 29 and the second metal electrode layer 39 are separated, and the first conductive protective layer 27P and the second conductive protective layer 37P are separated. Also, the first insulating layer 41 and the second insulating layer 42 are separated.

The area between the first transparent electrode layer 28 and the second transparent electrode layer 38, i.e., the area between the first metal electrode layer 29 and the second metal electrode layer 39, in other words, the area between the first conductive protective layer 27P and the second conductive protective layer 37P, is not covered with the first insulating layer 41 and the second insulating layer 42.

The main surface of the first conductive protection layer 27P opposite to the main surface in contact with the first metal electrode layer 29 is covered with a first insulating layer 41. Similarly, the main surface of the second conductive protection layer 37P opposite to the main surface in contact with the second metal electrode layer 39 is covered with a second insulating layer 42. On the other hand, the side surface of the first conductive protection layer 27P is not covered with the first insulating layer 41. Similarly, the side surface of the second conductive protection layer 37P is not covered with the second insulating layer 42.

Furthermore, the side surfaces of the first metal electrode layer 29 and the first transparent electrode layer 28 are not covered with the first insulating layer 41. Similarly, the side surfaces of the second metal electrode layer 39 and the second transparent electrode layer 38 are not covered with the second insulating layer 42.

As shown in FIG. 1, the first wiring member 91 extends in the X direction (first direction) along a first straight line X1. Similarly, the second wiring member 92 extends in the X direction (first direction) along a second straight line X2. That is, the first wiring member 91 and the second wiring member 92 intersect with the first electrode layer 27 and the second electrode layer 37, and are arranged alternately in the Y direction (second direction).

The first wiring member 91 is electrically connected to the first electrode layer 27 by a first contact electrode 51 in the first non-insulating region 41a of the first insulating layer 41, and is electrically insulated from the second electrode layer 37 by the second insulating layer 42. Similarly, the second wiring member 92 is electrically connected to the second electrode layer 37 by a second contact electrode 52 in the second non-insulating region 42a of the second insulating layer 42, and is electrically insulated from the first electrode layer 27 by the first insulating layer 41.

The center-to-center distance (pitch) in the Y direction between the first wiring member 91 and the second wiring member 92 is greater than the center-to-center distance (pitch) in the X direction between the first electrode layer 27 and the second electrode layer 37. For example, the center-to-center distance (pitch) between the first wiring member 91 and the second wiring member 92 is 5 mm or more and 50 mm or less. This makes it possible to shorten the current path flowing through the electrode layer, reduce output loss due to electrode resistance, and improve the power generation efficiency of the solar cell.

The first wiring member 91 and the second wiring member 92 may be a known tab wire, etc.

Here, in order to reduce the cost of such solar cells, the inventor(s) of the present application have devised the use of a relatively inexpensive metal, such as Cu (e.g., a film formed using a PVD method such as sputtering, followed by wet etching) as the material for the metal electrode layers 29, 39, instead of the relatively expensive known Ag paste. Note that contact electrodes 51, 52 made of Ag paste are used only in the portions that make contact with the wiring members 91, 92.

In addition, in order to simplify the manufacturing process of such solar cells, the inventor(s) have devised a method in which the insulating layers 41, 42 and the contact electrodes 51, 52 (Ag paste) for ensuring insulation and contact with the wiring members 91, 92 also serve as resists for wet etching of the metal electrode layers 29, 39 (e.g., Cu) and the transparent electrode layers 28, 38. Below, a solar cell devised by the inventor(s) and a manufacturing method thereof will be described as a comparative example.

(Comparative Example Solar Cell)
Fig. 4A is a cross-sectional view of a solar cell of a comparative example, which is a cross-sectional view corresponding to line IIA-IIA in Fig. 1, and Fig. 4B is a cross-sectional view of a solar cell of a comparative example, which is a cross-sectional view corresponding to line IIB-IIB in Fig. 1. Solar cell 1X of the comparative example shown in Fig. 4A and Fig. 4B differs from the solar cell 1 shown in Fig. 2A and Fig. 2B in that the first electrode layer 27X does not include the first conductive protection layer 27P and the second electrode layer 37X does not include the second conductive protection layer 37P from the present embodiment.

(Comparative Example: Solar Cell Manufacturing Method)
Hereinafter, the method for manufacturing a solar cell of the comparative example will be described with reference to Figures 5A to 5E. Figure 5A is a diagram showing a semiconductor layer forming step in the method for manufacturing a solar cell of the comparative example, and Figure 5B is a diagram showing an electrode layer material film forming step, i.e., a transparent electrode layer material film forming step and a metal electrode layer material film forming step, in the method for manufacturing a solar cell of the comparative example. Also, Figure 5C is a diagram showing an insulating layer forming step in the method for manufacturing a solar cell of the comparative example, and Figure 5D is a diagram showing a contact electrode forming step in the method for manufacturing a solar cell of the comparative example. Also, Figure 5E is a diagram showing an electrode layer forming step, i.e., a transparent electrode layer forming step and a metal electrode layer forming step, in the method for manufacturing a solar cell of the comparative example. Figures 5A to 5E show the back side of the semiconductor substrate 11, and the front side of the semiconductor substrate 11 is omitted.

First, as shown in FIG. 5A, a passivation layer 23 and a first conductive type semiconductor layer 25 are formed on a part of the back side of the semiconductor substrate 11, specifically in the first region 7 (semiconductor layer formation process). For example, after a passivation layer material film and a first conductive type semiconductor layer material film are formed on the entire back side of the semiconductor substrate 11 using a CVD method or a PVD method, the passivation layer 23 and the first conductive type semiconductor layer 25 may be patterned using an etching method that uses a resist or a metal mask generated using a photolithography technique or a printing technique.

Next, a passivation layer 33 and a second conductive type semiconductor layer 35 are formed on another part of the back side of the semiconductor substrate 11, specifically in the second region 8 (semiconductor layer formation process). For example, as described above, a passivation layer material film and a second conductive type semiconductor layer material film may be formed on the entire back side of the semiconductor substrate 11 using a CVD method or a PVD method, and then the passivation layer 33 and the second conductive type semiconductor layer 35 may be patterned using an etching method that uses a resist or a metal mask generated using a photolithography technique or a printing technique.

Next, as shown in FIG. 5B, a series of transparent electrode layer material films 28Z are formed on and across the first conductive type semiconductor layer 25 and the second conductive type semiconductor layer 35 (transparent electrode layer material film forming process). The transparent electrode layer material film 28Z can be formed by, for example, CVD or PVD.

Next, a series of metal electrode layer material films 29Z (e.g., Cu) is formed on the transparent electrode layer material film 28Z, i.e., across the first conductive type semiconductor layer 25 and the second conductive type semiconductor layer 35 (metal electrode layer material film formation process). The metal electrode layer material film 29Z is formed, for example, by a PVD method such as sputtering.

Next, as shown in FIG. 5C, a first insulating layer 41 is formed on the first conductive type semiconductor layer 25, i.e., in the first region 7, except for the first non-insulating region 41a, via the transparent electrode layer material film 28Z and the metal electrode layer material film 29Z. A second insulating layer 42 is formed on the second conductive type semiconductor layer 35, i.e., in the second region 8, except for the second non-insulating region 42a, via the transparent electrode layer material film 28Z and the metal electrode layer material film 29Z (insulating layer formation process). Note that the first insulating layer 41 and the second insulating layer 42 are formed to be spaced apart from each other.

Methods for forming the first insulating layer 41 and the second insulating layer 42 include the PVD method, the CVD method, the screen printing method, the inkjet method, the gravure coating method, the dispenser method, etc.

Next, as shown in FIG. 5D, a first contact electrode 51 is formed in the first non-insulating region 41a of the first insulating layer 41, and a second contact electrode 52 is formed in the second non-insulating region 42a of the second insulating layer 42 (contact electrode formation process). Examples of a method for forming the first contact electrode 51 and the second contact electrode 52 include printing methods such as screen printing. For example, the first contact electrode 51 and the second contact electrode 52 are formed by printing and curing or drying a printing material containing Ag particles and a resin material, or a printing material containing Ag particles and a resin material as well as a solvent, i.e., an Ag paste material. Note that drying refers to a state in which the material is not completely cured at a temperature lower than the curing temperature and for a time shorter than the curing time.

Next, as shown in FIG. 5E, the metal electrode layer material film 29Z and the transparent electrode layer material film 28Z are patterned using a wet etching method with the first insulating layer 41 and the first contact electrode 51, and the second insulating layer 42 and the second contact electrode 52 as masks, to form the first transparent electrode layer 28 and the second transparent electrode layer 38, which are separated from each other, and the first metal electrode layer 29 and the second metal electrode layer 39, which are separated from each other (transparent electrode layer forming process and metal electrode layer forming process). As a result, the first electrode layer 27X and the second electrode layer 37X are formed. At this time, the first insulating layer 41 and the second insulating layer 42 are left without being removed. After that, annealing (heating) is performed to obtain the solar cell 1X of the comparative example.

The etching solution for simultaneous etching of the metal electrode layer material film 29Z and the transparent electrode layer material film 28Z can be a mixed solution of an oxidizing agent such as ammonium persulfate (ammonium persulfate) and an acidic solution such as hydrochloric acid (HCl).

Next, both sides of the semiconductor substrate 11 are cleaned (cleaning process). In the cleaning process, for example, ozone treatment is performed, followed by hydrofluoric acid treatment (treatment with hydrofluoric acid or a mixture of hydrofluoric acid and another type of acid).

According to the knowledge of the present inventor(s), the manufacturing method of the solar cell 1X of this comparative example sometimes caused localized physical damage to the semiconductor substrate 11 below the first contact electrode 51 and the second contact electrode 52. This is considered as follows.

During the contact electrode formation process, for example, when Ag paste is screen printed, localized physical damage occurs to the metal electrode layer material film 29Z made of Cu. Then, during the wet etching in the transparent electrode layer formation process and the metal electrode layer formation process, the etching solution that has penetrated the contact electrodes 51 and 52 made of Ag paste penetrates the damaged areas of the metal electrode layers 29 and 39 made of Cu during annealing (heating), locally dissolves the transparent electrode layers 28 and 38, and penetrates the damaged areas of the semiconductor layers 25, 23, 35, and 33. Then, the metal components of the metal electrode layers 29 and 39, for example Cu, diffuse into the semiconductor substrate 11. This is thought to degrade the performance of the solar cell 1X.

In addition, during wet etching in the transparent electrode layer forming process and the metal electrode layer forming process, the etching solution that penetrates the contact electrodes 51, 52 made of Ag paste etches the metal electrode layers 29, 39 made of Cu during annealing (heating), generating Cu ions. During annealing, these Cu ions migrate, for example, through the surfaces of the metal electrode layers 29, 39 and diffuse into the semiconductor substrate 11. This is thought to result in a decrease in the performance of the solar cell 1X.

In this regard, in order to improve resistance to printing damage in the contact electrode formation process and resistance to etching solutions and annealing (heating) in the transparent electrode layer formation process and metal electrode layer formation process, the inventor(s) of the present application devised a method of providing a first conductive protective layer 27P on the first electrode layer 27 and a second conductive protective layer 37P on the second electrode layer 37.

(Method of manufacturing solar cell according to the present embodiment)
Hereinafter, the method for manufacturing a solar cell according to the present embodiment will be described with reference to Figures 3A to 3E. Figure 3A is a diagram showing a semiconductor layer forming step in the method for manufacturing a solar cell according to the present embodiment, and Figure 3B is a diagram showing an electrode layer material film forming step in the method for manufacturing a solar cell according to the present embodiment, that is, a transparent electrode layer material film forming step, a metal electrode layer material film forming step, and a conductive protection layer material film forming step. Also, Figure 3C is a diagram showing an insulating layer forming step in the method for manufacturing a solar cell according to the present embodiment, and Figure 3D is a diagram showing a contact electrode forming step in the method for manufacturing a solar cell according to the present embodiment. Also, Figure 3E is a diagram showing an electrode layer forming step in the method for manufacturing a solar cell according to the present embodiment, that is, a transparent electrode layer forming step, a metal electrode layer forming step, and a conductive protection layer forming step. In Figures 3A to 3E, the back side of the semiconductor substrate 11 is shown, and the front side of the semiconductor substrate 11 is omitted.

3A, a passivation layer 23 and a first conductive type semiconductor layer 25 are formed on a portion of the back surface of the semiconductor substrate 11, specifically in the first region 7 (semiconductor layer formation process). For example, after a passivation layer material film and a first conductive type semiconductor layer material film are formed on the entire back surface of the semiconductor substrate 11 using a CVD method or a PVD method, the passivation layer 23 and the first conductive type semiconductor layer 25 may be patterned using an etching method that uses a resist or a metal mask generated using a photolithography technique or a printing technique.

The etching solution for the p-type semiconductor layer material film can be, for example, an acidic solution such as hydrofluoric acid containing ozone or a mixture of nitric acid and hydrofluoric acid, and the etching solution for the n-type semiconductor layer material film can be, for example, an alkaline solution such as an aqueous solution of potassium hydroxide.

Alternatively, when a passivation layer and a first conductive type semiconductor layer are laminated on the back side of the semiconductor substrate 11 using a CVD method or a PVD method, a mask may be used to simultaneously form and pattern the passivation layer 23 and the first conductive type semiconductor layer 25.

Next, a passivation layer 33 and a second conductive type semiconductor layer 35 are formed on another part of the back side of the semiconductor substrate 11, specifically in the second region 8 (semiconductor layer formation process). For example, as described above, a passivation layer material film and a second conductive type semiconductor layer material film may be formed on the entire back side of the semiconductor substrate 11 using a CVD method or a PVD method, and then the passivation layer 33 and the second conductive type semiconductor layer 35 may be patterned using an etching method that uses a resist or a metal mask generated using a photolithography technique or a printing technique.

Alternatively, when a passivation layer and a second conductive type semiconductor layer are laminated on the back side of the semiconductor substrate 11 using a CVD method or a PVD method, a mask may be used to simultaneously form and pattern the passivation layer 33 and the second conductive type semiconductor layer 35.

In addition, in this semiconductor layer formation process, a passivation layer 13 may be formed on the entire light-receiving surface side of the semiconductor substrate 11 (not shown).

Next, as shown in FIG. 3B, a series of transparent electrode layer material films 28Z are formed on and across the first conductive type semiconductor layer 25 and the second conductive type semiconductor layer 35 (transparent electrode layer material film forming process). The transparent electrode layer material film 28Z can be formed by, for example, CVD or PVD.

Next, a series of metal electrode layer material films 29Z (e.g., Cu) is formed on the transparent electrode layer material film 28Z, i.e., across the first conductive type semiconductor layer 25 and the second conductive type semiconductor layer 35 (metal electrode layer material film formation process). The metal electrode layer material film 29Z is formed, for example, by a PVD method such as sputtering.

Next, a series of conductive protective layer material films 27PZ are formed on the metal electrode layer material film 29Z, i.e., across the first conductive type semiconductor layer 25 and the second conductive type semiconductor layer 35 (conductive protective layer material film formation process). As a method for forming the conductive protective layer material film 27PZ, for example, a CVD method or a PVD method is used, as in the case of the transparent electrode layer material film 28Z described above.

Next, as shown in FIG. 3C, a first insulating layer 41 is formed on the first conductive type semiconductor layer 25, i.e., in the first region 7, except for the first non-insulating region 41a, via the transparent electrode layer material film 28Z, the metal electrode layer material film 29Z, and the conductive protective layer material film 27PZ. A second insulating layer 42 is formed on the second conductive type semiconductor layer 35, i.e., in the second region 8, except for the second non-insulating region 42a, via the transparent electrode layer material film 28Z and the metal electrode layer material film 29Z (insulating layer formation process). Note that the first insulating layer 41 and the second insulating layer 42 are formed to be spaced apart from each other.

Methods for forming the first insulating layer 41 and the second insulating layer 42 include the PVD method, the CVD method, the screen printing method, the inkjet method, the gravure coating method, the dispenser method, etc.

Next, as shown in FIG. 3D, a first contact electrode 51 is formed in the first non-insulating region 41a of the first insulating layer 41, and a second contact electrode 52 is formed in the second non-insulating region 42a of the second insulating layer 42 (contact electrode formation process). Examples of a method for forming the first contact electrode 51 and the second contact electrode 52 include printing methods such as screen printing. For example, the first contact electrode 51 and the second contact electrode 52 are formed by printing and curing or drying a printing material containing Ag particles and a resin material, or a printing material containing Ag particles and a resin material as well as a solvent, i.e., an Ag paste material. Note that, as described above, drying refers to a state in which the material is not completely cured at a temperature lower than the curing temperature and for a time shorter than the curing time.

At this time, that is, during screen printing of, for example, Ag paste, the conductive protective layer material film 27PZ protects the metal electrode layer material film 29Z made of, for example, Cu, and suppresses localized physical damage to the metal electrode layer material film 29Z.

Next, as shown in FIG. 3E, the conductive protective layer material film 27PZ is patterned using a wet etching method with the first insulating layer 41 and the first contact electrode 51, and the second insulating layer 42 and the second contact electrode 52 as masks to form a first conductive protective layer 27P and a second conductive protective layer 37P that are separated from each other (electrode layer formation process).

An example of an etching solution for the conductive protective layer material film 27PZ is an acidic solution such as hydrochloric acid (HCl).

Next, the metal electrode layer material film 29Z and the transparent electrode layer material film 28Z are patterned using a wet etching method with the first insulating layer 41 and the first contact electrode 51, and the second insulating layer 42 and the second contact electrode 52 as masks, to form the first transparent electrode layer 28 and the second transparent electrode layer 38, which are separated from each other, and the first metal electrode layer 29 and the second metal electrode layer 39, which are separated from each other (electrode layer formation process). This forms the first electrode layer 27 and the second electrode layer 37. At this time, the first insulating layer 41 and the second insulating layer 42 are left without being removed.

The etching solution for simultaneous etching of the metal electrode layer material film 29Z and the transparent electrode layer material film 28Z can be a mixed solution of an oxidizing agent such as ammonium persulfate (ammonium persulfate) and an acidic solution such as hydrochloric acid (HCl).

Next, both sides of the semiconductor substrate 11 are cleaned (cleaning process). In the cleaning process, for example, ozone treatment is performed, followed by hydrofluoric acid treatment (treatment with hydrofluoric acid or a mixture of hydrofluoric acid and another type of acid).

Then, an optical adjustment layer 15 is formed over the entire light-receiving surface side of the semiconductor substrate 11 (not shown). If the printing material is dried in the contact electrode formation process described above, the printing material may be hardened. Then, annealing (heating) is performed to obtain the back electrode type solar cell 1 of this embodiment shown in Figures 1 and 2.

Here, during wet etching in the transparent electrode layer forming process and the metal electrode layer forming process, the etching solution penetrates into the contact electrodes 51, 52 made of Ag paste. However, as described above, local physical damage to the metal electrode layer material film 29Z is suppressed. Therefore, during annealing (heating), the etching solution that penetrated into the contact electrodes 51, 52 is suppressed from penetrating into the metal electrode layers 29, 39 made of Cu, the transparent electrode layers 28, 38, and the semiconductor layers 25, 23, 35, 33, and the metal components of the metal electrode layers 29, 39, such as Cu, are suppressed from diffusing into the semiconductor substrate 11. It is believed that this suppresses the deterioration of the performance of the solar cell 1.

The etching solution that has penetrated into the contact electrodes 51, 52 can be retained in the contact electrodes 51, 52 for a long time until the subsequent cleaning process. Therefore, in order to prevent the etching solution from penetrating into the layers below the contact electrodes 51, 52, it is preferable that the etching rate of the first conductive protection layer 27P and the second conductive protection layer 37P with respect to the etching solution is low. This makes it possible to further prevent the etching solution from penetrating into the metal electrode layers 29, 39 and the transparent electrode layers 28, 38, and to obtain a solar cell with higher performance.

On the other hand, from the viewpoint of improving the pattern formation accuracy of the metal electrode layers 29, 39 and the transparent electrode layers 28, 38, it is preferable that the etching rate of the transparent electrode layers 28, 38 is high. By providing the first conductive protection layer 27P and the second conductive protection layer 37P, the intrusion of the etching solution into the transparent electrode layers 28, 38 via the metal electrode layers 29, 39 is suppressed, so that even if the etching rate of the transparent electrode layers 28, 38 in the etching solution is increased, it is possible to manufacture high-performance solar cells with good productivity.

In this embodiment, in regard to these points, if the first transparent electrode layer 28 and the second transparent electrode layer 38 are amorphous (non-crystalline) transparent conductive films, and the first conductive protection layer 27P and the second conductive protection layer 37P are crystalline transparent conductive films, the etching rate (speed) of the crystalline transparent conductive film is lower (slower) than the etching rate (speed) of the amorphous transparent conductive film. Therefore, during annealing (heating), the etching solution that has penetrated the contact electrodes 51 and 52 is prevented from penetrating the metal electrode layers 29 and 39 made of Cu, the transparent electrode layers 28 and 38, and the semiconductor layers 25, 23, 35, and 33, and the metal components of the metal electrode layers 29 and 39, such as Cu, are prevented from diffusing into the semiconductor substrate 11. This is thought to suppress the deterioration of the performance of the solar cell 1.

In addition, the first conductive protective layer 27P and the second conductive protective layer 37P prevent the etching solution that penetrates the contact electrodes 51, 52 made of Ag paste during wet etching in the transparent electrode layer formation process and the metal electrode layer formation process from etching the metal electrode layers 29, 39 made of Cu during annealing (heating), generating Cu ions that then migrate, for example, through the surfaces of the metal electrode layers 29, 39 and diffuse into the semiconductor substrate 11 during annealing. This is believed to prevent a decrease in the performance of the solar cell 1.

As described above, according to the solar cell manufacturing method of this embodiment, a relatively inexpensive metal, such as Cu (e.g., a film formed using a PVD method such as sputtering, followed by wet etching) is used as the material for the metal electrode layers 29, 39 instead of the relatively expensive known Ag paste. This makes it possible to reduce the cost of the solar cell.

In addition, according to the solar cell manufacturing method of this embodiment, the insulating layers 41, 42 and the contact electrodes 51, 52 (Ag paste) for ensuring insulation and contact with the wiring members 91, 92 also serve as resists for wet etching of the metal electrode layers 29, 39 (e.g., Cu) and the transparent electrode layers 28, 38. This makes it possible to eliminate the steps of forming and removing resists for wet etching of the metal electrode layers 29, 39 and the transparent electrode layers 28, 38, simplifying the solar cell manufacturing process.

Furthermore, according to the manufacturing method of the solar cell of this embodiment, conductive protective layers 27P, 37P are provided on the transparent electrode layers 28, 38 and the metal electrode layers 29, 39. As a result, during screen printing of, for example, Ag paste in the contact electrode formation process, the conductive protective layers 27P, 37P protect the metal electrode layers 29, 39 made of, for example, Cu, and local physical damage to the metal electrode layers 29, 39 made of Cu is suppressed. Therefore, during wet etching in the transparent electrode layer formation process and the metal electrode layer formation process, the etching solution that has penetrated into the contact electrodes 51, 52 made of Ag paste is suppressed from penetrating into the metal electrode layers 29, 39 made of Cu, the transparent electrode layers 28, 38, and the semiconductor layers 25, 23, 35, 33 during annealing (heating), and the metal components of the metal electrode layers 29, 39, such as Cu, are suppressed from diffusing into the semiconductor substrate 11. This suppresses the deterioration of the performance of the solar cell 1.

In addition, if the first transparent electrode layer 28 and the second transparent electrode layer 38 are amorphous (non-crystalline) transparent conductive films, and the first conductive protection layer 27P and the second conductive protection layer 37P are crystalline transparent conductive films, the etching rate (speed) of the crystalline transparent conductive film is lower (slower) than the etching rate (speed) of the amorphous transparent conductive film. Therefore, during wet etching in the transparent electrode layer forming process and the metal electrode layer forming process, the etching solution that has penetrated into the contact electrodes 51 and 52 made of Ag paste is prevented from penetrating into the metal electrode layers 29 and 39 made of Cu, the transparent electrode layers 28 and 38, and the semiconductor layers 25, 23, 35, and 33 during annealing (heating), and the metal components of the metal electrode layers 29 and 39, such as Cu, are prevented from diffusing into the semiconductor substrate 11. This prevents the performance of the solar cell 1 from deteriorating.

Furthermore, the first conductive protective layer 27P and the second conductive protective layer 37P prevent the etching solution that penetrates the contact electrodes 51, 52 made of Ag paste during wet etching in the transparent electrode layer formation process and the metal electrode layer formation process from etching the metal electrode layers 29, 39 made of Cu during annealing (heating), generating Cu ions that then migrate, for example, through the surfaces of the metal electrode layers 29, 39 and diffuse into the semiconductor substrate 11 during annealing. This prevents a decrease in the performance of the solar cell 1.

In addition, in the ITO/Cu/Ag electrode structure of the solar cell 1X of the comparative example, the surface of the metal electrode layers 29, 39 made of Cu is oxidized, and the contact resistance between the metal electrode layers 29, 39 and the contact electrodes 51, 52 made of Ag paste increases, compared to the conventional ITO/Ag electrode structure. Therefore, in the ITO/Cu/Ag electrode structure of the solar cell 1X of the comparative example, the series resistance Rs increases, compared to the conventional ITO/Ag electrode structure.

On the other hand, in the ITO/Cu/ITO/Ag electrode structure of the solar cell 1 of this embodiment, the conductive protective layers 27P, 37P suppress oxidation of the surfaces of the metal electrode layers 29, 39 made of Cu, and can suppress an increase in the contact resistance between the metal electrode layers 29, 39 and the contact electrodes 51, 52 made of Ag paste. Therefore, in the ITO/Cu/ITO/Ag electrode structure of the solar cell 1, an increase in the series resistance Rs can be suppressed compared to the ITO/Cu/Ag electrode structure of the comparative example, and the series resistance Rs can be kept at the same level as in the conventional ITO/Ag electrode structure.

In addition, in the ITO/Cu/ITO/Ag electrode structure of the solar cell 1 of this embodiment, the conductive protective layers 27P, 37P suppress oxidation of the surfaces of the metal electrode layers 29, 39 made of Cu, so that high-temperature heat treatment can be performed compared to the ITO/Cu/Ag electrode structure of the comparative example, and the series resistance Rs can be reduced by reducing the volume resistivity of Cu, improving the performance of the solar cell.

In addition, in the ITO/Cu/ITO/Ag electrode structure of the solar cell 1 of this embodiment, the conductive protective layers 27P, 37P suppress oxidation of the surfaces of the metal electrode layers 29, 39 made of Cu, so that the adhesion between the metal electrode layers 29, 39 and the contact electrodes 51, 52 made of Ag paste can be improved compared to the ITO/Cu/Ag electrode structure of the comparative example, and as a result, the reliability of the solar cell can be improved.

In this way, the solar cell manufacturing method of this embodiment can suppress deterioration in solar cell performance while simplifying the manufacturing process and reducing the cost of the solar cell.

Although the embodiments of the present invention have been described above, the present invention is not limited to the above-described embodiments, and various modifications and variations are possible. For example, the above-described embodiments have been illustrated as solar cell 1 using crystalline silicon material, but the present invention is not limited to this. For example, various materials such as gallium arsenide (GaAs) may be used as the material of the solar cell.

In the above-described embodiment, a heterojunction solar cell 1 is illustrated as shown in FIG. 2. However, the present invention is not limited to this, and can be applied to various solar cell types such as homojunction solar cells.

The present invention will be described in detail below with reference to examples, but the present invention is not limited to the following examples.

Example 1
A back electrode type solar cell of this embodiment shown in Figures 1 to 2B was fabricated as Example 1 using the solar cell manufacturing method of this embodiment shown in Figures 3A to 3E. In Example 1, the printing area of the contact electrode was enlarged to more clearly demonstrate the effect of reducing local damage during printing of the contact electrode. Specifically, in Figures 1 to 3E, the formation of the first insulating layer 41 and the second insulating layer 42 was omitted, and the first contact electrode 51 was formed over the entire first region 7, and the second contact electrode 52 was formed over the entire second region 8. The solar cell of Example 1 and its manufacturing method have the following features.
<Transparent electrode layer material film formation process>
Transparent electrode layer material: amorphous ITO, formation method: CVD, film thickness: 100 nm
<Metal electrode layer material film formation process>
Metal electrode layer material: Cu, Forming method: PVD (sputtering), Film thickness: 250 nm
<Conductive protective layer material film formation process>
Conductive protection layer material: Crystalline ITO, Forming method: PVD, Film thickness: 50 nm
<Insulating layer forming process>
<Contact electrode formation process>
Contact electrode material: Ag paste, Forming method: Screen printing, Drying: 180 degrees/60 minutes, Film thickness: Approximately 30 μm
<Conductive Protective Layer Forming Process (Patterning)>
Etching solution: 1 wt % hydrochloric acid (HCl) solution, etching time: 30 seconds <Transparent electrode layer forming process and metal electrode layer forming process (simultaneous patterning)>
Etching solution: mixed solution of 5 wt% ammonium persulfate (ammonium persulfate) and 9 wt% hydrochloric acid (HCl), etching time: 60 seconds <Annealing>
Contact electrode drying: 180 degrees/1 hour

(Comparative Example 1)
A comparative back electrode type solar cell shown in Figures 4A to 4B was fabricated as Comparative Example 1 using the comparative solar cell manufacturing method shown in Figures 5A to 5E. Note that, in Comparative Example 1 as well, the printing area of the contact electrode was enlarged to more clearly demonstrate the effect of reducing local damage during printing of the contact electrode. Specifically, in Figures 4A to 5E, the formation of the first insulating layer 41 and the second insulating layer 42 was omitted, and the first contact electrode 51 was formed over the entire first region 7, and the second contact electrode 52 was formed over the entire second region 8. The characteristics of the solar cell of Comparative Example 1 and its manufacturing method are as follows and shown in Table 2.
<Transparent electrode layer material film formation process>
Same as Example 1.
<Metal electrode layer material film formation process>
Same as Example 1.
<Insulating layer forming process>
<Contact electrode formation process>
Same as Example 1.
<Transparent electrode layer forming process and metal electrode layer forming process (simultaneous patterning)>
Same as Example 1.
<Annealing>
Same as Example 1.

(Comparative Example 2)
The solar cell of Comparative Example 2 differs from Comparative Example 1 in that metal electrode layers 29, 39 are formed of Ag paste instead of Cu, and contact electrodes 51, 52 are omitted.
<Transparent electrode layer material film formation process>
Same as Comparative Example 1.
<Metal electrode layer material film formation process>
Metal electrode layer material: Ag paste, Forming method: Screen printing, Drying: 180 degrees/60 minutes, Film thickness: Approximately 30 μm
<Insulating layer forming process>
<Contact electrode formation process>
Omitted <Transparent electrode layer formation process (patterning)>
Etching solution: 1 wt % hydrochloric acid (HCl) solution, etching time: 30 seconds <Annealing>
Same as Comparative Example 1.

(Rating 1)
Using a photoluminescence measuring device, light of a wavelength corresponding to the photoluminescence characteristics of the solar cell (wavelength: 915 nm, intensity 0.67 sun) was irradiated onto the light receiving surface of the solar cell, and the photoluminescence intensity from the solar cell was observed. The results are shown in Table 1. In Table 1, the photoluminescence intensity values before and after annealing are normalized with respect to the photoluminescence intensity value before annealing in each of Example 1 and Comparative Example 1.

(Rating 2)
Using a pulse solar simulator having a spectral distribution of AM1.5, the solar cells were irradiated with artificial sunlight at an energy density of 100 mW/cm2 at ²⁵ °C to measure the performance characteristics (open circuit voltage Voc, short circuit current Isc, fill factor FF, conversion efficiency Eff, series resistance Rs, and parallel resistance Rsh) of the solar cells of the above examples and comparative examples. The measurement results are shown in Table 2.

According to Table 1, in the ITO/Cu/Ag electrode structure of Comparative Example 1, when heat was applied by annealing, the photoluminescence intensity of the lower part of the contact electrode made of Ag paste decreased. Also, according to Table 2, in the ITO/Cu/Ag electrode structure of Comparative Example 1, the performance characteristics of the solar cell decreased compared to the ITO/Ag electrode structure of Comparative Example 2.

As a result, in Comparative Example 1, localized physical damage occurs to the metal electrode layers 29 and 39 made of Cu during screen printing of Ag paste in the contact electrode formation process. Then, during wet etching in the transparent electrode layer formation process and the metal electrode layer formation process, the etching solution that penetrates the contact electrodes 51 and 52 made of Ag paste penetrates the damaged areas of the metal electrode layers 29 and 39 made of Cu during annealing (heating), locally dissolves the transparent electrode layers 28 and 38, and penetrates the damaged areas of the semiconductor layers 25, 23, 35, and 33. Then, the Cu components of the metal electrode layers 29 and 39 diffuse into the semiconductor substrate 11. This is thought to result in a decrease in the performance of the solar cell.

In Comparative Example 1, during wet etching in the transparent electrode layer forming process and the metal electrode layer forming process, the etching solution that penetrates the contact electrodes 51 and 52 made of Ag paste etches the metal electrode layers 29 and 39 made of Cu during annealing (heating), generating Cu ions. During annealing, these Cu ions migrate, for example, through the surfaces of the metal electrode layers 29 and 39 and diffuse into the semiconductor substrate 11. This is thought to result in a decrease in the performance of the solar cell.

On the other hand, according to Table 1, in the ITO/Cu/ITO/Ag electrode structure of Example 1, even when heated by annealing, the decrease in photoluminescence intensity at the bottom of the contact electrode made of Ag paste was suppressed. Also, according to Table 2, in the ITO/Cu/ITO/Ag electrode structure of Example 1, the decrease in the performance characteristics of the solar cell was suppressed compared to the ITO/Cu/Ag electrode structure of Comparative Example 1, and the performance characteristics of the solar cell were comparable to those of the ITO/Ag electrode structure of Comparative Example 2.

In this way, in Example 1, the metal electrode layers 29, 39 made of Cu are protected by the conductive protective layers 27P, 37P during screen printing of Ag paste in the contact electrode formation process, and local physical damage to the metal electrode layers 29, 39 made of Cu is suppressed. Therefore, during wet etching in the transparent electrode layer formation process and the metal electrode layer formation process, the etching solution that has penetrated into the contact electrodes 51, 52 made of Ag paste is suppressed from penetrating into the metal electrode layers 29, 39 made of Cu, the transparent electrode layers 28, 38, and the semiconductor layers 25, 23, 35, 33 during annealing (heating), and the Cu components of the metal electrode layers 29, 39 are suppressed from diffusing into the semiconductor substrate 11. It is believed that this can suppress the deterioration of the performance of the solar cell.

In Example 1, the first transparent electrode layer 28 and the second transparent electrode layer 38 are amorphous (non-crystalline) transparent conductive films, the first conductive protection layer 27P and the second conductive protection layer 37P are crystalline transparent conductive films, and the etching rate (speed) of the crystalline transparent conductive film is lower (slower) than the etching rate (speed) of the amorphous transparent conductive film. Therefore, during wet etching in the transparent electrode layer forming process and the metal electrode layer forming process, the etching solution that has penetrated into the contact electrodes 51 and 52 made of Ag paste is prevented from penetrating into the metal electrode layers 29 and 39 made of Cu, the transparent electrode layers 28 and 38, and the semiconductor layers 25, 23, 35, and 33 during annealing (heating), and the metal components of the metal electrode layers 29 and 39, such as Cu, are prevented from diffusing into the semiconductor substrate 11. It is believed that this can suppress the deterioration of the performance of the solar cell 1.

Furthermore, the first conductive protective layer 27P and the second conductive protective layer 37P prevent the etching solution that penetrates the contact electrodes 51, 52 made of Ag paste during wet etching in the transparent electrode layer formation process and the metal electrode layer formation process from etching the metal electrode layers 29, 39 made of Cu during annealing (heating), generating Cu ions that then migrate, for example, through the surfaces of the metal electrode layers 29, 39 and diffuse into the semiconductor substrate 11 during annealing. This is believed to prevent a decrease in the performance of the solar cell 1.

Also, according to Table 2, the ITO/Cu/Ag electrode structure of Comparative Example 1 had an increased series resistance Rs compared to the ITO/Ag electrode structure of Comparative Example 2. This suggests that in Comparative Example 1, the surfaces of the metal electrode layers 29 and 39 made of Cu are oxidized, increasing the contact resistance between the metal electrode layers 29 and 39 and the contact electrodes 51 and 52 made of Ag paste.

On the other hand, according to Table 2, in the ITO/Cu/ITO/Ag electrode structure of Example 1, the increase in series resistance Rs was suppressed compared to the ITO/Cu/Ag electrode structure of Comparative Example 1, and the series resistance Rs was about the same as that of the ITO/Ag electrode structure of Comparative Example 2. From this, it is considered that in Example 1, the conductive protective layers 27P, 37P suppress the oxidation of the surfaces of the metal electrode layers 29, 39 made of Cu, and can suppress the increase in the contact resistance between the metal electrode layers 29, 39 and the contact electrodes 51, 52 made of Ag paste.

1, 1X Solar cell 7 First region 8 Second region 11 Semiconductor substrate 13, 23, 33 Passivation layer 15 Optical adjustment layer 25 First conductivity type semiconductor layer 27, 27X First electrode layer 27P First conductive protection layer 27PZ Conductive protection layer material film 28 First transparent electrode layer 28Z Transparent electrode layer material film 29 First metal electrode layer 29Z Metal electrode layer material film 35 Second conductivity type semiconductor layer 37, 37X Second electrode layer 37P Second conductive protection layer 38 Second transparent electrode layer 39 Second metal electrode layer 41 First insulating layer 41a First non-insulating region 42 Second insulating layer 42a Second non-insulating region 51 First contact electrode 52 Second contact electrode 91 First wiring member 92 Second wiring member X1 First straight line X2 Second straight line

Claims (13)

A method for manufacturing a back electrode type solar cell comprising: a semiconductor substrate; a first conductivity type semiconductor layer, a first transparent electrode layer, and a first metal electrode layer, which are laminated in this order in a first region, which is a part of one main surface side of the semiconductor substrate; and a second conductivity type semiconductor layer, a second transparent electrode layer, and a second metal electrode layer, which are laminated in this order in a second region, which is another part of the one main surface side of the semiconductor substrate,
a transparent electrode layer material film forming step of forming a series of transparent electrode layer material films on the first conductive type semiconductor layer and the second conductive type semiconductor layer on the one main surface side of the semiconductor substrate;
a metal electrode layer material film forming step of forming a series of metal electrode layer material films on the transparent electrode layer material film;
a conductive protection layer material film forming step of forming a series of conductive protection layer material films on the material film of the metal electrode layer;
an insulating layer forming step of forming a first insulating layer that entirely covers the material film of the conductive protection layer in the first region except for a first non-insulating region, and a second insulating layer that entirely covers the material film of the conductive protection layer in the second region except for a second non-insulating region, the first insulating layer and the second insulating layer being spaced apart from each other;
a contact electrode forming step of forming contact electrodes in the first non-insulating region and the second non-insulating region;
a transparent electrode layer and metal electrode layer forming step of removing exposed portions of the material film of the conductive protection layer, and the material film of the metal electrode layer and the material film of the transparent electrode layer corresponding to the exposed portions, by using an etching method using the first insulating layer, the second insulating layer and the contact electrode as a mask, thereby forming the first transparent electrode layer, the first metal electrode layer and the first conductive protection layer which are patterned, and the second transparent electrode layer, the second metal electrode layer and the second conductive protection layer which are patterned;
Including,
In the contact electrode forming step, a printing material including a particulate metal material and a resin material is printed and cured or dried to form the contact electrode;
In the transparent electrode layer and metal electrode layer forming step, a material film of the conductive protection layer protects the metal electrode layer, the transparent electrode layer, the first conductive type semiconductor layer, the second conductive type semiconductor layer, and the semiconductor substrate from an etching solution that penetrates through the contact electrodes.
How solar cells are manufactured. The method for manufacturing a solar cell according to claim 1, wherein the material film of the metal electrode layer contains copper. The method for manufacturing a solar cell according to claim 2, wherein the material film of the conductive protective layer is a transparent conductive film. The method for manufacturing a solar cell according to claim 3, wherein in the transparent electrode layer and metal electrode layer forming step, the exposed portion of the material film of the conductive protection layer is etched, and then the material film of the metal electrode layer and the material film of the transparent electrode layer are simultaneously etched. the etching solution for the material film of the conductive protection layer is an acidic solution;
The etching solution for simultaneous etching of the material film of the metal electrode layer and the material film of the transparent electrode layer is a mixed solution of an oxidizing agent and an acidic solution.
The method for producing a solar cell according to claim 4 . The method for manufacturing a solar cell according to any one of claims 1 to 5, wherein the printing material is silver paste. A back electrode type solar cell comprising: a semiconductor substrate; a first conductive type semiconductor layer, a first transparent electrode layer, and a first metal electrode layer, which are laminated in this order in a first region, which is a part of one main surface side of the semiconductor substrate; and a second conductive type semiconductor layer, a second transparent electrode layer, and a second metal electrode layer, which are laminated in this order in a second region, which is another part of the one main surface side of the semiconductor substrate;
a first conductive protection layer formed on the first metal electrode layer;
a second conductive protection layer formed on the second metal electrode layer;
a first insulating layer entirely covering the first conductive protective layer except for a first non-insulating region;
a second insulating layer entirely covering the second conductive protective layer except for a second non-insulating region;
contact electrodes formed in the first non-insulating region and the second non-insulating region;
A solar cell comprising: The solar cell of claim 7, wherein the first metal electrode layer and the second metal electrode layer contain copper. The solar cell according to claim 8, wherein the first conductive protective layer and the second conductive protective layer are transparent conductive films. the first transparent electrode layer and the second transparent electrode layer are amorphous transparent conductive films,
The first conductive protection layer and the second conductive protection layer are crystalline transparent conductive films.
The solar cell according to claim 9. a region between the first metal electrode layer and the second metal electrode layer, the region between the first transparent electrode layer and the second transparent electrode layer being not covered with the first insulating layer and the second insulating layer;
the first non-insulating region is not covered with the first insulating layer, exposes the first conductive protection layer, has the contact electrode on the exposed first conductive protection layer, and is disposed on a first straight line extending in a first direction along the one main surface of the semiconductor substrate;
the second non-insulating region is not covered with the second insulating layer, exposes the second conductive protection layer, has the contact electrode on the exposed second conductive protection layer, and is disposed on a second straight line different from the first straight line extending in the first direction.
The solar cell according to any one of claims 7 to 10 . the first insulating layer and the second insulating layer are strip-shaped extending in a second direction along the one main surface and intersecting the first direction, and are arranged alternately in the first direction;
the first straight line and the second straight line intersect the first insulating layer and the second insulating layer and are alternately arranged in the second direction;
The solar cell according to claim 11 . a first wiring member extending in the first direction along the first straight line and electrically connected to the contact electrode in the first non-insulating region;
a second wiring member extending in the first direction along the second straight line and electrically connected to the contact electrode in the second non-insulating region;
The solar cell according to claim 11 or 12 , comprising:

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