JP7690645B2 - Semiconductor Device - Google Patents

Description

The present invention relates to a semiconductor device.

A power conversion circuit (e.g., an inverter) is known that includes a high-side switch connected to a high-voltage source (DC input power supply Vin) and a low-side switch connected to the high-side switch. In such a power conversion circuit, in order to prevent both switches from turning on at the same time and causing a large through current to flow, it is common to provide a period (dead time) during which both switches are off between when one switch is turned off and when the other switch is turned on. However, since the dead time is a period during which losses occur and it is preferable to make it as short as possible, a power conversion circuit is known that detects the dead time by detecting voltage fluctuations at the connection point (voltage detection point) between the high-side switch and the low-side switch, and controls the dead time (see, for example, Patent Document 1).

As shown in FIG. 7, the power conversion circuit described in Patent Document 1 includes a voltage fluctuation detection circuit (hereinafter referred to as a conventional voltage fluctuation detection circuit 900) having a capacitance element 920, one end of which is connected to a connection point N between a high-side switch Q1 and a low-side switch Q2, and the other end of which is connected to a reference potential (GND) via a resistor R, and detects the dead time by detecting the voltage fluctuation at the connection point N as a voltage detection point. As the capacitance element 920 of the voltage fluctuation detection circuit 900, a relatively high voltage resistance element must be used in consideration of the case where a large amount of power flows from the DC input power supply Vin, and an external element is generally used. In such a power conversion circuit, the high-side switch Q1 and the low-side switch Q2 are arranged in a high-voltage region, and the gate driver IC having a drive circuit for driving each switch is arranged in a relatively low-voltage region.

According to the conventional voltage fluctuation detection circuit 900, when a voltage fluctuation occurs at the voltage detection point N, a displacement current flows through the capacitance element 920, so that the voltage fluctuation can be detected by detecting the displacement current, and thus the dead time can be detected.

Patent No. 4407077

In recent years, with the demand for miniaturization of electronic devices, there is a demand to incorporate a voltage fluctuation detection circuit (capacitive element) that detects dead time into the gate driver IC. In this case, the capacitive element 920 that constitutes the voltage fluctuation detection circuit 900 needs to be formed on a semiconductor substrate. Therefore, it is conceivable to form a conductive film 970 arranged on the semiconductor substrate 910 via an insulating film 950, and an electrode 980 arranged on the conductive film 970 via a relatively thick insulating film 990, and to form the capacitive element 920 with the conductive film 970, the relatively thick insulating film 990, and the electrode 980 (see FIG. 8).

However, in the manufacturing process of the gate driver IC, it is difficult to form a reliable and thick insulating film on the semiconductor substrate 910, so it is difficult to form a high-voltage capacitance element on the semiconductor substrate 910, and it is difficult to incorporate the conventional voltage fluctuation detection circuit 900 into the gate driver IC. If an oxide film formed by thermal oxidation is used as the dielectric (insulating film 990) in the capacitance element 920, a high-quality oxide film can be formed, but it is difficult to form it thick, and it is difficult to form a high-voltage capacitance element that can withstand the voltage from the DC input power supply Vin. If an oxide film formed by room temperature or plasma CVD is used as the dielectric (insulating film 990) in the capacitance element 920, it can be formed relatively thick, but the oxide film formed by room temperature or plasma CVD is prone to problems such as insulation failure, making it difficult to form a highly reliable capacitance element.

The present invention has been made to solve the above problems, and aims to provide a voltage fluctuation detection circuit that can be built into a gate driver IC and a semiconductor device that constitutes such a voltage fluctuation detection circuit.

The voltage fluctuation detection circuit of the present invention is a voltage fluctuation detection circuit that detects voltage fluctuations at a specified voltage detection point, and is characterized by comprising a transistor including a junction FET having a resurf structure connected to the voltage detection point, and a capacitive element having one end connected to the transistor and the other end connected to a reference potential.

The semiconductor device of the present invention comprises a semiconductor substrate having a substrate of a first conductivity type and a first semiconductor layer of a second conductivity type formed on the substrate, a first electrode disposed above the semiconductor substrate and in contact with the semiconductor substrate, a second electrode disposed above the semiconductor substrate at a position spaced apart from the first electrode, an isolation film formed in a predetermined region between the first electrode and the second electrode on the surface of the semiconductor substrate, an insulating film disposed between the second electrode and the isolation film on the surface of the semiconductor substrate, a third electrode disposed on the insulating film at a position in contact with the isolation film, and a conductive film disposed on the insulating film at a position spaced apart from the third electrode. The substrate, the first semiconductor layer, the isolation film, the first electrode, and the third electrode constitute a transistor including a junction FET having a resurf structure, and the first semiconductor layer, the insulating film, and the conductive film constitute a capacitance element.

The voltage detection circuit and semiconductor device of the present invention include a transistor including a junction FET having a resurf structure, so that even when a large amount of power flows from a DC input power supply connected via a high-side switch, the resurf structure maintains a high breakdown voltage, while the junction FET keeps the voltage on the source electrode side (third electrode and first conductive film side) of the transistor low (see FIG. 3), and the voltage applied to the capacitance element can be kept low. Therefore, it is not necessary to form a high-voltage capacitance element on the semiconductor substrate, and it is sufficient to form a low-voltage capacitance element, so that the capacitance element can be formed on the semiconductor substrate during the manufacturing process of the gate driver IC, and it becomes possible to incorporate the voltage fluctuation detection circuit into the gate driver IC.

1 is a diagram for explaining a power conversion circuit 1 according to a first embodiment. FIG. 1 is a cross-sectional view shown for explaining a semiconductor device 100 according to a first embodiment. 4 is a schematic graph shown for explaining the RESURF structure of the semiconductor device 100 according to the first embodiment. 10 is a diagram illustrating equipotential lines shown based on a simulation result for a semiconductor device 100a according to an example. FIG. FIG. 11 is a cross-sectional view for explaining a semiconductor device 101 according to a second embodiment. FIG. 11 is a cross-sectional view for explaining a semiconductor device 102 according to a third embodiment. 7 is a circuit diagram showing a conventional voltage fluctuation detection circuit 900. In Fig. 7, OUT is an output terminal. 8 is a cross-sectional view showing a capacitive element of a conventional voltage fluctuation detection circuit 900. In Fig. 8, reference numeral 930 denotes an electrode connected to a reference potential via a resistor R.

The voltage fluctuation detection circuit and semiconductor device of the present invention will be described below based on the embodiments shown in the drawings. Note that each drawing is a schematic diagram and does not necessarily strictly reflect the actual dimensions.

[Embodiment 1]
1. Configuration of the power conversion circuit 1 in embodiment 1 and the voltage fluctuation detection circuit 10 in embodiment 1 First, the power conversion circuit 1 provided with the voltage fluctuation detection circuit 10 in embodiment 1 will be described. Fig. 1 is a diagram for explaining the power conversion circuit 1 in embodiment 1. Note that the symbol R indicates a shunt resistor. As shown in Fig. 1, the power conversion circuit 1 is composed of a main circuit C1 and a switch control circuit C2 having the voltage fluctuation detection circuit 10 in embodiment 1.

The main circuit C1 includes a high-side switch Q1 connected to the DC input power supply Vin, and a low-side switch Q2 having one end connected to the high-side switch Q1 and the other end connected to a reference potential, and an output terminal OUT connected to a connection point N between the high-side switch Q1 and the low-side switch Q2. The main circuit C1 operates on a first power supply voltage supplied from the DC input power supply Vin. Appropriate switch elements can be used as the high-side switch Q1 and the low-side switch Q2 of the main circuit C1, and in the first embodiment, MOSFETs (Metal-Oxide-Semiconductor Field-Effect Transistors) are used.

The switch control circuit C2 controls the on/off of the high-side switch Q1 and the low-side switch Q2. The switch control circuit C2 has an oscillator circuit 2, a voltage fluctuation detection circuit 10 according to the first embodiment, a detection circuit 3, and an on/off control circuit 4. The switch control circuit C2 receives power from power supplies Vcc and Vb that are separate from the DC input power supply Vin, and operates at a second power supply voltage that is lower than the first power supply voltage.

The oscillator circuit 2 sets the switching frequency and sends a signal to the on/off control circuit 4 to turn off the switch at a predetermined timing based on the set switching frequency.

The voltage fluctuation detection circuit 10 according to the first embodiment is a voltage fluctuation detection circuit that detects the voltage fluctuation (voltage fluctuation per unit time, i.e., differential value) at the connection point N of the main circuit C1. The voltage fluctuation detection circuit (differential circuit) 10 detects the voltage fluctuation at the voltage detection point N and sends the detection result to the detection circuit 3. The voltage fluctuation detection circuit 10 will be described in detail later.

The detection circuit 3 detects the timing at which the voltage rise and fall at the voltage detection point (connection point N) detected by the voltage fluctuation detection circuit 10 stops, and sends a signal to the on/off control circuit 4.

The on-off control circuit 4 controls the on-off of the high-side switch Q1 and the low-side switch Q2 based on signals from the oscillation circuit 2 and the detection circuit 3. The on-off control circuit 4 has two RS-type flip-flop circuits RS-FF1 and RS-FF2 and a driver 5. The set terminal (S) of RS-FF1 is connected to the detection circuit 3, the reset terminal (R) is connected to the oscillation circuit 2, and the output terminal is connected to the input terminal HIN of the driver 5. The set terminal (S) of RS-FF2 is connected to the detection circuit 3, the reset terminal (R) is connected to the oscillation circuit 2, and the output terminal is connected to the input terminal LIN of the driver 5.

The driver 5 has a high-side switch control circuit 6 connected to the gate electrode of the high-side switch Q1 at a terminal HO and controlling the on/off of the high-side switch Q1 based on a signal input from an input terminal HIN, and a low-side switch control circuit 7 connected to the gate electrode of the low-side switch Q2 via an output terminal LO and controlling the on/off of the low-side switch Q2 based on a signal input from an input terminal LIN. The driver 5 has input terminals HIN and LIN, output terminals HO and LO, a switch input/output terminal VS, and power supply terminals Vcc and Vb.

However, when the voltage fluctuation detection circuit is composed only of a capacitance element, as in the conventional voltage fluctuation detection circuit 900 (see FIG. 7), it is difficult to form a reliable and thick insulating film on the semiconductor substrate, and therefore difficult to form a high-voltage capacitance element on the semiconductor substrate, and difficult to incorporate into the gate driver IC. Therefore, in the voltage fluctuation detection circuit 10 according to the first embodiment, a voltage fluctuation detection circuit is used in which a transistor Tr including a junction FET having a resurf structure and a capacitance element C are connected in series.

Transistor Tr is connected to a voltage detection point (connection point N, OUT terminal) and is a junction FET with a resurf structure (see Figure 2). Transistor Tr is a normally-on type semiconductor switch in which the drain electrode D is connected to the voltage detection point (connection point N) and the source electrode S is connected to a capacitance element C. The gate electrode is connected to a reference potential, and transistor Tr does not perform a switching operation.

One end of the capacitance element C is connected to the transistor Tr, and the other end is connected to a reference potential via a resistor R. The voltage fluctuation detection circuit 10 according to the first embodiment detects voltage fluctuations at a voltage detection point N that operates on a high first power supply voltage, but since a voltage drop occurs in the junction FET having a resurf structure of the transistor Tr, the voltage applied to the capacitance element C becomes relatively small (see FIG. 4). For this reason, the withstand voltage of the capacitance element C may be relatively low, and a capacitance element of about several tens of volts can be used.

Various configurations of voltage fluctuation detection circuits can be used as the voltage fluctuation detection circuit of the present invention, but in the first embodiment, in order to enable incorporation into the gate driver IC, the semiconductor device 100 according to the first embodiment in which the transistor Tr and the capacitance element C are formed on the same semiconductor substrate is used as the voltage fluctuation detection circuit 10.

2. Configuration of the semiconductor device 100 according to the first embodiment FIG. 2 is a cross-sectional view for explaining the semiconductor device 100 according to the first embodiment. In FIG. 2, the symbol SR indicates an isolation region. As shown in FIG. 2, the semiconductor device 100 according to the first embodiment includes a semiconductor substrate 110, a first electrode 120, a first field plate 122, a second electrode 130, an element isolation film 140, an insulating film 150, a third electrode 160, a second field plate 162, an external connection portion 164, and a conductive film 170. Although not shown, the semiconductor device 100 according to the first embodiment is formed on the same semiconductor substrate as at least a part of the element constituting the driver 5 of the on-off control circuit 4, for example, and is built into the gate driver IC. Hereinafter, the region constituting the JFET as the transistor Tr is referred to as a first region A1, and the region constituting the capacitance element C is referred to as a second region A2.

The semiconductor base 110 has a p ^- type substrate 111, an n ^- type first semiconductor layer 112 formed on the substrate 111, a p ^- type second semiconductor layer 113 disposed between the first semiconductor layer 112 and an element isolation film 140, and an n ⁺ type first contact region CR1 formed in a region in contact with the first electrode 120. The impurity concentration of the second semiconductor layer 113 is approximately the same as the impurity concentration of the substrate 111. The impurity concentration of the first contact region CR1 is higher than the impurity concentration of the first semiconductor layer 112.

The first electrode 120 is disposed at a predetermined position above the first region A1 in the semiconductor substrate 110, and is in contact with the semiconductor substrate 110 (contact region CR1). The first electrode 120 constitutes the drain electrode of the transistor Tr, and is connected to a voltage detection point (connection point N) disposed in a first circuit that operates with a first power supply voltage. The first electrode 120 is made of a metal (e.g., aluminum).

The first field plate 122 is formed so as to cover the insulating film 152 and the element isolation film 140 from the surface of the insulating film 152 to the surface of the element isolation film 140, and is connected to the first electrode 120. In the first embodiment, the first field plate 122 is made of polysilicon, but may be made of a metal (e.g., aluminum), a silicide (e.g., a metal silicide such as aluminum silicide (AlSi) or nickel silicide (NiSi)), or another suitable conductor.

The second electrode 130 is disposed above the semiconductor substrate 110 at a position separated from the first electrode 120 (at a predetermined position above the second region A2). The second electrode 130 is connected to the conductive film 170 on the semiconductor substrate 110, and is insulated from the semiconductor substrate 110 by an insulating film 150. The second electrode 130 is connected to a second circuit (detection circuit 3, etc.) that operates at a second power supply voltage that is lower than the first power supply voltage.

The element isolation film 140 is formed in a predetermined region (specifically, most of the first region A1) between the first electrode 120 and the second electrode 130 on one surface of the semiconductor substrate 110. The element isolation film 140 is a LOCOS film made of _SiO2 , and about half of its thickness is buried in the semiconductor substrate 110.

The insulating film 150 is disposed between the second electrode 130 and the element isolation film 140 on the surface of the semiconductor substrate 110. That is, the insulating film 150 is formed on the surface of the semiconductor substrate 110 in a part of the first region A1 and the entire second region A2. The insulating film 152 is disposed on the first electrode 120 side of the element isolation film 140 on the surface of the semiconductor substrate 110 when viewed in cross section. That is, the insulating film 152 is formed on the surface of the semiconductor substrate 110 in a part of the first region A1. The insulating films 150 and 152 are thermal oxide films.

The third electrode 160 is a film-like member disposed on the insulating film 150 at a position in contact with the element isolation film 140 (hereinafter, the third electrode 160 may be referred to as a third electrode film 160). Note that, although the third electrode 160 is a film-like member in the first embodiment, it does not have to be a film-like member.
The second field plate 162 is connected to the third electrode film 160, and is formed on the element isolation film 140 over the surface of the element isolation film 140. In the first embodiment, the third electrode film 160 and the second field plate 162 are made of polysilicon, but may be made of a metal (e.g., aluminum), a silicide (e.g., a metal silicide such as aluminum silicide (AlSi) or nickel silicide (NiSi)), or another appropriate conductor.
The external connection part 164 is disposed on the second field plate 162 and is connected to the second field plate 162. The external connection part 164 is connected to the outside at a reference potential. The external connection part 164 is made of a metal (e.g., aluminum).

The conductive film 170 is disposed on the insulating film 150 at a position separated from the third electrode film 160. The conductive film 170 is a polysilicon layer formed in a layer shape in a predetermined region of the second region A2, and is connected to the second electrode 130. The conductive film 170 faces the semiconductor substrate 110 via the insulating film 150.

In the first region A1, the transistor Tr (JFET) is composed of the substrate 111 of the semiconductor body 110, the first semiconductor layer 112 and the second semiconductor layer 113, the element isolation film 140, the first electrode 120, and the third electrode 160. In the second region A2, the capacitance element C is composed of the first semiconductor layer 112 of the semiconductor body 110, the insulating film 150, and the conductive film 170. In the transistor Tr, the substrate 111, the first semiconductor layer 112, and the second semiconductor layer 113 have a RESURF structure in which a depletion layer extends in the vertical direction from the pn junction surface between the substrate 111 and the first semiconductor layer 112, and a depletion layer extends in the vertical direction from the pn junction surface between the first semiconductor layer 112 and the second semiconductor layer 113.

Fig. 3 is a schematic graph shown to explain the RESURF structure of the semiconductor device 100 in embodiment 1. In Fig. 3, the horizontal axis represents the voltage applied to the drain electrode (first electrode 120) of the transistor Tr, and the vertical axis represents the voltage applied to the source electrode of the transistor Tr (the voltage in the region of the semiconductor base 110 below the second electrode 130).
In the transistor Tr, the substrate 111, the first semiconductor layer 112, and the second semiconductor layer 113 form a RESURF structure, so that in the n-type first semiconductor layer 112, the equipotential lines extending horizontally on the side of the first electrode 120 connected to the high voltage circuit extend vertically at relatively equal intervals toward the third electrode side, as shown in FIG. 4 described later. Therefore, the potential decreases for each equipotential line in the first semiconductor layer 112, and the potential decreases from the first electrode 120 side toward the third electrode 160 side. As a result, the potential near the third electrode 160 and the second electrode 130, which are source electrodes, is smaller by one or more orders of magnitude than the potential of the first electrode 120 (drain electrode). For example, as shown in FIG. 3, when a voltage of 600 V is applied to the first electrode 120, the voltage at the position of the third electrode 160 decreases to 20 V. Note that the electric field strength tends to become uniform and the maximum electric field strength decreases, so that the semiconductor device has a high breakdown voltage in the first region A1.

3. Test Example This test example is to verify that the voltage on the source electrode side (third electrode and conductive film side) of the transistor Tr can be kept low even when a large power flows into the first electrode by providing a transistor including a junction FET having a RESURF structure. Fig. 4 is a diagram showing a schematic diagram of equipotential lines represented based on a simulation result for the semiconductor device 100a according to the embodiment.

(1) Example The semiconductor device 100a according to the example is a semiconductor device having a similar configuration to the semiconductor device 100 according to the first embodiment, except for: (A) the second electrode 130a and the conductive film 170a are on the element isolation film 140, and are opposed to the semiconductor body 110 with the element isolation film 140 in between to form a capacitive element (the third electrode also serves as the second electrode); (B) a plurality of field plates FP are formed between the first electrode 120 and the second electrode 130a on the element isolation film 140 when viewed in cross section; (C) the second semiconductor layer 113a is formed only in a part of the region below the element isolation film 140 that contacts the element isolation film 140; and (D) a dummy electrode Dummy is formed on the side of the second electrode 130a opposite to the first electrode 120 side.

(2) Simulation Method A voltage of approximately 600 V was applied to the first electrode 120 of the semiconductor device 100a according to the embodiment, and the substrate 111 and the second electrode 130a were set to 0 V. The potential within the semiconductor body 110 was calculated by simulation, and based on the calculation results, the potential was plotted on a cross-sectional view of the semiconductor device 100a according to the embodiment, and equipotential lines were drawn (see FIG. 4).

(3) Evaluation Results In the n-type first semiconductor layer 112 between the p ^- type substrate 111 and the p ^{- type} second semiconductor layer 113, equipotential lines extending horizontally on the side of the first electrode 120 connected to a high voltage circuit extend vertically at relatively equal intervals toward the third electrode side. Therefore, the potential decreases for each equipotential line in the first semiconductor layer 112, and the potential decreases from the first electrode 120 side toward the third electrode 160 side. It was found that the potential in the semiconductor base 110 below the third electrode 160 had decreased to 100V or less (about 20V). Therefore, it was found that by providing a transistor including a junction FET having a resurf structure, even when a large power flows into the first electrode, the voltage on the source electrode side (the third electrode and the first conductive film side) of the transistor can be suppressed low (for example, one order of magnitude lower) by the junction FET. From this, it was found that a capacitance element with a relatively low breakdown voltage (for example, 100V or less) can be used in the present invention.

4. Effects of the voltage fluctuation detection circuit 10 and the semiconductor device 100 according to the first embodiment The voltage fluctuation detection circuit 10 and the semiconductor device 100 according to the first embodiment include a transistor Tr including a junction FET having a resurf structure, so that even when a large power flows from the DC input power supply Vin connected via the high-side switch Q1, the resurf structure can maintain a high withstand voltage while the junction FET can suppress the voltage on the source electrode side (third electrode side) of the transistor Tr low, thereby suppressing the voltage applied to the capacitance element C low. Therefore, since there is no need to form a high-voltage withstand capacitance element, the capacitance element C can be formed on the semiconductor substrate in the manufacturing process of the gate driver IC, and as a result, it becomes possible to incorporate the voltage fluctuation detection circuit in the gate driver IC.

In addition, according to the semiconductor device 100 of the first embodiment, the first electrode 120 is connected to a voltage detection point (connection point N) arranged in the main circuit C1 (first circuit) that operates on a first power supply voltage, and the second electrode 130 is connected to a switch control circuit C2 (second circuit) that operates on a second power supply voltage that is lower than the first power supply voltage, resulting in a semiconductor device in which the high-voltage main circuit C1 and the low-voltage switch control circuit C2 are arranged on the same semiconductor substrate. In addition, the voltage fluctuation at the voltage detection point N of the high-voltage main circuit C1 can be detected by a voltage fluctuation detection circuit configured in the low-voltage switch control circuit C2.

In addition, according to the semiconductor device 100 of the first embodiment, the substrate 111 of the semiconductor base 110, the first semiconductor layer 112 and the second semiconductor layer 113, the element isolation film 140, the first electrode 120, and the third electrode 160 constitute a transistor Tr including a junction FET having a resurf structure, so that even when a large power flows from the DC input power supply Vin connected via the high-side switch Q1, the resurf structure constituted by the substrate 111 and the first semiconductor layer 112 can maintain a high breakdown voltage. In addition, since a voltage drop occurs due to the JFET having the resurf structure, the potential of the source electrode side (third electrode side) of the transistor Tr can be kept low. Therefore, the voltage applied to the capacitance element C can be kept low, and it is not necessary to form a capacitance element with a high breakdown voltage. As a result, since the capacitance element C can be formed on the semiconductor base during the manufacturing process of the gate driver IC, it is possible to incorporate a voltage fluctuation detection circuit into the gate driver IC.

In addition, according to the semiconductor device 100 of the first embodiment, the transistor Tr including a junction FET having a resurf structure is configured by the substrate 111 of the semiconductor base 110, the first semiconductor layer 112 and the second semiconductor layer 113, the element isolation film 140, the first electrode 120, and the third electrode 160, so that in the resurf structure, a voltage drop occurs and the potential on the source electrode side (third electrode side) of the transistor Tr can be kept low by the junction FET. Therefore, a part of the relatively high-voltage main circuit C1 and the relatively low-voltage switch control circuit C2 can be connected on the same semiconductor base.

In addition, according to the semiconductor device 100 of the first embodiment, the third electrode 160 is connected to a reference potential, so that the input impedance is small and a large current can be passed through the semiconductor device 100, which is a junction FET. In addition, since the third electrode 160 is connected to a reference potential, it is not necessary to control the semiconductor device 100, and the semiconductor device 100 can be used as a passive element. Therefore, a driver circuit or the like for switching is not required, resulting in a miniaturized semiconductor device.

In addition, according to the semiconductor device 100 of the first embodiment, the second electrode 130 is connected to the conductive film 170 and is separated from the semiconductor substrate 110 by the insulating film 150, so that a capacitive element C can be formed on the semiconductor substrate 110 with the insulating film 150 as a dielectric between the electrodes. Therefore, since the capacitive element C can be formed on the semiconductor substrate 110, it becomes possible to incorporate a voltage fluctuation detection circuit into the gate driver IC.

[Embodiment 2]
FIG. 5 is a cross-sectional view shown for explaining a semiconductor device 101 according to the second embodiment.
The semiconductor device 101 according to the second embodiment basically has the same configuration as the semiconductor device 100 according to the first embodiment, but the configuration of the capacitance element C is different from that of the semiconductor device 100 according to the first embodiment.

As shown in FIG. 5, the semiconductor substrate 110 has a separation region 114 that divides the first semiconductor layer into a first region 112a on the third electrode film 160 side and a second region 112b on the conductive film 170a side. That is, the first region A1 and the second region A2 are separated by the separation region 114.

The semiconductor device 101 according to the second embodiment includes a fourth electrode 180 disposed between the third electrode film 160 and the conductive film 170b. The fourth electrode 180 is connected to the first region 112a of the first semiconductor layer via an n ⁺ type third contact region CR3 formed on the surface of the semiconductor substrate 110 on one side, and is connected to the conductive film 170b on the other side. The fourth electrode 180 is insulated from the second region 112b. The second electrode 130b is connected to the second region 112b via an n ⁺ type second contact region CR2, and is separated from the conductive film 170b via the insulating film 150. Therefore, the conductive film 170b, the insulating film 150, and the semiconductor substrate (second region 112b) constitute a capacitance element C, but unlike the first embodiment, the conductive film 170b side has a high potential.

Thus, the semiconductor device 101 according to the second embodiment has a different configuration of the capacitance element C from that of the semiconductor device 100 according to the first embodiment. However, as in the semiconductor device 100 according to the first embodiment, the semiconductor device 101 includes a transistor Tr including a junction FET having a resurf structure. Therefore, even when a large amount of power flows from a DC input power supply connected via a high-side switch, the resurf structure can maintain a high breakdown voltage, while the junction FET can suppress the potential on the source electrode side of the transistor Tr low, and the voltage applied to the capacitance element C can be suppressed low. Therefore, it is not necessary to form a high-voltage capacitance element on the semiconductor substrate. As a result, since the capacitance element C can be formed on the semiconductor substrate 110 during the manufacturing process of the gate driver IC, it is possible to incorporate a voltage fluctuation detection circuit into the gate driver IC.

In addition, according to the semiconductor device 101 of the second embodiment, the semiconductor substrate 110 has a separation region 114 that is provided to divide the first semiconductor layer into a first region 112a on the third electrode film 160 side and a second region 112b on the conductive film 170b side, so that the region in which the transistor Tr is formed and the region in which the capacitance element C is formed can be separated. Therefore, it is possible to reliably prevent the effect of a high voltage being applied to the transistor Tr from affecting the capacitance element C.

The semiconductor device 101 according to the second embodiment has the same configuration as the semiconductor device 100 according to the first embodiment except for the configuration of the capacitive element C, and therefore has the corresponding effects of the semiconductor device 100 according to the first embodiment.

[Embodiment 3]
FIG. 6 is a cross-sectional view shown for explaining a semiconductor device 102 according to the third embodiment.
The semiconductor device 102 of the third embodiment basically has the same configuration as the semiconductor device 101 of the second embodiment, but the configuration of the first region A1 of the semiconductor substrate is different from that of the semiconductor device 101 of the second embodiment.

The semiconductor substrate 110 has a p-type region 115 (first conductivity type region) formed on the surface of the first region 112a, an n-type region 116 (second conductivity type region) formed on a part of the surface of the p-type region 115 and separated from the first region 112a, and an n-type channel region 117 formed on the surface of the p-type region 115, connected at one end to the first region 112a of the first semiconductor layer, and connected at the other end to the n-type region 116. The fourth electrode 180 is in contact with the n-type region 116 via the third contact region CR3. That is, the transistor Tr of the semiconductor device 102 according to the third embodiment constitutes a depletion-type MOSFET.

The third electrode film 160 faces the channel region 117 via the insulating film 150, and by changing the voltage of the third electrode film 160, the voltage applied to the fourth electrode 180 and thus to the capacitance element C can be controlled.

Thus, the semiconductor device 102 according to the third embodiment has a different configuration of the first region A1 of the semiconductor substrate from that of the semiconductor device 101 according to the second embodiment. However, as in the semiconductor device 101 according to the second embodiment, the semiconductor device 102 includes a transistor Tr including a junction FET having a resurf structure. Therefore, even when a large amount of power flows from a DC input power source connected via a high-side switch, the resurf structure can maintain a high breakdown voltage, while the junction FET can suppress the voltage on the source electrode side of the transistor Tr to be low, and the voltage applied to the capacitance element C can be suppressed to be low. Therefore, it is not necessary to form a capacitance element with a high breakdown voltage. As a result, since the capacitance element C can be formed on the semiconductor substrate during the manufacturing process of the gate driver IC, it is possible to incorporate a voltage fluctuation detection circuit into the gate driver IC.

The semiconductor device 102 according to the third embodiment has a p-type region 115 formed on the surface of the first region 112a, an n-type region 116 formed on a part of the surface of the p-type region 115 separated from the first region 112a, and an n-type channel region 117 formed on the surface of the p-type region 115, connected to the first region 112a at one end and connected to the n-type region 116 at the other end, forming a depression-type MOSFET. With this configuration, the charging voltage of the capacitance element C can be adjusted by changing the voltage applied to the third electrode 160. As a result, the semiconductor device can be finely controlled with respect to the voltage applied to the capacitance element.

The semiconductor device 102 according to the third embodiment has a configuration similar to that of the semiconductor device 101 according to the second embodiment except for the configuration of the first region A1 of the semiconductor substrate, and therefore has the corresponding effects among the effects of the semiconductor device 101 according to the second embodiment.

The present invention has been described above based on the above embodiment, but the present invention is not limited to the above embodiment. It can be implemented in various forms without departing from the spirit of the invention, and for example, the following modifications are also possible.

(1) The number, material, shape, position, size, etc. of the components described in the above embodiment are examples and can be changed without impairing the effects of the present invention.

(2) In each of the above embodiments, the third electrode is connected to a reference potential and the semiconductor device 100 is not controlled, but the present invention is not limited to this. An appropriate voltage may be applied to the third electrode to control the potential within the semiconductor device 100.

(3) In each of the above embodiments, the second semiconductor layer 113 is disposed over the entire area between the first semiconductor layer 112 and the element isolation film 140, but the present invention is not limited to this. The second semiconductor layer 113 may be disposed only in a portion of the area between the first semiconductor layer 112 and the element isolation film 140, or the second semiconductor layer 113 may not be disposed at all.

(4) In each of the above embodiments, a shunt resistor is used to detect the displacement current of the capacitive element of the voltage fluctuation detection circuit as a voltage, but the present invention is not limited to this. Any suitable detector such as a Hall element or a current transformer may be used.

10: voltage fluctuation detection circuit, 100, 100a, 101, 102: semiconductor device, 110: semiconductor substrate, 111: substrate, 112: first semiconductor layer, 112a: first region, 112b: second region, 113, 113a: second semiconductor layer, 114: isolation region, 115: p-type region, 116: n-type region, 117: channel region, 120: first electrode, 130: second electrode, 130a: second electrode, 140: element isolation film, 150: insulating film, 160: third electrode (third electrode film), 170, 170a: conductive film, 180: fourth electrode

Claims (6)

a semiconductor body having a substrate of a first conductivity type and a first semiconductor layer of a second conductivity type formed on the substrate;
a first electrode disposed above the semiconductor body, in contact with the semiconductor body , and connected to the first semiconductor layer ;
a second electrode disposed above the semiconductor substrate at a position spaced apart from the first electrode;
an isolation film formed in a predetermined region between the first electrode and the second electrode on the surface of the semiconductor substrate;
an insulating film disposed between the second electrode and the element isolation film on the surface of the semiconductor substrate in a top view ;
a third electrode disposed on the insulating film at a position in contact with the element isolation film;
a conductive film disposed on the insulating film at a position spaced apart from the third electrode,
a RESURF structure is formed by the substrate and the first semiconductor layer of the semiconductor base,
a transistor including a junction FET having a RESURF structure is configured by the substrate of the semiconductor base, the first semiconductor layer, the element isolation film, the first electrode, and the third electrode,
a first semiconductor layer of the semiconductor substrate, the insulating film, and the conductive film forming a capacitance element;
the first electrode is connected to a voltage detection point disposed in a first circuit that operates with a first power supply voltage;
2. The semiconductor device according to claim 1 , wherein the second electrode is connected to a second circuit that operates on a second power supply voltage that is lower than the first power supply voltage. 3. The semiconductor device according to claim 1 , wherein the third electrode is connected to a reference potential. 4. The semiconductor device according to claim 1 , wherein the second electrode is connected to the conductive film and is separated from the semiconductor substrate with the insulating film interposed therebetween. the semiconductor substrate further includes a separation region provided so as to divide the first semiconductor layer into a first region on the third electrode side and a second region on the conductive film side;
the second electrode is in contact with the second region and is spaced apart from the conductive film;
4. The semiconductor device according to claim 1, further comprising a fourth electrode between the third electrode and the conductive film, the fourth electrode being insulated from the second region, in contact with the first region, and connected to the conductive film. the semiconductor substrate further includes a separation region provided to divide the first semiconductor layer into a first region on the third electrode side and a second region on the conductive film side, a first conductivity type region formed on a surface of the first region, a second conductivity type region formed on a part of the surface of the first conductivity type region so as to be spaced apart from the first region, and a second conductivity type channel region formed on the surface of the first conductivity type region, connected to the first region at one end and connected to the second conductivity type region at the other end;
the second electrode is in contact with the second region and is spaced apart from the conductive film;
4. The semiconductor device according to claim 1, further comprising a fourth electrode between the third electrode and the conductive film, the fourth electrode being insulated from the second region, in contact with the second conductivity type region, and connected to the conductive film.

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