JP7700526B2 - Glass wiring substrate and method for manufacturing the same - Google Patents

Description

The present invention relates to a glass wiring substrate and a method for manufacturing a glass wiring substrate.

In recent years, electronic devices have become more functional and smaller. This has led to a demand for higher density semiconductor modules mounted on electronic devices. In order to meet this demand, efforts are being made to increase the wiring density of wiring boards on which semiconductor chips are mounted.

Glass epoxy resin is generally used as the core material in wiring boards (Patent Document 1). In recent years, glass wiring boards that use a glass plate as the core material have been attracting attention.

Glass plates can achieve a higher degree of smoothness than core materials made of glass epoxy resin. This makes it possible to form ultra-fine wiring on glass wiring boards. Therefore, the use of glass wiring boards makes high-density mounting possible.

The coefficient of thermal expansion (CTE) of a glass plate in the temperature range of 20°C to 260°C is almost the same as the coefficient of thermal expansion of a semiconductor chip using a silicon substrate in the temperature range of 20°C to 260°C. Therefore, the use of a glass wiring substrate allows for mounting with little residual stress.

In addition, glass wiring substrates have a lower dielectric tangent (tan δ) than silicon interposers, making them excellent for high-speed transmission.

For these reasons, glass wiring substrates are attracting attention as one of the wiring substrates for semiconductor modules mounted in high-performance electronic devices.

JP 2000-252630 A

A glass wiring board is a board in which a conductor layer is formed on a glass plate. As a glass wiring board, a glass wiring board 1 in which a capacitor is formed on a glass plate 10 as shown in Figure 1 has been proposed.

The glass wiring substrate 1 shown in FIG. 1 includes a conductor layer M100 consisting of a titanium sputtered layer M101, a copper sputtered layer M102, and an electrolytic copper plating layer M103, a conductor layer M200 consisting of a titanium sputtered layer M201, a copper sputtered layer M202, and an electrolytic copper plating layer M203, a dielectric layer DE, a conductor layer M300 consisting of a titanium sputtered layer M301, a copper sputtered layer M302, and an electrolytic copper plating layer M303, and a resin layer IL. The conductor layer M100 functions as a wiring or pad. The conductor layer M200, the dielectric layer DE, and the conductor layer M300 form a capacitor, with the conductor layer M200 functioning as a lower electrode and the conductor layer M300 functioning as an upper electrode. The purpose of the titanium sputtering is to ensure adhesion between the layers, and the copper sputtering is to be used as a seed layer when forming the electrolytic copper plating layer.

Here, the total thickness t of the conductor layers M100, M200, DE, and M300 is approximately 30 μm. In this case, due to the difference in the linear expansion coefficient between the copper that is dominant in the conductor layers M100, M200, DE, and M300, and the glass plate 10 (copper: 17 ppm/K, glass: 3 ppm/K), cracks may occur in the glass at the end P1 where the conductor layers and the glass plate contact as shown in FIG. 1. The glass cracks at the end P1 because the stresses of the conductor layers M100, M200, DE, and M300 act on the glass plate.

The present invention aims to provide a technology that can suppress the occurrence of glass cracks at the ends of a conductor layer formed on a glass plate in a glass wiring substrate.

In order to solve the above problem, one representative glass wiring substrate of the present invention comprises a glass plate and a conductor layer formed on the glass plate. The conductor layer has a structure in which a first metal layer, a second metal layer, a third metal layer, and a fourth metal layer are laminated in order from the glass plate side, and in a cross-sectional view, the width of the fourth metal layer is narrower than the width of the first metal layer, the width of the second metal layer, and the width of the third metal layer.

The present invention makes it possible to suppress the occurrence of glass cracks at the ends of a conductor layer formed on a glass plate in a glass wiring substrate.

Problems, configurations, and advantages other than those described above will become clear from the description of the embodiment of the invention below.

FIG. 1 is a cross-sectional view showing a part of a glass wiring substrate that has already been proposed. FIG. 2 is a plan view that illustrates a schematic view of a portion of a glass wiring substrate according to an embodiment. FIG. 3 is a cross-sectional view taken along line F2-F2 of the glass wiring substrate shown in FIG. FIG. 4 is a cross-sectional view taken along line F2-F2 of the glass wiring substrate shown in FIG. FIG. 5 is an enlarged view of the conductor layers shown in FIGS. FIG. 6A is a cross-sectional view showing a method for manufacturing a glass wiring substrate according to an embodiment. FIG. 6B is a cross-sectional view showing a method for manufacturing a glass wiring substrate according to an embodiment. FIG. 6C is a cross-sectional view showing a method for manufacturing a glass wiring substrate according to an embodiment. FIG. 6D is a cross-sectional view showing a method for manufacturing a glass wiring substrate according to an embodiment. FIG. 6E is a cross-sectional view showing a method for manufacturing a glass wiring substrate according to an embodiment. FIG. 6F is a cross-sectional view showing a method for manufacturing a glass wiring substrate according to an embodiment. FIG. 7 is a cross-sectional view showing a part of a glass wiring substrate according to an embodiment of the present invention. FIG. 8 is a cross-sectional view showing a part of a glass wiring substrate according to a comparative example. FIG. 9 is a table showing the layer configurations of the examples and the comparative examples.

Hereinafter, an embodiment of the present invention will be described with reference to the drawings. Note that the present invention is not limited to this embodiment. In the following description, the same elements or parts having the same functions are denoted by the same reference numerals, and duplicated descriptions are omitted. In this disclosure, the "width of the metal layer" means the length from one end to the other end of the metal layer in a cross section perpendicular to the main surface of the glass plate. For example, the width of the first metal layer M11 of the conductor layer M10 functioning as a pad on which the capacitor shown in FIG. 3 is stacked is the length from one end a to the other end b, and the width of the first metal layer M11 of the conductor layer functioning as a pad formed around the through hole TH is the length from one end c to the other end d. The width of the metal layer constituting the conductor layer functioning as the wiring connecting the two pads shown in FIG. 2 is the length perpendicular to the longitudinal direction.

Figure 2 is a plan view that shows a schematic diagram of a portion of a glass wiring substrate according to one embodiment of the present invention. As shown in Figure 2, the glass wiring substrate 2 is composed of a glass plate 10 having a through hole TH, a conductor layer ML1, and a conductor layer ML2. Note that the conductor layer ML1 may form a desired circuit together with a conductor layer or an interlayer via that is not shown in Figure 2.

Figure 3 is a cross-sectional view taken along line F2-F2 of the glass wiring substrate 2 shown in Figure 2. Figure 3 is a cross-sectional view of the case where the present invention is applied to the conductor layer M10 of the conductor layer ML1, which functions as a pad on which a capacitor is laminated, and the portion of the conductor layer ML2, which functions as a pad formed around the through hole TH. The conductor layer to which the present invention is applied is composed of a first metal layer M11 (hereinafter, metal layer M11), a second metal layer M12 (hereinafter, metal layer M12), a third metal layer M13 (hereinafter, metal layer M13), and a fourth metal layer M14 (hereinafter, metal layer M14). The present invention is also applied to the portion of the conductor layer ML2 shown in Figure 2 that functions as a wiring connecting two pads.

Similar to the conductor layer M200, dielectric layer DE, and conductor layer M300 shown in FIG. 1, the conductor layer M20, dielectric layer DE, and conductor layer M30 shown in FIG. 3 form a capacitor, with the conductor layer M20 consisting of metal layers M21, M22, and M23, and the conductor layer M30 consisting of metal layers M31, M32, and M33. In the glass wiring board 2, the through holes TH are filled with a resin layer IL.

Also, as shown in FIG. 4, the through holes TH of the glass wiring substrate 2 may be filled with a metal layer M14. Note that the glass wiring substrate 2 may include a catalyst layer that is not shown in FIGS. 3 and 4.

The glass plate 10 typically has optical transparency. The components and the compounding ratio of the glass material constituting the glass plate 10 are not particularly limited. For example, glass containing silicate as a main component, such as alkali-free glass, alkali glass, borosilicate glass, quartz glass, sapphire glass, and photosensitive glass, can be used as the glass plate 10. From the viewpoint of use in semiconductor packages and semiconductor modules, it is desirable to use alkali-free glass as the glass plate 10. The content of alkali components contained in the alkali-free glass is preferably 0.1 mass % or less.

Considering the ease of forming the through holes TH and the ease of handling during manufacturing, the thickness of the glass plate 10 is preferably in the range of 0.1 mm to 0.8 mm, but if the formation of the through holes TH is not required, the thickness is not particularly limited.

Methods for manufacturing the glass plate 10 include, for example, the float method, the down-draw method, the fusion method, the up-draw method, and the roll-out method. The glass plate 10 may be manufactured by any method.

The linear expansion coefficient of the glass plate 10 is preferably in the range of 0.5×10 ⁻⁶ /K to 15.0×10 ⁻⁶ /K in the temperature range of 20° C. to 260° C., more preferably in the range of 1×10 ⁻⁶ /K to 8.0×10 ⁻⁶ /K, and even more preferably in the range of 1×10 ⁻⁶ /K to 4.0×10 ⁻⁶ /K. If the linear expansion coefficient of the glass plate 10 is within this range, the difference with the linear expansion coefficient of the semiconductor chip using a silicon substrate surface-mounted on the glass wiring substrate 2 tends to be small. The linear expansion coefficient means the rate at which the length changes in response to an increase in temperature.

At least one of the main surfaces of the glass plate 10 may have a functional layer. Examples of the functional layer include an antireflection layer containing fine particles, an infrared shielding layer containing an infrared absorbing agent, a strength-imparting layer containing a hard coat material, an antistatic layer containing an antistatic agent, a coloring layer containing a coloring agent, an optical filter layer containing an optical thin film, a texture control layer containing a light scattering film, and an antiglare layer. Such functional layers can be formed by surface treatment techniques such as deposition, sputtering, and wet methods.

The glass plate 10 may have a through hole TH. The shape of the cross section parallel to the length direction of the through hole may be rectangular, X-shaped, i.e., the diameter of the center is smaller than the top and bottom diameters of the through hole, tapered, i.e., the diameter of the bottom is smaller than the top diameter of the through hole, O-shaped, i.e., the diameter of the center is larger than the top and bottom diameters of the through hole, or other shapes. The shape of the cross section perpendicular to the length direction of the through hole may be circular, elliptical, or polygonal.

Figure 5 is an enlarged view of the conductor layer ML1 shown in Figures 3 and 4. As shown in Figure 5, by forming the conductor layer M10 in a stepped shape, the stresses of the conductor layers M20, M30, and the metal layer M14 act in a distributed manner on the glass plate 10 and the resin layer IL, making it possible to suppress glass cracks at the end P2 where the conductor layer and the glass plate contact each other.

To achieve this shape, the relationship of the etching rates of metal layers M11, M12, M13, and M14 in an acidic etching agent must be M14>M12>M13>>M11. Due to this difference in etching rate, when the metal layer M12 is etched away in the manufacturing process, the step shape shown in FIG. 5 according to this embodiment can be obtained. Specifically, this step shape is one in which the width L-M14 of metal layer M14 is narrower than the width L-M11 of metal layer M11, the width L-M12 of metal layer M12, and the width L-M13 of metal layer M13 (L-M14<L-M11, L-M12, L-M13).

Any metal may be selected for the metal layers M11, M12, M13, and M14 as long as the etching speed relationship in the acidic etching agent is M14>M12>M13>>M11. However, the metal layer M11 is preferably titanium, which ensures adhesion to glass and is difficult to dissolve in the acidic etching agent, and the metal layer M12 is preferably copper, taking into consideration the adhesion to the titanium metal layers M11 and M13. The metal layers M11 and M12 are preferably formed by sputtering, taking into consideration ease of manufacture and manufacturing costs. In addition, the metal layer M14, which has the thickest film thickness among the metal layers M11, M12, M13, and M14, is preferably copper formed by electrolytic plating, taking into consideration the wiring resistance, ease of manufacture, and manufacturing costs.

Metal layer M13 is preferably made of nickel, which has the slowest etching rate in an acidic etching agent compared to metal layers M14 and M12. Nickel may be formed in a vacuum or may be an electroless nickel plating film. However, if the glass plate 10 is provided with through holes TH, it is preferable to use an electroless nickel plating film for metal layer M13.

When electroless nickel is deposited, phosphorus derived from hypophosphorous acid compounds, which are reducing agents contained in the electroless nickel plating solution, is co-deposited in the film.

When the metal layer M13 is an electroless nickel plating film, the phosphorus concentration contained in the film is not particularly limited and can be selected, for example, within the range of 0.1 wt % to 12 wt %.

The thickness of the metal layer M13 made of electroless nickel plating is preferably 1 μm or less, more preferably 0.3 μm or less, and even more preferably 0.1 μm or less, because adhesion to the glass inside the through hole TH decreases if the thickness is greater than 1 μm. By making the thickness thinner, the time required for forming the electroless nickel plating can be shortened.

In addition to phosphorus, which is a co-deposit derived from the reducing agent, the electroless nickel plating film may also contain sulfur, lead, bismuth, and other substances contained in the electroless nickel plating solution. Alternatively, boron may be included in the electroless nickel plating film by using a chemical containing boron as the reducing agent.

When metal layer M13 is an electroless nickel plating film (phosphorus content 5 wt % or less), if it is immersed in an acidic etching agent in order to remove metal layer M12, a step shape will be formed because the etching rates are M14>M12>M13>>M11.

In addition, if the metal layer M13 is an electroless nickel plating film (with a phosphorus content higher than 5 wt%), when the metal layer M12 is immersed in an acidic etching agent in order to remove it, a step shape is formed because the etching rates are M14>M12>>M13, M11.

In other words, the step shape can be obtained regardless of the phosphorus content in the electroless nickel plating film, and the desired effect of suppressing glass cracks can be achieved.

When metal layer M13 is electroless nickel plating and metal layer M12 is copper, the interface between metal layer M13 and metal layer M12 contains palladium, a catalyst applied to the copper surface during electroless nickel plating. The amount of palladium applied to the copper is not limited.

As an acidic etching agent, a mixture of sulfuric acid and hydrogen peroxide, or sodium persulfate, etc. can be used.

The metal layers M21 and M22, and the metal layers M31 and M32 are formed by, for example, a sputtering method or a CVD method, and may be, for example, Cu, Al, Ti, Cr, Mo, W, Ta, Au, Ir, Ru, Pd, Pt, AlSi, AlSiCu, AlCu, NiFe, ITO, IZO, AZO, ZnO, PZT, TiN, Cu ₃ N ₄ , or a Cu alloy alone or in combination. In this embodiment, in consideration of electrical characteristics, ease of manufacture, and cost, it is preferable to use a titanium sputtered film for the metal layers M21 and M31, and a copper sputtered film for the metal layers M22 and M32. This titanium/copper sputtered film configuration ensures good adhesion between the glass and the conductor layer, between the conductor layer and the conductor layer, and between the dielectric layer and the conductor layer. In order to shorten the tact time of the sputtering process, it is desirable to keep the total thickness of the titanium and copper films to 1 μm or less.

Metal layer M23 and metal layer M33 are formed by electrolytic plating. Taking into consideration manufacturing costs, ease of manufacturing, and wiring resistance, it is preferable to form metal layer M23 and metal layer M33 from copper by electrolytic plating.

The dielectric layer DE is formed by a vacuum process such as sputtering or CVD, and can be selected from nitrides or oxides of aluminum, titanium, tantalum, chromium, lanthanum, samarium, ytterbium, yttrium, gadolinium, zirconium, niobium, hafnium, gallium, cerium, silicon, etc. It is preferable to use silicon nitride or aluminum oxide, which has a low dielectric constant and excellent insulating properties, for the dielectric layer DE.

The effect of the present invention can be obtained even when the relationship between the width L-M14 of metal layer M14, the width L-M11 of metal layer M11, the width L-M12 of metal layer M12, and the width L-M13 of metal layer M13 is L-M14<L-M13<L-M12<L-M11, or when L-M14<L-M13, L-M12<L-M11.

Next, a method for manufacturing a conductor layer M10 on a glass plate 10 having through holes TH will be described with reference to Figures 6A to 6F.

As shown in FIG. 6A, metal layers M11 and M12 are formed by sputtering on both sides of glass plate 10. Specifically, a titanium sputtered film is formed as metal layer M11, and a copper sputtered film is formed as metal layer M12. In addition, a catalyst layer CA is formed on metal layer M12 and within the TH of glass plate 10.

Next, as shown in FIG. 6B, a resist layer RE is formed on the catalyst layer CA, and an opening REO is formed in the resist layer RE. If the catalyst layer CA is not formed before the formation of the resist layer RE, but is instead formed after the formation of the resist layer RE, the catalyst will also be adsorbed onto the resist layer RE. In this case, the electroless nickel plating film formed in the next process will also be deposited on the resist layer RE, making it impossible to obtain the desired structure, which is undesirable.

Next, as shown in FIG. 6C, a metal layer M13 is formed in the opening REO of the resist layer RE. The metal layer M13 is an electroless nickel plating film. The electroless nickel plating is formed by immersing in a solution containing hypophosphorous acid. At this time, phosphorus is co-deposited as an impurity in the electroless nickel plating film.

When the metal layer M13 is formed by electroless plating, the metal layer M13 can be selectively formed on the portion where the catalyst layer CA is exposed. However, if the glass plate 10 does not have through holes TH, the metal layer M13 is not limited to an electroless nickel plating film, nor is it limited to nickel. In other words, as long as the etching rate in an acidic solution is M14>M12>M13>>M11, the type of metal is not limited.

Next, as shown in FIG. 6D, metal layer M14 is formed on metal layer M13 by electrolytic plating. Specifically, an electrolytic copper plating film is formed as metal layer M14.

Next, as shown in FIG. 6E, the resist layer RE is peeled off, and the catalyst layer CA and the metal layer M12 are removed. The catalyst layer CA and the metal layer M12 are removed in an acidic solution. In a method in which the metal layer M13 is formed before the formation of the resist layer RE, and the metal layer M13 is not formed after the formation of the resist layer RE, if the metal layer M13 is an electroless nickel plating film with a high phosphorus content, it is necessary to immerse the metal layer M13 in a high-temperature, high-concentration alkaline solution to remove it, and there is a concern that the glass sheet 10 will become embrittled at this time. However, in the method of this embodiment, etching of the electroless nickel plating film itself is not necessary. In other words, since the catalyst layer CA and the metal layer M12 made of copper can be etched in an acidic solution, embrittlement of the glass sheet 10 can be suppressed.

The acidic solution may be, for example, an etching agent containing sulfuric acid or hydrogen peroxide, or a solution containing sodium persulfate. If the electroless nickel plating film of the metal layer M13 contains a high content of phosphorus, the metal layer M13 will not be etched. Therefore, when etching the catalyst layer CA and the metal layer M12, part of the metal layer M14 is etched, resulting in a stepped cross section of the conductor layer M10.

On the other hand, if the phosphorus content in the electroless nickel plating film of metal layer M13 is low, metal layers M13 and M14 are also etched when removing catalyst layer CA and metal layer M12, but due to the difference in etching speed, the width of metal layer M14 is narrower than the width of metal layer M12 and the width of metal layer M13. In other words, the cross section of conductor layer M10 has a stepped shape, just as when the phosphorus content is high.

Next, as shown in FIG. 6F, the metal layer M11 made of titanium is immersed in a weak alkaline solution and etched away to obtain the glass wiring substrate 2. At this time, in order to maintain the step shape, it is necessary that the metal layers M12, M13, and M14 are hardly etched by the alkaline etching agent. Note that the titanium etching agent is weakly alkaline, so it does not embrittle the glass.

As a weak alkaline etching agent, a mixture of hydrogen peroxide and phosphate can be used.

As described above, by using the method of this embodiment, the conductor layer can be formed into a stepped shape, which makes it possible to suppress the occurrence of glass cracks at the contact points between the conductor layer and the glass plate due to differences in the linear expansion coefficient.

Next, the effects of using the above-described configuration of the glass wiring substrate 2 and its manufacturing method will be described with reference to FIG. 7 showing an embodiment and FIG. 8 showing a comparative example.

<Examples 1 to 4>
Examples 1 to 4 will be described with reference to FIG. 7. FIG. 7 is a cross-sectional view showing a portion of a glass wiring substrate according to the example. The layer configuration is shown in FIG. 9. The layer configurations in Examples 1 to 4 differ only in the phosphorus content of the electroless nickel plating film (metal layer M13) and the thickness of the electrolytic copper plating film (metal layer M14). That is, the phosphorus content of the electroless nickel plating film (metal layer M13) is 1 wt % in Examples 1 and 2 and 7 wt % in Examples 3 and 4, and the thickness of the electrolytic copper plating film (metal layer M14) is 10 μm in Examples 1 and 3 and 15 μm in Examples 2 and 4.

The pattern size of the conductor layer M10 was 500 μm square, the pattern size of the conductor layer M20 and the dielectric layer DE was 300 μm square, and the pattern size of the conductor layer M30 was 250 μm square. A low-expansion type glass with a thickness of 0.5 mm was used for the glass plate 10. A mixture of sulfuric acid and hydrogen peroxide was used as the acidic etching agent, and a mixture of hydrogen peroxide and phosphate was used as the weak alkaline etching agent.

The width L-M14 of metal layer M14 is narrower than the width L-M11 of metal layer M11, the width L-M12 of metal layer M12, and the width L-M13 of metal layer M13, forming a stepped shape.

<Comparative Example 1>
Comparative Example 1 will be described with reference to Fig. 8. Fig. 8 is a cross-sectional view showing a portion of a glass wiring substrate according to the comparative example. The layer configuration is shown in Fig. 9. The layer configurations in Example 1, Example 3, and Comparative Example 1 differ only in the presence or absence of an electroless nickel plating film (metal layer M13). That is, Example 1 and Example 3 have an electroless nickel plating film (metal layer M13), while Comparative Example 1 does not have an electroless nickel plating film (metal layer M13).

The pattern size of the conductor layer M10 was 500 μm square, the pattern size of the conductor layer M20 and the dielectric layer DE was 300 μm square, and the pattern size of the conductor layer M30 was 250 μm square. A low-expansion type glass with a thickness of 0.5 mm was used for the glass plate 10. A mixture of sulfuric acid and hydrogen peroxide was used as the acidic etching agent, and a mixture of hydrogen peroxide and phosphate was used as the weak alkaline etching agent.

The width L-M14 of metal layer M14 is not narrower than the width L-M11 of metal layer M11, the width L-M12 of metal layer M12, and the width L-M13 of metal layer M13, and does not form a step shape.

<Confirmation of action and effect>
To confirm the effect of this embodiment, the glass wiring substrates produced in Examples 1 to 4 and Comparative Example 1 were evaluated as follows.

<Evaluation method and conditions>
The glass wiring substrates according to Examples 1 to 4 and Comparative Example 1 having the specifications shown in FIG. 9 were evaluated for glass crack resistance by a temperature cycle test (TCT).
Test conditions: -55°C/15 min ⇔ 125°C/15 min, 1000 cycles

<Evaluation Results>
In Examples 1 to 4 in which the conductor layer M10 had a stepped shape, no glass cracks occurred at the end P2 shown in Fig. 7, but in the conductor layer M10 of Comparative Example 1 in which there was no stepped shape, cracks occurred at the end P2 shown in Fig. 8. This confirmed the effect of making the conductor layer M10 stepped to relieve stress on the glass plate. Furthermore, in Examples 1 to 4, no cracks occurred in the glass, regardless of the phosphorus content of the electroless nickel plating film (metal layer M13) and the thickness of the electrolytic copper plating film (metal layer M14).

The above-mentioned embodiment is merely an example, and other specific details of the structure can of course be modified as appropriate.

In addition, although the embodiment has been described in which the present invention is applied to a conductor layer that functions as a pad on which a capacitor is stacked and a conductor layer that functions as a pad formed around a through hole, the present invention is generally applicable to glass wiring boards that include a glass plate and a conductor layer formed on the glass plate.

The present invention can be used for both main boards and wiring boards that function as interposers between the main board and IC chips.

CA Catalyst layer TH Through hole DE Dielectric layer IL Resin layer RE Resist layer REO Openings 1 and 2 in resist layer RE Glass wiring substrate 10 Glass plates M11, M12, M13, M14, M21, M22, M23, M31, M32, M33 Metal layers ML1 and ML2 Conductor layers M10, M20, M30 Conductor layers M100, M200, M300 Conductor layers M101, M201, M301 Titanium sputtered layers M102, M202, M302 Copper sputtered layers M103, M203, M303 Electrolytic copper plating layer L-M11 Width L-M12 of first metal layer M11 Width L-M12 of second metal layer M12 Width L-M13 of third metal layer M13 Width L-M14 of fourth metal layer M14

Claims (5)

A glass plate and
A conductor layer formed on the glass plate;
A glass wiring substrate comprising:
The conductor layer is
A first metal layer, a second metal layer, a third metal layer, and a fourth metal layer are laminated in this order from the glass plate side,
In a cross-sectional view, a width of the fourth metal layer laminated directly on the third metal layer is narrower than a width of the first metal layer, a width of the second metal layer, and a width of the third metal layer;
the etching rate of the fourth metal layer in an acidic solution is faster than the etching rate of the third metal layer in an acidic solution;
Glass wiring board. 2. The glass wiring substrate according to claim 1,
the first metal layer is a titanium sputtered film;
the second metal layer is a copper sputtered film;
the third metal layer is an electroless nickel plating film;
The fourth metal layer is an electrolytic copper plating film.
Glass wiring board. 3. The glass wiring substrate according to claim 1 ,
The glass plate has a through hole,
the third metal layer and the fourth metal layer are formed on a side wall of the through hole in this order from the glass plate side;
Glass wiring board. A glass plate and
a conductor layer formed on the glass plate, the conductor layer having a structure in which a first metal layer, a second metal layer, a third metal layer, and a fourth metal layer are laminated in this order from the glass plate side, the fourth metal layer having an etching rate in an acidic solution being faster than the etching rate of the third metal layer in the acidic solution ;
A method for manufacturing a glass wiring substrate comprising:
providing the first metal layer on the glass plate; and providing the second metal layer on the first metal layer.
providing a catalyst layer on the second metal layer;
providing a resist on the catalyst layer;
providing an opening in the resist;
providing the third metal layer in the opening in the resist;
providing the fourth metal layer on the third metal layer;
removing the resist;
removing the catalyst layer and the second metal layer;
removing the first metal layer;
The method for producing a glass wiring substrate comprising the steps of: The method for producing a glass wiring substrate according to claim 4 ,
The glass plate has a through hole,
The step of providing a catalyst layer on the second metal layer is a step of providing a catalyst layer on the second metal layer and on a side wall of the through hole.
A method for manufacturing a glass wiring substrate.

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