JP7702977B2 - Integrated Circuits - Google Patents

Description

The present invention relates to an integrated circuit, and more particularly to an integrated circuit for detecting pen signals transmitted by an active pen.

There is known a capacitance detection device that detects a passive pointer such as a finger or a passive pen. This type of capacitance detection device is composed of a sensor having a plurality of X electrodes and Y electrodes, and an integrated circuit that sends detection signals to the plurality of X electrodes and sequentially detects these detection signals at the plurality of Y electrodes. The integrated circuit performs processing to derive the position of the passive pointer based on the detection strength of the detection signal at each Y electrode.

Detection of the detection signal in the integrated circuit is performed using an A/D conversion circuit. Patent Document 1 discloses an example of using a delta-sigma modulation circuit as this type of A/D conversion circuit. By using a delta-sigma modulation circuit, it is possible to reduce quantization noise generated in the A/D conversion circuit, thereby improving the detection accuracy of the detection signal.

Also known is an active pen that transmits an AC signal by applying an AC voltage to the pen tip electrode. Patent Document 2 discloses an example of this type of active pen. Hereinafter, the AC signal transmitted by the active pen will be referred to as the "pen signal."

US Patent Application Publication No. 2007-0046299 International Publication No. 2015/111159

If the delta-sigma modulation circuit could also be used to detect the pen signal, it would be possible to improve the accuracy of pen signal detection. However, in the past, it was not practical to detect the pen signal using a delta-sigma modulation circuit. The reasons for this are explained in detail below.

First, as a premise, the delta-sigma modulation circuit is composed of a subtractor that subtracts a feedback signal from an input signal, an integrator that integrates the output signal of the subtractor, a comparator that quantizes the output signal of the integrator, and an amplifier that generates the feedback signal by amplifying a pulse signal represented by a series of output values ('+1' or '-1') of the comparator. In addition, the dynamic range of the pen signal input to the A/D conversion circuit is much larger than that of the detection signal of a passive pointer. This is because the level (amplitude) of the pen signal arriving at the sensor changes significantly as the distance between the pen tip electrode and the touch surface changes due to user operation.

According to the above-mentioned configuration of the delta-sigma modulation circuit, the level of the feedback signal is constant regardless of the level of the input signal, that is, the pen signal. Therefore, when the pen tip electrode approaches the touch surface and the level of the pen signal becomes larger than a certain level, the output signal of the subtractor stops oscillating. Then, the output value of the comparator also stops oscillating, so it becomes impossible to detect or demodulate the pen signal using the output value of the delta-sigma modulation circuit. To prevent this, it is necessary to make the level of the feedback signal follow the level of the input signal. The specific configuration that has been considered for this purpose in the past is to configure the quantization circuit of the output stage with a multi-bit configuration using a large number (for example, 129) of comparators.

However, a delta-sigma modulation circuit configured to include a large number of comparators is large in size and expensive. In addition, in an integrated circuit for detecting pen signals, an A/D conversion circuit is usually provided for each electrode in the sensor, which further increases the size and cost of the delta-sigma modulation circuit. As a result of these factors, it has traditionally been difficult to use a delta-sigma modulation circuit to detect pen signals due to size and cost considerations.

Therefore, one object of the present invention is to provide an integrated circuit that can use a delta-sigma modulation circuit to detect a pen signal.

The integrated circuit according to the present invention is an integrated circuit that detects a pen signal transmitted from an active pen, and includes a delta-sigma modulation unit including a subtractor that subtracts a feedback signal from the pen signal input from a sensor, an integrator that integrates the output signal of the subtractor, a quantizer that quantizes the output signal of the integrator, and a DAC that generates the feedback signal based on the output value of the quantizer, a processing unit that detects the level of the pen signal based on the output value of the delta-sigma modulation unit, and a gain control unit that controls the level of the feedback signal based on the level of the pen signal detected by the processing unit.

According to the present invention, the level of the feedback signal can be made to follow the level of the pen signal without using a multi-bit quantizer. Therefore, it becomes possible to use a delta-sigma modulation circuit to detect the pen signal.

1 is a diagram showing a configuration of a position detection system 1 according to an embodiment of the present invention. 2 is a diagram showing an example of a configuration of a receiving circuit arranged in a receiving unit 41. FIG. 13 is a diagram showing another example of the configuration of a receiving circuit arranged in the receiving unit 41. FIG. 4 is a diagram showing in more detail the configuration of the receiving circuit according to the example shown in FIG. 3. 11A and 11B are diagrams showing simulation results of a received signal Va and an output value Vo. FIG. 13 is a diagram showing a receiving circuit included in a receiving unit 41 according to a modified embodiment of the present invention.

Below, a preferred embodiment of the present invention is described in detail with reference to the attached drawings.

Figure 1 is a diagram showing the configuration of a position detection system 1 according to an embodiment of the present invention. As shown in the figure, the position detection system 1 is configured with an active pen 2 and an electronic device 3 which is a position detection device that detects the active pen 2. Examples of the electronic device 3 include a tablet computer and a device equipped with a digitizer.

The electronic device 3 has a touch surface 3a, a sensor 30 arranged directly below the touch surface 3a, a sensor controller 31 connected to the sensor 30, and a host processor 32 that controls each part of the electronic device 3 including these.

The sensor 30 is a device having a structure in which a plurality of sensor electrodes 30x, 30y are arranged within the touch surface 3a. The plurality of sensor electrodes 30x each extend in the y direction parallel to the touch surface 3a, and are arranged at equal intervals within the touch surface 3a in the x direction perpendicular to the y direction. The plurality of sensor electrodes 30y each extend in the x direction, and are arranged at equal intervals within the y direction.

Here, the electronic device 3 may have a display (not shown) arranged overlapping the sensor 30, in which case the multiple sensor electrodes 30x (or the multiple sensor electrodes 30y) can double as a common electrode of the display (an electrode for supplying a ground potential commonly to each pixel). When this double use is performed, the electronic device 3 constitutes a so-called "in-cell type" position detection device. On the other hand, when this double use is not performed, the electronic device 3 constitutes a so-called "on-cell type" or "out-cell type" position detection device. The present invention can be suitably applied to any of the electronic devices 3.

The sensor controller 31 is an integrated circuit having the function of deriving the positions of the active pen 2 and the passive pointer within the touch surface 3a, deriving the tilt of the active pen 2, and receiving data from the active pen 2. The sensor controller 31 is configured to sequentially supply the derived positions and tilt, as well as the received data, to the host processor 32.

The sensor controller 31 is configured to perform two-way communication with the active pen 2 via the capacitance CX generated between the active pen 2 and the sensor 30. As will be described in detail later, the derivation of the position and tilt of the active pen 2 and the reception of data from the active pen 2 are realized through this two-way communication. In the following description, the signal transmitted from the sensor controller 31 to the active pen 2 by the above-mentioned two-way communication is referred to as the uplink signal US, and the signal transmitted from the active pen 2 to the sensor controller 31 is referred to as the downlink signal DS (pen signal). As will be described in detail later, the active pen 2 has two electrodes for transmitting the downlink signal DS, and in the following, the downlink signal DS transmitted from one of these electrodes, the pen tip electrode 21, may be referred to as the downlink signal DSa, and the downlink signal DS transmitted from the other electrode, the ring electrode 22, may be referred to as the downlink signal DSb.

The sensor controller 31 is also configured to supply (transmit) a passive pointer detection signal to each of the multiple sensor electrodes 30x and sequentially receive them at the multiple sensor electrodes 30y. As will be described in detail later, the position of the passive pointer is derived through the passive pointer detection signal thus transmitted and received. The transmission and reception of the passive pointer detection signal and the transmission and reception of the above-mentioned uplink signal US and downlink signal DS are performed in a time-division manner.

The host processor 32 is the central processing unit of the electronic device 3 and is configured to be able to execute various programs including a drawing application. The drawing application is a program that causes the host processor 32 to execute a process of generating digital ink based on the position, tilt, and data supplied from the sensor controller 31, and a process of storing the generated digital ink in the memory of the electronic device 3 and displaying it on the display.

As shown in Fig. 1, the sensor controller 31 is configured to have a switching unit 40, a receiving unit 41, a transmitting unit 42, and a processing unit 43. The switching unit 40 is a functional unit that switches the connection destination of each of the multiple sensor electrodes 30x, 30y between the transmitting unit 42 and the receiving unit 41 in accordance with the control of the processing unit 43.

The receiving unit 41 is a functional unit that detects and demodulates the receiving signal Va supplied from each of the multiple sensor electrodes 30x, 30y connected via the switching unit 40, and is configured with a receiving circuit for each of the sensor electrodes 30x, 30y. The receiving signal Va may include one or more of the above-mentioned downlink signal DSa, downlink signal DSb, and passive pointer detection signal. The carrier signals of the downlink signal DSa, downlink signal DSb, and passive pointer detection signal have different frequencies, and each receiving circuit is configured to detect the downlink signal DSa, downlink signal DSb, and passive pointer detection signal by detecting each frequency.

The transmitter 42 is a functional unit that supplies an uplink signal US or a passive pointer detection signal to the sensor electrode 30x or the sensor electrode 30y connected via the switching unit 40 under the control of the processor 43. Normally, when transmitting an uplink signal US, multiple sensor electrodes 30x (or multiple sensor electrodes 30y) are simultaneously connected to the transmitter 42, and as a result, the same uplink signal US is simultaneously transmitted from each sensor electrode 30x (or each sensor electrode 30y). In addition, the passive pointer detection signal is composed of a bit string with different contents for each sensor electrode 30x, and is supplied in parallel to each sensor electrode 30x.

The processing unit 43 is a functional unit that derives the position and tilt of the active pen 2, receives data from the active pen 2, and derives the position of the passive pointer through the control of the switching unit 40, the receiving unit 41, and the transmitting unit 42. The processing performed by the processing unit 43 is described in detail below.

First, the processing related to the active pen 2 will be described. First, the processing unit 43 causes the transmission unit 42 to transmit an uplink signal US at a fixed cycle. The uplink signal US is a signal that notifies the active pen 2 of the timing of transmitting the downlink signal DS and the timing of receiving the next uplink signal US, and also serves to supply commands to the active pen 2. The active pen 2 generates a downlink signal DS in accordance with the command supplied by the uplink signal US, transmits it at the timing notified by the uplink signal US, and receives the next uplink signal US at the timing notified by the uplink signal US.

The downlink signal DSa is a signal including a first position signal, which is an unmodulated carrier signal, and a data signal, which is a carrier signal modulated by data. The modulation method used for generating the data signal is typically DQPSK (Differential Quadrature Phase-Shift Keying) modulation, but other modulation methods such as QAM (Quadrature Amplitude Modulation) may also be used. The downlink signal DSb is a signal including a second position signal, which is an unmodulated carrier signal. The processing unit 43 derives the position of the active pen 2 based on the distribution of the level (reception strength) of the first position signal in each of the sensor electrodes 30x, 30y. The processing unit 43 also acquires data transmitted by the active pen 2 by controlling the switching unit 40 and the receiving unit 41 to receive the data signal in one or more sensor electrodes 30x, 30y closest to the derived position. The processing unit 43 further derives the position of the ring electrode 22 based on the distribution of the receiving strength of the second position signal at each sensor electrode 30x, 30y, and derives the tilt of the active pen 2 based on the difference between the derived position of the ring electrode 22 and the position of the active pen 2 derived based on the first position signal.

Next, the processing related to the passive pointer will be described. The processing unit 43 is configured to repeat the control for each sensor electrode 30y, selecting one sensor electrode 30y and connecting it to the receiving unit 41, and controlling the transmitting unit 42 to supply each sensor electrode 30x with a bit sequence prepared in advance for each sensor electrode 30x, one bit at a time, in parallel. The transmitting unit 42, under the control of the processing unit 43, generates each bit by phase-modulating a predetermined carrier signal and supplies it to each sensor electrode 30x.

The receiver 41 is configured to acquire the level of the signal supplied from the selected sensor electrode 30y for each bit and supply it to the processor 43 each time. The level of the signal supplied to the processor 43 in this way reflects the change in capacitance formed at the intersection of the selected sensor electrode 30y and each sensor electrode 30x. The processor 43 then derives the position of the passive pointer based on the level of the signal supplied from the receiver 41.

Next, the active pen 2 is an active electrostatic stylus that communicates bidirectionally with the sensor controller 31, and as shown in Figure 1, is composed of a core body 20, a pen tip electrode 21, a ring electrode 22, a pressure sensor 23, a battery 24, an integrated circuit 25, and a stop filter 26.

The core body 20 is a member that constitutes the pen shaft of the active pen 2. The tip of the core body 20 constitutes the pen tip of the active pen 2, and the end abuts the pressure sensor 23. The pen tip electrode 21 and the ring electrode 22 are conductors provided at different positions, with the pen tip electrode 21 being located at the pen tip of the active pen 2, and the ring electrode 22 being located closer to the center of the active pen 2 than the pen tip electrode 21, so as to surround the core body 20.

The pressure sensor 23 is a sensor that detects the pressure applied to the tip of the core body 20. The pressure detected by the pressure sensor 23 is supplied to the integrated circuit 25 as a writing pressure value, and is placed in the data signal of the downlink signal DSa by the integrated circuit 25. The battery 24 serves to supply the power necessary for the integrated circuit 25 to operate.

The integrated circuit 25 is an integrated circuit that is composed of various circuits including a boost circuit, a transmission circuit, a reception circuit, and a processing circuit. The transmission circuit is connected to the pen tip electrode 21 and the ring electrode 22, and serves to transmit the downlink signal DS by applying a change to the pen tip electrode 21 or the ring electrode 22 using the boost circuit.

The receiving circuit is connected to the ring electrode 22, and serves to receive the uplink signal US by performing a detection operation of the uplink signal US using the ring electrode 22. The processing circuit generates a downlink signal DS based on the uplink signal US received by the receiving circuit, and performs processing to transmit the generated downlink signal DS to the transmitting circuit.

The stop filter 26 is a filter circuit inserted between the ring electrode 22 and the integrated circuit 25 to simultaneously detect the uplink signal US using the ring electrode 22 and transmit the downlink signal DSa from the pen tip electrode 21. Specifically, the stop filter 26 may be configured with a band-stop filter (notch filter) that blocks a specific frequency band including the frequency of the downlink signal DSa, or a high-pass filter that passes the pulse waves that constitute the uplink signal US while blocking the pulse waves that constitute the downlink signal DSa. By using the stop filter 26, when the active pen 2 fails to receive the uplink signal US and loses the timing of transmitting the downlink signal DS, it is possible to continue input by the active pen 2 while continuing to detect the uplink signal US and also transmit the downlink signal DSa.

Figure 2 is a diagram showing an example of the configuration of a receiving circuit arranged in the receiving unit 41. As shown in the figure, the receiving circuit in the receiving unit 41 is configured to have a delta sigma (ΔΣ) modulation unit 50, a processing unit 60, and a gain control unit 70. Of these, the delta sigma modulation unit 50 is configured to have a subtractor 51, an amplifier 52, an integrator 53, a quantizer 54, and a DAC (Digital Analog Converter) 55. Note that while Figure 2 shows an example of configuring the delta sigma modulation unit 50 with a single stage configuration having only one integrator 53, the delta sigma modulation unit 50 may be configured with a multi-stage configuration having multiple integrators 53, as exemplified in Figure 4 described later.

The subtractor 51 is a device that subtracts the feedback signal FB, which is the output signal of the DAC 55, from the received signal Va input from the corresponding sensor electrode 30x or sensor electrode 30y. The amplifier 52 serves to control the level of the output signal of the subtractor 51. The integrator 53 is a device that integrates the output signal of the subtractor 51 input via the amplifier 52.

The quantizer 54 is a device that quantizes the output signal of the integrator 53, and is composed of one comparator that outputs "1" or "-1" based on a threshold judgment of the output signal of the integrator 53. Therefore, the delta-sigma modulation unit 50 is configured to perform 1-bit delta-sigma modulation. The output value of the quantizer 54 is supplied to the processing unit 60 as the output value Vo of the delta-sigma modulation unit 50.

DAC 55 is a device that generates a feedback signal FB based on the output value of quantizer 54. Specifically, the feedback signal FB is generated by amplifying a pulse signal indicating a series of output values of quantizer 54 with a given amplification factor (gain). The specific value of the given amplification factor is set in DAC 55 by gain control unit 70.

The processing unit 60 is a functional unit that restores the received signal Va based on a series of output values Vo output from the delta-sigma modulation unit 50, and generates the in-phase component IOUT, quadrature component QOUT, level LEVEL (amplitude), and phase PHASE of the received signal Va by performing quadrature detection. If the received signal Va is a data signal, the processing unit 60 also performs a process of generating a symbol sequence SYMBOL by demodulating the received signal Va based on the generated phase PHASE (and level LEVEL, if necessary). The in-phase component IOUT, quadrature component QOUT, level LEVEL, phase PHASE, and symbol sequence SYMBOL generated by the processing unit 60 are supplied to the processing unit 43 shown in FIG. 1. The processing unit 43 derives the position and inclination of the active pen 2 and the position of the passive pointer based on the level LEVEL thus supplied, while acquiring the data transmitted by the active pen 2 based on the symbol sequence SYMBOL.

The gain control unit 70 is a functional unit that controls the level of the feedback signal FB based on the level of the received signal Va generated by the processing unit 60. The level will be described in detail later, but it is generated based on the signal before noise is removed and may differ from the above level LEVEL. The gain control unit 70 in the example of Figure 2 controls the level of the feedback signal FB by controlling the amplification factor of the pulse signal in the DAC 55 based on the level.

According to the above configuration, the level of the feedback signal FB can be made to follow the level of the received signal Va without using a multi-bit quantizer. Therefore, it becomes possible to use the delta-sigma modulation unit 50 to detect the downlink signal DS (pen signal) with a large dynamic range.

Figure 3 is a diagram showing another example of the configuration of a receiving circuit arranged in the receiving unit 41. This example differs from the example of Figure 2 in that a gain adjustment unit 56 is provided at the output stage of the quantizer 54, and a gain control unit 70 performs gain control of this gain adjustment unit 56. Even in this way, it is possible to make the level of the feedback signal FB follow the level of the received signal Va without using a quantizer with a multi-bit configuration, so that it is possible to obtain the same effect as the example shown in Figure 2.

Figure 4 is a diagram showing in more detail the configuration of the receiving circuit according to the example shown in Figure 3. However, Figure 4 shows an example in which the delta-sigma modulation section 50 has a two-stage configuration. The configuration and operation of the receiving circuit will be described in more detail below with reference to Figure 4.

As shown in FIG. 4, the delta-sigma modulation unit 50 is composed of subtractors 51a, 51b, amplifiers 52a, 52b, integrators 53a, 53b, a quantizer 54, and DACs 55a, 55b, which are composed of analog circuits, and a gain adjustment unit 56 composed of a digital circuit.

The subtractor 51a subtracts the feedback signal FBa, which is the output signal of the DAC 55a, from the received signal Va and supplies it to the amplifier 52a. The amplifier 52a controls the level of the output signal of the subtractor 51a and supplies it to the integrator 53a. The integrator 53a integrates the output signal of the subtractor 51a input via the amplifier 52a and supplies it to the subtractor 51b. The subtractor 51b subtracts the feedback signal FBb, which is the output signal of the DAC 55b, from the output signal of the integrator 53a and supplies it to the amplifier 52b. The amplifier 52b controls the level of the output signal of the subtractor 51b and supplies it to the integrator 53b. The integrator 53b integrates the output signal of the subtractor 51b input via the amplifier 52b and supplies it to the quantizer 54.

Quantizer 54 is a comparator having a non-inverting input terminal to which the output signal of integrator 53b is supplied and an inverting input terminal to which ground potential is supplied, and is configured to output "+1" when the potential of the non-inverting input terminal is greater than the potential of the inverting input terminal, and "-1" otherwise.

The gain adjustment unit 56 generates an output value Vo by multiplying the output value of the quantizer 54 by a given multiplication value (gain) and supplies it to the processing unit 60 and each of the DACs 55a and 55b. The specific value of the given multiplication value is set in the gain adjustment unit 56 by the gain control unit 70.

DACs 55a and 55b generate feedback signals FBa and Fb by amplifying a pulse signal indicating a series of output values Vo by a predetermined amplification factor. The specific value of the predetermined amplification factor may be the same or different between DACs 55a and 55b, and is preset for each.

The processing unit 60 is composed of a low-pass filter 61, orthogonal demodulation units 62a, 62b, a noise detector 63, a noise filter 64, an accumulator 65, a demodulator 66, and a calculator 67.

The low-pass filter 61 is a decimation filter that counts (adds) the output value Vo at regular intervals to obtain and output an average. The output signal of the low-pass filter 61 is a digital signal that restores the received signal Va.

The orthogonal demodulation unit 62a is a functional unit that performs orthogonal detection of the output signal of the low-pass filter 61 using a predetermined frequency Fa. The orthogonal demodulation unit 62b is a functional unit that performs orthogonal detection of the output signal of the low-pass filter 61 using a predetermined frequency Fb different from the frequency Fa. Although two orthogonal demodulation units 62a and 62b are illustrated in FIG. 4, the actual number of orthogonal demodulation units arranged in the processing unit 60 is determined by the number of frequencies used. In a typical example, three orthogonal demodulation units must be provided to perform detection at the frequencies of the carrier signals of the downlink signal DSa, the downlink signal DSb, and the passive pointer detection signal. If tilt detection of the active pen 2 is not required, the downlink signal DSb may not be used, and in that case, two orthogonal demodulation units may be provided to perform detection of the downlink signal DSa and the passive pointer detection signal. Also, the downlink signal DSa may be transmitted by frequency division multiplexing from each of the multiple active pens 2. In this case, it is necessary to provide an orthogonal demodulation unit for each frequency of the carrier signal of the downlink signal DSa. In the following, the explanation will be continued on the assumption that two orthogonal demodulation units 62a and 62b are used as shown in FIG.

Specifically, the quadrature detection performed by the quadrature demodulation units 62a and 62b is a process of calculating the convolution sum (inner product) of the output signal of the low-pass filter 61 with a sine wave and a cosine wave of a corresponding frequency. The quadrature demodulation units 62a and 62b are configured to output to the noise filter 64 an in-phase component IOUT, which is a convolution sum with a cosine wave, and a quadrature component QOUT, which is a convolution sum with a sine wave.

The noise detector 63 is a functional unit that detects impulse noise (e.g., liquid crystal noise generated from a display) contained in the output value Vo and supplies the detected impulse noise to the noise filter 64. The noise filter 64 performs a process of removing the impulse noise supplied from the noise filter 64 from the signals (in-phase component IOUT and quadrature component QOUT) supplied from the quadrature demodulation units 62a and 62b.

The accumulator 65 is a functional unit that calculates a matching degree vector based on the signal (in-phase component IOUT and quadrature component QOUT) after the impulse noise has been removed by the noise filter 64, and further calculates the moving average of the length and slope of the matching degree vector using a window of a predetermined time length, and sequentially outputs the obtained average value of the length as the level LEVEL (amplitude) and the average value of the slope as the phase PHASE to the processing unit 43 shown in Figure 1. The accumulator 65 is configured to output the signal itself (in-phase component IOUT and quadrature component QOUT) supplied from the noise filter 64 to the processing unit 43. In addition, in Figure 4, the in-phase component IOUT, quadrature component QOUT, level LEVEL, and phase PHASE corresponding to the quadrature demodulation unit 62a are each suffixed with "a", and the in-phase component IOUT, quadrature component QOUT, level LEVEL, and phase PHASE corresponding to the quadrature demodulation unit 62b are each suffixed with "b".

The demodulator 66 is a functional unit that acquires data transmitted by the active pen 2 by demodulating the output value Vo based on the data acquired by the accumulator 65. For example, if the data signal included in the downlink signal DSa is generated by DQPSK modulation, the demodulator 66 is configured to acquire the data transmitted by the active pen 2 based on the phase PHASE acquired by the accumulator 65. Also, for example, if the data signal included in the downlink signal DSa is generated by QAM, the demodulator 66 is configured to acquire the data transmitted by the active pen 2 based on the level LEVEL and phase PHASE acquired by the accumulator 65. The demodulator 66 generates a symbol sequence SYMBOL indicating the acquired data and outputs it to the processing unit 43. In FIG. 4, the symbol sequence SYMBOL corresponding to the orthogonal demodulation unit 62a has an "a" added to its end, and the symbol sequence SYMBOL corresponding to the orthogonal demodulation unit 62b has an "b" added to its end.

The calculator 67 is a functional unit that derives the level (amplitude) for each frequency of the received signal Va using the results of the quadrature detection by the quadrature demodulators 62a and 62b, and performs statistical processing of the derived level. The level may be derived by performing processing similar to that of the accumulator 65 based on the output signals (in-phase component IOUT and quadrature component QOUT) of the quadrature demodulators 62a and 62b. The statistical processing may be a smoothing process that smoothes the derived level, or a prediction process that predicts the future level based on the level derived up to that point. The calculator 67 is configured to supply the level for each frequency obtained by the statistical processing to the gain control unit 70. In FIG. 4, the level corresponding to the orthogonal demodulation unit 62a (frequency Fa) is suffixed with "_a", and the level corresponding to the orthogonal demodulation unit 62b (frequency Fb) is suffixed with "_b".

The gain control unit 70 is configured with an adder 71, a low-pass filter 72, and a control unit 73. The adder 71 is a level determination unit that determines the value of the level used to control the levels of the feedback signals FBa and Fb based on multiple levels supplied from the calculator 67. Specifically, the value of the level used to control the levels of the feedback signals FBa and Fb can be determined by performing a summation process that sums multiple levels, or a selection process that selects one of the multiple levels (e.g., the maximum one).

The low-pass filter 72 is a functional unit that generates a control amount LPinfo for the gain adjustment unit 56 based on the level determined by the adder 71. In a specific example, the low-pass filter 72 may be configured by a decimation filter that counts (adds) the level output from the adder 71 at regular intervals to obtain and output an arithmetic average. The control unit 73 controls the gain (multiplication value) of the gain adjustment unit 56 according to the control amount LPinfo generated by the low-pass filter 72.

Here, the level LEVEL obtained by the accumulator 65 is not used as the level supplied from the processing unit 60 to the gain control unit 70 because it is preferable to control the gain of the gain adjustment unit 56 based on the level of the signal including noise. As described above, by controlling the gain of the gain adjustment unit 56 using the level LEVEL obtained based on the signal before noise removal, it becomes possible to make the level of the feedback signal follow the level of the received signal Va (the received signal Va including noise) actually input to the delta-sigma modulation unit 50.

Figure 5 shows the simulation results of the received signal Va and the output value Vo. Figure 5(a) shows the simulation results of a comparative example in which control by the gain control unit 70 is not performed, and Figures 5(b) and (c) show the simulation results of an embodiment in which control by the gain control unit 70 is performed. In this simulation, the delta-sigma modulation unit 50 has a single stage configuration, and the received signal Va is a sine wave with a predetermined period. In addition, in Figures 5(a) and (b), the level (amplitude) of the received signal Va is increased every two periods, while in Figure 5(c), the level (amplitude) of the received signal Va is decreased every two periods. Furthermore, in each figure, the received signal Va, the output value Vo, and the output signal ΔV of the subtractor 51 are plotted.

5(a), if control by the gain control unit 70 is not performed, when the level of the received signal Va increases as the active pen 2 approaches the touch surface 3a, the output signal ΔV of the subtractor 51 stops oscillating, and as a result, the output value Vo also stops oscillating. This means that the received signal Va cannot be restored from the output value Vo, and the quadrature detection by the processing unit 60 stops functioning.

As shown in FIG. 5(b), if control is performed by the gain control unit 70, even if the level of the received signal Va increases as the active pen 2 approaches the touch surface 3a, the output signal ΔV of the subtractor 51 is maintained in a vibrating state, and as a result, the output value Vo is also maintained in a vibrating state. This makes it possible for the quadrature detection by the processing unit 60 to function normally. Note that since there is a certain time lag before the level of the received signal Va is detected by the processing unit 60, as shown in FIG. 5(b), after the level of the received signal Va increases, the output value Vo does not vibrate for a certain period of time, but the effect of this time lag on the demodulation by the demodulation unit 66 and the detection of the position and tilt by the processing unit 43 is minor.

As can be seen from FIG. 5(c), control by the gain control unit 70 can reduce the gain of the gain adjustment unit 56 when the level of the received signal Va decreases as the active pen 2 moves away from the touch surface 3a. Even in this case, the vibration state of the output signal ΔV and the output value Vo is maintained. From this result, it can be seen that control by the gain control unit 70 can maintain a state in which the processing unit 60 can normally perform quadrature detection, even if the level of the received signal Va fluctuates in various ways.

Although the above describes preferred embodiments of the present invention, the present invention is in no way limited to these embodiments, and it goes without saying that the present invention can be embodied in various forms without departing from the spirit of the present invention.

Figure 6 is a diagram showing a receiving circuit included in the receiving unit 41 according to a modified example of this embodiment. As can be understood by comparing this figure with Figure 4, this modified example differs from this embodiment in that the delta-sigma modulation unit 50 includes comparators 57a and 57b, gain adjustment units 58a and 58b, and an adder 59.

Comparators 57a and 57b are not quantizers, but comparators that detect when the absolute value of the level of the output signal of integrator 53b exceeds a predetermined value. In one example, comparator 57a outputs "1" when the level of the output signal of integrator 53b exceeds a predetermined value Vref (Vref>0) and outputs "0" otherwise, and comparator 57b is configured to output "1" when the level of the output signal of integrator 53b falls below a predetermined value -Vref and outputs "0" otherwise.

The gain adjustment units 58a and 58b are functional units that multiply the output values of the comparators 57a and 57b by a predetermined value. In one example, the predetermined value multiplied by the gain adjustment unit 58a is 64, and the predetermined value multiplied by the gain adjustment unit 58a is -64.

The adder 59 is a functional unit that controls the levels of the feedback signals FBa and Fb by adding the output values of the gain adjustment units 58a and 58b to the output value of the gain adjustment unit 56. The output values of the gain adjustment units 58a and 58b become non-zero only when the absolute value of the level of the output signal of the integrator 53b exceeds a predetermined value, so the adder 59 controls the levels of the feedback signals FBa and Fb when the comparators 57a and 57b detect that the absolute value of the level of the output signal of the integrator 53b exceeds a predetermined value.

According to this modification, when the level of the received signal Va exceeds the adjustment range of the gain control unit 70 and the absolute value of the output signal of the integrator 53b becomes too large as a result, the absolute value of the output signal of the integrator 53b can be reduced by controlling the levels of the feedback signals FBa and Fb. Therefore, even if the level of the received signal Va exceeds the adjustment range of the gain control unit 70, it becomes possible to use the delta-sigma modulation unit 50 to detect the downlink signal DS (pen signal).

In addition, while the above embodiment has been described with reference to a case in which the active pen 2 and the sensor controller 31 communicate bidirectionally, the present invention can also be suitably applied to a case in which the active pen 2 and the sensor controller 31 communicate one-way from the active pen 2 to the sensor controller 31.

In addition, in the above embodiment, an example is described in which a quantizer 54 consisting of one comparator is used, but the present invention is also applicable to cases in which a quantizer having a multi-bit configuration including multiple comparators is used.

1 Position detection system 2 Active pen 3 Electronic device 3a Touch surface 20 Core body 21 Pen tip electrode 22 Ring electrode 23 Pressure sensor 24 Battery 25 Integrated circuit 26 Stop filter 30 Sensor 30x, 30y Sensor electrode 31 Sensor controller 32 Host processor 40 Switching unit 41 Receiving unit 42 Transmitting unit 43 Processing unit 50 Delta sigma modulation unit 51, 51a, 51b Subtractor 52, 52a, 52b Amplifier 53, 53a, 53b Integrator 54 Quantizer 55, 55a, 55b DAC
56 Gain adjustment units 57a, 57b Comparators 58a, 58b Gain adjustment unit 59 Adder 60 Processing unit 61 Low-pass filters 62a, 62b Orthogonal demodulation unit 63 Noise detector 64 Noise filter 65 Accumulator 66 Demodulator 67 Arithmetic unit 70 Gain control unit 71 Adder 72 Low-pass filter 73 Control units DS, DSa, DSb Downlink signals FB, FBa, FBb Feedback signals Fa, Fb Frequency IOUT, IOUTa, IOUTb In-phase components LEVEL, LEVELa, LEVELb Levels Level, Level_a, Level_b Level LPinfo Control amount PHASE, PHASEa, PHASEb Phase QOUT Orthogonal component SYMBOL Symbol string US Uplink signal Va Received signal Vo output value

Claims (15)

An integrated circuit for detecting a pen signal transmitted from an active pen, comprising:
a subtractor for subtracting a feedback signal from the pen signal inputted from the sensor;
an integrator for integrating an output signal of the subtractor;
a quantizer for quantizing the output signal of the integrator; and
a delta-sigma modulation unit including a DAC that generates the feedback signal based on an output value of the quantizer;
a processing unit that detects a level of the pen signal based on an output value of the delta-sigma modulation unit;
a gain control unit that controls a level of the feedback signal based on a level of the pen signal detected by the processing unit;
a gain adjustment unit that generates an output value of the delta-sigma modulation unit by adjusting a gain of the output value of the quantizer ,
The DAC generates the feedback signal based on an output value of the delta-sigma modulation unit;
the gain control unit controls a gain of the gain adjustment unit based on the level of the pen signal detected by the processing unit, thereby controlling the level of the feedback signal and the output value of the delta-sigma modulation unit.
Integrated circuits. The delta-sigma modulation unit is configured to perform 1-bit delta-sigma modulation in which the quantizer is configured by one comparator.
10. The integrated circuit of claim 1. the delta-sigma modulation unit is configured with an analog circuit from the subtractor to the quantizer, and the gain adjustment unit is configured with a digital circuit;
10. The integrated circuit of claim 1 . the processing unit includes a low-pass filter that restores the pen signal based on an output value of the delta-sigma modulation unit, and a quadrature demodulation unit that performs quadrature detection of the pen signal restored by the low-pass filter,
The processing unit detects the level by using a result of the quadrature detection.
4. An integrated circuit according to any one of claims 1 to 3 . the processing unit detects the level by performing statistical processing on a level derived using a result of the quadrature detection.
5. The integrated circuit of claim 4 . The statistical processing is a smoothing processing for smoothing the derived level, or a prediction processing for predicting the future level based on the derived level.
6. The integrated circuit of claim 5 . An integrated circuit for detecting a pen signal transmitted from an active pen, comprising:
a subtractor for subtracting a feedback signal from the pen signal inputted from the sensor;
an integrator for integrating an output signal of the subtractor;
a quantizer for quantizing the output signal of the integrator; and
a delta-sigma modulation unit including a DAC that generates the feedback signal based on an output value of the quantizer;
a processing unit that detects a level of the pen signal based on an output value of the delta-sigma modulation unit;
a gain control unit that controls a level of the feedback signal based on a level of the pen signal detected by the processing unit,
The processing unit includes:
a low-pass filter that restores the pen signal based on an output value of the delta-sigma modulation unit, and a quadrature demodulation unit that performs quadrature detection of the pen signal restored by the low-pass filter;
a noise filter for removing noise from the output signal of the orthogonal demodulation unit ;
The processing unit detects the level using a result of the quadrature detection,
the processing unit detects the level based on the output signal of the orthogonal demodulation unit before noise is removed by the noise filter .
Integrated circuits. An integrated circuit for detecting a pen signal transmitted from an active pen, comprising:
a subtractor for subtracting a feedback signal from the pen signal inputted from the sensor;
an integrator for integrating an output signal of the subtractor;
a quantizer for quantizing the output signal of the integrator; and
a delta-sigma modulation unit including a DAC that generates the feedback signal based on an output value of the quantizer;
a processing unit that detects a level of the pen signal based on an output value of the delta-sigma modulation unit;
a gain control unit that controls a level of the feedback signal based on a level of the pen signal detected by the processing unit,
the processing unit includes a low-pass filter that restores the pen signal based on an output value of the delta-sigma modulation unit, and a plurality of quadrature demodulation units that perform quadrature detection of the pen signal restored by the low-pass filter at mutually different frequencies,
the processing unit detects the level for each of the orthogonal demodulation units by using a result of the orthogonal detection .
Integrated circuits. the gain control unit includes a level determination unit that determines a level of the pen signal used to control a level of the feedback signal based on the plurality of levels detected by the processing unit.
9. The integrated circuit of claim 8 . the level determination unit determines the level of the pen signal used to control the level of the feedback signal by a summation process of summing the multiple levels detected by the processing unit, or a selection process of selecting one of the multiple levels detected by the processing unit.
10. The integrated circuit of claim 9 . the plurality of orthogonal demodulation units include a first orthogonal demodulation unit that performs orthogonal detection at a frequency of a carrier signal of the pen signal, and a second orthogonal demodulation unit that performs orthogonal detection at a frequency of a carrier signal of a passive pointer detection signal used to detect a passive pointer;
11. An integrated circuit according to any one of claims 8 to 10 . the pen signal includes first and second pen signals transmitted using carrier signals of different frequencies;
the plurality of orthogonal demodulation units include a first orthogonal demodulation unit that performs orthogonal detection at a frequency of a carrier signal of the first pen signal, and a second orthogonal demodulation unit that performs orthogonal detection at a frequency of a carrier signal of the second pen signal;
11. An integrated circuit according to any one of claims 8 to 10 . the first and second pen signals are generated by different active pens;
13. The integrated circuit of claim 12 . the first and second pen signals are transmitted from different electrodes disposed in one active pen;
13. The integrated circuit of claim 12 . The delta-sigma modulation unit
a comparator for detecting when the absolute value of the level of the output signal of the integrator exceeds a predetermined value;
an adder that controls a level of the feedback signal when the comparator detects that the absolute value of the level of the output signal of the integrator exceeds a predetermined value.
15. An integrated circuit according to any preceding claim.

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