JP7708256B2 - Wiring Board - Google Patents

Description

This disclosure relates to a wiring board.

The mainstream method for mounting electronic components is to surface mount the electronic components on a wiring board (see, for example, Patent Document 1).

In recent years, with the miniaturization and high functionality of electronic devices, technological developments are underway for the wiring boards on which electronic components are mounted, to make them more multi-layered, denser, and faster. This has created a demand for narrower pitches, which reduce the distance (pitch) between connections on wiring boards. Connections are also called pads or terminals.

However, if the pitch of the connections is narrow, there is a problem that the solder on adjacent connections comes into contact, which is known as solder bridging.

JP 2008-159818 A

The present disclosure is an invention made in consideration of the above problems, and its main objective is to provide a wiring board that can suppress the occurrence of solder bridges.

To achieve the above object, the present disclosure provides a wiring board having a substrate having a first surface and a second surface opposed to the first surface, and one or more layers of wiring and one or more insulating layers arranged on the first surface side of the substrate, the one or more layers of wiring having at least an outermost wiring located farthest from the substrate, the one or more insulating layers having at least an outermost insulating layer arranged on the surface side opposite the substrate side of the outermost wiring and having an opening located on the outermost wiring, the wiring board further having a connection portion arranged in the opening of the outermost insulating layer and electrically connected to the outermost wiring, the outermost insulating layer having a convex portion on the surface opposite the surface on the outermost wiring side and on the periphery of the opening, the height of the convex portion of the outermost insulating layer from the first surface of the substrate is higher than the height of the connection portion from the first surface of the substrate, and the pitch of the connection portion is 50 μm or less.

According to the present disclosure, the outermost insulating layer has a convex portion on the surface opposite the surface on the outermost wiring side and on the periphery of the opening, and the height of the convex portion of the outermost insulating layer from the first surface of the substrate is greater than the height of the connection portion from the first surface of the substrate, making it possible to prevent the occurrence of solder bridges when mounting electronic components on the wiring board of the present disclosure. Therefore, even with a narrow pitch, short circuits can be prevented.

The present disclosure also relates to a wiring board having a substrate having a first surface and a second surface opposing the first surface, and one or more layers of wiring and one or more insulating layers arranged on the first surface side of the substrate, wherein the one or more layers of wiring have at least an outermost wiring located farthest from the substrate, the one or more insulating layers are arranged on a surface side opposite the substrate side of the outermost wiring, and have at least an outermost insulating layer having an opening located on the outermost wiring, and the wiring board has a connection portion arranged in the opening of the outermost insulating layer and electrically connected to the outermost wiring, and a connection portion between the outermost insulating layer and the connection portion. and a recess located on the surface of the outermost insulating layer that faces the opening and around the entire periphery of the opening of the outermost insulating layer, the height of the bottom of the recess from the first surface of the substrate is lower than the maximum height of the outermost insulating layer from the first surface of the substrate at the periphery of the opening of the outermost insulating layer and the maximum height of the connection from the first surface of the substrate, the maximum height of the connection from the first surface of the substrate is higher than the maximum height of the outermost insulating layer from the first surface of the substrate at the periphery of the opening of the outermost insulating layer, and the pitch of the connection is 50 μm or less.

According to the present disclosure, the wiring board has a recess located on the surface of the outermost insulating layer and the connection portion side and around the entire periphery of the opening of the outermost insulating layer, and the height of the bottom of the recess from the first surface of the substrate is lower than the maximum height of the connection portion from the first surface of the substrate at the periphery of the opening of the outermost insulating layer and the maximum height of the connection portion from the first surface of the substrate, so that it is possible to suppress the occurrence of solder bridges when mounting electronic components on the wiring board of the present disclosure. Therefore, even with a narrow pitch, short circuits can be suppressed. Furthermore, the maximum height of the connection portion from the first surface of the substrate is higher than the maximum height of the connection portion from the first surface of the substrate of the outermost insulating layer at the periphery of the opening of the outermost insulating layer, so that the electrical connectivity between the connection portion and the electronic component can be improved.

In the present disclosure, it is preferable that the outermost insulating layer contains a cured product of a photosensitive resin composition. This is because the outermost insulating layer having the convex portion on the periphery of the opening, or the concave portion on the periphery of the outermost insulating layer can be easily formed by photolithography.

This disclosure has the advantage of being able to prevent solder bridges from occurring.

1 is a schematic cross-sectional view illustrating a wiring board according to the present disclosure. 1 is a schematic cross-sectional view illustrating a wiring board according to the present disclosure. 1 is a schematic top view illustrating a wiring board according to the present disclosure. 1 is a schematic cross-sectional view illustrating a wiring board according to the present disclosure. 1 is a schematic top view illustrating a wiring board according to the present disclosure. 1 is a schematic cross-sectional view illustrating a wiring board according to the present disclosure.

Below, an embodiment of the present disclosure will be described with reference to the drawings. However, the present disclosure can be implemented in many different forms, and should not be interpreted as being limited to the description of the embodiment exemplified below. In addition, in order to make the explanation clearer, the drawings may show the width, thickness, shape, etc. of each part in a schematic manner compared to the actual form, but these are merely examples and do not limit the interpretation of the present disclosure. In this specification and each figure, elements similar to those described above with respect to the previous figures are given the same reference numerals, and detailed explanations may be omitted as appropriate.

In this specification, when describing a mode in which another component is placed on a certain component, the term "above" or "below" is used, unless otherwise specified, to include both cases in which another component is placed directly above or below a certain component so as to be in contact with the component, and cases in which another component is placed above or below a certain component with another component in between. Also, in this specification, when describing a mode in which another component is placed on the surface of a certain component, the term "on the surface side" or "on the surface" is used, unless otherwise specified, to include both cases in which another component is placed directly above or below a certain component so as to be in contact with the component, and cases in which another component is placed above or below a certain component with another component in between.

The wiring board of the present disclosure will be described in detail below. The wiring board of the present disclosure has two embodiments. Each embodiment will be described below.

I. First embodiment A first embodiment of the wiring board of the present disclosure is a wiring board having a substrate having a first surface and a second surface opposite to the first surface, and one or more layers of wiring and one or more insulating layers arranged on the first surface side of the substrate, wherein the one or more layers of wiring have at least an outermost wiring located farthest from the substrate, the one or more insulating layers are arranged on the surface side opposite to the substrate side of the outermost wiring, and have at least an outermost insulating layer having an opening located on the outermost wiring, the wiring board further has a connection portion arranged in the opening of the outermost insulating layer and electrically connected to the outermost wiring, the outermost insulating layer has a convex portion on the surface opposite to the surface on the outermost wiring side and on the periphery of the opening, the height of the convex portion of the outermost insulating layer from the first surface of the substrate is higher than the height of the connection portion from the first surface of the substrate, and the pitch of the connection portion is 50 μm or less.

The wiring board of this embodiment will be described with reference to the drawings.
1 is a schematic cross-sectional view showing an example of the wiring board of this embodiment. As shown in FIG. 1, the wiring board 1 of this embodiment has a base material 2 having a first surface 2a and a second surface 2b facing the first surface 2a, and one or more layers of wiring 3a, 3b and one or more insulating layers 4a, 4b arranged on the first surface 2a side of the base material 1. The one or more layers of wiring 3a, 3b have at least an outermost wiring 13 (3b) located farthest from the base material 2, and the one or more insulating layers 4a, 4b have at least an outermost insulating layer 14 (4b) arranged on the surface opposite to the surface of the outermost wiring 13 (3b) on the base material 2 side and having an opening 5b located on the outermost wiring 13 (3b), and the wiring board 1 further has a connection part 8 arranged in the opening 5b of the outermost insulating layer 14 (4b) and electrically connected to the outermost wiring 13 (3b). The outermost insulating layer 14 (4b) has a convex portion 15 on the surface opposite to the surface on the outermost wiring 13 (3b) side and on the periphery of the opening 5b, and as shown in Fig. 2, the height H1 of the convex portion 15 of the outermost insulating layer 14 (4b) from the first surface 2a of the base material 2 is higher than the height H2 of the connection portion 8 from the first surface 2a of the base material 2. Also, the pitch P of the connection portions 8 is within a predetermined range. Note that Fig. 2 is an enlarged view of Fig. 1.

The wiring board of this embodiment may have one or more layers of wiring and one or more insulating layers arranged on the first surface side of the substrate, and may have one layer of wiring and one insulating layer (not shown), or may have two layers of wiring 3a, 3b and two insulating layers 4a, 4b as shown in FIG. 1, or may have three or more layers of wiring and three or more insulating layers (not shown).

The insulating layer has an opening for arranging wiring or a connection part. When the wiring board of this embodiment has two or more insulating layers, each of the two or more insulating layers has an opening, but it is sufficient that the outermost insulating layer has the above-mentioned convex part, and the insulating layers other than the outermost insulating layer may or may not have the above-mentioned convex part. For example, in FIG. 1, the two insulating layers 4a, 4b have openings 5a, 5b, respectively, but the outermost insulating layer 14 (4b) has the above-mentioned convex part 15, while the insulating layers 4a other than the outermost insulating layer 14 (4b) do not have the above-mentioned convex part, but may have the above-mentioned convex part.

In this embodiment, as shown in FIG. 1, the connection portion 8 may have a first connection layer 6 arranged in the opening 5b of the outermost insulating layer 14 (4b) and a second connection layer 7 arranged on the first connection layer 6.

According to this embodiment, the outermost insulating layer has a convex portion on the surface opposite the surface on the outermost wiring side and on the periphery of the opening, and the height of the convex portion of the outermost insulating layer from the first surface of the substrate is higher than the height of the connection portion from the first surface of the substrate. Therefore, when mounting electronic components on the wiring board of this embodiment, the convex portion of the outermost insulating layer can block the solder and suppress the solder from spreading, thereby suppressing the occurrence of solder bridges. Therefore, even with a narrow pitch, electrical connection can be made without causing a short circuit.

Below, the wiring board of this embodiment will be explained in detail for each configuration.

1. Insulating Layer The insulating layer in this embodiment is a member that is disposed on the first surface side of the base material and has insulating properties. The wiring board in this embodiment has one or more insulating layers.

The insulating layer may be one or more layers, and may be one layer or two or more layers.

The one or more insulating layers are arranged on the side opposite the substrate side of the outermost wiring described below, and have at least an outermost insulating layer having an opening located above the outermost wiring.

The outermost insulating layer has a convex portion on the surface opposite the outermost wiring side and on the periphery of the opening.

When the wiring board of this embodiment has two or more insulating layers, it is sufficient that the outermost insulating layer has the above-mentioned convex portion, and insulating layers other than the outermost insulating layer may or may not have the above-mentioned convex portion.

The height of the convex portion of the outermost insulating layer from the first surface of the substrate is higher than the height of the connection portion from the first surface of the substrate. Specifically, the difference between the height of the convex portion of the outermost insulating layer from the first surface of the substrate and the height of the connection portion from the first surface of the substrate is preferably 0.1 μm or more, more preferably 0.1 μm or more and 0.5 μm or less, and particularly preferably 0.2 μm or more and 0.3 μm or less. By having the height difference within the above range, when mounting electronic components on the wiring board of this embodiment, the convex portion of the outermost insulating layer can suppress the spread of solder, and the occurrence of solder bridges can be suppressed.

Here, the "height of the convex portion of the outermost insulating layer from the first surface of the substrate" refers to the height from the first surface of the substrate to the top of the convex portion of the outermost insulating layer. For example, in Fig. 2, it refers to the height H1 from the first surface 2a of the substrate 2 to the top a of the convex portion 15 of the outermost insulating layer 14.
In addition, the "height of the connection part from the first surface of the substrate" refers to the height from the first surface of the substrate to the part where the surface of the connection part opposite to the surface on the outermost wiring side meets the side of the opening of the outermost insulating layer. For example, in Fig. 2, it refers to the height H2 from the first surface 2a of the substrate 2 to the part b where the surface of the connection part 8 opposite to the surface on the outermost wiring 13 side meets the side of the opening 5b of the outermost insulating layer 14 (4b).

In addition, in the outermost insulating layer, the height of the convex portion from the first surface of the substrate is higher than the height of the portion other than the convex portion from the first surface of the substrate. Specifically, in the outermost insulating layer, the difference between the height of the convex portion from the first surface of the substrate and the height of the portion other than the convex portion from the first surface of the substrate is preferably 0.2 μm or more, more preferably 0.3 μm or more and 5.0 μm or less, and particularly preferably 0.5 μm or more and 3.0 μm or less.

Here, "height from the first surface of the substrate to the portion other than the convex portion of the outermost insulating layer" refers to the height from the first surface of the substrate to the portion other than the convex portion on the surface opposite the outermost wiring side of the outermost insulating layer. For example, in FIG. 2, it refers to the height H3 from the first surface 2a of the substrate 2 to the portion other than the convex portion 15 on the surface opposite the surface of the outermost insulating layer 14 opposite the outermost wiring 13 side.

The height of the convex portion of the outermost insulating layer from the first surface of the substrate, the height of the connection portion from the first surface of the substrate, and the height of the portion other than the convex portion of the outermost insulating layer from the first surface of the substrate can be measured, for example, using a stylus film thickness measuring instrument (P-15, manufactured by KLA-Tencor) under conditions of a stylus pressure of 5 mg and a scanning speed of 50 μm/sec. The same method can be used to measure each height, as described below.

The cross-sectional shape of the convex portion is not particularly limited as long as the height of the convex portion of the outermost insulating layer from the first surface of the substrate is greater than the height of the connection portion from the first surface of the substrate.

The outermost insulating layer may have a convex portion on the periphery of the opening of the outermost insulating layer, but it is preferable that the outermost insulating layer has a convex portion 15 around the entire periphery of the opening 5 of the outermost insulating layer 14, as shown in FIG. 3, for example. By providing a convex portion around the entire periphery of the opening of the outermost insulating layer, the convex portion of the outermost insulating layer can effectively suppress the spread of solder when mounting electronic components on the wiring board of this embodiment, and the occurrence of solder bridges can be further suppressed.

The material for the insulating layer is not particularly limited as long as it is an insulating material, and insulating materials that are generally used for insulating layers of wiring boards can be used, and both organic and inorganic materials can be used.

The material of the outermost insulating layer is not particularly limited as long as it is an insulating material capable of forming the above-mentioned convex portion. In particular, the material of the outermost insulating layer is preferably a photosensitive resin. That is, the outermost insulating layer preferably contains a cured product of a photosensitive resin composition. This is because the outermost insulating layer having the above-mentioned convex portion can be easily formed by photolithography. Specifically, when forming the outermost insulating layer, the coating film of the photosensitive resin composition can be made to have a raised shape on the outermost wiring due to the thickness of the outermost wiring. Therefore, an outermost insulating layer having a convex portion on the periphery of the opening can be formed.

The thickness of the insulating layer can be the same as that of an insulating layer in a typical wiring board.

The insulating layer may be formed by a general method for forming an insulating layer, and may be appropriately selected depending on the material of the insulating layer. The opening may be formed by a general method for forming an opening in the insulating layer, and may be appropriately selected depending on the material of the insulating layer. Examples of the opening may include laser irradiation, etching such as plasma etching or wet etching, mechanical processing such as sandblasting or ultrasonic drilling, and photolithography. Among these, the outermost insulating layer is preferably formed by photolithography. This is because the outermost insulating layer having the above-mentioned convex portion can be easily formed by photolithography.

In addition, when the method for forming the outermost insulating layer is a photolithography method and a negative photosensitive resin composition is used, for example, the photosensitive resin composition can be applied and then immediately exposed to light, whereby the coating of the photosensitive resin composition can be cured while maintaining the raised shape, and an outermost insulating layer having a convex portion on the periphery of the opening can be easily formed.

In addition, when the method for forming the outermost insulating layer is a photolithography method and a photosensitive resin composition is used, for example, the photosensitive resin composition is applied to a substrate, and then vacuum drying is performed within a predetermined time, thereby increasing the drying speed, so that the coating film of the photosensitive resin composition tends to have a raised shape on the outermost wiring, and an outermost insulating layer having a convex portion on the periphery of the opening can be easily formed. After the application of the photosensitive resin composition is completed, the time until vacuum drying begins is preferably within 60 seconds, more preferably within 50 seconds, and even more preferably within 40 seconds.

To increase the drying speed of the photosensitive resin composition, for example, the boiling point of the main solvent contained in the photosensitive resin composition is preferably 170°C or less, and more preferably 150°C or less. Note that the main solvent refers to a solvent whose content is 50 parts by mass or more when the total amount of the solvents contained in the photosensitive resin composition is 100 parts by mass.

2. Wiring The wiring in this embodiment is disposed on the first surface side of the base material and is a conductive member.
The wiring board of this embodiment has one or more layers of wiring.

The wiring may be one or more layers, and may be one layer or two or more layers.

The wiring in one or more layers has at least an outermost wiring located furthest from the substrate.

The material for the wiring is not particularly limited as long as it is a material having electrical conductivity, and conductive materials used for general wiring can be used. Examples of conductive materials that can be used include metals such as copper, molybdenum, titanium, tungsten, tantalum, aluminum, gold, silver, nickel, and palladium, alloys containing at least one selected from these metals, and conductive oxides such as indium tin oxide (ITO) and indium zinc oxide (IZO). By using copper or aluminum, which have high electrical conductivity, it is possible to suppress an increase in resistance. In addition, by using copper, which has a relatively low hardness, it is possible to provide a wiring board that can establish electrical connections with higher reliability.

The wiring may be single-layered or multi-layered with multiple layers stacked on top of each other.

The thickness of the wiring can be the same as that of a typical wiring board. The thickness of the wiring can be, for example, 0.05 μm or more and 20 μm or less, or 0.1 μm or more and 15 μm or less, or 0.2 μm or more and 10 μm or less. This allows sufficient conductivity to be obtained.

The wiring can be formed using any common wiring formation method, such as CVD, sputtering, plating, etc.

3. Connection Portion The connection portion in this embodiment is a member that is disposed in the opening of the outermost insulating layer and is electrically connected to the outermost wiring.

The pitch of the connection parts is 50 μm or less, for example, 10 μm or more and 50 μm or less, and preferably 15 μm or more and 45 μm or less. In this embodiment, the pitch of the connection parts is in the above range, and even with a narrow pitch, electrical connection can be made without causing a short circuit.

Here, the pitch can be measured, for example, by observation using an optical microscope or a scanning electron microscope (SEM).

The material of the connection part is not particularly limited as long as it is a conductive material, and can be the same as the material of the wiring described above.

The connection part may be a single layer or a multi-layer structure in which multiple layers are stacked.

The thickness of the connection portion is not particularly limited and is set appropriately according to the shape of the terminal portion of the electronic component to be mounted on the wiring board of this embodiment.

As shown in FIG. 2, the maximum height H4 of the connection portion 8 from the first surface 2a of the substrate 2 may be greater than the height H3 of the portion of the outermost insulating layer 14 other than the protrusion 15 from the first surface 2a of the substrate 2. This makes it possible to increase the size of the terminal portion of the electronic component mounted on the wiring board of this embodiment, improving electrical connectivity and increasing productivity.

In the above case, the difference H10 between the maximum height H4 of the connection portion 8 from the first surface 2a of the substrate 2 and the height H3 of the portion other than the convex portion 15 of the outermost insulating layer 14 from the first surface 2a of the substrate 2 is preferably 3 μm or less. For example, in the CVD method, sputtering method, plating method, etc., film growth is usually isotropic. Therefore, for example, in FIG. 2, if the difference H10 between the maximum height H4 of the connection portion 8 from the first surface 2a of the substrate 2 and the height H3 of the portion other than the convex portion 15 of the outermost insulating layer 14 from the first surface 2a of the substrate 2 is large, the overlapping portion of the connection portion 8 and the outermost insulating layer 14 will also be large on the surface of the outermost insulating layer 14 opposite the surface on the outermost wiring 13 side. If the overlapping portion of the connection portion 8 and the outermost insulating layer 14 becomes large on the surface of the outermost insulating layer 14 opposite the surface on the outermost wiring 13 side, the convex portion 15 of the outermost insulating layer 14 is likely to be covered by the connection portion 8, and it may become difficult to prevent the occurrence of solder bridges by the convex portion of the outermost insulating layer. Therefore, it is preferable that the difference H10 between the maximum height H4 of the connection portion 8 from the first surface 2a of the substrate 2 and the height H3 of the portion other than the convex portion 15 of the outermost insulating layer 14 from the first surface 2a of the substrate 2 is 3 μm or less.

Here, "the maximum height of the connection part from the first surface of the substrate" refers to the maximum height from the first surface of the substrate to the surface opposite the surface on the outermost wiring side of the connection part. For example, in FIG. 2, it refers to the maximum height H4 from the first surface 2a of the substrate 2 to the surface opposite the surface on the outermost wiring side of the connection part 8.

The method for forming the connection portion can be the same as the method for forming the wiring described above.

4. Substrate The substrate in this embodiment has a first surface and a second surface opposite to the first surface, and is a member that supports the insulating layer, wiring, and connection portion.

The substrate is not particularly limited as long as it has insulating properties, and insulating substrates generally used for wiring boards can be used. Examples include glass substrates, glass epoxy substrates, glass composite substrates, ceramic substrates such as alumina substrates, fluororesin substrates, polyimide substrates, and paper phenol substrates.

As described below, when the wiring board of this embodiment has a second wiring that electrically connects the first surface and the second surface of the substrate, the substrate may or may not have a through hole. When the substrate has a through hole, the second wiring becomes a through wiring arranged in the through hole.

The diameter of the through hole can be appropriately selected depending on the application of the wiring board and is not particularly limited, but may be, for example, 10 μm or more and 200 μm or less, or 20 μm or more and 100 μm or less.

Methods for forming through holes include, for example, etching such as plasma etching or wet etching, laser irradiation, or mechanical processing such as sandblasting or ultrasonic drilling.

The thickness of the substrate is not particularly limited as long as it can support the insulating layer, wiring, and connection parts, and can be appropriately selected depending on the application of the wiring board. The thickness of the substrate can be, for example, 10 μm or more and 800 μm or less, or 100 μm or more and 600 μm or less, or 300 μm or more and 500 μm or less.

II. Second embodiment A second embodiment of the wiring board of the present disclosure is a wiring board having a base material having a first surface and a second surface opposite to the first surface, and one or more layers of wiring and one or more insulating layers arranged on the first surface side of the base material, wherein the one or more layers of wiring have at least an outermost wiring located farthest from the base material, the one or more insulating layers are arranged on a surface side opposite to the surface of the outermost wiring on the base material side, and have at least an outermost insulating layer having an opening located on the outermost wiring, and the wiring board has a connection portion arranged in the opening of the outermost insulating layer and electrically connected to the outermost wiring, and a connection portion of the outermost insulating layer and and a recess located on a surface on the connection portion side and around the entire periphery of the opening of the outermost insulating layer, wherein the height of the bottom of the recess from the first surface of the substrate is lower than the maximum height of the connection portion from the first surface of the substrate at the periphery of the opening of the outermost insulating layer and the maximum height of the connection portion from the first surface of the substrate, the maximum height of the connection portion from the first surface of the substrate is higher than the maximum height of the connection portion from the first surface of the substrate at the periphery of the opening of the outermost insulating layer, and the pitch of the connection portions is 50 μm or less.

Figure 4 is a schematic cross-sectional view showing an example of a wiring board of this embodiment. As shown in Figure 4, the wiring board 1 of this embodiment has a substrate 2 having a first surface 2a and a second surface 2b facing the first surface 2a, and one or more layers of wiring 3a, 3b and one or more insulating layers 4a, 4b arranged on the first surface 2a side of the substrate 1. The one or more layers of wiring 3a, 3b have at least an outermost wiring 13 (3b) located farthest from the substrate 2, and the one or more insulating layers 4a, 4b have at least an outermost insulating layer 14 (4b) arranged on the surface opposite to the substrate 2 side of the outermost wiring 13 (3b) and having an opening 5b located on the outermost wiring 13 (3b), and the wiring board 1 further has a connection portion 8 arranged in the opening 5b of the outermost insulating layer 14 (4b) and electrically connected to the outermost wiring 13 (3b). 4 and 5, the wiring board 1 further has a recess 16 located on the surface of the outermost insulating layer 14 (4b) and the connection portion 8 side and around the entire periphery of the opening 5b of the outermost insulating layer 14 (4b). For example, as shown in FIG. 6, the height H11 of the bottom c of the recess 16 from the first surface 2a of the substrate 2 is lower than the maximum height H12 of the outermost insulating layer 14 (4b) from the first surface 2a of the substrate 2 at the periphery of the opening 5b of the outermost insulating layer 14 (4b) and the maximum height H13 of the connection portion 8 from the first surface 2a of the substrate 2, and the maximum height H13 of the connection portion 8 from the first surface 2a of the substrate 2 is higher than the maximum height H12 of the outermost insulating layer 14 (4b) from the first surface 2a of the substrate 2 at the periphery of the opening 5b of the outermost insulating layer 14 (4b). Also, the pitch P of the connection portion 8 is within a predetermined range. Note that Figure 6 is an enlarged view of Figure 4, and Figure 5 is a top view of Figure 6.

The wiring board of this embodiment may have one or more layers of wiring and one or more insulating layers arranged on the first surface side of the substrate, and may have one layer of wiring and one insulating layer (not shown), or may have two layers of wiring 3a, 3b and two insulating layers 4a, 4b as shown in FIG. 4, or may have three or more layers of wiring and three or more insulating layers (not shown).

Generally, in wiring boards, from the viewpoint of electrical connectivity and electrical connection reliability, the connection portion is preferably arranged so as to cover the opening of the outermost insulating layer, that is, the connection portion is preferably arranged so that the height of the connection portion from the substrate is greater than the height of the outermost insulating layer from the substrate. However, if the connection portion is arranged so as to cover the opening of the outermost insulating layer and the height of the connection portion from the substrate is greater than the height of the outermost insulating layer from the substrate, solder bridges are more likely to occur at narrow pitches.

In contrast, according to this embodiment, the wiring board has a recess located on the surface of the outermost insulating layer and the connection portion side, and around the entire periphery of the opening of the outermost insulating layer, and the height of the bottom of the recess from the first surface of the substrate is lower than the maximum height of the outermost insulating layer from the first surface of the substrate at the periphery of the opening of the outermost insulating layer and the maximum height of the connection portion from the first surface of the substrate. This makes it easier for solder to flow into the recess when mounting electronic components on the wiring board of this embodiment, making it possible to suppress the solder from spreading and suppress the occurrence of solder bridges. Therefore, even with a narrow pitch, electrical connection can be made without causing a short circuit.

In addition, according to this embodiment, the maximum height of the connection portion from the first surface of the substrate is greater than the maximum height of the outermost insulating layer from the first surface of the substrate at the periphery of the opening in the outermost insulating layer, which makes it possible to increase the size of the terminal portion of the electronic component mounted on the wiring board of this embodiment, thereby improving electrical connectivity and increasing productivity.

Below, the wiring board of this embodiment will be explained in detail for each configuration.

1. Insulating Layer The insulating layer in this embodiment is a member that is disposed on the first surface side of the base material and has insulating properties. The wiring board in this embodiment has one or more insulating layers.

The insulating layer may be one or more layers, and may be one layer or two or more layers.

The one or more insulating layers are arranged on the side opposite the substrate side of the outermost wiring described below, and have at least an outermost insulating layer having an opening located above the outermost wiring.

The material for the insulating layer is not particularly limited as long as it is an insulating material, and insulating materials that are generally used for insulating layers of wiring boards can be used, and both organic and inorganic materials can be used.

The material of the outermost insulating layer is not particularly limited as long as it is an insulating material capable of forming the recess. In particular, the material of the outermost insulating layer is preferably a photosensitive resin. In other words, the outermost insulating layer preferably contains a cured product of a photosensitive resin composition. This is because the recess can be easily formed by photolithography.

The thickness of the insulating layer can be the same as that of an insulating layer in a typical wiring board.

As a method for forming the insulating layer, a general method for forming an insulating layer can be used, and is appropriately selected depending on the material of the insulating layer, etc. Also, as a method for forming an opening in the insulating layer, a general method for forming an opening can be used, and is appropriately selected depending on the material of the insulating layer, etc. Examples of methods for forming an opening include laser irradiation, etching such as plasma etching and wet etching, mechanical processing methods such as sandblasting and ultrasonic drilling, and photolithography. Among them, the method for forming the outermost insulating layer is preferably photolithography. This is because the above-mentioned recess can be easily formed by photolithography.

In addition, when the method for forming the outermost insulating layer is a photolithography method and a photosensitive resin composition is used, for example, when exposing a coating of the photosensitive resin composition, the recess can be easily formed by performing stepwise exposure so that the exposure amount differs between the area corresponding to the opening, the area corresponding to the periphery of the opening, and the other areas. Specifically, when a positive photosensitive resin composition is used, the recess can be easily formed by performing stepwise exposure so that the area corresponding to the opening becomes an unexposed area and the exposure amount of the area corresponding to the periphery of the opening is smaller than the exposure amount of the other areas.

2. Recess The recess in this embodiment is a portion located on the surface of the outermost insulating layer and the connection portion side, and extending over the entire periphery of the opening in the outermost insulating layer.

The height of the bottom of the recess from the first surface of the substrate is less than the maximum height of the outermost insulating layer from the first surface of the substrate at the periphery of the opening in the outermost insulating layer and the maximum height of the connection portion from the first surface of the substrate.

The difference between the height of the bottom of the recess from the first surface of the substrate and the maximum height of the outermost insulating layer from the first surface of the substrate at the periphery of the opening of the outermost insulating layer is, for example, preferably 0.5 μm or more, more preferably 0.5 μm or more and 3.0 μm or less, and particularly preferably 0.5 μm or more and 2.5 μm or less. By having the height difference within the above range, when mounting electronic components on the wiring board of this embodiment, the recess can suppress the spread of solder, and the occurrence of solder bridges can be suppressed.

The difference between the height of the bottom of the recess from the first surface of the substrate and the maximum height of the connection portion from the first surface of the substrate is preferably, for example, 0.2 μm or more, more preferably 0.3 μm or more and 3.0 μm or less, and particularly preferably 0.5 μm or more and 2.5 μm or less. By having the height difference within the above range, when mounting electronic components on the wiring board of this embodiment, the recess can suppress the spread of solder, thereby suppressing the occurrence of solder bridges.

Here, the "height of the bottom of the recess from the first surface of the substrate" refers to the height from the first surface of the substrate to the bottom of the recess. For example, in FIG. 6, this refers to the height H11 from the first surface 2a of the substrate 2 to the bottom c of the recess 16.
Furthermore, the "maximum height of the outermost insulating layer from the first surface of the base material at the periphery of the opening of the outermost insulating layer" refers to the maximum height among the heights from the first surface of the base material to the surface of the outermost insulating layer opposite the surface on the outermost wiring side at the periphery of the opening of the outermost insulating layer. For example, in Fig. 6, it refers to the maximum height H12 among the heights from the first surface 2a of the base material 2 to the surface of the outermost insulating layer 14 (4b) opposite the surface on the outermost wiring 13 (3b) side at the periphery of the opening 5b of the outermost insulating layer 14 (4b).
In addition, the "maximum height of the connection portion from the first surface of the substrate" refers to the maximum height from the first surface of the substrate to the surface opposite the surface of the connection portion on the outermost wiring side. For example, in Fig. 6, it refers to the maximum height H13 from the first surface 2a of the substrate 2 to the surface opposite the surface of the connection portion 8 on the outermost wiring side.

The cross-sectional shape of the recess is not particularly limited as long as the height of the bottom of the recess from the first surface of the substrate is less than the maximum height of the outermost insulating layer from the first surface of the substrate at the periphery of the opening of the outermost insulating layer and the maximum height of the connection from the first surface of the substrate.

The recesses are located on the surface of the outermost insulating layer and the connection portion, and all around the periphery of the opening of the outermost insulating layer. By providing a recess all around the periphery of the opening of the outermost insulating layer, the recesses can effectively prevent the solder from spreading when mounting electronic components on the wiring board of this embodiment, and can suppress the occurrence of solder bridges.

3. Wiring The wiring in this embodiment is a conductive member that is disposed on the first surface side of the base material. The wiring board in this embodiment has one or more layers of wiring.
The wiring may be the same as that in the first embodiment.

4. Connection Portion The connection portion in this embodiment is a member that is disposed in the opening of the outermost insulating layer and is electrically connected to the outermost wiring.

The maximum height of the connection portion from the first surface of the substrate is higher than the maximum height of the outermost insulating layer from the first surface of the substrate at the periphery of the opening of the outermost insulating layer. The difference between the maximum height of the connection portion from the first surface of the substrate and the maximum height of the outermost insulating layer from the first surface of the substrate at the periphery of the opening of the outermost insulating layer is, for example, preferably 3.0 μm or less, more preferably 0.1 μm or more and 2.5 μm or less, and particularly preferably 0.1 μm or more and 2.0 μm or less. By having the height difference within the above range, the electrical connection between the connection portion and the electronic component can be improved. In addition, for example, in CVD, sputtering, plating, etc., film growth is usually isotropic. 6, for example, if the difference H20 between the maximum height H13 of the connection portion 8 from the first surface 2a of the substrate 2 and the maximum height H12 of the outermost insulating layer 14 (4b) from the first surface 2a of the substrate 2 at the periphery of the opening 5b of the outermost insulating layer 14 (4b) is large, the overlapping portion of the connection portion 8 and the outermost insulating layer 14 will also become large on the surface of the outermost insulating layer 14 opposite the surface on the outermost wiring 13 side. If the overlapping portion of the connection portion 8 and the outermost insulating layer 14 on the surface of the outermost insulating layer 14 opposite the surface on the outermost wiring 13 side becomes large, the recess 16 will be easily covered by the connection portion 8, and it may become difficult to suppress the occurrence of a solder bridge due to the recess. Therefore, it is preferable that the difference H20 between the maximum height H13 of the connection portion 8 from the first surface 2a of the base material 2 and the maximum height H12 of the outermost insulating layer 14 (4b) from the first surface 2a of the base material 2 at the periphery of the opening 5b of the outermost insulating layer 14 (4b) is 3 μm or less.

The pitch, material, thickness, and forming method of the connection parts can be the same as those of the connection parts in the first embodiment described above.

5. Substrate The substrate in this embodiment has a first surface and a second surface opposite to the first surface, and is a member that supports the insulating layer, wiring, and connection portion.
The substrate may be the same as that in the first embodiment.

This disclosure is not limited to the above-mentioned embodiments. The above-mentioned embodiments are merely examples, and anything that has substantially the same configuration as the technical ideas described in the claims of this disclosure and provides similar effects is included within the technical scope of this disclosure.

The present disclosure will be described in further detail below with reference to examples and comparative examples.
[Example 1]
A wiring board as shown in FIG. 1 was produced.

(Formation of wiring and insulating layer)
First, a glass substrate (AN100, 300 mm x 400 mm, manufactured by AGC) was irradiated with ultraviolet light and washed. Then, the glass substrate was subjected to chromium sputtering and copper sputtering, and a resist pattern was formed thereon using a dry film resist (Sunfort AQ4038, manufactured by Asahi Kasei Electronics). Next, copper sulfate electrolytic plating (Top Lucina SF, manufactured by Okuno Pharmaceutical Co., Ltd.) was performed on the openings of the resist pattern to form a wiring layer (first layer) having a thickness of 10 μm. Next, the dry film resist was peeled off with a sodium hydroxide solution at 50° C., and the exposed chromium layer and copper layer were removed with a chromium etching solution (Esclean S-24, manufactured by Sasaki Chemical Industry Co., Ltd.) and a copper etching solution (AD-331, manufactured by Meltec Co., Ltd.), respectively. This formed the wiring (first layer). Thereafter, a photosensitive resist (Photoneece PW-1000, manufactured by Toray Industries, Inc.) was used to form an insulating layer (first layer) having a thickness of 3 μm and an opening pitch of 45 μm so as to cover the wiring (first layer).

Next, the insulating layer (first layer) was subjected to chrome sputtering and copper sputtering, and a resist pattern was formed thereon using dry film resist (Sunfort AQ4038, manufactured by Asahi Kasei Electronics). Next, copper sulfate electrolytic plating (Top Lucina SF, manufactured by Okuno Pharmaceuticals) was performed on the openings of the resist pattern to form a wiring layer (second layer) with a thickness of 10 μm. Next, the dry film resist was peeled off with a sodium hydroxide solution at 50°C, and the exposed chrome layer and copper layer were removed with a chrome etching solution (Esclean S-24, manufactured by Sasaki Chemical Industry Co., Ltd.) and a copper etching solution (AD-331, manufactured by Meltec Co., Ltd.), respectively. This formed the wiring (second layer). After that, a photosensitive resist (Photoneece PW-1000, manufactured by Toray Industries, Inc.) was used to form an insulating layer (second layer) with a thickness of 3 μm and an opening pitch of 45 μm to cover the wiring (second layer). When forming the second insulating layer, the time from the end of the application of the photosensitive resist to the start of reduced pressure drying was set to 40 seconds. The insulating layer (second layer) had a convex portion on the periphery of the opening.

(Formation of connection part)
Next, electroless nickel plating was performed on the opening of the insulating layer (second layer) to form a connection part. First, the surface of the wiring (second layer) exposed to the opening of the insulating layer (second layer) was degreased using an acid cleaner (ICP Clean S-135K, manufactured by Okuno Chemical Industries Co., Ltd.). Next, soft etching was performed with a copper etching solution (AD-331, manufactured by Meltec Co., Ltd.). Next, Pd was applied to the surface of the wiring (second layer) using an activator (ICP Accela, manufactured by Okuno Chemical Industries Co., Ltd.), and electroless nickel plating (ICP Nicoron GM-SE, manufactured by Okuno Chemical Industries Co., Ltd.) was performed to form a nickel-plated part. Then, electroless gold plating (Flash Gold NC, manufactured by Okuno Chemical Industries Co., Ltd.) was performed on the surface of the nickel-plated part to form a protective plating part with a thickness of 0.05 μm. This resulted in a wiring board having a connection part. The pitch of the connection part was 45 μm.

In the obtained wiring board, the height H1 of the convex portion of the insulating layer (second layer) from the first surface of the glass substrate was higher than the height H2 of the connection portion from the first surface of the glass substrate. In addition, the height H1 of the convex portion of the insulating layer (second layer) from the first surface of the glass substrate was higher than the height H3 of the portion other than the convex portion of the insulating layer (second layer) from the first surface of the glass substrate. The difference between the height H1 and the height H2, and the difference between the height H1 and the height H3 are shown in Table 1.

[Example 2]
A wiring board as shown in FIG. 4 was fabricated.

(Formation of wiring and insulating layer)
First, a glass substrate (AN100, 300 mm x 400 mm, manufactured by AGC) was irradiated with ultraviolet light and washed. Then, the glass substrate was subjected to chromium sputtering and copper sputtering, and a resist pattern was formed thereon using a dry film resist (Sunfort AQ4038, manufactured by Asahi Kasei Electronics). Next, copper sulfate electrolytic plating (Top Lucina SF, manufactured by Okuno Pharmaceutical Co., Ltd.) was performed on the openings of the resist pattern to form a wiring layer (first layer) having a thickness of 2 μm. Next, the dry film resist was peeled off with a sodium hydroxide solution at 50° C., and the exposed chromium layer and copper layer were removed with a chromium etching solution (Esclean S-24, manufactured by Sasaki Chemical Industry Co., Ltd.) and a copper etching solution (AD-331, manufactured by Meltec Co., Ltd.), respectively. This formed the wiring (first layer). Thereafter, a photosensitive resist (Photoneece PW-1000, manufactured by Toray Industries, Inc.) was used to form an insulating layer (first layer) having a thickness of 3 μm and an opening pitch of 45 μm so as to cover the wiring (first layer).

Next, the insulating layer (first layer) was subjected to chromium sputtering and copper sputtering, and a resist pattern was formed thereon using a dry film resist (Sunfort AQ4038, manufactured by Asahi Kasei Electronics Co., Ltd.). Next, copper sulfate electrolytic plating (Top Lucina SF, manufactured by Okuno Pharmaceutical Co., Ltd.) was performed on the openings of the resist pattern to form a wiring layer (second layer) having a thickness of 2 μm. Next, the dry film resist was peeled off with a sodium hydroxide solution at 50° C., and the exposed chromium layer and copper layer were removed with a chromium etching solution (Esclean S-24, manufactured by Sasaki Chemical Industry Co., Ltd.) and a copper etching solution (AD-331, manufactured by Meltec Co., Ltd.), respectively. This formed the wiring (second layer). Then, a photosensitive resist (Photoneece PW-1000, manufactured by Toray Industries, Inc.) was used to form an insulating layer (second layer) having a thickness of 3 μm and an opening pitch of 45 μm so as to cover the wiring (second layer). When forming the second insulating layer, stepwise exposure was performed during exposure of the photosensitive resist, with the area corresponding to the opening left unexposed, the area 5 μm from the outer periphery of the opening given an exposure dose of 20 mJ/ ^cm2 , and the other areas given an exposure dose of 60 mJ/ ^cm2 .

(Formation of connection part)
Next, connection parts were formed in the openings of the insulating layer (second layer) in the same manner as in Example 1. In this way, a wiring board having connection parts was obtained. The pitch of the connection parts was 45 μm.

The obtained wiring board had a recess located over the entire periphery of the opening of the insulating layer (second layer) on the surface on the connection portion side of the insulating layer (second layer).
In the obtained wiring board, the height H11 of the bottom of the recess from the first surface of the glass substrate was lower than the maximum height H12 of the insulating layer (second layer) from the first surface of the glass substrate at the periphery of the opening of the insulating layer (second layer) and the maximum height H13 of the connection portion from the first surface of the glass substrate. In addition, the maximum height H13 of the connection portion from the first surface of the glass substrate was higher than the maximum height H12 of the insulating layer (second layer) from the first surface of the glass substrate at the periphery of the opening of the insulating layer (second layer). The difference between the height H11 and the height H12, the difference between the height H11 and the height H13, and the difference between the height H12 and the height H13 are shown in Table 1.

[Comparative Example 1]
(Formation of wiring and insulating layer)
First, a glass substrate (AN100, 300 mm x 400 mm, manufactured by AGC) was irradiated with ultraviolet light and washed. Then, the glass substrate was subjected to chromium sputtering and copper sputtering, and a resist pattern was formed thereon using a dry film resist (Sunfort AQ4038, manufactured by Asahi Kasei Electronics). Next, copper sulfate electrolytic plating (Top Lucina SF, manufactured by Okuno Pharmaceutical Co., Ltd.) was performed on the openings of the resist pattern to form a wiring layer (first layer) having a thickness of 2 μm. Next, the dry film resist was peeled off with a sodium hydroxide solution at 50° C., and the exposed chromium layer and copper layer were removed with a chromium etching solution (Esclean S-24, manufactured by Sasaki Chemical Industry Co., Ltd.) and a copper etching solution (AD-331, manufactured by Meltec Co., Ltd.), respectively. This formed the wiring (first layer). Thereafter, a photosensitive resist (Photoneece PW-1000, manufactured by Toray Industries, Inc.) was used to form an insulating layer (first layer) having a thickness of 3 μm and an opening pitch of 45 μm so as to cover the wiring (first layer). When forming the first insulating layer, the time from the end of application of the photosensitive resist to the start of reduced pressure drying was set to 80 seconds.

Next, the insulating layer (first layer) was subjected to chrome sputtering and copper sputtering, and a resist pattern was formed thereon using dry film resist (Sunfort AQ4038, manufactured by Asahi Kasei Electronics). Next, copper sulfate electrolytic plating (Top Lucina SF, manufactured by Okuno Pharmaceuticals) was performed on the openings of the resist pattern to form a wiring layer (second layer) with a thickness of 10 μm. Next, the dry film resist was peeled off with a sodium hydroxide solution at 50°C, and the exposed chrome layer and copper layer were removed with a chrome etching solution (Esclean S-24, manufactured by Sasaki Chemical Industry Co., Ltd.) and a copper etching solution (AD-331, manufactured by Meltec Co., Ltd.), respectively. This formed the wiring (second layer). After that, a photosensitive resist (Photoneece PW-1000, manufactured by Toray Industries, Inc.) was used to form an insulating layer (second layer) with a thickness of 3 μm and an opening pitch of 45 μm to cover the wiring (second layer). When forming the second insulating layer, the time from the end of application of the photosensitive resist to the start of reduced pressure drying was set to 80 seconds.

(Formation of connection part)
Next, connection parts were formed in the openings of the insulating layer (second layer) in the same manner as in Example 1. In this way, a wiring board having connection parts was obtained. The pitch of the connection parts was 45 μm.

[evaluation]
Solder paste was applied to the connections of the obtained wiring board, and the board was held in a reflow furnace at 150° C. for 2 minutes and then at 210° C. for 10 seconds, and the presence or absence of solder bridges between the connections was observed under a microscope. The results are shown in Table 1.

REFERENCE SIGNS LIST 1 wiring board 2 substrate 2a first surface of substrate 2b second surface of substrate 3a, 3b wiring 4a, 4b insulating layer 5a, 5b opening 6 first connection layer 7 second connection layer 8 connection portion 13 outermost wiring 14 outermost insulating layer 15 protrusion 16 recess P pitch of connection portion

Claims (2)

A wiring board having a base material having a first surface and a second surface opposite to the first surface, and one or more layers of wiring and one or more insulating layers disposed on the first surface side of the base material,
The one or more layers of wiring have at least an outermost wiring located farthest from the substrate,
the one or more insulating layers are disposed on a surface of the outermost wiring opposite to a surface of the outermost wiring facing the substrate;
an outermost insulating layer having at least two openings located on the outermost wiring;
the wiring board further has at least two connection parts disposed in at least two openings of the outermost insulating layer and electrically connected to the outermost wiring;
the outermost insulating layer has a portion between adjacent connection portions, the portion having a height from the first surface of the base material that is higher than a height of the connection portion from the first surface of the base material by a range of 0.1 μm to 0.5 μm ;
the outermost insulating layer around any one of the connection portions has a portion whose height from the first surface of the base material is lower than the height of the connection portion from the first surface of the base material,
A wiring board, wherein the pitch of the connection portions is 50 μm or less. The wiring board according to claim 1, wherein the outermost insulating layer comprises a cured product of a photosensitive resin composition.