JP7708348B2 - Crystalline oxide film and semiconductor device - Google Patents

Description

The present invention relates to a crystalline oxide film useful for semiconductor devices and a semiconductor device using the crystalline oxide film.

Conventionally, when growing crystals on a dissimilar substrate, problems such as cracks, lattice defects, and warping can occur. To address this problem, methods such as matching the lattice constants and thermal expansion coefficients of the substrate and film have been considered. In addition, when mismatches occur, film formation techniques such as ELO have also been considered.

Patent Document 1 describes a method of forming a buffer layer on a heterogeneous substrate and growing a zinc oxide-based semiconductor layer on the buffer layer. Patent Document 2 describes forming a nanodot mask on a heterogeneous substrate and then forming a single crystal semiconductor material layer. Non-Patent Document 1 describes a method of growing GaN crystals on sapphire via GaN nanocolumns. Non-Patent Document 2 describes a method of growing GaN crystals on Si(111) using a periodic SiN intermediate layer to reduce defects such as pits.

However, with both technologies, the deposition speed was slow, and cracks, dislocations, warping, etc. occurred in the substrate, and dislocations and cracks occurred in the epitaxial film, making it difficult to obtain a high-quality epitaxial film. There were also obstacles to increasing the diameter of the substrate and the thickness of the epitaxial film.

In addition, as a next-generation switching element capable of realizing high voltage resistance, low loss, and high heat resistance, a semiconductor device using gallium oxide (Ga ₂ O ₃ ) with a large band gap has been attracting attention, and it is expected to be applied to power semiconductor devices such as inverters. Moreover, due to its wide band gap, it is also expected to be applied as a light receiving and emitting device such as an LED or a sensor. According to Non-Patent Document 1, the band gap of the gallium oxide can be controlled by mixing indium and aluminum, respectively or in combination, and it constitutes an extremely attractive material system as an InAlGaO-based semiconductor. Here, the InAlGaO-based semiconductor refers to In _x Al _y Ga _{zo 3} (0≦X≦2, 0≦Y≦2, 0≦Z≦2, X+Y+Z=1.5 to 2.5), and can be viewed as the same material system containing gallium oxide.

However, since the restabilized phase of gallium oxide is a β-gallium structure, it is difficult to form a crystalline film having a corundum structure unless a special film formation method is used, and many problems still remain in terms of crystal quality, etc. In response to this, several studies are currently being conducted on the formation of a crystalline semiconductor film having a corundum structure.
Recently, as described in Non-Patent Document 4, it has been considered to grow a gallium oxide film having a corundum structure by ELO or the like. According to the method described in Non-Patent Document 4, it is possible to obtain a gallium oxide film having a good corundum structure, but when the crystal film is actually examined, it has a tendency to grow facets, and there are also problems such as dislocations and cracks caused by this facet growth, so it is still not satisfactory for application to semiconductor devices. Non-Patent Document 5 describes the formation of an α-Ga ₂ O ₃ film on an m-plane sapphire substrate. However, the α-Ga ₂ O ₃ film formed by the method described in Non-Patent Document 5 has problems such as uneven warping in each crystal axis direction and cracks occurring when the film is made thick, and is not sufficiently satisfactory for application to large-area and semiconductor devices. Therefore, a film formation method capable of suppressing warping and cracking and a crystalline oxide film with improved warping and cracking have been awaited.

JP 2010-232623 A Special Publication No. 2010-516599

Kazuhide Kusakabe., et al., “Overgrowth of GaN layer on GaN nano-columns by RF-molecular beam epitaxy”, Journal of Crystal Growth 237-239 (2002) 988-992 K. Y. Zang., et al., “Defect reduction by periodic SiNx interlayers in gallium nitride grown on Si (111)”, Journal of Applied Physics 101, 093502 (2007) Kentaro Kaneko, "Growth and properties of corundum-structured gallium oxide alloy thin films", Doctoral dissertation, Kyoto University, March 2013 Akio Takatsuka, Shinya Oda, Kentaro Kaneko, Shizuo Fujita, Toshimi Hitohara, “Selective Lateral Overgrowth (ELO) of α-type Gallium Oxide by Mist Epitaxy”, 62nd Spring Meeting of the Japan Society of Applied Physics, Tokai University, (March 11-14, 2015) 13a-P18-12. AKAIWA, Kazuaki, et al. Electrical Properties of Sn‐Doped α‐Ga2O3 Films on m‐Plane Sapphire Substrates Grown by Mist Chemical Vapor Deposition. physica status solidi (a), 2020, 217.3: 1900632.

The present invention aims to provide a crystalline oxide film that is suppressed from warping and cracking.

As a result of intensive research to achieve the above-mentioned object, the inventors have discovered that a crystalline oxide film containing a metal oxide and including at least a first crystal axis and a second crystal axis, in which the linear expansion coefficient in the first crystal axis direction is smaller than the linear expansion coefficient in the second crystal axis direction and the main surface is a plane inclined at least in the second crystal axis direction from a plane parallel to the second crystal axis direction, has reduced warping and cracks, and have found that such a crystalline oxide film can solve the above-mentioned conventional problems in one fell swoop.
After obtaining the above findings, the inventors conducted further studies and completed the present invention.

That is, the present invention relates to the following inventions.
[1] A crystalline oxide film including a metal oxide and including at least a first crystal axis and a second crystal axis, wherein a linear expansion coefficient in the first crystal axis direction is smaller than a linear expansion coefficient in the second crystal axis direction, and a main surface is a surface inclined toward at least the second crystal axis direction from a surface parallel to the second crystal axis direction.
[2] The crystalline oxide film according to claim 1, wherein the metal oxide contains gallium.
[3] The crystalline oxide film according to [1] or [2], wherein the metal oxide has a corundum structure.
[4] The crystalline oxide film according to [2], wherein the metal oxide contains indium, rhodium or iridium in addition to gallium.
[5] The crystalline oxide film according to [2], wherein the metal oxide contains indium and/or aluminum in addition to gallium.
[6] The crystalline oxide film according to any one of [1] to [5] above, having a film thickness of 2.5 μm or more.
[7] The crystalline oxide film according to any one of [1] to [6] above, which contains a dopant.
[8] The crystalline oxide film according to any one of [1] to [7] above, wherein the ratio of the amount of warping in the second crystal axis direction to the amount of warping in the first crystal axis direction is 3 or less.
[9] The crystalline oxide film according to any one of [1] to [8] above, wherein the inclination angle is within a range of 3° to 25°.
[10] The crystalline oxide film according to any one of [1] to [9] above, wherein the inclination angle is within a range of 3° to 10°.
[11] The crystalline oxide film according to any one of [1] to [10] above, which has a corundum structure and has a main surface that is inclined from an m-plane toward at least a second crystal axis direction.
[12] The crystalline oxide film according to [11] above, wherein the second crystal axis direction is the c-axis direction.
[13] A semiconductor device comprising at least the crystalline oxide film according to any one of [1] to [12] above and an electrode.
[14] A power conversion device using the semiconductor device according to [13].
[15] A control system using the semiconductor device according to [13] above.

The crystalline oxide film of the present invention has reduced warping and cracks.

FIG. 1 is a schematic diagram showing the configuration of a film forming apparatus preferably used in an embodiment of the present invention. FIG. 2 is a schematic diagram of a film forming apparatus (mist CVD) of another embodiment different from that shown in FIG. 1 that is preferably used in an embodiment of the present invention. FIG. 1 is a diagram illustrating a preferred example of a Schottky barrier diode (SBD). FIG. 1 is a diagram illustrating a preferred example of a high electron mobility transistor (HEMT). FIG. 1 is a diagram illustrating a preferred example of a metal oxide semiconductor field effect transistor (MOSFET). FIG. 1 is a diagram illustrating a preferred example of a junction field effect transistor (JFET). FIG. 1 is a diagram illustrating a preferred example of an insulated gate bipolar transistor (IGBT). FIG. 1 is a diagram illustrating a preferred example of a light-emitting element (LED). FIG. 1 is a diagram illustrating a preferred example of a light-emitting element (LED). FIG. 1 is a diagram illustrating a preferred example of a junction barrier Schottky diode (JBS). FIG. 1 is a diagram illustrating a preferred example of a junction barrier Schottky diode (JBS). FIG. 1 is a diagram illustrating a preferred example of a metal oxide semiconductor field effect transistor (MOSFET). 1 is a block diagram showing an example of a control system employing a semiconductor device according to an embodiment of the present invention; 1 is a circuit diagram showing an example of a control system employing a semiconductor device according to an embodiment of the present invention. 1 is a block diagram showing an example of a control system employing a semiconductor device according to an embodiment of the present invention; 1 is a circuit diagram showing an example of a control system employing a semiconductor device according to an embodiment of the present invention. FIG. 13 is a diagram showing the results of warpage measurement in Examples and Comparative Examples.

The crystalline oxide film of the present invention is a crystalline oxide film containing a metal oxide and at least a first crystal axis and a second crystal axis, characterized in that the linear expansion coefficient in the first crystal axis direction is smaller than the linear expansion coefficient in the second crystal axis direction, and the main surface is a surface inclined from a surface parallel to the second crystal axis direction to at least the second crystal axis direction. The main surface may be inclined at least in the second crystal axis direction, and may be inclined in other crystal axis directions (e.g., the first crystal axis direction, etc.) in addition to the second crystal axis direction. Note that the "crystal axis" is a coordinate axis derived from a crystal structure to systematically show the symmetry of the crystal plane and rotation. Note that the "linear thermal expansion coefficient" is measured in accordance with JIS R 3102 (1995). The "main surface" is the surface having the widest area of the crystalline oxide film, and is usually the surface of the crystalline oxide film. In an embodiment of the present invention, it is preferable that the main surface is a surface inclined from the m-plane in at least the second crystal axis direction, since it is possible to obtain the crystalline oxide film with a more uniform warpage in the crystal axis direction. In this case, it is preferable that the second crystal axis direction is the c-axis direction. In addition, the surface inclined from a surface parallel to the second crystal axis in at least the second crystal axis direction includes, for example, a surface inclined from the m-plane in the c-axis direction or a surface inclined from the a-plane in the c-axis direction when the crystalline oxide film has a corundum structure. In an embodiment of the present invention, it is preferable that the crystalline oxide film has a corundum structure, and the main surface of the crystalline oxide film is a surface inclined from the m-plane in at least the c-axis direction. The angle of inclination is not particularly limited as long as it does not impede the object of the present invention. In an embodiment of the present invention, the angle of inclination may be positive or negative. In an embodiment of the present invention, it is preferable that the angle of inclination is within the range of 3° to 25°, and more preferably within the range of 3° to 10°, since it is possible to obtain the crystalline oxide film with better electrical properties while suppressing warpage and cracks.

The crystalline oxide film is not particularly limited as long as it contains a metal oxide, as long as it does not impede the object of the present invention. In an embodiment of the present invention, the crystalline oxide film preferably contains the metal oxide as a main component, more preferably contains a metal oxide containing gallium as a main component, and most preferably contains gallium oxide and its mixed crystal as a main component. The crystal structure of the metal oxide is not particularly limited. Examples of the crystal structure of the metal oxide include a corundum structure, a β-gallia structure, a hexagonal structure (e.g., an ε-type structure), an orthorhombic structure (e.g., a κ-type structure), a cubic structure, and a tetragonal structure. In an embodiment of the present invention, the crystalline oxide film preferably contains a metal oxide having a corundum structure as a main component. The metal oxide is not particularly limited as long as it does not impede the object of the present invention, but in an embodiment of the present invention, it is preferable that the metal oxide contains gallium. In an embodiment of the present invention, the metal oxide preferably contains, in addition to gallium, one or more metals from the fourth to sixth periods of the periodic table other than gallium, and more preferably contains indium, rhodium, or iridium in addition to gallium. In an embodiment of the present invention, the metal oxide preferably contains, in addition to gallium, indium and/or aluminum. Examples of the metal oxide containing gallium include α-Ga ₂ O ₃ or a mixed crystal thereof. A crystalline oxide film containing such a preferred metal oxide as a main component has better crystallinity and heat dissipation properties, and can have even better semiconductor properties. The "main component" refers to a crystalline oxide film containing 50% or more of the metal oxide, preferably 70% or more, and more preferably 90% or more of the metal oxide in terms of composition ratio. For example, when the metal oxide is α-Ga ₂ O ₃ , it is sufficient that the α-Ga ₂ O ₃ is contained in the crystalline oxide film at a ratio of 0.5 or more of the atomic ratio of gallium in the metal elements of the crystalline oxide film. In an embodiment of the present invention, the atomic ratio of gallium in the metal elements of the crystalline oxide film is preferably 0.7 or more, more preferably 0.8 or more. The crystalline oxide film may be a single crystal film or a polycrystalline film. The crystalline oxide film may be any of an insulating film, a semiconductor film, and a conductive film, but in an embodiment of the present invention, it is preferably a semiconductor film. The thickness of the crystalline oxide film is not particularly limited, but in an embodiment of the present invention, it is preferably 2.5 μm or more, and more preferably 5 μm or more. According to the above-mentioned preferred embodiment of the present invention, even if the crystalline oxide film is such a thick film, it is possible to obtain the crystalline oxide film in which warping and cracking are suppressed while maintaining electrical properties.

The crystalline oxide film may contain a dopant. The dopant is not particularly limited as long as it does not impede the object of the present invention. It may be an n-type dopant or a p-type dopant. Examples of the n-type dopant include tin, germanium, silicon, titanium, zirconium, vanadium, and niobium. The concentration of the dopant may be appropriately set, and specifically, for example, may be about 1×10 ¹⁶ /cm ³ to 1×10 ²² /cm ³ , or the concentration of the dopant may be a low concentration of, for example, about 1×10 ¹⁷ /cm ³ or less. Furthermore, according to an embodiment of the present invention, the dopant may be contained at a high concentration of about 1×10 ²⁰ /cm ³ or more.

The crystalline oxide film can be obtained, for example, by the following suitable film formation method.
That is, the crystalline oxide film can be obtained by epitaxial crystal growth using a crystal substrate that includes at least a first crystal axis and a second crystal axis and has a crystal growth surface that is inclined from a plane parallel to the second crystal axis direction toward at least the second crystal axis direction.

<Crystal Substrate>
The crystal substrate is not particularly limited as long as it does not impede the object of the present invention, and may be a known substrate. It may be an insulating substrate, a conductive substrate, or a semiconductor substrate. It may be a single crystal substrate or a polycrystalline substrate. The crystal substrate may be, for example, a substrate containing a crystalline material having a corundum structure as a main component. The "main component" refers to a substrate containing the crystalline material in a composition ratio of 50% or more, preferably 70% or more, and more preferably 90% or more. The crystal substrate having the corundum structure may be, for example, a sapphire substrate or an α-type gallium oxide substrate.

In an embodiment of the present invention, the crystal substrate is preferably a sapphire substrate. Examples of the sapphire substrate include a c-plane sapphire substrate, an m-plane sapphire substrate, an a-plane sapphire substrate, and an r-plane sapphire substrate. In an embodiment of the present invention, the sapphire substrate is preferably a sapphire substrate having a crystal growth surface inclined from the m-plane in at least the c-axis direction or a sapphire substrate having a crystal growth surface inclined from the a-plane in at least the c-axis direction, and more preferably a sapphire substrate having a crystal growth surface inclined from the m-plane in at least the c-axis direction. In an embodiment of the present invention, the angle of inclination may be positive or negative. In an embodiment of the present invention, the angle of inclination is preferably within the range of 3° to 25°, and more preferably within the range of 3° to 10°, since this allows the crystalline oxide film to be obtained with excellent electrical properties while suppressing warping and cracking.
The thickness of the crystal substrate is not particularly limited, but is usually 10 μm to 20 mm, and more preferably 10 to 1000 μm. Suitable shapes of the crystal substrate include, for example, a triangle, a quadrangle (e.g., a rectangle or a trapezoid), a polygonal shape such as a pentagon or a hexagon, a U-shape, an inverted U-shape, an L-shape, or a C-shape.

In addition, in an embodiment of the present invention, other layers such as a buffer layer or a stress relaxation layer may be provided on the crystal substrate. An example of the buffer layer is a layer made of a metal oxide having the same crystal structure as the crystal structure of the crystal substrate or the crystalline oxide film. An example of the stress relaxation layer is an ELO mask layer.

The epitaxial crystal growth means is not particularly limited and may be any known means as long as it does not impede the object of the present invention. Examples of the epitaxial crystal growth means include CVD, MOCVD, MOVPE, mist CVD, mist epitaxy, MBE, HVPE, pulse growth, and ALD. In an embodiment of the present invention, it is preferable that the epitaxial crystal growth means is mist CVD or mist epitaxy.

In the mist CVD or mist epitaxy method, a raw material solution containing metal is atomized (atomization process), the droplets are suspended, the resulting atomized droplets are transported to the vicinity of the crystal substrate by a carrier gas (transportation process), and then the atomized droplets are thermally reacted (film formation process).

(Raw material solution)
The raw material solution contains at least gallium as a film-forming raw material, and is not particularly limited as long as it can be atomized, and may contain an inorganic material or an organic material. The metal may be a simple metal or a metal compound, and is not particularly limited as long as it does not hinder the object of the present invention. Examples of the metal include one or more metals selected from gallium (Ga), iridium (Ir), indium (In), rhodium (Rh), aluminum (Al), gold (Au), silver (Ag), platinum (Pt), copper (Cu), iron (Fe), manganese (Mn), nickel (Ni), palladium (Pd), cobalt (Co), ruthenium (Ru), chromium (Cr), molybdenum (Mo), tungsten (W), tantalum (Ta), zinc (Zn), lead (Pb), rhenium (Re), titanium (Ti), tin (Sn), magnesium (Mg), calcium (Ca) and zirconium (Zr). In an embodiment of the present invention, the metal preferably contains at least gallium. In addition, in an embodiment of the present invention, the metal preferably contains one or more metals from the fourth to sixth periods of the periodic table in addition to gallium, and more preferably contains indium, rhodium or iridium. In an embodiment of the present invention, the metal preferably contains indium and/or aluminum in addition to gallium. By using such a preferable metal, the crystalline oxide film can be formed which is more suitable for use in semiconductor devices and the like.

In an embodiment of the present invention, the raw material solution can be preferably prepared by dissolving or dispersing the metal in the form of a complex or salt in an organic solvent or water. Examples of the complex include acetylacetonate complexes, carbonyl complexes, ammine complexes, and hydride complexes. Examples of the salt include organic metal salts (e.g., metal acetates, metal oxalates, and metal citrates), metal sulfides, metal nitrates, metal phosphates, and metal halides (e.g., metal chlorides, metal bromides, and metal iodides).

The solvent of the raw material solution is not particularly limited as long as it does not interfere with the object of the present invention, and may be an inorganic solvent such as water, an organic solvent such as alcohol, or a mixed solvent of an inorganic solvent and an organic solvent. In an embodiment of the present invention, it is preferable that the solvent contains water.

The raw material solution may be mixed with additives such as hydrohalic acid and oxidizing agents. Examples of the hydrohalic acid include hydrobromic acid, hydrochloric acid, and hydroiodic acid. Examples of the oxidizing agent include peroxides such as hydrogen peroxide (H ₂ O ₂ ), sodium peroxide (Na ₂ O ₂ ), barium peroxide (BaO ₂ ), and benzoyl peroxide (C ₆ H ₅ CO) ₂ O ₂ , hypochlorous acid (HClO), perchloric acid, nitric acid, ozone water, and organic peroxides such as peracetic acid and nitrobenzene.

The raw material solution may contain a dopant. The dopant is not particularly limited as long as it does not impede the object of the present invention. Examples of the dopant include n-type dopants or p-type dopants such as tin, germanium, silicon, titanium, zirconium, vanadium, or niobium. The concentration of the dopant may usually be about 1×10 ¹⁶ /cm ³ to 1×10 ²² /cm ³ , or the concentration of the dopant may be a low concentration of, for example, about 1×10 ¹⁷ /cm ³ or less. Furthermore, according to an embodiment of the present invention, the dopant may be contained at a high concentration of about 1×10 ²⁰ /cm ³ or more.

(Atomization process)
In the atomization step, a raw solution containing a metal is prepared, the raw solution is atomized, the droplets are suspended, and the atomized droplets are generated. The blending ratio of the metal is not particularly limited, but is preferably 0.0001 mol/L to 20 mol/L with respect to the entire raw solution. The atomization means is not particularly limited as long as it can atomize the raw solution, and may be a known atomization means, but in an embodiment of the present invention, it is preferable that it is an atomization means using ultrasonic vibration. The mist used in the present invention is one that floats in the air, and is more preferably a mist that has an initial velocity of zero and can be transported as a gas floating in space, rather than being sprayed like a spray. The droplet size of the mist is not particularly limited, and may be droplets of about several mm, but is preferably 50 μm or less, and more preferably 1 to 10 μm.

(Transportation process)
In the transport step, the atomized droplets are transported to the substrate by the carrier gas. The type of carrier gas is not particularly limited as long as it does not impede the object of the present invention, and suitable examples include oxygen, ozone, inert gas (e.g., nitrogen, argon, etc.), and reducing gas (hydrogen gas, forming gas, etc.). The type of carrier gas may be one type, but may be two or more types, and a dilution gas (e.g., 10-fold dilution gas, etc.) with a changed carrier gas concentration may be further used as a second carrier gas. The supply point of the carrier gas may be not only one but also two or more. The flow rate of the carrier gas is not particularly limited, but is preferably 1 LPM or less, and more preferably 0.1 to 1 LPM.

(Film forming process)
In the film-forming step, the atomized droplets are reacted to form a film on the crystal substrate. The reaction is not particularly limited as long as a film is formed from the atomized droplets, but in an embodiment of the present invention, a thermal reaction is preferable. The thermal reaction may be performed as long as the atomized droplets react with heat, and the reaction conditions are not particularly limited as long as the object of the present invention is not hindered. In this step, the thermal reaction is usually performed at a temperature equal to or higher than the evaporation temperature of the solvent in the raw material solution, but is preferably a temperature not too high, more preferably 650° C. or lower. In addition, the thermal reaction may be performed under any of the following atmospheres: vacuum, non-oxygen atmosphere, reducing gas atmosphere, and oxygen atmosphere, as long as the object of the present invention is not hindered. In addition, the thermal reaction may be performed under any of the following conditions: atmospheric pressure, pressurized, and reduced pressure. In an embodiment of the present invention, it is preferable to perform the reaction under atmospheric pressure because the calculation of the evaporation temperature is easier and the equipment can be simplified. The film thickness can be set by adjusting the film-forming time.

The film forming apparatus 19 preferably used in the embodiment of the present invention will be described below with reference to the drawings. The film forming apparatus 19 in FIG. 1 includes a carrier gas source 22a for supplying a carrier gas, a flow rate control valve 23a for adjusting the flow rate of the carrier gas sent from the carrier gas source 22a, a carrier gas (dilution) source 22b for supplying a carrier gas (dilution), a flow rate control valve 23b for adjusting the flow rate of the carrier gas (dilution) sent from the carrier gas (dilution) source 22b, a mist generating source 24 containing a raw material solution 24a, a container 25 for containing water 25a, an ultrasonic vibrator 26 attached to the bottom surface of the container 25, a film forming chamber 30, a quartz supply pipe 27 connecting the mist generating source 24 to the film forming chamber 30, and a hot plate (heater) 28 installed in the film forming chamber 30. A substrate 20 is installed on the hot plate 28.

Then, as shown in FIG. 1, the raw solution 24a is contained in the mist generating source 24. Next, the substrate 20 is placed on the hot plate 28, and the hot plate 28 is operated to raise the temperature in the film formation chamber 30. Next, the flow rate control valve 23 (23a, 23b) is opened to supply carrier gas from the carrier gas source 22 (22a, 22b) into the film formation chamber 30, and after the atmosphere in the film formation chamber 30 is sufficiently replaced with the carrier gas, the flow rate of the carrier gas and the flow rate of the carrier gas (dilution) are adjusted. Next, the ultrasonic vibrator 26 is vibrated, and the vibration is propagated to the raw solution 24a through the water 25a, thereby atomizing the raw solution 24a to generate the mist droplets 24b. The atomized droplets 24b are introduced into the film-forming chamber 30 by the carrier gas and transported to the substrate 20. Then, under atmospheric pressure, the atomized droplets 24b undergo a thermal reaction in the film-forming chamber 30 to form a film on the substrate 20.

It is also preferable to use a mist CVD apparatus (film forming apparatus) 19 shown in Fig. 2. The mist CVD apparatus 19 in Fig. 2 includes a susceptor 21 on which a substrate 20 is placed, a carrier gas supply means 22a for supplying a carrier gas, a flow rate control valve 23a for adjusting the flow rate of the carrier gas sent out from the carrier gas supply means 22a, a carrier gas (dilution) supply means 22b for supplying a carrier gas (dilution), a flow rate control valve 23b for adjusting the flow rate of the carrier gas sent out from the carrier gas (dilution) supply means 22b, a mist generating source 24 in which a raw material solution 24a is contained, a container 25 in which water 25a is contained, an ultrasonic vibrator 26 attached to the bottom surface of the container 25, a supply pipe 27 made of a quartz tube with an inner diameter of 40 mm, a heater 28 installed around the supply pipe 27, and an exhaust port 29 for discharging mist, droplets and exhaust gas after the thermal reaction. The susceptor 21 is made of quartz, and the surface on which the substrate 20 is placed is inclined from the horizontal plane. By making both the supply pipe 27, which serves as the film formation chamber, and the susceptor 21 out of quartz, impurities originating from the device are prevented from being mixed into the film formed on the substrate 20. This mist CVD device 19 can be used in the same way as the film formation device 19 described above.

By using the suitable film formation apparatus, the crystalline oxide film can be formed more easily on the crystal growth surface of the crystal substrate. The crystalline oxide film is usually formed by epitaxial crystal growth.

According to the above-mentioned preferred film-forming method, the crystalline oxide film can be obtained in which the non-uniformity of the warpage in each crystal axis direction is improved. More specifically, the crystalline oxide film can be obtained in which the ratio of the warpage in the second crystal axis direction to the warpage in the first crystal axis direction is 3 or less. In an embodiment of the present invention, the ratio of the warpage can be set to 2 or less by setting the inclination angle to a preferred angle (for example, 6° to 10°). In an embodiment of the present invention, the lower limit of the ratio of the warpage is preferably 0.4 or more. The warpage refers to the shortest distance between the shortest straight line passing through the points at both ends of the film and the apex of the concave or convex, and can be measured, for example, using a shape measuring device using a laser. In addition, according to the above-mentioned preferred film-forming method, the crystalline oxide film can be obtained in which cracks are further reduced. More specifically, even if the film thickness is, for example, 2.5 μm or more (preferably 5 μm or more), the crystalline oxide film can be obtained in which cracks are substantially not included in an area of at least 2 ^mm2 or more. In addition, in an embodiment of the present invention, even if the film thickness is 10 μm or more, the crystalline oxide film can be obtained which is substantially free of cracks over an area of at least 2 mm ² or more.

The crystalline oxide film is useful for semiconductor devices, particularly power devices. Examples of semiconductor devices formed using the crystalline oxide film include transistors such as MIS and HEMT, TFTs, Schottky barrier diodes using semiconductor-metal junctions, JBS, PN or PIN diodes combined with other P layers, and light-emitting and receiving elements. In an embodiment of the present invention, the crystalline oxide film can be peeled off from the crystalline substrate as desired and used in a semiconductor device.

The semiconductor device can be suitably used as either a horizontal element (horizontal device) in which an electrode is formed on one side of the semiconductor layer, or a vertical element (vertical device) in which electrodes are formed on both sides of the semiconductor layer, but in the embodiment of the present invention, it is preferable to use it as a vertical device. Suitable examples of the semiconductor device include, for example, Schottky barrier diodes (SBD), junction barrier Schottky diodes (JBS), metal semiconductor field effect transistors (MESFET), high electron mobility transistors (HEMT), metal oxide semiconductor field effect transistors (MOSFET), static induction transistors (SIT), junction field effect transistors (JFET), insulated gate bipolar transistors (IGBT), and light emitting diodes (LED).

Below, preferred examples of the semiconductor device in which the crystalline oxide film of the present invention is applied to an n-type semiconductor layer (such as an n+ type semiconductor or an n- type semiconductor layer) will be described with reference to the drawings, but the present invention is not limited to these examples.

Figure 3 shows an example of a Schottky barrier diode (SBD) according to an embodiment of the present invention. The SBD in Figure 3 includes an n-type semiconductor layer 101a, an n+ type semiconductor layer 101b, a Schottky electrode 105a, and an ohmic electrode 105b.

The materials for the Schottky electrode and the ohmic electrode may be known electrode materials, and examples of the electrode materials include metals such as Al, Mo, Co, Zr, Sn, Nb, Fe, Cr, Ta, Ti, Au, Pt, V, Mn, Ni, Cu, Hf, W, Ir, Zn, In, Pd, Nd, and Ag, or alloys thereof, conductive metal oxide films such as tin oxide, zinc oxide, rhenium oxide, indium oxide, indium tin oxide (ITO), and indium zinc oxide (IZO), organic conductive compounds such as polyaniline, polythiophene, and polypyrrole, or mixtures and laminates thereof.

The Schottky electrode and the ohmic electrode can be formed by known means such as vacuum deposition or sputtering. More specifically, when forming a Schottky electrode using two of the above metals, a first metal and a second metal, a layer of the first metal and a layer of the second metal are laminated, and the layer of the first metal and the layer of the second metal are patterned using a photolithography technique.

When a reverse bias is applied to the SBD in FIG. 3, a depletion layer (not shown) spreads into the n-type semiconductor layer 101a, resulting in a high-voltage SBD. When a forward bias is applied, electrons flow from the ohmic electrode 105b to the Schottky electrode 105a. In this way, an SBD using the semiconductor structure described above is excellent for high voltage and large current applications, has a fast switching speed, and is excellent in voltage resistance and reliability.

(HEMT)
Fig. 4 shows an example of a high electron mobility transistor (HEMT) according to an embodiment of the present invention. The HEMT in Fig. 4 includes an n-type semiconductor layer 121a having a wide band gap, an n-type semiconductor layer 121b having a narrow band gap, an n+ type semiconductor layer 121c, a semi-insulating layer 124, a buffer layer 128, a gate electrode 125a, a source electrode 125b, and a drain electrode 125c.

(MOSFET)
An example of a case where the semiconductor device of the present invention is a MOSFET is shown in Fig. 5. The MOSFET in Fig. 5 is a trench type MOSFET, and includes an n- type semiconductor layer 131a, n+ type semiconductor layers 131b and 131c, a gate insulating film 134, a gate electrode 135a, a source electrode 135b, and a drain electrode 135c.

(JFET)
FIG. 6 shows a preferred example of a junction field effect transistor (JFET) including an n-type semiconductor layer 141a, a first n+ type semiconductor layer 141b, a second n+ type semiconductor layer 141c, a gate electrode 145a, a source electrode 145b and a drain electrode 145c.

(IGBT)
FIG. 7 shows a preferred example of an insulated gate bipolar transistor (IGBT) including an n-type semiconductor layer 151, an n-type semiconductor layer 151a, an n+ type semiconductor layer 151b, a p-type semiconductor layer 152, a gate insulating film 154, a gate electrode 155a, an emitter electrode 155b, and a collector electrode 155c.

(LED)
An example of the semiconductor device of the present invention being a light emitting diode (LED) is shown in Fig. 8. The semiconductor light emitting device in Fig. 8 includes an n-type semiconductor layer 161 on a second electrode 165b, and a light emitting layer 163 is laminated on the n-type semiconductor layer 161. A p-type semiconductor layer 162 is laminated on the light emitting layer 163. A light-transmitting electrode 167 that transmits light generated by the light emitting layer 163 is provided on the p-type semiconductor layer 162, and a first electrode 165a is laminated on the light-transmitting electrode 167. The semiconductor light emitting device in Fig. 8 may be covered with a protective layer except for the electrode portion.

The material of the transparent electrode may be a conductive material of an oxide containing indium (In ₎ or titanium ₍ Ti). More specifically, for example, _In2O3 , ZnO, SnO2, _Ga2O3 , _TiO2 , _CeO2 , or _a mixed crystal of two or more of these, or a doped material thereof may be used. The transparent electrode can be formed by providing these materials by a known means such as sputtering. After the transparent electrode is formed, thermal annealing may be performed to make the transparent electrode transparent.

In the semiconductor light-emitting device of FIG. 8, the first electrode 165a is a positive electrode and the second electrode 165b is a negative electrode, and current is passed through the first electrode 165a to the p-type semiconductor layer 162, the light-emitting layer 163, and the n-type semiconductor layer 161, causing the light-emitting layer 163 to emit light.

Examples of materials for the first electrode 165a and the second electrode 165b include metals such as Al, Mo, Co, Zr, Sn, Nb, Fe, Cr, Ta, Ti, Au, Pt, V, Mn, Ni, Cu, Hf, W, Ir, Zn, In, Pd, Nd, or Ag, or alloys thereof; metal oxide conductive films such as tin oxide, zinc oxide, rhenium oxide, indium oxide, indium tin oxide (ITO), or indium zinc oxide (IZO); organic conductive compounds such as polyaniline, polythiophene, or polypyrrole, or mixtures thereof. The method for forming the electrode film is not particularly limited, and the electrode can be formed on the substrate according to a method appropriately selected from wet methods such as printing, spraying, and coating, physical methods such as vacuum deposition, sputtering, and ion plating, and chemical methods such as CVD and plasma CVD, taking into consideration the suitability of the material.

Another embodiment of the light-emitting element is shown in FIG. 9. In the light-emitting element of FIG. 9, an n-type semiconductor layer 161 is laminated on a substrate 169, and a second electrode 165b is laminated on a part of the semiconductor layer exposed surface of the n-type semiconductor layer 161 that is exposed by cutting out a part of the p-type semiconductor layer 162, the light-emitting layer 163, and the n-type semiconductor layer 161.

Figure 10 shows a junction barrier Schottky diode (JBS) which is one of the preferred embodiments of the present invention. The semiconductor device of Figure 10 includes a semiconductor region (semiconductor layer) 3, a barrier electrode 2 which is provided on the semiconductor region and capable of forming a Schottky barrier between the semiconductor region, and a barrier height adjustment layer which is provided between the barrier electrode 2 and the semiconductor region 3 and capable of forming a Schottky barrier with a barrier height greater than the barrier height of the Schottky barrier of the barrier electrode 2 between the semiconductor region 3. The barrier height adjustment layer 1 is embedded in the semiconductor region 3. In an embodiment of the present invention, it is preferable that the barrier height adjustment layers are provided at regular intervals, and it is more preferable that the barrier height adjustment regions are provided between both ends of the barrier electrode and the semiconductor region. With this preferred embodiment, the JBS is configured to have better thermal stability and adhesion, a greater reduction in leakage current, and better semiconductor characteristics such as voltage resistance. The semiconductor device of Figure 10 is provided with an ohmic electrode 4 on the semiconductor region 3.

The means for forming each layer of the semiconductor device in FIG. 10 is not particularly limited as long as it does not impede the object of the present invention, and may be any known means. For example, a film may be formed by vacuum deposition, CVD, sputtering, various coating techniques, etc., and then patterned by photolithography, or directly patterned using printing techniques, etc.

Figure 11 shows a junction barrier Schottky diode (JBS) which is one of the preferred embodiments of the present invention. The semiconductor device in Figure 11 differs from the semiconductor device in Figure 10 in that a guard ring 5 is provided on the outer periphery of the barrier electrode. This configuration makes it possible to obtain a semiconductor device with better semiconductor characteristics such as breakdown voltage. In this embodiment of the present invention, the breakdown voltage can be improved more effectively by embedding a part of the guard ring 5 in the surface of the semiconductor region (semiconductor layer) 3. Furthermore, by using a metal with a high barrier height for the guard ring, the guard ring can be provided industrially advantageously together with the formation of the barrier electrode, and can be formed without significantly affecting the semiconductor region or deteriorating the on-resistance.

The guard ring is usually made of a material with a high barrier height. Examples of materials used for the guard ring include conductive materials with a barrier height of 1 eV or more, which may be the same as the electrode material. The shape of the guard ring is not particularly limited, and examples include a square shape, a circular shape, a U-shape, an L-shape, and a strip shape. The number of guard rings is also not particularly limited, but is preferably three or more, and more preferably six or more.

(MOSFET)
12 shows a preferred example of a metal oxide semiconductor field effect transistor (MOSFET) including an n-type semiconductor layer 131a, a first n+ type semiconductor layer 131b, a second n+ type semiconductor layer 131c, a p-type semiconductor layer 132, a p+ type semiconductor layer 132a, a gate insulating film 134, a gate electrode 135a, a source electrode 135b, and a drain electrode 135c. The p+ type semiconductor layer 132a may be a p-type semiconductor layer or may be the same as the p-type semiconductor layer 132. The p-type semiconductor may be made of the same material as the n-type semiconductor and may contain a p-type dopant, or may be a different p-type semiconductor.

The crystalline oxide film or semiconductor device of the present invention described above can be applied to power conversion devices such as inverters and converters to exert the above-mentioned functions. More specifically, it can be applied as a diode built into an inverter or converter, a thyristor as a switching element, a power transistor, an IGBT (Insulated Gate Bipolar Transistor), a MOSFET (Metal-Oxide-Semiconductor Field Effect Transistor), etc. FIG. 13 is a block diagram showing an example of a control system using a semiconductor device according to an embodiment of the present invention, and FIG. 14 is a circuit diagram of the same control system, which is particularly suitable for installation in an electric vehicle.

As shown in FIG. 13, the control system 500 has a battery (power source) 501, a boost converter 502, a step-down converter 503, an inverter 504, a motor (drive object) 505, and a drive control unit 506, which are mounted on an electric vehicle. The battery 501 is, for example, a storage battery such as a nickel-metal hydride battery or a lithium-ion battery, and can store power by charging at a power supply station or by regenerative energy during deceleration, and can output a DC voltage required for the operation of the electric vehicle's driving system and electrical system. The boost converter 502 is, for example, a voltage conversion device equipped with a chopper circuit, and can boost a DC voltage of, for example, 200 V supplied from the battery 501 to, for example, 650 V by the switching operation of the chopper circuit, and output it to the driving system such as the motor. The step-down converter 503 is also a voltage conversion device equipped with a chopper circuit, but by stepping down the DC voltage of, for example, 200 V supplied from the battery 501 to, for example, about 12 V, it can output the voltage to the electrical system, including the power windows, power steering, and on-board electrical equipment.

The inverter 504 converts the DC voltage supplied from the boost converter 502 into a three-phase AC voltage by switching operation and outputs it to the motor 505. The motor 505 is a three-phase AC motor that constitutes the driving system of the electric vehicle, and is driven to rotate by the three-phase AC voltage output from the inverter 504, and transmits the rotational driving force to the wheels of the electric vehicle via a transmission (not shown) or the like.

On the other hand, various sensors (not shown) are used to measure actual values such as the number of rotations of the wheels, torque, and the amount of depression of the accelerator pedal (acceleration amount) from the electric vehicle while it is running, and these measurement signals are input to the drive control unit 506. At the same time, the output voltage value of the inverter 504 is also input to the drive control unit 506. The drive control unit 506 has the function of a controller equipped with a calculation unit such as a CPU (Central Processing Unit) and a data storage unit such as a memory, and uses the input measurement signal to generate a control signal and output it as a feedback signal to the inverter 504, thereby controlling the switching operation by the switching element. As a result, the AC voltage provided by the inverter 504 to the motor 505 is instantly corrected, allowing the driving control of the electric vehicle to be accurately performed, thereby realizing safe and comfortable operation of the electric vehicle. It is also possible to control the output voltage to the inverter 504 by providing a feedback signal from the drive control unit 506 to the boost converter 502.

Figure 14 shows the circuit configuration of Figure 13 excluding the step-down converter 503, that is, the circuit configuration showing only the configuration for driving the motor 505. As shown in the figure, the semiconductor device of the present invention is used for switching control by being adopted as, for example, a Schottky barrier diode in the step-up converter 502 and the inverter 504. In the step-up converter 502, it is incorporated in a chopper circuit to perform chopper control, and in the inverter 504, it is incorporated in a switching circuit including an IGBT to perform switching control. In addition, the current is stabilized by interposing an inductor (such as a coil) in the output of the battery 501, and the voltage is stabilized by interposing a capacitor (such as an electrolytic capacitor) between the battery 501, the step-up converter 502, and the inverter 504.

As shown by the dotted lines in FIG. 14, the drive control unit 506 includes a calculation unit 507 consisting of a CPU (Central Processing Unit) and a storage unit 508 consisting of a non-volatile memory. The signal input to the drive control unit 506 is given to the calculation unit 507, which performs the necessary calculations to generate feedback signals for each semiconductor element. The storage unit 508 also temporarily holds the results of calculations performed by the calculation unit 507, and accumulates physical constants and functions required for drive control in the form of a table and outputs them to the calculation unit 507 as appropriate. The calculation unit 507 and storage unit 508 can be configured as known in the art, and their processing capabilities can be selected as desired.

As shown in FIG. 13 and FIG. 14, in the control system 500, a diode or a switching element such as a thyristor, a power transistor, an IGBT, or a MOSFET is used for the switching operation of the boost converter 502, the buck converter 503, and the inverter 504. The switching characteristics are significantly improved by using gallium oxide (Ga ₂ O ₃ ), particularly corundum-type gallium oxide (α-Ga ₂ O ₃ ), as the material for these semiconductor elements. Furthermore, by applying the semiconductor device according to the present invention, extremely good switching characteristics can be expected, and further miniaturization and cost reduction of the control system 500 can be realized. That is, the boost converter 502, the buck converter 503, and the inverter 504 can each be expected to have the effect of the present invention, and the effect of the present invention can be expected in any one of them, any combination of two or more of them, or in any form including the drive control unit 506.
The above-mentioned control system 500 can be applied not only to the control system of an electric vehicle using the semiconductor device of the present invention, but also to control systems for various purposes such as stepping up/down the power from a DC power source, converting DC to AC, etc. Also, a power source such as a solar cell can be used as the battery.

Figure 15 is a block diagram showing another example of a control system that employs a semiconductor device according to an embodiment of the present invention, and Figure 16 is a circuit diagram of the same control system, which is suitable for installation in infrastructure equipment and home appliances that operate on power from an AC power source.

As shown in FIG. 15, the control system 600 receives power from an external three-phase AC power source (power source) 601, and includes an AC/DC converter 602, an inverter 604, a motor (drive object) 605, and a drive control unit 606, which can be mounted on various devices (described later). The three-phase AC power source 601 is, for example, a power generation facility (thermal power plant, hydroelectric power plant, geothermal power plant, nuclear power plant, etc.) of a power company, and its output is stepped down and supplied as an AC voltage via a substation. It is also installed in a building or a nearby facility in the form of a private generator, for example, and supplied with power via a power cable. The AC/DC converter 602 is a voltage conversion device that converts AC voltage to DC voltage, and converts the AC voltage of 100V or 200V supplied from the three-phase AC power source 601 into a specified DC voltage. Specifically, the voltage is converted into a commonly used desired DC voltage, such as 3.3V, 5V, or 12V. If the drive object is a motor, conversion to 12V is performed. It is also possible to use a single-phase AC power supply instead of a three-phase AC power supply, in which case the same system configuration can be achieved by using a single-phase input AC/DC converter.

The inverter 604 converts the DC voltage supplied from the AC/DC converter 602 into a three-phase AC voltage by switching operation and outputs it to the motor 605. The form of the motor 604 varies depending on the controlled object, but if the controlled object is a train, it is a three-phase AC motor for driving wheels, if the controlled object is a factory equipment, it is a pump or various power sources, and if the controlled object is a home appliance, it is a three-phase AC motor for driving a compressor, etc., and is driven to rotate by the three-phase AC voltage output from the inverter 604, and transmits the rotational driving force to the driven object (not shown).

For example, in home appliances, there are many objects to be driven that can be supplied with the DC voltage output from the AC/DC converter 302 as is (for example, personal computers, LED lighting equipment, video equipment, audio equipment, etc.), in which case the inverter 604 is not required in the control system 600, and as shown in FIG. 15, the DC voltage is supplied from the AC/DC converter 602 to the object to be driven. In this case, for example, a personal computer is supplied with a DC voltage of 3.3 V, and an LED lighting device is supplied with a DC voltage of 5 V.

Meanwhile, various sensors (not shown) are used to measure actual values such as the rotation speed and torque of the driven object, or the temperature and flow rate of the surrounding environment of the driven object, and these measurement signals are input to the drive control unit 606. At the same time, the output voltage value of the inverter 604 is also input to the drive control unit 606. Based on these measurement signals, the drive control unit 606 provides a feedback signal to the inverter 604 to control the switching operation of the switching element. This allows the AC voltage provided by the inverter 604 to be instantly corrected, allowing accurate operation control of the driven object and achieving stable operation of the driven object. Also, as mentioned above, when the driven object can be driven by a DC voltage, it is also possible to feedback control the AC/DC converter 602 instead of feedback to the inverter.

Figure 16 shows the circuit configuration of Figure 15. As shown in the figure, the semiconductor device of the present invention is used as, for example, a Schottky barrier diode in an AC/DC converter 602 and an inverter 604 to perform switching control. The AC/DC converter 602 uses, for example, a Schottky barrier diode configured in a bridge circuit, and performs DC conversion by converting and rectifying the negative voltage of the input voltage into a positive voltage. In the inverter 604, the semiconductor device is incorporated into a switching circuit in an IGBT to perform switching control. Note that the current is stabilized by interposing an inductor (such as a coil) between the three-phase AC power source 601 and the AC/DC converter 602, and the voltage is stabilized by interposing a capacitor (such as an electrolytic capacitor) between the AC/DC converter 602 and the inverter 604.

As shown by the dotted line in FIG. 16, the drive control unit 606 includes a calculation unit 607 consisting of a CPU and a storage unit 608 consisting of a non-volatile memory. The signal input to the drive control unit 606 is given to the calculation unit 607, which performs the necessary calculations to generate feedback signals for each semiconductor element. The storage unit 608 also temporarily holds the results of calculations performed by the calculation unit 607, and accumulates physical constants and functions required for drive control in the form of a table and outputs them to the calculation unit 607 as appropriate. The calculation unit 607 and storage unit 608 can be configured as known in the art, and their processing capabilities can be selected as desired.

In this control system 600, as in the control system 500 shown in FIG. 13 and FIG. 14, diodes and switching elements such as thyristors, power transistors, IGBTs, and MOSFETs are used for the rectification and switching operations of the AC/DC converter 602 and the inverter 604. The switching characteristics are improved by using gallium oxide (Ga ₂ O ₃ ), particularly corundum-type gallium oxide (α-Ga ₂ O ₃ ), as the material for these semiconductor elements. Furthermore, by applying the semiconductor film and semiconductor device according to the present invention, extremely good switching characteristics can be expected, and further miniaturization and cost reduction of the control system 600 can be realized. That is, the effects of the present invention can be expected for each of the AC/DC converter 602 and the inverter 604, and the effects of the present invention can be expected for any one of them, a combination of them, or a form including the drive control unit 606.

Note that while a motor 605 is shown as an example of a driven object in Figures 15 and 16, the driven object is not necessarily limited to mechanically operated objects, and can be many devices that require AC voltage. The control system 600 can be applied as long as it inputs power from an AC power source to drive the driven object, and can be installed for drive control of equipment such as infrastructure equipment (e.g., power equipment in buildings and factories, communication equipment, traffic control equipment, water and sewage treatment equipment, system equipment, labor-saving equipment, trains, etc.) and home appliances (e.g., refrigerators, washing machines, personal computers, LED lighting equipment, video equipment, audio equipment, etc.).

Example 1
1. Film Forming Apparatus In this example, a film forming apparatus 19 shown in FIG.

2. Preparation of a raw material solution 10% by volume of hydrobromic acid (HBr) was added to a 0.1 M aqueous solution of gallium bromide (GaBr ₃ ) to prepare a raw material solution.

3. Preparation for film formation The raw material solution 24a obtained in 2 above was accommodated in the mist generating source 24. Next, a sapphire substrate having a buffer layer laminated on its surface and a surface inclined 3° from the m-plane in the c-axis direction as its main surface was used as the substrate 20, which was placed on the hot plate 28, and the hot plate 28 was operated to raise the substrate temperature to 630°C. Next, the flow rate control valves 23a and 23b were opened to supply carrier gas from the carrier gas supply means 22a and 22b, which are the carrier gas sources, into the film formation chamber 30, and the atmosphere in the film formation chamber 30 was sufficiently replaced with the carrier gas, after which the flow rate of the carrier gas was adjusted to 0.6 L/min. Nitrogen was used as the carrier gas.

4. Film formation Next, the ultrasonic vibrator 26 was vibrated at 2.4 MHz, and the vibration was propagated to the raw material solution 24a through the water 25a, thereby atomizing the raw material solution 24a to generate mist (atomized droplets) 24b. This mist 24b was introduced into the film formation chamber 30 through the supply pipe 27 by the carrier gas, and the mist thermally reacted on the substrate 20 at 630°C under atmospheric pressure to form a film on the substrate 20. The film formation time was 1 hour. The obtained film was identified using an X-ray diffraction device to be an α-Ga ₂ O ₃ single crystal film.

(Examples 2 to 9)
As Examples 2 to 9, crystalline oxide films were obtained in the same manner as in Example 1, except that the films were formed under the conditions shown in Table 1. The obtained films were identified using an X-ray diffraction device and were all α-Ga ₂ O ₃ single crystal films.

(Comparative Examples 1 to 6)
As Comparative Examples 1 to 6, crystalline oxide films were obtained in the same manner as in Example 1, except that the films were formed under the conditions shown in Table 2. The obtained films were identified using an X-ray diffraction device and were all α-Ga ₂ O ₃ single crystal films.

(evaluation)
The crystalline oxide films obtained in Examples 1 to 9 and Comparative Examples 1 to 6 were examined for film thickness, warpage, and the presence or absence of cracks. The results are shown in Table 3. The warpage was measured using a surface profile measuring system DYVOCE (manufactured by Kohzu Seiki Co., Ltd., model number: DY-3000-039). The crack occurrence rate was calculated by dividing the crystalline oxide film into 152 sections and checking the presence or absence of cracks in each section. The warpage measurement results of Examples 2, 5, 8, Comparative Example 2, Comparative Example 5, and Comparative Example 6 are shown in FIG. 17. As is clear from Table 3 and FIG. 17, the examples have more uniform warpage in each crystal axis direction than the comparative example. The absolute value of the warpage of the examples is reduced compared to the comparative example, and even when the film thickness is increased (for example, 5 μm or more, preferably 10 μm or more), the products are substantially free of cracks over an area of at least 2 mm ² or more.

(Examples 10 to 12)
In Examples 10 to 12, crystalline oxide films were obtained in the same manner as in Examples 1 to 3, except that a sapphire substrate with a crystal growth surface inclined 20° from the m-plane toward the c-axis was used as the substrate. The obtained films were identified using an X-ray diffraction device and found to be α-Ga ₂ O ₃ single crystal films. The obtained films were also examined for thickness, warpage, and crack occurrence rate in the same manner as in Examples 1 to 9. The results are shown in Table 4. As is clear from Table 4, the product of this example has a ratio of the warpage in the c-axis direction to the a-axis direction in the range of 0.4 to less than 3, and it can be seen that the warpage in each crystal axis direction is more uniform. In addition, even when the film thickness of the product of this example was increased (for example, 5 μm or more, preferably 10 μm or more), it was substantially free of cracks over an area of at least 2 mm ² or more.

(Examples 13 to 14)
In Examples 13 and 14, crystalline oxide films were obtained in the same manner as in Examples 1 and 2, except that a sapphire substrate with a crystal growth surface inclined at 25° from the m-plane toward the c-axis was used as the substrate. The obtained films were identified using an X-ray diffraction device and found to be α-Ga ₂ O ₃ single crystal films. The obtained films were also examined for thickness, warpage, and crack occurrence rate in the same manner as in Examples 1 to 9. The results are shown in Table 4. As is clear from Table 4, the product of this example has a ratio of the warpage in the c-axis direction to the a-axis direction in the range of 0.4 to less than 3, and it can be seen that the warpage in each crystal axis direction is more uniform. It should be noted that the product of this example was substantially free of cracks over an area of at least 2 mm ² even when the film thickness was increased (for example, 5 μm or more, preferably 10 μm or more).

(Hall effect measurement)
A crystalline oxide film was obtained in the same manner as in Examples 1 to 14, except that doping was performed. The obtained films were identified using an X-ray diffraction device, and all were α-Ga ₂ O ₃ single crystal films. The obtained films were also examined for film thickness, warpage, and crack occurrence rate in the same manner as in Examples 1 to 9, and it was found that warpage and cracks could be suppressed even if the film thickness was increased, as in Examples 1 to 14. The obtained films were also subjected to Hall effect measurement, and it was found that all of the examples had a mobility of 5 cm ² /V·s or more, and had excellent electrical properties. It was also found that the examples with an inclination angle of 3° to 10° were about twice as good in mobility as the examples with an inclination angle of 20° and 25°. From this result, it was found that when a surface inclined at least 3° to 10° toward the c-axis direction from the m-plane is used as the main surface, warpage and cracks can be suppressed while the semiconductor properties can be further improved.

The crystalline oxide film of the present invention can be used in a wide range of fields, including semiconductors (e.g., compound semiconductor electronic devices), electronic and electrical equipment components, optical and electrophotographic devices, and industrial materials, but is particularly useful in semiconductor devices and their components.

1 Barrier height adjustment layer 2 Barrier electrode 3 Semiconductor region (semiconductor layer)
4 Ohmic electrode 5 Guard ring 19 Mist CVD device (film formation device)
20 Substrate 21 Susceptor 22a Carrier gas supply means 22b Carrier gas (dilution) supply means 23a Flow rate control valve 23b Flow rate control valve 24 Mist source 24a Raw material solution 25 Container 25a Water 26 Ultrasonic vibrator 27 Supply pipe 28 Heater 29 Exhaust port 30 Film formation chamber 101a n-type semiconductor layer 101b n+ type semiconductor layer 102 p-type semiconductor layer 103 Semi-insulating layer 104 Insulating layer 105a Schottky electrode 105b Ohmic electrode 121a Wide band gap n-type semiconductor layer 121b Narrow band gap n-type semiconductor layer 121c n+ type semiconductor layer 123 p-type semiconductor layer 124 Semi-insulating layer 125a Gate electrode 125b Source electrode 125c Drain electrode 128 Buffer layer 131a n-type semiconductor layer 131b first n+ type semiconductor layer 131c second n+ type semiconductor layer 132 p type semiconductor layer 132a p+ type semiconductor layer 134 gate insulating film 135a gate electrode 135b source electrode 135c drain electrode 141a n- type semiconductor layer 141b first n+ type semiconductor layer 141c second n+ type semiconductor layer 145a gate electrode 145b source electrode 145c drain electrode 151 n type semiconductor layer 151a n- type semiconductor layer 151b n+ type semiconductor layer 152 p type semiconductor layer 154 gate insulating film 155a gate electrode 155b emitter electrode 155c collector electrode 161 n type semiconductor layer 162 p type semiconductor layer 163 light emitting layer 165a first electrode 165b second electrode 167 light transmitting electrode 169 substrate 500 Control System 501 Battery (power source)
502: step-up converter 503: step-down converter 504: inverter 505: motor (drive object)
506 Drive control unit 507 Calculation unit 508 Storage unit 600 Control system 601 Three-phase AC power supply (power supply)
602 AC/DC converter 604 inverter 605 motor (drive object)
606 Drive control unit 607 Calculation unit 608 Storage unit

Claims (13)

A crystalline oxide film comprising a metal oxide containing gallium, and including at least a first crystal axis and a second crystal axis, wherein a linear expansion coefficient in the first crystal axis direction is smaller than a linear expansion coefficient in the second crystal axis direction, and a main surface is a surface inclined at least in the second crystal axis direction from a surface parallel to the second crystal axis direction, and the angle of inclination is within a range of 3° to 25° . The crystalline oxide film according to claim 1, wherein the metal oxide has a corundum structure. The crystalline oxide film according to claim 1 or 2, wherein the metal oxide contains indium, rhodium or iridium in addition to gallium. The crystalline oxide film according to claim 1 or 2, wherein the metal oxide contains indium and/or aluminum in addition to gallium. The crystalline oxide film according to any one of claims 1 to 4, having a film thickness of 2.5 μm or more. The crystalline oxide film according to any one of claims 1 to 5, which contains a dopant. The crystalline oxide film according to any one of claims 1 to 6, wherein the ratio of the amount of warping in the second crystal axis direction to the amount of warping in the first crystal axis direction is 3 or less. 8. The crystalline oxide film according to claim 1, wherein the inclination angle is within a range of 3° to 10°. 9. The crystalline oxide film according to claim 1, which has a corundum structure and has a principal surface which is inclined from an m-plane in at least the second crystal axis direction. 10. The crystalline oxide film according to claim 9 , wherein the second crystal axis direction is the c-axis direction. A semiconductor device comprising at least the crystalline oxide film according to any one of claims 1 to 10 and an electrode. A power conversion device using the semiconductor device according to claim 11 . A control system using the semiconductor device according to claim 11 .