JP7714997B2 - Semiconductor device, power supply device and amplifier using the same, and method for manufacturing the semiconductor device - Google Patents

Description

This disclosure relates to semiconductor devices, power supply devices and amplifiers using the same, and methods for manufacturing semiconductor devices.

Nitride semiconductors have characteristics such as a high saturation electron velocity and a wide band gap, and are expected to be applied to high-voltage, high-power semiconductor devices. For example, the band gap of gallium nitride (GaN) is 3.4 eV, which is larger than the band gap of silicon (Si) (1.1 eV) and the band gap of gallium arsenide (GaAs) (1.4 eV), and it has a high breakdown field strength. GaN is considered a promising material for semiconductor devices that operate at high voltages and for semiconductor devices used in power supplies that obtain high power output.

Many reports have been published on high electron mobility transistors (HEMTs) as nitride semiconductor devices. GaN-based HEMTs (hereafter referred to as "GaN-HEMTs") can be used at high current densities and high voltages, enabling high-power operation. However, high-power operation also increases power consumption within the semiconductor, resulting in increased heat generation within the GaN-HEMT. For high-power operation, low electrical resistance is desirable for GaN-HEMTs, but the electron mobility that contributes to reducing electrical resistance decreases as the temperature within the GaN-HEMT increases.

To solve the problem of heat generation in GaN-HEMTs, the use of diamond, which has high thermal conductivity, as a heat dissipation material has been investigated. Single-crystal diamond, in particular, has high thermal conductivity, and single crystals of nitride semiconductors such as GaN and aluminum nitride (AlN) can be heteroepitaxially grown on single-crystal diamond. However, producing single-crystal diamond over a large area is difficult and expensive. Therefore, methods have been proposed for growing diamond on a Si substrate or silicon carbide (SiC) (see, for example, Patent Documents 1 and 2).

Special Publication No. 2020-508276 Japanese Patent Application Laid-Open No. 2018-203587

Diamond grown on SiC is essentially polycrystalline diamond. The thermal conductivity of polycrystalline diamond is lower than that of single-crystal diamond, making it difficult to achieve sufficient heat dissipation. One aspect of the present invention provides a semiconductor device with improved heat dissipation, and a method for manufacturing the same.

In one embodiment, a semiconductor device includes a cubic SiC layer, a nitride semiconductor layer provided on a first surface of the SiC layer, and a diamond layer provided on a second surface of the SiC layer opposite to the first surface;
The crystal axis of the diamond layer is oriented within 10° from the <111> direction.

A semiconductor device with improved heat dissipation efficiency and a manufacturing method for the same have been realized.

FIG. 1 is a schematic diagram of a semiconductor device employing a conventional heat dissipation structure. 1 is a schematic diagram of a semiconductor device according to an embodiment; 10A and 10B are diagrams illustrating a heat distribution of the semiconductor device according to the embodiment in comparison with a semiconductor device having a conventional heat dissipation structure. 10 is a diagram showing voltage-current characteristics of the semiconductor device according to the embodiment in comparison with a semiconductor device having a conventional heat dissipation structure and a semiconductor device without a heat dissipation structure; 1 is an atomic force microscope image of an interface between SiC and a nitride semiconductor layer of a semiconductor device according to an embodiment. 1 is an AFM image of an interface between SiC and diamond in a semiconductor device according to an embodiment. 1 is an X-ray diffraction pattern of a diamond layer of a semiconductor device according to an embodiment. 1A to 1C are diagrams illustrating a manufacturing process of a semiconductor device according to an embodiment. 1A to 1C are diagrams illustrating a manufacturing process of a semiconductor device according to an embodiment. 1A to 1C are diagrams illustrating a manufacturing process of a semiconductor device according to an embodiment. 1A to 1C are diagrams illustrating a manufacturing process of a semiconductor device according to an embodiment. 1A to 1C are diagrams illustrating a manufacturing process of a semiconductor device according to an embodiment. 1A to 1C are diagrams illustrating a manufacturing process of a semiconductor device according to an embodiment. 1A and 1B are schematic diagrams illustrating a first application example of the semiconductor device according to the embodiment; 10A and 10B are schematic diagrams illustrating a second application example of the semiconductor device according to the embodiment. 10A and 10B are schematic diagrams illustrating a third application example of the semiconductor device according to the embodiment. 10A and 10B are schematic diagrams illustrating a fourth application example of the semiconductor device according to the embodiment.

In this embodiment, we provide a configuration and manufacturing method for improving the heat dissipation effect of a semiconductor device, achieving high output and high breakdown voltage. As an example, we provide a structure and manufacturing method for a GaN-HEMT structure that suppresses heat generation during transistor operation.

Before explaining the specific configuration of the semiconductor device of this embodiment, we will explain in more detail the problems with GaN-HMETs that use conventional heat dissipation structures.

Figure 1 is a schematic diagram of a GaN-HEMT that employs a conventional heat dissipation structure. As mentioned above, large-area single-crystal diamond is difficult to manufacture and increases costs, so it has been proposed to grow a diamond layer on SiC. Because it is difficult to grow a diamond layer directly on a GaN layer, diamond is grown via a SiC layer, as shown in Figure 1.

Specifically, a SiC layer is formed on a silicon substrate. When SiC is formed on a silicon substrate, most of its crystal structure is 3C-SiC, that is, a cubic crystal with a periodicity of three atomic positions. A GaN layer and an aluminum gallium nitride (AlGaN) layer are formed in that order on the 3C-SiC layer.

Because the silicon substrate has low thermal conductivity, it is removed after the GaN and AlGaN layers are formed. Growing a diamond layer on the exposed SiC layer typically results in polycrystalline diamond. This is because there are large differences in lattice constant and free energy between SiC and diamond, making it difficult to grow single-crystal diamond on SiC. Even if a GaN-HEMT structure including a source electrode (S), drain electrode (D), and gate electrode (G) is subsequently fabricated, sufficient heat dissipation is not achieved. This is because the thermal conductivity of polycrystalline diamond is low, at 15 W/m·K or less, compared to single-crystal diamond, which has a thermal conductivity of 20 W/m·K or more.

In one embodiment, highly oriented diamond is grown on one surface of the SiC to enhance heat dissipation. In this specification and claims, the term "highly oriented" diamond refers to diamond in which the diamond crystals grow in approximately the same orientation, even if the individual diamond particles are slightly rotated or tilted, and which exhibits physical properties close to or equivalent to those of a single crystal.

Highly oriented diamonds can be grown by roughening the surface of the SiC on which the diamond is grown. This is because diamond nuclei are more likely to form on a rough SiC surface, and diamonds can grow epitaxially in roughly the same direction from the nuclei.

As a result of research conducted by the inventors, it was found that highly oriented diamond can be obtained by making the surface roughness of the SiC, which serves as the diamond growth surface, greater than the surface roughness of the SiC surface on which the GaN-HEMT structure is formed by a certain degree. Highly oriented diamond has fewer grain boundaries that hinder heat dissipation than polycrystalline diamond, and therefore can achieve higher thermal conductivity than polycrystalline diamond.

Figure 2 is a schematic diagram of a semiconductor device 10 according to an embodiment. In the following description, the same components are designated by the same reference numerals, and redundant description may be omitted. The semiconductor device 10 includes a 3C-SiC layer 13, one or more nitride semiconductor layers provided on one surface 13a of the 3C-SiC layer 13, and a highly oriented diamond layer 25 provided on the other surface 13b of the 3C-SiC layer 13. The one or more nitride semiconductor layers provided on the opposite side of the 3C-SiC layer 13 from the highly oriented diamond layer 25 include, for example, a buffer layer 14, a GaN layer 15, and an AlGaN layer 17. While the buffer layer 14 is not essential, inserting the buffer layer 14 alleviates the lattice mismatch between the 3C-SiC layer 13 and the GaN layer 15.

Near the interface between the GaN layer 15 and the AlGaN layer 17, the junction between the different nitride semiconductor materials forms a region within the GaN layer 15 where highly mobile free electrons spread out in layers. This layer of free electrons is called two-dimensional electron gas (2DEG) 16. GaN is a material with spontaneous polarization in the c-axis direction, and the piezoelectric polarization effect associated with lattice distortion induces positive charges at the interface, generating a high concentration of 2DEG in the GaN layer 15.

By providing a gate electrode 21, source electrode 22, and drain electrode 23 on the stack of buffer layer 14, GaN layer 15, and AlGaN layer 17, a GaN-HEMT with a transistor structure having high electron mobility is obtained. The 2DEG 16 is used as the channel charge of the GaN-HEMT. The AlGaN layer 17 acts as an electron supply layer, and the GaN layer 15 acts as an electron transit layer.

A highly oriented diamond layer 25 is provided on the other surface 13b of the 3C-SiC layer 13. Both 3C-SiC and diamond have a zinc blende structure. Compared to other SiC polytypes (4H-SiC, 6H-SiC, etc.), diamond layers grow epitaxially more easily on 3C-SiC. In this embodiment, by providing a highly oriented diamond layer 25 on the roughened surface 13b, heat dissipation efficiency is improved compared to conventional heat dissipation structures using polycrystalline diamond. As will be described in more detail below, by making the surface roughness of the other surface 13b, which serves as the diamond growth surface, greater than the surface roughness of one surface 13a of the 3C-SiC layer 13, diamond growth is promoted, resulting in a large-area, highly oriented diamond layer 25.

Figure 3 shows the heat distribution of the semiconductor device 10 formed in the embodiment, compared with the heat distribution of a conventional structure. The structure of the embodiment and the conventional structure have the same configuration, except for whether highly oriented diamond or polycrystalline diamond is used.

For the calculations, the thickness of the AlGaN layer 17 is set to 16 nm, the thickness of the GaN layer 15 to 300 nm, the buffer layer 14 to a 65 nm AlGaN layer, and the thickness of the 3C-SiC layer 13 to 2 μm. The thicknesses of the highly oriented diamond layer 25 and the polycrystalline diamond layer are both set to 100 μm. The thermal conductivity of each layer is set to 2 W/m·K for the GaN layer 15 and 4.9 W/m·K for the 3C-SiC layer 13. The thermal conductivity of the AlGaN layer 17 follows Vegard's law. The thermal conductivity of the highly oriented diamond layer 25 is set to 20 W/m·K, and that of the polycrystalline diamond is set to 15 W/m·K. A 140 nm thick SiN passivation film is assumed on the device surface on the HEMT side, and a 300 K thermal contact for heat dissipation is assumed on the bottom surface of the diamond layer.

In the heat distribution (A) of the structure of the embodiment using highly oriented diamond, the temperature gradually increases from the HEMT to the SiC to the highly oriented diamond, indicating that the heat generated by the operation of the HEMT is efficiently dissipated. In contrast, in the heat distribution (B) of the conventional structure using polycrystalline diamond, the temperature inside the HEMT increases, indicating a decrease in heat dissipation efficiency.

Figure 4 shows the voltage-current characteristics (line A) of the semiconductor device 10 of the embodiment. The horizontal axis represents the gate-source voltage (Vgs), and the vertical axis represents the drain current density. For comparison, the voltage-current characteristics (line B) of a semiconductor device with a conventional heat dissipation structure and the voltage-current characteristics (line C) of a semiconductor device without a heat dissipation structure are shown. Compared to the semiconductor device without a heat dissipation structure (line C), the drain current density increases when using the polycrystalline diamond heat dissipation structure (line B). The drain current density further increases when using the highly oriented diamond of the embodiment (line A), demonstrating an enhanced heat dissipation effect. The heat dissipation effect suppresses temperature rise in the HEMT, thereby maintaining high electron mobility.

Figure 5 is an AFM image of the interface between the 3C-SiC layer 13 and the nitride semiconductor layer of the semiconductor device 10 of this embodiment, and Figure 6 is an AFM image of the interface between the 3C-SiC layer 13 and the highly oriented diamond layer 25 of the semiconductor device 10 of this embodiment. The buffer layer 14 of Figure 2 is omitted from the sample used for AFM observation.

Figure 5 shows the surface condition of a 3C-SiC (111) surface formed on a Si (111) substrate. This 3C-SiC (111) surface becomes one surface 13a of the 3C-SiC layer 13 in Figure 2. The average amplitude in the height direction (root-mean-square roughness) calculated from the change in the AFM probe position is 4.2 nm.

Figure 6 shows the surface condition of the interface between the other surface 13b of the 3C-SiC layer 13 (see Figure 2) and a highly oriented diamond layer 25. After removing the Si(111) substrate, diamond is grown on the exposed surface 13b of the 3C-SiC layer. The root-mean-square roughness of the 3C-SiC layer 13 at this interface is 8.5 nm. Compared to Figure 5, the surface roughness in Figure 6 is more than twice as high. Diamond nuclei 27 are present on the surface of the 3C-SiC layer, which has a high degree of surface roughness. These diamond nuclei 27 have an orientation distribution of 10° or less, preferably 7.5° or less, and more preferably 2° or less from the <111> direction. The crystallographic axis of the diamond grown from the diamond nuclei 27 is oriented within a range of 10° or less, preferably 7.5° or less, and more preferably 2° or less from the <111> direction. This results in a highly oriented diamond layer 25.

Figure 7 shows the X-ray diffraction pattern of the diamond layer used in the semiconductor device 10 of this embodiment. X-rays were irradiated onto the surface of the diamond layer of the prepared sample, and the intensity of the reflected light in the <111> direction from the diamond layer was measured using the rocking curve method. The full width at half maximum of this X-ray diffraction pattern is 7.3°. The diffraction pattern obtained using the rocking curve method is also called an X-ray rocking curve, and its full width at half maximum indicates the degree of crystal orientation.

Diamond is epitaxially grown on the other surface 13b of the 3C-SiC layer 13, which has a greater surface roughness than the other surface 13a on which the GAN-HEMT is formed. Increasing the surface roughness of the other surface 13b of the 3C-SiC layer 13 increases the free energy of surface 13b, bringing it closer to the free energy of diamond. This makes it easier for diamond nuclei 27 to form on the roughened surface of the 3C-SiC.

Figures 5 to 7 show that increasing the roughness of the opposite surface 13b of the 3C-SiC layer 13 compared to the HEMT-side surface 13a improves the orientation of the diamond layer epitaxially grown on surface 13b. Preferably, by making the roughness of surface 13b on the diamond growth side at least twice the roughness of surface 13a on the HEMT side, the full width at half maximum of the X-ray rocking curve can be reduced to 10° or less, preferably 7.5° or less, and more preferably 2° or less. Highly oriented diamond has fewer grain boundaries that hinder heat dissipation, resulting in higher thermal conductivity than polycrystalline diamond.

Figures 8A to 8F are manufacturing process diagrams of a semiconductor device 10 according to an embodiment. In Figure 8A, a 3C-SiC layer 13 is formed on a substrate 11. The substrate 11 is a Si (111) substrate. After carbonization treatment is performed on the substrate 11 using a low-pressure chemical vapor deposition apparatus, SiC is grown. This forms a 3C-SiC layer 13 with a (111) plane on the Si (111) substrate.

8B, a buffer layer 14, a GaN layer 15, and an AlGaN layer 17 are formed in this order using metalorganic vapor phase epitaxy (MOVPE). The buffer layer 14 may be, for example, a stack of an AlN layer 141 having a thickness of 100 nm and an AlGaN layer 142 having a thickness of 60 nm. The AlGaN layer 142 may be formed by sequentially depositing a 50 nm thick Al _y Ga _1-y N (0.20≦y≦0.40) layer on a 10 nm thick Al _x Ga 1- _x N (0.80≦x≦0.95). Alternatively, the buffer layer 14 may be made of In _a Al _b GaN _1-a-b , which is easily lattice-matched.

The thickness of the GaN layer 15 is about 200 to 300 nm, and when the GaN-HEMT operates, a 2DEG channel with a thickness of about 20 nm is formed near the interface with the AlGaN layer 17. The composition of the AlGaN layer 17 is, for example, Al _z Ga _1-z N (0.10≦z≦1.00).

In forming the buffer layer 14, the GaN layer 15, and the AlGaN layer 17 by MOVPE, a mixed gas of, for example, triethylboron (TEB) gas, trimethylaluminum (TMAl) gas, trimethylgallium (TMGa) gas, and ammonia (NH ₃ ) gas is used as the source gas, and hydrogen (H ₂ ) gas is used as the carrier gas. The supply or non-supply of TEB gas, TMAl gas, and TMGa gas, or their flow rates, are appropriately set depending on the nitride semiconductor layer to be formed. The growth pressure is set to approximately 1 kPa to 100 kPa, and the growth temperature is set to approximately 700°C to 1500°C.

In Figure 8C, the substrate 11 is removed. The stacked body produced in Figure 8B is immersed in 30% diluted fluorine dissolving solution to selectively dissolve the Si substrate 11.

In Figure 8D, the exposed surface of the 3C-SiC layer 13 is roughened. The exposed surface of the 3C-SiC layer 13 corresponds to the other surface 13b of the 3C-SiC layer 13 in Figure 2. The surface roughening of the 3C-SiC layer 13 is performed, for example, by plasma CVD treatment in hydrogen and methane gas at 750 to 850°C for 1 to 60 minutes. The ratio of hydrogen gas to methane gas is between 90%:10% and 99%:1%. At this time, a negative bias voltage is applied to the wafer side. Hydrocarbons in the plasma are accelerated by the negative bias voltage and collide with the exposed surface of the 3C-SiC layer. This increases the unevenness of the exposed surface of the 3C-SiC layer 13, forming protrusions 131.

In Figure 8E, diamond nuclei 27 are formed on the protrusions 131 of the 3C-SiC layer 13 during the plasma CVD process described above. The orientation distribution of the diamond nuclei 27 from the <111> direction of the 3C-SiC layer 13 is 10° or less, preferably 7.5° or less, and more preferably 2° or less.

In Figure 8F, the bias voltage to the wafer is turned off, and a diamond layer 25 is grown to approximately 100 μm from the diamond nuclei 27. The crystallographic axis of the diamond layer 25 is aligned within 10°, preferably within 7.5°, and more preferably within 2° from the <111> direction, reducing the number of grain boundaries.

Electrodes are then formed on the nitride semiconductor stack. Inter-element isolation is formed in the inter-element isolation region on the surface of the AlGaN layer 17 using photolithography and dry etching, or photolithography and ion implantation. Next, a mask pattern with openings in the areas where the source and drain electrodes will be formed is formed using photolithography, and portions of the AlGaN layer 17 are removed using dry etching using a chlorine-based gas. Next, photolithography and vapor deposition and lift-off techniques are used to form source and drain electrodes 22 and 23 (see Figure 2), each consisting of a 20-nm thick Ta layer and a 200-nm thick Al layer stacked in that order. Furthermore, heat treatment is performed in a nitrogen atmosphere at a temperature range of 400°C to 1000°C, for example at 550°C, to establish ohmic characteristics.

Next, a passivation film may be formed over the entire wafer surface. The passivation film is formed to an appropriate thickness using methods such as plasma CVD, atomic layer deposition (ALD), or sputtering. The passivation film is made of oxides, nitrides, or oxynitrides of elements such as Si, Al, Hf, Ar, Ti, Ta, and W. As an example, a SiN film with a thickness of 100 to 150 nm may be formed.

Finally, a mask pattern with an opening in the area where the gate electrode will be formed is formed using photolithography, and a portion of the passivation film is removed by dry etching or wet etching. Next, the gate electrode 21 (see Figure 2) is formed using photolithography and vapor deposition and lift-off techniques. The gate electrode 21 is formed, for example, by depositing a 30 nm thick Ni film and a 400 nm thick Au film in that order. This completes the production of the semiconductor device 10 shown in Figure 2.

The semiconductor device 10 has a highly oriented diamond layer 25 on the side opposite the GaN-HEMT structure, which improves thermal conductivity and heat dissipation. High electron mobility is maintained during operation of the semiconductor device 10, enabling high-power operation. The semiconductor device 10 is applicable to high-power power amplifiers, power supplies, and the like. Examples of applications of the semiconductor device 10 are shown below.

<Application Example 1>
9 is a plan view schematically illustrating application of the semiconductor device 10 to a semiconductor package 200. The semiconductor package 200 is an example of a discrete package. The semiconductor package 200 includes the semiconductor device 10 having the above-described structure, a lead frame 210 on which the semiconductor device 10 is mounted, and a resin 220 that seals the semiconductor device 10 and the lead frame 210. The semiconductor device 10 is mounted on a die pad 210a of the lead frame 210 using a die attach material or the like.

The semiconductor device 10 is provided with a pad 50a connected to the gate electrode 21 (see FIG. 2), a pad 60a connected to the source electrode 22 (see FIG. 2), and a pad 70a connected to the drain electrode 23 (see FIG. 2). Pads 50a, 60a, and 70a are connected to the gate lead 211, source lead 212, and drain lead 213 of the lead frame 210 using wires 230G, 230S, and 230D, respectively, made of Al or the like. The lead frame 210, the semiconductor device 10, and wires 230G, 230S, and 230D are sealed with resin 220 so that portions of the gate lead 211, source lead 212, and drain lead 213 are exposed.

A highly oriented diamond layer 25 is provided on the bottom side of the semiconductor device 10. Heat emitted during operation of the semiconductor device 10 is transferred from the highly oriented diamond layer 25 to the lead frame 210, and is then dissipated from the lead frame 210 to the outside. This maintains high-power operation of the semiconductor device 10, resulting in a high-performance semiconductor package 200.

<Application Example 2>
10 shows an equivalent circuit of an example of application of the semiconductor device 10 to a power factor correction (PFC) circuit 300. The PFC circuit 300 includes a switch element 310, a diode 320, a choke coil 330, a capacitor 340, a capacitor 350, a diode bridge 360, and an alternating current (AC) power supply 370. The semiconductor device 10 functioning as a HEMT is used as the switch element 310.

The drain electrode of switch element 310 (corresponding to drain electrode 23 in Figure 2) is connected to the anode terminal of diode 320 and one terminal of choke coil 330. The source electrode of switch element 310 (corresponding to source electrode 22 in Figure 2) is connected to one terminal of capacitor 340 and one terminal of capacitor 350. The other terminal of capacitor 340 is connected to the other terminal of choke coil 330, and the other terminal of capacitor 350 is connected to the cathode terminal of diode 320.

A gate driver is connected to the gate electrode of the switch element 310 (corresponding to gate electrode 21 in Figure 2). An AC power supply 370 is connected between both terminals of the capacitor 340 via a diode bridge 360, and a DC power supply is taken out between both terminals of the capacitor 350.

A highly oriented diamond layer 25 (see Figure 2) is provided on the back surface of the switch element 310, opposite the HEMT structure. Heat generated during operation of the switch element 310 is efficiently dissipated from the highly oriented diamond layer 25. This allows the PFC circuit 30 to function stably as a high-voltage DC power supply, and the power factor of the DC power supply can approach 1.

<Application Example 3>
11 shows an example of application of the semiconductor device 10 to a power supply device 400 using an equalizer circuit. The power supply device 400 includes a primary side circuit 410, a secondary side circuit 420, and a transformer 430 provided between the primary side circuit 410 and the secondary side circuit 420. The primary side circuit 410 includes the PFC circuit 300 described in application example 2 and an inverter circuit, for example, a full-bridge inverter circuit 440, connected between both terminals of the capacitor 350 of the PFC circuit 300.

The PFC circuit 300 has a switch element 310. The other components of the PFC circuit 300 are as described with reference to FIG. 10, and redundant description will be omitted. The full-bridge inverter circuit 440 has multiple, for example, four, switch elements 441, 442, 443, and 444. The secondary-side circuit 420 has multiple, for example, three, switch elements 421, 422, and 423. The semiconductor device 10 described above is used in the primary-side circuit 410 for the switch element 310 of the PFC circuit 300 and the switch elements 441 to 444 of the full-bridge inverter circuit 440. Ordinary MIS field-effect transistors using silicon are used for the switch elements 421 to 423 of the secondary-side circuit 420.

Switch element 310 and switch elements 441-444 have a highly oriented diamond layer 25 (see Figure 2) on the back surface opposite the HEMT structure. Heat generated during operation of switch element 310 and switch elements 441-444 is efficiently dissipated from the highly oriented diamond layer 25. The power supply unit 400 operates stably as a high-performance, high-voltage power supply unit.

<Application Example 4>
12 shows an example of application of the semiconductor device 10 to an amplifier 500 in the form of an equalizer circuit. The amplifier 500 includes a digital predistortion circuit 510, a mixer 520, a mixer 530, and a power amplifier 540. The semiconductor device 10 described above is used in the power amplifier 540.

Digital predistortion circuit 510 compensates for nonlinear distortion in the input signal. Mixer 520 mixes input signal SI, which has been compensated for nonlinear distortion, with an AC signal. Power amplifier 540 amplifies the signal resulting from mixing input signal SI with the AC signal. In amplifier 500, for example, by switching a switch, output signal SO can be mixed with the AC signal in mixer 530 and sent to digital predistortion circuit 510. Amplifier 500 is used as a high-frequency amplifier and a high-power amplifier.

The power amplifier 540 has a highly oriented diamond layer 25 (see Figure 2) on the back surface opposite the HEMT structure. Heat generated during the amplification operation of the amplifier 500 is efficiently dissipated from the highly oriented diamond layer 25. The amplifier 500 operates stably as a high-performance, high-output amplifier.

The above describes semiconductor devices according to embodiments based on specific configuration examples, but the present invention is not limited to these configuration examples. An AlN spacer layer approximately 2 nm thick may be inserted at the interface between the GaN layer 15 and the AlGaN layer 17, in the region other than directly below the gate electrode 21, to reduce the access resistance that exists in series between the source electrode 22 and the drain electrode 23. The semiconductor package 200, PFC circuit 300, power supply unit 400, and amplifier 500 incorporating the semiconductor device 10 can be mounted in various electronic devices or electronic equipment, such as computers, smartphones, tablet devices, sensors, cameras, and radar equipment.

10 semiconductor device 11 substrate 13 3C-SiC layer (cubic SiC layer)
13a: First surface; 13b: Second surface; 14: Buffer layer (nitride semiconductor layer);
15 GaN layer (nitride semiconductor layer)
17 AlGaN layer (nitride semiconductor layer)
25 Diamond layer 27 Diamond core 200 Semiconductor package 300 PFC circuit 400 Power supply device 500 Amplifier

Claims (7)

a cubic SiC layer;
a nitride semiconductor layer provided on a first surface of the SiC layer;
a diamond layer provided on a second surface of the SiC layer opposite the first surface,
the crystal axis of the diamond layer is oriented within 10° from the <111> direction ;
a surface roughness at the interface between the SiC layer and the diamond layer is greater than a surface roughness at the interface between the SiC layer and the nitride semiconductor layer;
Semiconductor device. a surface roughness of the interface between the SiC layer and the diamond layer is at least twice as large as a surface roughness of the interface between the SiC layer and the nitride semiconductor layer;
The semiconductor device according to claim 1 . the full width at half maximum of the X-ray rocking curve of the diamond layer is 7.5° or less;
3. The semiconductor device according to claim 1 . the nitride semiconductor layer includes a GaN layer and an AlGaN layer;
The semiconductor device according to claim 1 . A power supply device using the semiconductor device according to claim 1 . An amplifier using the semiconductor device according to any one of claims 1 to 4 . forming a cubic SiC layer on a substrate;
forming a stacked body including one or more nitride semiconductor layers on a first surface of the SiC layer;
removing the substrate to expose a second surface of the SiC layer opposite the first surface;
roughening the second surface and forming diamond nuclei on the roughened second surface;
epitaxially growing a diamond layer from the diamond nuclei;
A method for manufacturing a semiconductor device.