JP7734876B2 - Semiconductor element drive circuit and power conversion device - Google Patents

Description

This disclosure relates to a semiconductor element drive circuit that drives a semiconductor element provided in a power conversion circuit, which is the main circuit of a power conversion device, and to the power conversion device.

A power conversion circuit has arms, each consisting of at least two semiconductor elements connected in series, for the number of phases. If the power conversion circuit is a two-level power conversion circuit, each arm consists of two semiconductor elements connected in series, and if the power conversion circuit is a three-level power conversion circuit, each arm consists of four semiconductor elements connected in series. In these power conversion circuits, there is a risk of arm short circuits occurring. An arm short circuit in a two-level power conversion circuit is a phenomenon in which both semiconductor elements in the upper and lower arms are accidentally turned on at the same time. In addition, an arm short circuit in a three-level power conversion circuit is a phenomenon in which three adjacent semiconductor elements out of four semiconductor elements connected in series are accidentally turned on at the same time.

When an arm short circuit occurs, a large short-circuit current flows through each semiconductor element of the shorted arm, which can damage the semiconductor elements. For this reason, typical power conversion devices are equipped with a short-circuit detection circuit to detect arm short circuits. Patent Document 1 below discloses a structure in which a gate substrate equipped with a short-circuit detection circuit is directly attached to a module that houses multiple semiconductor elements.

JP 2017-92789 A

Power conversion circuits are noise sources that generate noise due to the switching operation of semiconductor elements. In power conversion devices with relatively large rated capacities, electrical wiring called bus bars is commonly used to connect the semiconductor elements of the power conversion circuit to the smoothing capacitor, which serves as the DC power supply source. When viewing a power conversion circuit as a noise source, noise currents generated from the noise source can flow into the short-circuit detection circuit via the bus bars and parasitic capacitance, potentially causing the short-circuit detection circuit to malfunction. This is particularly likely when the short-circuit detection circuit is located near the semiconductor elements of the power conversion circuit, as in Patent Document 1.

The present disclosure has been made in consideration of the above and aims to provide a semiconductor element driving circuit that can reduce the possibility of the short circuit detection circuit malfunctioning.

To solve the above-mentioned problems and achieve the objectives, the semiconductor element drive circuit disclosed herein comprises a gate drive circuit that individually drives one semiconductor element in an arm composed of at least two semiconductor elements connected in series and applies a gate voltage to the semiconductor element to drive the semiconductor element, and a short-circuit detection circuit that detects an arm short circuit based on the main terminal voltage of the semiconductor element. The short-circuit detection circuit comprises a voltage application circuit to which the main terminal voltage is applied, and a short-circuit determination circuit that determines the presence or absence of an arm short circuit based on the main terminal voltage applied through the voltage application circuit. The voltage application circuit comprises a first resistor consisting of one resistance element or multiple resistance elements connected in series, a first capacitor consisting of multiple capacitance elements connected in parallel to each resistance element in the first resistor, and a second capacitor consisting of one capacitance element or multiple capacitance elements connected in series. The second capacitor is positioned closer to the noise source than the first capacitor.

The semiconductor element driving circuit disclosed herein has the effect of reducing the possibility of the short circuit detection circuit malfunctioning.

1 is a schematic circuit diagram illustrating the connection relationship between a drive circuit according to a first embodiment and a semiconductor element to be driven; FIG. 1 is a diagram showing an example of a power conversion device to which a drive circuit according to a first embodiment is applied; FIG. 1 is a diagram showing an example of the basic configuration of a gate drive circuit and a short-circuit detection circuit for explaining a drive circuit according to a first embodiment; FIG. 4 is a diagram illustrating a displacement current that is a problem in the drive circuit shown in FIG. 3. 1 is a circuit diagram illustrating the circuit configuration of a voltage application circuit according to a first embodiment and the connection relationship with other components; FIG. 1 is a schematic diagram illustrating the positional relationship between the voltage application circuit according to the first embodiment and other components; FIG. 3 is a cross-sectional view showing a more detailed configuration of the first and second capacitors according to the first embodiment; FIG. 10 is a diagram illustrating features relating to the shapes of the first and second wiring patterns in the second embodiment. FIG. 10 is a diagram illustrating the features of the arrangement of the first and second capacitors in the third embodiment.

The following describes in detail, with reference to the accompanying drawings, a semiconductor device drive circuit (hereinafter abbreviated as "drive circuit" where appropriate) and a power conversion device according to an embodiment of the present disclosure. Note that in the following description, multiple components of the same type are indicated by subscripted symbols, but when there is no need to distinguish between the individual components, the subscripts will be omitted where appropriate.

Embodiment 1.
1 is a schematic circuit diagram illustrating the connection relationship between a drive circuit according to embodiment 1 and a semiconductor element to be driven. A drive circuit 100 according to embodiment 1 individually drives one semiconductor element 5 in an arm formed by series-connected semiconductor elements 5a and 5b. The series-connected semiconductor elements 5a and 5b are connected to both ends of a smoothing capacitor 1, which is a DC power supply source, and perform an operation of opening and closing the flow of DC power supplied from the smoothing capacitor 1, i.e., an operation of switching between supplying and cutting off power.

The circuit section in which the smoothing capacitor 1 exists is called the DC link section. The DC link section has a DC terminal P1 drawn from the upper potential side of the smoothing capacitor 1 and a DC terminal N1 drawn from the lower potential side of the smoothing capacitor 1.

The collector (C) of semiconductor element 5a is connected to DC terminal P1 by bus bar 7a, and the emitter (E) of semiconductor element 5b is connected to DC terminal N1 by bus bar 7b. Bus bars 7a and 7b are electrical wiring for electrically connecting semiconductor elements 5a and 5b to smoothing capacitor 1. The emitter of semiconductor element 5a is connected to the collector of semiconductor element 5b, and this connection point is connected to AC terminal AC1 by bus bar 7c.

The two semiconductor elements 5a, 5b connected as described above constitute a two-level, one-phase power conversion circuit. The two-level, one-phase power conversion circuit selects one of two potential levels, consisting of the potentials of DC terminal P1 and DC terminal N1, through the switching operation of semiconductor elements 5a, 5b, and outputs this to AC terminal AC1. Although not shown, the power conversion circuit may also be a three-level power conversion circuit. In a three-level power conversion circuit, an intermediate potential terminal is present in the DC link section. The three-level, one-phase power conversion circuit selects one of three potential levels, consisting of the potentials of DC terminal P1, the intermediate potential terminal, and DC terminal N1, through the switching operation of four semiconductor elements 5 connected in series, and outputs this to AC terminal AC1.

Each drive circuit 100 is connected to the collector, gate, and emitter of a semiconductor element 5. Drive circuit 100a drives semiconductor element 5a of the upper arm, and drive circuit 100b drives semiconductor element 5b of the lower arm. While FIG. 1 illustrates a case in which semiconductor elements 5a and 5b are IGBTs (insulated gate bipolar transistors), semiconductor elements other than IGBTs may also be used. Another example of semiconductor elements 5a and 5b is MOSFETs (metal oxide semiconductor field effect transistors). While FIG. 1 illustrates a configuration in which a diode is connected in anti-parallel to each IGBT, if semiconductor element 5 is a MOSFET, a body diode provided in the MOSFET may be used instead. Furthermore, while FIG. 1 illustrates semiconductor elements 5a and 5b as single elements, each of semiconductor elements 5a and 5b may be configured with multiple elements connected in parallel.

Drive circuit 100a includes a gate drive circuit 2a, a short-circuit detection circuit 3a, and a control unit 4a. Drive circuit 100b similarly includes a gate drive circuit 2b, a short-circuit detection circuit 3b, and a control unit 4b. Gate drive circuit 2 applies a drive voltage between the gate and emitter of semiconductor element 5 to drive semiconductor element 5. Short-circuit detection circuit 3 detects arm short circuits of semiconductor elements 5a and 5b based on the collector-emitter voltage of semiconductor element 5. In this document, the drive voltage applied between the gate and emitter will be referred to as the "gate voltage" as appropriate, and the collector-emitter voltage will be referred to as the "collector voltage" as appropriate. Furthermore, in this document, the collector voltage will sometimes be referred to as the "main terminal voltage." The control unit 4 controls the drive of semiconductor element 5, and, if short-circuit detection circuit 3 detects an arm short circuit of semiconductor element 5a or 5b, controls the semiconductor element 5 to be turned off.

Figure 2 is a diagram showing an example of a power conversion device employing a drive circuit according to embodiment 1. In Figure 2, components identical or equivalent to those in Figure 1 are designated by the same reference numerals. In addition to the semiconductor elements 5a and 5b described above, Figure 2 also shows a set of series-connected semiconductor elements 5c and 5d, and a set of series-connected semiconductor elements 5e and 5f. Drive circuit 100c drives semiconductor element 5c, drive circuit 100d drives semiconductor element 5d, drive circuit 100e drives semiconductor element 5e, and drive circuit 100f drives semiconductor element 5f. These six semiconductor elements 5a to 5f are connected in a three-phase bridge to form a three-phase inverter circuit, which is connected to motor 6 via bus bars 7c to 7e. The three-phase inverter circuit converts DC power supplied from smoothing capacitor 1 via bus bars 7a and 7b into three-phase AC power for supply to motor 6. While Figure 2 illustrates an example in which semiconductor elements 5a to 5f are IGBTs, MOSFETs and other types of devices may also be used.

The drive circuit 100 according to the first embodiment detects arm short circuits in the semiconductor elements 5a and 5b using a collector voltage detection method. The collector voltage detection method detects arm short circuits based on the collector voltage of the semiconductor element 5.

Figure 3 is a diagram showing an example of the basic configuration of a gate drive circuit and a short-circuit detection circuit used to explain the drive circuit of embodiment 1. Figure 3 shows an example of a circuit using a collector voltage detection method, in which the short-circuit detection circuit 3 includes a short-circuit protection unit 30 and a voltage application circuit 34. The short-circuit protection unit 30 also includes a short-circuit determination circuit 31, a current amplifier circuit 32, and a high-voltage determination circuit 33. In Figure 3, the gate drive circuit 2 and the short-circuit determination circuit 31 are mounted on the mother board 14, while the current amplifier circuit 32, the high-voltage determination circuit 33, and the voltage application circuit 34 are mounted on the daughter board 24. The mother board 14 and the daughter board 24 are different boards. Furthermore, in the voltage application circuit 34 shown in Figure 3, only the components necessary for explaining the basic operation of the drive circuit 100 are shown. Note that the configuration in Figure 3 is merely an example and is not limited to this implementation example. For example, the short-circuit determination circuit 31 may be mounted on the daughter board 24.

The gate drive circuit 2 mainly comprises a gate-on switch 21, a gate-off switch 22, and a control circuit 23. The connection point between the gate-on switch 21 and the gate-off switch 22 is electrically connected to the gate of the semiconductor element 5 via a current amplifier circuit 32. The voltage application circuit 34 comprises a first resistor 50 and a first capacitor 51. The first resistor 50 is a single resistance element or an assembly of multiple resistance elements connected in series. The first capacitor 51 is an assembly of multiple capacitance elements connected in parallel to each resistance element in the first resistor 50. If the first resistor 50 is composed of a single resistance element, the first capacitor 51 is also composed of a single capacitance element.

In Figure 3, the short circuit detection circuit 3 is shown as including a short circuit determination circuit 31, a current amplifier circuit 32, a high voltage determination circuit 33, and a voltage application circuit 34. However, if the collector voltage Vce is high when the arm is short-circuited, it is possible to omit the current amplifier circuit 32 and the high voltage determination circuit 33. In this case, the output of the voltage application circuit 34 is directly applied to the short circuit determination circuit 31.

Next, the operation of the gate drive circuit 2 will be explained. First, when turning on the semiconductor element 5, the control unit 4 turns on the gate-on switch 21 and turns off the gate-off switch 22 via the control circuit 23. At this time, a voltage Vp is applied to the gate of the semiconductor element 5 from the gate drive circuit 2. This turns on the semiconductor element 5. Furthermore, when turning off the semiconductor element 5, the control unit 4 turns off the gate-on switch 21 and turns on the gate-off switch 22 via the control circuit 23. At this time, a voltage of 0V is applied to the gate of the semiconductor element 5 from the gate drive circuit 2. This turns off the semiconductor element 5.

Next, the operation of the short-circuit detection circuit 3 will be described. First, the collector voltage Vce of the semiconductor element 5 is constantly applied to the voltage application circuit 34. If an arm short circuit occurs when the semiconductor element 5 is in the gate-on state, the collector voltage Vce rises. The raised collector voltage Vce is applied to the high-voltage determination circuit 33 via the voltage application circuit 34. When the collector voltage Vce is applied to the high-voltage determination circuit 33, the current amplifier circuit 32 operates, causing an amplified current to flow, charging a detection capacitor (not shown) in the short-circuit determination circuit 31. When the voltage across the detection capacitor exceeds the reference voltage, the short-circuit determination circuit 31 generates an arm short-circuit detection signal and outputs it to the control unit 4. In this way, the short-circuit determination circuit 31 determines whether or not an arm short circuit exists based on the collector voltage Vce applied via the voltage application circuit 34. Upon receiving the detection signal, the control unit 4 outputs a gate-off command to the control circuit 23 to gate off the semiconductor element 5. The control circuit 23 gates off the semiconductor element 5 in accordance with the gate-off command.

Figure 4 is a diagram used to explain the displacement current that is a problem in the drive circuit shown in Figure 3. Figure 4 shows the displacement current, which flows into the short-circuit protection unit 30 via the parasitic capacitance 36 between the bus bar 7 and the short-circuit detection circuit 3, with the bus bar 7 acting as a noise source, and its path. Note that the bus bar 7 here refers to at least one of the bus bars 7a to 7e. This also applies to the figures described below. When such a displacement current flows, the transistor in the high-voltage determination circuit 33 turns on, which in turn turns on the transistor in the current amplifier circuit 32, causing an amplified current to flow, potentially causing the short-circuit determination circuit 31 to malfunction. Therefore, some measure must be taken to prevent the short-circuit determination circuit 31 from malfunctioning. Therefore, in embodiment 1, the short-circuit detection circuit 3 is configured as shown in Figures 5 and 6.

Figure 5 is a circuit diagram used to explain the circuit configuration of the voltage application circuit of embodiment 1 and the connection relationship with other components. Figure 6 is a schematic diagram used to explain the positional relationship with other components in the voltage application circuit of embodiment 1. In Figure 5, the voltage application circuit 34 shown in Figures 3 and 4 has been replaced with a voltage application circuit 34A. Note that in Figures 5 and 6, components that are the same as or equivalent to those in Figure 4 are designated by the same reference numerals.

In Figure 5, the voltage application circuit 34A of embodiment 1 includes the first resistor 50 and first capacitor 51 shown in Figures 3 and 4, as well as a second capacitor 52. The second capacitor 52 consists of one capacitance element or multiple capacitance elements connected in series. The first capacitor 51 and the second capacitor 52 have the same number of capacitance elements. The capacitance value of the second capacitor 52 is greater than the capacitance value of the first capacitor 51.

The connection point between one end of the first capacitor 51 and one end of the second capacitor 52 is electrically connected to the collector of the semiconductor element 5. One end of the first capacitor 51 is also connected to one end of the first resistor 50. The other end of the first capacitor 51 is electrically connected to the short circuit determination circuit 31 via the high voltage determination circuit 33. The other end of the second capacitor 52 is connected to the GND (ground) terminal 58. Note that the other end of the second capacitor 52 may be connected to a location at the same potential as the GND terminal 58 instead of the GND terminal 58.

As shown in Figures 5 and 6, the first resistor 50 and the first capacitor 51 are mounted on the first main surface 41 of the daughter board 24, and the second capacitor 52 is mounted on the second main surface 42, which is the surface opposite the first main surface 41. The first main surface 41 faces the side where the power module 80 housing the semiconductor device 5 is located, and the second main surface 42 faces the side where the bus bar 7, which is a noise source, is located. With this configuration, the parasitic capacitance 36 is dominated by that formed between the bus bar 7 and the second capacitor 52. This makes it possible to increase the capacitive coupling between the bus bar 7 and the second capacitor 52 while reducing the capacitive coupling between the bus bar 7 and the first capacitor 51.

Figure 7 is a cross-sectional view showing a more detailed configuration of the first and second capacitors in embodiment 1. As shown in Figure 7, each capacitance element 55 constituting the first capacitor 51 and each capacitance element 56 constituting the second capacitor 52 are formed in opposing positions on the front and back of the daughter board 24. The capacitance elements 55 of the first capacitor 51 are each electrically connected by a first wiring pattern 61, and the capacitance elements 56 of the second capacitor 52 are each electrically connected by a second wiring pattern 62. Of the first wiring pattern 61, the wiring pattern 63 at the lower left of the drawing is electrically connected to the high-voltage judgment circuit 33. Furthermore, of the second wiring pattern 62, the wiring pattern 64 at the upper left of the drawing is electrically connected to the GND terminal 58. In addition, the shared wiring pattern 65 on the right side of the paper penetrates the substrate 24 and is formed on the front and back of the substrate 24, with one end electrically connected to the capacitance elements 55 and 56 and the other end electrically connected to the collector of the semiconductor element 5.

Because the first capacitor 51 and the second capacitor 52 are formed as described above, most of the displacement current that can flow through the parasitic capacitance 36 flows into the GND terminal 58 via the capacitance element 56 and the second wiring pattern 62. This reduces the displacement current that attempts to flow into the high-voltage judgment circuit 33 via the first capacitor 51. Therefore, using the voltage application circuit 34A of embodiment 1 can reduce the possibility of the short-circuit detection circuit 3 malfunctioning.

When forming the first capacitor 51 and the second capacitor 52, it is desirable to form the capacitance values of the capacitance elements 55 of the first capacitor 51 to be equal, and to form the capacitance values of the capacitance elements 56 of the second capacitor 52 to be equal. By forming them in this manner, the potential difference between the capacitance elements 55, 56 at opposing positions on the front and back of the daughter board 24 can be made essentially zero, making it possible to extremely reduce the displacement current that attempts to flow into the high-voltage judgment circuit 33 via the first capacitor 51.

Instead of the above configuration, capacitance elements 55, 56 may be formed at opposing positions on the front and back of the daughter board 24 so that the capacitance ratio, which is the ratio of the capacitance values between the two capacitance elements 55, 56, is equal. The capacitance ratio here refers to the ratio of the capacitance value of one capacitance element 56 of the second capacitor 52 to the capacitance value of one capacitance element 55 of the first capacitor 51. Naturally, the capacitance ratio will be a value greater than 1.

In addition, Figures 5 and 7 show an example in which the first capacitor 51 is mounted on the first main surface 41 of the daughter board 24 and the second capacitor 52 is mounted on the second main surface 42, which is the surface opposite the first main surface 41, but this mounting example is not limited to this. The important point is that the first capacitor 51 must be configured to reduce the impact of displacement current that can flow via parasitic capacitance 36 more than conventional structures, and any structure that achieves this is acceptable. Therefore, it can be said that the structure must be such that the second capacitor 52 is located closer to the noise source than the first capacitor 51.

As described above, the semiconductor element drive circuit according to the first embodiment includes a gate drive circuit that individually drives one semiconductor element in an arm composed of at least two semiconductor elements connected in series and applies a gate voltage to the semiconductor element to drive the semiconductor element, and a short-circuit detection circuit that detects an arm short circuit based on the main terminal voltage of the semiconductor element. The short-circuit detection circuit includes a voltage application circuit to which the main terminal voltage is applied, and a short-circuit determination circuit that determines whether or not an arm short circuit exists based on the main terminal voltage applied through the voltage application circuit. The voltage application circuit includes a first resistor consisting of one resistance element or multiple resistance elements connected in series, a first capacitor consisting of multiple capacitance elements connected in parallel to each resistance element in the first resistor, and a second capacitor consisting of one capacitance element or multiple capacitance elements connected in series. The second capacitor is positioned closer to the noise source than the first capacitor. With the semiconductor element drive circuit configured in this manner, most of the displacement current that attempts to flow into the short circuit detection circuit via the parasitic capacitance between the bus bar and the short circuit detection circuit can be directed to the GND circuit (not shown) via the second capacitor, thereby reducing the displacement current that attempts to flow into the voltage application circuit via the first capacitor, thereby reducing the possibility of the short circuit detection circuit malfunctioning.

Embodiment 2.
In the second embodiment, the desirable shapes of the first wiring pattern 61 and the second wiring pattern 62 described in the first embodiment will be described with reference to Fig. 8. Fig. 8 is a diagram for explaining the characteristics of the shapes of the first and second wiring patterns in the second embodiment.

The upper part of Figure 8 shows an example of a shape according to embodiment 2, in which the area of the second wiring pattern 62 is larger than the area of the first wiring pattern 61. The lower part of Figure 8 shows an example of a comparative example, in which the area of the second wiring pattern 62 is smaller than the area of the first wiring pattern 61. In the comparative example, the structure is susceptible to noise intrusion from a noise source. In contrast, in embodiment 2, the area of the second wiring pattern 62 is larger than the area of the first wiring pattern 61, so noise directed toward the first wiring pattern 61 is blocked by the second wiring pattern 62. Therefore, applying the structure of embodiment 2 to the drive circuit 100 according to embodiment 1 can further reduce the possibility of malfunction of the short-circuit detection circuit 3.

As described above, in the semiconductor element drive circuit of embodiment 2, the capacitance elements of the first and second capacitors are electrically connected by wiring patterns, and the area of the wiring patterns on the second main surface at opposing positions on the front and back of the substrate is configured to be larger than the area of the wiring patterns on the first main surface. With a semiconductor element drive circuit configured in this manner, noise directed toward the wiring patterns formed on the first main surface is shielded by the wiring patterns formed on the second main surface, further reducing the possibility of the short-circuit detection circuit malfunctioning.

Embodiment 3.
In the third embodiment, a desirable arrangement example of the first capacitor 51 and the second capacitor 52 described in the first embodiment will be described with reference to Fig. 9. Fig. 9 is a diagram for explaining the characteristics of the arrangement of the first and second capacitors in the third embodiment.

The left side of Figure 9 shows an example of an arrangement of embodiment 3, in which the arrangement direction of the capacitance elements of the first capacitor 51 and the second capacitor 52 is a first direction, and the capacitance elements of the first capacitor 51 and the second capacitor 52 are shifted from each other in a second direction perpendicular to the first direction. The right side of Figure 9 shows an example of a comparative example in which the capacitance elements of the first capacitor 51 and the second capacitor 52, which are arranged in the first direction, are overlapped in the second direction. The operation of the semiconductor device 5 generates heat in the first capacitor 51 and the second capacitor 52. Therefore, in the comparative example, the capacitance elements of the first capacitor 51 and the second capacitor 52 are susceptible to the effects of thermal interference with each other. In contrast, in embodiment 3, the capacitance elements of the first capacitor 51 are shifted from each other with respect to the capacitance elements of the second capacitor 52, thereby reducing the effects of thermal interference compared to the comparative example. This makes it possible to suppress a decrease in the life span of the first capacitor 51 and the second capacitor 52 .

As described above, in the semiconductor element drive circuit of embodiment 3, when the arrangement direction of the capacitance elements of each of the first and second capacitors is defined as a first direction, the capacitance elements of each of the first and second capacitors are arranged offset from each other in a second direction perpendicular to the first direction. With a semiconductor element drive circuit configured in this manner, the effects of thermal interference on each of the capacitance elements of the first and second capacitors can be reduced compared to when the capacitance elements are arranged overlapping each other. As a result, use of the semiconductor element drive circuit of embodiment 3 makes it possible to suppress a decrease in the lifespan of the first and second capacitors.

The configurations shown in the above embodiments are merely examples, and may be combined with other known technologies, or different embodiments may be combined with each other. It is also possible to omit or modify parts of the configurations as long as they do not deviate from the gist of the invention.
Various aspects of the present disclosure are summarized below as appendices.
[Appendix 1]
A semiconductor element drive circuit including: a gate drive circuit that individually drives one semiconductor element in an arm formed of at least two semiconductor elements connected in series, and applies a gate voltage to the semiconductor element to drive the semiconductor element; and a short circuit detection circuit that detects an arm short circuit based on a main terminal voltage of the semiconductor element,
The short circuit detection circuit
a voltage application circuit to which the main terminal voltage is applied;
a short circuit determination circuit that determines whether or not the arm is short-circuited based on the main terminal voltage applied through the voltage application circuit;
Equipped with
The voltage application circuit includes:
a first resistor consisting of one resistive element or a plurality of resistive elements connected in series;
a first capacitor comprising a plurality of capacitance elements connected in parallel to each resistance element of the first resistor;
a second capacitor consisting of one capacitance element or multiple capacitance elements connected in series;
Equipped with
The second capacitor is disposed closer to the noise source than the first capacitor.
A semiconductor element drive circuit comprising:
[Appendix 2]
A connection point between one end of the first capacitor and one end of the second capacitor is electrically connected to a main terminal of the semiconductor element, the other end of the first capacitor is electrically connected to the short circuit determination circuit, and the other end of the second capacitor is connected to a ground terminal or a portion having the same potential as the ground terminal.
2. A semiconductor element drive circuit according to claim 1.
[Appendix 3]
The capacitance value of the second capacitor is greater than the capacitance value of the first capacitor.
3. The semiconductor element drive circuit according to claim 1 or 2.
[Appendix 4]
the first capacitor is mounted on a first main surface of a substrate, and the second capacitor is mounted on a second main surface opposite to the first main surface;
The second main surface faces the side where the noise source is present.
4. A semiconductor element drive circuit according to claim 1, wherein:
[Appendix 5]
the first and second capacitors each having a plurality of capacitance elements;
The first and second capacitors have the same number of capacitance elements, and the capacitance elements are formed at opposing positions on the front and back of the substrate.
5. A semiconductor element drive circuit according to claim 4.
[Appendix 6]
the capacitance values of the capacitance elements of the first capacitor are equal;
The capacitance values of the capacitance elements of the second capacitor are equal.
6. A semiconductor element drive circuit according to claim 5.
[Appendix 7]
The ratio of the capacitance value of one capacitance element of the second capacitor to the capacitance value of one capacitance element of the first capacitor, which is the ratio of the capacitance values of two capacitance elements at opposing positions on the front and back of the substrate, is equal and the capacitance ratio is a value greater than 1.
6. A semiconductor element drive circuit according to claim 5.
[Appendix 8]
the capacitance elements of the first and second capacitors are electrically connected by a wiring pattern;
At opposing positions on the front and back of the substrate, the area of the wiring pattern on the second main surface is larger than the area of the wiring pattern on the first main surface.
8. The semiconductor element drive circuit according to claim 5, wherein:
[Appendix 9]
When the arrangement direction of the capacitance elements of the first and second capacitors is defined as a first direction, the capacitance elements of the first and second capacitors are arranged to be shifted from each other in a second direction perpendicular to the first direction.
9. A semiconductor element drive circuit according to any one of claims 5 to 8.
[Supplementary Note 10]
The noise source is a bus bar, which is an electrical wiring for electrically connecting the semiconductor element and a DC power supply source that supplies DC power to the semiconductor element.
10. A semiconductor element drive circuit according to any one of claims 1 to 9.
[Appendix 11]
The short circuit determination circuit is mounted on a different substrate from the voltage application circuit.
11. A semiconductor element drive circuit according to any one of claims 1 to 10.
[Appendix 12]
The substrate is a daughter substrate and the different substrate is a mother substrate.
12. The semiconductor element drive circuit according to claim 11.
[Appendix 13]
The short circuit determination circuit is mounted on the mother board together with the gate drive circuit.
13. The semiconductor element drive circuit according to claim 12.
[Appendix 14]
A power conversion device comprising the semiconductor element drive circuit according to any one of appendices 1 to 13.

1 smoothing capacitor, 2, 2a, 2b gate drive circuit, 3, 3a, 3b short circuit detection circuit, 4, 4a, 4b control unit, 5, 5a to 5f semiconductor element, 6 motor, 7, 7a, 7b, 7c, 7d, 7e bus bar, 14 mother board, 21 gate on switch, 22 gate off switch, 23 control circuit, 24 daughter board, 30 short circuit protection unit, 31 short circuit determination circuit, 32 current amplification circuit, 33 high voltage determination circuit, 34, 34A voltage application circuit, 36 parasitic capacitance, 41 first main surface, 42 second main surface, 50 first resistor, 51 first capacitor, 52 second capacitor, 55, 56 capacitance element, 58 GND terminal, 61 first wiring pattern, 62 second wiring pattern, 63, 64 wiring pattern, 65 shared wiring pattern, 80 Power modules, 100, 100a to 100f, drive circuits.

Claims (13)

A semiconductor element drive circuit including: a gate drive circuit that individually drives one semiconductor element in an arm formed of at least two semiconductor elements connected in series, and applies a gate voltage to the semiconductor element to drive the semiconductor element; and a short circuit detection circuit that detects an arm short circuit based on a main terminal voltage of the semiconductor element,
The short circuit detection circuit
a voltage application circuit to which the main terminal voltage is applied;
a short circuit determination circuit that determines whether or not the arm is short-circuited based on the main terminal voltage applied through the voltage application circuit;
Equipped with
The voltage application circuit includes:
a first resistor consisting of one resistive element or a plurality of resistive elements connected in series;
a first capacitor comprising a plurality of capacitance elements connected in parallel to each resistance element of the first resistor;
a second capacitor consisting of one capacitance element or multiple capacitance elements connected in series;
Equipped with
a connection point between one end of the first capacitor and one end of the second capacitor is electrically connected to a main terminal of the semiconductor element, the other end of the first capacitor is electrically connected to the short circuit determination circuit, and the other end of the second capacitor is connected to a ground terminal or a portion having the same potential as the ground terminal;
The semiconductor element drive circuit according to claim 1, wherein the second capacitor is disposed closer to a noise source than the first capacitor. 2. The semiconductor device drive circuit according to claim 1, wherein the capacitance value of the second capacitor is greater than the capacitance value of the first capacitor. the first capacitor is mounted on a first main surface of a substrate, and the second capacitor is mounted on a second main surface opposite to the first main surface;
2. The semiconductor device driver circuit according to claim 1, wherein the second main surface faces a side where the noise source is present. the first and second capacitors each having a plurality of capacitance elements;
4. The semiconductor element drive circuit according to claim 3 , wherein the first and second capacitors have the same number of capacitance elements, and the capacitance elements are formed at opposing positions on the front and back of the substrate. the capacitance values of the capacitance elements of the first capacitor are equal;
5. The semiconductor device drive circuit according to claim 4 , wherein the capacitance values of the capacitance elements of the second capacitor are equal. 5. The semiconductor element drive circuit according to claim 4, wherein the ratio of the capacitance value of one capacitance element of the first capacitor to the capacitance value of one capacitance element of the second capacitor, which is the ratio of the capacitance values of two capacitance elements at opposing positions on the front and back of the substrate, is equal and the capacitance ratio is a value greater than 1 . the capacitance elements of the first and second capacitors are electrically connected by a wiring pattern;
5. The semiconductor element drive circuit according to claim 4 , wherein, at opposing positions on the front and back of the substrate, the area of the wiring pattern on the second main surface is larger than the area of the wiring pattern on the first main surface. 5. The semiconductor element drive circuit according to claim 4, wherein when the arrangement direction of the capacitance elements of each of the first and second capacitors is defined as a first direction, the capacitance elements of each of the first and second capacitors are arranged to be shifted from each other in a second direction perpendicular to the first direction. 2. The semiconductor element drive circuit according to claim 1, wherein the noise source is a bus bar that is an electrical wiring for electrically connecting the semiconductor element and a DC power supply source that supplies DC power to the semiconductor element. 2. The semiconductor element drive circuit according to claim 1, wherein the short-circuit determination circuit is mounted on a different substrate from the voltage application circuit. 11. The driving circuit for a semiconductor device according to claim 10 , wherein the substrate is a daughter substrate and the different substrate is a mother substrate. 12. The drive circuit for a semiconductor device according to claim 11 , wherein the short-circuit determination circuit is mounted on the mother board together with the gate drive circuit. A power conversion device comprising the semiconductor device drive circuit according to any one of claims 1 to 12 .