JP7746914B2 - Semiconductor device and method for manufacturing the same - Google Patents

Description

The technology disclosed in this specification relates to semiconductor devices and methods for manufacturing semiconductor devices.

A structure in which a gate insulating film and a gate electrode are stacked on single-crystal gallium nitride is known. A technology is also known in which the crystallinity of the gate insulating film near the gallium nitride interface is improved by heat treatment. This reduces defect levels at the interface and in the gate insulating film, making it possible to suppress a decrease in mobility due to the capture and scattering of conduction carriers traveling through the channel. Related technology is disclosed in Patent Document 1.

Patent No. 6707995 specification

When crystallization progresses from the gallium nitride interface toward the top of the gate insulating film, defects and impurity segregation at the grain boundaries can increase leakage current and reduce breakdown voltage in the gate insulating film, potentially reducing the reliability of the gate insulating film.

One embodiment of a semiconductor device disclosed herein is a semiconductor device having a gate insulating film disposed on single-crystal gallium nitride. The gate insulating film is disposed on the surface of the gallium nitride and includes a first insulating film having hexagonal symmetry crystallinity. The gate insulating film is disposed on the upper surface of the first insulating film and includes a second insulating film that functions to inhibit the propagation of gallium nitride crystal information. The gate insulating film is disposed on the upper surface of the second insulating film and includes a third insulating film that has a dielectric constant equal to or greater than the dielectric constants of the first insulating film and the second insulating film. The crystallinity of the first insulating film is higher than that of the third insulating film.

In the semiconductor device of the above embodiment, the second insulating film can inhibit the propagation of gallium nitride crystal information from the first insulating film to the third insulating film. It is possible to form a structure in which the crystallinity of the first insulating film is higher than that of the third insulating film. The highly crystalline first insulating film can reduce defect levels at the interface and within the insulating film. Furthermore, the low-crystalline third insulating film can suppress an increase in leakage current and a decrease in breakdown voltage. It is possible to improve the reliability of the gate insulating film while suppressing a decrease in mobility.

The first insulating film may be crystallized with a gallium nitride orientation. Details of this effect will be explained in the examples.

The first insulating film may be aluminum nitride, aluminum silicate, hafnium oxide, or aluminum oxide.

The second insulating film may be silicon oxide or silicon nitride.

The third insulating film may be aluminum silicate or hafnium silicate.

The first insulating film may be aluminum silicate, the second insulating film may be silicon oxide, and the third insulating film may be aluminum silicate.

The first insulating film may be aluminum nitride, the second insulating film may be silicon oxide, and the third insulating film may be aluminum silicate.

The thickness of the first insulating film may be 3 nm or more. Details of the effects will be explained in the examples.

The thickness of the second insulating film may be 1 nm or more. Details of the effects will be explained in the examples.

The method for manufacturing a semiconductor device disclosed in this specification includes the step of disposing a first insulating film having hexagonal symmetry crystallinity on the surface of single-crystal gallium nitride. The method also includes the step of disposing a second insulating film on the upper surface of the first insulating film, the second insulating film having the function of inhibiting the propagation of gallium nitride crystal information. The method also includes the step of disposing a third insulating film on the upper surface of the second insulating film, the third insulating film having a dielectric constant equal to or greater than the dielectric constants of the first insulating film and the second insulating film. The method also includes the step of heat-treating the gallium nitride having the first insulating film, second insulating film, and third insulating film. Details of the effects will be explained in the examples.

1 is a schematic cross-sectional view of a main part of a semiconductor device 1. FIG. 1 is a flowchart showing a method for manufacturing the semiconductor device 1.

(Structure of Semiconductor Device 1)
1 is a schematic cross-sectional view of a main portion of a semiconductor device 1 according to this embodiment. The semiconductor device 1 is an embodiment of a lateral MOSFET. The semiconductor device 1 includes a semiconductor substrate 10, a nitride semiconductor 20, an insulating film 28, a drain electrode 32, a source electrode 34, a body electrode 36, a gate insulating film 40, and a gate electrode 44.

The semiconductor substrate 10 is a base substrate for the nitride semiconductor 20, and is made of a material having a composition that allows crystal growth of the nitride semiconductor 20. In this embodiment, the semiconductor substrate 10 is a single crystal substrate of gallium nitride (GaN). The nitride semiconductor 20 is provided on the surface of the semiconductor substrate 10. The nitride semiconductor 20 is made of single crystal GaN. The nitride semiconductor 20 has a p-type body region 22, an n ⁺ -type drain region 25, and an n ⁺ -type source region 26.

The body region 22 is a GaN epitaxially grown layer and is provided to separate the drain region 25 and the source region 26. The drain region 25 is provided on the body region 22, is provided in part of the surface layer of the nitride semiconductor 20, and is exposed at the surface of the nitride semiconductor 20. The drain region 25 is in ohmic contact with a drain electrode 32 provided on part of the surface of the nitride semiconductor 20. The source region 26 is provided on the body region 22, is provided in part of the surface layer of the nitride semiconductor 20, and is exposed at the surface of the nitride semiconductor 20. The source region 26 is in ohmic contact with a source electrode 34 provided on part of the surface of the nitride semiconductor 20. A part of the body region 22 is exposed at the surface of the nitride semiconductor 20. The exposed body region 22 is in ohmic contact with a body electrode 36 provided on part of the surface of the nitride semiconductor 20. The drain electrode 32, source electrode 34, and body electrode 36 are insulated by an insulating film 28.

The gate insulating film 40 is provided on the surface of the nitride semiconductor 20 so as to face the body region 22 located between the drain region 25 and the source region 26. The gate insulating film 40 is in contact with the surface of the nitride semiconductor 20 (specifically, the body region 22). A gate electrode 44 is disposed on the gate insulating film 40. The gate electrode 44 faces the body region 22 located between the drain region 25 and the source region 26 via the gate insulating film 40. The gate electrode 44 is made of, for example, aluminum.

The gate insulating film 40 includes a first insulating film 41, a second insulating film 42, and a third insulating film 43. The first insulating film 41 is disposed on the surface of the gallium nitride nitride semiconductor 20. The first insulating film 41 is an insulating film having hexagonal symmetry crystallinity. Specifically, the first insulating film 41 is any one of aluminum nitride (AlN), aluminum silicate (AlSiO), hafnium oxide (HfO), and _aluminum oxide ( _Al2O3 ).

The first insulating film 41 is the portion of the gate insulating film 40 that contacts the gallium nitride, and has a crystalline structure that mimics the crystalline structure of gallium nitride. Note that a crystalline structure that mimics the crystalline structure of gallium nitride refers to a crystalline structure that is recrystallized and oriented to the atomic arrangement on the surface of single-crystal gallium nitride.

The thickness of the first insulating film 41 is preferably 3 nm or more. This is because it is believed that the film quality of the region extending from the interface IF between the first insulating film 41 and the gallium nitride to a depth of approximately 3 nm inside the first insulating film 41 affects the characteristics of the semiconductor device. In other words, if the crystallinity of the region extending from the interface IF of the first insulating film 41 to a depth of approximately 3 nm inside is low, the carrier mobility will decrease due to defect levels at the interface IF and in the first insulating film 41. Therefore, by making the thickness of the first insulating film 41 3 nm or more and increasing the crystallinity of the first insulating film 41 by heat treatment, which will be described later, it is possible to suppress the decrease in mobility.

In this example, the first insulating film 41 is made of aluminum silicate (AlSiO). Here, the ratio of silicon atoms to the total of silicon atoms and aluminum atoms is defined as the mixture ratio _xSi . That is, the mixture ratio _xSi is expressed as " _xSi = Si/(Al+Si)." In this example, the mixture ratio _xSi of the first insulating film 41 is set to 0.22.

The mixing ratio x _Si of the first insulating film 41 is preferably 0.4 or less. The reason for this is explained below. The lower the proportion of silicon in the aluminum silicate, the easier it is to crystallize the aluminum silicate by heat treatment. The inventors have found that in the film structure of this specification including the first insulating film 41, the second insulating film 42, and the third insulating film 43, setting the mixing ratio x _Si of the first insulating film 41 to 0.4 or less can promote polycrystallization of the first insulating film 41 by heat treatment. The method for controlling the mixing ratio x _Si will be described later.

The second insulating film 42 is disposed on the upper surface of the first insulating film 41. The second insulating film 42 is an insulating film that has the function of inhibiting the propagation of gallium nitride crystal information to the third insulating film 43. In other words, the second insulating film 42 is a layer that suppresses crystallization of the third insulating film 43. Specifically, the second insulating film 42 is an insulating film that can have a stable amorphous structure at high temperatures. The second insulating film 42 can be silicon oxide (SiO ₂ ) or silicon nitride (SiN). In this example, the second insulating film 42 was silicon oxide.

The thickness of the second insulating film 42 is preferably 1 nm or more. This is because the second insulating film 42 becomes thinner due to diffusion caused by the heat treatment (step S7) described below. Specifically, the inventors discovered that aluminum from the first insulating film 41 diffuses into the second insulating film 42, and that the diffusion length is approximately 0.9 nm. Therefore, a thickness of 1 nm or more is necessary to maintain the crystallization suppression effect of the second insulating film 42.

The third insulating film 43 is disposed on the upper surface of the second insulating film 42. The third insulating film 43 is thicker than the first insulating film 41 and the second insulating film 42, and constitutes more than half of the thickness of the gate insulating film 40. The material of the third insulating film 43 is aluminum silicate (AlSiO) or hafnium silicate (HfSiO). In this example, the third insulating film 43 is aluminum silicate. The mixing ratio _xSi of the third insulating film 43 is 0.22.

The dielectric constant of the third insulating film 43 is preferably equal to or greater than the dielectric constants of the first insulating film 41 and the second insulating film 42. The dielectric constant decreases with increasing silicon atoms, and increases with increasing aluminum atoms. Therefore, the mixing ratio x _Si of the third insulating film 43 should be equal to or less than the mixing ratio x _Si of the first insulating film 41 and the second insulating film 42. The effect is explained below. A higher dielectric constant of the gate insulating film increases the carrier concentration of the inversion layer formed at the interface IF between the gate insulating film 40 and the nitride semiconductor 20 for a given gate voltage, thereby reducing channel resistance. On the other hand, as the gate insulating film becomes more polycrystalline, defects and impurity segregation at the grain boundaries increase leakage current and decrease breakdown voltage. Furthermore, the more aluminum atoms in the gate insulating film, the higher the dielectric constant and the more easily polycrystallization occurs due to heat treatment. On the other hand, the technology of this embodiment allows the second insulating film 42 to suppress polycrystallization of the third insulating film 43. Therefore, by selectively increasing the aluminum atoms in the third insulating film 43, it is possible to achieve both a high dielectric constant for the gate insulating film and suppression of leakage current.

(Method for manufacturing semiconductor device 1)
A method for manufacturing the semiconductor device 1 will be described with reference to Fig. 2. A nitride semiconductor formation process is performed in step S1 of the flowchart in Fig. 2. Specifically, a semiconductor substrate 10, which is a single crystal substrate of GaN, is prepared, and a nitride semiconductor 20 is grown on the semiconductor substrate 10 by using the well-known metal organic chemical vapor deposition (MOCVD) method.

In step S2, the drain region 25 and the source region 26 are formed in the nitride semiconductor 20. Specifically, a mask with openings for the drain region 25 and the source region 26 is formed on the nitride semiconductor 20 using well-known photolithography techniques and dry etching. Next, Si ions are implanted through the mask. Next, the nitride semiconductor 20 is heat-treated. This activates the Si ions implanted in the nitride semiconductor 20, forming the drain region 25 and the source region 26.

In step S3, a surface cleaning process is performed to remove contaminated layers caused by impurities adhering to the surface of the nitride semiconductor 20, damaged layers caused by processing, and oxide layers (GaO). In the surface cleaning process, sulfuric acid, ammonia water, a mixture of hydrochloric acid and hydrogen peroxide, as well as dilute hydrofluoric acid (DHF) are used.

In step S4, a first insulating film 41 having an amorphous structure is formed on the nitride semiconductor 20. The first insulating film 41 is formed using plasma-assisted atomic layer deposition (ALD). Specifically, to form an aluminum silicate film using ALD, a first film formation step for forming _{an Al2O3} layer and a second film formation step for forming a _SiO2 layer are alternately performed. The first film formation step uses trimethylaluminum (TMAl) as the Al source and oxygen radicals as the oxygen source. One cycle of the first film formation step is performed by oxidizing the adsorbed Al, and a monomolecular layer of _Al2O3 can be formed _. The second film formation step uses trisdimethylaminosilane (TDMAS) as the Si source and oxygen radicals as the oxygen source. One cycle of the second film formation step is performed by oxidizing the adsorbed Si, and a monomolecular layer of _SiO2 can be formed. The ALD method is well known, and therefore a detailed description thereof will be omitted.

The mixing ratio x _Si of aluminum silicate can be adjusted by the ratio between the number of cycles in the first film formation step and the number of cycles in the second film formation step. For example, when the number of cycles in the first and second film formation steps is both "1," the mixing ratio x _Si is approximately 0.33. To decrease the mixing ratio x _Si , the number of cycles in the first film formation step may be made greater than the number of cycles in the second film formation step. In this embodiment, the first insulating film 41 is made of aluminum silicate with a thickness of 3 nm, and the mixing ratio x _Si is 0.22.

In step S5, a second insulating film 42 having an amorphous structure is formed on the upper surface of the first insulating film 41. The second insulating film 42 can be formed continuously with the first insulating film 41 using the ALD method. In this example, the second insulating film 42 is silicon oxide with a thickness of 1.5 nm.

In step S6, a third insulating film 43 having an amorphous structure is formed on the upper surface of the second insulating film 42. The third insulating film 43 can be formed continuously with the second insulating film 42 by the ALD method. In this example, the third insulating film 43 is made of aluminum silicate and has a thickness of 40 nm, and the mixture ratio x _Si is 0.22.

In step S7, the nitride semiconductor 20 including the first insulating film 41, second insulating film 42, and third insulating film 43 is heat-treated. The heat treatment is performed at 950°C for 10 minutes in a nitrogen atmosphere. As a result, the first insulating film 41 of the gate insulating film 40 in contact with the nitride semiconductor 20 changes from an amorphous structure to a polycrystalline structure. This is because the portion of the first insulating film 41 in contact with the gallium nitride recrystallizes in imitation of the surface of the single-crystal gallium nitride. Meanwhile, the third insulating film 43 is separated from the first insulating film 41 by the second insulating film 42. The second insulating film 42 suppresses the propagation of crystalline information to the third insulating film 43. As a result, the third insulating film 43 maintains a state close to an amorphous structure. This is because the second insulating film 42 blocks recrystallization that begins at the interface IF between the gallium nitride and the first insulating film 41.

After heat treatment, the crystallinity of the first insulating film 41 can be made higher than that of the third insulating film 43. Here, "high crystallinity" means that the amorphous structure of the oxide has been recrystallized. In other words, the first insulating film 41 has a larger polycrystalline structure than the third insulating film 43.

In step S8, a gate electrode 44 is formed on the gate insulating film 40. Specifically, an Al layer is deposited on the nitride semiconductor 20. Next, the Al layer formed in areas other than the gate insulating film 40 is removed using well-known photolithography and etching processes.

In step S9, the drain electrode 32, source electrode 34, and body electrode 36 are formed on the nitride semiconductor 20. Specifically, using well-known photolithography and etching, the gate insulating film 40 is removed from the areas where the drain electrode 32, source electrode 34, and body electrode 36 will be formed. A stacked film of a Ti layer and an Al layer is formed, and then using well-known photolithography and etching, the stacked film is processed into the drain electrode 32, source electrode 34, and body electrode 36. This completes the semiconductor device 1 shown in FIG. 1.

(effect)
In the technology of the present specification, the second insulating film 42 can inhibit the propagation of gallium nitride crystal information from the first insulating film 41 to the third insulating film 43. Crystallization of the first insulating film 41 begins using the surface of the nitride semiconductor 20 as a seed crystal, but the second insulating film 42 suppresses upward crystal growth, which is thought to facilitate lateral crystal expansion. This promotes crystallization of the first insulating film 41 and reduces defect levels at the interface IF and the first insulating film 41, thereby suppressing mobility reduction due to capture and scattering of conduction carriers traveling through the channel. Furthermore, by preventing the third insulating film 43 from becoming polycrystallized, the third insulating film 43 can be maintained in a near-amorphous state. Since defects and impurity segregation at grain boundaries can be suppressed, leakage current can be suppressed and a decrease in breakdown voltage can be prevented. This allows for both improved gate insulating film reliability and improved carrier mobility.

(Experimental Example)
In the sample of this example, the first insulating film 41 was made of aluminum silicate (mixing ratio _xSi = 0.22) with a thickness of 3 nm. The second insulating film 42 was made of silicon oxide with a thickness of 1.5 nm. The third insulating film 43 was made of aluminum silicate (mixing ratio _xSi = 0.22) with a thickness of 40 nm. In addition, in the sample of the comparative example, a single layer of aluminum silicate (mixing ratio _xSi = 0.22) with a thickness of 40 nm was formed on the surface of the gallium nitride. Both samples were subjected to a heat treatment at 950°C for 10 minutes in a nitrogen atmosphere. The crystallinity of both samples was compared using cross-sectional TEM. In the sample of this example, the first insulating film 41 was uniformly crystallized, while the layer above the second insulating film 42 had low crystallinity and a structure close to amorphous. On the other hand, in the sample of the comparative example, it was confirmed that non-uniform polycrystals were formed within a range of approximately 15 nm from the gallium nitride interface.

Although specific examples of the present invention have been described in detail above, these are merely examples and do not limit the scope of the claims. The technology described in the claims includes various modifications and variations of the specific examples exemplified above. Furthermore, the technical elements described in this specification or drawings may demonstrate technical utility alone or in various combinations, and are not limited to the combinations described in the claims at the time of filing. Furthermore, the technology exemplified in this specification or drawings can achieve multiple objectives simultaneously, and achieving one of these objectives is itself technically useful.

(Modification)
Various combinations of materials may be used for the first insulating film 41, the second insulating film 42, and the third insulating film 43. For example, the first insulating film 41 may be aluminum nitride, the second insulating film 42 may be silicon oxide, and the third insulating film 43 may be aluminum silicate. Even in this configuration, the aluminum nitride of the first insulating film 41 can be crystallized while the third insulating film 43 is maintained in a nearly amorphous state.

The method for forming the first insulating film 41, second insulating film 42, and third insulating film 43 is not limited to ALD. Any method can be used as long as it can form the film while suppressing oxidation of the gallium nitride surface. For example, known methods such as remote plasma CVD and sputtering, which can suppress surface damage, can also be used.

The gate insulating film 40 disclosed in this specification can be used in a variety of semiconductor devices. For example, it can be applied to trench-gate vertical MOSFETs, normally-off HEMTs, normally-on HEMTs, and the like.

Aspects of the present technology are listed below.
[Aspect 1]
A semiconductor device having a gate insulating film provided on a single crystal gallium nitride,
The gate insulating film is
a first insulating film disposed on a surface of the gallium nitride and having hexagonal symmetry crystallinity;
a second insulating film disposed on an upper surface of the first insulating film and having a function of inhibiting propagation of crystalline information of the gallium nitride;
a third insulating film disposed on an upper surface of the second insulating film and having a dielectric constant equal to or greater than the dielectric constants of the first insulating film and the second insulating film;
It is equipped with
The semiconductor device, wherein the first insulating film has higher crystallinity than the third insulating film.
[Aspect 2]
2. The semiconductor device according to aspect 1, wherein the first insulating film is crystallized in a manner oriented toward the gallium nitride.
[Aspect 3]
3. The semiconductor device according to aspect 1, wherein the first insulating film is made of any one of aluminum nitride, aluminum silicate, hafnium oxide, and aluminum oxide.
[Aspect 4]
4. The semiconductor device according to claim 1, wherein the second insulating film is silicon oxide or silicon nitride.
[Aspect 5]
5. The semiconductor device according to any one of aspects 1 to 4, wherein the third insulating film is aluminum silicate or hafnium silicate.
[Aspect 6]
3. The semiconductor device according to aspect 1, wherein the first insulating film is made of aluminum silicate, the second insulating film is made of silicon oxide, and the third insulating film is made of aluminum silicate.
[Aspect 7]
3. The semiconductor device according to aspect 1, wherein the first insulating film is aluminum nitride, the second insulating film is silicon oxide, and the third insulating film is aluminum silicate.
[Aspect 8]
8. The semiconductor device according to claim 1, wherein the first insulating film has a thickness of 3 nm or more.
[Aspect 9]
9. The semiconductor device according to any one of aspects 1 to 8, wherein the second insulating film has a thickness of 1 nm or more.
[Aspect 10]
disposing a first insulating film having hexagonal symmetry crystallinity on a surface of the single-crystal gallium nitride;
disposing a second insulating film on an upper surface of the first insulating film, the second insulating film having a function of inhibiting propagation of crystalline information of the gallium nitride;
disposing a third insulating film on an upper surface of the second insulating film, the third insulating film having a dielectric constant equal to or higher than the dielectric constants of the first insulating film and the second insulating film;
heat-treating the gallium nitride having the first insulating film, the second insulating film, and the third insulating film;
A method for manufacturing a semiconductor device, comprising:

1: Semiconductor device 10: Semiconductor substrate 20: Nitride semiconductor 22: Body region 25: Drain region 26: Source region 28: Insulating film 32: Drain electrode 34: Source electrode 36: Body electrode 40: Gate insulating film 41: First insulating film 42: Second insulating film 43: Third insulating film 44: Gate electrode

Claims (10)

A semiconductor device having a gate insulating film provided on a single crystal gallium nitride,
The gate insulating film is
a first insulating film disposed on a surface of the gallium nitride and having hexagonal symmetry crystallinity;
a second insulating film disposed on an upper surface of the first insulating film and having a function of inhibiting propagation of crystalline information of the gallium nitride;
a third insulating film disposed on an upper surface of the second insulating film and having a dielectric constant equal to or greater than the dielectric constants of the first insulating film and the second insulating film;
It is equipped with
The semiconductor device, wherein the first insulating film has higher crystallinity than the third insulating film. The semiconductor device described in claim 1, wherein the first insulating film is crystallized in a direction oriented toward the gallium nitride. The semiconductor device of claim 1, wherein the first insulating film is made of aluminum nitride, aluminum silicate, hafnium oxide, or aluminum oxide. The semiconductor device of claim 3, wherein the second insulating film is silicon oxide or silicon nitride. The semiconductor device of claim 4, wherein the third insulating film is aluminum silicate or hafnium silicate. The semiconductor device of claim 1, wherein the first insulating film is aluminum silicate, the second insulating film is silicon oxide, and the third insulating film is aluminum silicate. The semiconductor device of claim 1, wherein the first insulating film is aluminum nitride, the second insulating film is silicon oxide, and the third insulating film is aluminum silicate. The semiconductor device of claim 1, wherein the thickness of the first insulating film is 3 nm or more. The semiconductor device of claim 1, wherein the second insulating film has a thickness of 1 nm or more. disposing a first insulating film having hexagonal symmetry crystallinity on a surface of the single-crystal gallium nitride;
disposing a second insulating film on an upper surface of the first insulating film, the second insulating film having a function of inhibiting propagation of crystalline information of the gallium nitride;
disposing a third insulating film on an upper surface of the second insulating film, the third insulating film having a dielectric constant equal to or higher than the dielectric constants of the first insulating film and the second insulating film;
heat-treating the gallium nitride having the first insulating film, the second insulating film, and the third insulating film;
A method for manufacturing a semiconductor device, comprising: