JP7750370B2 - gaming machines - Google Patents

Description

The present invention relates to an amusement machine.

Pachinko machines and slot machines are known as gaming machines. For example, pachinko machines have a tray storage section on the front of the machine that stores gaming balls given to players. The gaming balls stored in the tray storage section are guided to a gaming ball launcher and launched toward the gaming area in response to the player's launch operation. Then, for example, when a gaming ball enters a ball entry section provided in the gaming area, the gaming ball is paid out to the tray storage section from, for example, a payout device. In addition, pachinko machines are also known that have a configuration in which the tray storage section includes an upper tray storage section and a lower tray storage section. In this case, gaming balls stored in the upper tray storage section are guided to the gaming ball launcher, and surplus gaming balls in the upper tray storage section are discharged to the lower tray storage section (see, for example, Patent Document 1).

In addition, in a slot machine, when medals have been bet and the start lever is operated to start a new game, a lottery process is executed by the control means. When the lottery process is executed, the control means executes rotation start control, causing the reels to start spinning, and if the stop button is operated while the reels are spinning, the control means executes rotation stop control, causing the reels to stop spinning. If the result of the reels stopping after spinning has stopped corresponds to a winning combination in the lottery process, a bonus corresponding to that winning combination is awarded to the player.

Japanese Patent Application Laid-Open No. 2009-261415

However, gaming machines such as those exemplified above need to ensure that play is carried out smoothly, and there is still room for improvement in this regard.

The present invention was made in consideration of the circumstances exemplified above, and aims to provide a gaming machine that allows players to play games in an optimal manner.

In order to solve the above problem, the present invention provides a game device including: a game value providing means electrically connected to a predetermined detection means and executing a process for providing a game value for a game;
a processing execution means electrically connected to the game value granting means and executing a predetermined process;
In a gaming machine equipped with
The gaming value providing means
a first reference information storage means for storing reference information, which is information used in the process of awarding the gaming value and is information to be referenced in response to detection by the predetermined detection means;
a first transmitting means for transmitting a reference information signal corresponding to the reference information stored in the first reference information storage means to the processing executing means after a predetermined supply of power to the gaming machine has started and before the execution of a predetermined processing for progressing a game is started;
a second transmitting means for transmitting a predetermined information signal based on information acquired based on detection by the predetermined detecting means to the processing executing means;
a means for suspending the progress of processing until a predetermined period of time has elapsed after a predetermined supply of power to the gaming machine has started;
means for executing a predetermined determination process for determining whether or not the predetermined storage area is normal after a predetermined supply of power to the gaming machine has started and before the execution of the predetermined process is started;
Equipped with
If the predetermined storage area is determined to be abnormal in the predetermined determination process, a corresponding process is executed,
When the predetermined storage area is determined to be normal in the predetermined determination process, the first transmitting means then transmits the reference information signal,
The processing execution means
a second reference information storage means for storing reference information corresponding to the reference information signal transmitted from the game value providing means;
an execution means for executing the predetermined process based on the predetermined information signal transmitted from the second transmission means and the reference information stored in the second reference information storage means;
a processing result information storage means for storing processing result information which is information relating to the processing result of the predetermined processing performed by the execution means;
a means for erasing the processing result information stored in the processing result information storage means when a predetermined trigger occurs based on the execution of a predetermined operation;
Equipped with
The game value providing means is a main control means for controlling the progress of a game,
The processing execution means is a performance control means for controlling the execution of a performance,
The reference information signal is transmitted from the game value providing means even when a predetermined event that stops the game progress control occurs.
the first transmitting means is configured to transmit the reference information signal to the processing executing means after the predetermined period has elapsed;
When a predetermined event occurs that stops the control of the progress of the game, the predetermined control for transmitting the predetermined information signal by the second transmitting means is not executed,
The predetermined process is characterized in that it is a process different from the granting of value used for playing a game .

This invention makes it possible to ensure that games are played in an optimal manner.

1 is a perspective view showing a pachinko machine according to a first embodiment. FIG. 1 is an exploded perspective view showing the main components of a pachinko machine. FIG. 2 is a front view showing the configuration of the game board. FIG. 10 is an explanatory diagram for explaining the configuration for discharging game balls that have flowed down the game area. FIG. 2 is a front view of the main control device. FIG. 2 is a block diagram showing the electrical configuration of the pachinko machine. This is an explanatory diagram for explaining the contents of various counters used in lotteries, etc. FIG. 4 is an explanatory diagram for explaining various tables stored in the main ROM. 10 is a flowchart showing main processing executed by a main CPU. 10 is a flowchart showing a setting value update process executed by the main CPU. 10 is a flowchart showing a timer interrupt process executed by a main CPU. 10 is a flowchart showing a special chart special power control process executed by the main CPU. This is a flowchart showing the special chart change start processing executed by the main CPU. This is an explanatory diagram to explain the configuration in which the detection results of the ball entry detection sensor are input to the main CPU. This is a flowchart showing the ball entry detection process executed by the main CPU. A block diagram for explaining the electrical configuration of a dispensing control device and various devices that communicate with the dispensing control device. 10 is a flowchart showing a timer interrupt process executed by the dispensing CPU. FIG. 2 is a block diagram illustrating an electrical configuration of a management IC. FIG. 10 is an explanatory diagram illustrating the configuration of an input port of a management side I/F. FIG. 2 is an explanatory diagram for explaining the configuration of a correspondence relationship memory; FIG. 2 is an explanatory diagram illustrating the configuration of a history memory. 10 is a flowchart showing a recognition process executed by a main CPU. 10 is a flowchart showing a management process executed by a management-side CPU. 10A to 10D are time charts showing how information on the correspondence between the first to fifteenth buffers and the signal types is stored in the correspondence memory. 10 is a flowchart showing a management output process executed by the main CPU. 10 is a flowchart showing a history setting process executed by a management-side CPU. 10A to 10E are time charts showing how history information is stored in a history memory. 10 is a flowchart showing a process of outputting a set value update signal executed by a main CPU. 10 is a flowchart showing a setting update recognition process executed by a management CPU. 10 is a flowchart showing a display output process executed by a management-side CPU. 10 is a flowchart showing a display process executed by a management-side CPU. 10A is a flowchart showing a data output process executed by a main CPU, and FIG. 10B is a flowchart showing an external output process executed by a control CPU. FIG. 10 is an explanatory diagram for explaining various tables stored in a main ROM in the second embodiment. FIG. 11 is an explanatory diagram for explaining the configuration of a separate storage memory in the third embodiment. 10 is a flowchart showing a setting update recognition process executed by a management CPU. 10 is a flowchart showing a process of monitoring a repeated change executed by a management CPU; 13 is a flowchart showing a repeated change monitoring process executed by a main CPU in the fourth embodiment. 13 is a flowchart showing a setting update recognition process executed by a management-side CPU in the fifth embodiment. FIG. 20 is an explanatory diagram for explaining the configuration of a history memory in the sixth embodiment. 10 is a flowchart showing a history setting process executed by a management-side CPU. 10 is a flowchart showing a setting update recognition process executed by a management CPU. FIG. 20 is an explanatory diagram illustrating the configuration of a history memory in the seventh embodiment. 10 is a flowchart showing a setting update recognition process executed by a management CPU. FIG. 20 is an explanatory diagram for explaining the configuration of a history memory in the eighth embodiment. 10 is a flowchart showing a setting update recognition process executed by a management CPU. 10 is a flowchart showing a history setting process executed by a management-side CPU. 10 is a flowchart showing a display output process executed by a management-side CPU. FIG. 23 is an explanatory diagram illustrating the configuration of an input port of a management side I/F in the ninth embodiment. 10 is a flowchart showing a recognition process executed by a main CPU. 10 is a flowchart showing a management process executed by a management-side CPU. 10A to 10H are time charts showing how information on the correspondence between the first to twelfth buffers and the signal types is stored in the correspondence memory. A block diagram to explain the configuration of the signal path that transmits the detection results of each ball entry detection sensor to the main CPU and management IC in the 10th embodiment.

First Embodiment
A first embodiment of a pachinko gaming machine (hereinafter referred to as a "pachinko machine"), which is a type of gaming machine, will be described in detail below with reference to the drawings. Fig. 1 is a perspective view of a pachinko machine 10, and Fig. 2 is an exploded perspective view showing the main components of the pachinko machine 10. For convenience, Fig. 2 omits the components within the play area PA of the pachinko machine 10.

As shown in Figure 1, a pachinko machine 10 has an outer frame 11 that forms the outer shell of the pachinko machine 10, and a gaming machine main body 12 that is attached to the outer frame 11 so that it can rotate forward. The outer frame 11 is made up of wooden boards connected at all four sides, forming a rectangular frame. The pachinko machine 10 is installed in an amusement hall by attaching and fixing the outer frame 11 to the island equipment. Note that the outer frame 11 is not a required component of the pachinko machine 10, and the outer frame 11 may also be attached to the island equipment of the amusement hall.

As shown in Figure 2, the gaming machine main body 12 comprises an inner frame 13, a front door frame 14 disposed in front of the inner frame 13, and a rear pack unit 15 disposed behind the inner frame 13. The inner frame 13 of the gaming machine main body 12 is rotatably supported by the outer frame 11. In detail, when viewed from the front, the inner frame 13 can be rotated forward with the left side as the base end and the right side as the tip end.

A front door frame 14 is rotatably supported on the inner frame 13, and can be rotated forward with the left side as the base end and the right side as the tip end when viewed from the front. A rear pack unit 15 is also rotatably supported on the inner frame 13, and can be rotated rearward with the left side as the base end and the right side as the tip end when viewed from the front.

The gaming machine main body 12 is equipped with a locking device at its pivot tip, which functions to lock the gaming machine main body 12 so that it cannot be opened relative to the outer frame 11, and also functions to lock the front door frame 14 so that it cannot be opened relative to the inner frame 13. Each of these locked states can be released by using an unlocking key to unlock the cylinder lock 17, which is exposed on the front of the pachinko machine 10.

Next, we will explain the configuration of the front side of the gaming machine main body 12.

The inner frame 13 is primarily composed of a resin base 21 whose outer shape is approximately the same as that of the outer frame 11. A roughly oval window hole 23 is formed in the center of the resin base 21. A game board 24 is detachably attached to the resin base 21. The game board 24 is made of plywood, and a play area PA formed on the front of the game board 24 is exposed to the front side of the inner frame 13 through the window hole 23 in the resin base 21.

Here, the configuration of the game board 24 will be explained based on Figure 3. Figure 3 is a front view of the game board 24.

An inner rail portion 25 and an outer rail portion 26 are attached to the game board 24 so as to define part of the outer edge of the play area PA, and these inner rail portion 25 and outer rail portion 26 form a guide rail that serves as a guide means. Game balls launched from a game ball launching mechanism 27 (see Figure 2) attached below the window hole 23 in the resin base 21 are guided to the top of the play area PA by the guide rail.

The game ball launching mechanism 27 includes a launching rail 27a extending toward the guide rail, a ball feeding device 27b that supplies game balls stored in the upper tray 55a (described below) onto the launching rail 27a, and a solenoid 27c, which is an electric actuator that launches the game balls supplied onto the launching rail 27a toward the guide rail. The solenoid 27c is driven and controlled by rotating the launch operating device (or operating handle) 28 provided on the front door frame 14, and the game balls are launched.

The game board 24 has multiple large and small openings that penetrate in the front-to-rear direction. Each opening is equipped with a general winning opening 31, a special electric winning device 32, a first operating opening 33, a second operating opening 34, a through gate 35, a variable display unit 36, a special symbol unit 37, and a general symbol unit 38. There are a total of four general winning openings 31, and one of each of the others.

Even if a ball enters the through gate 35, no game balls will be paid out. On the other hand, when balls enter the general prize opening 31, the special electric prize opening 32, the first actuation opening 33, and the second actuation opening 34, a predetermined number of game balls will be paid out. Specifically, when one game ball enters the first actuation opening 33 or when one game ball enters the second actuation opening 34, one prize ball will be paid out; when one game ball enters the general prize opening 31, ten prize balls will be paid out; and when one game ball enters the special electric prize opening 32, fifteen prize balls will be paid out.

The number of prize balls is optional; for example, the second actuation port 34 may be configured to have fewer prize balls than the first actuation port 33, or the second actuation port 34 may be configured to have more prize balls than the first actuation port 33.

In addition, an outlet 24a is provided at the bottom of the game board 24, and game balls that do not enter the various winning holes are discharged from the game area PA through the outlet 24a. The game board 24 is also equipped with numerous nails 24b to appropriately distribute and adjust the direction in which the game balls fall, and various components such as windmills are also arranged.

Here, "entering" refers to a game ball passing through a specified opening, and includes not only the case where the game ball is discharged from the game area PA after passing through the opening, but also the case where the game ball continues to flow down the game area PA without being discharged after passing through the opening. However, in the following explanation, to clearly distinguish from game balls entering the outlet 24a, game balls entering the general winning opening 31, special electric winning device 32, first operating opening 33, second operating opening 34, and through gate 35 will also be referred to as "winning."

The first actuation port 33 and the second actuation port 34 are united as an actuation port device and installed on the game board 24. Both the first actuation port 33 and the second actuation port 34 open upward. Furthermore, both actuation ports 33, 34 are aligned vertically, with the first actuation port 33 facing upward. The second actuation port 34 is provided with a normal power device 34a, which serves as a guide piece consisting of a pair of movable pieces on the left and right. When the normal power device 34a is in a closed state, the game ball cannot enter the second actuation port 34, but when the normal power device 34a is in an open state, the game ball can enter the second actuation port 34.

A through gate 35 is provided upstream of the second actuation port 34 in the direction in which the game ball flows down. The through gate 35 has a through hole (not shown) that runs vertically through it, and game balls that enter the through gate 35 flow down the game area PA after winning. This allows game balls that enter the through gate 35 to enter the second actuation port 34.

Based on a win at the through gate 35, the normal power feature 34a of the second operating port 34 is switched from a closed state to an open state. Specifically, an internal lottery is conducted when a win is made at the through gate 35, and a changing image is displayed on the normal map display section 38a of the normal map unit 38, which is located in the lower right corner of the play area PA, an area through which game balls do not pass. If the result of the internal lottery is a win to open the normal power feature, the stop result corresponding to that result is displayed, and the changing display on the normal map display section 38a ends, the system transitions to the normal power open state. In the normal power open state, the normal power feature 34a is opened in a predetermined manner.

The map display unit 38a is configured as a segment display in which multiple segment light-emitting elements are arranged in a predetermined manner, but is not limited to this and may be configured as other types of display devices such as a liquid crystal display device, an organic EL display device, a CRT, or a dot matrix display. Possible patterns displayed on the map display unit 38a include a configuration in which multiple types of letters are displayed in a variable manner, a configuration in which multiple types of symbols are displayed in a variable manner, a configuration in which multiple types of characters are displayed in a variable manner, or a configuration in which multiple types of colors are displayed in an alternating manner.

In the normal map unit 38, a normal map reserve display section 38b is provided adjacent to the normal map display section 38a. Up to four game balls that enter the through gate 35 are reserved, and the number of reserved balls is displayed by lighting up the normal map reserve display section 38b.

A winning lottery is triggered by a winning entry into the first actuation port 33 or the second actuation port 34. The results of the lottery are then displayed clearly through the display effects on the special symbol unit 37 and the symbol display device 41 of the variable display unit 36.

Regarding the special symbol unit 37 in more detail, the special symbol unit 37 is provided with a special symbol display section 37a. The display area of the special symbol display section 37a is smaller than the display surface 41a of the symbol display device 41. In the special symbol display section 37a, a winning lottery is held when a winning bid is made through the first operating port 33 or the second operating port 34, triggering a winning lottery, and a variable or predetermined display of the symbol is displayed. The result corresponding to the lottery result is then displayed. Note that the special symbol display section 37a is configured as a segment display device in which multiple segment light-emitting elements are arranged in a predetermined manner, but is not limited to this and may be configured as a liquid crystal display device, an organic EL display device, a CRT, a dot matrix display, or another type of display device. Furthermore, the symbol displayed on the special symbol display section 37a may be configured to display multiple types of letters, multiple types of symbols, multiple types of characters, or multiple types of colors.

In the special symbol unit 37, a special symbol reserve display unit 37b is provided adjacent to the special symbol display unit 37a. Up to four game balls that enter the first operating port 33 or the second operating port 34 are reserved, and the number of reserved balls is displayed by lighting up the special symbol reserve display unit 37b.

In more detail, the pattern display device 41 is configured as a liquid crystal display device equipped with a liquid crystal display, and the display content is controlled by a display control device described below. Note that the pattern display device 41 is not limited to a liquid crystal display device, and may be another display device with a display screen such as a plasma display device, an organic EL display device, or a CRT, or may be a dot matrix display device.

In the symbol display device 41, when a symbol variable display or a predetermined display is performed in the special symbol display unit 37a based on a winning entry into the first actuation port 33 or a winning entry into the second actuation port 34, a symbol variable display or a predetermined display is performed accordingly. For example, the display surface 41a of the symbol display device 41 has three symbol rows (top, middle, and bottom) set as multiple display areas, and in each symbol row, main symbols numbered "1" through "9" are scrolled and displayed in ascending or descending order. This scrolling display first starts scrolling all symbol rows, then switches from scrolling display to standby display in the order of top symbol row → bottom symbol row → middle symbol row, and finally ends with a predetermined symbol being statically displayed in each symbol row. Then, in a game where the game result is a jackpot, a predetermined symbol combination is displayed frozen on a pre-set pay line on the display surface 41a of the symbol display device 41. Specifically, in the case of the most favorable jackpot result described below, the same odd symbol combination will be displayed, in the case of a low probability jackpot result described below, the same even symbol combination will be displayed, and in the case of a low prize high probability jackpot result described below, a symbol combination that is not the same but would not be displayed in the case of a low prize high probability jackpot result will be displayed.

The pattern display device 41 not only produces display effects triggered by a win in the first actuation port 33 or the second actuation port 34, but also produces display effects during the open/close execution mode to which it enters after a win is achieved. Furthermore, display on the special symbol display unit 37a and the pattern display device 41 begins based on a win in either actuation port 33, 34, and one game session is played until the specified result is displayed and the game ends. Furthermore, the manner in which the pattern display device 41 displays the changing patterns is not limited to the above and is arbitrary, and the number of pattern rows, the direction of the changing display of the patterns in the pattern rows, the number of patterns in each pattern row, etc. can be changed as appropriate. Furthermore, the patterns displayed by the pattern display device 41 are not limited to those described above; for example, a configuration in which only numbers are displayed as changing patterns may be used.

If a jackpot is won in a lottery based on a win through the first operating port 33 or the second operating port 34, the system transitions to an open/close execution mode, which allows a win in the special electric winning device 32. The special electric winning device 32 has a large prize opening (not shown) that leads to the back side of the game board 24, as well as an open/close door 32a that opens and closes the large prize opening. The open/close door 32a is positioned in either a closed or open state. Specifically, the open/close door 32a is normally in a closed state, which prevents game balls from winning, but if an internal lottery is successful in transitioning to the open/close execution mode, it switches to an open state, which allows game balls to win. The open/close execution mode is the mode to which the system transitions when a win occurs. Note that while a win is not impossible in the closed state, it may be configured to make it more difficult for a win to occur than in the open state.

Figure 4 is an explanatory diagram illustrating the configuration for discharging game balls that have flowed down the game area PA.

As already explained, a game ball that enters any of the general winning opening 31, special electric winning device 32, first operating opening 33, second operating opening 34, and outlet 24a is discharged from the game area PA. In other words, a game ball that is launched from the game ball launching mechanism 27 and enters the game area PA is discharged from the game area PA by entering any of the general winning opening 31, special electric winning device 32, first operating opening 33, second operating opening 34, and outlet 24a. A game ball that enters any of the general winning opening 31, special electric winning device 32, first operating opening 33, second operating opening 34, and outlet 24a is guided to the back side of the game board 24.

On the back of the gaming board 24, discharge passages 42-48 are formed corresponding to the general winning opening 31, the special electric winning device 32, the first operating opening 33, the second operating opening 34, and the outlet 24a, respectively. Gaming balls that flow into the discharge passages 42-48 flow down the discharge passages 42-48, leading to the lower end of the gaming board 24 on the back side of the gaming board 24 and being collected by a discharge ball collection section (not shown). The gaming balls collected by the discharge ball collection section are then discharged to a ball circulation device in the island equipment where the pachinko machine 10 is installed in the gaming hall.

Each discharge passage section 42-48 is provided with various detection sensors 42a-48a for detecting game balls. These discharge passage sections 42-48 and detection sensors 42a-48a are described below. As already explained, there are four general winning openings 31, and therefore there is a discharge passage section 42-44 corresponding to each of the four. In this case, one detection sensor 42a is provided for the first discharge passage section 42 corresponding to the leftmost general winning opening 31, and one detection sensor 43a is provided for the second discharge passage section 43 corresponding to the general winning opening 31 adjacent to it to the right. Specifically, the first winning opening detection sensor 42a is provided so that its detection range is located midway along the first discharge passage section 42, and the second winning opening detection sensor 43a is provided so that its detection range is located midway along the second discharge passage section 43. A gaming ball that enters the leftmost general winning opening 31 is detected by the first winning opening detection sensor 42a as it passes through the first discharge passage 42, and a gaming ball that enters the general winning opening 31 adjacent to it on the right is detected by the second winning opening detection sensor 43a as it passes through the second discharge passage 43. A third discharge passage 44 is provided for the two right-side general winning openings 31, and is formed to merge midway. The third discharge passage 44 has entrance-side regions corresponding to each of the two general winning openings 31, and these entrance-side regions merge midway to form a single exit-side region. A third winning opening detection sensor 44a is provided so that a detection range is located midway in the exit-side region of the third discharge passage 44. A gaming ball that enters either of the two right-side general winning openings 31 is detected by the third winning opening detection sensor 44a as it passes through the third discharge passage 44.

A fourth discharge passage section 45 exists in correspondence with the special electric winning device 32. A special electric detection sensor 45a is provided so that a detection range exists midway through the fourth discharge passage section 45, and a game ball that enters the special electric winning device 32 is detected by the special electric detection sensor 45a as it passes through the fourth discharge passage section 45. A fifth discharge passage section 46 exists in correspondence with the first operating port 33. A first operating port detection sensor 46a is provided so that a detection range exists midway through the fifth discharge passage section 46, and a game ball that enters the first operating port 33 is detected by the first operating port detection sensor 46a as it passes through the fifth discharge passage section 46. A sixth discharge passage section 47 exists in correspondence with the second operating port 34. A second actuation port detection sensor 47a is provided so that its detection range is located midway along the sixth discharge passage 47, and a gaming ball that enters the second actuation port 34 is detected by the second actuation port detection sensor 47a as it passes through the sixth discharge passage 47. A seventh discharge passage 48 exists in correspondence with the outlet 24a. An outlet detection sensor 48a is provided so that its detection range is located midway along the seventh discharge passage 48, and a gaming ball that enters the outlet 24a is detected by the outlet detection sensor 48a as it passes through the seventh discharge passage 48.

A gaming ball that is detected by one of the various detection sensors 42a-48a will not be detected by the other detection sensors 42a-48a. A gate detection sensor 49a is also provided for the through gate 35, and gaming balls that pass through the through gate 35 on their way down the play area PA are detected by the gate detection sensor 49a.

The various detection sensors 42a-49a are all electromagnetic induction proximity sensors, but any sensor can be used as long as it can detect game balls individually. The various detection sensors 42a-49a are electrically connected to the main control device 60, which will be described later, and the detection results of the various detection sensors 42a-49a are output to the main control device 60. Specifically, the various detection sensors 42a-49a output a LOW level signal when they are not detecting a game ball, and output a HI level signal when they are detecting a game ball. However, this is not limited to this, and the HI and LOW relationship may be reversed.

As shown in FIG. 2, a front door frame 14 is provided to cover the entire front side of the inner frame 13, which is formed by attaching the game board 24 configured as described above to the resin base 21. As shown in FIG. 1, the front door frame 14 has a window portion 51 formed therein, which allows almost the entire game area PA to be viewed from the front. The window portion 51 is approximately elliptical in shape and has a window panel 52 fitted into it. The window panel 52 is made of colorless and transparent glass, but is not limited to this and may be made of colorless and transparent synthetic resin, or may be made of colored and transparent as long as the game area PA can be viewed through the window panel 52 from the front of the pachinko machine 10.

A display light-emitting unit 53 is provided above the window 51. A pair of left and right speakers 54 are also provided, which output sound effects according to the game status. An upper bulge 55 and a lower bulge 56, which bulge toward the front, are arranged side by side below the window 51. An upper tray 55a with an upward opening is provided inside the upper bulge 55, and a lower tray 56a with a similar upward opening is provided inside the lower bulge 56. The upper tray 55a temporarily stores game balls dispensed from the dispensing device (described below) and guides them in a row toward the game ball launching mechanism 27. The lower tray 56a also stores surplus game balls in the upper tray 55a.

Next, we will explain the configuration on the back side of the gaming machine main body 12.

As shown in Figure 2, a main control device 60, which is responsible for the main control of the game, is mounted on the back of the inner frame 13 (specifically, the game board 24). Figure 5 is a front view of the main control device 60.

As shown in Figure 5, the main control device 60 comprises a main control board 61 housed in a board box 60a. An MPU 62 is mounted on one of the surfaces of the main control board 61, which is the device mounting surface. The board box 60a is transparent so that the MPU 62 housed within the board box 60a can be seen from outside the board box 60a. Note that while the board box 60a is colorless and transparent, it may also be colored and transparent as long as the MPU 62 housed within the board box 60a can be seen from outside the board box 60a. The main control device 60 is mounted on the back surface of the resin base 21 so that the opposing wall portion 60b of the board box 60a that faces the device mounting surface of the main control board 61 faces the rear of the pachinko machine 10. Therefore, by opening the gaming machine main body 12 toward the front of the pachinko machine 10 relative to the outer frame 11 and exposing the back surface of the resin base 21, it becomes possible to visually observe the opposing wall portion 60b of the base box 60a, and also to visually observe the MPU 62 through said opposing wall portion 60b.

The board box 60a is formed by combining multiple case bodies 60c one behind the other. These multiple case bodies 60c are provided with connecting portions 60e that prevent the case bodies 60c from separating and leave a trace of the separation. Multiple connecting portions 60e are arranged side by side along one side of the roughly rectangular board box 60a. This makes it possible to prevent the separation of the case bodies 60c again by subsequently connecting another connecting portion 60e, even if some connecting portions 60e are used to prevent the separation of the case bodies 60c and the case bodies 60c are separated by destroying those connecting portions 60e. Furthermore, because the connecting portions 60e are destroyed when the case bodies 60c are separated, leaving a trace, it is possible to visually check the connecting portions 60e to determine whether the case bodies 60c have been separated improperly. Additionally, a sealing sticker 60f is affixed to the side of the board box 60a opposite the side on which the connecting portions 60e are arranged, spanning the boundary between the case bodies 60c. When the sealing sticker 60f is peeled off, the adhesive layer remains on the case body 60c. This makes it possible to leave a trace if the sealing sticker 60f is peeled off when the case bodies 60c are separated.

In the main control device 60 configured as described above, the main control board 61 is provided with a setting key insertion section 68a into which a setting key owned by the gaming hall manager is inserted and turned ON to trigger an opportunity to change the setting state of the pachinko machine 10 within the range of "Setting 1" to "Setting 6," an update button 68b that is operated to sequentially change the setting state of the pachinko machine 10 after the setting key insertion section 68a is turned ON, a reset button 68c that is operated to clear data in the main RAM 65 (described below) provided in the MPU 62 of the main control device 60, and first to third notification display devices 69a to 69c that notify the results of game history management. The MPU 62 mounted on the main control board 61 is also provided with a read terminal 68d for connecting to an external device so that the external device can read the game history management results or the information (programs and data) stored in the main ROM 64. Note that the setting status of the pachinko machine 10 is not limited to six levels from "Setting 1" to "Setting 6" and can be any number of levels.

The setting key insertion section 68a, update button 68b, reset button 68c, reading terminal 68d (i.e., MPU 62), and first to third alarm display devices 69a-69c are all provided on the device mounting surface of the main control board 61. As already explained, the device mounting surface of the main control board 61 faces the opposing wall 60b of the circuit board box 60a. However, the opposing wall 60b does not cover the setting key insertion section 68a, update button 68b, reset button 68c, and reading terminal 68d. In other words, the opposing wall 60b has separate openings in the areas facing the setting key insertion section 68a, update button 68b, reset button 68c, and reading terminal 68d. This allows the setting key to be inserted into the setting key insertion section 68a, the update button 68b to be pressed, the reset button 68c to be pressed, and the reading terminal 68d to be connected to a connection terminal for an external device, without having to open the circuit board box 60a.

By inserting a setting key into the setting key insertion portion 68a and rotating it in a predetermined direction, the setting key insertion portion 68a is turned ON. In this state, starting the supply of operating power to the pachinko machine 10 (i.e., starting the supply of operating power to the MPU 62 of the main control device 60) puts the pachinko machine 10 into a changeable state, allowing the setting state to be changed. In this state, each time the update button 68b is pressed, the setting state of the pachinko machine 10 changes by one step in ascending order from "Setting 1" to "Setting 6." Note that if the update button 68b is operated while the pachinko machine is in "Setting 6," the setting state is updated to "Setting 1." Furthermore, by rotating the setting key inserted into the setting key insertion portion 68a from the ON position in the opposite direction to the predetermined direction and returning it to its initial position, the setting key insertion portion 68a is turned OFF. When the setting key insertion portion 68a is turned OFF, the changeable state ends, and gameplay is resumed with the setting values at that time. In other words, even if you operate the update button 68b after the changeable state has ended, the setting value cannot be changed.

The ON operation of the setting key insertion section 68a is only valid when the supply of operating power to the pachinko machine 10 begins (i.e., when the supply of operating power to the MPU 62 of the main control unit 60 begins). Therefore, even if the ON operation of the setting key insertion section 68a is performed after the processing at the start of the supply of operating power in the MPU 62 of the main control unit 60 has finished, the setting value cannot be changed.

The setting state of the pachinko machine 10 determines the degree of advantage per unit time for that pachinko machine 10, with the larger the value of "setting n" (n is an integer between "1" and "6") (i.e., the higher the setting value), the higher the degree of advantage. As will be described in more detail below, the win/lose lottery mode that determines the probability of winning a jackpot outcome is a low probability mode with a relatively low probability of winning, and a high probability mode with a relatively high probability of winning, and the higher the setting value, the higher the probability of winning a jackpot outcome in low probability mode. On the other hand, the probability of winning a jackpot outcome in high probability mode remains constant regardless of the setting value.

As described above, the reset button 68c is operated to clear the data in the main RAM 65, but in order to clear this data, the supply of operating power to the pachinko machine 10 must be started while the reset button 68c is pressed (i.e., the supply of operating power to the MPU 62 of the main control device 60 must be started). The ON operation of the reset button 68c is only valid when the supply of operating power to the pachinko machine 10 begins (i.e., when the supply of operating power to the MPU 62 of the main control device 60 begins). Therefore, even if the reset button 68c is pressed after the processing at the start of the supply of operating power in the MPU 62 of the main control device 60 has finished, the data in the main RAM 65 cannot be cleared.

As already explained, the read terminal 68d is connected to the connection terminal of an external device so that the external device can read the game history management results or the information (programs and data) stored in the main ROM 64. However, in order to output data to the external device, the supply of operating power to the pachinko machine 10 must be started while the connection terminal of the external device is connected to the read terminal 68d (i.e., the supply of operating power to the MPU 62 of the main control unit 60 must be started). Connection of an external device to the read terminal 68d is only valid when the supply of operating power to the pachinko machine 10 begins (i.e., when the supply of operating power to the MPU 62 of the main control unit 60 begins). Therefore, even if an external device is connected to the read terminal 68d after the MPU 62 of the main control unit 60 has completed processing to start the supply of operating power, no external output will be made to the external device.

The first through third alarm display devices 69a through 69c are all segment displays with an arrangement of seven LED display segments, but are not limited to this and may be a single light-emitting element of a multi-color type, a liquid crystal display, or an organic electroluminescence (EL) display. The first through third alarm display devices 69a through 69c are all installed so that their display surfaces face the direction of the element mounting surface of the main control board 61, and are covered by the opposing wall 60b of the board box 60a. In this case, because the board box 60a is made transparent, the display surfaces of the first through third alarm display devices 69a through 69c housed within the board box 60a can be viewed from outside the board box 60a. Furthermore, as already explained, the main control device 60 is mounted on the back surface of the resin base 21 so that the opposing wall portion 60b, which faces the element mounting surface of the main control board 61 in the board box 60a, faces the rear of the pachinko machine 10. Therefore, when the gaming machine main body 12 is opened toward the front of the pachinko machine 10 relative to the outer frame 11 and the back surface of the resin base 21 is exposed toward the front of the pachinko machine 10, the display surfaces of the first to third notification display devices 69a to 69c can be seen through the opposing wall portion 60b.

The display surface of the first notification display device 69a displays not only the numbers "0" through "9" but also various characters, including alphabetic characters. Meanwhile, the second notification display device 69b and the third notification display device 69c display the numbers "0" through "9." The results of game history management are reported using the first through third notification display devices 69a through 69c; the details of these reports will be explained in detail later. Furthermore, when the setting state of the pachinko machine 10 is in a changeable state, where it is possible to change the setting state, a value corresponding to the current setting value is displayed on the third notification display device 69c. Note that the value corresponding to the setting value may be displayed on either the first notification display device 69a or the second notification display device 69b. Alternatively, the setting value before the changeable state may be displayed on one of the first through third notification display devices 69a through 69c, and the current setting value may be displayed on another of the first through third notification display devices 69a through 69c.

As shown in Figure 2, the rear pack unit 15 is installed to cover the rear side of the inner frame 13, including the main control unit 60. The rear pack unit 15 includes a rear pack 72 made of transparent synthetic resin, to which a dispensing mechanism 73 and a control unit assembly unit 74 are attached.

The payout mechanism 73 includes a tank 75 to which game balls are successively replenished from the island equipment in the gaming hall, and a payout device 76 for paying out the game balls stored in the tank 75. Game balls paid out from the payout device 76 are discharged onto the upper tray 55a or the lower tray 56a through a payout passage provided downstream of the payout device 76. The payout mechanism 73 is supplied with a main power supply of, for example, 24 volts AC, and is equipped with a back pack board having a power switch for turning the power on and off.

The control device aggregate unit 74 is equipped with a payout control device 77 that has the function of controlling the payout device 76, and a power supply/launch control device 78 that generates and outputs the predetermined power required by various control devices, etc., and controls the launch of game balls in response to the player's operation of the launch operation device 28. The payout control device 77 and power supply/launch control device 78 are stacked one behind the other, with the payout control device 77 at the rear of the pachinko machine 10.

<Electrical configuration of pachinko machine 10>
FIG. 6 is a block diagram showing the electrical configuration of the pachinko machine 10.

The main control device 60 comprises a main control board 61, which is responsible for the main control of the game, and a power outage monitoring board 67, which monitors the power supply. The main control board 61 is equipped with an MPU 62. The MPU 62 contains a main CPU 63, which is a processing device including a control unit and an arithmetic unit, as well as a main ROM 64, a main RAM 65, and a management IC 66. In addition to the above elements, the MPU 62 also contains an interrupt circuit, a timer circuit, a data input/output circuit, various counter circuits such as a random number generator, and more.

The main ROM 64 is a memory (i.e., non-volatile storage means) that does not require an external power supply to retain data, such as a NOR flash memory or NAND flash memory, and is used for read-only purposes. The main ROM 64 stores various control programs and fixed value data executed by the main CPU 63.

The main RAM 65 is a type of memory (i.e., a volatile memory means) that requires an external power supply to retain data, such as SRAM or DRAM, and is used for both reading and writing. The main RAM 65 is randomly accessible and has a faster read time than the main ROM 64 when compared for the same data capacity. The main RAM 65 temporarily stores various data for the execution of the control programs stored in the main ROM 64.

The management IC 66 is a management device that manages game history based on information supplied from the main CPU 63. Details will be described later, but the management IC 66 keeps track of the ball entry history into the general winning opening 31, the special electric winning device 32, the first operating opening 33, the second operating opening 34, and the outlet 24a, and also keeps track of the ball entry frequency into the general winning opening 31, the special electric winning device 32, the first operating opening 33, and the second operating opening 34 based on the ball entry history. The management IC 66 also keeps track of the frequency of the opening/closing execution mode and the high frequency support mode, which will be described later.

The MPU 62 has an input port and an output port. The input side of the MPU 62 is connected to a power outage monitoring board 67 and a dispensing control device 77 provided in the main control device 60. The power outage monitoring board 67 is connected to a power supply/launch control device 78, which has the function of supplying operating power, and operating power is supplied to the MPU 62 via the power outage monitoring board 67.

Various sensors, such as the ball entry detection sensors 42a-49a, are connected to the input side of the MPU 62. As already explained, the ball entry detection sensors 42a-49a include the first entry port detection sensor 42a, the second entry port detection sensor 43a, the third entry port detection sensor 44a, the special electric current detection sensor 45a, the first operating port detection sensor 46a, the second operating port detection sensor 47a, the exit port detection sensor 48a, and the gate detection sensor 49a. Based on the detection results of these ball entry detection sensors 42a-49a, the main CPU 63 determines whether a ball has entered each entry port. The main CPU 63 also conducts various lotteries based on whether a ball has entered the first operating port 33, and various lotteries based on whether a ball has entered the second operating port 34.

The input side of the MPU 62 is provided with a setting key insertion section 68a, an update button 68b, and a reset button 68c, which are provided on the main control board 61. The setting key insertion section 68a is provided with a sensor (not shown), which detects whether the setting key insertion section 68a is positioned for the ON operation or the OFF operation. The main CPU 63 then determines whether the setting key insertion section 68a is positioned for the ON operation or the OFF operation based on the detection results from the sensor. The update button 68b is provided with a sensor (not shown), which detects whether the update button 68b has been pressed. The main CPU 63 then determines whether the update button 68b has been pressed based on the detection results from the sensor. The reset button 68c is provided with a sensor (not shown), which detects whether the reset button 68c has been pressed. The main CPU 63 then determines whether the reset button 68c has been pressed based on the detection results from the sensor.

The output side of the MPU 62 is connected to a power outage monitoring board 67, a payout control device 77, and an audio/light emitting control device 81. A prize ball command is output to the payout control device 77, for example, when a game ball enters a prize ball entry section among the entry sections, where the occurrence of the ball entry corresponds to the payout of the game ball. Various commands, such as a variation command, a type command, and an opening command, are output to the audio/light emitting control device 81.

Connected to the output side of the MPU 62 are the special power drive unit 32b, which opens and closes the opening/closing door 32a of the special power winning device 32, the normal power drive unit 34b, which opens and closes the normal power device 34a of the second operating port 34, the special chart unit 37, and the normal chart unit 38. Incidentally, the special chart unit 37 is provided with a special chart display unit 37a and a special chart reserved display unit 37b, all of which are connected to the output side of the MPU 62. Similarly, the normal chart unit 38 is provided with a normal chart display unit 38a and a normal chart reserved display unit 38b, all of which are connected to the output side of the MPU 62. The main control board 61 is provided with various driver circuits, and the MPU 62 controls the drive of the various drive units and displays through these driver circuits.

In other words, in the opening/closing execution mode, the main CPU 63 controls the drive of the special power drive unit 32b so that the special power winning device 32 is opened and closed. Furthermore, if the open state of the normal power device 34a is selected, the main CPU 63 controls the drive of the normal power drive unit 34b so that the normal power device 34a is opened and closed. Furthermore, during each game round, the main CPU 63 controls the display of the special chart display unit 37a. Furthermore, when the result of the lottery as to whether or not the normal power device 34a is to be opened is to be displayed, the main CPU 63 controls the display of the normal chart display unit 38a. In addition, when a win occurs in the first operating port 33 or the second operating port 34, or when a change display starts in the special chart display unit 37a, the main CPU 63 executes display control of the special chart reserve display unit 37b, and when a win occurs in the through gate 35, or when a change display starts in the regular chart display unit 38a, the main CPU 63 executes display control of the regular chart reserve display unit 38b.

The first to third alert display devices 69a to 69c are connected to the output side of the MPU 62. The results of game history management by the management IC 66 are reported through displays on the first to third alert display devices 69a to 69c. When the settings of the pachinko machine 10 are changed, the current setting value is displayed on the third alert display device 69c. In this case, the display of the first alert display device 69a and the second alert display device 69b is controlled by the management IC 66 and not by the main CPU 63, whereas the display of the third alert display device 69c is controlled by both the main CPU 63 and the management IC 66. Display control by the main CPU 63 takes priority over display control by the management IC 66 for the display of the third alert display device 69c.

However, this is not limited to this, and the third alert display device 69c may also be configured so that its display is controlled by the management IC 66 and not by the main CPU 63. In this case, when the setting state of the pachinko machine 10 is changed and the current setting value is to be displayed on the third alert display device 69c, the main CPU 63 may instruct the management IC 66 to display the setting value.

The MPU 62 is provided with a read terminal 68d. A sensor (not shown) is provided on the read terminal 68d, and this sensor detects whether or not an external device connection terminal is connected to the read terminal 68d. The main CPU 63 then determines whether or not an external device connection terminal is connected to the read terminal 68d based on the detection results from the sensor. Furthermore, if an external device is connected to the read terminal 68d, the results of game history management in the management IC 66 or information (programs and data) stored in the main ROM 64 are output to the external device.

The power outage monitoring board 67 relays between the main control board 61 and the power supply/launch control device 78, and monitors the maximum voltage output from the power supply/launch control device 78, which is a stable DC voltage of 24 volts. The payout control device 77 controls the payout of prize balls and loan balls using the payout device 76 based on the prize ball command received from the main control device 60.

The power supply and launch control device 78 is connected to a commercial power source (external power source) in, for example, an amusement hall. It generates the necessary operating power for the main control board 61, payout control device 77, etc. based on the external power supplied from the commercial power source, and supplies the generated operating power. Incidentally, the power supply and launch control device 78 is provided with a power supply unit for power outages, such as a backup capacitor. Even when the power to the pachinko machine 10 is turned off, this power supply unit supplies power for memory retention to the main RAM 65 of the main control device 60 and the payout control device 77. The power supply and launch control device 78 also controls the launch of the game ball launching mechanism 27, which is activated when predetermined launch conditions are met. As already explained, the payout mechanism 73 is also provided with a power switch. Turning the power switch ON starts the supply of operating power to the pachinko machine 10, and turning the power switch OFF stops the supply of operating power to the pachinko machine 10.

The audio and light control device 81 drives and controls the display light-emitting unit 53 and speaker unit 54 provided on the front door frame 14 based on various commands received from the main control device 60, and also controls the display control device 82. The display control device 82 controls the display of the pattern display device 41 based on commands received from the audio and light-emitting control device 81.

<Electrical configuration for performing various lotteries by the main CPU 63>
Next, the electrical configuration for performing various lotteries in the main CPU 63 will be described with reference to FIG.

During play, the main CPU 63 uses various counter information to perform the jackpot lottery, set the display in the special symbol display unit 37a, set the symbol display on the symbol display device 41, and set the display in the normal symbol display unit 38a. Specifically, as shown in FIG. 7, the main CPU 63 uses a hit random number counter C1 used to determine the hit lottery, a jackpot type counter C2 used to determine the type of jackpot, a reach random number counter C3 used to determine the reach lottery when the symbol display device 41 changes due to a miss, a random number initial value counter CINI used to set the initial value of the hit random number counter C1, and a change type counter CS that determines the display duration on the special symbol display unit 37a and the symbol display device 41. Furthermore, the main CPU 63 uses a normal power feature release counter C4 used to determine whether the normal power feature 34a of the second operating port 34 is set to the normal power release state. The above counters C1-C3, CINI, CS, and C4 are provided in the various counter area 65b of the main RAM 65.

Each counter C1-C3, CINI, CS, and C4 is a loop counter that adds 1 to the previous value each time it is updated and returns to "0" after reaching its maximum value. Each counter is updated at short intervals. Information corresponding to the winning random number counter C1, the big win type counter C2, and the reach random number counter C3 is stored in the reserved storage area 65a provided as acquired information storage means in the main RAM 65 when a winning occurs in the first actuation port 33 or the second actuation port 34.

The reserve storage area 65a comprises a reserve area RE and an execution area AE. The reserve area RE comprises a first reserve area RE1, a second reserve area RE2, a third reserve area RE3, and a fourth reserve area RE4. Combinations of numerical information from the win random number counter C1, jackpot type counter C2, and reach random number counter C3 are stored as reserve information in one of the reserve areas RE1 to RE4, according to the winning history of the first actuation port 33 or the second actuation port 34.

In this case, if multiple consecutive wins occur in the first actuation port 33 or the second actuation port 34, the numerical information is stored in the first hold area RE1 to the fourth hold area RE4 in chronological order: first hold area RE1 → second hold area RE2 → third hold area RE3 → fourth hold area RE4. By providing four hold areas RE1 to RE4 in this way, up to four winning ball entries in the first actuation port 33 or the second actuation port 34 can be reserved and stored.

The number of items that can be stored on hold is not limited to four and can be any number, such as two, three, five or more, or it can be singular.

The execution area AE is an area for moving the numerical information stored in the first reserve area RE1 of the reserve area RE when the variable display of the special chart display section 37a begins, and at the start of one game, a win/loss determination is made based on the various numerical information stored in the execution area AE.

We will explain each of the above counters in detail below.

First, we will explain the normal power feature release counter C4. The normal power feature release counter C4 is configured to increment by one within a range of, for example, 0 to 250, and return to "0" after reaching its maximum value. The normal power feature release counter C4 is updated periodically, and is stored in the normal power reserve area 65c of the main RAM 65 when a gaming ball enters the through gate 35. Then, at a predetermined timing, a lottery is held to determine whether or not to control the normal power feature 34a to an open state based on the value of the stored normal power feature release counter C4.

This pachinko machine 10 has multiple support modes that differ from one another in the manner of support provided by the normal power device 34a. In detail, the support modes are set to a high-frequency support mode and a low-frequency support mode so that the frequency with which the normal power device 34a of the second operating port 34 opens per unit time is relatively high or low when compared to a situation in which game balls are continuously being released in the same manner into the play area PA.

In the high-frequency support mode and the low-frequency support mode, the probability of winning the normal power release state in the normal power release lottery using the normal power device release counter C4 is the same (for example, 4/5 in both), but in the high-frequency support mode, the number of times the normal power device 34a will be in the open state when the normal power release state is won is set to be more than in the low-frequency support mode, and the opening time for each opening is set to be longer. In this case, if the normal power release state is won in the high-frequency support mode and the normal power device 34a is in the open state multiple times, the closing time from the end of one opening state to the start of the next opening state is set to be shorter than the opening time for each opening. Furthermore, in the high-frequency support mode, the minimum time ensured between one normal power release lottery and the next normal power release lottery (i.e., the duration of one display on the normal power display unit 38a) is set to be shorter than in the low-frequency support mode.

As described above, in the high-frequency support mode, the probability of a winning entry into the second actuation port 34 is higher than in the low-frequency support mode. In other words, in the low-frequency support mode, the probability of a winning entry into the first actuation port 33 is higher than in the second actuation port 34, but in the high-frequency support mode, the probability of a winning entry into the second actuation port 34 is higher than in the first actuation port 33. Furthermore, when a winning entry into the second actuation port 34 occurs, a predetermined number of game balls are paid out, so in the high-frequency support mode, the player can play without losing too many balls.

The configuration for increasing the frequency of normal power release state per unit time in the high-frequency support mode compared to the low-frequency support mode is not limited to the above, and may be configured to increase the probability of winning the normal power release state in the normal power release lottery, for example. Furthermore, in a configuration in which multiple types of reserved time are available between one normal power release lottery and the next (for example, the time of the variable display executed by the normal power display unit 38a based on winning through gate 35), the high-frequency support mode may be configured so that a shorter reserved time is more likely to be selected or the average reserved time is shorter than in the low-frequency support mode. Furthermore, the advantage of the high-frequency support mode over the low-frequency support mode may be increased by applying any one or any combination of the following conditions: increasing the number of releases, lengthening the open time, shortening the reserved time between one normal power release lottery and the next, shortening the average reserved time, and increasing the probability of winning.

As previously explained, the pachinko machine 10 has setting states "Setting 1" through "Setting 6." The opening frequency and opening mode of the normal power device 34a in the low-frequency support mode are the same regardless of the setting value, and the opening frequency and opening mode of the normal power device 34a in the high-frequency support mode are also the same regardless of the setting value. However, this is not limited to this, and at least one of the opening frequency and opening mode of the normal power device 34a for at least one of the low-frequency support mode and the high-frequency support mode may be configured to vary depending on the setting state of the pachinko machine 10. For example, the higher the setting value, the higher the opening frequency of the normal power device 34a in the low-frequency support mode. Alternatively, the probability of a game ball entering the second operating port 34 when the normal power device 34a is opened once in the low-frequency support mode may be increased. Furthermore, the higher the set value, the more frequently the normal power device 34a opens in the high frequency support mode, and the higher the probability of a game ball entering the second operating port 34 when the normal power device 34a opens once in the high frequency support mode.

Next, we will explain the winning random number counter C1. The winning random number counter C1 is configured to increment by one within a range of, for example, 0 to 599, and return to "0" after reaching its maximum value. In particular, when the winning random number counter C1 completes one cycle, the value of the random number initial value counter CINI at that time is read as the initial value of the winning random number counter C1. Note that the random number initial value counter CINI is a loop counter similar to the winning random number counter C1 (value = 0 to 599). The winning random number counter C1 is updated periodically and stored in the reserved storage area 65a of the main RAM 65 when a gaming ball enters the first actuation port 33 or the second actuation port 34.

The random number value that results in a jackpot is stored in the main ROM 64 as a hit/miss table. Figure 8 is an explanatory diagram illustrating the various tables stored in the main ROM 64. The hit/miss tables stored include low-probability hit/miss tables 64a-64f for the low-probability mode and high-probability hit/miss table 64g for the high-probability mode.

The low-probability hit/miss tables 64a-64f are provided in a one-to-one correspondence with the setting states of "Setting 1" to "Setting 6." That is, there is a setting 1 low-probability hit/miss table 64a that is referenced when the setting state of the pachinko machine 10 is "Setting 1," a setting 2 low-probability hit/miss table 64b that is referenced when the setting state of the pachinko machine 10 is "Setting 2," a setting 3 low-probability hit/miss table 64c that is referenced when the setting state of the pachinko machine 10 is "Setting 3," a setting 4 low-probability hit/miss table 64d that is referenced when the setting state of the pachinko machine 10 is "Setting 4," a setting 5 low-probability hit/miss table 64e that is referenced when the setting state of the pachinko machine 10 is "Setting 5," and a setting 6 low-probability hit/miss table 64f that is referenced when the setting state of the pachinko machine 10 is "Setting 6."

These low-probability tables 64a-64f are set so that the higher the setting value, the higher the probability of winning a jackpot. Specifically, when the low-probability table 64a for setting 1 is referenced, the jackpot result occurs at approximately 1 in 320, when the low-probability table 64b for setting 2 is referenced, the jackpot result occurs at approximately 1 in 310, when the low-probability table 64c for setting 3 is referenced, the jackpot result occurs at approximately 1 in 300, when the low-probability table 64d for setting 4 is referenced, the jackpot result occurs at approximately 1 in 290, when the low-probability table 64e for setting 5 is referenced, the jackpot result occurs at approximately 1 in 280, and when the low-probability table 64f for setting 6 is referenced, the jackpot result occurs at approximately 1 in 270. As a result, when the setting state of the pachinko machine 10 is set at a higher value, the jackpot result is more likely to occur in low probability mode, which is advantageous for players.

On the other hand, only one type of high-probability win/loss table 64g is provided so that it is common to all settings, from "Setting 1" to "Setting 6." The high-probability win/loss table 64g is set to have a higher probability of winning a jackpot than the low-probability win/loss tables 64a to 64f, regardless of the setting, from "Setting 1" to "Setting 6." Specifically, when the high-probability win/loss table 64g is referenced, the jackpot result occurs at approximately 1/30. This makes it possible to make the high-probability mode more advantageous than the low-probability mode, regardless of the setting of the pachinko machine 10. Furthermore, by entering the high-probability mode even in the lowest setting, "Setting 1," it is possible to increase the probability of winning a jackpot compared to the low-probability mode of the highest setting, "Setting 6." Furthermore, it is possible to prevent advantages or disadvantages arising from the setting of the pachinko machine 10 for the high-probability mode, and it is also possible to reduce the storage capacity required to pre-store the high-probability win/loss table 64g in the main ROM 64.

The jackpot type counter C2 is configured to increment by one within the range of 0 to 29, and return to "0" after reaching its maximum value. The jackpot type counter C2 is updated periodically, and is stored in the reserved storage area 65a when a gaming ball enters the first actuation port 33 or the second actuation port 34.

This pachinko machine 10 has multiple jackpot results set. These multiple jackpot results are set by providing differences in three conditions: (1) the manner of opening and closing control of the special electric prize winning device 32 in the opening and closing execution mode, (2) the lottery mode of the winning/losing lottery means after the opening and closing execution mode ends, and (3) the support mode of the regular electric device 34a of the second operating port 34 after the opening and closing execution mode ends.

In the opening and closing execution mode, the opening and closing control of the special electric winning device 32 is set to a high-frequency winning mode and a low-frequency winning mode so that the frequency of winning in the special electric winning device 32 is relatively high and low from the start to the end of the opening and closing execution mode. Specifically, in either the high-frequency winning mode or the low-frequency winning mode, a predetermined number of rounds of play are played up to the upper limit.

A round of play is a game that continues until one of the following conditions is met: a predetermined maximum duration has elapsed, or a predetermined maximum number of game balls have entered the special electric winning device 32. Furthermore, the number of rounds of play in the open/close execution mode triggered by a jackpot result is the same fixed number of rounds, regardless of the type of jackpot result that triggered the transition. Specifically, regardless of the jackpot result, the maximum number of rounds of play is set to 15.

In addition, in this pachinko machine 10, multiple types of opening modes of the special electric winning device 32 are set, with different opening durations from when the special electric winning device 32 is opened until when it is closed. In detail, there is a long-time mode in which the opening duration is set to a long time of 29 seconds, and a short-time mode in which the opening duration is set to a short time of 0.06 seconds, which is shorter than the long time.

In this pachinko machine 10, when the launch operation device 28 is operated by the player, the game ball launch mechanism 27 is driven and controlled so that one game ball is launched toward the play area PA every 0.6 seconds. The upper limit for the number of balls required to complete a round play is set to nine. In this case, the long-time mode among the above-mentioned release modes sets the release duration to a time longer than the product of the game ball launch cycle and one round play. On the other hand, the short-time mode sets the release duration to a time shorter than the product of the game ball launch cycle and one round play, or more specifically, shorter than the game ball launch cycle. Therefore, when a single release is performed in the long-time mode, it is expected that the special electric winning device 32 will win the maximum number of prizes in one round play. When a single release is performed in the short-time mode, it is expected that the special electric winning device 32 will not win any prizes, or that, if any, only one prize will be won.

In the high-frequency winning mode, the special electric winning device 32 is opened once in a long-term mode during each round of play. On the other hand, in the low-frequency winning mode, the special electric winning device 32 is opened once in a short-term mode during each round of play.

In addition, the number of times the special electric winning device 32 is opened and closed, the number of rounds of play, the duration of opening for one opening, and the upper limit number of rounds of play in one round of play in the high frequency winning mode and low frequency winning mode are not limited to the above values and are arbitrary, as long as the frequency of winning in the special electric winning device 32 from the start to the end of the opening and closing execution mode is higher in the high frequency winning mode than in the low frequency winning mode.

As shown in Figure 8, the allocation destinations of jackpot results for jackpot type counter C2 are stored in main ROM 64 as allocation table 64h. In addition, allocation table 64h sets the allocation destinations of jackpot results in the event of a jackpot result as a low-probability jackpot result, a low-prize high-probability jackpot result, and a most favorable jackpot result.

A low-probability jackpot result is one in which the opening/closing execution mode becomes high-frequency winning mode, and after the opening/closing execution mode ends, the win/lose lottery mode becomes low-probability mode, and the support mode becomes high-frequency support mode. However, this high-frequency support mode will transition to low-frequency support mode if the number of plays reaches the termination threshold number (specifically, 100 plays) after the transition.

A low-prize, high-probability jackpot result is one in which the open/close execution mode becomes low-frequency win mode, and after the open/close execution mode ends, the win/lose lottery mode becomes high-probability mode and the support mode becomes high-frequency support mode. These high-probability mode and high-frequency support mode will continue until the lottery result in a win in the win/lose lottery and the game transitions to the jackpot state.

The most favorable jackpot result is one in which the open/close execution mode becomes high-frequency winning mode, and after the open/close execution mode ends, the win/lose lottery mode becomes high-probability mode and the support mode becomes high-frequency support mode. These high-probability mode and high-frequency support mode will continue until the lottery result in a win in the win/lose state and the game transitions to the jackpot state.

In relation to the above game states, the normal game state refers to a state in which the win/lose lottery mode is not the open/close execution mode, and the win/lose selection mode is the low probability mode, and the support mode is the low frequency support mode. Also, a configuration in which a low-winning, high-probability jackpot result is not set as a game result may be adopted. Furthermore, in the open/close execution mode in which a low-winning, high-probability jackpot result is achieved, the number of rounds of play may be fewer than in the case of a low-probability jackpot result and a most favorable jackpot result.

In allocation table 64h, of the jackpot type counter C2 values "0-29," "0-9" corresponds to a low-probability jackpot result, "10-14" corresponds to a low-prize, high-probability jackpot result, and "15-29" corresponds to the most favorable jackpot result.

Only one type of allocation table 64h is provided so that it is common to all settings, from "Setting 1" to "Setting 6." This makes it possible to prevent advantages or disadvantages in the allocation pattern of jackpot results from arising depending on the setting of the pachinko machine 10, and also makes it possible to reduce the storage capacity required to pre-store the allocation table 64h in the main ROM 64.

The allocation of jackpot results may be different depending on the settings of the pachinko machine 10. For example, the higher the setting value, the higher the probability of being allocated to the most favorable jackpot result, or the higher the setting value, the higher the probability of being allocated to the most favorable jackpot result or a low-prize, high-probability jackpot result. In this case, the higher the setting value, the higher the probability of entering a high-probability mode after a jackpot result. Also, the higher the setting value, the lower the probability of being allocated to a low-prize, high-probability jackpot result, or a high setting value may not allocate to a low-prize, high-probability jackpot result, while a low setting value may allocate to a low-prize, high-probability jackpot result. In this case, the higher the setting value, the higher the probability of the high-frequency winning mode opening/closing execution mode occurring.

Next, the reach random number counter C3 will be described. The reach random number counter C3 is configured to increment by one within a range of, for example, 0 to 238, and return to "0" after reaching a maximum value. This pachinko machine 10 has an expectation effect set as one type of display effect on the symbol display device 41. In a gaming machine equipped with a symbol display device 41 capable of displaying varying symbols, where the final stop result in a game round resulting in a predetermined jackpot result is a prize-related result, the expectation effect refers to a display state that makes the player believe that the variable display state is likely to result in the prize-related result between the start of the display of varying symbols on the symbol display device 41 and the stage at which the stop result is derived and displayed. Specifically, the prize-related result is the display of a combination of symbols with the same number on one of the pay lines.

There are two types of expected effects: a reach display and a warning display that is set before a reach display occurs, to anticipate the occurrence of a reach display or a corresponding result.

The reach display includes a display state in which a reach pattern combination is displayed by freezing the patterns in some of the multiple pattern rows displayed on the display surface 41a of the pattern display device 41, and in this state, the remaining pattern rows are displayed with varying patterns. It also includes a reach display in which, while a reach pattern combination is displayed as described above, the remaining pattern rows are displayed with varying patterns, and a predetermined character or the like is displayed as a moving image in the background screen, creating a reach effect; and a reach display in which the reach pattern combination is displayed in a reduced size or is not displayed, and a predetermined character or the like is displayed as a moving image across substantially the entire display surface 41a, creating a reach effect.

Pre-announcement displays include a mode in which a character is displayed separately from the symbols on the symbol columns when symbols are displayed in a changing manner in all symbol columns or when symbols are displayed in a changing manner in some symbol columns after the display of changing symbols on the display surface 41a of the symbol display device 41 has begun. They also include a mode in which the background screen is displayed in a predetermined mode different from its previous mode, or a mode in which the symbols on the symbol columns are displayed in a predetermined mode different from their previous mode. Such pre-announcement displays can occur in both gameplays when a reach display is made and when a reach display is not made, but are set to occur with a higher probability when a reach display is made than when a reach display is not made.

The reach display is executed regardless of the value of the reach random number counter C3 in a game in which the same symbol combination is ultimately displayed. Furthermore, in a game in which a jackpot result occurs in which the same symbol combination is not displayed, the reach display is not executed regardless of the value of the reach random number counter C3. Furthermore, in a game in which a miss result occurs, the reach display is executed when the reach random number counter C3 obtained at a predetermined timing by referencing the reach table stored in the main ROM 64 corresponds to the occurrence of the reach display.

On the other hand, the decision on whether to display a preview is not made by the main control device 60, but by the audio and light control device 81. In this case, the audio and light control device 81 executes a lottery process for preview displays so that a game turn corresponding to a jackpot result is more likely to produce a preview display, and/or a preview display with a low occurrence rate is more likely to occur, compared to a game turn corresponding to a loss result. Incidentally, the result of this lottery is reflected when the effect for the game turn is executed by the symbol display device 41.

Here, the probability of a reach display occurring in a game that results in a losing outcome is the same regardless of the setting state, "Setting 1" to "Setting 6." This makes it possible to ensure that the setting state of the pachinko machine 10 does not create an advantage or disadvantage in terms of the probability of a reach display occurring in a game that results in a losing outcome. However, this is not limited to this, and a configuration may be adopted in which the higher the setting value, the higher the probability of a reach display occurring in a game that results in a losing outcome.

Next, the variation type counter CS will be explained. The variation type counter CS is configured to increment by one within a range of, for example, 0 to 198, and return to "0" after reaching its maximum value. The variation type counter CS is used by the main CPU 63 to determine the display duration in the special chart display unit 37a and the display duration of the pattern in the pattern display device 41. The variation type counter CS is updated once each time the timer interrupt process described below is executed, and is also updated repeatedly during the remaining time until the next timer interrupt process is executed. The buffer value of the variation type counter CS is then obtained when determining the variation pattern at the start of the variation display in the special chart display unit 37a and when the pattern display device 41 begins to vary the pattern.

<Regarding the processing configuration of the main CPU 63>
Next, we will explain the various processes executed to progress the game by the main CPU 63. The processes of the main CPU 63 are roughly divided into main processes that are started when the power is turned on, and timer interrupt processes that are started periodically (every 4 msec in this embodiment).

<Main processing>
First, the main processing will be described with reference to the flowchart of FIG.

First, power-on wait processing is executed (step S101). During this power-on wait processing, the system waits for a predetermined waiting time (specifically, 1 second) to elapse after the main processing is started, without proceeding to the next processing. During the execution of this power-on wait processing, the operation of the pattern display device 41 is started and initial settings are completed. After that, access to the main RAM 65 is permitted (step S102).

Then, it is determined whether the setting key insertion unit 68a has been turned ON (Step S103). If the setting key insertion unit 68a has not been turned ON (Step S103: NO), it is determined whether the reset button 68c has been pressed (Step S104). If the reset button 68c has been pressed (Step S104: YES), all areas of the main RAM 65 are cleared to "0" except for the areas in the main RAM 65 where setting value information indicating the setting status of the pachinko machine 10 is set (Step S105). In other words, if the supply of operating power to the pachinko machine 10 is started while the reset button 68c is pressed without turning ON the setting key insertion unit 68a, the main RAM 65 is cleared while the setting value information remains in the state it was in before the supply of operating power to the pachinko machine 10 was stopped. This makes it possible to initialize other areas of the main RAM 65 without changing the setting values.

If the reset button 68c is not pressed (step S104: NO), it is determined whether the power outage flag is set to "1" (step S106). The power outage flag is stored in the main RAM 65, and if the supply of operating power to the main CPU 63 is stopped and the predetermined power outage processing is executed normally, the power outage flag is set to "1." If the power outage flag is set to "1," it is determined whether the checksum calculation result matches the checksum saved at the time of power outage, i.e., the validity of the stored data (step S107). If the processing of step S105 is executed or if a positive determination is made in step S107, it is determined whether the setting values of the pachinko machine 10 are normal by checking the main RAM 65 (step S108). Specifically, if the setting value is any of "Setting 1" to "Setting 6," it is determined to be normal, and if it is "0" or 7 or greater, it is determined to be abnormal.

If a negative judgment is made in any of steps S106 to S108, an operation prohibition process is executed. In the operation prohibition process, an error notification process is executed to notify the hall manager or other person that an error has occurred (step S109), and then an infinite loop is entered. The operation prohibition process is released by executing the all clear process (step S117) described below.

If a positive determination is made in all of steps S106 to S108, a power-on setting process is executed (step S110). In the power-on setting process, predetermined areas of the main RAM 65 are set to initial values, such as initializing the power outage flag, and a command corresponding to the current game status is sent to the sound and light emission control device 81. Furthermore, after executing the process of step S110, a recognition process (step S111) is executed to have the management IC 66 recognize various information, and a data output process is executed to output various data to an external device connected to the read terminal 68d of the MPU 62 (step S112). Details of these recognition processes and data output processes will be explained later.

The main CPU 63 is configured to periodically execute timer interrupt processing, but timer interrupt processing is prohibited when main processing begins. This state in which timer interrupt processing is prohibited is released when step S112 is completed and before step S113 is executed, and timer interrupt processing is permitted. As a result, when the supply of operating power to the main CPU 63 begins, the data output processing of step S112 ends and timer interrupt processing is not executed until before step S113 is started. Therefore, processing to progress the game will not be initiated by the main CPU 63 until this situation occurs.

Then, the remaining processing of steps S113 to S116 proceeds. In other words, the main CPU 63 is configured to periodically execute timer interrupt processing, but there will be a remaining time between one timer interrupt processing and the next timer interrupt processing. This remaining time will vary depending on the completion time of each timer interrupt processing, but this irregular time will be used to repeatedly execute the remaining processing of steps S113 to S116. In this respect, the remaining processing of steps S113 to S116 can be said to be non-periodic processing that is executed non-periodically.

In the remaining processing, first, in step S113, interrupt prohibition is set to prohibit the occurrence of timer interrupt processing. In the following step S114, a random number initial value update process is executed to update the random number initial value counter CINI, and in step S115, a fluctuation counter update process is executed to update the fluctuation type counter CS. These update processes read the current numerical information from the corresponding counter in the main RAM 65, add 1 to the read numerical information, and then overwrite the counter from which it was read. In this case, when the counter value exceeds the maximum value, it is cleared to "0". Then, in step S116, interrupt permission is set to switch from a state in which timer interrupt processing is prohibited to a state in which it is permitted. After executing step S116, the process returns to step S113, and steps S113 to S116 are repeated.

On the other hand, if the setting key insertion section 68a is turned ON (step S103: YES), all areas of the main RAM 65 are cleared to "0" (step S117), including the areas in the main RAM 65 where setting value information indicating the setting state of the pachinko machine 10 is set. In other words, when an operation to change the setting state of the pachinko machine 10 is being performed, all areas of the main RAM 65 are cleared to "0" even if the reset button 68c is not pressed. However, this is not limited to this, and the full clear process of the main RAM 65 may not be executed if the reset button 68c is not pressed even when an operation to change the setting state of the pachinko machine 10 is being performed, but the full clear process may be executed if the reset button 68c is pressed while an operation to change the setting state of the pachinko machine 10 is being performed.

Then, in step S118, the setting value update process is executed, and in step S119, the setting value update signal output process is executed, after which the process proceeds to step S110. The setting value update process is described below. The setting value update signal output process will be described in detail later. Figure 10 is a flowchart showing the setting value update process.

First, the setting value counter provided in the main RAM 65 is set to "1" (step S201). The setting value counter is a counter that allows the main CPU 63 to identify which setting value the setting state of the pachinko machine 10 is. By setting the setting value counter to "1", when the setting value update process is executed, the setting value will become "Setting 1" regardless of the previous setting value.

Then, the setting value display start process is executed (step S202). In the setting value display start process, the third notification display device 69c is controlled so that the number "1" corresponding to "Setting 1" is displayed. When changing the setting value, the gaming hall manager can understand the current setting status of the pachinko machine 10 by checking the third notification display device 69c.

Subsequently, on the condition that the setting key insertion unit 68a has not been turned OFF (step S203: NO), it is determined whether the update button 68b has been pressed once (step S204). Specifically, it is determined whether the signal from the sensor that detects the pressing of the update button 68b has switched from LOW level to HIGH level. If a negative determination is made in step S204, the process returns to step S203, where it is determined whether the setting key insertion unit 68a has been turned OFF.

If the update button 68b has been pressed once (step S204: YES), the value of the setting value counter in the main RAM 65 is incremented by 1 (step S205). Furthermore, if the value of the setting value counter after incrementing by 1 exceeds 6 (step S206: YES), the setting value counter is set to "1" (step S207). As a result, the setting value is updated to the next higher level each time the update button 68b is pressed; if the update button 68b is pressed once when the setting is "setting 6," the setting will return to "setting 1."

If a negative judgment is made in step S206, or if the processing of step S207 is executed, a display update process for the setting value is executed (step S208). In the display update process for the setting value, the display of the third notification display device 69c is controlled so that a number corresponding to the value of the setting value counter in the main RAM 65 is displayed. By checking the third notification display device 69c, the manager of the gaming hall can understand the setting status of the pachinko machine 10 after pressing the update button 68b.

After executing the processing of step S208, the process returns to step S203, where it is determined whether the setting key insertion unit 68a has been turned OFF. If it has not been turned OFF (step S203: NO), the processing from step S204 onwards is executed again. If it has been turned OFF (step S203: YES), the process of ending the display of the setting value is executed (step S209). In the process of ending the display of the setting value on the third alarm display device 69c, the display of the setting value is ended.

<Timer interrupt processing>
Next, the timer interrupt process will be described with reference to the flowchart of Fig. 11. The timer interrupt process is executed periodically (for example, every 4 milliseconds).

First, the power outage information storage process is executed (step S301). In the power outage information storage process, it monitors whether a power outage signal corresponding to a power outage has been received from the power outage monitoring board 67, and if a power outage is identified, the power outage process is executed and then an infinite loop is entered. In the power outage process, the power outage flag in the main RAM 65 is set to "1", a checksum is calculated, and the calculated checksum is saved.

Then, a lottery random number update process is executed (step S302). In the lottery random number update process, the winning random number counter C1, jackpot type counter C2, reach random number counter C3, and normal power feature release counter C4 are updated. Specifically, the current numerical information is sequentially read from the winning random number counter C1, jackpot type counter C2, reach random number counter C3, and normal power feature release counter C4, and the read numerical information is incremented by 1, after which the read numerical information is overwritten onto the original counter. In this case, when the counter value exceeds the maximum value, it is cleared to "0." Then, in step S303, the random number initial value update process is executed as in step S114, and in step S304, the variable counter update process is executed as in step S115.

Then, a fraud detection process is executed to monitor whether a specific event set as a target for fraud monitoring has occurred (step S305). This fraud detection process monitors the occurrence of multiple types of events, and when a specific event has occurred, a game stop flag provided in the main RAM 65 is set to "1". In the following step S306, it is determined whether the game has stopped by determining whether the game stop flag has been set to "1". If a negative determination is made in step S306, the process from step S307 onwards is executed.

In step S307, port output processing is executed. In port output processing, if output information was set in the previous timer interrupt processing, processing is executed to provide output corresponding to that output information to the various drive units 32b, 34b. For example, if information is set to switch the special power winning device 32 to an open state, output of a drive signal to the special power drive unit 32b is initiated, and if information is set to switch to a closed state, output of the drive signal is stopped. Also, if information is set to switch the normal power device 34a of the second operating port 34 to an open state, output of a drive signal to the normal power drive unit 34b is initiated, and if information is set to switch to a closed state, output of the drive signal is stopped.

Then, a reading process is executed (step S308). In the reading process, signals other than the power outage signal and the winning signal are read, and the read information is stored for use in future processes.

Then, the ball entry detection process is executed (step S309). In this ball entry detection process, the signals received from each ball entry detection sensor 42a-49a are read, and based on the read results, it is determined whether or not a ball has entered the outlet 24a, general entry port 31, special electric entry device 32, first operating port 33, second operating port 34, and through gate 35. Details of the ball entry detection process will be explained later.

Then, a timer update process is executed to collectively update the numerical information of multiple types of timer counters stored in the main RAM 65 (step S310). In this case, the timer counters whose stored numerical information is updated by subtraction are handled collectively, but it is also possible to configure the system to collectively update both subtractive timer counters and additive timer counters.

Then, a launch control process is executed to control the launch of gaming balls (step S311). While the launch operation to the launch operation device 28 continues, one gaming ball is launched at a predetermined launch cycle of 0.6 seconds. In the following step S312, an input status monitoring process is performed, which checks for disconnections in each of the ball entry detection sensors 42a-49a and whether the gaming machine main body 12 and front door frame 14 are open, based on the information read in the reading process of step S308.

Then, a special symbol special power control process is executed to control the execution of the game round and the open/close execution mode (step S313). The special symbol special power control process will be explained in detail later.

Then, normal map normal power control processing is executed (step S314). In the normal map normal power control processing, if a win has occurred in the through gate 35, processing is executed to obtain the reserved information on the normal map side, and if reserved information on the normal map side is stored, an opening judgment is made for that reserved information, and processing is executed to perform the normal map performance in response to that opening judgment. Also, based on the result of the opening judgment, processing is executed to open and close the normal power device 34a of the second operating port 34. In this case, if the support mode is low-frequency support mode, corresponding processing is executed, and if the support mode is high-frequency support mode, corresponding processing is executed. Also, if the opening/closing execution mode is selected, the support mode immediately before will be low-frequency support mode even if it was high-frequency support mode.

In the following step S315, based on the processing results of the immediately preceding steps S313 and S314, output information is set to reflect the increase or decrease in the number of reserved information items related to the special map display unit 37a in the special map reserved display unit 37b, and output information is set to reflect the increase or decrease in the number of reserved information items related to the regular map display unit 38a in the regular map reserved display unit 38b. Also, in step S315, based on the processing results of the immediately preceding steps S313 and S314, output information is set to update the display content of the special map display unit 37a, and output information is set to update the display content of the regular map display unit 38a.

Then, the contents of the command and signal received from the payout control device 77 are confirmed, and a payout status receiving process is executed to perform processing corresponding to the confirmation results (step S316). A payout output process is also executed to set the prize ball command as the output target (step S317). An external information setting process is also executed to control the start and end of the output of external signals according to the results of the various processes executed in this timer interrupt process (step S318). A management output process is then executed to output information corresponding to the result of the game ball entering the game area PA to the management IC 66 (step S319). Details of the management output process will be explained later.

Next, the special image special power control process of step S313 will be explained with reference to the flowchart in Figure 12.

First, the system executes a pending information acquisition process (step S401). This process determines whether a win has occurred in the first actuation port 33 or the second actuation port 34. If a win has occurred, the system determines whether the number of pending balls in the pending ball storage area 65a is less than the upper limit ("4" in this embodiment). If the number of pending balls is less than the upper limit, the system increments the number of pending balls by one, and stores the numerical information of the hit random number counter C1, jackpot type counter C2, and reach random number counter C3 updated in the previous step S302 in the first of the available pending areas RE1-RE4 in the pending ball area RE. If a win occurs simultaneously in both the first actuation port 33 and the second actuation port 34, the system executes the process to acquire the pending information multiple times within the scope of one execution of the pending information acquisition process. Furthermore, if new pending balls are acquired, a corresponding acquisition command is sent to the audio/light-emitting control device 81. When the audio and light control device 81 receives this command, it updates the image displayed on the pattern display device 41, indicating the number of pending information items, to display content corresponding to the increase in pending information items.

Then, the information of the special picture special power counter stored in the main RAM 65 is read (step S402), and the special picture special power address table stored in the main ROM 64 is read (step S403). The start address corresponding to the information of the special picture special power counter is obtained from the special picture special power address table (step S404), and the process jumps to the process indicated by the obtained start address among the processes of steps S406 to S412 (step S405). The special picture special power counter is a counter that allows the main CPU 63 to determine which of the various processes of steps S406 to S412 should be executed, and the special picture special power address table is set with the start address of the program for executing the processes of steps S406 to S412 corresponding to the numerical information of the special picture special power counter.

In step S406, the special chart change start process is executed. Figure 13 is a flowchart showing the special chart change start process.

In the special chart change start process, if the number of reserved information items stored in the reserved area RE is one or more (step S501: YES), the data setting process is executed (step S502). In the data setting process, the number of reserved items is first decremented by one, and the data stored in the first reserved area RE1 of the reserved area RE is moved to the execution area AE. Then, the data stored in each of the reserved areas RE1-RE4 of the reserved area RE is shifted. This data shift process shifts the data stored in the first reserved area RE1-RE4 sequentially to the lower-level areas. Specifically, the data in each area is shifted from the second reserved area RE2 to the first reserved area RE1, the third reserved area RE3 to the second reserved area RE2, and the fourth reserved area RE4 to the third reserved area RE3, and then the fourth reserved area RE4 is cleared to "0." At this time, a shift command is sent to the audio and light control device 81 to acknowledge that the data in the reserved areas has been shifted. When the audio and light control device 81 receives this command, it updates the image displayed on the pattern display device 41, which indicates the number of pending information items, to display content corresponding to the reduction in pending information items.

After executing the data setting process, the win/loss table is read from the main ROM 64 (step S503). Specifically, first, the current win/loss lottery mode is determined by reading information indicating the win/loss lottery mode from the main RAM 65. If it is the high probability mode, the high probability win/loss table 64g is read from the main ROM 64. On the other hand, if it is the low probability mode, the setting state of the pachinko machine 10 is determined by reading the value of the setting value counter in the main RAM 65. Then, the low probability win/loss tables 64a to 64f corresponding to the determined setting value are read from the main ROM 64.

Then, the system executes a win/loss determination process by referencing the win/loss tables 64a-64g read in step S503 (step S504). In the win/loss determination process, it determines whether the information stored in the execution area AE for determining win/loss, i.e., the numerical information related to the win random number counter C1, matches the jackpot numerical information set in the win/loss tables 64a-64g read in step S503.

If the result of the win/loss determination process is a jackpot win (step S505: YES), the allocation determination process is executed (step S506). In the allocation determination process, the allocation determination information stored in the execution area AE, i.e., the numerical information related to the jackpot type counter C2, is read. Then, by referencing the allocation table 64h provided in the main ROM 64, it is determined which jackpot result the numerical information related to the jackpot type counter C2 read out corresponds to. Specifically, it is determined which jackpot result it corresponds to: a low-probability jackpot result, a low-prize high-probability jackpot result, or a most favorable jackpot result.

Then, the stop result setting process for the jackpot result is executed (step S507). Specifically, information on the pattern to be finally stopped and displayed on the special symbol display unit 37a in the game round related to the start of the current variation is identified from a stop result table for the jackpot result stored in advance in the main ROM 64, and the identified information is written to the main RAM 65. In this stop result table for the jackpot result, information on the pattern to be stopped and displayed on the special symbol display unit 37a is set differently for each type of jackpot result.

Then, a flag setting process corresponding to the allocation determination result is executed (step S508). Specifically, flags corresponding to each type of jackpot result are provided in the main RAM 65, and in step S508, the flag corresponding to the result of the allocation determination process in step S506 is set to "1".

On the other hand, if it is determined in step S505 that the result is not a jackpot, the stop result setting process for a losing result is executed (step S509). Specifically, information on the pattern type to be finally displayed on the special symbol display unit 37a in the game round related to the start of the current variation is identified from a stop result table for losing results that is pre-stored in the main ROM 64, and the identified information is written to the main RAM 65. The information on the pattern type selected in this case is different from the information on the pattern type selected in the case of a jackpot result.

After executing either step S508 or step S509, a process for determining the duration of the game round is executed (step S510). In this process, the numerical information of the fluctuation type counter CS is obtained. In addition, it is determined whether a reach display will occur on the pattern display device 41 in the current game round. Specifically, if the game round related to the start of the current fluctuation results in a low-probability jackpot result or a most favorable jackpot result, it is determined that a reach display will occur. In addition, if neither of these jackpot results are obtained, and the numerical information related to the reach random number counter C3 stored in the execution area AE is numerical information corresponding to the occurrence of a reach, it is determined that a reach display will occur.

If it is determined that a reach display will occur, the reach occurrence duration table stored in the main ROM 64 is referenced to obtain the duration of play times corresponding to the current numerical information of the variable type counter CS. On the other hand, if it is determined that a reach display will not occur, the reach non-occurrence duration table stored in the main ROM 64 is referenced to obtain the duration of play times corresponding to the current numerical information of the variable type counter CS. Incidentally, the duration of play times that can be obtained by reference to the reach non-occurrence duration table differs from the duration of play times that can be obtained by reference to the reach occurrence duration table.

The duration of play times when a reach does not occur is set so that the greater the number of reserved information stored in the reserved area RE, the shorter the duration of play times. Furthermore, the non-reach duration table is set so that a shorter duration of play times is selected when the support mode is high-frequency support mode than when it is low-frequency support mode, when the number of reserved information is the same. However, this is not limited to this, and the duration of play times may not change depending on the number of reserved information or support mode, or the above relationship may be reversed. Furthermore, the above configuration may be applied to the duration of play times when a reach occurs. Separate duration tables may also be set for various jackpot results, miss reach results, and miss results without a reach. In this case, the duration of play times will be allocated according to each play result.

Then, the information on the duration of the game round obtained in step S510 is set in the special symbol special power timer counter provided in the main RAM 65 (step S511). The numerical information set in the special symbol special power timer counter is updated in the timer update process (step S310). Incidentally, as a performance for a game round, the special symbol display unit 37a displays a changing pattern, and the pattern display device 41 displays a changing pattern. When each of these changing displays ends, the stop result of that game round is displayed (the pattern display device 41 is in a state where a predetermined pattern combination is waiting on the active line) and the final stop display is displayed for the final stop period (e.g., 0.5 seconds). In this case, the duration of the game round obtained in step S510 is the total time for one game round.

Then, the variation command and type command are sent to the audio and light emitting control device 81 (step S512). The variation command includes information on the duration of the game round. Here, as described above, the duration of the game round obtained by referencing the non-reach duration table is different from the duration of the game round obtained by referencing the reach duration table. Therefore, even if the variation command does not include information on whether or not a reach has occurred, the audio and light emitting control device 81 can determine whether or not a reach has occurred from the information on the duration of the game round. In this regard, it can be said that the variation command includes information indicating whether or not a reach has occurred. Note that the variation command may also include information directly indicating whether or not a reach has occurred. Furthermore, the type command includes information on the game result.

When the sound and light-emitting control device 81 receives a variation command and a type command from the main CPU 63, it causes the display light-emitting unit 53, speaker unit 54, and pattern display device 41 to execute a game-round performance. In this case, the performance for that game round is executed in a manner corresponding to the content of the variation command and type command. In addition, the pattern display device 41 displays a variation of the patterns as a game-round performance, and when the performance for that game round ends, a combination of patterns corresponding to the results of the win/loss determination process and the allocation determination process is displayed frozen.

Then, the display of the changing image on the special symbol display unit 37a begins (step S513). Then, the special symbol special power counter is incremented by 1 (step S514). In this case, the numerical information of the special symbol special power counter is "0" when the special symbol change start process is executed, so the numerical information of the special symbol special power counter becomes "1". Then, the 11th output flag provided in the main RAM 65 is set to "1" (step S515). The 11th output flag is a flag that specifies to the main CPU 63 that information indicating that a game round has started should be output to the management IC 66.

Returning to the explanation of the special symbol special power control process (Figure 52), in step S407, special symbol change processing is executed. In special symbol change processing, it is determined whether the timing is within the duration of a game round and before the final stop display, and if it is before the final stop display, processing is executed to regularly change the display mode of the image on the special symbol display unit 37a. When it is time to display the final stop, the numerical information of the special symbol special power counter is incremented by 1, thereby updating the numerical information of the counter from that corresponding to the special symbol change processing to that corresponding to the special symbol confirmation processing. Note that in this embodiment, a final stop command is not sent from the main CPU 63 to the audio and light emission control device 81.

In step S408, special chart determination processing is executed. In special chart determination processing, the display mode of the image on the special chart display unit 37a is changed to a display mode corresponding to the lottery result of the current game round. In addition, in special chart determination processing, it is determined whether the final stop period has elapsed, and if that period has elapsed, it is determined whether a transition to opening and closing execution mode will occur. If a transition to opening and closing execution mode does not occur, the numerical information of the special chart special power counter is cleared to "0". If a transition to opening and closing execution mode occurs, the numerical information of the special chart special power counter is incremented by 1, thereby updating the numerical information of the counter from that corresponding to the special chart determination processing to that corresponding to the special power start processing.

In step S409, special power start processing is executed. During the special power start processing, if the processing to start the opening period in the current opening/closing execution mode has not yet been executed, the opening period setting processing is executed. An opening command is also sent to the audio and light emitting control device 81. Upon receiving the opening command, the audio and light emitting control device 81 causes the display light emitting unit 53, speaker unit 54, and symbol display device 41 to execute an opening effect. If the opening period has elapsed, start processing is executed to start the first round of play. In this start processing, the special power winning device 32 is set to an open state and the end conditions for the round of play are set. When setting this end condition, the upper limit of the duration for which the special power winning device 32 is to remain open during this first round of play is set, and the upper limit of the number of game balls that can win the special power winning device 32 during this first round of play is set in the winning number counter provided in the main RAM 65.

In step S410, special line open processing is executed. In special line open processing, it is determined whether the conditions for ending the round of play have been met. If the conditions for ending have been met, the special line winning device 32 is closed. If the round of play that has just ended is not the last round of play executed, the numerical information of the special line counter is incremented by 1, thereby updating the numerical information of the counter from that corresponding to the special line open processing to that corresponding to the special line closed processing. If the round of play that has just ended is the last round of play executed, the numerical information of the special line counter is incremented by 2, thereby updating the numerical information of the counter from that corresponding to the special line open processing to that corresponding to the special line end processing.

In step S411, special line closed processing is executed. In special line closed processing, it is determined whether the interval period between rounds of play has elapsed. The interval period is set when the previous round of play ends. If the interval period has elapsed, the special line winning device 32 is set to an open state and the end conditions for the round of play are set. Then, the numerical information of the special chart special line counter is subtracted by 1, thereby updating the numerical information of the counter from that corresponding to the special line closed processing to that corresponding to the special line open processing.

In step S412, the special call termination process is executed. In the special call termination process, if the process to start the ending period for this opening/closing execution mode has not yet been executed, the ending period (e.g., 5 seconds) is set and an ending command is sent to the audio and light emitting control device 81. Upon receiving the ending command, the audio and light emitting control device 81 causes the display light emitting unit 53, speaker unit 54, and pattern display device 41 to execute an ending performance. When the ending period has elapsed, the win/lose lottery mode and support mode after the end of the opening/closing execution mode are set to modes corresponding to the jackpot result that triggered the start of this opening/closing execution mode.

Next, we will explain the configuration used by the main CPU 63 to determine whether or not a game ball has entered the outlet 24a, general winning port 31, special electric winning device 32, first operating port 33, second operating port 34, and through gate 35 based on the detection results of each ball entry detection sensor 42a-49a. Figure 14 is an explanatory diagram illustrating the configuration used to input the detection results of the ball entry detection sensors 42a-49a to the main CPU 63.

The main CPU 63 is provided with an input port 63a. The input port 63a is configured as an 8-bit parallel interface so that it can handle eight types of signals simultaneously. An area where information of "0" or "1" is stored depending on the voltage of each signal is provided in one-to-one correspondence with each terminal. In other words, this area includes the 0th bit D0 to the 7th bit D7. Although more than eight types of signals can be input to the input port 63a, in order to limit the number of signals that can be input simultaneously to eight, the group of signals that are input to the input port 63a is switched through switching control by a driver IC.

During the ball entry detection process (step S309) of the timer interrupt process (Figure 11), the signals to be input to input port 63a are set to the signals from each ball entry detection sensor 42a-49a. When this setting is made, bit 0 D0 stores information corresponding to the detection signal from the first prize entry detection sensor 42a, bit 1 D1 stores information corresponding to the detection signal from the second prize entry detection sensor 43a, bit 2 D2 stores information corresponding to the detection signal from the third prize entry detection sensor 44a, bit 3 D3 stores information corresponding to the detection signal from the special electric current detection sensor 45a, bit 4 D4 stores information corresponding to the detection signal from the first operation port detection sensor 46a, bit 5 D5 stores information corresponding to the detection signal from the second operation port detection sensor 47a, bit 6 D6 stores information corresponding to the detection signal from the outlet detection sensor 48a, and bit 7 D7 stores information corresponding to the detection signal from the gate detection sensor 49a.

Each of the ball entry detection sensors 42a-49a outputs a LOW level signal indicating that it is not currently detecting a passing game ball as a detection signal when it has not detected the passing of a game ball, and outputs a HIGH level signal indicating that it is currently detecting a passing game ball as a detection signal when it has detected the passing of a game ball. Input port 63a stores a "0" in the corresponding bit when it receives a LOW level signal, and stores a "1" in the corresponding bit when it receives a HIGH level signal. In other words, when the ball entry detection sensors 42a-49a have not detected the passing of a game ball, a "0" corresponding to the information indicating that it is not currently detecting is stored in the corresponding bit, and when it has detected the passing of a game ball, a "1" corresponding to the information indicating that it is currently detecting is stored in the corresponding bit.

Figure 15 is a flowchart showing the ball entry detection process executed in step S309 of the timer interrupt process (Figure 11).

If it is confirmed that the 0th bit D0 has switched from a state in which "0" is stored to a state in which "1" is stored, it is determined that one game ball has been detected by the first prize opening detection sensor 42a (step S601: YES). In this case, the first output flag provided in the main RAM 65 is set to "1" (step S602), and the value of the 10-prize ball counter provided in the main RAM 65 is incremented by one (step S603). The first output flag is a flag that specifies to the main CPU 63 that information indicating that one game ball has been detected by the first prize opening detection sensor 42a should be output to the management IC 66. The 10-prize ball counter is a counter that specifies to the main CPU 63 the number of times that 10 game balls should be paid out. If the value of the 10 prize ball counter is 1 or greater, a 10 prize ball command is output to the payout control device 77 in the payout output process of step S317 in the timer interrupt process (Figure 11), and the value of the 10 prize ball counter is decremented by 1 each time the 10 prize ball command is output. When the payout control device 77 receives a 10 prize ball command, it controls the drive of the payout device 76 so that 10 game balls are paid out.

If it is confirmed that the first bit D1 has switched from a state in which "0" is stored to a state in which "1" is stored, it is determined that one game ball has been detected by the second winning opening detection sensor 43a (step S604: YES). In this case, the second output flag provided in the main RAM 65 is set to "1" (step S605), and the value of the 10-ball counter provided in the main RAM 65 is incremented by 1 (step S606). The second output flag is a flag that specifies to the main CPU 63 that information indicating that one game ball has been detected by the second winning opening detection sensor 43a should be output to the management IC 66.

If it is confirmed that the second bit D2 has switched from a state in which "0" is stored to a state in which "1" is stored, it is determined that one game ball has been detected by the third winning opening detection sensor 44a (step S607: YES). In this case, the third output flag provided in the main RAM 65 is set to "1" (step S608), and the value of the 10-ball counter provided in the main RAM 65 is incremented by 1 (step S609). The third output flag is a flag that specifies to the main CPU 63 that information indicating that one game ball has been detected by the third winning opening detection sensor 44a should be output to the management IC 66.

If it is confirmed that the third bit D3 has changed from a state in which "0" is stored to a state in which "1" is stored, it is determined that one game ball has been detected by the special electric detection sensor 45a (step S610: YES). In this case, the special electric winning flag in the main RAM 65 is set to "1" (step S611), the fourth output flag in the main RAM 65 is set to "1" (step S612), and the value of the 15-ball counter in the main RAM 65 is incremented by 1 (step S613). The special electric winning flag is a flag that the main CPU 63 uses to identify that one game ball has entered the special electric winning device 32 during round play in the open/close execution mode. The special power control process (step S313) of the timer interrupt process (FIG. 11) determines that one game ball has entered the special power winning device 32 by confirming that the special power winning flag is set to "1," and subtracts one from the remaining number of balls that can enter the special power winning device 32 during a round of play. When this process of subtracting one from the number of balls that can enter is executed, the special power winning flag is cleared to "0." The fourth output flag is a flag that specifies to the main CPU 63 that information indicating that one game ball has been detected by the special power detection sensor 45a should be output to the management IC 66. The 15-ball counter is a counter that specifies to the main CPU 63 the number of times that 15 game balls should be paid out. If the value of the 15 prize ball counter is 1 or greater, a 15 prize ball command is output to the payout control device 77 in the payout output process of step S317 in the timer interrupt process (Figure 11), and the value of the 15 prize ball counter is decremented by 1 each time the 15 prize ball command is output. When the payout control device 77 receives a 15 prize ball command, it controls the drive of the payout device 76 so that 15 game balls are paid out.

If it is confirmed that the fourth bit D4 has changed from a state in which "0" is stored to a state in which "1" is stored, it is determined that one game ball has been detected by the first actuation port detection sensor 46a (step S614: YES). In this case, the first actuation winning flag stored in the main RAM 65 is set to "1" (step S615), the fifth output flag stored in the main RAM 65 is set to "1" (step S616), and the value of the one-prize ball counter stored in the main RAM 65 is incremented by one (step S617). The first actuation winning flag is a flag used by the main CPU 63 to identify that one game ball has entered the first actuation port 33. The special power control process (step S313) of the timer interrupt process (Figure 11) confirms that the first activation winning flag is set to "1." This process executes a process to store new reserved information, provided that the number of reserved information stored in the reserved area RE of the reserved storage area 65a is less than the upper limit of four. The special power control process (step S313) confirms that the first activation winning flag is set to "1." If the process corresponding to this confirmation is executed, the first activation winning flag is cleared to "0." The fifth output flag is a flag that specifies to the main CPU 63 that information indicating that one game ball has been detected by the first activation port detection sensor 46a should be output to the management IC 66. The single prize ball counter is a counter that specifies to the main CPU 63 the number of times one game ball should be paid out. If the value of the 1 prize ball counter is 1 or greater, a 1 prize ball command is output to the payout control device 77 in the payout output process of step S317 in the timer interrupt process (Figure 11), and the value of the 1 prize ball counter is decremented by 1 each time the 1 prize ball command is output. When the payout control device 77 receives a 1 prize ball command, it controls the operation of the payout device 76 so that one game ball is paid out.

If it is confirmed that the fifth bit D5 has changed from a state in which "0" is stored to a state in which "1" is stored, it is determined that one game ball has been detected by the second actuation port detection sensor 47a (step S618: YES). In this case, the second actuation winning flag provided in the main RAM 65 is set to "1" (step S619), the sixth output flag provided in the main RAM 65 is set to "1" (step S620), and the value of the one prize ball counter provided in the main RAM 65 is incremented by 1 (step S621). The second actuation winning flag is a flag used by the main CPU 63 to identify that one game ball has entered the second actuation port 34. The special power control process (step S313) of the timer interrupt process (Figure 11) confirms that the second activation winning flag is set to "1" and executes a process to store new reserved information, provided that the number of reserved information stored in the reserved area RE of the reserved storage area 65a is less than the upper limit of four. The special power control process (step S313) confirms that the second activation winning flag is set to "1" and clears the second activation winning flag to "0" when the process corresponding to that confirmation is executed. The sixth output flag is a flag that specifies to the main CPU 63 that information indicating that one game ball has been detected by the second activation port detection sensor 47a should be output to the management IC 66.

If it is confirmed that the sixth bit D6 has switched from a state in which "0" is stored to a state in which "1" is stored, it is determined that one gaming ball has been detected by the outlet detection sensor 48a (step S622: YES). In this case, the seventh output flag provided in the main RAM 65 is set to "1" (step S623). The seventh output flag is a flag that specifies to the main CPU 63 that information indicating that one gaming ball has been detected by the outlet detection sensor 48a should be output to the management IC 66.

If it is confirmed that the seventh bit D7 has changed from a state in which "0" is stored to a state in which "1" is stored, it is determined that one game ball has been detected by the gate detection sensor 49a (step S624: YES). In this case, the gate winning flag stored in the main RAM 65 is set to "1" (step S625). The gate winning flag is a flag used by the main CPU 63 to identify that one game ball has entered the through gate 35. In the normal play control process (step S314) of the timer interrupt process (Figure 11), by confirming that the gate winning flag is set to "1," the process is executed to store the current numerical information of the normal play device release counter C4 as normal play device pending information in the normal play device pending area 65c, provided that the number of normal play device pending information stored in the normal play device pending area 65c is less than the upper limit of four. The normal map and normal power control process (step S314) confirms that the gate winning flag is set to "1", and if processing corresponding to that confirmation is executed, the gate winning flag is cleared to "0".

As already explained, the timer interrupt process (Figure 11) is initiated at a 4 msec cycle. Therefore, when one of the ball entry detection sensors 42a-49a begins detecting a single game ball, the main CPU 63 determines that one game ball has been detected by that ball entry detection sensor 42a-49a while that sensor continues to detect that single game ball. Therefore, it is sufficient to provide one each of the first through seventh output flags.

Next, we will explain the processing executed by the dispensing control device 77. First, we will explain the electrical configuration of the dispensing control device 77 and the various devices that communicate with the dispensing control device 77, with reference to the block diagram in Figure 16.

The dispensing control device 77 is equipped with an MPU 91. In addition to a dispensing side CPU 92, which is a processing device including a control unit and a calculation unit, the MPU 91 also contains a dispensing side ROM 93, a dispensing side RAM 94, an interrupt circuit, a timer circuit, a data input/output circuit, etc.

The payout-side ROM 93 is a memory (i.e., non-volatile storage means) that does not require an external power supply to retain data, such as a NOR flash memory or a NAND flash memory, and is used for read-only purposes. The payout-side ROM 93 stores various control programs and fixed value data executed by the payout-side CPU 92.

The dispensing-side RAM 94 is a memory (i.e., a volatile memory means) that requires an external power supply to retain data, such as SRAM or DRAM, and is used for both reading and writing. The dispensing-side RAM 94 is randomly accessible and takes less time to read data than the dispensing-side ROM 93 when compared for the same data capacity. The dispensing-side RAM 94 temporarily stores various data for the execution of the control program stored in the dispensing-side ROM 93.

The payout CPU 92 is capable of bidirectional communication with the main CPU 63. By receiving a prize ball command from the main CPU 63, the payout CPU 92 controls the payout device 76 to pay out the number of game balls corresponding to the prize ball command. The payout CPU 92 also monitors whether the payout of game balls can be performed normally, and if it determines that the payout of game balls cannot be performed normally, it stops the payout device 76 even if information on the number of unpaid prize balls is stored in the payout RAM 94. The payout CPU 92 also transmits a payout limit command to the main CPU 63 indicating that the payout of game balls cannot be performed normally. When the main CPU 63 receives the payout limit command, it transmits a notification command to the audio/light-emitting control device 81 so that the symbol display device 41, the display light-emitting unit 53, and the speaker unit 54 issue a notification indicating that the payout of game balls cannot be performed normally. The states in which game balls cannot be paid out normally include a full state in which the lower tray 56a is full of game balls, a no-ball state in which the tank 75 has not been replenished with game balls, an abnormal payout state in which the payout device 76 is not operating normally, a main body open state in which the gaming machine main body 12 is open from the outer frame 11, and a front door open state in which the front door frame 14 is open from the inner frame 13.

A full tank detection sensor (not shown) is provided midway along the game ball passageway leading from the payout device 76 to the lower tray 56a, and the detection results of this full tank detection sensor are input to the payout CPU 92. The payout CPU 92 determines that the tank is full when game balls are continuously detected by the full tank detection sensor, and determines that the full tank state has been released when the state in which game balls are continuously detected by the full tank detection sensor is released.

A no-ball detection sensor (not shown) is provided midway along the game ball passageway leading from the tank 75 to the payout device 76, and the detection results of the no-ball detection sensor are input to the payout CPU 92. The payout CPU 92 determines that a no-ball state exists when the no-ball detection sensor continues to not detect game balls, and determines that the no-ball state has been lifted when the state in which the no-ball detection sensor continues to not detect game balls is lifted.

The payout device 76 is provided with a payout detection sensor (not shown) for detecting game balls paid out from the payout device 76, and the detection results of the payout detection sensor are input to the payout side CPU 92. The payout side CPU 92 determines that one game ball has been paid out from the payout device 76 when a game ball is detected by the payout detection sensor. Furthermore, the payout side CPU 92 determines that an abnormal payout state exists when the payout detection sensor continues to not detect a game ball even though the payout device 76 is being driven and controlled so that a game ball is paid out, and determines that the abnormal payout state has been released when the state in which the payout detection sensor continues to not detect a game ball is released.

A front door open sensor 95 is provided on the front portion of the inner frame 13 (see FIG. 2 ), and the detection result of the front door open sensor 95 is input to the dispensing-side CPU 92. In this case, when the front door frame 14 is closed relative to the inner frame 13, the front door open sensor 95 transmits a closed detection signal to the dispensing-side CPU 92, and when the front door frame 14 is open relative to the inner frame 13, the front door open sensor 95 transmits an open detection signal to the dispensing-side CPU 92. The dispensing-side CPU 92 determines that the front door frame 14 is closed when it receives a closed detection signal from the front door open sensor 95, and determines that the front door frame 14 is open when it receives an open detection signal from the front door open sensor 95. In addition, the dispensing-side CPU 92 transmits a front door open command to the main-side CPU 63 when it determines that the front door frame 14 has changed from a closed state to an open state, and transmits a front door close command to the main-side CPU 63 when it determines that the front door frame 14 has changed from an open state to a closed state. The main CPU 63 determines that the front door frame 14 is in the open state when it receives a front door open command, and determines that the front door frame 14 is in the closed state when it receives a front door close command.

A main body open sensor 96 is provided on the front of the back pack unit 15 (see FIG. 2 ), and the detection result of the main body open sensor 96 is input to the payout CPU 92. In this case, when the gaming machine main body 12 is in a closed state relative to the outer frame 11, the main body open sensor 96 transmits a closed detection signal to the payout CPU 92, and when the gaming machine main body 12 is in an open state relative to the outer frame 11, the main body open sensor 96 transmits an open detection signal to the payout CPU 92. The payout CPU 92 determines that the gaming machine main body 12 is in a closed state when it receives a closed detection signal from the main body open sensor 96, and determines that the gaming machine main body 12 is in an open state when it receives an open detection signal from the main body open sensor 96. In addition, the payout CPU 92 transmits a main body open command to the main CPU 63 when it determines that the gaming machine main body 12 has changed from a closed state to an open state, and transmits a main body close command to the main CPU 63 when it determines that the gaming machine main body 12 has changed from an open state to a closed state. The main CPU 63 determines that the gaming machine main body 12 is in the open state when it receives a main body open command, and determines that the gaming machine main body 12 is in the closed state when it receives a main body close command.

Referring to the flowchart in Figure 17, we will explain the timer interrupt processing executed by the dispensing CPU 92. The timer interrupt processing is repeatedly activated at a predetermined interval (e.g., every 2 msec).

First, full tank processing is executed (step S701). As already explained, full tank processing determines whether the tank is full based on the detection results of the full tank detection sensor, and if the tank is full, it executes processing to stop the payout of game balls and sends a command to the main CPU 63 indicating that the tank is full. Furthermore, if the full tank state is released, it executes processing to enable the payout of game balls and sends a command to the main CPU 63 indicating that the full tank state has been released.

Then, no-ball processing is executed (step S702). As already explained, the no-ball processing determines whether or not the state is a no-ball state based on the detection results of the no-ball detection sensor, and if the state is a no-ball state, it executes processing to stop the payout of game balls and sends a command to the main CPU 63 indicating that the no-ball state is in effect. Furthermore, if the no-ball state is released, it executes processing to enable the payout of game balls and sends a command to the main CPU 63 indicating that the no-ball state has been released.

Then, a payout abnormality monitoring process is executed (step S703). As already explained, the payout abnormality monitoring process determines whether or not a payout abnormality state exists based on the detection results of the payout detection sensor, and if a payout abnormality state exists, a process is executed to stop the payout of game balls and a command indicating that a payout abnormality state exists is sent to the main CPU 63. Furthermore, if the payout abnormality state is resolved, a process is executed to enable the payout of game balls and a command indicating that the payout abnormality state has been resolved is sent to the main CPU 63.

Then, a front door open monitoring process is executed (step S704). As already explained, the front door open monitoring process determines whether the front door frame 14 is open or not based on the detection results of the front door open sensor 95. If the front door frame 14 is open, a process is executed to stop the payout of game balls, and a front door open command is sent to the main CPU 63. Furthermore, if the front door frame 14 is closed, a process is executed to enable the payout of game balls, and a front door close command is sent to the main CPU 63.

Then, the main body open monitoring process is executed (step S705). As already explained, the main body open monitoring process determines whether the gaming machine main body 12 is in the open state based on the detection result of the main body open sensor 96, and if the gaming machine main body 12 is in the open state, it executes a process to stop the payout of game balls and sends a main body open command to the main CPU 63. Furthermore, if the gaming machine main body 12 is closed, it executes a process to enable the payout of game balls and sends a main body close command to the main CPU 63.

Then, a command reading process is executed (step S706). In this command reading process, a process is executed to read the prize ball command sent by the main CPU 63 and store the prize ball command in the payout RAM 94. Then, a prize ball setting process is executed to add the number corresponding to the received prize ball command to the unpaid prize ball count information in the payout RAM 94 (step S707), and then a payout control process is executed to control the execution of the payout of game balls by the payout device 76 (step S708). In the payout control process, if the unpaid prize ball count information stored in the payout RAM 94 is a value of 1 or greater, the payout device 76 is driven and controlled, and if the payout detection sensor detects one game ball, the value of the prize ball count information is decremented by 1. Then, if the value of the prize ball count information becomes "0," the drive control of the payout device 76 is stopped. After that, an external information setting process is executed to control the start and end of external signal output according to the results of the various processes executed during this timer interrupt process (step S709).

Next, we will explain the configuration for externally outputting information from the pachinko machine 10 to the hall computer HC installed in the gaming hall.

As shown in FIG. 2, the back pack unit 15 is provided with an external terminal board 97. The external terminal board 97 is provided with a large number of external terminals, some of which are electrically connected to the main CPU 63, and some of which are electrically connected to the payout CPU 92. Because the main CPU 63 and the payout CPU 92 are each electrically connected to the external terminal board 97 in this way, the main CPU 63 and the payout CPU 92 can externally output information to the hall computer HC, as shown in FIG. 16.

One external terminal on the external terminal board 97 is electrically connected to the front door open sensor 95, and another external terminal on the external terminal board 97 is electrically connected to the main body open sensor 96. Regarding the detailed configuration of this electrical connection, a signal relay board 98 is provided midway along the signal path from the front door open sensor 95 to the dispensing side CPU 92. The signal relay board 98 has a branch path SL2 that branches off from the signal path SL1 from the front door open sensor 95 to the dispensing side CPU 92. The branch path SL2 is then connected to the front door open external terminal on the external terminal board 97. Therefore, the electrical signal corresponding to the detection result of the front door open sensor 95 is input not only to the dispensing side CPU 92, but also to the front door open external terminal on the external terminal board 97. This allows a signal indicating whether the front door frame 14 is open to be output to the hall computer HC without control by the dispensing side CPU 92.

Regarding the main body open sensor 96 in more detail, the signal relay board 98 has a branch path SL4 that branches off from the signal path SL3 that runs from the main body open sensor 96 to the payout side CPU 92. This branch path SL4 is then connected to an external terminal for main body open on the external terminal board 97. Therefore, an electrical signal corresponding to the detection result of the main body open sensor 96 is not only input to the payout side CPU 92, but also to the external terminal for main body open on the external terminal board 97. This makes it possible to externally output a signal indicating whether the gaming machine main body 12 is in an open state to the hall computer HC without going through control by the payout side CPU 92.

Next, we will explain the content of the information externally output from the main CPU 63 and the payout CPU 92 to the hall computer HC. First, we will explain the content of the information externally output from the main CPU 63 to the hall computer HC.

During the external information setting process (step S318) in the timer interrupt process (Figure 11), the main CPU 63 sets information output to each external terminal assigned to the main CPU 63 on the external terminal board 97. The information output from the main CPU 63 to the external terminal board 97 includes information indicating that the opening/closing execution mode is in progress, information indicating that the support mode is in high-frequency support mode, information indicating that one game round has ended, information indicating that a predetermined number (e.g., 100) of game balls have been discharged from the game area PA through the outlet 24a, general winning port 31, special electric winning device 32, first actuation port 33, or second actuation port 34, information indicating that a game ball has entered the first actuation port 33, and information indicating that a game ball has entered the second actuation port 34.

In the external information setting process (step S709) of the timer interrupt process (FIG. 17), the payout CPU 92 sets the output of information to each external terminal assigned to the payout CPU 92 on the external terminal board 97. The information output from the payout CPU 92 to the external terminal board 97 includes information indicating that 10 game balls have been paid out.

The hall computer HC can grasp the manner in which game balls are paid out in the pachinko machine 10 in accordance with various information received from the pachinko machine 10 via the external terminal board 97. For example,
The payout rate, which is the ratio of the number of payout balls generated until 100 game balls are discharged from the game area PA of the pachinko machine 10. The payout rate in a normal game state other than the open/close execution mode and the high frequency support mode (hereinafter, this payout rate will be referred to as "B")
・Ball payout rate in the open/close execution mode ・Ball payout rate in the high frequency support mode ・Number of games played until 100 game balls are discharged from the game area PA of the pachinko machine 10 (hereinafter, this rate will be referred to as "S")
B-S x "number of winning balls for winning the first actuation port 33 and the second actuation port 34"
The number of game balls that enter the first operating port 33 before 100 game balls are discharged from the game area PA of the pachinko machine 10 (hereinafter, this ratio will be referred to as "S1")
The number of game balls that enter the second operating port 34 before 100 game balls are discharged from the game area PA of the pachinko machine 10 (hereinafter, this ratio will be referred to as "S2")
B - (S1 x "number of winning balls for winning through the first actuation port 33" + S2 x "number of winning balls for winning through the second actuation port 34")
The probability of the opening/closing execution mode occurring per unit play, the probability of the high frequency support mode occurring per unit play, etc. are calculated. This allows the hall computer HC to manage the ball entry patterns of game balls in the play area PA of the pachinko machine 10. The number of prize balls refers to the number of game balls paid out when one game ball enters the corresponding ball entry section.

<Configuration for managing winning status of gaming balls>
Next, we will explain the configuration for managing game history using the management IC 66. First, we will explain the electrical configuration of the management IC 66 with reference to the block diagram of FIG.

As already explained, the MPU 62 of the main control unit 60 is equipped with a main CPU 63, a main ROM 64, a main RAM 65, and a management IC 66. In addition to these, the MPU 62 is also equipped with an I/F 101, as well as the read terminal 68d already explained.

I/F 101 is an interface for sending and receiving signals between the MPU 62 and devices external to it. I/F 101 is electrically connected to the main CPU 63 via the internal bus 103. Detection results from sensors such as the ball entry detection sensors 42a-49a and commands from the payout CPU 92 are input to the MPU 62 through the input port of I/F 101, and the main CPU 63 executes various processes based on the input detection results and command content, as previously explained. Furthermore, if a signal is output to a device such as the special power driver 32b as a result of various processes executed by the main CPU 63, the signal is output through the output port of I/F 101. Furthermore, if a command is output to the payout CPU 92 and the audio/light-emitting control device 81 as a result of various processes executed by the main CPU 63, the command is output through the output port of I/F 101.

The management IC 66 includes a management I/F 111, a management CPU 112, a management ROM 113, a management RAM 114, an RTC 115, a correspondence memory 116, a history memory 117, and a calculation result memory 131. These devices are connected to each other via an internal bus 66a provided in the management IC 66, allowing bidirectional communication.

The management side I/F 111 is an interface that receives various signals from the main CPU 63 via a group of one-way communication signal paths 118 built into the MPU 62, and transmits various signals to the reading terminal 68d via a group of one-way communication signal paths 119 built into the MPU 62. Various signals from the main CPU 63 are input to the input port of the management side I/F 111, and various signals to the reading terminal 68d are output from the output port of the management side I/F 111. The main CPU 63 is electrically connected to the reading terminal 68d via a group of two-way communication signal paths 120 built into the MPU 62.

The management CPU 112 is an arithmetic processing unit including a control unit and an arithmetic unit. The management ROM 113 is a memory such as a NOR flash memory or a NAND flash memory that does not require an external power supply to retain its data (i.e., a non-volatile storage means) and is used as read-only. The management ROM 113 stores various control programs executed by the management CPU 112 and fixed value data. The management RAM 114 is a memory such as an SRAM or DRAM that requires an external power supply to retain its data (i.e., a volatile storage means) and is used as both read and write. The management RAM 114 is randomly accessible and has a faster read time than the management ROM 113 when compared for the same data capacity. The management RAM 114 temporarily stores various data and the like in response to the execution of the control programs stored in the management ROM 113.

The RTC 115 is a real-time clock that constantly measures date and time information and is capable of outputting the measured date and time information (hereinafter also referred to as date and time information) in accordance with instructions from the management CPU 112. The RTC 115 is also equipped with a backup power supply, making it possible to measure date and time information even when the power to the pachinko machine 10 is cut off.

The correspondence memory 116 is a memory (i.e., a volatile memory means) that requires an external power supply to retain data, such as SRAM or DRAM, and is used for both reading and writing. The correspondence memory 116 is used to store information on the correspondence between each of the buffers 122a-122p provided in the input port 121 of the management side I/F 111 and the types of signals input to those buffers 122a-122p. The contents of the correspondence memory 116 will be explained in detail later.

The history memory 117 is a memory (i.e., a non-volatile storage means) that does not require an external power supply to retain data, such as a NOR flash memory or NAND flash memory, and is used for both reading and writing. The history memory 117 is used to store information related to the game history received from the main CPU 63 via the management I/F 111. Details of the contents of the history memory 117 will be explained later.

The calculation result memory 131 is a memory (i.e., non-volatile storage means) that does not require an external power supply to retain data, such as a NOR flash memory or NAND flash memory, and is used for both reading and writing. The calculation result memory 131 is used to sequentially store various parameters calculated by the management CPU 112 using the history information stored in the history memory 117. The contents of the various parameters stored in the calculation result memory 131 are sequentially displayed on the first to third notification display devices 69a to 69c, and are also output to an external device connected to the read terminal 68d.

Next, we will explain the configuration of the input port 121 provided in the management side I/F 111. Figure 19 is an explanatory diagram for explaining the configuration of the input port 121 of the management side I/F 111.

The input port 121 is provided with multiple buffers 122a-122p. Specifically, first through sixteenth buffers 122a-122p are provided. Each of the first through sixteenth buffers 122a-122p can input one type of signal via signal paths 118a-118p, and each of the first through sixteenth buffers 122a-122p stores "0" as first data when the input signal is at a LOW level, and stores "1" as second data when the input signal is at a HIGH level. Note that the relationship between LOW and HIGH and the first and second data may be reversed.

A first signal corresponding to the detection result of the first winning opening detection sensor 42a is input to the first buffer 122a. In this case, the main CPU 63 outputs a LOW level first signal when no new gaming balls are detected by the first winning opening detection sensor 42a, and outputs a HI level first signal for a specific period of time when one gaming ball is detected by the first winning opening detection sensor 42a. This specific period is long enough for the management CPU 112 to determine that a HI level first signal has been input to the first buffer 122a.

A second signal corresponding to the detection result of the second winning opening detection sensor 43a is input to the second buffer 122b. In this case, the main CPU 63 outputs a LOW level second signal when no new game balls are detected by the second winning opening detection sensor 43a, and outputs a HI level second signal for a specific period of time when one game ball is detected by the second winning opening detection sensor 43a. This specific period is long enough for the management CPU 112 to determine that a HI level second signal has been input to the second buffer 122b.

A third signal corresponding to the detection result of the third winning opening detection sensor 44a is input to the third buffer 122c. In this case, the main CPU 63 outputs a LOW level third signal when no new gaming balls are detected by the third winning opening detection sensor 44a, and outputs a HI level third signal for a specific period of time when one gaming ball is detected by the third winning opening detection sensor 44a. This specific period is long enough for the management CPU 112 to determine that a HI level third signal has been input to the third buffer 122c.

A fourth signal corresponding to the detection result of the special electric detection sensor 45a is input to the fourth buffer 122d. In this case, the main CPU 63 outputs a LOW level fourth signal when no new gaming balls are detected by the special electric detection sensor 45a, and outputs a HI level fourth signal for a specific period of time when one gaming ball is detected by the special electric detection sensor 45a. This specific period is long enough for the management CPU 112 to determine that a HI level fourth signal has been input to the fourth buffer 122d.

A fifth signal corresponding to the detection result of the first actuation port detection sensor 46a is input to the fifth buffer 122e. In this case, the main CPU 63 outputs a LOW level fifth signal when no new game balls are detected by the first actuation port detection sensor 46a, and outputs a HI level fifth signal for a specific period of time when one game ball is detected by the first actuation port detection sensor 46a. This specific period is long enough for the management CPU 112 to determine that a HI level fifth signal has been input to the fifth buffer 122e.

A sixth signal corresponding to the detection result of the second actuation port detection sensor 47a is input to the sixth buffer 122f. In this case, the main CPU 63 outputs a LOW level sixth signal when no new game balls are detected by the second actuation port detection sensor 47a, and outputs a HI level sixth signal for a specific period of time when one game ball is detected by the second actuation port detection sensor 47a. This specific period is long enough for the management CPU 112 to determine that a HI level sixth signal has been input to the sixth buffer 122f.

A seventh signal corresponding to the detection result of the outlet detection sensor 48a is input to the seventh buffer 122g. In this case, the main CPU 63 outputs a LOW level seventh signal when no new gaming balls are detected by the outlet detection sensor 48a, and outputs a HI level seventh signal for a specific period of time when one gaming ball is detected by the outlet detection sensor 48a. This specific period is long enough for the management CPU 112 to determine that a HI level seventh signal has been input to the seventh buffer 122g.

An eighth signal corresponding to whether or not the open/close execution mode is in progress is input to the eighth buffer 122h. In this case, the main CPU 63 continuously outputs a low-level eighth signal when the open/close execution mode is not in progress, and continuously outputs a high-level eighth signal when the open/close execution mode is in progress.

A ninth signal corresponding to whether or not the high-frequency support mode is in effect is input to the ninth buffer 122i. In this case, the main CPU 63 continuously outputs a LOW-level ninth signal when the high-frequency support mode is not in effect, and continuously outputs a HI-level ninth signal when the high-frequency support mode is in effect.

A tenth signal corresponding to whether or not the front door frame 14 is open is input to the tenth buffer 122j. In this case, the main CPU 63 continuously outputs a LOW level tenth signal when the front door frame 14 is closed, and continuously outputs a HI level tenth signal when the front door frame 14 is open.

An 11th signal corresponding to whether or not a game turn has started is input to the 11th buffer 122k. In this case, the main CPU 63 continues to output a LOW level 11th signal until a game turn starts, and once a game turn has started, outputs a HI level 11th signal for a specific period of time. This specific period is long enough for the management CPU 112 to determine that a HI level 11th signal has been input to the 11th buffer 122k.

A setting value update signal is input to the 15th buffer 122o to make the management CPU 112 aware that the main CPU 63 has newly set the setting state of the pachinko machine 10. In this case, the main CPU 63 outputs a LOW level setting value update signal when no new setting state has been set for the pachinko machine 10, and when a new setting state has been set for the pachinko machine 10, it outputs a HI level setting value update signal, a pulse signal that is maintained for a specific period of time, for the number of times corresponding to the newly set value. This specific period is long enough for the management CPU 112 to identify that a HI level setting value update signal has been input to the 15th buffer 122o.

An output instruction signal is input to the 16th buffer 122p to cause the management CPU 112 to recognize the opportunity to output the history information stored in the history memory 117 and the various parameters stored in the calculation result memory 131 to the read terminal 68d. In this case, the main CPU 63 outputs a LOW level output instruction signal when there is no need to output history information, and outputs a HIGH level output instruction signal for a specific period when there is a need to output history information. This specific period is long enough for the management CPU 112 to determine that a HIGH level output instruction signal has been input to the 16th buffer 122p.

Although the twelfth buffer 122l, thirteenth buffer 122m, and fourteenth buffer 122n can receive signals from the main CPU 63, they are blank and do not receive normal signals in this pachinko machine 10. In this way, by providing a greater number of buffers 122a-122p as input ports 121 of the management I/F 111 in this pachinko machine 10 than the number of signals output from the main CPU 63 to the management IC 66, it is possible to use the management IC 66 in models other than this pachinko machine 10. This increases the versatility of the management IC 66. Incidentally, signal paths 118a-118p are formed between the primary CPU 63 and the first through sixteenth buffers 122a-122p, respectively, in a one-to-one correspondence with the first through sixteenth buffers 122a-122p, but this is not limited to this, and the signal paths 118l-118n may not be formed between the primary CPU 63 and the buffers 122l-122n to be blanked.

The fact that a set value update signal is input to the 15th buffer 122o and that an output instruction signal is input to the 16th buffer 122p was determined during the design stage of the management IC 66, and the management CPU 112 can determine that a set value update signal is input to the 15th buffer 122o and that an output instruction signal is input to the 16th buffer 122p without receiving instructions from the main CPU 63. On the other hand, the type of signals input to the first through fourteenth buffers 122a through 122n was not determined during the design stage of the management IC 66, and the types of these signals are identified by the management CPU 112 upon receiving instructions from the main CPU 63. The management CPU 112 identifies the types of these signals when a type identification command is sent from the main CPU 63 to the management CPU 112 when control is initiated in the main CPU 63 and management CPU 112 following the start of supply of operating power to the MPU 62, as will be described in detail below. In this case, the information on the types of signals provided by the type identification command is stored in the correspondence memory 116, and when the management CPU 112 identifies the types of signals while operating power is being supplied, it references the information stored in the correspondence memory 116.

Figure 20 is an explanatory diagram illustrating the configuration of the correspondence memory 116. The correspondence memory 116 has first to fourteenth correspondence areas 123a to 123n that correspond one-to-one to the first to fourteenth buffers 122a to 122n provided in the input port 121 of the management side I/F 111.

The first correspondence area 123a stores information indicating that the signal input to the first buffer 122a is a general winning opening 31, which is used by the management CPU 112 to identify the type of signal input to the first buffer 122a. The first correspondence area 123a also stores information indicating that the signal input to the first buffer 122a is a general winning opening 31, along with information indicating the number of game balls (10) that will be paid out when one game ball enters the general winning opening 31. The second correspondence area 123b stores information indicating that the signal input to the second buffer 122b is a general winning opening 31, which is used by the management CPU 112 to identify the type of signal input to the second buffer 122b. The second correspondence area 123b also stores information indicating that the signal input to the second buffer 122b is a general winning opening 31, along with information indicating the number of game balls (10) that will be paid out when one game ball enters the general winning opening 31. The third correspondence area 123c stores information indicating that the signal input to the third buffer 122c is from the general winning opening 31, which is used by the management CPU 112 to identify the type of signal input to the third buffer 122c. In addition to the information indicating that the signal is from the general winning opening 31, the third correspondence area 123c also stores information on the number of game balls (10) that will be paid out when one game ball enters the general winning opening 31.

The fourth correspondence area 123d stores information indicating that the signal input to the fourth buffer 122d is a special electric winning device 32, which is used by the management CPU 112 to identify the type of signal. The fourth correspondence area 123d also stores information indicating that the signal is a special electric winning device 32, as well as information on the number of game balls (15) that will be paid out when one game ball enters the special electric winning device 32. The fifth correspondence area 123e stores information indicating that the signal is a first actuation port 33, which is used by the management CPU 112 to identify the type of signal input to the fifth buffer 122e. The fifth correspondence area 123e also stores information indicating that the signal is a first actuation port 33, as well as information on the number of game balls (1) that will be paid out when one game ball enters the first actuation port 33. The sixth correspondence area 123f stores information indicating that the signal input to the sixth buffer 122f is from the second actuation port 34, which is information used by the management CPU 112 to identify the type of signal. The sixth correspondence area 123f also stores information indicating that the signal is from the second actuation port 34, as well as information on the number of game balls (1) that will be paid out when one game ball enters the second actuation port 34. The seventh correspondence area 123g stores information indicating that the signal is from the outlet 24a, which is information used by the management CPU 112 to identify the type of signal input to the seventh buffer 122g.

The eighth correspondence area 123h stores information indicating the open/close execution mode, which is used by the management CPU 112 to identify the type of signal input to the eighth buffer 122h. The ninth correspondence area 123i stores information indicating the high frequency support mode, which is used by the management CPU 112 to identify the type of signal input to the ninth buffer 122i. The tenth correspondence area 123j stores information indicating the front door frame 14, which is used by the management CPU 112 to identify the type of signal input to the tenth buffer 122j. The eleventh correspondence area 123k stores information indicating the start of a game round, which is used by the management CPU 112 to identify the type of signal input to the eleventh buffer 122k.

The twelfth correspondence area 123l stores information indicating that it is blank and does not correspond to any of the signals, which is used by the management CPU 112 to identify the type of signal input to the twelfth buffer 122l. The thirteenth correspondence area 123m stores information indicating that it is blank and does not correspond to any of the signals, which is used by the management CPU 112 to identify the type of signal input to the thirteenth buffer 122m. The fourteenth correspondence area 123n stores information indicating that it is blank and does not correspond to any of the signals, which is used by the management CPU 112 to identify the type of signal input to the fourteenth buffer 122n.

As described above, the type of signal to be input to the first through fourteenth buffers 122a through 122n is determined by the management CPU 112 upon receiving instructions from the main CPU 63. This allows the management IC 66 to be used in models other than this pachinko machine 10. This increases the versatility of the management IC 66.

Furthermore, rather than outputting information for recognizing the type of signal each time a signal corresponding to the storage of history information is output to the first through fourteenth buffers 122a through 122n, information for recognizing the type of signal is output in advance, and information for identifying the type of signal to be input to the first through fourteenth buffers 122a through 122n based on the output information is stored in the correspondence memory 116. This makes it possible to reduce the amount of information output from the main CPU 63 to the management CPU 112 each time a signal is output, compared to a configuration in which information for recognizing the type of signal is output each time a signal corresponding to the storage of history information is output to the first through fourteenth buffers 122a through 122n.

In addition, information used by the management CPU 112 to identify the types of signals input to the first through fourteenth buffers 122a through 122n is output when the supply of operating power begins. This allows the management CPU 112 to identify the types of signals input to the first through fourteenth buffers 122a through 122n when play begins on this pachinko machine 10.

In addition, the information that a setting value update signal is input to the 15th buffer 122o and the information that an output instruction signal is input to the 16th buffer 122p are set during the design stage of the management IC 66. This makes it possible to omit processing to identify the type of signal input to the 15th buffer 122o and the 16th buffer 122p for setting value update signals and output instruction signals that are reliably used not only in this pachinko machine 10 but also in other models of pachinko machines that use the management IC 66. This makes it possible to reduce the processing load of processing to identify the type of such signals.

Next, we will explain the history memory 117 of the management IC 66. Figure 21 is an explanatory diagram illustrating the configuration of the history memory 117.

The history memory 117 has a history area 124 for sequentially storing history information. The history area 124 contains multiple pointer information items, each numbered consecutively. A history information storage area 125 is also provided in a one-to-one correspondence with each pointer information item. The history information storage area 125 can store combinations of RTC information and correspondence information. Each history information storage area 125 has a data capacity of 2 bytes, with 1 byte allocated as an area for storing RTC information and 1 byte allocated as an area for storing correspondence information. When correspondence information needs to be stored based on signals input to the first through fourteenth buffers 122a through 122n (actually the first through eleventh buffers 122a through 122k in the case of this pachinko machine 10), the date and time information currently measured by the RTC 115 is first stored in the area for storing RTC information in the history information storage area 125 corresponding to the pointer information currently being written. The correspondence information corresponding to the buffers 122a-122n that triggered the current information storage is then read from the correspondence areas 123a-123n in the correspondence memory 116 that correspond to those buffers 122a-122n, and the read correspondence information is stored in an area in the history information storage area 125 that stores correspondence information corresponding to the pointer information currently being written.

Specifically, with regard to the correspondence information stored in the history information storage area 125, as already explained, the first through seventh buffers 122a through 122g receive signals corresponding to the detection results of the ball entry detection sensors 42a through 48a, and therefore the first through seventh correspondence areas 123a through 123g in the correspondence memory 116 store information corresponding to the type of ball entry sensor 42a through 48a. More specifically, information corresponding to the type of ball entry section corresponding to each of the ball entry detection sensors 42a through 48a is stored in the first through seventh correspondence areas 123a through 123g. As already explained, in this pachinko machine 10, the first through third prize entry detection sensors 42a through 44a all detect game balls that have entered the general prize entry port 31, and therefore the first through third correspondence areas 123a through 123c corresponding to these first through third prize entry detection sensors 42a through 44a all store information indicating that the general prize entry port 31 is present. Additionally, the fourth correspondence area 123d stores information indicating that it is the special electric winning device 32, the fifth correspondence area 123e stores information indicating that it is the first operating port 33, the sixth correspondence area 123f stores information indicating that it is the second operating port 34, and the seventh correspondence area 123g stores information indicating that it is the outlet 24a. If the buffer 122a-122n that triggered the current information storage is one of the first through seventh buffers 122a-122g, information on the type of ball entry point corresponding to that buffer 122a-122g is read from one of the first through seventh correspondence areas 123a-123g, and the read information on the type of ball entry point is stored directly in the area for storing correspondence information in the history information storage area 125.

Meanwhile, the eighth buffer 122h receives a signal indicating whether the opening/closing execution mode is in progress, the ninth buffer 122i receives a signal indicating whether the high-frequency support mode is in progress, the tenth buffer 122j receives a signal indicating whether the front door frame 14 is open, and the eleventh buffer 122k receives a signal indicating whether a game has started. Therefore, the eighth correspondence area 123h stores information indicating the opening/closing execution mode, the ninth correspondence area 123i stores information indicating the high-frequency support mode, the tenth correspondence area 123j stores information indicating the front door frame 14, and the eleventh correspondence area 123k stores information indicating a game has started.

As explained above, the main CPU 63 continuously outputs a LOW-level 8 signal when the open/close execution mode is not active and a HIGH-level 8 signal when the open/close execution mode is active. Therefore, the management CPU 112 determines that the open/close execution mode has started when the 8th signal changes from LOW to HIGH, and determines that the open/close execution mode has ended when the 8th signal changes from HIGH to LOW. Furthermore, when the 8th signal changes from LOW to HIGH, or from HIGH to LOW, the management CPU 112 determines that an opportunity to store correspondence information in the history information storage area 125 has occurred. In other words, when the 8th signal changes from LOW to HIGH, not only the information indicating the open/close execution mode read from the 8th correspondence area 123h but also the start information are stored in the area for storing correspondence information in the history information storage area 125. Furthermore, when the eighth signal changes from HI to LOW, not only the information indicating the opening/closing execution mode read from the eighth correspondence area 123h but also the end information are stored in the area for storing correspondence information in the history information storage area 125.

As explained above, the main CPU 63 continuously outputs a LOW-level ninth signal when not in high-frequency support mode and a HIGH-level ninth signal when in high-frequency support mode. Therefore, the management CPU 112 can determine that high-frequency support mode has begun when the ninth signal changes from LOW to HIGH, and that high-frequency support mode has ended when the ninth signal changes from HIGH to LOW. Furthermore, when the ninth signal changes from LOW to HIGH, or from HIGH to LOW, the management CPU 112 determines that an opportunity to store correspondence information in the history information storage area 125 has occurred. In other words, when the ninth signal changes from LOW to HIGH, not only the information indicating high-frequency support mode read from the ninth correspondence area 123i but also the start information are stored in the area for storing correspondence information in the history information storage area 125. Furthermore, when the ninth signal changes from HI to LOW, not only the information indicating the high frequency support mode read from the ninth correspondence area 123i but also the end information are stored in an area for storing correspondence information in the history information storage area 125.

As already explained, the main CPU 63 continuously outputs a LOW level 10th signal when the front door frame 14 is closed, and continuously outputs a HIGH level 10th signal when the front door frame 14 is open. This allows the management CPU 112 to determine that the front door frame 14 is open when the 10th signal changes from LOW to HIGH, and to determine that the front door frame 14 is closed when the 10th signal changes from HI to LOW. Furthermore, when the 10th signal changes from LOW to HI, or from HI to LOW, the management CPU 112 determines that an opportunity has occurred to store correspondence information in the history information storage area 125. In other words, when the 10th signal changes from a LOW level to a HIGH level, not only the information indicating that it is the front door frame 14 read from the 10th correspondence area 123j but also the opening start information are stored in the area for storing correspondence information in the history information storage area 125. Also, when the 10th signal changes from a HIGH level to a LOW level, not only the information indicating that it is the front door frame 14 read from the 10th correspondence area 123j but also the opening end information are stored in the area for storing correspondence information in the history information storage area 125.

As already explained, the main CPU 63 continues to output a LOW level 11th signal until the start of a game round, and when the start of a game round arrives, it outputs a HIGH level 11th signal for a specific period of time. Therefore, the management CPU 112 determines that a game round has started when the 11th signal changes from a LOW level to a HIGH level. In other words, when the 11th signal changes from a LOW level to a HIGH level, the information indicating that this is a game round read from the 11th correspondence area 123k is stored in the area for storing correspondence information in the history information storage area 125.

The history information storage area 125 is provided for a sufficient number of times to store all history information generated during a 10-day consecutive business day, during which game balls are continuously fired from opening to closing. For example, if history information is generated 60,000 times per day, more than 600,000 history information storage areas 125 are provided. This makes it possible to store and retain all history information in the history memory 117 for at least 10 days.

The history memory 117 is provided with a pointer area 126 separate from the history area 124. The pointer area 126 stores information that allows the management CPU 112 to identify the pointer information currently being written to in the history memory 117. Specifically, when the pachinko machine 10 is shipped, the pointer area 126 is set with information specifying pointer information of "0" as the write target. Each time a new piece of history information is stored in the history information storage area 125, the information in the pointer area 126 is updated so that the value of the pointer information to be written is incremented by 1. When the last pointer information in the order is to be written and history information is stored in the history information storage area 125 corresponding to that last pointer information, the information in the pointer area 126 is updated so that pointer information of "0" is the write target. As a result, if a trigger occurs to store history information that exceeds the number of pieces of history information that can be stored, the oldest history information will be overwritten with the newest history information, starting with the oldest history information stored in the history information storage area 125.

In addition, when an external device attempts to read history information from history memory 117, the history information storage area 125 is cleared to all "0"s, and the information in pointer area 126 is updated so that pointer information of "0" becomes the write target. This makes it possible to prevent history information that has already been read from becoming the target for reading again.

Next, we will explain the specific processing configuration for managing game history using the management IC 66. First, we will explain the processing configuration for storing information on the correspondence between the first to fourteenth buffers 122a to 122n provided in the input port 121 of the management side I/F 111 and the signal type in the correspondence memory 116. Figure 22 is a flowchart showing the recognition processing executed by the main side CPU 63. Note that the recognition processing is executed in step S111 in the main processing (Figure 9).

First, the recognition output counter provided in the main RAM 65 is set to "14" (step S801). The recognition output counter is a counter used by the main CPU 63 to determine the remaining number of times information must be output in order to have the management CPU 112 recognize which type of signal the first to fourteenth buffers 122a to 122n of the input port 121 in the management I/F 111 correspond to. As already explained, the first to fourteenth buffers 122a to 122n are the 14 buffers that are the targets for signal type recognition, so the recognition output counter is set to "14".

Then, the primary CPU 63 executes the output process of an identification start command (step S802). The primary CPU 63 outputs various commands to the management CPU 112 to have the management CPU 112 recognize which types of signals the first through fourteenth buffers 122a through 122n correspond to. The first through eighth signals input to the first through eighth buffers 122a through 122h are used to output these commands. In other words, the first through eighth signals (i.e., the first through eighth signal paths 118a through 118h) used to instruct the management CPU 112 to store history information are used to output commands to have the management CPU 112 recognize which types of signals the first through fourteenth buffers 122a through 122n correspond to. This allows for a reduction in the number of signal paths and simplifies the configuration compared to a configuration in which the signal paths for outputting the commands are provided separately from the signal paths 118a through 118p for outputting signals to the first through sixteenth buffers 122a through 122p. The identification start command has a data capacity of 8 bits, and each bit of data is input to the first through eighth buffers 122a through 122h as the first through eighth signals, respectively. Furthermore, in the process of outputting the identification start command, the output state of the ninth signal is switched to HIGH level at the timing when the output of the identification start command begins, so that the management CPU 112 recognizes that a new command has been sent. Furthermore, the output period of the identification start command and the period during which the output state of the ninth signal is maintained at HIGH level are set long enough for the management CPU 112 to recognize the identification start command and the output state of the ninth signal. By receiving the identification start command, the management CPU 112 determines that it should start processing to store information on the correspondence between the first through fourteenth buffers 122a through 122n and signal types in the correspondence memory 116.

Then, a type identification command corresponding to the current value of the recognition output counter in the main RAM 65 is read from the main ROM 64 (step S803). In this case, the first buffer 122a is the first to be set as the signal type, and then the n+1th buffer is set as the signal type, and so on. Signal type recognition settings are performed for the first through fourteenth buffers 122a through 122n. Therefore, if the recognition output counter is "14" through "12," a type identification command indicating the general winning slot 31 and the number of prize balls is read; if the recognition output counter is "11," a type identification command indicating the special winning slot 32 and the number of prize balls is read; if the recognition output counter is "10," a type identification command indicating the first operating slot 33 and the number of prize balls is read; if the recognition output counter is "9," a type identification command indicating the second operating slot 34 and the number of prize balls is read; if the recognition output counter is "8," a type identification command indicating the outlet 31 is read; If the recognition output counter is "7", it reads a type identification command indicating that it is in open/close execution mode; if the recognition output counter is "6", it reads a type identification command indicating that it is in high frequency support mode; if the recognition output counter is "5", it reads a type identification command indicating that it is the front door frame 14; if the recognition output counter is "4", it reads a type identification command indicating that it is a play count; if the recognition output counter is "3" to "1", it reads a type identification command indicating that it is blank.

Then, the CPU 112 executes output processing for the read type identification command (step S804). Like the identification start command, the type identification command has an 8-bit data capacity, and each bit of data is input to the first through eighth buffers 122a through 122h as signals 1 through 8, respectively. During output processing for the identification type command, the output state of signal 9 is switched to HIGH level when output of the identification type command begins, allowing the management CPU 112 to recognize that a new command has been sent. The output period for the identification type command and the period for which the output state of signal 9 is maintained at HIGH are set long enough for the management CPU 112 to recognize the output states of the identification type command and signal 9. Upon receiving the identification type command, the management CPU 112 stores information corresponding to the identification type command in the correspondence area 123a through 123n corresponding to the buffer currently being set among the first through fourteenth buffers 122a through 122n.

Then, the value of the recognition output counter in the main RAM 65 is decremented by 1 (step S805), and it is determined whether the value of the recognition output counter after decrement is "0" (step S806). If the value of the recognition output counter is 1 or greater (step S806: NO), processing is executed to output a type identification command corresponding to the value of the recognition output counter after decrement (steps S803 and S804).

On the other hand, if the value of the recognition output counter is "0" (step S806: YES), the system executes the output process of the recognition end command (step S807). The recognition end command has a data capacity of 8 bits, and each bit of data is input to the first through eighth buffers 122a through 122h as the first through eighth signals, respectively. Furthermore, in the recognition end command output process, the output state of the ninth signal is switched to HIGH level when the recognition end command output begins, so that the management CPU 112 recognizes that a new command has been sent. Furthermore, the output period of the recognition end command and the period during which the output state of the ninth signal is maintained at HIGH are set long enough for the management CPU 112 to recognize the recognition of the recognition end command and the output state of the ninth signal. By receiving the recognition end command, the management CPU 112 determines that the process of storing the information on the correspondence between the first through fourteenth buffers 122a through 122n and signal types in the correspondence memory 116 has been completed.

Next, the management processing executed by the management CPU 112 will be described with reference to the flowchart in Figure 23. The management processing is initiated when the supply of operating power to the management CPU 112 is initiated. The processing speed of the management CPU 112 is configured to be faster than the processing speed of the main CPU 63, and the combination of processing from step S908 onwards in the management processing is executed 16 or more times between the start of one timer interrupt processing (Figure 11) in the main CPU 63 and the start of the next timer interrupt processing (Figure 11).

First, it is determined whether an identification start command has been received from the main CPU 63 (step S901). If an identification start command has not been received (step S901: NO), the process executes a setting update recognition process (step S902) and then returns to step S901. In the setting update recognition process, details of which will be described later, if the main CPU 63 performs a new setting on the setting status of the pachinko machine 10, the process corresponding to that setting is executed.

When an identification start command is received from the main CPU 63 (step S901: YES), the value of the setting target counter provided in the management RAM 114 is cleared to "0" (step S903). The setting target counter is a counter that the management CPU 112 uses to identify the type of buffer 122a to 122n for which the signal type is to be set. The first buffer 122a is the first to be set as the signal type, and then the nth buffer and then the (n+1)th buffer are set as the signal type.

After that, on the condition that a type identification command has been received from the main CPU 63 (step S904: YES), a correspondence setting process is executed (step S905). In the correspondence setting process, information on the signal type set in the currently received type identification command is stored in the correspondence area corresponding to the current value of the setting target counter in the management RAM 114, among the first to fourteenth correspondence areas 123a to 123n of the correspondence memory 116. Then, the value of the setting target counter in the management RAM 114 is incremented by 1 (step S906).

If a negative judgment is made in step S904, or if the processing of step S906 is executed, it is determined whether an identification end command has been received from the main CPU 63 (step S907). If an identification end command has not been received (step S907: NO), the processing returns to step S904, and the processing of steps S905 and S906 is executed again, provided that a new type identification command has been received from the main CPU 63 (step S904: YES).

If an identification end command has been received from the main CPU 63 (step S907: YES), steps S908 to S910 are repeatedly executed. In step S908, a history setting process is executed to store history information corresponding to the type of signal received from the main CPU 63 in the history memory 117, as will be described in detail later. In step S909, a display output process is executed to calculate various parameters using the history information stored in the history memory 117 and to notify the first to third notification display devices 69a to 69c of the calculation results, as will be described in detail later. In step S910, an external output process is executed to output the history information stored in the history memory 117 and the various parameters stored in the calculation result memory 131 to the read terminal 68d, as will be described in detail later.

Figure 24 is a time chart showing how information on the correspondence between the first through fourteenth buffers 122a through 122n and the types of signals input to these buffers 122a through 122n is stored in the correspondence memory 116. Figure 24(a) shows the period during which commands are output from the main CPU 63 to the management CPU 112 using the first through eighth signals (i.e., the first through eighth signal paths 118a through 118h), Figure 24(b) shows the period during which the output state of the ninth signal is at HI level, Figure 24(c) shows the execution period of the identification state during which processing is performed to identify the correspondence between the first through fourteenth buffers 122a through 122n and the types of signals input to these buffers 122a through 122n, and Figure 24(d) shows the timing when the correspondence setting process (step S905) is executed by the management CPU 112.

When the supply of operating power to the main CPU 63 and the management CPU 112 begins, output of the identification start command using signals 1 through 8 begins at time t1, as shown in Figure 24(a). Also at time t1, the output state of signal 9 changes from LOW to HIGH, as shown in Figure 24(b). Then, at time t2, while the output of the identification start command continues, the output state of signal 9 changes from HI to LOW, as shown in Figure 24(b). The management CPU 112 determines that a command has been sent from the main CPU 63 by confirming that the output state of signal 9 has changed from HI to LOW, and then determines the content of the command received from the main CPU 63 by checking the information in buffers 122a through 122h. In this case, because the identification start command has been received, the management CPU 112 enters the identification state by making a positive determination in step S901 of the management process (Figure 23). After that, at timing t3, output of the identification start command is stopped, as shown in Figure 24(a).

Then, at timing t4, output of the first type identification command using signals 1 through 8 begins, as shown in Figure 24(a). Also at timing t4, the output state of signal 9 changes from LOW to HIGH, as shown in Figure 24(b). Then, at timing t5, while the type identification command continues to be output, the output state of signal 9 changes from HI to LOW, as shown in Figure 24(b). The control CPU 112 determines that a command has been sent from the primary CPU 63 by confirming that the output state of signal 9 has changed from HI to LOW, and determines the content of the command received from the primary CPU 63 by checking the information in buffers 122a through 122h. In this case, since the first type identification command has been received, the control CPU 112 executes the correspondence setting process at timing t5, as shown in Figure 24(d). In this correspondence setting process, information indicating that the general winning slot 31 is selected and information on the number of winning balls is stored in the first correspondence area 123a of the correspondence memory 116. After that, at timing t6, the output of the type identification command is stopped as shown in Figure 24(a).

After that, from t7 to t9, from t10 to t12, from t13 to t15, and from t16 to t18, the management CPU 112 executes the correspondence setting process corresponding to the type identification command output from the main CPU 63, just as it did from t4 to t6. In this case, the correspondence setting process corresponding to the 14th type identification command is completed from t16 to t18.

Then, at timing t19, output of the identification end command using signals 1 to 8 begins, as shown in Figure 24(a). Also at timing t19, the output state of signal 9 changes from LOW to HIGH, as shown in Figure 24(b). Then, at timing t20, while the output of the identification end command is continuing, the output state of signal 9 changes from HI to LOW, as shown in Figure 24(b). The control CPU 112 determines that a command has been sent from the primary CPU 63 by confirming that the output state of signal 9 has changed from HI to LOW, and determines the content of the command received from the primary CPU 63 by checking the information in buffers 122a to 122h. In this case, because the identification end command has been received, the control CPU 112 ends its identification state at timing t20, as shown in Figure 24(c). Then, at timing t21, output of the identification end command is stopped, as shown in Figure 24(a).

As described above, by configuring the management CPU 112 to recognize whether a command is being output using the 9th signal, it is possible to have the management CPU 112 clearly recognize that a command is being output, even in a configuration in which commands are output using the 1st to 8th signals (i.e., the 1st to 8th signal paths) that are used to instruct the management CPU 112 when to store history information.

Next, we will explain the processing configuration for storing history information in the history memory 117. Figure 25 is a flowchart showing the management output processing executed by the main CPU 63. Note that the management output processing is executed in step S319 of the timer interrupt processing (Figure 11).

First, the managed object counter stored in the main RAM 65 is set to "11" (step S1001). The managed object counter is a counter that allows the main CPU 63 to determine whether there are any managed objects that have not yet been identified as whether the signal output status to the management CPU 112 should be changed in this management output process, and to identify which managed objects the signal output status to the management CPU 112 should be changed for. In one management output process, the main CPU 63 identifies 11 managed objects as whether the signal output status to the management CPU 112 should be changed: the seven ball entry detection sensors 42a-48a, whether the open/close execution mode is active, whether the high-frequency support mode is active, whether the front door frame 14 is open/closed, and whether a game round has started. Therefore, the managed object counter is initially set to "11".

Then, it is determined whether the signal output state to the management CPU 112 for the managed object corresponding to the current value of the managed object counter is at HI level (step S1002). If it is not at HI level (step S1002: NO), it is determined whether the value of the managed object counter is 5 or greater, thereby identifying which of the seven ball entry detection sensors 42a to 48a is the managed object corresponding to the value of the managed object counter (step S1003).

If a positive judgment is made in step S1003, it is determined whether the output flag in the main RAM 65 corresponding to the value of the managed counter is set to "1" (step S1004). Specifically, if the value of the managed counter is "11" and corresponds to the first winning slot detection sensor 42a, it is determined whether the first output flag is set to "1". If the value of the managed counter is "10" and corresponds to the second winning slot detection sensor 43a, it is determined whether the second output flag is set to "1". If the value of the managed counter is "9" and corresponds to the third winning slot detection sensor 44a, it is determined whether the third output flag is set to "1". If the value of the managed counter is "8" and corresponds to the special power detection sensor 45a, it is determined whether the third output flag is set to "1". If the value of the managed counter is "7" and corresponds to first actuation port detection sensor 46a, it determines whether the fourth output flag is set to "1." If the value of the managed counter is "6" and corresponds to second actuation port detection sensor 47a, it determines whether the sixth output flag is set to "1." If the value of the managed counter is "5" and corresponds to outlet 24a, it determines whether the seventh output flag is set to "1." As already explained, these first through seventh output flags are set to "1" during the ball entry detection process (Figure 15).

If the output flag corresponding to the value of the managed counter is set to "1" (step S1004: YES), the output state of the signal corresponding to the value of the managed counter among the first to seventh signals is set to HIGH (step S1005). Then, the output flag corresponding to the value of the managed counter is cleared to "0" (step S1006).

If a negative determination is made in step S1003, a determination is made as to whether an opportunity has occurred to switch the output state of the signal corresponding to the value of the managed counter to a high level (step S1007). Specifically, if the value of the managed counter is "4," a determination is made as to whether a transition to the open/close execution mode has occurred; if the value of the managed counter is "3," a determination is made as to whether a transition to the high-frequency support mode has occurred; if the value of the managed counter is "2," a determination is made as to whether the front door frame 14 has entered an open state; and if the value of the managed counter is "1," a determination is made as to whether a game turn has started by determining whether the 11th output flag is set to "1." If a positive determination is made in step S1007, the output state of the signal corresponding to the value of the managed counter is set to a high level (step S1008). Note that if the processing of step S1008 is executed when the value of the managed counter is "1," the 11th output flag is cleared to "0."

If a positive judgment is made in step S1002, it is determined whether an opportunity has occurred to switch the output state of the signal corresponding to the value of the managed counter to a LOW level (step S1009). Specifically, if the value of the managed counter is 5 or greater or "1" and the current managed object is one of the ball entry detection sensors 42a-48a or the start of a game, it is determined whether a HI output duration (specifically, 10 msec) has elapsed since the output state of the signal corresponding to the value of the managed counter, among signals 1 through 7 and signal 11, was switched from a LOW level to a HI level. This HI output duration is set by the management CPU 112 to a period longer than the longest processing interval of the history setting process (step S908) of the management process (Figure 23), and is a period that allows the management CPU 112 to reliably identify the output state of the signal that switched from a LOW level to a HIGH level. Furthermore, if the value of the management target counter is "4" and the current management target is in open/close execution mode, it determines whether the open/close execution mode has ended; if the value of the management target counter is "3" and the current management target is in high-frequency support mode, it determines whether the high-frequency support mode has ended; and if the value of the management target counter is "2" and the current management target is the front door frame 14, it determines whether the front door frame 14 is in a closed state. If an opportunity has arisen to switch the output state of the signal corresponding to the value of the management target counter to a LOW level (step S1009: YES), the output state of the signal corresponding to the value of the management target counter is set to a LOW level (step S1010).

If a negative judgment is made in step S1004, if the processing of step S1006 is executed, if a negative judgment is made in step S1007, if the processing of step S1008 is executed, if a negative judgment is made in step S1009, or if the processing of step S1010 is executed, the value of the managed object counter in the main RAM 65 is decremented by 1 (step S1011). Then, it is determined whether the value of the managed object counter after the decrement is "0" (step S1012). If the value of the managed object counter is 1 or greater (step S1012: NO), the processing from step S1002 onwards is executed for the managed object corresponding to the new managed object counter value.

Next, the history setting process executed by the management CPU 112 will be described with reference to the flowchart in Figure 26. The history setting process is executed in step S908 of the management process (Figure 23).

First, the number of buffers to be checked by the management CPU 112, out of the first through fourteenth buffers 122a through 122n, is set in a confirmation target counter provided in the management RAM 114 (step S1101). Specifically, the number of correspondence areas in the correspondence memory 116, out of the first through fourteenth correspondence areas 123a through 123n, that store information other than information indicating that they are blank is identified, and the information for this identified number is set in the confirmation target counter. As already explained, in this pachinko machine 10, information other than information indicating that they are blank is stored in the first through eleventh correspondence areas 123a through 123k, and therefore the confirmation target counter is set to "11" in step S1101.

Then, by checking whether the numerical information stored in the buffer corresponding to the current value of the counter to be checked, among the first through fourteenth buffers 122a through 122n, has changed from "0" to "1," it is determined whether the output state of the input signal from the main CPU 63 to that buffer has switched from LOW to HIGH (step S1102). Note that if the value of the counter to be checked is "n," the nth buffers 122a through 122n are the target for checking the numerical information. For example, if the value of the counter to be checked is "11," the eleventh buffer 122k is the target for checking the numerical information, and if the value of the counter to be checked is "5," the fifth buffer 122e is the target for checking the numerical information.

If a positive judgment is made in step S1102, RTC information, which is date and time information, is read from the RTC 115 (step S1103). Then, a write process to the history memory 117 is executed (step S1104). In this write process, the pointer information in the history area 124 that is the current write target is identified by referencing the pointer area 126 of the history memory 117, and the RTC information read in step S1103 is written to the history information storage area 125 of the history area 124 that corresponds to the pointer information that is the write target. In addition, correspondence information is read from the correspondence area 123a to 123n that corresponds to the current value of the counter to be confirmed, and the correspondence information is written to the history information storage area 125 that corresponds to the pointer information that is the write target. Furthermore, if the correspondence information is any of information indicating the opening/closing execution mode, information indicating the high-frequency support mode, and information indicating the front door frame 14, not only the correspondence information but also start information is written to the history information storage area 125 corresponding to the pointer information being written. Note that if the value of the counter to be checked is "n", the nth correspondence area 123a-123n is the target for reading the correspondence information. For example, if the value of the counter to be checked is "11", the eleventh correspondence area 123k is the target for reading the correspondence information, and if the value of the counter to be checked is "5", the fifth correspondence area 123e is the target for reading the correspondence information.

By executing the write process as described above, if the value of the counter to be checked is either the outlet 24a, general winning opening 31, special electric winning device 32, first operating opening 33, second operating opening 34, or number of plays, the history information storage area 125 corresponding to the pointer information being written stores a combination of RTC information and correspondence information indicating either the outlet 24a, general winning opening 31, special electric winning device 32, first operating opening 33, second operating opening 34, or number of plays as history information. Also, if the value of the counter to be checked is either the open/close execution mode, high-frequency support mode, or front door frame 14, the history information storage area 125 corresponding to the pointer information being written stores a combination of RTC information, correspondence information indicating either the open/close execution mode, high-frequency support mode, or front door frame 14, and start information as history information.

Then, the target pointer is updated (step S1105). In this update, the numerical information stored in the pointer area 126 of the history memory 117 is read and incremented by one. A determination is made as to whether the pointer information after incrementing by one has exceeded the maximum value of the pointer information in the history area 124. If the maximum value has not been exceeded, the pointer information after incrementing by one is overwritten in the pointer area 126 as new pointer information to be written. If the maximum value has been exceeded, the pointer area 126 is cleared to "0" so that the pointer information to be written becomes the initial pointer information.

If a negative judgment is made in step S1102, or if the processing of step S1105 is executed, it is determined whether the correspondence information for which it is to be confirmed whether the signal output has been switched to a LOW level is stored in the correspondence area 123a-123n corresponding to the current value of the counter to be confirmed (step S1106). Specifically, if the current value of the counter to be confirmed is between "8" and "10", the corresponding correspondence area 123h-123j stores any of the following information: opening/closing execution mode, high frequency support mode, or front door frame 14, and therefore a positive judgment is made in step S1106.

If a positive determination is made in step S1106, the system checks whether the numerical information stored in the buffer corresponding to the current counter value among the first through fourteenth buffers 122a through 122n has changed from "1" to "0," thereby determining whether the output state of the input signal from the master CPU 63 to that buffer has switched from HI to LOW (step S1107). If a positive determination is made in step S1107, the system reads the RTC information (step S1108), as in step S1103, and then executes a write process to the history memory 117 (step S1109). In this write process, the RTC information read in step S1108 is written to the history information storage area 125 in the history area 124 corresponding to the pointer information being written. Furthermore, the system reads the correspondence information from the correspondence area 123a through 123n corresponding to the current counter value being checked, and writes the correspondence information to the history information storage area 125 corresponding to the pointer information being written. In addition, not only the correspondence information but also the termination information is written to the history information storage area 125 corresponding to the pointer information being written. By executing the writing process in this manner, if the value of the counter being checked is either the open/close execution mode, the high frequency support mode, or the front door frame 14, a combination of RTC information, correspondence information indicating either the open/close execution mode, the high frequency support mode, or the front door frame 14, and the termination information is stored as history information in the history information storage area 125 corresponding to the pointer information being written. Thereafter, the target pointer update process is executed in the same manner as in step S1105 (step S1110).

If a negative judgment is made in step S1106, if a negative judgment is made in step S1107, or if the processing of step S1110 is executed, the value of the confirmation target counter in the management RAM 114 is decremented by 1 (step S1111). Then, it is determined whether the value of the confirmation target counter after the decrement is "0" (step S1112). If the value of the confirmation target counter is 1 or greater (step S1112: NO), the processing from step S1102 onwards is executed for the confirmation target corresponding to the new value of the confirmation target counter.

Next, the manner in which history information is stored in history memory 117 will be described with reference to the timing chart in Figure 27. Figure 27(a) shows the period when a HIGH level signal is input to any of the first to seventh and eleventh buffers 122a to 122g and 122k, Figure 27(b) shows the period when a HIGH level signal is input to the eighth buffer 122h, Figure 27(c) shows the period when a HIGH level signal is input to the ninth buffer 122i, Figure 27(d) shows the period when a HIGH level signal is input to the tenth buffer 122j, and Figure 27(e) shows the timing for writing history information to history memory 117.

At time t1, as shown in Figure 27(a), the output state of the signal input to one of the first through seventh and eleventh buffers 122a through 122g, and 122k is switched from low to high. Therefore, at time t1, history information is written to history memory 117 as shown in Figure 27(e). Then, at time t2, the signal that was switched to high at time t1 as shown in Figure 27(a) is switched to low. However, since this signal is input to one of the first through seventh and eleventh buffers 122a through 122g, and the low level switch is not a target for storing history information, no history information is written at time t2 as shown in Figure 27(e).

After that, at times t3, t5, t6, t9, t10, t13, and t14, the output state of the signal input to any of the first through seventh and eleventh buffers 122a through 122g, 122k is switched from LOW to HIGH, as shown in Figure 27(a). Therefore, at each of these times, history information is written, as shown in Figure 27(e).

As shown in Figure 27(b), the output state of the signal input to the eighth buffer 122h is HIGH from time t4 to time t7. This eighth buffer 122h corresponds to whether or not the open/close execution mode is active. Therefore, as shown in Figure 27(e), history information is written at time t4, when the output state of the signal input to the eighth buffer 122h switches to HIGH, and at time t7, when the output state of that signal switches to LOW. In this case, the history information written at time t4 includes start information, and the history information written at time t7 includes end information. This makes it possible to determine the execution period of the open/close execution mode by checking the history information in the history memory 117.

In addition, history information is written to the history memory 117 in chronological order. Therefore, it is possible to distinguish whether history information indicating that a ball has entered any of the outlet 24a, general winning opening 31, special electric winning device 32, first operating opening 33, and second operating opening 34 is from the opening/closing execution mode. Furthermore, because the history information includes RTC information, it is also possible to distinguish by comparing this RTC information whether history information indicating that a ball has entered any of the outlet 24a, general winning opening 31, special electric winning device 32, first operating opening 33, and second operating opening 34 is from the opening/closing execution mode.

As shown in Figure 27(c), the output state of the signal input to the ninth buffer 122i is HIGH from time t8 to time t11. This ninth buffer 122i corresponds to whether or not the high frequency support mode is active. Therefore, as shown in Figure 27(e), history information is written at time t8, when the output state of the signal input to the ninth buffer 122i switches to HIGH, and at time t11, when the output state of that signal switches to LOW. In this case, the history information written at time t8 includes start information, and the history information written at time t11 includes end information. This makes it possible to determine the execution period of the high frequency support mode by checking the history information in the history memory 117.

In addition, history information is written to history memory 117 in chronological order. Therefore, it is possible to distinguish whether history information indicating that a ball has entered any of outlet 24a, general winning opening 31, special electric winning device 32, first operating opening 33, and second operating opening 34 is from high-frequency support mode. Furthermore, because the history information includes RTC information, it is also possible to distinguish by comparing this RTC information whether history information indicating that a ball has entered any of outlet 24a, general winning opening 31, special electric winning device 32, first operating opening 33, and second operating opening 34 is from high-frequency support mode.

As shown in Figure 27(d), the output state of the signal input to the tenth buffer 122j is HIGH from time t12 to time t15. This tenth buffer 122j corresponds to whether the front door frame 14 is open or closed. Therefore, as shown in Figure 27(e), history information is written at time t12, when the output state of the signal input to the tenth buffer 122j switches to HIGH, and at time t15, when the output state of that signal switches to LOW. In this case, the history information written at time t12 contains start information, and the history information written at time t15 contains end information. This makes it possible to determine the period during which the front door frame 14 is open by checking the history information in the history memory 117.

In addition, history information is written to the history memory 117 in chronological order. Therefore, it is possible to distinguish whether history information indicating that a ball has entered any of the outlet 24a, general winning opening 31, special electric winning device 32, first operating opening 33, and second operating opening 34 occurred while the front door frame 14 was open. Furthermore, because the history information includes RTC information, it is also possible to distinguish by comparing this RTC information whether history information indicating that a ball has entered any of the outlet 24a, general winning opening 31, special electric winning device 32, first operating opening 33, and second operating opening 34 occurred while the front door frame 14 was open.

Next, we will explain the setting value update signal output process that is executed when the setting state of the pachinko machine 10 is set by the main CPU 63. Figure 28 is a flowchart showing the setting value update signal output process executed by the main CPU 63. Note that the setting value update signal output process is executed in step S119 in the main processing (Figure 9).

A value corresponding to the currently set value of the pachinko machine 10 is set in the pulse count counter provided in the main RAM 65 (step S1201). Specifically, the value of the setting value counter in the main RAM 65 is set in the pulse count counter. Then, it is determined whether the setting value update signal directed to the management CPU 112 is at a HI level (step S1202). As already explained, the setting value update signal is input to the 15th buffer 122o of the input port 121 in the management IC 66. Here, the output process of the setting value update signal is executed at a timing prior to the recognition process, which is a process for having the management CPU 112 identify the types of signals input to the 1st to 14th buffers 122a to 122n of the input port 121 during the main process (Figure 9). In contrast, the input of a setting value update signal to the 15th buffer 122o is set in the management IC 66 during the design stage of the pachinko machine 10, so even if the output process for the setting value update signal is executed before the recognition process, the management CPU 112 can identify that the signal input to the 15th buffer 122o is a setting value update signal.

If the determination in step S1202 is negative, the value of the LOW level counter provided in the main RAM 65 is decremented by 1 (step S1203), and it is determined whether the value of the LOW level counter after decrementing by 1 is "0" (step S1204). The LOW level counter is a counter used by the main CPU 63 to determine whether the set value update signal has been maintained at a LOW level for a predetermined period while multiple pulses at a HIGH level are output. If the value of the LOW level counter is "0" (step S1204: YES), this means that it is time to set the set value update signal to a HIGH level, and therefore the set value update signal is set to a HIGH level (step S1205).

Then, the HI level counter provided in the main RAM 65 is set to "20" (step S1206). The HI level counter is a counter used by the main CPU 63 to determine the period during which the set value update signal is maintained at a HI level. The value set in the HI level counter is decremented by 1 approximately every 10 microseconds, so that the set value update signal is maintained at a HI level for 200 microseconds when one pulse is output. This period during which the HI level is maintained is sufficient for the management CPU 112 to determine that the set value update signal has changed from a LOW level to a HI level.

If the set value update signal is at a high level (step S1202: YES), the value of the high level counter in the main RAM 65 is decremented by 1 (step S1207), and it is determined whether the value of the high level counter after decrementing by 1 is "0" (step S1208). If the value of the high level counter is "0" (step S1208: YES), this means that it is time to set the set value update signal to a low level, so the set value update signal is set to a low level (step S1209).

Then, the value of the pulse number counter in the main RAM 65 is decremented by 1 (step S1210), and it is determined whether the value of the pulse number counter after decrementing by 1 is "0" (step S1211). If the value of the pulse number counter is not "0" (step S1211: NO), this means that the output of pulse signals in response to the setting value update signal for the number of pulses corresponding to the currently set setting value of the pachinko machine 10 has not been completed, and the LOW level counter in the main RAM 65 is set to "20" (step S1212). The value set in the LOW level counter is decremented by 1 approximately every 10 microseconds, so it is maintained at a LOW level for 200 microseconds between multiple pulse outputs in response to the setting value update signal. This LOW level maintenance period is sufficient for the management CPU 112 to determine that the setting value update signal has changed from a HIGH level to a LOW level.

If the value of the pulse number counter is "0" (step S1211: YES), this means that the output of pulse signals due to the setting value update signal corresponding to the currently set setting value of the pachinko machine 10 has been completed, and the output process of the setting value identification end command is executed (step S1213). The setting value identification end command is a command that causes the management CPU 112 to recognize that the output of the setting value update signal that causes the management CPU 112 to recognize the currently set setting value of the pachinko machine 10 has been completed. When outputting the setting value identification end command, the first to eighth signals input to the first to eighth buffers 122a to 122h are used, just like the identification start command, type identification command, and identification end command. However, the signal pattern of the setting value identification end command is different from that of the identification start command, type identification command, and identification end command.

As described above, the setting value update signal output process outputs to the management IC 66 a number of pulse signals from the setting value update signal corresponding to the setting value of the pachinko machine 10 that was set when the current supply of operating power began. The management CPU 112 executes the setting update recognition process to determine the number of pulse signals from the setting value update signal, and based on this, determines the setting value of the pachinko machine 10 that was set this time.

Figure 29 is a flowchart showing the setting update recognition process executed by the management CPU 112. Note that the setting update recognition process is executed in step S902 of the management process (Figure 23).

It is determined whether the setting value update signal input to the 15th buffer 122o of the input port 121 has switched from a LOW level to a HIGH level (step S1301). If a positive determination is made in step S1301, the value of the setting value grasp counter provided in the management RAM 114 is set to "1" (step S1302). The setting value grasp counter is a counter used by the management CPU 112 to identify the setting value of the pachinko machine 10; for example, a setting value grasp counter value of "1" indicates "setting 1," and a setting value grasp counter value of "6" indicates "setting 6."

Then, it is determined whether the setting value update signal input to the 15th buffer 122o of the input port 121 has switched from LOW level to HIGH level again (step S1303). If a positive determination is made in step S1303, the value of the setting value grasp counter in the management RAM 114 is incremented by 1 (step S1304). As a result, the setting value of the pachinko machine 10 identified by the management CPU 112 is increased by one level.

If a negative determination is made in step S1303, or if the processing of step S1304 is executed, it is determined whether a set value identification end command has been received from the main CPU 63 based on the input status of the first to eighth signals input to the first to eighth buffers 122a to 122h of the input port 121 (step S1305). If a negative determination is made in step S1305, processing returns to step S1303.

If a positive determination is made in step S1305, RTC information, which is date and time information, is read from the RTC 115 (step S1306). Then, a write process to the history memory 117 is executed (step S1307). In this write process, the pointer information in the history area 124 that is currently being written to is identified by referencing the pointer area 126 of the history memory 117, and the RTC information read in step S1306 is written to the history information storage area 125 of the history area 124 that corresponds to the pointer information that is being written to. In addition, both information identifying the setting value and information about the value of the setting value grasp counter are written to the history information storage area 125 that corresponds to the pointer information that is being written to. As a result, a combination of information indicating that the setting state of the pachinko machine 10 has been newly set, RTC information corresponding to the date and time when the setting was made, and information about the setting value when the setting was made is stored as history information.

Then, the target pointer is updated (step S1308). In this update, the numerical information stored in the pointer area 126 of the history memory 117 is read and incremented by one. A determination is made as to whether the pointer information after incrementing by one has exceeded the maximum value of the pointer information in the history area 124. If the maximum value has not been exceeded, the pointer information after incrementing by one is overwritten in the pointer area 126 as new pointer information to be written. If the maximum value has been exceeded, the pointer area 126 is cleared to "0" so that the pointer information to be written becomes the initial pointer information.

When the setting update recognition process is executed as described above, when the setting status of the pachinko machine 10 is newly set, the fact that the setting was made, the date and time the setting was made, and the combination of setting values when the setting was made are stored as history information in the history area 124. As a result, by reading and analyzing the information stored in the history memory 117 using an external device connected to the reading terminal 68d, it is possible to determine the date and time the setting status of the pachinko machine 10 was newly set and the contents of the setting values when the setting was made.

Here, even if the setting state of the pachinko machine 10 is newly set, the information stored in the history memory 117 remains unchanged. This prevents the history information in the history memory 117 from being erased even when the setting state of the pachinko machine 10 is newly set, and the various parameters described below are calculated using history information that exists both before and after the timing of the change in the setting state of the pachinko machine 10. In this case, since the date and time when the setting state of the pachinko machine 10 was newly set as described above is stored in the history memory 117, by connecting an external device to the reading terminal 68d and reading the information stored in the history memory 117, it becomes possible to calculate the various parameters for the period after the setting state of the pachinko machine 10 was newly set and while that setting state was maintained.

Next, the display output process executed by the management CPU 112 will be described with reference to the flowchart in Figure 30. Note that the display output process is executed in step S909 of the management process (Figure 23).

First, it is determined whether it is time for calculation (step S1401). If 51 seconds have passed since the supply of operating power to the management CPU 112 began, or if 51 seconds have passed since the previous affirmative determination in step S1401, a positive determination is made in step S1401. If a positive determination is made in step S1401, the number of balls that enter during normal times is calculated (step S1402). Specifically, the number of balls that enter the outlet 24a is calculated by first counting the number of history information storage areas 125 in the history area 124 of the history memory 117 that store correspondence information indicating that the ball is the outlet 24a. In addition, the number of balls that enter the general winning slot 31 is calculated by counting the number of history information storage areas 125 in the history area 124 of the history memory 117 that store correspondence information indicating that the ball is the general winning slot 31. In addition, the number of balls that have entered the special power winning device 32 is calculated by counting the number of history information storage areas 125 in the history area 124 of the history memory 117 that store correspondence information indicating that the device is the special power winning device 32. In addition, the number of balls that have entered the first operating port 33 is calculated by counting the number of history information storage areas 125 in the history area 124 of the history memory 117 that store correspondence information indicating that the device is the first operating port 33. In addition, the number of balls that have entered the second operating port 34 is calculated by counting the number of history information storage areas 125 in the history area 124 of the history memory 117 that store correspondence information indicating that the device is the second operating port 34.

Then, by referencing the history information storage areas 125 in the history area 124 of the history memory 117 that exist in the period between the history information storage area 125 storing the correspondence relationship information and start information indicating that it is the front door frame 14 and the history information storage area 125 storing the correspondence relationship information and end information indicating that it is the front door frame 14, the number of balls that entered each of the outlet 24a, general winning opening 31, special electric winning device 32, first operating opening 33, and second operating opening 34 while the front door frame 14 was in the open state is calculated (step S1403). The period between the history information storage area 125 in the history area 124 of the history memory 117 storing the correspondence relationship information and start information indicating that it is the front door frame 14 and the history information storage area 125 storing the correspondence relationship information and end information indicating that it is the front door frame 14 is calculated from the RTC information stored in these history information storage areas 125. In addition, if there are multiple sections within the entire consecutive pointer information that have a history information storage area 125 storing correspondence information and start information indicating the front door frame 14 and a history information storage area 125 storing correspondence information and end information indicating the front door frame 14, the total number of balls scored for each section is calculated. In addition, if there is a history information storage area 125 storing correspondence information and start information indicating the front door frame 14, but the history information storage area 125 storing RTC information corresponding to a time later than the history information storage area 125 storing correspondence information and start information indicating the front door frame 14 does not store correspondence information and end information indicating the front door frame 14, all history information in the history information storage area 125 storing RTC information corresponding to a time later than the history information storage area 125 storing correspondence information and start information indicating the front door frame 14 is treated as if the front door frame 14 is in an open state.

Thereafter, various parameters are calculated using the calculation results of steps S1402 and S1403 (step S1404). Specifically, first, the number of balls that entered the outlet 24a while the front door frame 14 was open, calculated in step S1403, is subtracted from the number of balls that entered the outlet 24a calculated in step S1402. Then, the following first to eighth parameters are calculated using the number of balls that entered the outlet 24a after the subtraction. The difference between the number of balls that entered the outlet 24a calculated in step S1402 and the number of balls that entered the outlet 24a calculated in step S1403 is set as the number of balls that entered the outlet 24a, the difference between the number of balls that entered the general winning port 31 calculated in step S1402 and the number of balls that entered the general winning port 31 calculated in step S1403 is set as the number of balls that entered the outlet 24a, and the difference between the number of balls that entered the general winning port 31 calculated in step S1402 and the number of balls that entered the special winning device 32 calculated in step S1402 is set as the number of balls that entered the special winning device 32. The difference in the number of balls that enter the special electric winning device 32 calculated in step S1403 is designated as the number of balls that enter the device 32, the difference in the number of balls that enter the device 32 calculated in step S1403 from the number of balls that enter the device 32 calculated in step S1402 is designated as the number of balls that enter the device 32, the difference in the number of balls that enter the device 32 calculated in step S1403 from the number of balls that enter the device 32 calculated in step S1402 is designated as the number of balls that enter the device 32, and ....
First parameter: Total number of game balls paid out (K2 x "Number of prize balls for winning at the general winning port 31" + K3 x "Number of prize balls for winning at the special winning device 32" + K4 x "Number of prize balls for winning at the first operating port 33" + K5 x "Number of prize balls for winning at the second operating port 34") / Ratio of total number of game balls discharged from the skill area PA (K1 + K2 + K3 + K4 + K5) (hereinafter, this ratio will be referred to as "D1").
Second parameter: Ratio of total number of game balls entering the general winning port 31 (K2) / total number of game balls discharged from the game area PA (K1 + K2 + K3 + K4 + K5) Third parameter: Ratio of total number of game balls entering the special winning device 32 (K3) / total number of game balls discharged from the game area PA (K1 + K2 + K3 + K4 + K5) Fourth parameter: Ratio of total number of game balls entering the first operating port 33 (K4) / total number of game balls discharged from the game area PA (K1 + K2 + K3 + K4 + K5) (hereinafter, this ratio will be referred to as "D2")
Fifth parameter: the ratio of the total number of game balls entering the second operating port 34 (K5) to the total number of game balls discharged from the game area PA (K1 + K2 + K3 + K4 + K5) (hereinafter, this ratio will be referred to as "D3")
Sixth parameter: D1 - (D2 x "number of winning balls for winning through the first actuation port 33" + D3 x "number of winning balls for winning through the second actuation port 34")
Seventh parameter: (K3 x "number of prize balls for winning the special electric winning device 32" + K5 x "number of prize balls for winning the second operating port 34") / total number of game balls paid out (K2 x "number of prize balls for winning the general winning port 31" + K3 x "number of prize balls for winning the special electric winning device 32" + K4 x "number of prize balls for winning the first operating port 33" + K5 x "number of prize balls for winning the second operating port 34") the ratio of "number of prize balls for winning at the special electric winning device 32" to "total number of game balls paid out"); eighth parameter: K3 x "number of prize balls for winning at the special electric winning device 32" / total number of game balls paid out (K2 x "number of prize balls for winning at the general winning port 31" + K3 x "number of prize balls for winning at the special electric winning device 32" + K4 x "number of prize balls for winning at the first operating port 33" + K5 x "number of prize balls for winning at the second operating port 34") In step S1404, the first to eighth parameters, which are the calculation results, are stored in a normal time memory area in the calculation result memory 131. The first to eighth parameters stored in the normal time memory area are retained until the next time step S1404 is executed. In other words, when step S1404 is executed next time and the first to eighth parameters are calculated, the newly calculated first to eighth parameters are stored in the normal time memory area, overwriting the previous calculation results of the first to eighth parameters that had been stored in the normal time memory area.

Then, by referencing the history information storage areas 125 in the history area 124 of the history memory 117 that exist in the period between the history information storage area 125 storing the correspondence relationship information and start information indicating the open/close execution mode and the history information storage area 125 storing the correspondence relationship information and end information indicating the open/close execution mode, the number of balls that entered each of the outlet 24a, general winning opening 31, special electric winning device 32, first operating opening 33, and second operating opening 34 in the open/close execution mode is calculated (step S1405). The period between the history information storage area 125 storing the correspondence relationship information and start information indicating the open/close execution mode and the history information storage area 125 storing the correspondence relationship information and end information indicating the open/close execution mode in the history area 124 of the history memory 117 is calculated from the RTC information stored in these history information storage areas 125. Furthermore, if there are multiple sections within the entire set of consecutive pointer information between history information storage areas 125 storing correspondence information and start information indicating the opening and closing execution mode and history information storage areas 125 storing correspondence information and end information indicating the opening and closing execution mode, the total number of balls entered for each section is calculated. Furthermore, if there is a history information storage area 125 storing correspondence information and start information indicating the opening and closing execution mode, but the history information storage area 125 storing RTC information corresponding to a time later than the history information storage area 125 storing correspondence information and start information indicating the opening and closing execution mode does not store correspondence information and end information indicating the opening and closing execution mode, all history information in the history information storage area 125 storing RTC information corresponding to a time later than the history information storage area 125 storing correspondence information and start information indicating the opening and closing execution mode is treated as being in the opening and closing execution mode.

Then, during the period of the opening/closing execution mode identified in step S1405, the number of balls that entered each of the outlet 24a, general winning opening 31, special electric winning device 32, first operating opening 33, and second operating opening 34 while the front door frame 14 was in the open state is calculated (step S1406). The method for calculating these numbers of balls is the same as in step S1403, except that it is based on the period of the opening/closing execution mode identified in step S1405.

Thereafter, various parameters are calculated using the calculation results of steps S1405 and S1406 (step S1407). Specifically, first, the number of balls that entered the outlet 24a while the front door frame 14 was open, calculated in step S1406, is subtracted from the number of balls that entered the outlet 24a calculated in step S1405. Then, the following 11th to 18th parameters are calculated using the number of balls that entered the outlet 24a after the subtraction. The difference between the number of balls that entered the outlet 24a calculated in step S1405 and the number of balls that entered the outlet 24a calculated in step S1406 is set as the number of balls that entered the outlet 24a, the difference between the number of balls that entered the general winning port 31 calculated in step S1405 and the number of balls that entered the general winning port 31 calculated in step S1406 is set as the number of balls that entered the outlet 24a, and the difference between the number of balls that entered the general winning port 31 calculated in step S1405 and the number of balls that entered the special winning device 32 calculated in step S1405 is set as the number of balls that entered the special winning device 32. The difference in the number of balls that enter the special electric winning device 32 calculated in step S1406 is designated as the number of balls that enter K13, the difference in the number of balls that enter the first operating port 33 calculated in step S1405 from the number of balls that enter the first operating port 33 calculated in step S1406 is designated as the number of balls that enter K14, and the difference in the number of balls that enter the second operating port 34 calculated in step S1405 from the number of balls that enter the second operating port 34 calculated in step S1406 is designated as the number of balls that enter K15.
11th parameter: Total number of game balls paid out (K12 x "number of prize balls for winning at the general winning port 31" + K13 x "number of prize balls for winning at the special electric winning device 32" + K14 x "number of prize balls for winning at the first operating port 33" + K15 x "number of prize balls for winning at the second operating port 34") / ratio of total number of game balls discharged from the game area PA (K11 + K12 + K13 + K14 + K15) (hereinafter, this ratio will be referred to as "D11")
12th parameter: Ratio of total number of game balls entering the general winning port 31 K12/total number of game balls discharged from the game area PA (K11+K12+K13+K14+K15) 13th parameter: Ratio of total number of game balls entering the special winning device 32 K13/total number of game balls discharged from the game area PA (K11+K12+K13+K14+K15) 14th parameter: Ratio of total number of game balls entering the first operating port 33 K14/total number of game balls discharged from the game area PA (K11+K12+K13+K14+K15) (hereinafter, this ratio will be referred to as "D12")
・15th parameter: The ratio of the total number of game balls entering the second operating port 34 (K15) to the total number of game balls discharged from the game area PA (K11 + K12 + K13 + K14 + K15) (hereinafter, this ratio will be referred to as "D13")
16th parameter: D11 - (D12 x "number of winning balls for winning into the first actuation port 33" + D13 x "number of winning balls for winning into the second actuation port 34")
17th parameter: (K13 x "number of prize balls for winning the special electric winning device 32" + K15 x "number of prize balls for winning the second operating port 34") / total number of game balls paid out (K12 x "number of prize balls for winning the general winning port 31" + K13 x "number of prize balls for winning the special electric winning device 32" + K14 x "number of prize balls for winning the first operating port 33" + K15 x "number of prize balls for winning the second operating port 34") 18th parameter: K13 x "number of prize balls for winning at the special electric winning device 32" / total number of game balls paid out (K12 x "number of prize balls for winning at the general winning port 31" + K13 x "number of prize balls for winning at the special electric winning device 32" + K14 x "number of prize balls for winning at the first operating port 33" + K15 x "number of prize balls for winning at the second operating port 34") ratio In step S1407, the 11th to 18th parameters, which are the calculation results, are stored in a memory area for the opening and closing execution mode in the calculation result memory 131. The 11th to 18th parameters stored in the memory area for the opening and closing execution mode are retained until the next time step S1407 is executed. In other words, when step S1407 is executed next time and the 11th to 18th parameters are calculated, the newly calculated 11th to 18th parameters are stored in the memory area for the opening/closing execution mode, overwriting the previous calculation results of the 11th to 18th parameters that had been stored in the memory area for the opening/closing execution mode.

Then, by referencing the history information storage areas 125 in the history area 124 of the history memory 117 that exist in the period between the history information storage area 125 storing the correspondence relationship information and start information indicating the high-frequency support mode and the history information storage area 125 storing the correspondence relationship information and end information indicating the high-frequency support mode, the number of balls that entered each of the outlet 24a, general winning opening 31, special electric winning device 32, first operating opening 33, and second operating opening 34 during the high-frequency support mode situation is calculated (step S1408). The period between the history information storage area 125 storing the correspondence relationship information and start information indicating the high-frequency support mode and the history information storage area 125 storing the correspondence relationship information and end information indicating the high-frequency support mode is calculated from the RTC information stored in these history information storage areas 125. Furthermore, if there are multiple sections within the entire set of consecutive pointer information between history information storage areas 125 storing correspondence information and start information indicating high frequency support mode and history information storage areas 125 storing correspondence information and end information indicating high frequency support mode, the total number of balls scored for each section is calculated. Also, if there is a history information storage area 125 storing correspondence information and start information indicating high frequency support mode, but the history information storage area 125 storing RTC information corresponding to a time later than that history information storage area 125 does not store correspondence information and end information indicating high frequency support mode, any history information in history information storage areas 125 storing RTC information corresponding to a time later than that history information storage area 125 storing correspondence information and start information indicating high frequency support mode is treated as being in high frequency support mode.

Then, during the period of the high-frequency support mode identified in step S1408, the number of balls that entered each of the outlet 24a, general winning opening 31, special electric winning device 32, first operating opening 33, and second operating opening 34 while the front door frame 14 was in the open state is calculated (step S1409). The method for calculating these numbers of balls is the same as in step S1403, except that it is based on the period of the high-frequency support mode identified in step S1408.

Thereafter, various parameters are calculated using the calculation results of steps S1408 and S1409 (step S1410). Specifically, first, the number of balls that entered the outlet 24a while the front door frame 14 was open, calculated in step S1409, is subtracted from the number of balls that entered the outlet 24a calculated in step S1408. Then, the following 21st to 26th parameters are calculated using the number of balls that entered the outlet 24a after the subtraction. The difference between the number of balls that entered the outlet 24a calculated in step S1408 and the number of balls that entered the outlet 24a calculated in step S1409 is set as the number of balls that entered the outlet 24a, the difference between the number of balls that entered the general winning port 31 calculated in step S1408 and the number of balls that entered the general winning port 31 calculated in step S1409 is set as the number of balls that entered the outlet 24a, and the difference between the number of balls that entered the general winning port 31 calculated in step S1408 and the number of balls that entered the special winning device 32 calculated in step S1408 is set as the number of balls that entered the special winning device 32. The difference in the number of balls that enter the special electric winning device 32 calculated in step S1409 is designated as the number of balls that enter K23, the difference in the number of balls that enter the first operating port 33 calculated in step S1409 from the number of balls that enter the first operating port 33 calculated in step S1408 is designated as the number of balls that enter K24, and the difference in the number of balls that enter the second operating port 34 calculated in step S1408 from the number of balls that enter the second operating port 34 calculated in step S1409 is designated as the number of balls that enter K25.
21st parameter: Total number of game balls paid out (K22 x "number of prize balls for winning at the general winning port 31" + K23 x "number of prize balls for winning at the special winning device 32" + K24 x "number of prize balls for winning at the first operating port 33" + K25 x "number of prize balls for winning at the second operating port 34") / ratio of total number of game balls discharged from the game area PA (K21 + K22 + K23 + K24 + K25) (hereinafter, this ratio will be referred to as "D11")
22nd parameter: Ratio of total number of game balls entering the general winning port 31 K22 / total number of game balls discharged from the game area PA (K21 + K22 + K23 + K24 + K25) 23rd parameter: Ratio of total number of game balls entering the special winning device 32 K23 / total number of game balls discharged from the game area PA (K21 + K22 + K23 + K24 + K25) 24th parameter: Ratio of total number of game balls entering the first operating port 33 K24 / total number of game balls discharged from the game area PA (K21 + K22 + K23 + K24 + K25) (hereinafter, this ratio will be referred to as "D22")
25th parameter: The ratio of the total number of game balls entering the second operating port 34 (K25) to the total number of game balls discharged from the game area PA (K21 + K22 + K23 + K24 + K25) (hereinafter, this ratio will be referred to as "D23")
26th parameter: D21 - (D22 x "number of winning balls for winning through the first actuation port 33" + D23 x "number of winning balls for winning through the second actuation port 34")
In step S1410, the 21st to 26th parameters, which are the calculation results, are stored in a high frequency support mode storage area in the calculation result memory 131. The 21st to 26th parameters stored in the high frequency support mode storage area are held until the next execution of step S1410. In other words, when the next execution of step S1410 is performed and the 21st to 26th parameters are calculated, the newly calculated 21st to 26th parameters are stored in the high frequency support mode storage area, overwriting the previous calculation results of the 21st to 26th parameters that had been stored in the high frequency support mode storage area.

Thereafter, the frequency of occurrence of the opening/closing execution mode is calculated and stored (step S1411). Specifically, the number of occurrences of the opening/closing execution mode is calculated by counting the number of history information storage areas 125 in which correspondence relationship information and start information indicating the opening/closing execution mode are stored in the history area 124 of the history memory 117. The number of occurrences of game rounds is also calculated by counting the number of history information storage areas 125 in which correspondence relationship information indicating the start of a game round is stored in the history area 124 of the history memory 117. Then, the number of occurrences of the opening/closing execution mode per unit game round is calculated. The number of occurrences of the opening/closing execution mode is referred to as the occurrence number K31, and the number of occurrences of game rounds is referred to as the occurrence number K32.
・31st parameter: K31/K32
In step S1411, the 31st parameter, which is the calculation result, is stored in the opening/closing execution mode frequency storage area in the calculation result memory 131. The 31st parameter stored in the opening/closing execution mode frequency storage area is held until the next execution of step S1411. In other words, when the next step S1411 is executed and the 31st parameter is calculated, the newly calculated 31st parameter is stored in the opening/closing execution mode frequency storage area, overwriting the previous calculation result of the 31st parameter that had been stored in the opening/closing execution mode frequency storage area.

Thereafter, the occurrence frequency of the high-frequency support mode is calculated and stored (step S1412). Specifically, the number of occurrences of the high-frequency support mode is calculated by counting the number of history information storage areas 125 in which correspondence relationship information and start information indicating the high-frequency support mode are stored in the history area 124 of the history memory 117. The number of game occurrences is calculated by counting the number of history information storage areas 125 in which correspondence relationship information indicating the start of a game is stored in the history area 124 of the history memory 117. Then, the number of occurrences of the high-frequency support mode per unit game and the ratio of the number of occurrences of the high-frequency support mode to the number of occurrences of the open/close execution mode are calculated. The number of occurrences of the high-frequency support mode is referred to as the occurrence number K41, the number of game occurrences is referred to as the occurrence number K42, and the number of occurrences of the open/close execution mode calculated in step S1411 is referred to as the occurrence number K43.
41st parameter: K41/K42
・42nd parameter: K41/K43
In step S1412, the 41st to 42nd parameters, which are the calculation results, are stored in a high-frequency support mode frequency storage area in the calculation result memory 131. The 41st to 42nd parameters stored in the high-frequency support mode frequency storage area are held until the next execution of step S1412. In other words, when the next execution of step S1412 is performed and the 41st to 42nd parameters are calculated, the newly calculated 41st to 42nd parameters are stored in the high-frequency support mode frequency storage area, thereby overwriting the previous calculation results of the 41st to 42nd parameters that had been stored in the high-frequency support mode frequency storage area.

If a negative determination is made in step S1401, or if the processing of step S1412 is executed, display processing is executed (step S1413). Figure 31 is a flowchart showing the display processing.

First, the value of the update timing counter stored in the management RAM 114 is decremented by 1 (step S1501). The update timing counter is a counter used by the management CPU 112 to determine when it is time to update the display contents of the game history management results displayed on the first through third notification display devices 69a through 69c. The management CPU 112 controls the display of the first through third notification display devices 69a through 69c to notify the calculation results of the first through eighth parameters, the eleventh through eighteenth parameters, the twenty-first through twenty-sixth parameters, the thirty-first parameter, and the forty-first through forty-second parameters. In this case, the first notification display device 69a displays information corresponding to the type of parameter being notified. Furthermore, the second notification display device 69b displays the digit corresponding to the tens digit of the value obtained by multiplying the parameter being notified by 100, and the third notification display device 69c displays the digit corresponding to the ones digit. The first to third notification display devices 69a to 69c sequentially switch between displays corresponding to the calculation results of the first to eighth parameters, the eleventh to eighteenth parameters, the twenty-first to twenty-sixth parameters, the thirty-first parameter, and the forty-first to forty-second parameters in a predetermined order, and after the calculation result of the forty-second parameter, which is the last parameter to be displayed, is displayed, the calculation result of the first parameter, which is the first parameter to be displayed, is displayed. In this case, the calculation result of one parameter is continuously displayed for two seconds.

The calculation cycle for the various parameters in the management CPU 112 is 51 seconds. There are 25 parameters, and the calculation results for one parameter are continuously displayed for 2 seconds. Therefore, each parameter calculated by the management CPU 112 is displayed at least once on the first to third notification display devices 69a to 69c.

When the processing of step S1501 is executed, it is determined whether the value of the update timing counter after decrementing by 1 is "0" by determining whether it is time to update the display content of the first to third alarm display devices 69a to 69c (step S1502). If a positive determination is made in step S1502, the value of the display target counter stored in the management RAM 114 is incremented by 1 (step S1503). Then, if the value of the display target counter after incrementing by 1 exceeds the maximum value of "24" (step S1504: YES), the value of the display target counter is cleared to "0" (step S1505).

The display object counter is a counter that allows the management CPU 112 to identify the type of parameter to be displayed on the first to third alarm display devices 69a to 69c. There is a one-to-one correspondence between the first to eighth parameters, the eleventh to eighteenth parameters, the twenty-first to twenty-sixth parameters, the thirty-first parameter, and the forty-first to forty-second parameters and the possible values of the display object counter, "0" to "24." For example, when the value of the display object counter is "0," the first parameter, which is the first display object, is displayed on the first to third alarm display devices 69a to 69c; and when the value of the display object counter is "24," the forty-second parameter, which is the last display object, is displayed on the first to third alarm display devices 69a to 69c.

If a negative judgment is made in step S1504, or if the processing of step S1505 is executed, the display of the first alarm display device 69a is controlled so that information corresponding to the type of parameter corresponding to the value of the counter to be displayed is displayed (step S1506). Furthermore, the parameter corresponding to the value of the counter to be displayed is read from the calculation result memory 131, and the read parameter is multiplied by 100 so that the number corresponding to the tens digit is displayed on the second alarm display device 69b and the number corresponding to the ones digit is displayed on the third alarm display device 69c (step S1507). The contents displayed on the first to third alarm display devices 69a to 69c in steps S1506 and S1507 continue until the next update timing occurs or until the supply of operating power to the management CPU 112 is stopped. Thereafter, a value corresponding to 2 seconds is set in the update timing counter in the management RAM 114 as the value corresponding to the next update timing (step S1508).

By executing the display processing as described above, when the supply of operating power to the management CPU 112 has begun, the game history management results are displayed on the first to third notification display devices 69a to 69c. The game history management results are displayed regardless of whether play is continuing or not, and regardless of whether the gaming machine main body 12 has been opened relative to the outer frame 11 and the main control device 60 is visible from the front of the pachinko machine 10. By allowing the display control of the first to third notification display devices 69a to 69c to be executed in this way regardless of the game situation or the state of the pachinko machine 10, it is possible to simplify the processing configuration for display control of the first to third notification display devices 69a to 69c.

Display of the gaming history management results on the first to third notification display devices 69a to 69c begins after the supply of operating power to the management CPU 112 has begun and after an identification end command has been received from the main CPU 63. In this case, the information stored in the calculation result memory 131, like the information stored in the history memory 117, is stored and retained even when the supply of operating power to the pachinko machine 10 is stopped. Therefore, when the supply of operating power to the management CPU 112 begins, the gaming history management results calculated before the supply of operating power to the management CPU 112 was stopped are displayed.

When the setting status of the pachinko machine 10 is changed after the supply of operating power to the main CPU 63 begins, information corresponding to the setting value being changed will be displayed on the third notification display device 69c. However, the display of the information corresponding to the setting value is performed before the main CPU 63 sends an identification end command, whereas the display of the game history management results on the first to third notification display devices 69a to 69c begins after the main CPU 63 sends an identification end command. This makes it possible to prevent the display periods of these displays from overlapping, even when the third notification display device 69c is configured to serve both as a display device for displaying information corresponding to the setting value and as a display device for displaying the game history management results.

Furthermore, when information corresponding to the set value is displayed, the first notification display device 69a and the second notification display device 69b are hidden. In contrast, when the gaming history management results are displayed, the first notification display device 69a and the second notification display device 69b are not hidden. This makes it possible to distinguish whether the third notification display device 69c is displaying information corresponding to the set value or the gaming history management results.

Next, we will explain the processing configuration for outputting the history information stored in the history memory 117 and the various parameters stored in the calculation result memory 131 to an external device electrically connected to the read terminal 68d of the MPU 62. Figure 32(a) is a flowchart showing the data output processing executed by the main CPU 63. Note that the data output processing is executed in step S112 of the main processing (Figure 9).

The data output process first determines whether a connection signal indicating that an external device is electrically connected to the read terminal 68d has been received from the read terminal 68d (step S1601). If a negative determination is made in step S1601, the data output process is terminated. In this case, the supply of operating power to the main CPU 63 must be restarted in order for the data output process to be executed. Therefore, in order to externally output history information and various parameters, the supply of operating power to the main CPU 63 must be started with the external device electrically connected to the read terminal 68d. The power switch for stopping and starting the supply of operating power to the main CPU 63 is located on the payout mechanism 73 mounted on the back of the back pack unit 15. Therefore, in order to perform these stopping and starting operations, the gaming machine main body 12 must be opened relative to the outer frame 11 to expose the back of the back pack unit 15. In these circumstances, in order to enable the external output of history information and various parameters, the configuration requires that an external device be electrically connected to the reading terminal 68d before the supply of operating power to the main CPU 63 is started, making it difficult for anyone other than the amusement hall manager to read history information and various parameters.

If a positive determination is made in step S1601, a determination is made as to whether a control information confirmation signal has been received from the read terminal 68d, thereby determining whether the current connection of the external device to the read terminal 68d corresponds to confirmation of the control information (programs and data) of the main ROM 64 (step S1602). The external device is configured to be able to both confirm control information and check history information and various parameters. If confirmation of control information is selected by manual operation of the external device, a control information confirmation signal is transmitted from the external device. If confirmation of history information and various parameters is selected by manual operation of the external device, a history confirmation signal is transmitted from the external device. Note that this is not limited to this, and the external device for control information confirmation and the external device for history confirmation may be separate. In this case, if an external device for control information confirmation is electrically connected to the read terminal 68d, a control information confirmation signal is transmitted from the external device. If an external device for history confirmation is electrically connected to the read terminal 68d, a history confirmation signal is transmitted from the external device.

If a positive determination is made in step S1602, an output process for confirming control information is executed (step S1603). In this output process, programs and data are read from the main ROM 64 as control information, and the read control information is output to the read terminal 68d. This makes it possible for an external device electrically connected to the read terminal 68d to read the control information, making it possible to confirm whether the control information is authentic and normal.

If a negative judgment is made in step S1602, an output instruction signal is sent to the management CPU 112 (step S1604). Specifically, the output state of the output instruction signal is switched from LOW level to HIGH level. This HIGH level output state continues for a specific period of time. This specific period is long enough for the management CPU 112 to determine that a HIGH level output instruction signal has been input to the 16th buffer 122p. By switching the output state of the output instruction signal to HIGH level, the management CPU 112 executes processing to output history information.

Specifically, as shown in the flowchart of FIG. 32(b), when the output state of the output instruction signal input to the 16th buffer 122p of the input port 121 switches from LOW to HIGH (step S1701: YES), the management CPU 112 reads the history information stored in the history memory 117 and the various parameters stored in the calculation result memory 131, and outputs the read history information and various parameters to the read terminal 68d (step S1702). This allows the history information and various parameters to be read by an external device electrically connected to the read terminal 68d, making it possible to analyze the information on the game history management results. Furthermore, when the management CPU 112 outputs the history information to the read terminal 68d, it clears the history memory 117 to "0" (step S1703). The history information in the history memory 117 is erased only when the history information is read by an external device.

Returning to the explanation of the data output process (Figure 32(a)), when the process of step S1603 or step S1604 is executed, it is determined whether the electrical connection of the external device to the read terminal 68d continues (step S1605). If it continues (step S1605: YES), the process waits in step S1605. This makes it possible to prevent processes set in the execution order after the data output process from being executed until the external device is disconnected from the read terminal 68d. If the external device is disconnected from the read terminal 68d (step S1605: NO), the data output process is terminated.

The present embodiment described above provides the following excellent effects:

When a gaming ball enters any of the general winning slot 31, special electric winning device 32, first operating slot 33, and second operating slot 34, the gaming ball is paid out. Therefore, players play in the hope of a gaming ball entering one of these slots. In this configuration, when a gaming ball enters any of the outlet slot 24a, general winning slot 31, special electric winning device 32, first operating slot 33, and second operating slot 34 (hereinafter referred to as the history-targeted ball entry slots), the corresponding history information is stored in the history memory 117 of the management IC 66. This allows the pachinko machine 10 to store and retain information for managing the number and frequency of gaming balls entering each history-targeted ball entry slot. Using this managed information, it is possible to appropriately manage the status of gaming balls entering each history-targeted ball entry slot. Furthermore, because the history information is stored and retained within the pachinko machine 10 itself, unauthorized access to or unauthorized modification of the history information can be prevented.

All ball entry areas that eject game balls from the game area PA are subject to the execution of the history information storage process and are also subject to management using the history information. This makes it possible to manage the frequency of balls entering any history-target ball entry area using the history information. It also makes it possible to manage the ratio of the number of game balls that enter each history-target ball entry area to the number of game balls ejected from the game area PA using the history information.

The history information includes RTC information, which is information corresponding to the timing at which the game ball entered the history target ball entry area that triggered the storage of the history information. This makes it possible to use the history information to obtain a detailed understanding of the game ball entry history at the history target ball entry area.

The history memory 117 stores not only history information corresponding to game balls entering the history target ball entry section, but also history information indicating whether the opening/closing execution mode is active, history information indicating whether the high-frequency support mode is active, and history information indicating whether the front door frame 14 is open. This makes it possible to distinguish between these situations and manage the manner in which game balls enter the history target ball entry section.

The history information stored in the history memory 117 can be output to an external device external to the pachinko machine 10. This makes it possible to read the history information using the external device and use the read history information to analyze the manner in which game balls enter the history target ball entry area.

The MPU 62 is provided with a read terminal 68d, which allows an external device electrically connected to the read terminal 68d to read the program from the main ROM 64. This makes it possible to check whether the program is correct. In this configuration, the read terminal 68d, which is used to output the program externally, is used to output the history information stored in the history memory 117 externally. This makes it possible to output the history information externally without complicating the configuration.

It is determined whether the information to be output from the read terminal 68d is a program or history information, and the information corresponding to this determination result is output externally via the read terminal 68d. As a result, in a configuration in which the read terminal 68d used to externally output a program is used to externally output history information, the pachinko machine 10 determines whether the information to be externally output is a program or history information, and then outputs the determined information externally. Therefore, even in a configuration in which the read terminal 68d is used for both purposes, it is possible to read out only the necessary information.

Based on information received from an external device electrically connected to the read terminal 68d, it is determined whether the information to be output from the read terminal 68d is program information or history information. This makes it possible to avoid complicating the configuration for selecting the information to be output externally.

The MPU 62, which has a main ROM 64 that stores programs in advance, has a management IC 66 and a read terminal 68d. This makes it possible to consolidate the signal path to the read terminal 68d within the MPU 62. This makes it difficult to gain unauthorized access to the signal path to the read terminal 68d, while achieving the excellent effects already described.

A management CPU 112 is provided in addition to the main CPU 63, which executes processing to ensure that game balls are paid out based on their entry into either the general winning port 31, the special electric winning device 32, the first operating port 33, or the second operating port 34. The management CPU 112 executes processing to store history information in the history memory 117. This makes it possible to manage the entry patterns of game balls into each history-targeted entry port without excessively increasing the processing load on the main CPU 63.

The main CPU 63 and management CPU 112 are provided on the same chip as the MPU 62. This makes it possible to prevent unauthorized access to the communication path between the main CPU 63 and management CPU 112.

The main CPU 63 transmits information corresponding to the detection results of each ball entry detection sensor 42a-48a to each buffer 122a-122g of the input port 121 of the management IC 66 using the signal path corresponding to each ball entry detection sensor 42a-48a. This ensures that the type of information transmitted from the main CPU 63 corresponds to each buffer 122a-122g (i.e., each signal path), simplifying the configuration for distinguishing between types of information in the management CPU 112.

The main CPU 63 sends information corresponding to whether the machine is in open/close execution mode, whether the machine is in high-frequency support mode, whether the front door frame 14 is open, and whether a game has started to each buffer 122h-122k of the input port 121 of the management IC 66 using the signal paths corresponding to each of these situations. This allows the type of information corresponding to each of these situations to correspond to each buffer 122h-122k (i.e., each signal path), simplifying the configuration for distinguishing between each type of information in the management CPU 112.

The main CPU 63 transmits correspondence information to the management CPU 112, indicating which type of information each buffer 122a-122k (i.e., each signal path 118a-118k) corresponds to. This eliminates the need to store this correspondence information in advance in the management IC 66. This makes it possible to increase the versatility of the management IC 66.

When the supply of operating power to the main CPU 63 begins, the main CPU 63 transmits correspondence information to the management IC 66. This makes it possible for the management IC 66 to identify the correspondence between the information transmitted from the main CPU 63 and the history target ball entry area in situations where a game ball may enter the history target ball entry area.

The correspondence information is sent from the main CPU 63 to the management IC 66 using signal paths 118a-118g, which are used to transmit information indicating whether or not a game ball has entered the history target entry area. This simplifies the communication configuration compared to a configuration that requires a dedicated signal path for transmitting correspondence information.

The management IC 66 is provided with a correspondence memory 116, and the correspondence information sent from the main CPU 63 to the management IC 66 is stored in the correspondence memory 116. This eliminates the need to provide information that enables the management IC 66 to identify the historical target goal location corresponding to the information to be sent each time the main CPU 63 sends information on the detection results of each goal detection sensor 42a-48a. This makes it possible to reduce the amount of information on the detection results of each goal detection sensor 42a-48a sent from the main CPU 63.

When the output state of the output instruction signal output from the main CPU 63 to the management IC 66 switches from LOW to HIGH, information is output from the management IC 66 to the read terminal 68d. In this case, the management CPU 112 can determine that the signal path corresponding to the 16th buffer 122p corresponds to the output instruction signal without receiving correspondence information from the main CPU 63. This makes it possible to prevent the configuration for transmitting correspondence information from becoming extremely complicated.

The management IC 66 is provided with buffers 122a-122p capable of receiving information from the main CPU 63, a number greater than the number of types of information that need to be sent from the main CPU 63 to the management IC 66. This makes it possible to accommodate changes in the number of types of information depending on the model of pachinko machine 10 without changing the configuration of the buffers 122a-122p. This makes it possible to increase the versatility of the management IC 66.

When history information is sent from the management IC 66 to the read terminal 68d, the history information contains correspondence information indicating the type of history target ball entry area that corresponds to that history information. This makes it possible to use the read history information to identify the manner in which the game ball entered each history target ball entry area.

By using the history information stored in the history memory 117, the management IC 66 calculates various parameters (parameters 1 to 8, parameters 11 to 18, parameters 21 to 26, parameters 31, and parameters 41 to 42) corresponding to the manner in which game balls enter the play area PA over a specified period of time. These calculated parameters are then displayed sequentially on the first to third notification display devices 69a to 69c. This makes it possible for the pachinko machine 10 to notify the various parameters calculated using the history information.

Various parameters are calculated with historical information corresponding to the situation when the front door frame 14 is open excluded. This makes it possible to derive various parameters for the normal situation when the front door frame 14 is closed. In addition, various parameters corresponding to the situation in the open/close execution mode and the situation in the high-frequency support mode are calculated. This allows the manager of the amusement hall to understand the ball entry patterns corresponding to each situation.

When history information in history memory 117 is output to an external device, a process to clear history memory 117 is executed, thereby initializing history memory 117. This makes it less likely that history information that exceeds the storage capacity of history memory 117 will be stored in history memory 117, resulting in the history information that should have been stored being erased by overwriting.

In a configuration in which an external output corresponding to a game ball entering the first actuation port 33 or the second actuation port 34 is sent via the external terminal board 97, history information is stored in the history memory 117. This makes it possible to easily determine the number and frequency of game balls entering the first actuation port 33 or the second actuation port 34 by using the information output via the external terminal board 97, while accurately determining the number and frequency of game balls entering the history target ball entry areas by using the history information stored in the history memory 117.

The probability of a jackpot result in low probability mode varies depending on the setting of the pachinko machine 10, from "Setting 1" to "Setting 6." This makes it possible to create situations in which the probability of a jackpot result in low probability mode is favorable or unfavorable, even with a single pachinko machine 10. This makes it possible to increase the enjoyment of the game.

While the probability of achieving a jackpot in low probability mode varies depending on the setting of the pachinko machine 10, from "Setting 1" to "Setting 6," the probability of achieving a jackpot in high probability mode does not vary depending on the setting of the pachinko machine 10. This makes it possible to limit the impact of the setting of the pachinko machine 10 on the probability of achieving a jackpot to the situation in low probability mode. Furthermore, because the high probability hit/miss table 64g referenced in high probability mode can be made common regardless of the setting of the pachinko machine 10, it is possible to prevent an increase in the storage capacity required to pre-store the hit/miss tables 64a to 64g in the main ROM 64.

While the probability of a jackpot result in low probability mode varies depending on the setting of the pachinko machine 10, from "Setting 1" to "Setting 6," the allocation pattern for the types of jackpot results does not vary depending on the setting of the pachinko machine 10. This makes it possible to limit the impact of the setting of the pachinko machine 10 to the situation in low probability mode. Furthermore, because the allocation table 64h referenced when allocating the types of jackpot results can be made common regardless of the setting of the pachinko machine 10, it is possible to prevent an increase in the storage capacity required to pre-store the allocation table 64h in the main ROM 64.

Even if a new setting is made to the pachinko machine 10, the history information stored in the history memory 117 is not erased but retained. This makes it possible to continue storing the previous history information in the history memory 117 even if a new setting is made to the pachinko machine 10, and makes it possible to determine the results of game history management using the history information accumulated in the history memory 117 over a long period of time.

In a configuration in which the history information stored in the history memory 117 is not erased but retained even when a new setting is made to the setting state of the pachinko machine 10, when a new setting is made to the setting state of the pachinko machine 10, the corresponding history information is stored in the history memory 117. This makes it possible to distinguish between the history information before the new setting of the setting state of the pachinko machine 10 is made and the history information after the new setting is made.

When a new setting is made to the setting status of the pachinko machine 10 and the corresponding history information is stored in the history memory 117, information corresponding to that setting value is included in that history information. This makes it possible to identify the contents of previously set setting values by referencing the history information.

When calculating various parameters at the calculation timing, the history memory 117 may be configured to use history information corresponding to a new setting of the pachinko machine 10's setting status as a reference, and to calculate various parameters using history information stored later. In this case, it is possible to derive various parameters from the results of managing the game history at the timing after a new setting of the pachinko machine 10's setting status is made.

Furthermore, when various parameters are calculated at the calculation timing, the history information stored in the history memory 117 corresponding to a new setting of the setting state of the pachinko machine 10, which corresponds to a change in setting value, may be used as a reference, and the various parameters may be calculated using history information stored later. In this case, it is possible to derive the results of game history management at the timing after the setting state of the pachinko machine 10 is changed as various parameters.

In addition, while the main control device 60 has been configured with an opening in the circuit board box 60a to expose the reading terminal 68d, it may also be configured without such an opening and with the reading terminal 69d covered by the opposing wall portion 60b. In this case, it will be necessary to open the circuit board box 60a in order to connect an external device to the reading terminal 68d.

Second Embodiment
In this embodiment, the contents of the win/loss table corresponding to the setting state of the pachinko machine 10 are different from those of the first embodiment. Below, the configurations that are different from the first embodiment will be explained. Note that the explanation of the same configurations as the first embodiment will basically be omitted.

Figure 33 is an explanatory diagram illustrating the various tables stored in the main ROM 64 in this embodiment.

As shown in Figure 33, the main ROM 64 has an area 161 for setting 1, an area 162 for setting 2, an area 163 for setting 3, an area 164 for setting 4, an area 165 for setting 5, and an area 166 for setting 6. The area 161 for setting 1 stores a low probability win/lose table 161a for setting 1 that is referenced when the setting state of the pachinko machine 10 is "setting 1" and the win/lose lottery mode is the low probability mode, and a high probability win/lose table 161b for setting 1 that is referenced when the setting state of the pachinko machine 10 is "setting 1" and the win/lose lottery mode is the high probability mode. The setting 2 area 162 stores a setting 2 low-probability win/loss table 162a that is referenced when the setting state of the pachinko machine 10 is "setting 2" and the win/loss lottery mode is the low-probability mode, and a setting 2 high-probability win/loss table 162b that is referenced when the setting state of the pachinko machine 10 is "setting 2" and the win/loss lottery mode is the high-probability mode. The setting 3 area 163 stores a setting 3 low-probability win/loss table 163a that is referenced when the setting state of the pachinko machine 10 is "setting 3" and the win/loss lottery mode is the low-probability mode, and a setting 3 high-probability win/loss table 163b that is referenced when the setting state of the pachinko machine 10 is "setting 3" and the win/loss lottery mode is the high-probability mode.

The area for setting 4 164 stores a low-probability win/loss table 164a for setting 4 that is referenced when the setting state of the pachinko machine 10 is "setting 4" and the win/loss lottery mode is low-probability mode, and a high-probability win/loss table 164b for setting 4 that is referenced when the setting state of the pachinko machine 10 is "setting 4" and the win/loss lottery mode is high-probability mode. The area for setting 5 165 stores a low-probability win/loss table 165a for setting 5 that is referenced when the setting state of the pachinko machine 10 is "setting 5" and the win/loss lottery mode is low-probability mode, and a high-probability win/loss table 165b for setting 5 that is referenced when the setting state of the pachinko machine 10 is "setting 5" and the win/loss lottery mode is high-probability mode. The setting 6 area 166 stores a low probability win/lose table 166a for setting 6 that is referenced when the setting state of the pachinko machine 10 is "setting 6" and the win/lose lottery mode is the low probability mode, and a high probability win/lose table 166b for setting 6 that is referenced when the setting state of the pachinko machine 10 is "setting 6" and the win/lose lottery mode is the high probability mode.

The probability of winning a jackpot set for each of the low-probability tables 161a-166a is different. Specifically, when the low-probability table 161a for setting 1 is referenced, the probability of a jackpot result is approximately 1/320; when the low-probability table 162a for setting 2 is referenced, the probability of a jackpot result is approximately 1/310; when the low-probability table 163a for setting 3 is referenced, the probability of a jackpot result is approximately 1/300; when the low-probability table 164a for setting 4 is referenced, the probability of a jackpot result is approximately 1/290; when the low-probability table 165a for setting 5 is referenced, the probability of a jackpot result is approximately 1/280; and when the low-probability table 166a for setting 6 is referenced, the probability of a jackpot result is approximately 1/270. As a result, when the setting state of the pachinko machine 10 is set to a higher value, a jackpot result is more likely to occur in low probability mode, providing an advantage to the player.

The probability of winning a jackpot set for each of the high-probability tables 161b-166b is different. Specifically, when the high-probability table 161b for setting 1 is referenced, the probability of a jackpot result is approximately 1/45; when the high-probability table 162b for setting 2 is referenced, the probability of a jackpot result is approximately 1/40; when the high-probability table 163b for setting 3 is referenced, the probability of a jackpot result is approximately 1/35; when the high-probability table 164b for setting 4 is referenced, the probability of a jackpot result is approximately 1/30; when the high-probability table 165b for setting 5 is referenced, the probability of a jackpot result is approximately 1/25; and when the high-probability table 166b for setting 6 is referenced, the probability of a jackpot result is approximately 1/20. As a result, when the setting state of the pachinko machine 10 is set to a higher value, a jackpot result is more likely to occur in high-probability mode, which is advantageous for players.

In other words, in the first embodiment described above, the probability of winning a jackpot in low probability mode increases the higher the setting value of the pachinko machine 10, while the probability of winning a jackpot in high probability mode is the same regardless of the setting value from "Setting 1" to "Setting 6." However, in this embodiment, the probability of winning a jackpot in low probability mode and the probability of winning a jackpot in high probability mode both increase the higher the setting value of the pachinko machine 10. This makes it possible to increase the player's advantage by setting a high setting value.

In addition, even the probability of winning a jackpot in low probability mode when the pachinko machine 10 is set to the highest setting, "Setting 6," is set lower than the probability of winning a jackpot in high probability mode when the pachinko machine 10 is set to the lowest setting, "Setting 1." This makes it possible to prevent the player's advantage from becoming extremely low when the pachinko machine 10 is set to "Setting 1," and to prevent the player's advantage from becoming extremely high when the pachinko machine 10 is set to "Setting 6."

On the other hand, just like in the first embodiment, only one type of allocation table 64h is provided so that it is common to all settings from "Setting 1" to "Setting 6." This makes it possible to prevent advantages or disadvantages in the allocation pattern of jackpot results from arising depending on the setting state of the pachinko machine 10, and also makes it possible to reduce the storage capacity required to pre-store the allocation table 64h in the main ROM 64.

The configuration may also be such that the probability of winning a jackpot in low probability mode increases as the setting value of the pachinko machine 10 increases, while the probability of winning a jackpot in high probability mode decreases as the setting value of the pachinko machine 10 increases. In this case, it is possible to make it so that the higher the setting value of the pachinko machine 10 in low probability mode, the more advantageous it is for the player, and the lower the setting value of the pachinko machine 10 in high probability mode, the more advantageous it is for the player.

Furthermore, the probability of winning a jackpot in high probability mode increases as the setting value of the pachinko machine 10 increases, while the probability of winning a jackpot in low probability mode may be configured to remain constant across settings of "Setting 1" to "Setting 6." In this case, the higher the setting value of the pachinko machine 10 in high probability mode, the more advantageous it is for the player, and in low probability mode, it is possible to prevent any advantage or disadvantage arising from the setting value of the pachinko machine 10.

Third Embodiment
In this embodiment, the handling of the game history management results when the setting state of the pachinko machine 10 is newly set is different from the first embodiment. Below, the configurations that are different from the first embodiment will be explained. Note that the explanation of the same configurations as the first embodiment will basically be omitted.

In addition to the memories in the first embodiment described above, the management IC 66 is also provided with a separate storage memory 171 for storing information. Figure 34 is an explanatory diagram for explaining the separate storage memory 171. The separate storage memory 171 is a memory (i.e., non-volatile storage means) that does not require an external power supply to retain data, such as a NOR flash memory or NAND flash memory, and is used for both reading and writing.

The separate storage memory 171 is provided with a first separate storage area 172, a second separate storage area 173, a third separate storage area 174, a fourth separate storage area 175, and a fifth separate storage area 176. These first through fifth separate storage areas 172-176 sequentially store information on the game history management results calculated when the setting state of the pachinko machine 10 is newly set, more specifically, the various parameters described in the first embodiment above (the first through eighth parameters, the eleventh through eighteenth parameters, the twenty-first through twenty-sixth parameters, the thirty-first parameter, and the forty-first and forty-second parameters). In this case, when the setting state of the pachinko machine 10 is newly set, the various parameters are first stored in the first separate storage area 172. Thereafter, each time the setting state of the pachinko machine 10 is newly set, the storage area is switched from the nth separate storage area 172-176 to the n+1th separate storage area 172-176. Then, if the settings of the pachinko machine 10 are newly set after the various parameters have been stored in the fifth separate storage area 176, the various parameters are stored again in the first separate storage area 172. At this time, the various parameters already stored in the first separate storage area 172 are erased. As a result, the various parameters up to the fiveth time that a new setting of the settings of the pachinko machine 10 has been executed are stored in the separate storage memory 171, and for parameters exceeding five times, the oldest various parameters are erased and stored.

The various parameters stored in the first through fifth separate storage areas 172-176 can be read by an external device by connecting the external device to the reading terminal 68d. This makes it possible to understand the results of game history management before new settings are made in the pachinko machine 10.

Next, the setting update recognition process executed by the management CPU 112 in this embodiment will be explained with reference to the flowchart in Figure 35.

When the setting value update signal input to the 15th buffer 122o of the input port 121 switches from a LOW level to a HIGH level (step S1801: YES), the value of the setting value grasp counter in the management RAM 114 is set to "1" (step S1802). The setting value grasp counter is a counter used by the management CPU 112 to identify the setting value of the pachinko machine 10; for example, a setting value grasp counter value of "1" indicates "setting 1," and a setting value grasp counter value of "6" indicates "setting 6."

Then, it is determined whether the setting value update signal input to the 15th buffer 122o of the input port 121 has switched from LOW level to HIGH level again (step S1803). If a positive determination is made in step S1803, the value of the setting value grasp counter in the management RAM 114 is incremented by 1 (step S1804). As a result, the setting value of the pachinko machine 10 identified by the management CPU 112 is increased by one level.

If a negative determination is made in step S1803, or if the processing of step S1804 is executed, it is determined whether a set value identification end command has been received from the primary CPU 63 based on the input status of the first to eighth signals input to the first to eighth buffers 122a to 122h of the input port 121 (step S1805). If a negative determination is made in step S1805, processing returns to step S1803.

If a positive judgment is made in step S1805, a process for monitoring repeated changes is executed (step S1806). The process for monitoring repeated changes, which will be described in detail later, executes a process for notifying the user when new settings of the pachinko machine 10 are repeatedly made in a short period of time. In a configuration in which various parameters are stored in the separate storage memory 171 each time a new setting is made to the pachinko machine 10, it is expected that new settings of the pachinko machine 10 will be repeatedly made in a short period of time in order to intentionally erase the management results of the game history when play has been performed over a predetermined period of time. In response to this, the process for monitoring repeated changes is executed, and a corresponding notification will be issued if such an action is taken.

After that, various calculation processes are executed (step S1807). In the various calculation processes, steps S1402 to S1412 of the display output process (FIG. 30) in the first embodiment are executed. As a result, various parameters (parameters 1 to 8, parameters 11 to 18, parameters 21 to 26, parameters 31, and parameters 41 to 42) are calculated using the history information stored in the history memory 117 at that time.

Then, the various parameters calculated in step S1807 are stored in the current storage target area among the first to fifth separate storage areas 172-176 in the separate storage memory 171 (step S1808). A pointer information area is set in the separate storage memory 171 to enable the management CPU 112 to identify the storage target area among the first to fifth separate storage areas 172-176. The information in this pointer information area is updated so that when various parameters are stored in the storage target area among the first to fifth separate storage areas 172-176, the storage target is changed to the next sequential area. By executing the processing of step S1808, the various parameters at that time for the new setting of the current setting status of the pachinko machine 10 are stored in the separate storage memory 171.

Then, the history memory 117 is cleared to "0" (step S1809). In other words, in this embodiment, the history information in the history memory 117 is erased not only when the history information is read by an external device connected to the reading terminal 68d, but also when a new setting is made to the pachinko machine 10.

Then, RTC information, which is date and time information, is read from the RTC 115 (step S1810). Then, a write process to the history memory 117 is executed (step S1811). In this write process, the pointer information in the history area 124 that is currently being written to is identified by referencing the pointer area 126 of the history memory 117, and the RTC information read in step S1810 is written to the history information storage area 125 of the history area 124 that corresponds to the pointer information that is being written to. In addition, both information identifying the setting value and information on the value of the setting value grasp counter are written to the history information storage area 125 that corresponds to the pointer information that is being written to. As a result, a combination of information indicating that the setting state of the pachinko machine 10 has been newly set, RTC information corresponding to the date and time when the setting was made, and information on the setting value when the setting was made is stored as history information.

Then, the target pointer is updated (step S1812). In this update, the numerical information stored in the pointer area 126 of the history memory 117 is read and incremented by 1. A determination is made as to whether the pointer information after incrementing by 1 has exceeded the maximum value of the pointer information in the history area 124. If the maximum value has not been exceeded, the pointer information after incrementing by 1 is overwritten in the pointer area 126 as new pointer information to be written. If the maximum value has been exceeded, the pointer area 126 is cleared to "0" so that the pointer information to be written becomes the initial pointer information.

Next, the repeated change monitoring process executed in step S1806 will be explained with reference to the flowchart in Figure 36.

First, it is determined whether the number of times a game has been played since the setting state of the pachinko machine 10 was last set is within a reference number (specifically, 100 times) (step S1901). Specifically, the number of times a game has been played since the setting state of the pachinko machine 10 was last set is determined by counting the number of history information storage areas 125 in the history area 124 of the history memory 117 where correspondence information indicating the start of a game is stored, and it is then determined whether the determined number of times a game has been played is within a reference number (specifically, 100 times).

If a positive judgment is made in step S1901, the value of the repeat change counter provided in the separate storage memory 171 is incremented by 1 (step S1902). As already explained, the separate storage memory 171 is a memory that does not require an external power supply to retain its memory, and therefore does not require an external power supply to retain the value of the repeat change counter.

Then, it is determined whether the value of the repeat change counter after adding 1 exceeds the notification reference value of "5" (step S1903). The notification reference value corresponds to the number of the first through fifth separate storage areas 172-176 provided in the separate storage memory 171. Therefore, in step S1903, it is determined whether the number of times the new setting of the setting state of the pachinko machine 10 has been repeated without the execution of more than the reference number of games exceeds the number of the first through fifth separate storage areas 172-176.

If a positive judgment is made in step S1903, a repeat change display process is executed (step S1904). In the repeat change display process, the display content of the first through third notification display devices 69a through 69c is changed to a repeat change display content corresponding to the fact that a new setting of the pachinko machine 10 has been repeated a number of times exceeding the notification reference value in a short period of time. The repeat change display content is a display content that displays "E" on all first through third notification display devices 69a through 69c, and this display content does not appear under other circumstances. Furthermore, the state in which the repeat change display content is displayed on the first through third notification display devices 69a through 69c continues until the repeat change flag stored in the separate storage memory 171 is cleared to "0." The repeat change flag is a flag that the management CPU 112 uses to identify a situation in which the repeat change display content should be displayed on the first through third notification display devices 69a through 69c. Furthermore, if the repeat change flag is set to "1" and the repeat change display content is being displayed on the first to third notification display devices 69a to 69c, the display process in the first embodiment (Figure 31) is not executed. After that, the repeat change flag in the separate storage memory 171 is set to "1" (step S1905).

If the determination in step S1901 is negative, the value of the repeat change counter in the separate storage memory 171 is cleared to "0" (step S1906). Then, provided that the repeat change flag in the separate storage memory 171 is set to "1" (step S1907: YES), the display of the repeat change display content on the first to third notification display devices 69a to 69c is terminated (step S1908), and the repeat change flag is cleared to "0" (step S1909).

The present embodiment described above provides the following excellent effects:

When a new setting is made to the pachinko machine 10, the history information stored in the history memory 117 is erased. This makes it possible to leave in the history memory 117 the history information from games played after a new setting is made to the pachinko machine 10.

When a new setting is made to the pachinko machine 10, various parameters are calculated as the results of game history management using the history information in the history memory 117 at that time. This makes it possible to understand the game history management results in the situation before the new setting is made to the pachinko machine 10. Furthermore, even if the history information in the history memory 117 is erased when a new setting is made to the pachinko machine 10, it is possible to understand the game history management results based on the history information to be erased.

When a new setting is made in the pachinko machine 10, various parameters are calculated using the history information in the history memory 117 at that time, and these calculated parameters are stored in the separate storage memory 171. This makes it possible to grasp the gaming history management results from the situation before the new setting was made at any time thereafter, even if a new setting is made in the pachinko machine 10.

By providing multiple separate storage areas 172-176 in the separate storage memory 171, it is possible to store various parameters corresponding to the timing of multiple setting states. This makes it possible to understand the results of game history management over multiple periods, based on the timing at which new setting states were established. Furthermore, even if new setting states are repeatedly established for the pachinko machine 10 when no game is being played, it is possible to increase the likelihood that various parameters calculated using history information from situations in which game play is actually being played will remain in the separate storage memory 171.

The various parameters stored in the first through fifth separate storage areas 172-176 can be read by an external device by connecting the external device to the reading terminal 68d. This makes it possible to understand the results of game history management before new settings are made in the pachinko machine 10.

In a configuration in which various parameters are stored in the separate storage memory 171 each time a new setting is made to the pachinko machine 10, it is anticipated that new settings will be made repeatedly over a short period of time to intentionally erase the management results of the game history when play has been performed over a predetermined period of time. In response to this, by executing a process to monitor repeated changes, a corresponding notification will be issued if such an action is taken. This makes it possible to notify an administrator or the like that new settings have been made repeatedly over a short period of time to the pachinko machine 10.

The first to third notification display devices 69a to 69c notify the user that new settings have been repeatedly made to the pachinko machine 10 within a short period of time. This makes it possible to use the first to third notification display devices 69a to 69c, which are used to notify the user of the results of game history management, to notify the user that new settings have been repeatedly made to the pachinko machine 10 within a short period of time.

In situations where it is necessary to notify that new settings have been repeatedly made to the pachinko machine 10 in a short period of time, the first to third notification display devices 69a to 69c continue to display the repeated changes, and the first to third notification display devices 69a to 69c do not notify the results of management of the normal game history. This makes it possible to emphasize the notification that new settings have been repeatedly made to the pachinko machine 10 in a short period of time.

In the above configuration, a corresponding alert is issued when the number of times a new setting is made exceeds an alert reference value and the number of times the new setting is made is within a reference number. However, this is not limited to this configuration, and a corresponding alert may be issued when the total number of game balls discharged from the play area PA after a new setting is made is within a reference number and the number of times the new setting is made exceeds an alert reference value and the number of times the new setting is made is within a reference number. Also, a corresponding alert may be issued when the total number of game balls discharged into a predetermined ball entry section (e.g., the outlet port 24a, the general winning port 31, the first actuation port 33, or the second actuation port 34, or a predetermined combination thereof) after a new setting is made is within a reference number and the number of times the new setting is made exceeds an alert reference value and the number of times the new setting is made is within a reference number. Alternatively, if the total number of pieces of history information newly stored in the history memory 117 after a new setting of the setting status of the pachinko machine 10 is made is within a reference number, and the number of consecutive events for which the new setting is made exceeds the notification reference value, a corresponding notification may be issued.

Also, if a new setting of the pachinko machine 10 exceeds the notification reference value within a monitoring reference period (e.g., 600 seconds), a corresponding notification may be issued.

In addition, the configuration is such that a corresponding notification is issued if the number of times a game has been played since a new setting was made to the pachinko machine 10 is within a reference number of times and the number of consecutive times that the new setting is made exceeds the notification reference value.However, the configuration may also be such that a corresponding notification is issued if the number of consecutive times that a setting value is changed exceeds the notification reference value and the number of consecutive times that the number of consecutive times that the game has been played since a new setting was made to the pachinko machine 10 is within the reference number.

In addition, the configuration is such that a corresponding notification is issued when the number of games played since the setting state of the pachinko machine 10 was newly set is within a reference number and the number of consecutive games in which the new setting is performed exceeds a notification reference value.However, the configuration may also be such that a corresponding notification is issued when the number of games played since the setting state of the pachinko machine 10 was newly set is within a reference number and the number of consecutive games in which various parameters are calculated as a result of the new setting exceeds a notification reference value.

Furthermore, if the number of times a game has been played since a new setting was made to the pachinko machine 10 is within a reference number of times, and the number of consecutive events in which the new setting is made exceeds the notification reference value, a corresponding notification is issued. However, in addition to or instead of this, the progress of play may be limited for a predetermined period of time (for example, one hour).

<Fourth embodiment>
This embodiment differs from the third embodiment in that the repeated change monitoring process is executed by the main CPU 63. The following describes the configuration that differs from the third embodiment. Note that the description of the same configuration as the third embodiment will basically be omitted.

Figure 37 is a flowchart showing the repeat change monitoring process executed by the main CPU 63. Note that the repeat change monitoring process is executed when the setting value update process (step S118) is executed in the main process ( Figure 9 ). In other words, the repeat change monitoring process is executed when a new setting state of the pachinko machine 10 is set. However, this is not limited to this, and the repeat change monitoring process may also be configured to be executed when the setting value is changed.

First, it is determined whether the number of times a game has been played since the setting state of the pachinko machine 10 was last set is within a reference number (specifically, 100 times) (step S2001). The main RAM 65 is provided with a game count counter for measuring the number of times a game has been played since the setting state of the pachinko machine 10 was newly set, and the main CPU 63 increments the value of the game count counter by 1 each time a new game is played. This game count counter is excluded from being cleared to "0" even when the main RAM 65 clearing process (steps S105, S117) is executed.

If a positive judgment is made in step S2001, the value of the repeat change counter stored in the main RAM 65 is incremented by 1 (step S2002). This repeat change counter is excluded from being cleared to "0" even when the main RAM 65 clearing process (steps S105 and S117) is executed.

Then, it is determined whether the value of the repeat change counter after incrementing by 1 exceeds the notification reference value of "5" (step S2003). The notification reference value corresponds to the number of first through fifth separate storage areas 172-176 provided in the separate storage memory 171. Therefore, in step S2003, it is determined whether the number of times the new setting of the pachinko machine 10 has been repeated without an intervening game play exceeding the reference number of times exceeds the number of first through fifth separate storage areas 172-176.

If a positive judgment is made in step S2003, the repeat change flag stored in the main RAM 65 is set to "1" (step S2004). The repeat change flag is a flag used by the main CPU 63 to identify situations in which a repeat change notification should be issued. The repeat change flag is excluded from being cleared to "0" even when the main RAM 65 clearing process (steps S105 and S117) is executed.

If the determination in step S2001 is negative, the value of the repeat change counter in the main RAM 65 is cleared to "0" (step S2005). Then, if the repeat change flag in the main RAM 65 is set to "1" (step S2006: YES), the repeat change flag is cleared to "0" (step S2007).

In the repeat change monitoring process, if the repeat change flag in the main RAM 65 is set to "1" (step S2008: YES), a repeat change notification command is sent to the audio and light-emitting control device 81 (step S2009). When the audio and light-emitting control device 81 receives the repeat change notification command, it causes the pattern display device 41, display light-emitting unit 53, and speaker unit 54 to notify the repeat change. The repeat change notification continues until the supply of operating power to the audio and light-emitting control device 81 is stopped.

With the above configuration, it is possible to notify the administrator that new settings have been repeatedly made to the pachinko machine 10 in a short period of time, based on control by the main CPU 63. Furthermore, because this notification is made by the symbol display device 41, the display light-emitting unit 53, and the speaker unit 54, it is possible to make the administrator aware that new settings have been repeatedly made to the pachinko machine 10 in a short period of time, without having to open the gaming machine main body 12 forward relative to the outer frame 11.

In addition to or instead of a configuration in which a notification command for repeated changes to the setting status of the pachinko machine 10 is sent from the main CPU 63 to the audio and light control device 81 when new settings are made repeatedly within a short period of time, a corresponding external output may be generated.

Alternatively, the main CPU 63 may be configured to execute the repeated change monitoring process of this embodiment, while the management CPU 112 may be configured to execute the repeated change monitoring process of the third embodiment. This makes it possible to closely monitor whether new settings for the pachinko machine 10 are repeatedly made within a short period of time.

Fifth Embodiment
In this embodiment, the processing configuration of the setting update recognition process in the management CPU 112 differs from that of the third embodiment. The configuration that differs from the third embodiment will be described below. Note that the description of the same configuration as the third embodiment will basically be omitted.

Figure 38 is a flowchart showing the setting update recognition process in this embodiment, executed by the management CPU 112.

When the setting value update signal input to the 15th buffer 122o of the input port 121 switches from LOW level to HIGH level (step S2101: YES), the value of the setting value grasp counter in the management RAM 114 is set to "1" (step S2102). The setting value grasp counter is a counter used by the management CPU 112 to identify the setting value of the pachinko machine 10; for example, a setting value grasp counter value of "1" indicates "setting 1," and a setting value grasp counter value of "6" indicates "setting 6."

Then, it is determined whether the setting value update signal input to the 15th buffer 122o of the input port 121 has switched from LOW level to HIGH level again (step S2103). If a positive determination is made in step S2103, the value of the setting value grasp counter in the management RAM 114 is incremented by 1 (step S2104). This causes the setting value of the pachinko machine 10 identified by the management CPU 112 to increase by one level.

If a negative determination is made in step S2103, or if the processing of step S2104 is executed, it is determined whether a set value identification end command has been received from the main CPU 63 based on the input status of the first to eighth signals input to the first to eighth buffers 122a to 122h of the input port 121 (step S2105). If a negative determination is made in step S2105, processing returns to step S2103.

If a positive determination is made in step S2105, it is determined whether or not a predetermined number of pieces of predetermined history information exist in the history memory 117 (step S2106). Specifically, the number of history information storage areas 125 in which correspondence information indicating the start of a game is stored in the history area 124 of the history memory 117 is counted to determine the number of games that have been played since the setting state of the pachinko machine 10 was last set, and it is then determined whether or not the determined number of games has exceeded a reference number (specifically, 100). However, this is not limited to this, and step S2106 may be configured to determine whether or not the number of history information storage areas 125 in which correspondence information indicating that game balls have been ejected from the play area PA is stored exceeds a reference number (specifically, 1,000). Alternatively, step S2106 may be configured to determine whether the number of history information storage areas 125 storing correspondence relationship information indicating that game balls have entered a predetermined ball entry section (for example, any one of the outlet 24a, general entry port 31, first actuation port 33, and second actuation port 34, or a predetermined combination thereof) exceeds a reference number (specifically, 1,000). Alternatively, step S2106 may be configured to determine whether the total number of pieces of history information stored in the history memory 117 exceeds a reference number (specifically, 1,000).

In the above configuration, a corresponding alert is issued when the number of times a new setting is made exceeds an alert reference value and the number of times the new setting is made is within a reference number. However, this is not limited to this configuration, and a corresponding alert may be issued when the total number of game balls discharged from the play area PA after a new setting is made is within a reference number and the number of times the new setting is made exceeds an alert reference value and the number of times the new setting is made is within a reference number. Also, a corresponding alert may be issued when the total number of game balls discharged into a predetermined ball entry section (e.g., the outlet port 24a, the general winning port 31, the first actuation port 33, or the second actuation port 34, or a predetermined combination thereof) after a new setting is made is within a reference number and the number of times the new setting is made exceeds an alert reference value and the number of times the new setting is made is within a reference number. Alternatively, if the total number of pieces of history information newly stored in the history memory 117 after a new setting of the setting status of the pachinko machine 10 is made is within a reference number, and the number of consecutive events for which the new setting is made exceeds the notification reference value, a corresponding notification may be issued.

If a positive determination is made in step S2106, various calculation processes are executed (step S2107). These calculation processes include steps S1402 to S1412 of the display output process (FIG. 30) in the first embodiment described above. As a result, various parameters (parameters 1 to 8, parameters 11 to 18, parameters 21 to 26, parameters 31, and parameters 41 to 42) are calculated using the history information stored in history memory 117 at that time.

Then, the various parameters calculated in step S2107 are stored in the current storage target area among the first to fifth separate storage areas 172-176 in the separate storage memory 171 (step S2108). A pointer information area is set in the separate storage memory 171 to enable the management CPU 112 to identify the storage target area among the first to fifth separate storage areas 172-176. The information in this pointer information area is updated so that when various parameters are stored in the storage target area among the first to fifth separate storage areas 172-176, the storage target is changed to the next area in order. By executing the processing of step S2108, the various parameters at that time for the new setting of the current setting status of the pachinko machine 10 are stored in the separate storage area 171.

If a negative judgment is made in step S2106, or if the processing of step S2108 is executed, the history memory 117 is cleared to "0" (step S2109). In other words, in this embodiment, the history information in the history memory 117 is erased not only when the history information is read by an external device connected to the reading terminal 68d, but also when a new setting state is set for the pachinko machine 10.

Then, RTC information, which is date and time information, is read from the RTC 115 (step S2110). Then, a write process to the history memory 117 is executed (step S2111). In this write process, the pointer information in the history area 124 that is currently being written to is identified by referencing the pointer area 126 of the history memory 117, and the RTC information read in step S2110 is written to the history information storage area 125 of the history area 124 that corresponds to the pointer information that is being written to. In addition, both information identifying the setting value and information on the value of the setting value grasp counter are written to the history information storage area 125 that corresponds to the pointer information that is being written to. This results in a combination of information indicating that the setting state of the pachinko machine 10 has been newly set, RTC information corresponding to the date and time when the setting was made, and information on the setting value when the setting was made being stored as history information.

Then, the target pointer is updated (step S2112). In this update, the numerical information stored in the pointer area 126 of the history memory 117 is read and incremented by 1. A determination is made as to whether the pointer information after incrementing by 1 has exceeded the maximum value of the pointer information in the history area 124. If the maximum value has not been exceeded, the pointer information after incrementing by 1 is overwritten in the pointer area 126 as new pointer information to be written. If the maximum value has been exceeded, the pointer area 126 is cleared to "0" so that the pointer information to be written becomes the initial pointer information.

With the above configuration, when the setting state of the pachinko machine 10 is newly set, various parameters are calculated using the history information stored in the history memory 117, and these various parameters are stored in the separate storage memory 171, provided that a predetermined number of pieces of history information are stored in the history memory 117. This makes it possible to store information on the management results of the game history as a result of actual game play, even if new settings of the pachinko machine 10 are repeatedly made in a short period of time, in the separate storage memory 171.

The processing of step S2109 may be configured to be executed on the condition that the processing of steps S2107 and S2108 has been executed. In other words, the history information stored in the history memory 117 is erased on the condition that a predetermined number of pieces of history information or more are stored in the history memory 117. This makes it possible to prevent the history information in the history memory 117 from being erased even if new settings for the setting state of the pachinko machine 10 are repeatedly made in a short period of time.

Sixth Embodiment
In this embodiment, the configuration of the history memory 117 is different from that of the first embodiment. The following describes the configuration that differs from the first embodiment. Note that the description of the same configuration as the first embodiment will basically be omitted.

Figure 39 is an explanatory diagram illustrating the configuration of the history memory 117 in this embodiment.

The history memory 117 has a total area 141, a first state area 142, a second state area 143, and a third state area 144. Each of these areas 141-144 has first to fourteenth counters 141a-141n, 142a-142n, 143a-143n, and 144a-144n. The first counters 141a-144a in each of areas 141-144 store information on the number of times the output state of the first signal input to the first buffer 122a has changed from a low level to a high level. The second counters 141b-144b in each of areas 141-144 store information on the number of times the output state of the second signal input to the second buffer 122b has changed from a low level to a high level. The third counters 141c to 144c in each of the areas 141 to 144 store information on the number of times the output state of the third signal input to the third buffer 122c has changed from a low level to a high level. The fourth counters 141d to 144d in each of the areas 141 to 144 store information on the number of times the output state of the fourth signal input to the fourth buffer 122d has changed from a low level to a high level. The fifth counters 141e to 144e in each of the areas 141 to 144 store information on the number of times the output state of the fifth signal input to the fifth buffer 122e has changed from a low level to a high level. The sixth counters 141f to 144f in each of the areas 141 to 144 store information on the number of times the output state of the sixth signal input to the sixth buffer 122f has changed from a low level to a high level. The seventh counters 141g to 144g in each of the areas 141 to 144 store information on the number of times the output state of the seventh signal input to the seventh buffer 122g has changed from a low level to a high level. The eighth counters 141h to 144h in each of the areas 141 to 144 store information on the number of times the output state of the eighth signal input to the eighth buffer 122h has changed from a low level to a high level. The ninth counters 141i to 144i in each of the areas 141 to 144 store information on the number of times the output state of the ninth signal input to the ninth buffer 122i has changed from a low level to a high level. The tenth counters 141j to 144j in each of the areas 141 to 144 store information on the number of times the output state of the tenth signal input to the tenth buffer 122j has changed from a low level to a high level. The eleventh counters 141k to 144k in each of areas 141 to 144 store information on the number of times the output state of the eleventh signal input to the eleventh buffer 122k has changed from low to high. The twelfth counters 141l to 144l in each of areas 141 to 144 store information on the number of times the output state of the twelfth signal input to the twelfth buffer 122l has changed from low to high. The thirteenth counters 141m to 144m in each of areas 141 to 144 store information on the number of times the output state of the thirteenth signal input to the thirteenth buffer 122m has changed from low to high. The fourteenth counters 141n to 144n in each of areas 141 to 144 store information on the number of times the output state of the fourteenth signal input to the fourteenth buffer 122n has changed from low to high.

Figure 40 is a flowchart showing the history setting process in this embodiment, which is executed by the management CPU 112.

First, the number of buffers to be checked by the management CPU 112, among the first through fourteenth buffers 122a through 122n, is set in the confirmation target counter in the management RAM 114 (step S2201). Specifically, the number of correspondence areas in the correspondence memory 116, among the first through fourteenth correspondence areas 123a through 123n, that store information other than information indicating that they are blank is identified, and the information for this identified number is set in the confirmation target counter. In this pachinko machine 10, information other than information indicating that they are blank is stored in the first through eleventh correspondence areas 123a through 123k, so in step S2201, the confirmation target counter is set to "11."

Then, it is determined whether the buffer 122a-122n corresponding to the current counter to be checked is a buffer to which a status information signal is input (step S2202). Specifically, it is determined whether any of the following correspondence information is stored in the correspondence area 123a-123n corresponding to the current counter value to be checked: information indicating open/close execution mode, information indicating high-frequency support mode, or information indicating the front door frame 14.

If a positive judgment is made in step S2202, a state information setting process is executed (step S2203). In this setting process, if the output state of an eighth signal indicating whether the device is in the opening/closing execution mode switches from a low level to a high level, first state information indicating that the device is in the opening/closing execution mode is stored in the management RAM 114. If the output state of the eighth signal switches from a high level to a low level, the first state information is erased from the management RAM 114. Furthermore, if the output state of a ninth signal indicating whether the device is in the high frequency support mode switches from a low level to a high level, second state information indicating that the device is in the high frequency support mode is stored in the management RAM 114. If the output state of the ninth signal switches from a high level to a low level, the second state information is erased from the management RAM 114. Furthermore, when the output state of the tenth signal, which indicates whether the front door frame 14 is open or not, switches from a low level to a high level, third state information indicating that the front door frame 14 is open is stored in the management RAM 114, and when the output state of the tenth signal switches from a high level to a low level, the third state information is erased from the management RAM 114.

If a negative judgment is made in step S2202, or if the processing of step S2203 is executed, it is determined whether the numerical information stored in the buffer corresponding to the current counter value to be checked among the first to fourteenth buffers 122a to 122n has changed from "0" to "1," thereby determining whether the output state of the input signal from the main CPU 63 to that buffer has been switched from a low level to a high level (step S2204). Note that if the numerical information stored in the eighth buffer 122h has changed from "0" to "1" when the current counter value to be checked corresponds to the value of the eighth buffer 122h, the first state information is stored in the management RAM 114 in step S2203, and a positive judgment is made in step S2204. Furthermore, if the current value of the counter to be checked is a value corresponding to the ninth buffer 122i and the numerical information stored in the ninth buffer 122i is changed from "0" to "1", second state information is stored in the management RAM 114 in step S2203, and a positive determination is made in step S2204. Furthermore, if the current value of the counter to be checked is a value corresponding to the tenth buffer 122j and the numerical information stored in the tenth buffer 122j is changed from "0" to "1", third state information is stored in the management RAM 114 in step S2203, and a positive determination is made in step S2204.

If a positive judgment is made in step S2204, an increment process is performed on the corresponding total counter (step S2205). In this increment process, one is added to the value of the counter corresponding to the current value of the counter to be checked, among the first to fourteenth total counters 141a to 141n in the total area 141 of the history memory 117. For example, if the value of the counter to be checked is "11," the eleventh total counter 141k is added; if the value of the counter to be checked is "5," the fifth total counter 141e is added; and if the value of the counter to be checked is "1," the first total counter 141a is added.

Then, by referencing the status information in the management RAM 114, it is determined whether the device is in the first state, i.e., whether it is in the open/close execution mode (step S2206). If the device is in the first state (step S2206: YES), an increment process is performed on the corresponding counter for the first state (step S2207). In this increment process, one is added to the value of the counter corresponding to the current value of the counter to be checked, among the first through fourteenth counters 142a through 142n for the first state in the first state area 142 of the history memory 117. For example, if the value of the counter to be checked is "11," the eleventh counter 142k for the first state is added; if the value of the counter to be checked is "5," the fifth counter 142e for the first state is added; and if the value of the counter to be checked is "1," the first counter 142a for the first state is added.

Then, by referencing the status information in the management RAM 114, it is determined whether the device is in the second state, i.e., whether it is in high-frequency support mode (step S2208). If the device is in the second state (step S2208: YES), an increment process is performed on the corresponding counter for the second state (step S2209). In this increment process, one is added to the value of the counter corresponding to the current value of the counter to be checked, among the first to fourteenth counters 143a to 143n for the second state in the second state area 143 of the history memory 117. For example, if the value of the counter to be checked is "11," the eleventh counter 143k for the second state is added; if the value of the counter to be checked is "5," the fifth counter 143e for the second state is added; and if the value of the counter to be checked is "1," the first counter 143a for the second state is added.

Then, by referencing the status information in the management RAM 114, it is determined whether the state is the third state, i.e., whether the front door frame 14 is open (step S2210). If the state is the third state (step S2210: YES), an increment process is performed on the corresponding counter for the third state (step S2211). In this increment process, one is added to the value of the counter corresponding to the current value of the counter to be checked, among the first through fourteenth counters 144a to 144n for the third state in the third state area 144 of the history memory 117. For example, if the value of the counter to be checked is "11," the eleventh counter 144k for the third state is added; if the value of the counter to be checked is "5," the fifth counter 144e for the third state is added; and if the value of the counter to be checked is "1," the first counter 144a for the third state is added.

If a negative judgment is made in step S2204, if a negative judgment is made in step S2210, or if the processing of step S2211 is executed, the value of the confirmation target counter in the management RAM 114 is decremented by 1 (step S2212). Then, it is determined whether the value of the confirmation target counter after the decrement is "0" (step S2213). If the value of the confirmation target counter is 1 or greater (step S2213: NO), the processing from step S2202 onwards is executed for the confirmation target corresponding to the new value of the confirmation target counter.

By executing the history setting process as described above, the number of times game balls enter the outlet 24a, general winning port 31, special electric winning device 32, first operating port 33, and second operating port 34, the number of times the open/close execution mode occurs, the number of times the high-frequency support mode occurs, and the number of times a game has occurred are stored as count information rather than as history information as in the first embodiment above. This makes it possible to reduce the storage capacity required in the history memory 117 compared to a configuration in which each piece of history information is stored individually.

By storing the number of times information rather than history information in this way, there is no need to perform a process to derive the number of times information from the history information when calculating various parameters. This makes it possible to reduce the processing load required to calculate various parameters.

Next, the setting update recognition process executed by the management CPU 112 in this embodiment will be explained with reference to the flowchart in Figure 41.

When the setting value update signal input to the 15th buffer 122o of the input port 121 switches from LOW to HIGH (step S2301: YES), the value of the setting value grasp counter in the management RAM 114 is set to "1" (step S2302). The setting value grasp counter is a counter used by the management CPU 112 to identify the setting value of the pachinko machine 10; for example, a setting value grasp counter value of "1" indicates "setting 1," and a setting value grasp counter value of "6" indicates "setting 6."

Then, it is determined whether the setting value update signal input to the 15th buffer 122o of the input port 121 has switched from LOW level to HIGH level again (step S2303). If a positive determination is made in step S2303, the value of the setting value grasp counter in the management RAM 114 is incremented by 1 (step S2304). This causes the setting value of the pachinko machine 10 identified by the management CPU 112 to increase by one level.

If a negative determination is made in step S2303, or if the processing of step S2304 is executed, it is determined whether a set value identification end command has been received from the primary CPU 63 based on the input status of the first to eighth signals input to the first to eighth buffers 122a to 122h of the input port 121 (step S2305). If a negative determination is made in step S2305, processing returns to step S2303.

If a positive judgment is made in step S2305, the following counters are cleared to "0": the eleventh total counter 141k, which counts the number of times a game has been played in the total area 141 in the history memory 117; the eighth total counter 141h, which counts the number of times the open/close execution mode has occurred in the total area 141 in the history memory 117; and the ninth total counter 141i, which counts the number of times the high frequency support mode has occurred in the total area 141 in the history memory 117 (steps S2306 to S2308). As a result, the count information for the number of times a game has been played, the number of times the open/close execution mode has occurred, and the number of times the high frequency support mode has occurred are cleared to "0" in response to the new setting of the pachinko machine 10. Therefore, the calculation results of the 31st parameter, which indicates the number of times the open/close execution mode occurs per unit play, the 41st parameter, which indicates the number of times the high-frequency support mode occurs per unit play, and the 42nd parameter, which indicates the ratio of the number of times the high-frequency support mode occurs to the number of times the open/close execution mode occurs, correspond to the game content after the new setting of the pachinko machine 10. In a configuration in which the probability of winning a jackpot changes when the setting value of the pachinko machine 10 is changed, by making the calculation results of the 31st parameter, 41st parameter, and 42nd parameter correspond to the game content after the new setting of the pachinko machine 10, as described above, it becomes possible to determine whether the calculation results of the 31st parameter, 41st parameter, and 42nd parameter are appropriate based on the current setting value.

On the other hand, even if a new setting is made to the setting state of the pachinko machine 10, counters other than the eighth total counter 141h, the ninth total counter 141i, and the eleventh total counter 141k in the history memory 117 are not cleared to "0." This makes it possible to manage the number or frequency of game balls entering each history target ball entry section based on long-term game history, without being affected by the new setting of the setting state of the pachinko machine 10.

With the above configuration, the number of times game balls enter the outlet 24a, general winning port 31, special electric winning device 32, first operating port 33, and second operating port 34, the number of times the open/close execution mode occurs, the number of times the high-frequency support mode occurs, and the number of times a game has occurred are stored as count information rather than as history information as in the first embodiment. This makes it possible to reduce the storage capacity required in the history memory 117 compared to a configuration in which each piece of history information is stored individually.

Furthermore, by storing the information as count information rather than history information in this way, there is no need to perform a process to derive count information from history information when calculating various parameters. This makes it possible to reduce the processing load required to calculate various parameters.

The count information for the number of game plays, the number of times the open/close execution mode occurred, and the number of times the high-frequency support mode occurred is cleared to "0" when a new setting is made to the pachinko machine 10. Therefore, the calculation results of the 31st parameter, which indicates the number of times the open/close execution mode occurred per game play, the 41st parameter, which indicates the number of times the high-frequency support mode occurred per game play, and the 42nd parameter, which indicates the ratio of the number of times the high-frequency support mode occurred to the number of times the open/close execution mode occurred, correspond to the game content after the new setting is made to the pachinko machine 10. In a configuration in which the probability of winning a jackpot changes when the setting value of the pachinko machine 10 is changed, by making the calculation results of the 31st parameter, the 41st parameter, and the 42nd parameter correspond to the game content after the new setting is made to the pachinko machine 10, as described above, it becomes possible to determine whether the calculation results of the 31st parameter, the 41st parameter, and the 42nd parameter are appropriate based on the current setting value.

On the other hand, even if a new setting is made to the setting state of the pachinko machine 10, counters other than the eighth total counter 141h, the ninth total counter 141i, and the eleventh total counter 141k in the history memory 117 are not cleared to "0." This makes it possible to manage the number or frequency of game balls entering each history target ball entry section based on long-term game history, without being affected by the new setting of the setting state of the pachinko machine 10.

The configuration of the history memory 117 as in this embodiment may be applied to the first to fifth embodiments described above and the embodiments described after this embodiment. For example, when applied to the first embodiment, the information in the history memory 117 is maintained as is even if a new setting is made to the setting state of the pachinko machine 10. Furthermore, when applied to the third embodiment, the entire history memory 117 is cleared to "0" when a new setting is made to the setting state of the pachinko machine 10.

Furthermore, the processing of steps S2306 to S2308 may be executed in the setting update recognition process (FIG. 41) when the setting value of the pachinko machine 10 is changed. This means that even if a new setting is made to the pachinko machine 10, if the setting value is not changed before and after the change, the information on the number of game plays executed, the number of times the open/close execution mode has occurred, and the number of times the high-frequency support mode has occurred will not be cleared to "0." It is possible to clear the information on the number of game plays executed, the number of times the open/close execution mode has occurred, and the number of times the high-frequency support mode has occurred to "0" when the setting value of the pachinko machine 10 is changed.

Also, before the processing of steps S2306 to S2308 is executed in the setting update recognition processing (Figure 41), various parameters may be calculated using the counters 141 to 144 in the history memory 117, and the calculated parameters may be stored in the calculation result memory 131.

Seventh Embodiment
In this embodiment, the configuration of the history memory 117 is different from that of the first embodiment. The following describes the configuration that differs from the first embodiment. Note that the description of the same configuration as the first embodiment will basically be omitted.

Figure 42 is an explanatory diagram illustrating the configuration of the history memory 117 in this embodiment.

The history memory 117 includes history memories 181-186 corresponding to the setting states of the pachinko machine 10, "Setting 1" through "Setting 6." Specifically, a history memory 181 for setting 1 is provided corresponding to "Setting 1," a history memory 182 for setting 2 is provided corresponding to "Setting 2," a history memory 183 for setting 3 is provided corresponding to "Setting 3," a history memory 184 for setting 4 is provided corresponding to "Setting 4," a history memory 185 for setting 5 is provided corresponding to "Setting 5," and a history memory 186 for setting 6 is provided corresponding to "Setting 6."

Each of the history memories 181-186 for settings 1-6 is provided with a combination of the history area 124 and pointer area 126 of the history memory 117 in the first embodiment. This makes it possible to store history information corresponding to each of the pachinko machine 10's setting states, "Setting 1" to "Setting 6." In this case, when a new setting is made to the pachinko machine 10, the history memories 181-186 corresponding to the newly set setting value are used to store the history information. This makes it possible to store history information separately for each setting value without erasing the history information when a new setting is made to the pachinko machine 10. Furthermore, because various parameters are calculated using history information corresponding to the currently set setting state of the pachinko machine 10, it is possible to appropriately derive various parameters corresponding to each setting value.

In addition, each of the history memories 181-186 for settings 1-6 may be configured to contain a combination of the total area 141, first state area 142, second state area 143, and third state area 144 in the sixth embodiment.

Next, the setting update recognition process executed by the management CPU 112 in this embodiment will be explained with reference to the flowchart in Figure 43.

When the setting value update signal input to the 15th buffer 122o of the input port 121 switches from a low level to a high level (step S2401: YES), the value of the setting value grasp counter provided in the calculation result memory 131 is set to "1" (step S2402). The setting value grasp counter is a counter used by the management CPU 112 to identify the setting value of the pachinko machine 10. For example, a setting value grasp counter value of "1" indicates "setting 1," and a setting value grasp counter value of "6" indicates "setting 6." In addition, in this embodiment, the setting value grasp counter is provided in the calculation result memory 131, which is a memory that does not require an external power supply for memory retention. Therefore, the value stored in the setting value grasp counter is retained even if the supply of operating power to the management IC 66 is stopped.

Then, it is determined whether the setting value update signal input to the 15th buffer 122o of the input port 121 has switched from LOW level to HIGH level again (step S2403). If a positive determination is made in step S2403, the value of the setting value grasp counter in the calculation result memory 131 is incremented by 1 (step S2404). As a result, the setting value of the pachinko machine 10 identified by the management CPU 112 is increased by one level.

If a negative determination is made in step S2403, or if the processing of step S2404 is executed, it is determined whether a set value identification end command has been received from the main CPU 63 based on the input status of the first to eighth signals input to the first to eighth buffers 122a to 122h of the input port 121 (step S2405). If a negative determination is made in step S2405, processing returns to step S2403.

If a positive judgment is made in step S2405, the history memories 181-186 corresponding to the value of the setting value grasp counter in the calculation result memory 131 are set as the storage target for history information and the reference target when calculating various parameters (step S2406). Specifically, if the value of the setting value grasp counter is "1," this means that "Setting 1" has been set, so the history memory 181 for Setting 1 is set as the storage target for history information and the reference target when calculating various parameters. Furthermore, if the value of the setting value grasp counter is "2," this means that "Setting 2" has been set, so the history memory 182 for Setting 2 is set as the storage target for history information and the reference target when calculating various parameters. Furthermore, if the value of the setting value grasp counter is "3," this means that "Setting 3" has been set, so the history memory 183 for Setting 3 is set as the storage target for history information and the reference target when calculating various parameters. Furthermore, if the value of the setting value grasp counter is "4," this means that "setting 4" has been set, so history memory 184 for setting 4 is set as the storage target for history information and the reference target when calculating various parameters. If the value of the setting value grasp counter is "5," this means that "setting 5" has been set, so history memory 185 for setting 5 is set as the storage target for history information and the reference target when calculating various parameters. If the value of the setting value grasp counter is "6," this means that "setting 6" has been set, so history memory 186 for setting 6 is set as the storage target for history information and the reference target when calculating various parameters.

Then, RTC information, which includes date and time information, is read from the RTC 115 (step S2407). Then, a write process to the history memory 117 is executed (step S2408). In this write process, the history memory 181-186 designated in step S2406 as the storage target for history information is selected from the history memories 181-186 for settings 1-6. Then, by referencing the pointer area 126 in the designated history memory 181-186, the pointer information in the history area 124 currently being written is identified. The RTC information read in step S2407 is written to the history information storage area 125 in the history area 124 corresponding to the pointer information being written. Furthermore, information identifying the setting value is written to the history information storage area 125 corresponding to the pointer information being written. This results in a combination of information indicating that the setting status of the pachinko machine 10 has been newly set and the RTC information corresponding to the date and time when the setting was made being stored as history information.

Then, the target pointer is updated (step S2409). In this update process, the history memory 181-186 set as the target for storing history information in step S2406 is selected from the history memories 181-186 for settings 1-6, and the numerical information stored in the pointer area 126 of that history memory 181-186 is read and incremented by 1. A determination is made as to whether the pointer information after the increment of 1 exceeds the maximum value of the pointer information in the history area 124. If the maximum value is not exceeded, the pointer information after the increment of 1 is overwritten in the pointer area 126 as new pointer information to be written. If the maximum value is exceeded, the pointer area 126 is cleared to "0" so that the pointer information to be written becomes the initial pointer information.

With the above configuration, the history memory 117 is provided with history memories 181-186 for Settings 1-6, corresponding to "Setting 1"-"Setting 6," respectively. This makes it possible to store game history corresponding to each of the pachinko machine 10's setting states, "Setting 1"-"Setting 6." In this case, when a new setting is made to the pachinko machine 10, the history memories 181-186 corresponding to the newly set setting value are used to store the history information. This makes it possible to store history information separately for each setting value without erasing the history information when a new setting is made to the pachinko machine 10. Furthermore, because various parameters are calculated using history information corresponding to the currently set setting state of the pachinko machine 10, it is possible to appropriately derive various parameters corresponding to each setting value.

Note that the history memory 117 is not limited to a configuration in which six memories, 181-186, for settings 1-6, are provided. A single memory may have an area corresponding to the history memory 181 for setting 1, an area corresponding to the history memory 182 for setting 2, an area corresponding to the history memory 183 for setting 3, an area corresponding to the history memory 184 for setting 4, an area corresponding to the history memory 185 for setting 5, and an area corresponding to the history memory 186 for setting 6.

Eighth Embodiment
In this embodiment, the configuration of the history memory 117 is different from that of the first embodiment. The following describes the configuration that differs from the first embodiment. Note that the description of the same configuration as the first embodiment will basically be omitted.

Figure 44 is an explanatory diagram illustrating the configuration of the history memory 117 in this embodiment.

The history memory 117 includes a first history memory 191 and a second history memory 192. Each of the first history memory 191 and the second history memory 192 is provided with a combination of the history area 124 and pointer area 126 of the history memory 117 in the first embodiment. In this case, if a new setting is made to the setting state of the pachinko machine 10 while history information is being stored using one of the first history memory 191 and the second history memory 192, the history information in one of the history memories 191 and 192 can be retained without being erased until a predetermined number of pieces of history information is stored in the other history memory 191 and 192. Furthermore, new history information can be stored in both history memories 191 and 192 until a predetermined number of pieces of history information is stored in the other history memory 191 and 192.

Next, the setting update recognition process in this embodiment, which is executed by the management CPU 112, will be explained with reference to the flowchart in Figure 45.

When the setting value update signal input to the 15th buffer 122o of the input port 121 switches from a LOW level to a HIGH level (step S2501: YES), the value of the setting value grasp counter provided in the management RAM 114 is set to "1" (step S2502). The setting value grasp counter is a counter used by the management CPU 112 to identify the setting value of the pachinko machine 10; for example, a setting value grasp counter value of "1" indicates "setting 1," and a setting value grasp counter value of "6" indicates "setting 6."

Then, it is determined whether the setting value update signal input to the 15th buffer 122o of the input port 121 has switched from LOW level to HIGH level again (step S2503). If a positive determination is made in step S2503, the value of the setting value grasp counter in the management RAM 114 is incremented by 1 (step S2504). This causes the setting value of the pachinko machine 10 identified by the management CPU 112 to increase by one level.

If a negative determination is made in step S2503, or if the processing of step S2504 is executed, it is determined whether a set value identification end command has been received from the primary CPU 63 based on the input status of the first to eighth signals input to the first to eighth buffers 122a to 122h of the input port 121 (step S2505). If a negative determination is made in step S2505, processing returns to step S2503.

If a positive determination is made in step S2505, the setting change occurrence flag provided in the calculation result memory 131 is set to "1" (step S2506). The setting change occurrence flag is a flag used by the management CPU 112 to determine whether, after a new setting has been made to the setting state of the pachinko machine 10, not only the first history memory 191 or the second history memory 192, which had previously been set as the history information storage target, but also the other history memory 191, 192, is now set as the history information storage target. Furthermore, because the setting change occurrence flag is provided in the calculation result memory 131, which does not require an external power supply to retain its memory, the value stored in the setting change occurrence flag is retained even if the supply of operating power to the management IC 66 is stopped.

Then, RTC information, which is date and time information, is read from the RTC 115 (step S2507). Then, a write process to each history memory 191, 192 is executed (step S2508). In this write process, the pointer information in the history area 124 currently being written to is identified by referencing the pointer area 126 of the first history memory 191. The RTC information read in step S2507 is written to the history information storage area 125 of the history area 124 corresponding to the pointer information being written to. Additionally, both information identifying the setting value and information on the value of the setting value grasp counter are written to the history information storage area 125 corresponding to the pointer information being written to. As a result, a combination of information indicating that the setting status of the pachinko machine 10 has been newly set, RTC information corresponding to the date and time when the setting was made, and information on the setting value when the setting was made is stored as history information in the first history memory 191. Furthermore, during this write process, the pointer information in the history area 124 that is currently the target of writing is identified by referencing the pointer area 126 of the second history memory 192, and the RTC information read in step S2507 is written to the history information storage area 125 of the history area 124 that corresponds to the pointer information that is the target of writing. Additionally, both information identifying the setting value and information on the value of the setting value grasp counter are written to the history information storage area 125 that corresponds to the pointer information that is the target of writing. As a result, a combination of information indicating that the setting state of the pachinko machine 10 has been newly set, RTC information corresponding to the date and time when the setting was made, and information on the setting value when the setting was made is stored as history information in the second history memory 192.

Then, an update process for each target pointer is executed (step S2509). In this update process, first, the numerical information stored in the pointer area 126 of the first history memory 191 is read and incremented by 1. A determination is made as to whether the pointer information after the increment of 1 exceeds the maximum value of the pointer information in the history area 124. If the maximum value is not exceeded, the pointer information after the increment of 1 is overwritten in the pointer area 126 as the new pointer information to be written. If the maximum value is exceeded, the pointer area 126 is cleared to "0" so that the pointer information to be written becomes the initial pointer information. Also, in this update process, the numerical information stored in the pointer area 126 of the second history memory 192 is read and incremented by 1. A determination is made as to whether the pointer information after the increment of 1 exceeds the maximum value of the pointer information in the history area 124. If the maximum value is not exceeded, the pointer information after the increment of 1 is overwritten in the pointer area 126 as the new pointer information to be written. If the maximum value is exceeded, the pointer area 126 is cleared to "0" so that the pointer information to be written becomes the initial pointer information.

Next, the history setting process in this embodiment, which is executed by the management CPU 112, will be explained with reference to the flowchart in Figure 46.

If the setting change occurrence flag for the calculation result memory 131 is not set to "1" (step S2601: NO), this means that history information should only be stored in the target memory, either the first history memory 191 or the second history memory 192. In this case, the current target memory, either the first history memory 191 or the second history memory 192, is identified (step S2602). The calculation result memory 131 is provided with a target memory flag; if the target memory flag's value is "0," the first history memory 191 is the target memory; if the target memory flag's value is "1," the second history memory 192 is the target memory. Note that the target memory flag is provided in the calculation result memory 131, which does not require external power supply to retain its data. Therefore, the value of the target memory flag is retained even if the supply of operating power to the management IC 66 is stopped.

Then, a history setting execution process is executed for the history memory 191, 192 to be stored (step S2603). Specifically, steps S1101 to S1112 of the history setting process (Figure 26) in the first embodiment are executed for one of the history memories 191, 192 to be stored. As a result, history information is stored in one of the history memories 191, 192 to be stored.

On the other hand, if the setting change occurrence flag in the calculation result memory 131 is set to "1" (step S2601: YES), this means that history information should be stored not only in the first history memory 191 or the second history memory 192, whichever is currently being used for storage, but also in the other. In this case, history setting execution processing is executed for both history memories 191, 192 (step S2604). Specifically, steps S1101 to S1112 of the history setting processing in the first embodiment (Figure 26) are first executed for the first history memory 191. This causes history information to be stored in the first history memory 191. Then, steps S1101 to S1112 of the history setting processing in the first embodiment (Figure 26) are executed for the second history memory 192. This causes history information to be stored in the second history memory 192.

When the processing of step S2603 is executed or when the processing of step S2604 is executed, it is determined whether the setting change occurrence flag in the calculation result memory 131 is set to "1" (step S2605). If a positive determination is made in step S2605, it is determined whether a predetermined number or more of ball discharge history records exist in the non-storage target history memories 191, 192 (step S2606). Specifically, when the storage target flag in the calculation result memory 131 has a value of "0", the first history memory 191 is the storage target, so it is determined whether a predetermined number (specifically, "1000") or more of history information indicating that game balls have been discharged from the game area PA is stored in the second history memory 192. Furthermore, when the value of the storage target flag in the calculation result memory 131 is "1", the second history memory 192 is the storage target, and therefore a determination is made as to whether or not a predetermined number (specifically, "1000") or more of history information indicating that game balls have been ejected from the game area PA is stored in the first history memory 191. Note that, instead of determining whether or not a predetermined number (specifically, "1000") or more of history information indicating that game balls have been ejected from the game area PA is stored, a configuration may be adopted in which a determination is made as to whether or not a predetermined number (specifically, "100") or more of history information indicating that a game round has been played is stored.

If a positive judgment is made in step S2606, a process for changing the storage target is executed (step S2607). In the process for changing the storage target, the value of the storage target flag in the calculation result memory 131 is set to a value between two values that is different from the current value, thereby changing the storage target between the first history memory 191 and the second history memory 192. Specifically, if the value of the storage target flag is "0," the storage target is changed from the first history memory 191 to the second history memory 192 by setting the storage target flag to "1." Furthermore, if the value of the storage target flag is "1," the storage target is changed from the second history memory 192 to the first history memory 191 by clearing the storage target flag to "0." As a result, the history memories 191 and 192, which store only the history information from games played after the new setting of the pachinko machine 10 is made, are set as the storage targets. Various parameters are then calculated using the history information in the newly stored history memories 191, 192, making it possible to derive various parameters based on games played after the new settings for the pachinko machine 10 have been made.

Then, a clearing process is performed on either the first history memory 191 or the second history memory 192, whichever had been the storage target up until that point (step S2608). Specifically, if the storage target flag value is "0", the second history memory 192 is cleared to "0", and if the storage target flag value is "1", the first history memory 191 is cleared to "0". Then, the setting change occurrence flag in the calculation result memory 131 is cleared to "0" (step S2609).

Next, the display output processing in this embodiment executed by the management CPU 112 will be explained with reference to the flowchart in Figure 47.

If it is the calculation timing (step S2701: YES), the first history memory 191 or the second history memory 192 is identified as the storage target (step S2702). Specifically, if the storage target flag of the calculation result memory 131 is "0," the first history memory 191 is identified as the storage target; if the storage target flag is "1," the second history memory 192 is identified as the storage target. Subsequently, steps S1402 to S1412 of the display output process (FIG. 30) in the first embodiment are executed using the history information stored in the history memories 191 and 192 identified in step S2702 to calculate various parameters (parameters 1 to 8, parameters 11 to 18, parameters 21 to 26, parameters 31, and parameters 41 to 42), and the calculated parameters are stored in the calculation result memory 131 (step S2703). In this case, even if the setting change occurrence flag in the calculation result memory 131 is set to "1" and history information is stored in both the first history memory 191 and the second history memory 192, various parameters are calculated using one of the history memories 191, 192 that is the storage target.

If a negative determination is made in step S2701, or if the processing of step S2703 is executed, display processing is executed (step S2704). The processing content of the display processing is the same as the display processing in the first embodiment described above (Figure 31).

According to the above configuration, the history memory 117 is provided with a first history memory 191 and a second history memory 192. When a new setting is made to the pachinko machine 10, the history memories 191, 192 that had been the storage targets remain the storage targets, while history information is also stored in the history memories 191, 192 that are not the storage targets. When a predetermined number or more of history information corresponding to game balls being ejected from the play area PA is stored in the history memories 191, 192 that are not the storage targets, the history memories 191, 192 that are not the storage targets remain the storage targets, and the history memories 191, 192 that were the storage targets are cleared to "0." As a result, when a new setting is made to the pachinko machine 10, various parameters can be calculated using only the history information of games played with the newly set settings.

On the other hand, with the above configuration, even if the settings of the pachinko machine 10 are repeatedly changed in a short period of time to prevent the appropriate calculation of various parameters, the history memories 191, 192 to be stored are maintained without change. This makes it possible to properly derive the management results of the game history up to that point, even if the settings of the pachinko machine 10 are repeatedly changed in a short period of time.

Note that the history memory 117 is not limited to a configuration in which two memories, a first history memory 191 and a second history memory 192, are provided, and a configuration in which a first history area corresponding to the first history memory 191 and a second history area corresponding to the second history memory 192 are set in one memory may also be used.

Alternatively, a configuration may be provided in which only one history memory 117 is provided. In this case, if the total number of game balls discharged from the game area PA after a new setting of the pachinko machine 10 is made becomes equal to or exceeds a predetermined number, history information before the time when the new setting of the pachinko machine 10 is made is erased, and history information after the time when the new setting is made is stored and retained without being erased. This makes it possible to erase history information before the time when a predetermined number of history information items have been accumulated since a new setting of the pachinko machine 10 is made. Furthermore, by storing history information corresponding to a new setting of the pachinko machine 10 in the history memory 117 when the new setting is made, it becomes possible to distinguish between history information before and after the new setting in the history memory 117.

Furthermore, the timing for erasing the history information is not limited to when the total number of game balls discharged from the game area PA reaches a predetermined number or more after the setting state of the pachinko machine 10 is newly set, but may also be when the number of games played after the setting state of the pachinko machine 10 is newly set reaches a predetermined number or more.

Furthermore, even if a new setting is made to the setting state of the pachinko machine 10, if the setting values have not changed before and after the setting, the history memories 191, 192 to be stored as described above will not be changed and the history information will not be erased. However, if a new setting is made to the setting state of the pachinko machine 10 but the setting values have changed before and after the setting, the history memories 191, 192 to be stored as described above will be changed and the history information will be erased.

Ninth Embodiment
In this embodiment, the type of buffers for which the type of input signal is determined at the design stage of the management IC 66 among the first to sixteenth buffers 122a to 122p of the input port 121 in the management I/F 111 differs from that of the first embodiment. Also, the processing configuration executed by the main CPU 63 to cause the management CPU 112 to identify the type of input signal differs from that of the first embodiment. The following describes the configuration that differs from the first embodiment. Note that a description of the same configuration as the first embodiment will generally be omitted.

Figure 48 is an explanatory diagram illustrating the configuration of the input port 121 of the management side I/F 111 in this embodiment.

The first to seventh buffers 122a to 122g and the sixteenth buffer 122p receive the same types of signals as in the first embodiment above. In detail, a first signal corresponding to the detection result of the first winning opening detection sensor 42a is input to the first buffer 122a, a second signal corresponding to the detection result of the second winning opening detection sensor 43a is input to the second buffer 122b, a third signal corresponding to the detection result of the third winning opening detection sensor 44a is input to the third buffer 122c, a fourth signal corresponding to the detection result of the special electric current detection sensor 45a is input to the fourth buffer 122d, a fifth signal corresponding to the detection result of the first operating opening detection sensor 46a is input to the fifth buffer 122e, a sixth signal corresponding to the detection result of the second operating opening detection sensor 47a is input to the sixth buffer 122f, a seventh signal corresponding to the detection result of the outlet detection sensor 48a is input to the seventh buffer 122g, and an output instruction signal is input to the sixteenth buffer 122p.

On the other hand, in the first embodiment described above, a signal corresponding to the opening/closing execution mode is input as the eighth signal to the eighth buffer 122h, a signal corresponding to the high frequency support mode is input as the ninth signal to the ninth buffer 122i, a signal corresponding to the front door frame 14 is input as the tenth signal to the tenth buffer 122j, a signal corresponding to the start of a game round is input as the eleventh signal to the eleventh buffer 122k, and a setting value update signal is input to the fifteenth buffer 122o, but in this embodiment, the buffers to which these signals are input are different. Specifically, a signal corresponding to the start of a game round is input to the 11th buffer 122k as a game round signal, a setting value update signal is input to the 12th buffer 122l, a signal corresponding to the opening/closing execution mode is input to the 13th buffer 122m as an opening/closing execution mode in progress signal, a signal corresponding to the high frequency support mode is input to the 14th buffer 122n as a high frequency support mode in progress signal, and a signal corresponding to the front door frame 14 is input to the 15th buffer 122o as a door open signal.

The input of a game signal to the 11th buffer 122k, the input of a setting value update signal to the 12th buffer 122l, the input of an open/close execution mode signal to the 13th buffer 122m, the input of a high-frequency support mode signal to the 14th buffer 122n, the input of a door open signal to the 15th buffer 122o, and the input of an output instruction signal to the 16th buffer 122p were determined during the design stage of the management IC 66, and the management CPU 112 can determine that each of the above signals corresponding to the 11th to 16th buffers 122k to 122p will be input without receiving instructions from the main CPU 63. On the other hand, the types of signals input to the 1st to 10th buffers 122a to 122j were not determined during the design stage of the management IC 66, and the types of these signals are determined by the management CPU 112 upon receiving instructions from the main CPU 63. As with the first embodiment, the process for identifying the type of signal is executed when the supply of operating power to the main CPU 63 and management CPU 112 begins.

Figure 49 is a flowchart showing the recognition processing of this embodiment executed by the main CPU 63. Note that the recognition processing is executed in step S111 of the main processing (Figure 9), as in the first embodiment.

First, the recognition output counter in the main RAM 65 is set to "10," which represents the number of buffers 122a-122j to be recognized for signal type recognition (step S2801). Then, the output process for the identification start signal is executed (step S2802). In this output process, the output states of the first signal input to the first buffer 122a, the open/close execution mode signal input to the thirteenth buffer 122m, and the high frequency support mode signal input to the fourteenth buffer 122n are set to a HIGH level, thereby starting the output of the identification start signal. The period for which these signals are maintained at a HIGH level is set long enough for the management CPU 112 to recognize the output states of these signals.

Then, the output count information corresponding to the current value of the recognition output counter in the main RAM 65 is read from the main ROM 64, and the read output count information is set in the output count counter provided in the main RAM 65 (step S2803). The output count counter is a counter used by the main CPU 63 to determine the number of times the type identification signal has been output.

In this embodiment, when the management CPU 112 is made to recognize the type of signal input to the first buffer 122a through the tenth buffer 122j, a type identification signal is output the same number of times as the number of prize balls set for the ball entry section corresponding to that signal type. The management CPU 112 stores information corresponding to the number of times the type identification signal has been received for each of the first buffer 122a through the tenth buffer 122j in the first through tenth correspondence areas 123a through 123j of the correspondence memory 116. In other words, the type of signal input to the first buffer 122a through the tenth buffer 122j is understood to be the number of prize balls set for the ball entry section corresponding to that signal type.

In step S2803, if the value of the recognition output counter is "10," "9," or "8," the output count counter is set to "10," which corresponds to the number of prize balls in the general winning port 31. If the value of the recognition output counter is "7," the output count counter is set to "15," which corresponds to the number of prize balls in the special winning device 32. If the value of the recognition output counter is "6," the output count counter is set to "1," which corresponds to the number of prize balls in the first operating port 33. If the value of the recognition output counter is "5," the output count counter is set to "1," which corresponds to the number of prize balls in the second operating port 34. If the value of the recognition output counter is "4," although it corresponds to the outlet 24a, the payout of the game balls will not be executed even if a game ball enters the outlet 24a, so the output count counter is set to "0." Also, if the value of the recognition output counter is between "3" and "1," there is no corresponding ball entry area and it is blank, so the output count counter is set to "0."

Then, the output process of the start trigger signal is executed (step S2804). In this output process, the output state of the first signal input to the first buffer 122a is set to a HIGH level, thereby starting the output of the start trigger signal. The period during which the first signal is maintained at a HIGH level is set to a period sufficient for the management CPU 112 to recognize the output state of the first signal.

Then, on the condition that the value of the output count counter in the main RAM 65 is not "0" (step S2805: YES), that is, on the condition that a value of 1 or greater was set in the output count counter in step S2803, the process proceeds to step S2806. In step S2806, output processing of a type identification signal is executed. In this output processing, the output state of the second signal input to the second buffer 122b is set to a HI level, thereby starting output of the type identification signal. The period for which the second signal is maintained at a HI level is set to a period sufficient for the management CPU 112 to recognize the output state of the second signal.

Then, the value of the output count counter in the main RAM 65 is decremented by 1 (step S2807), and it is determined whether the value of the output count counter after decrementing by 1 is "0" (step S2808). If the value of the output count counter is 1 or greater (step S2808: NO), the process returns to step S2806.

If a positive judgment is made in step S2805 or if a positive judgment is made in step S2808, output processing of the termination trigger signal is executed (step S2809). In this output processing, the output state of the third signal input to the third buffer 122c is set to a HIGH level, thereby starting output of the termination trigger signal. The period for which the third signal is maintained at a HIGH level is set to a period sufficient for the management CPU 112 to recognize the output state of the third signal.

Then, the value of the recognition output counter in the main RAM 65 is decremented by 1 (step S2810), and it is determined whether the value of the recognition output counter after decrement is "0" (step S2811). If the value of the recognition output counter is 1 or greater (step S2811: NO), the process returns to step S2803, and processing is performed to recognize the type of signal corresponding to the value of the recognition output counter after decrement.

On the other hand, if the value of the recognition output counter is "0" (step S2811: YES), an identification end signal output process is executed (step S2812). In this output process, the output states of the third signal input to the third buffer 122c, the open/close execution mode signal input to the thirteenth buffer 122m, and the high frequency support mode signal input to the fourteenth buffer 122n are set to a HI level, thereby starting output of the identification end signal. The period for which these signals are maintained at a HI level is set to a period sufficient for the management CPU 112 to recognize the output states of these signals.

Next, the management process executed by the management CPU 112 in this embodiment will be described with reference to the flowchart in Figure 50. The management process begins when the supply of operating power to the management CPU 112 begins, as in the first embodiment described above.

First, it is determined whether reception of the identification start signal from the main CPU 63 has ended (step S2901). If the identification start signal has not been received, the setting update recognition process is executed in step S2902, and then the process of step S2901 is executed again. The processing content of the setting update recognition process is the same as in the first embodiment described above.

When reception of the identification start signal from the main CPU 63 has ended (step S2901: YES), the value of the setting target counter in the management RAM 114 is cleared to "0" (step S2903). Then, on the condition that a start trigger signal has been received from the main CPU 63 (step S2904: YES), the process proceeds to step S2905. In step S2905, it is determined whether a type identification signal has been received from the main CPU 63. If a type identification signal has been received (step S2905: YES), the value of the reception count counter provided in the management RAM 114 is incremented by 1 (step S2906). The reception count counter is a counter used by the management CPU 112 to determine the number of times a type identification signal has been received from the main CPU 63. Note that the value of the reception count counter is cleared to "0" if a positive determination is made in step S2904.

If a negative judgment is made in step S2905, or if the processing of step S2906 is executed, it is determined whether a termination trigger signal has been received from the main CPU 63 (step S2907). If a termination trigger signal has not been received (step S2907: NO), the process returns to step S2905. If a termination trigger signal has been received (step S2907: YES), the correspondence setting process is executed (step S2908). In the correspondence setting process, the value set in the reception count counter is stored in the correspondence area corresponding to the current value of the setting target counter in the management RAM 114, among the first to tenth correspondence areas 123a to 123j of the correspondence memory 116. In this case, the first correspondence area 123a, the second correspondence area 123b, and the third correspondence area 123c are set to "10," which corresponds to the number of prize balls in the general winning port 31; the fourth correspondence area 123d is set to "15," which corresponds to the number of prize balls in the special winning device 32; the fifth correspondence area 123e is set to "1," which corresponds to the number of prize balls in the first operating port 33; and the sixth correspondence area 123f is set to "1," which corresponds to the number of prize balls in the second operating port 34. Additionally, the seventh to twelfth correspondence areas 123g to 123l are set to "0." Then, the value of the setting target counter in the management RAM 114 is incremented by 1 (step S2909).

If a negative judgment is made in step S2904, or if the processing of step S2909 is executed, it is determined whether reception of the identification end signal from the main CPU 63 has ended (step S2910). If reception of the identification end signal has not ended (step S2910: NO), the process returns to step S2904, and, on the condition that a start trigger signal is received from the main CPU 63 (step S2904: YES), processing from step S2905 onwards is executed. If reception of the identification end signal from the main CPU 63 has ended (step S2910: YES), the history setting processing of step S2911, the display output processing of step S2912, and the external output processing of step S2913 are repeatedly executed.

Figure 51 is a time chart showing how information on the correspondence between the first to tenth buffers 122a to 122j and the types of signals input to these buffers 122a to 122j is stored in the correspondence memory 116. FIG. 51(a) shows the period when the output state of the first signal is HIGH, FIG. 51(b) shows the period when the output state of the second signal is HIGH, FIG. 51(c) shows the period when the output state of the third signal is HIGH, FIG. 51(d) shows the period when the output state of the open/close execution mode signal is HIGH, FIG. 51(e) shows the period when the output state of the high frequency support mode signal is HIGH, FIG. 51(f) shows the execution period of the identification state during which processing is performed to identify the correspondence between the first to tenth buffers 122a to 122j and the types of signals input to these buffers 122a to 122j, FIG. 51(g) shows the timing when the value of the reception count counter in the management RAM 114 is incremented by 1, and FIG. 51(h) shows the timing when the correspondence setting processing (step S2908) is performed by the management CPU 112.

When the supply of operating power to the main CPU 63 and the control CPU 112 begins, at timing t1, the output states of the first signal, the switching execution mode signal, and the high-frequency support mode signal are changed from LOW to HIGH, as shown in Figures 51(a), 51(d), and 51(e). This causes output of an identification start signal from the main CPU 63 to the control CPU 112 to begin. Thereafter, at timing t2, the output states of the first signal, the switching execution mode signal, and the high-frequency support mode signal are changed from HI to LOW. This causes output of the identification start signal from the main CPU 63 to the control CPU 112 to stop. At timing t2, the control CPU 112 makes a positive determination in step S2901 of the control process (Figure 50), and enters the identification state as shown in Figure 51(f).

After that, the output state of the first signal is maintained at a HI level from time t3 to time t4, as shown in Figure 51(a). This results in a state in which a start trigger signal is output to the management CPU 112. Then, the output state of the second signal is maintained at a HI level from time t5 to time t7, as shown in Figure 51(b). This results in a state in which a type identification signal has been output once to the management CPU 112. In this case, at time t6, the value of the reception count counter in the management RAM 114 is incremented by 1, as shown in Figure 51(g).

After that, the output state of the third signal is maintained at HI level from time t8 to time t10, as shown in Figure 51 (c). This causes a termination trigger signal to be output to the management CPU 112. In this case, at time t9, the management CPU 112 executes the correspondence setting process, as shown in Figure 51 (h). Because the value of the reception count counter is "1" when this correspondence setting process is executed, the correspondence information of "1" is stored in the correspondence areas 123a to 123j of the correspondence memory 116 that are currently being set.

After that, the output state of the first signal is maintained at a HIGH level from timing t11 to timing t12, as shown in Figure 51(a). This results in a state in which a start trigger signal is output to the management CPU 112. Then, the output state of the second signal is maintained at a HIGH level from timing t13 to timing t15, timing t16 to timing t18, timing t19 to timing t21, and timing t22 to timing t24, as shown in Figure 51(b). This results in a state in which a type identification signal has been output once to the management CPU 112. In this case, the value of the reception count counter in the management RAM 114 is incremented by 1 at timings t14, t17, t20, and t23, as shown in Figure 51(g).

After that, the output state of the third signal is maintained at HI level from time t25 to time t27, as shown in Figure 51 (c). This causes a termination trigger signal to be output to the management CPU 112. In this case, at time t26, the management CPU 112 executes the correspondence setting process, as shown in Figure 51 (h). Because the value of the reception count counter is "10" when this correspondence setting process is executed, the information "10" is stored as the correspondence information in the correspondence areas 123a to 123j currently being set in the correspondence memory 116.

After that, at timing t28, as shown in Figures 51(c), 51(d), and 51(e), the output states of the third signal, the opening/closing execution mode signal, and the high-frequency support mode signal are changed from LOW to HI. This causes output of an identification end signal from the main CPU 63 to the control CPU 112 to begin. After that, at timing t29, the output states of the third signal, the opening/closing execution mode signal, and the high-frequency support mode signal are changed from HI to LOW. This causes output of the identification end signal from the main CPU 63 to the control CPU 112 to stop. At timing t29, the control CPU 112 makes a positive determination in step S2910 of the control process (Figure 50), and the identification state is released as shown in Figure 51(f).

In this embodiment, since information on the number of prize balls is stored as correspondence information, the history information stored in the history memory 117 also includes, as correspondence information, information on the number of prize balls corresponding to the entry point that triggered the storage of that history information. In this configuration, if there are multiple entry points with the same number of prize balls, these entry points cannot be distinguished in the history information. Specifically, since the first actuation port 33 and the second actuation port 34 both have a single prize ball, the first actuation port 33 and the second actuation port 34 cannot be distinguished in the history information. In such circumstances, the number of prize balls for the first actuation port 33 and the second actuation port 34 may be made different. This makes it possible to distinguish between the first actuation port 33 and the second actuation port 34 in the history information, even in a configuration in which history information is stored as in this embodiment.

According to the present embodiment described above, the management CPU 112 can identify the signal paths corresponding to not only the setting value update signal and output instruction signal, but also information corresponding to whether a game has started, whether the opening/closing execution mode is active, whether the high-frequency support mode is active, and whether the front door frame 14 is open, without receiving correspondence information from the main CPU 63. In this case, only the information corresponding to the detection results of each ball entry detection sensor 42a-48a is the information that the main CPU 63 needs to have the management CPU 112 recognize the correspondence between each piece of information and each signal path 118a-118j. When the management CPU 112 is made to recognize the correspondence information, a number of pulse signals equal to the number of winning balls corresponding to each ball entry detection sensor 42a-48a is output from the main CPU 63 to the management CPU 112 using the second signal. This simplifies the configuration for transmitting correspondence information.

Tenth Embodiment
In this embodiment, the configuration for providing the information on each goal score result to the management IC 66 differs from that of the first embodiment. The following describes the configuration that differs from the first embodiment. Note that the description of the same configuration as the first embodiment will be omitted.

Figure 52 is an explanatory diagram illustrating the configuration of the signal path for inputting the detection results of each ball entry detection sensor 42a-48a to the main CPU 63 and management IC 66.

The detection result of the first winning opening detection sensor 42a is input to the main CPU 63 via the first signal path SL11. The detection result of the second winning opening detection sensor 43a is input to the main CPU 63 via the second signal path SL12. The detection result of the third winning opening detection sensor 44a is input to the main CPU 63 via the third signal path SL13. The detection result of the special current detection sensor 45a is input to the main CPU 63 via the fourth signal path SL14. The detection result of the first operating opening detection sensor 46a is input to the main CPU 63 via the fifth signal path SL15. The detection result of the second operating opening detection sensor 47a is input to the main CPU 63 via the sixth signal path SL16. The detection result of the outlet detection sensor 48a is input to the main CPU 63 via the seventh signal path SL17.

A first branch path SL21 is formed by branching off from the first signal path SL11 at a midpoint, and this first branch path SL21 is electrically connected to the management IC 66. A second branch path SL22 is formed by branching off from the second signal path SL12 at a midpoint, and this second branch path SL22 is electrically connected to the management IC 66. A third branch path SL23 is formed by branching off from the third signal path SL13 at a midpoint, and this third branch path SL23 is electrically connected to the management IC 66. A fourth branch path SL24 is formed by branching off from the fourth signal path SL14 at a midpoint, and this fourth branch path SL24 is electrically connected to the management IC 66. A fifth branch path SL25 is formed by branching off from the fifth signal path SL15 at a midpoint, and this fifth branch path SL25 is electrically connected to the management IC 66. In addition, a sixth branch path SL26 is formed by branching off from a midpoint of the sixth signal path SL16, and this sixth branch path SL26 is electrically connected to the management IC 66. In addition, a seventh branch path SL27 is formed by branching off from a midpoint of the seventh signal path SL17, and this seventh branch path SL27 is electrically connected to the management IC 66.

With the above configuration, the detection results of each ball entry detection sensor 42a-48a are input to the management IC 66 without processing by the main CPU 63. This eliminates the need for the main CPU 63 to execute processing to have the management CPU 112 recognize the ball entry results of each of the outlet 24a, general entry port 31, special electric entry device 32, first operating port 33, and second operating port 34, thereby reducing the processing load on the main CPU 63.

In addition, the branch points of the branch paths SL21 to SL27 from the signal paths SL11 to SL17 are located within the MPU 62. This makes it difficult to access these branch points and the branch paths SL21 to SL27 from the outside, preventing fraudulent activity such as inputting abnormal ball-scoring results only to the management IC 66.

<Other Embodiments>
The present invention is not limited to the above-described embodiment, and various modifications and improvements are possible within the scope of the spirit of the present invention. For example, the following modifications may be made. The following alternative configurations may be applied individually or in combination to the configurations of the above-described embodiment.

(1) The number of times the open/close execution mode occurs per unit play is calculated as a parameter indicating the frequency of the open/close execution mode. However, in addition to or instead of this, the number of times the open/close execution mode occurs may be calculated by dividing the result by the total number of game balls ejected from the play area PA. Furthermore, in addition to or instead of this, the number of times the open/close execution mode occurs may be calculated by dividing the result by the total number of balls that enter the first actuation port 33 and the second actuation port 34.

(2) As parameters indicating the frequency of occurrence of the high-frequency support mode, the number of times the high-frequency support mode occurs per unit play and the ratio of the number of times the high-frequency support mode occurs to the number of times the open/close execution mode occurs are calculated. However, in addition to or instead of this, the number of times the high-frequency support mode occurs may be calculated by dividing the result by the total number of game balls ejected from the play area PA. Furthermore, in addition to or instead of this, the number of times the high-frequency support mode occurs may be calculated by dividing the result by the total number of balls that enter the first actuation port 33 and the second actuation port 34.

(3) The game result that triggers the opening/closing execution mode may be a small win result in addition to a big win result. If a small win result is obtained, the opening/closing execution mode occurs, but the win/lose lottery mode and support mode do not change before or after the opening/closing execution mode. Also, the opening/closing execution mode that results in a small win may be configured to switch to low-frequency winning mode. In this case, if a big win result occurs, history information corresponding to the occurrence of the big win result may be stored in history memory 117, and if a small win result occurs, history information corresponding to the occurrence of the small win result may be stored in history memory 117. Furthermore, in this configuration, a parameter indicating the frequency of occurrence of a big win result and a parameter indicating the frequency of occurrence of a small win result may be calculated using the history information stored in history memory 117.

(4) Instead of storing history information corresponding to the occurrence of the open/close execution mode in history memory 117 regardless of the type of jackpot result, history information corresponding to the type of jackpot result may be stored in history memory 117. In this case, a parameter indicating the frequency of occurrence for each type of jackpot result may be calculated.

(5) While various parameters (parameters 1 to 8, parameters 11 to 18, parameters 21 to 26, parameters 31, and parameters 41 to 42) are periodically calculated, this is not limiting. For example, various parameters may be calculated when the total number of game balls discharged from the game area PA reaches a calculation trigger number (e.g., 10,000 balls), or when the supply of operating power to the pachinko machine 10 is stopped, or when the number of game plays reaches a calculation trigger number (e.g., 1,000). In this case, the history memory 117 may be cleared to "0" when the various parameters are calculated.

(6) Although the configuration is such that all of the first through eighth parameters, the eleventh through eighteenth parameters, the twenty-first through twenty-sixth parameters, the thirty-first parameter, and the forty-first through forty-second parameters are calculated each time a parameter calculation timing occurs, this is not limited to this. Only some of the above parameters may be calculated at a single calculation timing, with the parameter group to be calculated changing sequentially each time a calculation timing occurs. For example, the first through eighth parameters may be calculated at one calculation timing, the eleventh through eighteenth parameters may be calculated at the next calculation timing, the twenty-first through twenty-sixth parameters may be calculated at the next calculation timing, the thirty-first parameter and the forty-first through forty-second parameters may be calculated at the next calculation timing, and the change of the parameters to be calculated in the above order may be repeated each time a calculation timing occurs. This reduces the processing load required to calculate parameters at a single calculation timing.

(7) The system may be configured to perform calculations of various parameters using the history information in the history memory 117 on the condition that a game is being played. For example, the system may be configured to perform calculations of various parameters on the condition that a game ball is being supplied to the game area PA. This makes it possible to prevent the calculations of various parameters from being repeated unnecessarily even when a game is not being played.

(8) The configuration is not limited to one in which a management IC 66 is provided separately from the main CPU 63, and the functions of the management IC 66 may be performed by the main CPU 63. In this case, the correspondence information is pre-stored in the main ROM 64. Also, a configuration in which a history memory 117, a calculation result memory 131, and a separate storage memory 171 are provided separately from the main RAM 65 may be used, and the functions of the history memory 117, the calculation result memory 131, and the separate storage memory 171 may be performed in the main RAM 65. In a configuration in which the main RAM 65 functions as the history memory 117, the calculation result memory 131, and the separate storage memory 171, when the clearing process (steps S105 and S117) of the main RAM 65 is executed, some or all of the areas corresponding to the history memory 117, the calculation result memory 131, and the separate storage memory 171 may be cleared to "0." Alternatively, the areas corresponding to the history memory 117, the calculation result memory 131, and the separate storage memory 171 may be excluded from the "0" clearing process and cleared to "0" when the corresponding clearing condition in each of the above embodiments is met. Furthermore, the manual operations for clearing the areas corresponding to the history memory 117, the calculation result memory 131, and the separate storage memory 171 may be different from those for other areas of the main RAM 65. Furthermore, the function of the management IC 66 may be performed by the audio and light-emitting control device 81.

(9) When a new setting is made to the setting state of the pachinko machine 10, the history information in the history memory 117 is stored and maintained without being erased, while the various parameters stored in the calculation result memory 131 may be erased. This makes it possible to prevent notification of the various parameters calculated before the new setting is made after the new setting is made.

(10) In the third to fifth embodiments described above, even if a new setting is made to the setting status of the pachinko machine 10 (i.e., even if the setting value update process is executed by the main CPU 63), the process of clearing the history memory 117 may not be executed if the setting value has not changed before or after the setting. This makes it possible to prevent the history information in the history memory 117 from being erased even if the setting value has not been changed.

In this configuration, even if the clear process (step S117) is executed, all areas in the main RAM 65 for storing setting values are excluded from being cleared to "0." This allows the main CPU 63 to determine whether the setting value has changed before and after the setting value update process (step S118). In this case, if the main CPU 63 determines that the setting value has not changed, it may output a signal to the management CPU 112 to prevent the management CPU 112 from executing the setting update recognition process. Alternatively, if the main CPU 63 determines that the setting value has changed, it may output a signal to the management CPU 112 to prevent the management CPU 112 from executing the setting update recognition process.

Furthermore, when a signal indicating that a new setting has been made to the setting status of the pachinko machine 10 is received from the main CPU 63, the management CPU 112 may be configured to determine whether the setting value has been changed by referring to the history information stored in the history memory 117. In this case, if the management CPU 112 determines that the setting value has not been changed, it will not execute the process of clearing the history memory 117, and if the management CPU 112 determines that the setting value has been changed, it will execute the process of clearing the history memory 117.

(11) In the third to fifth embodiments described above, even if a new setting is made to the setting state of the pachinko machine 10 (i.e., even if the setting value update process is executed by the main CPU 63), if the setting value has not changed before and after the setting, the calculation process of various parameters triggered by the new setting state may not be executed. This makes it possible to prevent various parameters from being calculated in response to the new setting state even if the setting value has not changed.

In this configuration, even if the clear process (step S117) is executed, all areas in the main RAM 65 for storing setting values are excluded from being cleared to "0." This allows the main CPU 63 to determine whether the setting value has changed before and after the setting value update process (step S118). In this case, if the main CPU 63 determines that the setting value has not changed, it may output a signal to the management CPU 112 to prevent the management CPU 112 from executing the setting update recognition process. Alternatively, if the main CPU 63 determines that the setting value has changed, it may output a signal to the management CPU 112 to prevent the management CPU 112 from executing the setting update recognition process.

Furthermore, when a signal indicating that a new setting has been made to the setting state of the pachinko machine 10 is received from the main CPU 63, the management CPU 112 may be configured to determine whether the setting value has been changed by referring to the history information stored in the history memory 117. In this case, if the management CPU 112 determines that the setting value has not been changed, it will not perform calculations of various parameters triggered by the new setting of the current setting state, and if the management CPU 112 determines that the setting value has been changed, it will perform calculations of various parameters triggered by the new setting of the current setting state.

(12) In the third to fifth embodiments, when a new setting is made to the setting state of the pachinko machine 10, instead of calculating various parameters in the various calculation processes (step S1807) at that time, the various parameters stored in the calculation result memory 131 at that time may be stored in the target area among the first to fifth separate storage areas 172 to 176 of the separate storage memory 171, and the information stored in the calculation result memory 131 may be cleared to "0." In this case, since there is no need to calculate various parameters when a new setting is made to the setting state of the pachinko machine 10, it is possible to quickly complete the storage of various parameters in the separate storage memory 171.

(13) In the third to fifth embodiments, the contents of the various parameters stored in the first to fifth separate storage areas 172 to 176 of the separate storage memory 171 may be configured to be displayed on the first to third notification display devices 69a to 69c or other display devices when a predetermined display start operation is performed. The predetermined display start operation may be performed by operating a dedicated operation unit, or by performing a predetermined dedicated operation on an operation unit for performing other operations. This makes it possible to easily check the various parameters stored in the separate storage memory 171.

(14) While the configuration is such that all of the outlet 24a, general winning opening 31, special electric winning device 32, first operating opening 33, and second operating opening 34 are targets for storing history information (or ball entry history), this is not limited to this, and only some of the outlet 24a, general winning opening 31, special electric winning device 32, first operating opening 33, and second operating opening 34 may be targets for storing history information. For example, only the general winning opening 31, special electric winning device 32, and second operating opening 34 may be targets for storing history information, or only the general winning opening 31 may be targets for storing history information. Even in this case, it is possible to grasp the ball entry patterns of game balls over a specified period for the ball entry sections for which history information is stored.

(15) Signal paths 118a-118c are configured to transmit information corresponding to the game ball's entry results for the first entry port detection sensor 42a, the second entry port detection sensor 43a, and the third entry port detection sensor 44a, respectively. However, this is not limited to this. Information corresponding to the entry results for the same type of entry port may be transmitted as a single type of information, even in a configuration in which there are multiple entry ports of the same type and multiple entry port detection sensors corresponding to them. This makes it possible to reduce the number of types of information transmitted from the main CPU 63 to the management IC 66.

(16) In the above configuration, the correspondence information indicating the correspondence between the type of information transmitted from the main CPU 63 to the management IC 66 and each of the buffers 122a to 122o is transmitted from the main CPU 63 to the management IC 66. However, this is not limited to this, and the correspondence information may be pre-stored in the management IC 66. In this case, there is no need to execute a process to have the management IC 66 recognize the correspondence information, which reduces the processing load on the main CPU 63.

(17) The correspondence information indicating the correspondence between the type of information transmitted from the main CPU 63 to the management IC 66 and each of the buffers 122a-122o is transmitted from the main CPU 63 to the management IC 66 when the supply of operating power to the main CPU 63 begins. However, this is not limited to this. For example, the main CPU 63 and the management IC 66 may be capable of two-way communication, and the correspondence information may be transmitted from the main CPU 63 to the management IC 66 when a signal requesting the transmission of the correspondence information is received from the management IC 66. In this case, the correspondence memory 116 is provided as a non-volatile memory and configured to be used for both reading and writing. The correspondence information provided from the main CPU 63 to the management IC 66 after the pachinko machine 10 is shipped is stored and retained in the correspondence memory 116 even if the supply of operating power to the main CPU 63 is stopped. This reduces the frequency with which the correspondence information is transmitted.

(18) The correspondence information indicating the correspondence between the type of information sent from the main CPU 63 to the management IC 66 and each buffer 122a-122o is transmitted from the main CPU 63 to the management IC 66 using signal paths 118a-118g for transmitting the detection results of each ball entry detection sensor 42a-48a. However, this is not limited to this, and a dedicated signal path may be provided for transmitting the correspondence information from the main CPU 63 to the management IC 66. This allows the management IC 66 to determine what type of information is being received from the main CPU 63 based on the type of buffer 122a-122o that receives that information.

(19) While the configuration is such that information is sent from the main CPU 63 to the management IC 66, but information is not sent from the management IC 66 to the main CPU 63, this is not limited to this configuration, and information may be sent from the management IC 66 to the main CPU 63. For example, the configuration may be such that various parameters calculated by the management CPU 112 based on history information are sent to the main CPU 63. In this case, the main CPU 63 may be configured to directly execute notification control of the notification means so that notifications corresponding to the contents of the various received parameters are issued, or the main CPU 63 may be configured to send commands corresponding to the contents of the various received parameters to the audio and light-emitting control device 81, thereby issuing notifications corresponding to the contents of the various parameters using the pattern display device 41, display light-emitting unit 53, and speaker unit 54.

(20) When the supply of operating power to the main CPU 63 begins, the main CPU 63 or the management CPU 112 may calculate various parameters based on the history information stored in the history memory 117, and the contents of the calculated various parameters may be notified using the symbol display device 41, the display light-emitting unit 53, the speaker unit 54, etc. In this case, when the amusement hall opens for business, it becomes possible to check whether the ball entry pattern in the game area PA on the previous business day was normal.

(21) If various parameters calculated based on the history information stored in the history memory 117 result in an abnormal result, the pachinko machine 10 may be configured to prevent play from starting until a prohibition cancellation operation is performed. Examples of configurations that prevent play from starting include prohibiting the launch of game balls, disabling each ball entry detection sensor 42a-49a, or not executing the win/loss determination process even if a win occurs in the first actuation port 33 or the second actuation port 34. The prohibition cancellation operation may involve restarting the power to the pachinko machine 10 while the reset button 68c is pressed, or operating an operating means that becomes operable when the gaming machine main body 12 is opened relative to the outer frame 11. This makes it possible to prevent play from continuing in a situation where the game ball entry pattern in the play area PA is abnormal. It also makes it possible to prevent play from continuing in a situation where the frequency of the opening/closing execution mode is abnormal.

(22) Although history information corresponding to the detection results of the ball entry detection sensors 42a-48a is stored in the history memory 117, the calculation of various parameters using that history information may not be performed by either the main CPU 63 or the management CPU 112. In this case, the history information may be read by an external device electrically connected to the reading terminal 68d, and the calculation of various parameters may be performed by the operator performing the reading operation using the read history information, or the calculation of various parameters may be performed by the external device using the read history information. In this case, it is possible to reduce the processing load on the main CPU 63 and the management CPU 112.

(23) The management IC 66 may be provided with a power supply separate from that of the main CPU 63, and may be configured to allow the management IC 66 to calculate various parameters using historical information and output historical information or various parameters even if the supply of operating power to the main CPU 63 is stopped. This makes it possible to read the historical information and various parameters using an external device even when the supply of operating power to the main CPU 63 is stopped.

(24) Although the read terminal 68d used to read the program from the main ROM 64 is configured to also serve as a terminal used to read history information or various parameters by an external device, this is not limited to this, and the terminal used to read history information or various parameters by an external device may be provided separately from the read terminal 68d used to read the program from the main ROM 64. In this case, the terminal used to read history information or various parameters may be provided in the MPU 62, or may be provided in a position on the main control board 61 separate from the MPU 62.

(25) The correspondence memory 116, history memory 117, and calculation result memory 131 are not limited to being configured as non-volatile storage means such as flash memory. For example, any of these memories 116, 117, and 131 may be configured as volatile storage means that require a power supply to store and retain information, and backup power may be supplied to that memory so that information can be stored and retained even if the supply of operating power to the main CPU 63 is stopped. In this case, a dedicated backup power device may be provided for that memory, or backup power may be supplied to that memory from the power supply and launch control device 78 that supplies backup power to the main RAM 65.

(26) The management IC 66 is not limited to a configuration in which it includes a management CPU 112 as a general-purpose CPU and performs storage processing of history information and calculation processing of various parameters based on programs and data stored in the management ROM 113. A configuration in which a hardware circuit designed to perform these functions is formed in the management IC 66 may also be employed. Specifically, for example, in the first embodiment described above, when the hardware circuit receives a signal from the main CPU 63 indicating that a gaming ball has been detected by any of the detection sensors 42a-48a, it stores correspondence information corresponding to the buffer that received the signal from the correspondence memory 116 to the history memory 117, and also stores the information of the RTC 115 at that time in the history memory 117. Furthermore, for example, in the sixth embodiment described above, when the hardware circuit receives a signal from the main CPU 63 indicating that a gaming ball has been detected by any of the detection sensors 42a-48a, it increments the value of a counter corresponding to the buffer that received the signal by one. Furthermore, when a calculation trigger occurs, such as in the first embodiment, the hardware circuit calculates various parameters using the history information at that time. Furthermore, when a trigger occurs to output to the read terminal 68d, the hardware circuit outputs the various parameters that are the calculation results, as well as the history information.

(27) The main CPU 63 and the management IC 66 may be configured as separate chips, as separate boards, or as separate control devices.

(28) The number of game balls entering the outlet 24a is counted, while history information including RTC information may be stored for balls entering bonus-trigger entry sections, such as the general entry section 31, the special electric entry device 32, the first actuation section 33, and the second actuation section 34, which trigger the payout of prize balls and the win/loss determination process. This makes it possible to extract the history of game balls entering bonus-trigger entry sections, and to calculate the frequency of game balls entering each bonus-trigger entry section relative to the total number of game balls dispensed.

(29) The configuration may include events other than those described in the above embodiments as predetermined events that trigger the storage of history information. For example, the configuration may be such that at least one of the following events is stored as history information: the lower tray 56a becoming full, the timing at which the full state began, and the timing at which the full state was released; the configuration may be such that at least one of the following events is stored as history information: the tank 75 becoming ball-free, the timing at which the ball-free state began, and the timing at which the ball-free state was released; and the configuration may be such that at least one of the following events is stored as history information: the dispensing device 76 becoming abnormal, the timing at which the abnormal state of the dispensing device 76 began, and the timing at which the abnormal state of the dispensing device 76 was released. In this case, it is possible to grasp the frequency of occurrence of these events.

(30) In the first embodiment described above, the 16th buffer 122p of the input port 121 in the management I/F 111 was configured to correspond to an output instruction signal in advance during the design stage of the management IC 66. However, this is not limited to this configuration. The management IC 66 may recognize that the 16th buffer 122p corresponds to an output instruction signal when a type identification command is sent from the main CPU 63. Also, in the first embodiment described above, the 15th buffer 122o of the input port 121 in the management I/F 111 was configured to correspond to a setting value update signal in advance during the design stage of the management IC 66. However, this is not limited to this configuration. The management IC 66 may recognize that the 15th buffer 122o corresponds to a setting value update signal when a type identification command is sent from the main CPU 63. In this case, it is not necessary to previously set in the management IC 66 the correspondence between each buffer 122a to 122p and the type of signal input to each buffer 122a to 122p.

(31) The management IC 66 may be configured to send a normal operation signal to the main CPU 63 when it is operating normally. In this case, the main CPU 63 can monitor whether the management IC 66 is operating normally.

(32) The display device that displays the setting value being updated during the setting value update process (Figure 10) is not limited to the third notification display device 69c, but may be the pattern display device 41 or a dedicated display device.

(33) The operating unit operated to update the setting value in the setting value update process (Figure 10) is not limited to the update button 68b, but may also be the reset button 68c. Furthermore, when a setting key is inserted into the setting key insertion unit 68a and rotated, positions corresponding to "Setting 1" to "Setting 6" may be set as the rotation position, and the setting value corresponding to the rotation position of the setting key insertion unit 68a may be set. Furthermore, the setting key insertion unit 68a may be configured to be able to be rotated further than the ON position, and each time a rotation operation beyond the ON position is performed, the setting value being updated is updated to the next setting value in the sequence.

(34) Instead of a configuration in which the display control device 82 is controlled by the audio and light emitting control device 81 based on commands sent from the main control device 60, a configuration in which the display control device 82 controls the audio and light emitting control device 81 based on commands sent from the main control device 60 may be adopted. Also, instead of a configuration in which the audio and light emitting control device 81 and the display control device 82 are provided separately, both control devices may be provided as a single control device, or the functions of one of these control devices may be integrated into the main control device 60, or both functions of these control devices may be integrated into the main control device 60. Also, the configuration of the commands sent from the main control device 60 to the audio and light emitting control device 81 and the configuration of the commands sent from the audio and light emitting control device 81 to the display control device 82 may be arbitrary.

(35) The present invention can also be applied to other types of pachinko machines that differ from the above embodiments, such as pachinko machines in which an electric device opens a predetermined number of times when a gaming ball enters a specific area of a special device, pachinko machines in which a right is generated and a jackpot is awarded when a gaming ball enters a specific area of a special device, pachinko machines with other devices, arrange ball machines, mahjong ball machines, etc.

The present invention can also be applied to non-ball gaming machines, such as slot machines, which have multiple reels with multiple symbols circumferentially printed on them, and which start the reels by inserting a medal and operating the start lever, and which award players a special prize, such as a medal payout, if a specific symbol or combination of symbols appears on an active line visible through a display window after the reels stop when the stop switch is operated or a predetermined time has passed.

The present invention can also be applied to a gaming machine that combines a pachinko machine and a slot machine, in which the gaming machine main body is supported on an outer frame so that it can be opened and closed, is equipped with a storage section and a take-up device, and the reels begin to rotate when the start lever is operated after a predetermined number of gaming balls stored in the storage section have been taken in by the take-up device.

When applying the present invention to slot machines or gaming machines that combine pachinko and slot machines, for example, the results of the lottery process for winning roles executed when a game is started by operating the start lever may be stored as history information, and the history information may be used to calculate the actual winning probability for each role. Alternatively, when a transition to a special gaming state such as a bonus game occurs, the occurrence may be stored as history information, and the history information may be used to calculate the actual probability of transitioning to the special gaming state. Alternatively, the ratio of the number of games played in the special gaming state to the total number of games played may be calculated. Such history information and various parameters may be readable by an external device, or notifications corresponding to the calculation results of various parameters may be issued by the gaming machine itself. Furthermore, a configuration may be adopted in which there are multiple setting states, such as "Setting 1" to "Setting 6," and the winning probability in the lottery process for winning roles may vary depending on the setting state. In this case, the configurations described in the above embodiments may be applied to the handling of history information, the calculation of various parameters, and the handling of repeated changes when a setting state is newly set or when a setting value is changed.

(36) The characteristic configurations of the first to tenth embodiments may be applied to each other in any combination. For example, the characteristic configurations of the first embodiment, the sixth embodiment, and the tenth embodiment may be combined, or the characteristic configurations of the second embodiment, the fourth embodiment, and the eighth embodiment may be combined. Furthermore, the characteristic configurations of the other embodiments may be applied in any combination to a configuration in which the characteristic configurations of the first to tenth embodiments are applied in a predetermined combination.

<Inventions extracted from the above embodiments>
The following describes the features of the inventions extracted from the above-described embodiments, while indicating, as necessary, their effects, etc. Note that, for ease of understanding, the corresponding configurations in the above-described embodiments are indicated in parentheses, etc. as appropriate, but the invention is not limited to the specific configurations indicated in parentheses, etc.

<Features Group A>
Feature A1. A setting means (a function for executing a setting value update process in the main CPU 63) for setting a setting value to be used from among multiple setting values corresponding to the player's advantage level;
a history storage execution means (a function of executing a history setting process in the management CPU 112) for storing game history information corresponding to a predetermined event that occurs when the game is played in the history storage means (the history memory 117);
an information erasing means for erasing at least a part of the history information stored in the history storage means, on the condition that the setting value to be used has been set by the setting means (a function for executing the process of step S1809 in the management CPU 112 in the third embodiment, a function for executing the process of step S2109 in the management CPU 112 in the fifth embodiment, a function for executing the processes of steps S2306 to S2308 in the management CPU 112 in the sixth embodiment, and a function for executing the process of step S2608 in the management CPU 112 in the eighth embodiment);
A gaming machine characterized by comprising:

According to Feature A1, the setting value to be used is set from multiple setting values corresponding to the player's level of advantage, so the player will expect that the more advantageous setting value will be used. Furthermore, when a predetermined event occurs, corresponding historical information is stored in the historical information storage means. This allows the gaming machine to store and retain information for managing the number of times or frequency of occurrence of a predetermined event, and by using this managed information, it is possible to appropriately manage the frequency of occurrence of a predetermined event. Furthermore, since the historical information is stored in the gaming machine itself, it is possible to prevent unauthorized access to or unauthorized modification of the historical information.

In this case, at least a portion of the history information stored in the history storage means is erased when at least one of the conditions is that the setting value to be used has been newly set. This makes it possible to adjust the contents of the history storage means so that the frequency of occurrence of a specified event can be appropriately managed in a situation after the setting value to be used has been newly set.

Feature A2. Ball entry means (first actuation port 33, second actuation port 34) through which game balls flowing down the game area can enter;
An information acquisition means (a function of executing the processing of step S401 in the main CPU 63) that acquires special information based on the game ball entering the ball entry means;
An assignment determination means (a function of executing the processing of steps S503 and S504 in the main CPU 63) that determines whether the special information corresponds to the assignment information;
and a bonus awarding means (a function of executing the processes of steps S409 to S412 in the main CPU 63) for awarding a bonus (opening/closing execution mode) to a player based on the award correspondence result that the special information corresponds to the award information in the award determination.
A gaming machine described in feature A1, characterized in that the probability of the award corresponding result being obtained in the award determination varies depending on the set value.

Feature A2 makes it possible to vary the probability of a bonus corresponding result in a so-called pachinko machine according to a set value. In this case, by incorporating the configuration of feature A1, it becomes possible to adjust the contents of the history storage means so that the frequency of occurrence of a specified event can be appropriately managed in a situation after the probability of a bonus corresponding result has been changed.

Feature A3. The gaming machine described in Feature A1 or A2, wherein the information erasing means erases all of the history information stored in the history storage means, on at least one condition that the setting value to be used has been set by the setting means.

According to Feature A3, when a new setting value to be used is set, all history information stored in the history information storage means is erased, making it possible to determine the frequency of occurrence of a specified event based on the timing when the new setting value to be used is set.

Feature A4. A gaming machine as described in Feature A1 or A2, wherein the information erasing means erases a portion of the history information stored in the history storage means and leaves a portion of the history information stored in the history storage means, on the condition that at least one of the setting values to be used has been set by the setting means.

According to Feature A4, when a new setting value to be used is set, it is possible to erase history information that is not necessary for managing the frequency of occurrence of a specified event thereafter, and retain history information that is necessary for managing the frequency of occurrence of the specified event thereafter. This makes it possible to optimally manage the frequency of occurrence of a specified event after a new setting value to be used is set.

Feature A5: The history information stored in the history storage means includes first history information (history information indicating that an opening/closing execution mode has occurred) in which the occurrence probability of the predetermined event corresponding to the history information varies depending on the set value, and second history information (history information indicating that a game ball has been discharged from the game area PA) in which the occurrence probability does not vary depending on the set value,
The gaming machine described in feature A4 is characterized in that the information erasing means erases the first history information stored in the history memory means and leaves the second history information stored in the history memory means, with at least one condition being that the setting value to be used has been set by the setting means.

According to Feature A5, when a setting value to be used is newly set, first history information corresponding to a predetermined event whose occurrence probability varies depending on the setting value is erased, while second history information corresponding to a predetermined event whose occurrence probability does not vary depending on the setting value is not erased. As a result, if first history information from before the setting value to be used is newly set is carried over after the setting value is newly set, first history information that is undesirable for determining the occurrence frequency of the predetermined event corresponding to the first history information can be erased when the setting value is newly set. On the other hand, by not erasing second history information even when a setting value to be used is newly set, it is possible to ensure a large amount of second history information to be referenced when determining the occurrence frequency of the predetermined event corresponding to the second history information, thereby enabling the occurrence frequency of the predetermined event corresponding to the second history information to be accurately determined.

Feature A6. Ball entry means (first actuation port 33, second actuation port 34) through which game balls flowing down the game area can enter;
An information acquisition means (a function of executing the processing of step S401 in the main CPU 63) for acquiring special information based on the game ball entering the ball entry means;
An assignment determination means (a function of executing the processing of steps S503 and S504 in the main CPU 63) that determines whether the special information corresponds to the assignment information;
and a bonus awarding means (a function of executing the processes of steps S409 to S412 in the main CPU 63) for awarding a bonus (opening/closing execution mode) to a player based on the result of the bonus determination that the special information corresponds to the bonus information.
The probability of the grant corresponding result being obtained in the grant determination varies depending on the set value,
the first history information includes information corresponding to the granting of the benefit,
A gaming machine described in feature A5, characterized in that the second history information includes information corresponding to the ejection of gaming balls from the gaming area in a predetermined manner.

According to feature A6, the probability of awarding a bonus varies depending on the setting value, so by erasing the first history information when a new setting value is set to be used, it becomes possible to determine the frequency at which a bonus will be awarded under the circumstances of the newly set setting value. On the other hand, since the frequency at which game balls are dispensed from the game area does not vary depending on the setting value, by not erasing the second history information even when a new setting value is set to be used, it becomes possible to accurately determine the frequency at which game balls are dispensed from the game area in a predetermined manner.

Feature A7. A gaming machine described in any one of Features A1 to A6, wherein the information erasing means erases at least a portion of the history information when the setting means sets the setting value to be used and a predetermined amount or more of the history information is stored in the history storage means.

According to Feature A7, if the history storage means does not store a predetermined amount of predetermined history information, the history information is not erased even if a new setting value to be used is set. This makes it possible to prevent the history information from being repeatedly erased from the history storage means even if new setting values are repeatedly set in a situation where no game is being played.

Feature A8. A gaming machine according to any one of Features A1 to A7, characterized in that it is equipped with information derivation means (a function for executing the processing of step S1807 in the management CPU 112 in the third embodiment, and a function for executing the processing of step S2107 in the management CPU 112 in the fifth embodiment) that derives aspect information corresponding to game results over a predetermined period of time using the history information stored in the history storage means, with at least one condition being that the setting value to be used has been set by the setting means.

According to Feature A8, in a configuration including Feature A1 above, in which at least a portion of the history information stored in the history storage means is erased when at least one condition is met, that is, when a new setting value to be used is set, the history information stored in the history storage means is used to derive behavior information corresponding to game results over a predetermined period of time. This makes it possible to ascertain the results of game history management, such as the frequency of occurrence of a predetermined event, in the situation before the setting value was changed, even if at least a portion of the history information is erased when the setting value is changed.

Feature A9. The gaming machine described in Feature A8, further comprising a mode information storage means (separate storage memory 171) for storing the mode information derived by the information derivation means.

According to Feature A9, when a new setting value to be used is made, and behavior information corresponding to the game results over a predetermined period is derived using history information stored in the history storage means, that behavior information is stored in the behavior information storage means. This makes it possible to grasp the game history management results in the situation before the setting value was changed at any time thereafter, even if the setting value is changed.

Feature A10. The gaming machine described in Feature A9, wherein the mode information storage means is capable of storing multiple pieces of mode information.

According to Feature A10, since the mode information storage means can store multiple pieces of mode information, it is possible to grasp the results of game history management over multiple periods based on the timing at which new setting values were set. Furthermore, even if new setting values are repeatedly set in situations where no game is being played, it is possible to increase the likelihood that mode information derived using history information from situations where game play is actually being played will remain in the mode information storage means.

Feature A11. The aspect information storage means is capable of storing a predetermined number of pieces of aspect information,
This gaming machine is a gaming machine described in feature A9 or A10, characterized in that it is equipped with a means for executing special processing when the setting of the setting value to be used by the setting means occurs more than the specified number of times under specified conditions (in the third embodiment, a function for executing monitoring processing of repeated changes in the management CPU 112, and in the fourth embodiment, a function for executing monitoring processing of repeated changes in the main CPU 63).

According to Feature A11, if new setting values are repeatedly set in a situation where no game is being played, special processing is executed to prevent the behavior information derived using historical information on situations where game play is actually being played from remaining in the behavior information storage means. This makes it possible to deal with such behavior.

Feature A12. A gaming machine described in any one of Features A8 to A11, wherein the information deriving means derives the behavior information when a predetermined amount or more of the history information is stored in the history storage means.

According to feature A12, behavior information is derived when a predetermined amount or more of predetermined history information is stored in the history storage means, making it possible to prevent behavior information from being derived unnecessarily.

Feature A13. A gaming machine according to any one of Features A1 to A12, wherein the information erasing means does not erase the history information until a specific amount of the predetermined history information is stored in the history storage means after the setting means sets the setting value to be used, and erases the history information stored in the history storage means before the setting value was set when a specific amount of the predetermined history information is stored in the history storage means after the setting means sets the setting value to be used.

According to Feature A13, even if a new setting value is set to be used, the history information stored before the new setting is not erased until a specific amount of predetermined history information is newly stored in the history information storage means. This makes it possible to identify the results of game history management for a specified period of time even if a new setting value is set.

Feature A14: The history storage means includes a first history storage means (first history memory 191) and a second history storage means (second history memory 192),
The history storage execution means
a means for storing the history information corresponding to the predetermined event in both the first history storage means and the second history storage means when the predetermined event occurs within a predetermined period from when the setting value to be used is set by the setting means to when a cancellation condition is met (a function for executing the process of step S2604 in the management-side CPU 112);
a means for storing the corresponding history information in one of the first history storage means and the second history storage means, whichever is set as the storage target, when the predetermined event occurs during a period other than the predetermined period (a function for executing the process of step S2603 in the management-side CPU 112);
Equipped with
A gaming machine described in any one of features A1 to A13, characterized in that when the release condition is met, the information erasure means erases the history information stored in the first history storage means or the second history storage means, whichever was previously set as the storage target.

According to Feature A14, even if a new setting value is set to be used, the history information stored before the new setting is not erased until a specific amount of history information is newly stored in the history information storage means. This makes it possible to identify the results of game history management for a specified period of time even if a new setting value is set. Furthermore, this effect can be achieved simply by appropriately switching the history storage means that stores history information between the first history storage means and the second history storage means.

Feature A15. A gaming machine as described in Feature A14, characterized in that it is equipped with information derivation means (a function for executing the processing of step S2703 in the management CPU 112) that derives behavior information corresponding to game results over a predetermined period of time using the history information stored in either the first history storage means or the second history storage means, whichever is set as the storage target.

Feature A15 makes it possible to appropriately derive behavior information using history information, even in situations where a new setting of the set value causes history information to be stored in both the first history storage means and the second history storage means.

Note that one or more of Features A1 to A15, Features B1 to B7, Features C1 to C5, Features D1 to D10, Features E1 to E6, and Features F1 to F3 may be applied to the features A1 to A15. This allows for a synergistic effect to be achieved by combining these features.

<Feature Group B>
Feature B1. A setting means (a function for executing a setting value update process in the main CPU 63) for setting a setting value to be used from among multiple setting values corresponding to the player's advantage level;
a history storage execution means (a function of executing a history setting process in the management CPU 112) for storing game history information corresponding to a predetermined event that occurs when the game is played in the history storage means (the history memory 117);
Equipped with
A gaming machine characterized in that the specified history information stored in the history storage means before the setting value to be used is set by the setting means is stored and retained in the history storage means even after the setting value to be used is set by the setting means.

According to Feature B1, the setting value to be used is set from among multiple setting values corresponding to the player's level of advantage, so the player will expect that the more advantageous setting value will be used. Furthermore, when a predetermined event occurs, historical information corresponding to that event is stored in the historical information storage means. This allows the gaming machine to store and retain information for managing the number of times or frequency of occurrence of a predetermined event, and by using this managed information, it is possible to appropriately manage the frequency of occurrence of a predetermined event. Furthermore, since the historical information is stored in the gaming machine itself, it is possible to prevent unauthorized access to or unauthorized modification of the historical information.

In this case, even if a new setting value to be used is set, the history information stored in the history storage means is not erased but retained. This makes it possible to continue storing previous history information in the history storage means even when a new setting value to be used is set, and makes it possible to identify the results of game history management using history information accumulated in the history storage means over a long period of time.

Feature B2. A gaming machine according to Feature B1, characterized in that the history storage execution means includes setting time storage execution means (a function for executing the processing of step S1307 in the management CPU 112 in the first embodiment, and a function for executing the processing of step S2408 in the management CPU 112 in the seventh embodiment) that stores the corresponding history information in the history storage means when the setting value to be used is set by the setting means.

According to Feature B2, in a configuration in which history information is not erased but is stored and maintained even when a new setting value is set, history information corresponding to the new setting value is stored in the history storage means. This makes it possible to distinguish between history information before and after the new setting value is set.

Feature B3. The gaming machine described in Feature B2, wherein the setting storage execution means, when the setting value to be used is set by the setting means, stores information corresponding to the set setting value as the history information in the history storage means.

Feature B3 makes it possible to identify previously set values by referencing history information.

Feature B4. A gaming machine described in any one of Features B1 to B3, wherein the history storage means includes multiple corresponding history storage means (history memories 181-186 for settings 1-6) corresponding to the multiple types of setting values that can be set by the setting means.

According to feature B4, a response history storage means is provided corresponding to each setting value, making it possible to store history information separately for each setting value.

Feature B5. A gaming machine as described in Feature B4, characterized in that it is equipped with a means (a function for executing the processing of step S2406 in the management CPU 112) for, when the setting value to be used is set by the setting means, designating the correspondence history storage means corresponding to the set setting value as the storage target for the subsequent history information.

According to feature B5, when a new setting value to be used is set, the corresponding history storage means for that setting value is used to store subsequent history information, making it possible to store history information separately for each setting value.

Feature B6. A gaming machine as described in Feature B5, characterized in that it is equipped with information deriving means (a function for executing display output processing in the management CPU 112) that derives behavior information corresponding to game results over a predetermined period of time using the history information stored in the corresponding history storage means that is the storage target.

Feature B6 makes it possible to derive mode information corresponding to the currently set setting value in a configuration in which history information is stored separately for each setting value.

Feature B7. Ball entry means (first actuation port 33, second actuation port 34) through which game balls flowing down the game area can enter;
An information acquisition means (a function of executing the processing of step S401 in the main CPU 63) that acquires special information based on the game ball entering the ball entry means;
An assignment determination means (a function of executing the processing of steps S503 and S504 in the main CPU 63) that determines whether the special information corresponds to the assignment information;
and a bonus awarding means (a function of executing the processes of steps S409 to S412 in the main CPU 63) for awarding a bonus (opening/closing execution mode) to a player based on the award correspondence result that the special information corresponds to the award information in the award determination.
A gaming machine according to any one of features B1 to B6, characterized in that the probability of the award corresponding result being obtained in the award determination varies depending on the set value.

Feature B7 makes it possible to vary the probability of a winning result in a so-called pachinko machine according to a set value.

Note that one or more of Features A1 to A15, Features B1 to B7, Features C1 to C5, Features D1 to D10, Features E1 to E6, and Features F1 to F3 may be applied to Features B1 to B7. This allows for a synergistic effect to be achieved by combining these features.

<Feature Group C>
Feature C1. A setting means (a function for executing a setting value update process in the main CPU 63) for setting a setting value to be used from among multiple setting values corresponding to the player's advantage level;
a history storage execution means (a function of executing a history setting process in the management CPU 112) for storing game history information corresponding to a predetermined event that occurs when the game is played in the history storage means (the history memory 117);
a post-setting handling means (a function for executing the processes of step S2506 and steps S2605 to S2609 in the management CPU 112) that does not erase the history information after the setting means sets the setting value to be used and until a specific amount of the predetermined history information is stored in the history storage means;
A gaming machine characterized by comprising:

According to feature C1, the setting value to be used is set from among multiple setting values corresponding to the player's level of advantage, so the player will expect that the more advantageous setting value will be used. Furthermore, when a predetermined event occurs, corresponding historical information is stored in the historical information storage means. This allows the gaming machine to store and retain information for managing the number of times or frequency of occurrence of a predetermined event, and by using this managed information, it is possible to appropriately manage the frequency of occurrence of a predetermined event. Furthermore, since the historical information is stored in the gaming machine itself, it is possible to prevent unauthorized access to or unauthorized modification of the historical information.

In this case, even if a new setting value is set, the history information stored before the new setting is not erased until a specific amount of predetermined history information is newly stored in the history information storage means. This makes it possible to identify the results of game history management for a specified period of time even if a new setting value is set.

Feature C2. The gaming machine described in Feature C1, wherein the post-setting response means erases the history information stored in the history storage means before the setting value to be used was set if the history information stored in the history storage means exceeds the specified amount after the setting means sets the setting value to be used.

According to feature C2, when a specific amount of history information that enables the management results of the gaming history for a specific period of time after a new setting of the setting value has been made is stored in the history storage means, the history information that was stored in the history information storage means before the new setting of the setting value was made is erased. This makes it possible to prevent unnecessary history information from continuing to be stored in the history information storage means.

Feature C3: The history storage means includes a first history storage means (first history memory 191) and a second history storage means (second history memory 192),
The history storage execution means
a means for storing the corresponding history information in one of the first history storage means and the second history storage means, which is set as the storage target when the predetermined event occurs (a function for executing the process of step S2603 in the management-side CPU 112);
means for storing the history information corresponding to the predetermined event in both the first history storage means and the second history storage means in response to the occurrence of the predetermined event from the time when the setting value to be used is set by the setting means until the predetermined amount of history information is stored in the one of the first history storage means and the second history storage means that is not set as the storage target (a function for executing the process of step S2604 in the management-side CPU 112);
Equipped with
The post-setting response means includes:
a means for switching the storage target between the first history storage means and the second history storage means when the predetermined amount of history information is stored in the one of the first history storage means and the second history storage means that is not set as the storage target after the setting value to be used is set by the setting means; and
means for erasing the history information of one of the first history storage means and the second history storage means that has been set as the storage target, when the predetermined amount of history information is stored in the other of the first history storage means and the second history storage means that has not been set as the storage target after the setting value to be used has been set by the setting means; and a function for executing the process of step S2608 in the management-side CPU 112.
A gaming machine according to feature C1 or C2, characterized in that it is equipped with:

According to feature C3, even if a new setting value is set to be used, the history information stored before the new setting is not erased until a specific amount of history information is newly stored in the history information storage means. This makes it possible to identify the results of game history management for a specified period of time even if a new setting value is set. Furthermore, this effect can be achieved simply by appropriately switching the history storage means that stores history information between the first history storage means and the second history storage means.

Feature C4. A gaming machine as described in Feature C3, characterized in that it is equipped with information derivation means (a function for executing the processing of step S2703 in the management CPU 112) that derives behavior information corresponding to game results over a predetermined period of time using the history information stored in either the first history storage means or the second history storage means, whichever is set as the storage target.

Feature C4 makes it possible to appropriately derive behavior information using history information, even in situations where a new setting of the set value causes history information to be stored in both the first history storage means and the second history storage means.

Feature C5. Ball entry means (first actuation port 33, second actuation port 34) through which game balls flowing down the game area can enter;
An information acquisition means (a function of executing the processing of step S401 in the main CPU 63) that acquires special information based on the game ball entering the ball entry means;
An assignment determination means (a function of executing the processing of steps S503 and S504 in the main CPU 63) that determines whether the special information corresponds to the assignment information;
and a bonus awarding means (a function of executing the processes of steps S409 to S412 in the main CPU 63) for awarding a bonus (opening/closing execution mode) to a player based on the award correspondence result that the special information corresponds to the award information in the award determination.
A gaming machine according to any one of features C1 to C4, characterized in that the probability of the award corresponding result being obtained in the award determination varies depending on the set value.

Feature C5 makes it possible to vary the probability of a winning result in a so-called pachinko machine according to a set value.

Note that one or more of Features A1 to A15, Features B1 to B7, Features C1 to C5, Features D1 to D10, Features E1 to E6, and Features F1 to F3 may be applied to Features C1 to C5. This allows for a synergistic effect to be achieved by combining these features.

<Feature Group D>
Feature D1. A setting means (a function for executing a setting value update process in the main CPU 63) for setting a setting value to be used from among multiple setting values corresponding to the player's advantage level;
a special execution means for executing special processing under at least one condition that the setting of the setting value to be used by the setting means is executed under a special situation (a function for executing a process for monitoring repeated changes in the management CPU 112 in the third embodiment, a function for executing a process for monitoring repeated changes in the main CPU 63 in the fourth embodiment, and a function for making a negative determination in step S2106 in the management CPU 112 in the fifth embodiment);
A gaming machine characterized by comprising:

According to feature D1, the setting value to be used is set from among multiple setting values corresponding to the player's level of advantage, so the player will expect the more advantageous setting value to be used. In this case, special processing is executed under at least one condition that the new setting value to be used is set under special circumstances. This makes it possible to deal with cases in which a new setting value is set under unfavorable circumstances.

Feature D2. The gaming machine described in Feature D1, wherein the special execution means executes the special processing under at least one condition that the setting of the setting value to be used by the setting means has been executed a specific number of times or more in the special situation.

According to feature D2, even if a new setting value to be used is set in a special situation, special processing will not be executed if the number of times it has been set is less than a specific number. This makes it possible to prevent special processing from being executed even if a legitimate worker sets a new setting value in a special situation less than a specific number of times.

Feature D3. A gaming machine as described in Feature D1 or D2, wherein the special execution means executes the special processing under at least one condition that the setting means has set the setting value to be used, in a situation where no play has been performed since the setting means set the setting value to be used, or a situation where no play has been performed equal to or greater than a predetermined standard since the setting means set the setting value to be used.

Feature D3 executes special processing when a new setting value to be used is set when no game is being played or when no game is being played substantially, making it possible to deal with such an action if it occurs.

Feature D4. A gaming machine described in any one of Features D1 to D3, wherein the special execution means executes a notification process as the special process.

According to feature D4, the notification process is executed when at least one condition is met: a new setting of the setting value to be used is performed under special circumstances. This makes it possible to prompt the user to take action when a new setting value is performed under unfavorable circumstances.

Feature D5. A history storage execution means (a function for executing a history setting process in the management CPU 112) for storing game history information corresponding to a predetermined event that occurs when a game is played in the history storage means (history memory 117);
information deriving means (a function for executing the process of step S1807 in the management CPU 112 in the third embodiment, and a function for executing the process of step S2107 in the management CPU 112 in the fifth embodiment) for deriving aspect information corresponding to the results of games during a predetermined period using the history information stored in the history storage means, with the setting of the setting value to be used by the setting means being at least one of the conditions;
A gaming machine according to any one of features D1 to D4, characterized in that it is equipped with:

According to feature D5, when a predetermined event occurs, corresponding historical information is stored in the historical information storage means. This allows the gaming machine to store and retain information for managing the number of times or frequency of occurrence of a predetermined event, and by using this managed information, it becomes possible to appropriately manage the frequency of occurrence of a predetermined event. Furthermore, since the historical information is stored in the gaming machine itself, it is possible to prevent unauthorized access to or unauthorized modification of the historical information.

In this case, when a new setting value is set, the historical information stored in the history storage means is used to derive behavior information corresponding to game results over a specified period. This makes it possible to understand the results of game history management, such as the frequency of occurrence of specified events in the situation before the setting value was changed.

Feature D6. The gaming machine described in Feature D5, wherein the special execution means, as the special processing, does not cause the information derivation means to derive the mode information, on at least one condition that the setting means has set the setting value to be used in the special situation.

According to feature D6, even if a new setting value to be used is set, if the setting is set in an undesirable situation, behavior information is not derived. This makes it possible to prevent behavior information from being derived unnecessarily.

Feature D7. A gaming machine as described in Feature D5 or D6, characterized in that it is equipped with a mode information storage means (separate storage memory 171) that stores the mode information derived by the information derivation means.

According to feature D7, when a new setting value to be used is made, and behavior information corresponding to the game results over a predetermined period is derived using history information stored in the history storage means, that behavior information is stored in the behavior information storage means. This makes it possible to grasp the game history management results in the situation before the setting value was changed at any time thereafter, even if the setting value is changed.

Feature D8. The gaming machine described in Feature D7, wherein the mode information storage means is capable of storing multiple pieces of mode information.

Feature D8 allows the mode information storage means to store multiple pieces of mode information, making it possible to grasp the results of game history management over multiple periods based on the timing at which new setting values were set. Furthermore, even if new setting values are repeatedly set when no game is being played, it is possible to increase the likelihood that mode information derived using history information from situations in which game play is actually being played will remain in the mode information storage means.

Feature D9. The aspect information storage means is capable of storing a predetermined number of pieces of aspect information,
A gaming machine described in feature D7 or D8, characterized in that the special execution means executes the special processing when the setting of the setting value to be used by the setting means occurs more than the specified number of times in the special situation.

Feature D9 executes special processing when new settings are repeatedly made in situations where no game is being played, so that the behavior information derived using historical information about situations where game play is actually being played does not remain in the behavior information storage means. This makes it possible to deal with such behavior.

Feature D10. Ball entry means (first actuation port 33, second actuation port 34) through which game balls flowing down the game area can enter;
An information acquisition means (a function of executing the processing of step S401 in the main CPU 63) for acquiring special information based on the game ball entering the ball entry means;
An assignment determination means (a function of executing the processing of steps S503 and S504 in the main CPU 63) that determines whether the special information corresponds to the assignment information;
and a bonus awarding means (a function of executing the processes of steps S409 to S412 in the main CPU 63) for awarding a bonus (opening/closing execution mode) to a player based on the award correspondence result that the special information corresponds to the award information in the award determination.
A gaming machine described in any one of features D1 to D9, characterized in that the probability of the award corresponding result being obtained in the award determination varies depending on the set value.

Feature D10 makes it possible to vary the probability of a winning result in a so-called pachinko machine according to a set value.

Note that one or more of the features A1 to A15, features B1 to B7, features C1 to C5, features D1 to D10, features E1 to E6, and features F1 to F3 may be applied to the features D1 to D10. This allows for a synergistic effect to be achieved through the combined features.

<Feature Group E>
Feature E1. A setting means (a function for executing a setting value update process in the main CPU 63) for setting a setting value to be used from among multiple setting values corresponding to the player's advantage level;
a history storage execution means (a function of executing a history setting process in the management CPU 112) for storing game history information corresponding to a predetermined event that occurs when the game is played in the history storage means (the history memory 117);
information deriving means (a function for executing the process of step S1807 in the management CPU 112 in the third embodiment, and a function for executing the process of step S2107 in the management CPU 112 in the fifth embodiment) for deriving aspect information corresponding to the results of games during a predetermined period using the history information stored in the history storage means, with the setting of the setting value to be used by the setting means being at least one of the conditions;
A gaming machine characterized by comprising:

According to feature E1, the setting value to be used is set from among multiple setting values corresponding to the player's level of advantage, so the player will expect that the more advantageous setting value will be used. Furthermore, when a predetermined event occurs, corresponding historical information is stored in the historical information storage means. This allows the gaming machine to store and retain information for managing the number of times or frequency of occurrence of a predetermined event, and by using this managed information, it is possible to appropriately manage the frequency of occurrence of a predetermined event. Furthermore, since the historical information is stored in the gaming machine itself, it is possible to prevent unauthorized access to or unauthorized modification of the historical information.

In this case, when a new setting value is set, the historical information stored in the history storage means is used to derive behavior information corresponding to game results over a specified period. This makes it possible to understand the results of game history management, such as the frequency of occurrence of specified events in the situation before the setting value was changed.

Feature E2. A gaming machine as described in Feature E1, characterized in that it is equipped with a mode information storage means (separate storage memory 171) that stores the mode information derived by the information derivation means.

According to feature E2, when a new setting value to be used is made and historical information stored in the history storage means is used to derive behavior information corresponding to game results over a predetermined period, that behavior information is stored in the behavior information storage means. This makes it possible to grasp, at any time thereafter, the management results of the game history in the situation before the setting value was changed, even if the setting value is changed.

Feature E3. The gaming machine described in Feature E2, wherein the mode information storage means is capable of storing multiple pieces of mode information.

Feature E3 allows the mode information storage means to store multiple pieces of mode information, making it possible to grasp the results of game history management over multiple periods based on the timing at which new setting values were set. Furthermore, even if new setting values are repeatedly set in situations where no game is being played, it is possible to increase the likelihood that mode information derived using history information from situations where game play is actually being played will remain in the mode information storage means.

Feature E4: The aspect information storage means is capable of storing a predetermined number of pieces of aspect information;
This gaming machine is a gaming machine described in feature E2 or E3, characterized in that it is equipped with a means for executing special processing when the setting of the setting value to be used by the setting means occurs more than the specified number of times under specified conditions (in the third embodiment, a function for executing monitoring processing of repeated changes in the management CPU 112, and in the fourth embodiment, a function for executing monitoring processing of repeated changes in the main CPU 63).

According to feature E4, if new setting values are repeatedly set in a situation where no game is being played, special processing is executed to prevent the behavior information derived using historical information on situations where game play is actually being played from remaining in the behavior information storage means. This makes it possible to deal with such behavior.

Feature E5. A gaming machine described in any one of Features E1 to E4, wherein the information deriving means derives the behavior information when a predetermined amount or more of the history information is stored in the history storage means.

Feature E5 derives behavior information when a predetermined amount of history information or more is stored in the history storage means, thereby preventing unnecessary derivation of behavior information.

Feature E6. Ball entry means (first actuation port 33, second actuation port 34) through which game balls flowing down the game area can enter;
An information acquisition means (a function of executing the processing of step S401 in the main CPU 63) for acquiring special information based on the game ball entering the ball entry means;
An assignment determination means (a function of executing the processing of steps S503 and S504 in the main CPU 63) that determines whether the special information corresponds to the assignment information;
and a bonus awarding means (a function of executing the processes of steps S409 to S412 in the main CPU 63) for awarding a bonus (opening/closing execution mode) to a player based on the result of the bonus determination that the special information corresponds to the bonus information.
A gaming machine described in any one of features E1 to E5, characterized in that the probability of the award corresponding result being obtained in the award determination varies depending on the set value.

Feature E6 makes it possible to vary the probability of a winning result in a so-called pachinko machine according to a set value.

Note that one or more of Features A1 to A15, Features B1 to B7, Features C1 to C5, Features D1 to D10, Features E1 to E6, and Features F1 to F3 may be applied to Features E1 to E6. This allows for a synergistic effect to be achieved by combining these features.

The invention relating to the above-mentioned feature group A, feature group B, feature group C, feature group D, and feature group E can solve the following problems.

Pachinko machines and slot machines are known as gaming machines. For example, pachinko machines have a tray storage section on the front of the machine that stores gaming balls awarded to players. The gaming balls stored in the tray storage section are guided to a gaming ball launcher and launched toward the gaming area in response to the player's launch operation. Then, for example, when a gaming ball enters a ball entry section provided in the gaming area, the gaming ball is paid out to the tray storage section from, for example, a payout device. In addition, pachinko machines are also known that have a configuration in which the tray storage section includes an upper tray storage section and a lower tray storage section. In this case, gaming balls stored in the upper tray storage section are guided to the gaming ball launcher, and surplus gaming balls in the upper tray storage section are discharged to the lower tray storage section.

In addition, in a slot machine, when medals have been bet and the start lever is operated to start a new game, a lottery process is executed by the control means. When the lottery process is executed, the control means executes rotation start control, causing the reels to start spinning, and if the stop button is operated while the reels are spinning, the control means executes rotation stop control, causing the reels to stop spinning. If the result of the reels stopping after spinning has stopped corresponds to a winning combination in the lottery process, a bonus corresponding to that winning combination is awarded to the player.

Here, gaming machines such as those exemplified above need to be managed appropriately, and there is still room for improvement in this regard.

<Feature Group F>
Feature F1. Ball entry means (first actuation port 33, second actuation port 34) through which game balls flowing down the game area can enter;
An information acquisition means (a function of executing the processing of step S401 in the main CPU 63) that acquires special information based on the game ball entering the ball entry means;
An assignment determination means (a function of executing the processing of steps S503 and S504 in the main CPU 63) that determines whether the special information corresponds to the assignment information;
A bonus granting means (a function for executing the processing of steps S409 to S412 in the main CPU 63) grants a bonus (opening/closing execution mode) to the player based on the result of the bonus determination that the special information corresponds to the bonus information;
A setting means (a function for executing a setting value update process in the main CPU 63) for setting a setting value to be used from among a plurality of setting values corresponding to the player's advantage level;
Equipped with
The award determination means has a high probability mode and a low probability mode as modes of the award determination so that the probability of the award corresponding result being achieved is relatively high or low,
A gaming machine characterized in that the probability of achieving the award corresponding result varies at least in the low probability mode depending on the set value.

Feature F1 makes it possible to vary the probability of a prize-winning result in at least the low-probability mode of a so-called pachinko machine according to a setting value. This makes it possible to create situations in which the probability of a prize-winning result in the low-probability mode is favorable or unfavorable, even with a single gaming machine. This makes it possible to increase the enjoyment of the game.

Feature F2. A gaming machine as described in Feature F1, wherein the probability of obtaining the corresponding award result in the high probability mode does not vary according to the set value.

According to feature F2, the probability of an award corresponding result in low probability mode varies according to the set value, while the probability of an award corresponding result in high probability mode does not vary according to the set value, thereby making it possible to limit the influence of the set value to the situation in low probability mode.

Feature F3. There are multiple types of the above benefits,
A gaming machine according to feature F1 or F2, characterized in that the selection mode of the benefit does not change according to the set value.

According to feature F3, the probability of a corresponding award result in low probability mode is varied according to a set value, while the bonus selection method is not varied according to the set value, thereby limiting the influence of the set value to the situation in low probability mode.

Note that one or more of Features A1 to A15, Features B1 to B7, Features C1 to C5, Features D1 to D10, Features E1 to E6, and Features F1 to F3 may be applied to the features F1 to F3. This allows for a synergistic effect to be achieved by combining these features.

The invention relating to the above-mentioned feature group F can solve the following problems.

Pachinko machines and slot machines are known as gaming machines. For example, pachinko machines have a tray storage section on the front of the machine that stores gaming balls awarded to players. The gaming balls stored in the tray storage section are guided to a gaming ball launcher and launched toward the gaming area in response to the player's launch operation. Then, for example, when a gaming ball enters a ball entry section provided in the gaming area, the gaming ball is paid out to the tray storage section from, for example, a payout device. In addition, pachinko machines are also known that have a configuration in which the tray storage section includes an upper tray storage section and a lower tray storage section. In this case, gaming balls stored in the upper tray storage section are guided to the gaming ball launcher, and surplus gaming balls in the upper tray storage section are discharged to the lower tray storage section.

In addition, in a slot machine, when medals have been bet and the start lever is operated to start a new game, a lottery process is executed by the control means. When the lottery process is executed, the control means executes rotation start control, causing the reels to start spinning, and if the stop button is operated while the reels are spinning, the control means executes rotation stop control, causing the reels to stop spinning. If the result of the reels stopping after spinning has stopped corresponds to a winning combination in the lottery process, a bonus corresponding to that winning combination is awarded to the player.

Here, with gaming machines such as those exemplified above, it is necessary to increase the enjoyment of the game, and there is still room for improvement in this regard.

Below is the basic configuration of a gaming machine to which each of the above features can be applied or to which each feature can be applied.

Pachinko gaming machine: A gaming machine that has an operating means operated by the player, a gaming ball launching means that launches gaming balls based on the operation of the operating means, a ball passage that guides the launched gaming balls to a specified gaming area, and various gaming components arranged within the gaming area, and that awards a bonus to the player when the gaming ball passes through a specified passage section of each of the gaming components.

Slot machines and other reel-type gaming machines: A gaming machine equipped with a picture display device that variably displays multiple pictures, in which the variable display of the multiple pictures is initiated by operating a start operating means, and the variable display of the multiple pictures is stopped by operating a stop operating means or after a predetermined time has passed, and a bonus is awarded to the player depending on the picture displayed after the stop.

10... Pachinko machine, 33... First operating port, 34... Second operating port, 63... Main CPU, 112... Management CPU, 117... History memory, 171... Separate storage memory, 181-186... History memories for settings 1-6, 191... First history memory, 192... Second history memory.

Claims (1)

a game value granting means electrically connected to the predetermined detection means and executing a process for granting a game value for a game;
a processing execution means electrically connected to the game value granting means and executing a predetermined process;
In a gaming machine equipped with
The gaming value providing means
a first reference information storage means for storing reference information, which is information used in the process of awarding the gaming value and is information to be referenced in response to detection by the predetermined detection means;
a first transmitting means for transmitting a reference information signal corresponding to the reference information stored in the first reference information storage means to the processing executing means after a predetermined supply of power to the gaming machine has started and before the execution of a predetermined processing for progressing a game is started;
a second transmitting means for transmitting a predetermined information signal based on information acquired based on detection by the predetermined detecting means to the processing executing means;
a means for suspending the progress of processing until a predetermined period of time has elapsed after a predetermined supply of power to the gaming machine has started;
means for executing a predetermined determination process for determining whether or not the predetermined storage area is normal after a predetermined supply of power to the gaming machine has started and before the execution of the predetermined process is started;
Equipped with
If the predetermined storage area is determined to be abnormal in the predetermined determination process, a corresponding process is executed,
When the predetermined storage area is determined to be normal in the predetermined determination process, the first transmitting means then transmits the reference information signal,
The processing execution means
a second reference information storage means for storing reference information corresponding to the reference information signal transmitted from the game value providing means;
an execution means for executing the predetermined process based on the predetermined information signal transmitted from the second transmission means and the reference information stored in the second reference information storage means;
a processing result information storage means for storing processing result information which is information relating to the processing result of the predetermined processing performed by the execution means;
a means for erasing the processing result information stored in the processing result information storage means when a predetermined trigger occurs based on the execution of a predetermined operation;
Equipped with
The game value providing means is a main control means for controlling the progress of a game,
The processing execution means is a performance control means for controlling the execution of a performance,
The reference information signal is transmitted from the game value providing means even when a predetermined event that stops the game progress control occurs.
the first transmitting means is configured to transmit the reference information signal to the processing executing means after the predetermined period has elapsed;
When a predetermined event occurs that stops the control of the progress of the game, the predetermined control for transmitting the predetermined information signal by the second transmitting means is not executed,
The gaming machine is characterized in that the predetermined process is a process different from the granting of value used to play a game .