JP7750382B2 - Manufacturing method for solid electrolytic capacitors - Google Patents

Description

The present invention relates to a solid electrolytic capacitor having a structure in which a laminate of multiple capacitor elements is molded with insulating resin.

Patent Document 1 describes a method for manufacturing a solid electrolytic capacitor and a solid electrolytic capacitor. The solid electrolytic capacitor described in Patent Document 1 comprises multiple flat-film capacitor elements and multiple metal foils (cathodes). The flat-film capacitor elements comprise a foil-shaped valve metal substrate, a porous portion of the valve metal substrate, a dielectric layer formed on the surface, and a solid electrolyte layer formed on the surface of the dielectric layer.

Flat film capacitor elements and metal foil are stacked alternately to form an element stack. The element stack is then sealed with insulating resin.

Japanese Patent Application Laid-Open No. 2019-79866

However, with the manufacturing method of a solid electrolytic capacitor as exemplified in Patent Document 1, it was sometimes not possible to properly cover the entire periphery of the element stack with insulating resin in a single molding process.

To solve this problem, one method is to attach a substrate to one main surface (e.g., the bottom surface) of the element stack and seal it. However, in this case, because the substrate and element stack are made of different materials, differences in the linear expansion coefficients of the two can cause problems such as warping, leading to reduced reliability.

Therefore, the object of the present invention is to provide a method for manufacturing a solid electrolytic capacitor that can properly cover the entire element stack with insulating resin through a single molding process, thereby achieving high reliability.

The method for manufacturing a solid electrolytic capacitor of this invention includes the steps of: forming a plurality of flat-film capacitor elements by sequentially forming a dielectric layer and a solid electrolyte layer on the surface of a flat-film anode electrode foil; forming a sheet laminate by alternately stacking the plurality of flat-film capacitor elements with conductive adhesive layers or solid electrolyte layers interposed therebetween; and sealing the sheet laminate with an insulating resin.

The process of forming a flat film capacitor element includes a step of forming an anode through hole that penetrates the flat film capacitor element in the thickness direction.

The process of forming the sheet laminate involves stacking multiple flat-film capacitor elements in a position where the anode through holes formed in each of the multiple flat-film capacitor elements overlap each other.

The process of sealing with insulating resin involves placing the fluid insulating resin and the sheet laminate between upper and lower molds, then fitting the upper and lower molds together and applying heat and pressure in a compression molding process. When the upper and lower molds are fitted together, the distance between them is greater than the thickness of the sheet laminate.

As a result, the anode through-holes form through-holes that penetrate the top and bottom surfaces of the sheet laminate. The fluid insulating resin then flows through the through-holes, not only onto the outer surface of the sheet laminate, but also from the bottom side of the sheet laminate to the top side of the sheet laminate. Therefore, the entire surface of the sheet laminate is properly covered with insulating resin in a single molding process. Furthermore, because the top and bottom sides of the sheet laminate are covered with insulating resin made of the same material, warping and other problems are suppressed.

According to this invention, the entire periphery of the sheet laminate (element laminate) can be properly covered with insulating resin of the same material through a single molding process, thereby producing a highly reliable solid electrolytic capacitor.

FIG. 1 is a side cross-sectional view showing the configuration of the solid electrolytic capacitor according to the first embodiment. Figures 2(A) and 2(B) are side cross-sectional views showing the configuration of a set of a capacitor element and a cathode electrode before singulation, Figure 2(C) is a side cross-sectional view showing the configuration of a capacitor element before singulation, and Figure 2(D) is a side cross-sectional view showing the configuration of a set of a capacitor element and a cathode electrode after singulation. FIG. 3 is a flowchart showing an example of a schematic flow of the method for manufacturing a solid electrolytic capacitor according to this embodiment. FIG. 4 is a flowchart showing an example of a process for forming a capacitor element sheet. FIG. 5A is an external perspective view showing the shapes of the anode electrode and dielectric layer of the capacitor element before singulation, and FIG. 5B is an external perspective view showing the shape of the capacitor element before singulation. FIG. 6 is an external view of the multi-state device. FIG. 7 is a perspective view showing the appearance of the cathode electrode before being divided into individual pieces. FIG. 8 is a flowchart showing an example of a process for forming a sheet stack. 9A and 9B are external perspective views showing a state in which adhesive dams are formed on the capacitor element sheet. 10A and 10B are external perspective views showing a state in which an adhesive dam and an adhesive are formed on a capacitor element sheet. FIG. 11 is an exploded perspective view showing a state in which the capacitor element sheet and the cathode electrode sheet are laminated together. Figure 12(A) is an exploded perspective view showing the stacked state of capacitor element sheets and cathode electrode sheets in a multi-layered state, and Figure 12(B) is an external perspective view showing the stacked state of capacitor element sheets and cathode electrode sheets in a multi-layered state. FIG. 13 is a plan view showing a state in which the capacitor element sheet and the cathode electrode sheet are laminated. FIG. 14 is a flowchart showing an example of a sealing process using an insulating resin. 15(A), 15(B), 15(C), and 15(D) are four-sided views of the sealing jig. 16A is a cross-sectional view showing one state during sealing, and FIG. 16B is a plan view showing the state of FIG. 16A with the mold and the sheet stack removed. FIG. 17 is a cross-sectional view showing the sealed state. Figures 18(A) and 18(B) are side cross-sectional views showing the configuration of a set of a capacitor element and a cathode electrode before singulation in the second embodiment, Figure 18(C) is a side cross-sectional view showing the configuration of a capacitor element before singulation, and Figure 18(D) is a side cross-sectional view showing the configuration of a set of a capacitor element and a cathode electrode after singulation. 19(A) and 19(B) are exploded perspective views showing a state in which a capacitor element sheet and a cathode electrode sheet according to the second embodiment are laminated together.

[First embodiment]
A method for manufacturing a solid electrolytic capacitor according to a first embodiment of the present invention and a solid electrolytic capacitor manufactured by this manufacturing method will be described with reference to the drawings.

(Explanation of the Schematic Configuration of Solid Electrolytic Capacitor 1)
First, the structure of a solid electrolytic capacitor manufactured by a method for manufacturing a solid electrolytic capacitor according to an embodiment of the present invention will be described. FIG. 1 is a side cross-sectional view showing the configuration of a solid electrolytic capacitor according to a first embodiment. Note that in FIG. 1, only the insulating resin and external electrodes are hatched for ease of viewing. FIGS. 2(A) and 2(B) are side cross-sectional views showing the configuration of a set of capacitor elements and cathode electrodes before singulation. FIG. 2(A) is a cross-sectional view taken along a plane not intersecting the through holes, and FIG. 2(B) is a cross-sectional view taken along a plane intersecting the through holes. FIG. 2(C) is a side cross-sectional view showing the configuration of a capacitor element before singulation. FIG. 2(C) is a cross-sectional view taken along a plane not intersecting the through holes. FIG. 2(D) is a side cross-sectional view showing the configuration of a set of capacitor elements and cathode electrodes after singulation.

As shown in Figures 1, 2(A), 2(B), 2(C), and 2(D), the solid electrolytic capacitor 1 comprises a capacitor element laminate 100, insulating resin 50, external electrodes 61, and external electrodes 62. The capacitor element laminate 100 comprises a plurality of flat-film capacitor elements 10, a plurality of flat-film cathode electrodes 20, an adhesive dam 30, and adhesive 40. Note that in Figure 1, the number (number) of flat-film capacitor elements 10 and cathode electrodes is four, but this is not limited to this. The side cross-sectional views in Figures 1, 2(A), 2(B), 2(C), and 2(D) are cross-sectional views taken along a plane perpendicular to the top surface 101 and bottom surface 102 of the capacitor element laminate 100 in Figure 1.

As shown in Figure 2(C), the capacitor element 10 comprises a flat film-shaped anode electrode 11, a dielectric layer 12, and a CP layer (solid electrolyte layer) 13.

Although detailed structure is omitted in Figure 2, the anode electrode 11 has numerous pores. In other words, the anode electrode 11 is porous (a porous body). The thickness ratio of the porous portion on one side of the anode electrode 11 to the core metal portion and the porous portion on the other side is approximately 1:1:1. The dielectric layer 12 covers the outer surface of the anode electrode 11. Because detailed structure of the anode electrode 11 is omitted in Figure 2, the dielectric layer 12 is schematically shown as covering the macroscopic surface of the anode electrode 11. In reality, the dielectric layer 12 covers not only the macroscopic surface of the anode electrode 11, but also the inner surfaces of the numerous pores in the anode electrode 11.

The CP layer 13 covers the surface of the dielectric layer 12. A frame-shaped CP dam 14 is formed around the periphery of the CP layer 13. The CP dam 14 is insulating. The CP dam 14 limits the area in which the CP layer 13 is formed.

The CP layer 13 has a laminated structure of an inner layer CP (inner layer solid electrolyte layer) 131 and an outer layer CP (outer layer solid electrolyte layer) 132. The inner layer CP 131 is formed on the surface of the dielectric layer 12, and the outer layer CP 132 is formed on the surface of the inner layer CP 131.

The multiple capacitor elements 10 and the multiple cathode electrodes 20 are stacked alternately so that their flat film surfaces are parallel and overlap when viewed in a plane.

An adhesive dam 30 and an adhesive 40 are disposed between adjacent capacitor elements 10 and cathode electrodes 20. The adhesive dam 30 is insulating. On the other hand, the adhesive 40 is conductive.

The adhesive dam 30 is frame-shaped. The adhesive 40 is disposed inside the frame defined by the adhesive dam 30. This adhesive 40 bonds and electrically connects adjacent capacitor elements 10 and cathode electrodes 20.

In this stacked state, the first ends 10E1 (see FIG. 2(D)) of the multiple capacitor elements 10 are located at approximately the same position when viewed from the side. Similarly, the second ends 10E2 (see FIG. 2(D)) of the multiple capacitor elements 10 are located at approximately the same position when viewed from the side. Furthermore, the first ends 20E1 (see FIG. 2(D)) of the multiple cathode electrodes 20 are located at approximately the same position when viewed from the side. Similarly, the second ends 20E2 (see FIG. 2(D)) of the multiple cathode electrodes 20 are located at approximately the same position when viewed from the side.

The first ends 10E1 of the multiple capacitor elements 10 and the second ends 20E2 of the multiple cathode electrodes 20 are arranged on the first end side of the capacitor element stack 100. The first ends 10E1 of the multiple capacitor elements 10 protrude outward beyond the second ends 20E2 of the multiple cathode electrodes 20.

The second ends 10E2 of the multiple capacitor elements 10 and the first ends 20E1 of the multiple cathode electrodes 20 are arranged on the second end side of the capacitor element stack 100. The first ends 20E1 of the multiple cathode electrodes 20 protrude outward beyond the second ends 10E2 of the multiple capacitor elements 10.

With this structure, a capacitor element stack 100 is realized having a top surface 101 and a bottom surface 102 at both ends in the stacking direction of multiple capacitor elements 10 and multiple cathode electrodes 20.

The capacitor element stack 100 is sealed with insulating resin 50. More specifically, the insulating resin 50 covers the capacitor element stack 100 except for the first ends 10E1 of the plurality of capacitor elements 10 (first ends 10E1 of the anode electrodes 11) and the first ends 20E1 of the plurality of cathode electrodes 20.

The external electrode 61 covers the first end of the insulating resin 50 (the first end 10E1 of the anode electrode 11). The external electrode 61 is connected to the first ends 10E1 of the anode electrodes 11 of the multiple capacitor elements 10. The external electrode 62 covers the second end of the insulating resin 50 (the first end 20E1 of the cathode electrode 20). The external electrode 62 is connected to the first ends 20E1 of the multiple cathode electrodes 20.

The above configuration realizes the solid electrolytic capacitor 1.

(Method for manufacturing solid electrolytic capacitor 1)
The solid electrolytic capacitor 1 having the above-described configuration is manufactured, for example, as follows: Fig. 3 is a flowchart showing an example of a schematic flow of the method for manufacturing the solid electrolytic capacitor according to this embodiment.

A capacitor element sheet is formed (Figure 3: S11). The capacitor element sheet is formed with an array of multiple capacitor elements 10, each of which forms a different solid electrolytic capacitor 1.

Next, the capacitor element sheet and the cathode electrode sheet are stacked to form a sheet laminate (Figure 3: S12). The cathode electrode sheet has an array of cathode electrodes 20 that form different solid electrolytic capacitors 1. This forms a structure in which multiple capacitor element laminates 100 are arranged in a plane. In other words, the sheet laminate is a structure in which multiple capacitor element laminates 100 are arranged in a plane.

Next, the sheet stack is sealed with insulating resin 50 (Figure 3: S13). As will be described in detail later, at this time, through holes that penetrate from the top to the bottom of the sheet stack are provided in the sheet stack, and resin sealing is performed using a compression mold.

The sealing with insulating resin 50 is performed in a multi-state (a state in which multiple solid electrolytic capacitors 1 are arranged) before the solid electrolytic capacitor 1 is separated into individual pieces.

Next, the sheet laminate sealed with insulating resin 50 is cut into individual pieces (FIG. 3: S14). Specifically, cutting is performed along cutting lines E11, E12, S11, and S12 shown in FIG. 11(B), which will be described later. This results in multiple solid electrolytic capacitors 1 (referred to as solid electrolytic capacitor 1 bodies) without external electrodes formed. The solid electrolytic capacitor 1 bodies are then secondary sealed with insulating resin 50. More specifically, the side surfaces of the solid electrolytic capacitor 1 body (surfaces cut along cutting lines S11 and S12 (top surface, bottom surface, and side surfaces other than the end surfaces where the anode electrode 11 and cathode electrode 20 are exposed)) are covered with secondary sealing with insulating resin 50. This allows the anode electrode 11 and cathode electrode 20, which would otherwise be unnecessarily exposed during singulation, to be covered with insulating resin 50.

Next, external electrodes 61 and 62 are formed on the end faces of the solid electrolytic capacitor 1 body (Figure 3: S15).

Next, each step will be explained in more detail.

(Capacitor element sheet forming process)
Fig. 4 is a flowchart showing an example of a process for forming a capacitor element sheet. Fig. 5(A) is an external perspective view showing the shapes of the anode electrode and dielectric layer of the capacitor element before singulation, and Fig. 5(B) is an external perspective view showing the shape of the capacitor element before singulation. Fig. 6 is an external view in a multi-state.

The anode electrode 11 is subjected to chemical conversion treatment to form the dielectric layer 12 (Figure 4: S111). During this process, numerous holes are formed on the surface of the anode electrode 11 by etching, making the area near the surface of the anode electrode 11 porous. The dielectric layer 12 covers the surface of the anode electrode 11, including the inner surfaces of the holes.

Next, anode through holes are formed in the anode electrode 11 (FIG. 4: S112). More specifically, as shown in FIG. 5(A), a plurality of cylindrical anode through holes 19C and groove-shaped anode through holes 19L are formed in the anode electrode 11. The cylindrical anode through holes 19C and groove-shaped anode through holes 19L are alternately arranged along the direction in which the portions that will become the anode electrodes 11 are arranged. The cylindrical anode through holes 19C are formed at positions that will form the first ends 10E1 of the anode electrodes 11, and the groove-shaped anode through holes 19L are formed at positions that straddle the portions that will become adjacent anode electrodes 11 and at positions that will form the second ends 10E2 of the adjacent anode electrodes 11.

Next, a CP layer (solid electrolyte layer) 13 is formed on the surface of the dielectric layer 12 (FIG. 4: S113). More specifically, as shown in FIG. 5(B), a CP dam 14 having a frame-shaped opening is formed. Then, a CP layer 13 (a laminated structure of an inner layer CP 131 and an outer layer CP 132) is formed within the opening of the CP dam 14. At this time, a plurality of cylindrical anode through-holes 19C and CP dam through-holes 149 that respectively communicate with the groove-shaped anode through-holes 19L are formed in the CP dam 14.

This structure is implemented in a multi-state, with multiple capacitor elements 10 (a structure consisting of an anode electrode 11, a dielectric layer 12, a CP layer 13, and a CP dam 14) arranged two-dimensionally, as shown in Figure 6.

(Cathode electrode sheet forming process)
FIG. 7 is a perspective view showing the appearance of the cathode electrode before being divided into individual pieces.

As shown in FIG. 7 , the cathode electrode 20 has a plurality of cylindrical cathode through holes 29C and groove-shaped cathode through holes 29L formed therein. The cylindrical cathode through holes 29C and groove-shaped cathode through holes 29L are arranged alternately along the direction in which the portions that will become the cathode electrodes 20 are arranged. The cylindrical cathode through holes 29C are formed at positions that will form the first ends 20E1 of the cathode electrodes 20, and the groove-shaped cathode through holes 29L are formed at positions that straddle the portions that will become adjacent cathode electrodes 20 and at positions that will form the second ends 20E2 of the adjacent cathode electrodes 20.

(Sheet laminate formation process)
FIG. 8 is a flowchart showing an example of a process for forming a sheet laminate. FIG. 9 is an external perspective view showing a state in which an adhesive dam has been formed on a capacitor element sheet, with FIG. 9(A) showing the multi-layer state and FIG. 9(B) showing a portion of a single capacitor element. FIG. 10 is an external perspective view showing a state in which an adhesive dam and an adhesive have been formed on a capacitor element sheet, with FIG. 10(A) showing the multi-layer state and FIG. 10(B) showing a portion of a single capacitor element. FIG. 11 is an exploded perspective view showing a state in which capacitor element sheets and cathode electrode sheets are laminated. FIG. 11 shows a portion corresponding to one solid electrolytic capacitor. FIG. 12(A) is an exploded perspective view showing a laminated state of capacitor element sheets and cathode electrode sheets in a multi-layer state, and FIG. 12(B) is an external perspective view showing a laminated state of capacitor element sheets and cathode electrode sheets in a multi-layer state. FIG. 13 is a plan view showing a laminated state of capacitor element sheets and cathode electrode sheets. FIG. 13 shows a portion corresponding to one solid electrolytic capacitor.

An adhesive dam 30 is formed on the capacitor element sheet (Fig. 8: S121). More specifically, as shown in Figs. 9(A) and 9(B), an adhesive dam 30 having a frame-shaped opening is formed. The adhesive dam 30 is formed in a position that overlaps the CP dam 14. At this time, an adhesive dam through-hole 39 that communicates with the CP dam through-hole 149 is formed in the adhesive dam 30.

Next, as shown in Figures 10(A) and 10(B), adhesive 40 is placed in the opening of the adhesive dam 30 (Figure 8: S122).

Next, as shown in Figures 11(A), 11(B), 12(A), and 12(B), capacitor element sheets and cathode electrode sheets are stacked alternately (Figure 8: S123). More specifically, the capacitor element sheets and cathode electrode sheets are stacked so as to satisfy the following conditions:

When viewed in the stacking direction, the plurality of cylindrical anode through holes 19C in the capacitor element sheet and the groove-shaped cathode through holes 29L in the cathode electrode sheet overlap each other (see FIG. 13).
When viewed in the stacking direction, the groove-shaped anode through-holes 19L in the capacitor element sheet and the plurality of cylindrical cathode through-holes 29C in the cathode electrode sheet overlap each other (see FIG. 13).
When viewed in the stacking direction, the groove-shaped anode through-hole 19L in the capacitor element sheet and the groove-shaped cathode through-hole 29L in the cathode electrode sheet overlap each other (see FIG. 13).
With this configuration, through-holes 591 are formed, including multiple layers of anode through-holes 19C and multiple layers of cathode through-holes 29L (see FIG. 1). More specifically, through-holes 591 include multiple layers of CP dam through-holes 149 and multiple layers of adhesive dam through-holes 39, and penetrate the upper and lower surfaces of the sheet laminate.

Also, through-holes 592 are formed, including multiple layers of anode through-holes 19L and multiple layers of cathode through-holes 29C (see Figure 1). More specifically, through-holes 592 include multiple layers of CP dam through-holes 149 and multiple layers of adhesive dam through-holes 39, and penetrate the top and bottom surfaces of the sheet laminate.

Furthermore, similar to through holes 591 and 592, the sheet laminate is formed with through holes including multiple layers of anode through holes 19L and multiple layers of cathode through holes 29C, and through holes including multiple layers of anode through holes 19C and multiple layers of cathode through holes 29L.

These through holes are formed in multiple numbers according to the number of capacitor elements arranged in the sheet laminate.

Therefore, the sheet stack is formed with multiple through holes that penetrate from the top surface to the bottom surface of the sheet stack.

Next, the sheet stack is heated and pressurized (Figure 8: S124). This bonds the capacitor element sheet and the cathode electrode sheet together with the adhesive 40, forming a sheet stack.

(Sealing process with insulating resin)
Fig. 14 is a flowchart showing an example of a sealing process using an insulating resin. Fig. 15 is a four-sided view of a sealing jig, with Fig. 15(A) being a plan view, Figs. 15(B) and 15(C) being side views, and Fig. 15(D) being a cross-sectional view. Fig. 15(D) shows a cross-section A-A of Fig. 15(A). Fig. 16(A) is a cross-sectional view showing one state during sealing, and Fig. 16(B) is a plan view of the state of Fig. 16(A) with the mold and sheet laminate removed. Fig. 17 is a cross-sectional view showing the sealed state.

The sealing process uses a jig 90 as shown in Figures 15(A), 15(B), 15(C), and 15(D). The jig 90 comprises a flat substrate 91, an inner frame 92, and an outer frame 93. The jig 90 is formed from a highly rigid metal or the like. The inner frame 92 and the outer frame 93 are rectangular in plan view. The outer frame 93 surrounds the inner frame 92.

The area (planar area) of the opening 920 surrounded by the inner frame 92 is determined based on the planar area of the sheet stack (the area of the surface perpendicular to the stacking direction). Specifically, it is larger than the planar area of the sheet stack by a predetermined amount. This predetermined area is determined based on the amount of fluid insulating resin 50 to be filled. The amount of fluid insulating resin 50 is sufficient to cover the entire surface of the sheet stack with insulating resin 50 by compression molding performed in the sealing process.

The height of the outer frame 93 is higher than that of the inner frame 92. The height of the outer frame 93 determines the bottom dead center of the upper mold 992 when the lower mold 991 and upper mold 992 are fitted together, as described below.

More specifically, the outer frame 93 is larger than the height (length in the stacking direction) of the sheet stack and is determined based on the thickness of the insulating resin 50 covering the top and bottom surfaces of the sheet stack. For example, in the cases of Figures 16(A), 16(B), and 17, the height H of the outer frame 93 is larger than the thickness of the sheet stack. In other words, the distance between the upper mold 992 and the lower mold 991 when they are fitted together is larger than the thickness of the sheet stack. More specifically, the height H of the outer frame 93 is determined by the thickness of the sheet stack plus the height of the spacer 98 (a component that determines the thickness of the insulating resin 50) x 2.

Using a jig 90 of this shape, the sealing process is carried out as follows.

A jig 90 is placed on the upper surface of the lower mold 991 (see Figure 16 (A)). Next, multiple spacers 98 are placed within the opening 920 surrounded by the inner frame 92 of the jig 90. The multiple spacers 98 are solid bodies of the same height. The height of the multiple spacers 98 is determined based on the thickness of the insulating resin 50 covering the sheet laminate.

The planar area of the multiple spacers 98 is smaller than the planar area of the sheet laminate. The smaller the planar area of the multiple spacers 98, the better, but it is preferable that they have sufficient strength to withstand pressure during sealing, for example.

It is preferable that the spacer 98 is made of the same material as the insulating resin 50. However, the spacer 98 does not have to be made of the same material as the insulating resin 50 as long as it has approximately the same linear expansion coefficient as the insulating resin 50.

As shown in Figures 16(A) and 16(B), fluid insulating resin 50 is placed in the opening 920 surrounded by the inner frame 92 of the jig 90 (Figure 14: S131). The amount of insulating resin 50 is as described above, and is an amount that can cover the entire surface of the sheet laminate with the desired thickness.

As shown in Figures 16(A) and 16(B), the sheet stack is placed on the insulating resin 50 (Figure 14: S132). Furthermore, multiple spacers 98 are placed on the upper surface of the sheet stack.

The upper mold 992 and the lower mold 991 are fitted together (Figure 14: S133). As a result, as shown in Figure 17, the insulating resin 50 that was arranged on the lower side of the sheet laminate (the jig 90 and lower mold 991 side) wraps around to the upper side of the sheet laminate (the upper mold 992 side).

As mentioned above, the bottom dead center of the upper mold 992 is determined by the outer frame 93. Therefore, the distance between the upper mold 992 and the lower mold 991 is limited to a distance that allows a predetermined thickness of insulating resin 50 to be formed on the upper and lower surfaces of the sheet laminate. This allows insulating resin 50 to be formed on the entire surface of the sheet laminate, including the upper and lower surfaces.

Furthermore, as described above, the sheet laminate has multiple through holes, including multiple through holes 591 and 592. This allows the insulating resin 50 to flow from the lower surface to the upper surface of the sheet laminate through these through holes. This allows the insulating resin 50 to more reliably flow around the upper surface of the sheet laminate.

After the upper mold 992 and the lower mold 991 are fitted together, heating is performed to solidify (cure) the insulating resin 50 (Figure 14: S134).

In this way, by using the configuration and manufacturing method of this embodiment, the sheet laminate can be covered with an insulating resin of an appropriate thickness. This allows for the manufacture of a highly reliable solid electrolytic capacitor.

Furthermore, in the configuration and manufacturing method of this embodiment, both the upper and lower surfaces of the sheet laminate are almost entirely covered with only insulating resin 50. This suppresses the occurrence of warping due to thermal history, etc., and therefore allows for the manufacture of a more reliable solid electrolytic capacitor.

Furthermore, in the configuration and manufacturing method of this embodiment, the upper surface, lower surface, both end surfaces, and both side surfaces of the sheet laminate are almost entirely covered with only insulating resin 50. This further suppresses the occurrence of warping due to thermal history, etc., and therefore allows for the manufacture of a more reliable solid electrolytic capacitor.

Furthermore, when multiple spacers 98 are used as described above, insulating resin 50 of a predetermined thickness can be more reliably formed on the upper and lower surfaces of the sheet laminate. This makes it possible to more reliably achieve a sheet laminate covered with insulating resin of the appropriate thickness. Therefore, a more reliable solid electrolytic capacitor can be manufactured.

It is preferable that the multiple spacers 98 are positioned so that they do not overlap the capacitor element laminate in a planar view. In other words, it is preferable that the multiple spacers 98 are positioned so that they overlap the portions that will be cut off in a planar view during the cutting process that follows the sealing process with insulating resin. This ensures that the thickness of the insulating resin 50 in the capacitor element laminate is uniform across the entire top surface and the entire bottom surface.

Although details are omitted, it is preferable to place a release sheet made of PET or the like on the surface of the multiple spacers 98. This makes it possible to easily separate the multiple spacers 98 from the capacitor element sheet after resin sealing.

Furthermore, when multiple spacers 98 are used, it is preferable that the arrangement of the multiple spacers 98 be the same on the top and bottom sides of the sheet laminate. This allows the stress applied to the capacitor element sheet when applying the insulating resin 50 to be approximately the same on the top and bottom surfaces.

In addition, in this embodiment, it is preferable to make the thickness of the spacer 98 on the lower surface side of the sheet laminate the same as the thickness of the spacer 98 on the upper surface side. This allows the thickness of the insulating resin 50 on the lower surface side of the sheet laminate to be the same as the thickness of the insulating resin 50 on the upper surface side. This more reliably suppresses the occurrence of warping due to thermal history, etc., and therefore makes it possible to manufacture a more reliable solid electrolytic capacitor.

The spacer 98 may also be integrally formed with one or both of the upper mold 992 and the lower mold 991. In this case, the position of the spacer 98 on the upper mold 992 and/or the lower mold 991 is reliably fixed, improving the accuracy of the position of the spacer 98.

In the configuration and manufacturing method of this embodiment, cutting for singulation is performed so as to divide the above-mentioned through holes approximately in half (see cutting lines E11 and E12 in Figure 11 (B)). In other words, the through holes for allowing the insulating resin 50 to wrap around the upper surface of the sheet laminate are formed by the through holes for singulation. This eliminates the need to provide through holes for allowing the insulating resin 50 to wrap around separately from the through holes for singulation.

This allows for effective use of the through holes, and allows for a greater number of capacitor elements to be produced in a multi-layer configuration than if a separate through hole were formed to allow the insulating resin 50 to flow around. Furthermore, the area of each capacitor element that functions as a capacitor can be increased.

In the above description, the upper and lower surfaces of the sheet laminate are covered almost entirely with only insulating resin 50. However, a structure in which the sheet laminate is sandwiched between insulating substrates of the same material from both the upper and lower surfaces can also be used. This configuration suppresses the occurrence of warping due to thermal history, etc., making it possible to manufacture a highly reliable solid electrolytic capacitor. In this case, through holes for the substrate that overlap with the through holes in the sheet laminate can be formed in the substrate. Even in this case, insulating layers of the same material are formed on the upper and lower surfaces of the sheet laminate.

The above-described solid electrolytic capacitor 1 uses multiple foil-shaped cathode electrodes 20. However, the manufacturing method of the present application can be applied to configurations that do not use multiple foil-shaped cathode electrodes 20, and similar effects can be achieved. In this case, the cathode side of the solid electrolytic capacitor can be extracted by, for example, applying Ag paste to the outer layer CP132 of the capacitor element 10 to form a cathode extraction portion.

Second Embodiment
A solid electrolytic capacitor according to a second embodiment of the present invention and a method for manufacturing the solid electrolytic capacitor will be described with reference to the drawings. Fig. 18(A) and Fig. 18(B) are side cross-sectional views showing the configuration of a set of capacitor elements and cathode electrodes before singulation according to the second embodiment, Fig. 18(C) is a side cross-sectional view showing the configuration of a capacitor element before singulation, and Fig. 18(D) is a side cross-sectional view showing the configuration of a set of capacitor elements and cathode electrodes after singulation. Fig. 19(A) and Fig. 19(B) are exploded perspective views showing the state in which capacitor element sheets and cathode electrode sheets according to the second embodiment are stacked.

The solid electrolytic capacitor 1A according to the second embodiment differs from the solid electrolytic capacitor 1 according to the first embodiment in that it does not include the adhesive dam 30 and the adhesive 40. The other configurations of the solid electrolytic capacitor 1A are the same as those of the solid electrolytic capacitor 1, and descriptions of similar parts will be omitted.

As shown in Figures 18(A), 18(B), 18(C), 18(D), 19(A), and 19(B), the CP dam 14 is frame-shaped. The outer layer CP (outer layer solid electrolyte layer) 132 is disposed inside the frame defined by the CP dam 14. In other words, an inner layer CP 131 and an outer layer CP 132 are formed inside the frame defined by the CP dam 14. The outer layer CP 132 is formed on the surface of the inner layer CP 131.

As such, compared to the configuration of the first embodiment, even in a configuration that does not include an adhesive dam 30 and adhesive 40, adjacent capacitor elements 10 and cathode electrodes 20 are adhered and electrically connected by the outer layer CP (outer layer solid electrolyte layer) 132 formed inside the CP dam 14.

In other words, by using the configuration and manufacturing method of this embodiment, the sheet laminate can be covered with an insulating resin of an appropriate thickness. This allows for the manufacture of a highly reliable solid electrolytic capacitor.

(Explanation of an example of specific materials of each component of the solid electrolytic capacitor 1)
(Capacitor element 10)
The capacitor element 10 is realized, for example, using the following materials and thicknesses.

The anode electrode 11 is made of a metal such as aluminum, tantalum, niobium, titanium, zirconium, or magnesium, or an alloy containing these metals. It is preferable that the anode electrode 11 is made of aluminum or an aluminum alloy. The anode electrode 11 may be made of any valve metal that exhibits so-called valve action.

The anode electrode 11 is preferably flat, and the thickness of the core portion of the anode electrode 11 (the center portion not reached by the pores of the porous body) is preferably 5 μm or more and 100 μm or less. The thickness (thickness on one side) of the porous portion (the portion where the pores of the porous body are formed) is preferably 5 μm or more and 200 μm or less.

The dielectric layer 12 is preferably made of an oxide film of the anode electrode 11. For example, when an aluminum foil is used for the anode electrode 11, the dielectric layer 12 is formed by oxidizing the aluminum foil in an aqueous solution containing boric acid, phosphoric acid, adipic acid, or their sodium salts or ammonium salts. The thickness of the dielectric layer 12 is preferably 10 nm or more and 100 nm or less.

The inner layer CP131 may be a PEDOT:PSS layer, realized, for example, by a conductive polymer with a skeleton of pyrroles, thiophenes, anilines, etc., or a conductive polymer with a skeleton of thiophenes, such as PEDOT [poly(3,4-ethylenedioxythiophene)], and composited with the dopant polystyrene sulfonic acid (PSS). The inner layer CP131 may be formed, for example, by a method using a treatment liquid containing a monomer such as 3,4-ethylenedioxythiophene to form a polymer film such as poly(3,4-ethylenedioxythiophene) on the surface of the dielectric layer 12, or by a method of applying a dispersion of a polymer such as poly(3,4-ethylenedioxythiophene) to the surface of the dielectric portion and drying it.

The thickness of the outer layer CP132 is preferably 2 μm or more and 20 μm or less. The material of the outer layer CP132 is the same as the material of the inner layer CP131.

The adhesive 40 may be, for example, a mixture of insulating resin such as epoxy resin or phenolic resin and conductive particles such as carbon or silver.

The cathode electrode 20 is preferably made of aluminum or an aluminum alloy. The thickness of the cathode electrode 20 is, for example, approximately the same as the thickness of the anode electrode 11.

The insulating resin 50 may contain a filler. Examples of suitable resins include epoxy resin, phenolic resin, polyimide resin, silicone resin, polyamide resin, and liquid crystal polymer. Examples of suitable fillers include insulating oxide particles such as silica particles, alumina particles, titania particles, and zirconia particles. The maximum diameter of the filler is preferably 30 μm or more and 40 μm or less. For example, a material containing silica particles in a solid epoxy resin is more preferable.

The correspondence between the configuration according to the present invention and the above-mentioned configuration will be described below.
[Note]
<1>
a step of sequentially forming a dielectric layer and a solid electrolyte layer on the surface of a flat film-shaped anode electrode foil to form a plurality of flat film-shaped capacitor elements;
forming a sheet laminate by alternately stacking the plurality of flat film capacitor elements with conductive adhesive layers or the solid electrolyte layers interposed therebetween;
a step of sealing the sheet laminate with an insulating resin;
and
The step of forming the flat film capacitor element includes:
forming an anode through-hole penetrating the flat film capacitor element in a thickness direction;
The step of forming the sheet laminate includes:
stacking the plurality of flat film capacitor elements at positions where the anode through holes overlap one another;
The step of sealing with an insulating resin includes:
The fluid insulating resin and the sheet laminate are placed between an upper mold and a lower mold, and the upper mold and the lower mold are fitted together to perform compression molding in which heat and pressure are applied;
a distance between the upper mold and the lower mold when the upper mold and the lower mold are fitted together is greater than a thickness of the sheet laminate;
A method for manufacturing a solid electrolytic capacitor.

<2>
The step of sealing with an insulating resin includes:
a sealing jig having an inner frame and an outer frame is placed on the upper surface of the lower mold;
The fluid insulating resin and the sheet laminate are disposed inside the inner frame;
The height of the outer frame is higher than that of the inner frame, and is based on the distance between the upper mold and the lower mold when the upper mold and the lower mold are fitted together.
<1> A method for manufacturing the solid electrolytic capacitor.

<3>
The step of sealing with an insulating resin includes:
spacers each having a shape smaller than the sheet stack in a plan view are disposed above and below the sheet stack;
<1> or <2>, a method for manufacturing the solid electrolytic capacitor.

＜4＞
The upper and lower surfaces of the sheet laminate are sandwiched between insulating base materials made of the same material, and then sealed with the insulating resin.
<1> or <2>, a method for manufacturing the solid electrolytic capacitor.

<5>
the anode through-holes also serve as cutting holes for dividing the sheet laminate into a plurality of solid electrolytic capacitors;
<4> A method for manufacturing a solid electrolytic capacitor according to any one of <1> to <4>.

<6>
forming a plurality of flat film-shaped cathode electrode foils each having a cathode through-hole penetrating in the thickness direction;
The step of forming the sheet laminate includes:
the plurality of flat film capacitor elements and the plurality of flat film cathode electrode foils are alternately stacked at positions where the anode through holes and the cathode through holes overlap each other, thereby forming the sheet laminate.
<5> A method for manufacturing a solid electrolytic capacitor according to any one of <1> to <5>.

＜７＞
the cathode through-hole also serves as a cutting hole for dividing the sheet laminate into a plurality of solid electrolytic capacitors;
<6> A method for producing the solid electrolytic capacitor according to <6>.

1: Solid electrolytic capacitor 10: Capacitor element 10E1: First end 10E2: Second end 11: Anode electrode 12: Dielectric layer 13: CP layer 14: CP dam 19C: Anode through hole 19L: Anode through hole 20: Cathode electrode 20E1: First end 20E2: Second end 29C: Cathode through hole 29L: Cathode through hole 30: Adhesive dam 39: Adhesive dam through hole 40: Adhesive 50: Insulating resin 61, 62: External electrode 90: Jig 91: Substrate 92: Inner frame 93: Outer frame 98: Spacer 100: Capacitor element laminate 131: Inner layer CP
132: Outer layer CP
149: CP dam through-hole 591: through-hole 592: through-hole 991: lower mold 992: upper mold 920: opening

Claims (6)

forming a plurality of flat film capacitor elements by sequentially forming a dielectric layer and a solid electrolyte layer on the surface of a flat film anode electrode foil;
forming a sheet laminate by alternately stacking the plurality of flat film capacitor elements with conductive adhesive layers or the solid electrolyte layers interposed therebetween;
a step of sealing the sheet laminate with an insulating resin;
and
The step of forming the flat film capacitor element includes:
forming an anode through-hole penetrating the flat film capacitor element in a thickness direction;
The step of forming the sheet laminate includes:
stacking the plurality of flat film capacitor elements at positions where the anode through holes overlap one another;
The step of sealing with an insulating resin includes:
The fluid insulating resin and the sheet laminate are placed between an upper mold and a lower mold, and the upper mold and the lower mold are fitted together to perform compression molding in which heat and pressure are applied;
a distance between the upper mold and the lower mold when the upper mold and the lower mold are fitted together is greater than a thickness of the sheet laminate;
a sealing jig having an inner frame and an outer frame is placed on the upper surface of the lower mold;
The fluid insulating resin and the sheet laminate are disposed inside the inner frame;
The height of the outer frame is higher than that of the inner frame, and is based on the distance between the upper mold and the lower mold when the upper mold and the lower mold are fitted together.
A method for manufacturing a solid electrolytic capacitor. The step of sealing with an insulating resin includes:
spacers each having a shape smaller than the sheet stack in a plan view are disposed above and below the sheet stack;
The method for manufacturing the solid electrolytic capacitor according to claim 1 . The upper and lower surfaces of the sheet laminate are sandwiched between insulating base materials made of the same material, and then sealed with the insulating resin.
The method for manufacturing the solid electrolytic capacitor according to claim 1 . the anode through-holes also serve as cutting holes for dividing the sheet laminate into a plurality of solid electrolytic capacitors;
The method for manufacturing the solid electrolytic capacitor according to claim 1 . forming a plurality of flat film-shaped cathode electrode foils each having a cathode through-hole penetrating in the thickness direction;
The step of forming the sheet laminate includes:
the plurality of flat film capacitor elements and the plurality of flat film cathode electrode foils are alternately stacked at positions where the anode through holes and the cathode through holes overlap each other, thereby forming the sheet laminate.
The method for manufacturing the solid electrolytic capacitor according to claim 1 . the cathode through-hole also serves as a cutting hole for dividing the sheet laminate into a plurality of solid electrolytic capacitors;
The method for manufacturing the solid electrolytic capacitor according to claim 5 .