JP7761807B2 - Quantum computer and single electron/single hole transport method - Google Patents

Description

The present invention relates to a quantum computer and a single electron/single hole transport method.

Quantum computers are thought to be capable of faster information processing than existing computers. While existing computers handle only the two values 0 and 1, quantum computers are characterized by their ability to handle superpositions of these two values.

To handle superposition states, quantum computers require elements that realize quantum bits. Quantum bits can be realized using superconducting elements, cooled atoms, photons, and quantum dots made from semiconductor elements. The basic operations of a quantum computer include initialization, calculation, and readout. Further basic operations include single-qubit gates and two-qubit gates, and it is known that universal quantum computing can be realized by combining these. For example, each operation of a quantum computer that uses electrons as quantum bits requires the transport of electrons. Patent Document 1 discloses a method of transporting electrons using well-known charge-coupled devices. Furthermore, Patent Document 2 discloses a method of transporting a single electron.

That is, methods for transporting electrons one by one to quantum dots have been studied. In detail, Patent Document 1 discloses a method of transporting electrons using a well-known charge-coupled device (CCD). Furthermore, Patent Document 2 discloses a method of transporting electrons using the Coulomb blockade phenomenon. However, Patent Document 1 does not appear to disclose a method of moving a single electron to a desired position, and Patent Document 2 does not appear to disclose electron transport on a quantum dot array having a highly scalable two-dimensional array structure (two-dimensional quantum dot array).

US Patent Publication No. 2020027972 Japanese Patent Application Laid-Open No. 2004-63495

When considering transport on a quantum dot array, in order to transport electrons, etc. to the desired quantum dot on a two-dimensional quantum dot array, it is necessary to be able to select the desired route via multiple branching paths. Therefore, the objective of the present invention is to provide technology that enables good route selection (routing) at branching paths in the transport path.

According to a first aspect of the present invention, the following quantum computer is provided. This quantum computer comprises a gate electrode array arranged on a semiconductor crystal base, a single electron production unit that extracts a single electron, and an electron transport path that includes a branch and is a transport path for the single electron in the semiconductor crystal base. The quantum computer also controls the gate electrode array to select the path to which the single electron branches.

According to a second aspect of the present invention, the following quantum computer is provided. This quantum computer comprises a gate electrode array arranged on a semiconductor crystal base, a single-hole production unit that extracts a single hole, and a hole transport path that includes a branch and is a transport path for the single hole in the semiconductor crystal base. The quantum computer also controls the gate electrode array to select the branched path of the single hole.

According to a third aspect of the present invention, there is provided a single electron/single hole transport method as described below. This method is a single electron/single hole transport method for transporting a single electron or a single hole. This method comprises the steps of transporting a single electron/single hole along a transport path in a semiconductor crystal base using a gate electrode array, and selecting a path to which the single electron/single hole branches by controlling the voltage of a gate electrode arranged immediately after the branch in the transport path.

The present invention provides a quantum computer and a single-electron/single-hole transport method that can select a good route at a branching point in the transport path when transporting electrons, etc. Note that other issues, configurations, and effects will become clear from the description of the following embodiments of the invention.

FIG. 1 is a diagram showing an example of the structure of a quantum bit array. FIG. 2 is a schematic diagram of an example of the structure of the quantum bit array shown in FIG. 1; FIG. 10 is a diagram showing an example of transporting electrons to the left. FIG. 10 is a diagram showing an example of transporting electrons to the right. 1 is a top view of an example of a two-dimensional quantum dot array, and a schematic diagram showing an example of electron transport. FIG. 4 is a diagram showing an example of a route branching section. FIG. 10 is a diagram showing an example of path selection in electronic transport. FIG. 4B is a diagram showing an example of path selection in electron transport in a structure different from that in FIG. 4A. FIG. 3 is a schematic diagram showing an example of voltages applied to each gate electrode. FIG. 10 is a schematic diagram showing an example of voltages applied to each gate electrode when performing complex path selection. Schematic diagram of an example of an experimental device structure with a quantum dot array and two branches. Schematic diagram showing an example of potential and input voltage waveforms. FIG. 1 shows an example of experimental results of a single-electron pump used to prepare a single electron. FIG. 10 is a diagram showing an example of measurement results of DC characteristics of a gate electrode for path selection. FIG. 10 is a diagram showing an example of the current measurement results of the right drain and the left drain when no AC voltage is applied to the assist gate electrode. FIG. 10 is a diagram showing an example of the current measurement results of the right drain and the left drain when an AC voltage is applied to the assist gate electrode. A diagram showing an example of the results of a demonstration of programmable router operation. A diagram showing an example of the results of a demonstration of programmable router operation. FIG. 10 is a diagram showing an example of a method for transporting electrons and selecting paths when the two-dimensional quantum bit array has a structure in which gate electrodes are continuous in the vertical direction. FIG. 1 is a diagram showing an example of a system block diagram of a quantum computer. FIG. 4 is a diagram showing an example of a method for generating a control sequence in a voltage control unit. FIG. 10 shows an example of a calibration method for a portion of a path on a quantum dot array. FIG. 1 is a diagram showing an example of the overall configuration of a quantum computer system.

The following describes the embodiments in detail with reference to the drawings. However, the present invention should not be construed as being limited to the description of the embodiments shown below. Those skilled in the art will readily understand that the specific configurations of the present invention can be modified within the scope of the concept and purpose of the present invention.
In the configuration of the invention described below, the same parts or parts with similar functions are denoted by the same reference numerals in different drawings, and redundant explanations may be omitted. When there are multiple elements with the same or similar functions, they may be described with different subscripts. However, in some cases, the subscripts may be omitted.
The terms "first,""second,""third," and the like used in this specification are used to identify components and do not necessarily limit the number, order, or content thereof. Furthermore, numbers used to identify components are used in different contexts, and numbers used in one context do not necessarily indicate the same configuration in another context. Furthermore, a component identified by a certain number does not preclude consideration of the function of a component identified by another number.
In order to facilitate understanding of the invention, the position, size, shape, range, etc. of each component shown in the drawings etc. may not represent the actual position, size, shape, range, etc. Therefore, the present invention is not necessarily limited to the position, size, shape, range, etc. disclosed in the drawings etc.

In the embodiments, an example of a device for integrating quantum bits and a method for controlling the device is described. In the embodiments, for example, a technology for transporting a single electron (or a single hole) between each quantum dot in a quantum dot array is described in detail in order to realize a quantum computer using a quantum dot array structure.

This article explains the need for electron transport in quantum computers using semiconductor elements. Electron transport is the process of moving a single electron from one location to a desired quantum dot.

As an example of how a quantum computer can be initialized, a voltage is first applied to gate electrodes built into the semiconductor device, creating a microscopic potential structure within the semiconductor that can confine individual electrons. Electrons are then transported from a reservoir or other location containing a large number of free electrons to confine each electron in this potential. The quantum bits are then initialized by aligning the spins (degrees of freedom used as quantum bits) of each electron. Here, the electron transport for initialization is called "loading."

Next, in computation, electrons may be transported to a quantum dot region where quantum gate operations can be performed. Furthermore, in a two-qubit gate, the desired two quantum bits are transported to adjacent quantum dots, and gate operations are achieved using the effect of the interaction between the two quantum bits. When transporting electrons during computation in this way, it is necessary to transport the electrons while maintaining their quantum state, including the phase information of the electron spin. This type of electron transport for computation is called "shutting" or "shuttling."

Finally, readout requires transporting electrons to the quantum dot region where they can be read. When reading out the state of a quantum bit, it is sufficient to preserve information called spin polarization (spin up or down) or amplitude; phase information does not need to be preserved. This electron transport for readout is called "carry-out."

As mentioned above, in order to realize quantum computers, it is important to establish transportation technologies such as "loading," "shuttle," and "carry-out."

Here, we consider single-electron transport in a two-dimensional quantum dot array. The following issues must be taken into account:

To transport an electron to a desired quantum dot in a two-dimensional quantum dot array, the electron must be transported from its current location through multiple branch paths. Each branch path can be, for example, a two- or three-branch path, and the desired path must be selectable.

In typical electrical circuits, a positive bias voltage is applied in the direction in which electrons are desired to flow, but controlling the bias voltage is thought to be difficult in large-scale quantum dot arrays. This is because applying a bias voltage can cause unintended inflows and outflows of electrons. Therefore, it is desirable to select the desired path (routing) and control the electron transport path under conditions of a bias voltage of 0V.

While electron transport has been described in detail here, the same issue of being able to select the desired path can be considered when transporting a single hole in a two-dimensional quantum dot array. Therefore, the object of the present invention is to provide a technology for stable path selection (routing) at branching paths of electron transport paths (or hole transport paths). Below, we will explain in detail an embodiment that solves this problem.

<Embodiment>
[Quantum bit array]
This section describes in detail a quantum computer that uses semiconductor elements and electron spin as a quantum bit. This quantum computer has a two-dimensional quantum bit array. The quantum bit is a spin quantum bit in which the spin of a carrier (electron or hole; hereinafter, electrons are assumed, but holes are also acceptable) in a semiconductor is used as a degree of freedom. Japanese Patent Application Laid-Open Publication No. 2021-27142 proposes a two-dimensional quantum bit array.

Figure 1 shows the structure of quantum dots 122 used to form a quantum bit array 101. Here, the quantum bit array 101 shows a state in which multiple electrons 124 are held in multiple quantum dots 122. Furthermore, quantum dots 122 refer to electromagnetic field structures that can hold one or more electrons by controlling the potential 123 generated by an electromagnetic field, and each quantum dot 122 is separated by a potential barrier 121. The quantum bit array 101 is implemented in a chip placed at extremely low temperatures, such as several mK (millikelvins) to several K (kelvins), and is operated in a region where thermal fluctuations are negligible. The following explanation assumes a situation in which thermal fluctuations and excitations are negligible.

Figure 1 shows a gate electrode array, a structure in which gate electrodes 100 based on a semiconductor MOS (Metal-Oxide-Semiconductor) structure are arranged one-dimensionally, and a schematic diagram of the potential 123 inside the silicon channel 120, sandwiched between each gate electrode and an oxide film 110. The gate electrodes 100 arranged on top of a semiconductor substrate are numbered 1 to 9 from left to right, with quantum dots 122 located directly below odd-numbered gate electrodes and potential barriers 121 located directly below even-numbered gate electrodes. In this figure, one electron 124 is held in each quantum dot 122, but in some cases, zero or more electrons may be held. The quantum dots 122 are formed so that they can hold one or more electrons.

Quantum computers using quantum bit arrays use the spin of electrons held in each quantum dot as a quantum bit, and achieve quantum computing by controlling the spin state through interactions between electrons and microwaves, or between electrons themselves.

[One-dimensional electron transport]
2A is a simplified schematic diagram of the quantum bit array shown in FIG. 1. An electron 201 is held in a quantum dot 203 directly below the fifth gate electrode. The structure of the gate electrode 200 is controlled or the voltage applied to the gate electrode 200 is adjusted so that the potential of the quantum dot 203 is lower than the potential of the potential barrier 202.

For the above "loading," "shuttle," and "carry-out," we explain how to transport electron 201 to another quantum dot.

Figure 2B shows an example of transporting electron 201 to the left in the case of Figure 2A. To transport it to the left, a voltage is applied to the fifth and sixth gate electrodes in a more negative direction than the current direction to raise the potential, and a voltage is applied to the third and fourth gate electrodes in a more positive direction than the current direction to lower the potential. This causes the electron to move to the left, and when the voltage is returned, the electron can be moved to the quantum dot directly below the third gate electrode.

Figure 2C shows an example of transporting electron 201 to the right. To transport it to the right, a voltage is applied to the fourth and fifth gate electrodes in a more negative direction than the current direction, raising the potential, and a voltage is applied to the sixth and seventh gate electrodes in a more positive direction than the current direction, lowering the potential. This causes the electron to move to the right, and when the voltage is returned, the electron can be moved to the quantum dot directly below the seventh gate electrode.

In this way, if the electron's current position is directly below the Nth gate electrode, applying a negative voltage to the Nth and N+1th gate electrodes and a positive voltage to the N-1th and N-2nd gate electrodes will move the electron to the quantum dot directly below the N-2th gate electrode. Also, applying a negative voltage to the Nth and N-1th gate electrodes and a positive voltage to the N+1st and N+2nd gate electrodes will move the electron to the quantum dot directly below the N+2th gate electrode.

[Two-dimensional electron transport]
By combining these operations, it is possible to transport a single electron to a desired location in a one-dimensional array. Extending this to a two-dimensional array will enable the realization of a larger quantum computer.

Figure 3A is a top view of a two-dimensional quantum dot array, illustrating electron transport. Channels 303 (electron transport paths) are arranged in a two-dimensional lattice pattern, and quantum dots are located on the channels. While gate electrodes and other structures are omitted here, the cross-sectional structure of the channel is similar to that shown in Figures 1 and 2, with a gate electrode array located above the two-dimensional lattice-like channel 303. Consider the case where an electron is located in quantum dot 310 and is transported to quantum dot 320. This can be achieved by transporting the electron along electron path 300, but the quantum dots on the path pass through multiple branching paths 302, as indicated by the arrows in the figure. At these branching paths, path selection is required to selectively move the electron to the desired path. For example, in the branching path shown in Figure 3B, electron 330 enters from A, and at branching path 302, one of three paths—B, C, or D—must be selected for transport. The following explains how path selection in such a branching path is achieved for the transport of a single electron.

[Route selection method]
A path selection method for electron transport will be described using Figures 4A and 4B. Figure 4A shows an example of a path selection method for electron transport. In the example of Figure 4A, electron 450 is present in quantum dot 413, and Figure 4B shows an example of a method for transporting electron 450 to quantum dot 419. First, voltage control units (401, 402, 403, 404, 405) are each connected to a synchronization signal generation unit 400 (timing control unit) and are synchronized by the same clock. Furthermore, each voltage control unit (401, 402, 403, 404, 405) can apply voltage to the quantum dots and gate electrodes directly above the potential barriers connected by arrows.

Since electron 450 is present in quantum dot 413, a negative voltage is applied to quantum dot 413 and potential barrier 412 from voltage control unit 403. At the same time, a negative voltage is also applied to quantum dots (415, 421) and potential barriers (416, 420) by voltage control units (401, 402). At the same time, a positive voltage is applied to quantum dots (417, 419) and potential barriers (414, 418) by voltage control units (404, 405). Note that in the figure, black (white) fill indicates that voltage is being applied in the negative (positive) direction.

This allows electron 450 to be transported from quantum dot 413 to quantum dot 419 via quantum dot 417. Here, it is important that all voltage changes are approximately synchronized by the clock; if this timing is off, it will not be easy to transport the electron to the desired quantum dot.

A voltage control unit applies voltages to both the quantum dots and the potential barriers, with the applied voltage values adjusted in advance at the respective gate electrodes. With this method, a negative voltage is applied to the quantum dot containing the electrons to be transported and the potential barrier opposite the transport direction, as well as to the quantum dots and potential barriers in the branch path that do not transport electrons. A positive voltage is applied synchronously to the quantum dots and potential barriers on the transport path, enabling electrons to be transported to the desired quantum dot in the branch path.

In the above method, we assumed that the voltage changes almost instantaneously (i.e., in a square wave-like manner), but this is not limited to this; for example, periodic voltage changes like a sine wave are also acceptable. In this case, the influence of signal distortion due to wiring from the voltage control unit to the gate electrode is reduced, potentially improving controllability. Whether the voltage changes are square wave-like, sine wave-like, or somewhere in between, the timing of the positive or negative voltage changes of each voltage control unit must be approximately synchronized. In other words, if the changes are periodic, the phase of the positive and negative voltage changes must be approximately 180° apart.

An example of the timing and phase control of the voltage at each gate electrode is explained below. Figure 4C shows a schematic diagram of the voltage applied to each gate electrode. The solid lines indicate the voltage applied to the white electrodes (i.e., the electrodes related to the white-filled areas) in Figures 4A and B, and the dotted lines indicate the voltage applied to the black electrodes (i.e., the electrodes related to the black-filled areas) in Figures 4A and B. Here, increasing the voltage decreases the potential for electrons. By applying two types of gate electrode voltages at the same time, as shown in Figure 4C, the correct path can be selected.

Figure 4D also shows an example of more complex path selection, illustrating periodic operation. The voltage sequence applied to the gate electrodes of each branch path in Figure 4A is shown, with each path designated as path 1 (the path above the branch in the figure), path 2 (the path to the right of the branch in the figure), and path 3 (the path below the branch in the figure). In this example, electrons can be transported first to path 1, then to path 2, and finally to path 3 in that order. In this way, even for complex path selection control, the desired path can be selected by synchronizing the timing, lowering the voltage of the gate electrode before the branch and the voltage applied to the gate electrodes of paths other than the destination path, and raising the voltage applied to the gate electrode of the destination path.

In the above method, electrons may become trapped at quantum dot 417. Therefore, for example, after the above procedure, the voltage control unit 404 can apply a negative voltage to the potential barrier 414 and quantum dot 417 in two steps to stably transport electrons to the quantum dot (e.g., quantum dot 419 in Figure 4A).

In the above method, one potential barrier and one quantum dot gate electrode are connected to one voltage control unit, but the combination of these connections varies depending on the direction and path of electron transport, so making it changeable increases the flexibility of the electron transport method.

In the above method, the potential of both the quantum dot and the potential barrier was controlled, but it is also possible to simplify the control circuit by controlling only the potential barrier, for example, and utilize the change in the potential of nearby quantum dots due to capacitive coupling.

In the above method, there are multiple voltage control units, but the configuration of the voltage control units can be made more efficient by, for example, dividing the voltage generation unit and voltage modulation unit.

Figure 4B has a similar structure to Figure 4A, except for the presence of a potential barrier in the center of the branch path. In this case, electrons 450 can be transported to the desired quantum dot using a similar method (i.e., by synchronizing the timing and lowering the voltage applied to the gate electrodes of paths other than the destination path and raising the voltage applied to the gate electrodes of the destination path). However, because the quantum dots before and after transport are adjacent quantum dots separated only by a single potential barrier in the center of the branch path, path selection can be performed in one step without the electrons becoming stuck.

[Demonstration experiment]
This section describes a demonstration experiment of single-electron path selection. Figure 5A is a schematic diagram of an experimental device structure with a quantum dot array and two branch paths. In this example, the device has three ports: a source 501, a right drain 502, and a left drain 503. A single electron is extracted from a large number of electrons in the source 501 using a single-electron pump (single-electron production unit) formed by three gate electrodes (SG1, FG1, and SG2). In Figure 5A, A-A' indicates one direction of the two-dimensional lattice-shaped electron transport path, and B-B' indicates the other direction.

We then demonstrate that single electrons can be controlled to select either the right drain 502 or the left drain 503. Figure 5B is a schematic diagram of the potential and input voltage waveforms. Phase-controllable alternating current (AC) voltages of the same frequency are applied to the gate electrode FG1 in the single-electron pump, the gate electrode FG3 (assist gate) before the branch path, and the gate electrodes TG1 and TG2 used for path selection, and path selection is achieved by controlling the phase relationship between these voltages.

Figure 5C shows the experimental results of the single-electron pump operating in a 4 Kelvin (Kelvin) environment used to prepare single electrons. The horizontal axis represents the DC voltage of FG2, and the vertical axis represents I _D /(ef). Here, I _D is the drain current due to electrons transported by the single-electron pump, e is the elementary charge, and f is the driving frequency of the single-electron pump, f = 100 MHz (hence, I _D = 16 pA). This experimental result confirmed that the single-electron pump was operating normally, as a plateau was obtained at I _D /(ef) = 1. The fitting line shows the fitting result using the theoretical curve (Decay-Cascade model) of single-electron pump operation.

Figure 6 shows the measurement results of the DC characteristics of the path selection gate electrodes (TG1, TG2) in the two branch paths. The current values (I _DR , I _DL ) flowing through the right drain and left drain, respectively, are converted into a map by the applied voltages of TG1 and TG2. The horizontal axis represents the DC voltage of TG1, and the vertical axis represents the DC voltage of TG2.

The switching line 600 is the boundary line where I _DR -I _DL =0. That is, the switching line 600 represents the voltage conditions of TG1 and TG2 at the boundary line between whether electrons go to the right drain or the left drain, and the electron transport path can be switched by setting the voltage conditions across this line. In this experiment, AC voltage signals with phases reversed by 180° were applied to TG1 and TG2 so that they would operate on the operating voltage 610.

7A shows the current measurement results of the right and left drains when single electrons are periodically transported by a 100 MHz single-electron pump, the path selection gate electrodes (TG1, TG2) are operated in phase inversion, and no AC voltage is applied to the assist gate electrode FG3. The horizontal axis represents the phase difference between the AC voltages applied to FG1 and TG1, and the vertical axis represents the measured current value. Since _{I S} + I _DR + I _DL = 0, it can be seen that electrons are pumped correctly without backflow. Note that I _S is the current value of the current input to the branch. Without the assist gate operation, electrons would stagnate (stagnate) in front of the branch path until the next electron arrives, making it difficult to select the correct path.

On the other hand, when the assist gate operation shown in Figure 7B is present, electrons that have stopped just before the branch path push out electrons in synchronization with the path-selection gate electrodes (TG1 and TG2), making correct path selection easy. The phase of the AC voltage applied to the assist gate electrode FG3 is aligned with the phase of the single-electron pump (FG1). Therefore, the horizontal axis represents the phase of the AC voltage applied to the assist gate electrode FG3 and the path-selection gate electrode TG1. It can be seen that correct path selection is achieved when the phase is an integer multiple of 180° (π radians) (e.g., reference symbol 700 in the figure). Furthermore, when this phase condition is not met (e.g., reference symbol 701 in the figure), correct path selection cannot be achieved. From the above, correct path selection can be easily achieved when the assist gate is activated and the phase relationship between the assist gate electrode FG3 and the path-selection gate electrodes (TG1 and TG2) is an integer multiple of 180° (π radians).

Figure 7C shows the results of a demonstration of programmable router operation (path selection operation). Sine-wave voltage waveforms were applied to FG1, FG3, TG1, and TG2. Figure 7D shows the results of applying square-wave voltage waveforms to FG3, TG1, and TG2. The horizontal axis represents time series, and the vertical axis represents the left drain current I _DL (top row) and the right drain current I _DR (bottom row). Stars indicate the correct answers programmed using pseudorandom numbers. It can be seen that correct path selection was achieved for all 100 symbols. Furthermore, since results comparable to those obtained with square waves were obtained, it was found that the assist gate electrodes and path selection gate electrodes can also be controlled by digital signals.

[application]
Here are some examples of applications of the single-electron router described above other than quantum computers. The first application is a single-electron beam splitter. A single-electron router can split single electrons at a desired ratio, making it usable as a basic charge control element. For example, it can be used as a variable-branching-ratio divider in a circuit system that uses a stable constant-current source with a single-electron pump. While an optical beam splitter creates a superposition state of photons, a single-electron router separates electrons as particles.

The second application is single-electron pump error monitoring. When using a single-electron pump as a current standard, a controllable electron branching path is useful for monitoring whether the current is being generated with the desired accuracy. Therefore, by using a single-electron router to perform spot checks of the current value at a certain rate and monitoring the current value, the stability as a current standard can be maintained.

[Two-dimensional continuous gate structure]
8 shows an example of an electron transport and path selection method for a two-dimensional quantum bit array in which the gate electrodes are continuous in the vertical direction. The structures of the channel 810 (electron transport path), potential barrier 820, and quantum dot 830 are different in region A and region B as shown in the figure, and the structure is repeated with region A and region B as basic blocks. In region A, the gate electrodes directly above the potential barrier 820 and quantum dot 830 are continuous in the vertical direction, and approximately the same voltage is applied to all connected gate electrodes by voltage control unit 840. On the other hand, in region B, the channel 810 is connected in the vertical direction, and the gate electrodes directly above the potential barrier 820 and quantum dot 830 are separated, allowing voltages to be applied individually.

First, let's assume that electrons (841, 842, 843) are located at the positions shown in the figure. At this time, each voltage control unit 840 sets the applied voltage as shown in step 1 (- applies a negative voltage, + applies a positive voltage, and 0 maintains the current voltage). This causes all three electrons to be simultaneously transported to the quantum dot immediately to the right. In this way, in region A, electrons can be transported in parallel using vertically connected gate electrodes, reducing the number of voltage control units.

Next, the applied voltage is set as shown in step 2. This moves only electron 842 to the quantum dot next to it on the right, while the remaining two electrons 841 and 843 remain in the current quantum dot. In this way, by using a region such as region B where the gate electrodes can be independently controlled, it is possible to transport only the desired electrons.

Then, the applied voltage is set as shown in step 3. This allows electrons 842 to be transported upward. As described above, by performing appropriate voltage control according to the structure, electrons can be transported to the desired location. Note that if electrons 841 do not exist, steps 2 and 3 can be combined into one step.

[system]
Next, an example of a control system for a quantum computer will be described. Fig. 9A shows a system block diagram of the quantum computer. Fig. 9B shows a method for generating a control sequence in a voltage control unit 920, which is executed mainly in a host PC 900 and a controller unit 910.

The user first generates the desired quantum algorithm S950. This is represented by an abstract quantum circuit model, etc. Next, a program such as a transpiler converts the quantum algorithm S950 into a physical operation sequence S960 that can be implemented on a quantum computer. Next, a group of quantum computer control sequences S970 for executing this physical operation sequence is generated. These include sequences for electron transport and electron path selection (routing). Next, a sequence S980 for the operation of each voltage control unit and microwave generation operation is generated. This information is sent from the host PC 900 or controller unit 910 to each control module, such as the voltage control unit 920, clock generation unit 930 (timing control unit), and other units, such as the microwave generation unit not shown in Figure 9A, and device operation of the gate electrode 940, etc. is performed.

Figure 10 shows a method for calibrating single-electron path selection (single-electron router). As an example, the calibration method for the single-electron router can be performed by the user. Here, the user may perform the calibration method using an appropriate device such as a host PC.

The following describes a calibration method for a portion of a path on a quantum dot array. The calibration method is started (S1000). First, the operating conditions of the single-electron pump that extracts a single electron are set (S1010), and it is evaluated whether the single-electron pump can accurately extract one electron (S1020). Once it is confirmed that the accuracy exceeds a predetermined level, the operating conditions of the single-electron transporter that transports the electron extracted by the single-electron pump are set (S1030), and it is evaluated whether the electron can be transported accurately between quantum dots (S1040).

Once it is confirmed that the accuracy exceeds the predetermined level, the DC voltage conditions of the gate electrode immediately after the path branch point as shown in Figure 6 are set for the single-electron router that selects the path of the electrons transported by electron transport, and the switching line conditions are measured (S1050) and evaluated (S1060).

Once it is confirmed that the results are within the range of the predetermined conditions, the operating conditions of the single-electron router are set and an evaluation is made to see whether accurate path selection is possible at the path branch point (S1070). If it is confirmed that the accuracy exceeds the predetermined level (S1080), the calibration is completed. If the result of each evaluation is NG, the voltage conditions are reset and the evaluation is repeated.

Next, an example of a quantum computer system configuration will be described. Figure 11 shows an overview of the overall configuration of a quantum computer system. The controller unit 1102 receives a calculation task from the host computer 1101 and sends information such as an initialization sequence (see S970 in Figure 9B) to the analog control unit 1103 used for control and the quantum bit array unit 1104, which are placed in an extremely low temperature environment. As a result, after a series of quantum calculation operations are performed, the quantum bit state is read out and the resulting readout signal (calculation result signal) is sent from the quantum bit array unit 1104 to the controller unit 1102. This readout signal is processed by the controller unit 1102 and sent to the host computer 1101.

The method of this embodiment makes it possible to place single electrons required for initializing, calculating, and reading quantum bits at desired positions, for example, in a quantum computer using a large-scale quantum dot array.

Although the above describes an embodiment, the present invention is not limited to the above-described embodiment and includes various modifications and equivalent configurations within the spirit of the appended claims. For example, the above-described embodiment has been described in detail to clearly explain the present invention, and the present invention is not necessarily limited to having all of the described configurations. Furthermore, other configurations may be added, deleted, or replaced with part of the configuration of the embodiment.

As explained above, the quantum bit may be a hole instead of an electron. As in the case of a single electron, a quantum computer may be provided that extracts a single hole using a gate electrode and selects the path of the single hole by voltage control. That is, a quantum computer may be provided that includes a gate electrode array arranged on a semiconductor crystal base, a single hole production unit that extracts a single hole, and a hole transport path that includes a branch and is a transport path for the single hole in the semiconductor crystal base, and that selects the path to which the single hole branches by controlling the gate electrode array.

When extracting a single hole, a voltage opposite to that used for a single electron is used to extract the single hole. Furthermore, when selecting a path for a single hole, the path with an increased voltage applied to the gate electrode is not selected, but the path with a decreased voltage applied to the gate electrode is selected, which is the opposite of the case for a single electron.

In addition, from the above explanation, a single electron/single hole transport method for transporting a single electron or a single hole in a semiconductor crystal base that forms a quantum dot array is provided, which includes the steps of transporting a single electron/single hole along a transport path in the semiconductor crystal base using a gate electrode array arranged on the transport path in the semiconductor crystal base, and selecting a path to which the single electron/single hole branches by controlling the voltage of a gate electrode arranged at a position immediately after the branch in the transport path.

Here, with regard to this single electron/single hole transport method, for example, as shown in the structure of FIG. 4A, an assist gate electrode (gate electrode 414 in FIG. 4A) may be further utilized. That is, in this single electron/single hole transport method, in the step of selecting the path of the single electron/single hole, the path of the single electron/single hole may be selected by further controlling the voltage of a gate electrode positioned immediately before the branch.

On the other hand, for example, as shown in the structure of Figure 4B, a structure may be used in which a gate electrode immediately after the branch and a gate electrode at the branch position are used. That is, in the single electron/single hole transport method, in the step of selecting a path for a single electron/single hole, the path for a single electron/single hole may be selected by further controlling the voltage of a gate electrode arranged at the branch position in the transport path.

The single-electron/single-hole transport method can be used as a single-electron router or a single-hole router in the applications described above, such as quantum computers.

As an example of a semiconductor crystal base, a structure using a semiconductor crystal substrate has been described. However, the semiconductor crystal base may be any structure that has a quantum bit array formed thereon and that realizes the transport method described above. For example, the semiconductor crystal base may be a structure using a curved plate (a curved semiconductor crystal plate) on which the quantum bit array is formed. Furthermore, the semiconductor crystal base may be a structure with or without an oxide film formed thereon.

303...Channel, 401, 402, 403, 404, 405...Voltage control section, 410, 412, 414, 416, 418, 420...Potential barrier, 411, 413, 415, 417, 419, 421...Quantum dots

Claims (15)

a gate electrode array disposed on the semiconductor crystal base;
a single electron production unit for extracting a single electron;
an electron transport path including a branch and serving as a transport path for the single electron in the semiconductor crystal base;
Equipped with
By controlling the gate electrode array, a branched path of the single electron is selected.
A quantum computer characterized by: 10. The quantum computer of claim 1,
a branch destination path of the single electron is selected by applying at least two types of voltages in synchronization to gate electrodes immediately before and immediately after the branch into which the single electron enters;
A quantum computer characterized by: 3. The quantum computer of claim 2,
a timing control unit and at least two voltage control units that control the applied voltages when the selection is made;
a voltage signal output from the first voltage control unit and a voltage signal output from the second voltage control unit are output in synchronization with a signal generated by the timing control unit;
A quantum computer characterized by: 4. The quantum computer of claim 3,
a voltage signal output from the first voltage control unit and a voltage signal output from the second voltage control unit are output in synchronization with a periodic signal from the timing control unit;
the timings of voltage changes by the first voltage control unit and the second voltage control unit are substantially the same;
A quantum computer characterized by: 10. The quantum computer of claim 1,
a branched path of the single electron is selected by applying at least two types of voltages to the branched position where the single electron enters and to a gate electrode immediately after the branched position in a synchronized manner;
A quantum computer characterized by: 6. The quantum computer of claim 5,
a timing control unit and at least two voltage control units that control the applied voltages when the selection is made;
a voltage signal output from the first voltage control unit and a voltage signal output from the second voltage control unit are output in synchronization with a signal generated by the timing control unit;
A quantum computer characterized by: 7. The quantum computer of claim 6,
a voltage signal output from the first voltage control unit and a voltage signal output from the second voltage control unit are output in synchronization with a periodic signal from the timing control unit;
the timings of voltage changes by the first voltage control unit and the second voltage control unit are substantially the same;
A quantum computer characterized by: a gate electrode array disposed on the semiconductor crystal base;
a single hole producing unit for extracting a single hole;
a hole transport path including a branch and serving as a transport path for the single hole in the semiconductor crystal base;
Equipped with
By controlling the gate electrode array, a branched path of the single hole is selected.
A quantum computer characterized by: 9. The quantum computer of claim 8,
a branch destination path of the single hole is selected by applying at least two types of voltages in synchronization to gate electrodes immediately before and immediately after the branch into which the single hole enters;
A quantum computer characterized by: 10. The quantum computer of claim 9,
a timing control unit and at least two voltage control units that control the applied voltages when the selection is made;
a voltage signal output from the first voltage control unit and a voltage signal output from the second voltage control unit are output in synchronization with a signal generated by the timing control unit;
A quantum computer characterized by: 11. The quantum computer of claim 10,
a voltage signal output from the first voltage control unit and a voltage signal output from the second voltage control unit are output in synchronization with a periodic signal from the timing control unit;
the timings of voltage changes by the first voltage control unit and the second voltage control unit are substantially the same;
A quantum computer characterized by: 9. The quantum computer of claim 8,
a branch destination path of the single hole is selected by applying at least two types of voltages to the branch position where the single hole enters and to a gate electrode immediately after the branch position in a synchronized manner;
A quantum computer characterized by: 13. The quantum computer of claim 12,
a timing control unit and at least two voltage control units that control the applied voltages when the selection is made;
a voltage signal output from the first voltage control unit and a voltage signal output from the second voltage control unit are output in synchronization with a signal generated by the timing control unit;
A quantum computer characterized by: 14. The quantum computer of claim 13,
a voltage signal output from the first voltage control unit and a voltage signal output from the second voltage control unit are output in synchronization with a periodic signal from the timing control unit;
the timings of voltage changes by the first voltage control unit and the second voltage control unit are substantially the same;
A quantum computer characterized by: A single electron/single hole transport method for transporting a single electron or a single hole, comprising:
using a gate electrode array to transport single electrons/single holes along a transport path in the semiconductor crystal base;
and selecting a branched path of the single electron/single hole by controlling a voltage of a gate electrode disposed at a position immediately after the branch in the transport path.
A single electron/single hole transport method.