JP7762044B2 - Wired circuit board and method of manufacturing the same - Google Patents

Description

The present invention relates to a printed circuit board and a manufacturing method thereof.

Wired circuit boards comprising a porous insulating resin film and a conductive layer are known (see, for example, Patent Document 1 below). In the wired circuit board described in Patent Document 1, the conductive layer has multiple wirings. In Patent Document 1, the thickness of the multiple wiring portions is the same.

Japanese Patent Application Laid-Open No. 2019-123851

Depending on the application and purpose, the printed circuit board may be pressed in the thickness direction. In this case, the thickness of the multiple portions of the porous insulating resin film that overlap with the multiple wiring sections will change uniformly due to the pressing. This can cause the electrical characteristics of each of the multiple wiring sections to change uniformly, which is a problem.

The present invention provides a wired circuit board and a manufacturing method thereof that can suppress fluctuations in the electrical characteristics of the first wiring section more than fluctuations in the electrical characteristics of the second wiring section.

The present invention (1) includes a wired circuit board having a porous insulating layer and a conductor layer, arranged in this order toward one side in the thickness direction, and the conductor layer having a first wiring portion and a second wiring portion that is thicker than the first wiring portion.

In this wired circuit board, the second wiring portion is thicker than the first wiring portion. In other words, the first wiring portion is thinner than the second wiring portion.

As a result, when the printed circuit board is pressed in the thickness direction, the porous insulating layer that overlaps the first wiring portion in the thickness direction receives a smaller press pressure than the porous insulating layer that overlaps the second wiring portion in the thickness direction. Therefore, the variation in the thickness of the porous insulating layer that overlaps the first wiring portion in the thickness direction can be suppressed more effectively than the variation in the thickness of the porous insulating layer that overlaps the second wiring portion in the thickness direction.

As a result, fluctuations in the electrical characteristics of the first wiring section can be suppressed more than fluctuations in the electrical characteristics of the second wiring section.

The present invention (2) includes the wired circuit board described in (1), in which two of the second wiring sections are arranged at a distance from each other in a direction perpendicular to the thickness direction, and the first wiring section is arranged between the two second wiring sections.

In this wired circuit board, when pressed, the porous insulating layer that overlaps the two second wiring portions in the thickness direction can withstand a large press pressure in a balanced manner. Therefore, the porous insulating layer that overlaps the first wiring portion that is disposed between the two second wiring portions is subjected to an even smaller press pressure. As a result, the thickness variation of the porous insulating layer that overlaps the first wiring portion in the thickness direction can be further suppressed compared to the thickness variation of the porous insulating layer that overlaps the second wiring portion in the thickness direction.

The present invention (3) includes the wired circuit board described in (1) or (2), further comprising a ground layer disposed on the other surface in the thickness direction of the porous insulating layer, the ground layer having a third wiring portion overlapping the first wiring portion and a fourth wiring portion overlapping the second wiring portion when projected in the thickness direction, and the fourth wiring portion being thicker than the third wiring portion.

In this wired circuit board, the ground layer includes a third wiring portion that overlaps the first wiring portion, and a fourth wiring portion that overlaps the second wiring portion and is thicker than the third wiring portion. Therefore, when the wired circuit board is pressed in the thickness direction, the porous insulating layer that overlaps the first wiring portion in the thickness direction is subjected to a smaller press pressure than the porous insulating layer that overlaps the second wiring portion in the thickness direction. Therefore, fluctuations in the thickness of the porous insulating layer that overlaps the first wiring portion in the thickness direction can be more effectively suppressed compared to fluctuations in the thickness of the porous insulating layer that overlaps the second wiring portion in the thickness direction.

The present invention (4) includes the wired circuit board described in (3), in which the porous insulating layer has through-holes that penetrate the porous insulating layer in the thickness direction, and further includes a conductor connection portion that fills the through-hole and contacts the conductor layer and the ground layer.

The present invention (5) includes the wired circuit board described in any one of (1) to (4), further comprising an adhesive layer and a cover insulating layer, the cover insulating layer covering the conductor layer and the porous insulating layer from one side in the thickness direction via the adhesive layer.

The present invention (6) includes a method for manufacturing a wired circuit board, comprising a first step of arranging a conductor layer having a first wiring portion and a second wiring portion thicker than the first wiring portion on one surface of a porous insulating layer in the thickness direction, and a second step of pressing a cover insulating layer onto the conductor layer and the porous insulating layer via an adhesive layer.

In this manufacturing method, in the second step, the cover insulating layer is pressed onto the conductor layer and the porous insulating layer via the adhesive layer. Even if a large pressing pressure is applied to the porous insulating layer, the variation in the thickness of the porous insulating layer overlapping the first conductor portion in the thickness direction can be suppressed more than the variation in the thickness of the porous insulating layer overlapping the second conductor portion in the thickness direction. As a result, the variation in the electrical characteristics of the first conductor portion can be suppressed more than the variation in the electrical characteristics of the second conductor portion.

The wired circuit board and manufacturing method thereof of the present invention can suppress fluctuations in the electrical characteristics of the first wiring section more than fluctuations in the electrical characteristics of the second wiring section.

FIG. 1 shows a cross-sectional view of one embodiment of the present invention. Figures 2A to 2D are manufacturing process diagrams for the wired circuit board shown in Figure 1. Figure 2A shows a process for preparing a first porous laminate. Figure 2B shows a process for forming a first via. Figure 2C shows a process for forming a first plating layer. Figure 2D shows a process for patterning a second conductor layer. 3A to 3C are manufacturing process diagrams of a printed circuit board, following on from FIG. 2D. Fig. 3A shows the process of forming a first plating layer. Fig. 3B shows the process of bonding a second porous laminate to a second conductor layer. Fig. 3C shows the process of forming a second via and a third via. 4A and 4B are diagrams illustrating the steps of manufacturing a printed circuit board, following on from FIG. 3C. Fig. 4A illustrates the step of patterning the first plating layer and the first underlayer. Fig. 4B illustrates the step of bonding the first cover laminate and the second cover laminate. FIG. 5 is a cross-sectional view of a modified example of the printed circuit board. FIG. 6 is a cross-sectional view of a modified example of the printed circuit board. FIG. 7 is a cross-sectional view of a modified example of the printed circuit board.

1. One Embodiment of the Wired Circuit Board One embodiment of the wired circuit board of the present invention will be described with reference to FIG.

The wired circuit board 1 has a thickness. The wired circuit board 1 extends in a planar direction. The planar direction is perpendicular to the thickness direction. The wired circuit board 1 has a generally flat plate shape.

The wired circuit board 1 comprises a porous insulating layer 2 and a conductor layer 3, arranged in that order in the thickness direction. The porous insulating layer 2 comprises a first porous insulating layer 21 and a second porous insulating layer 22, arranged in that order in the thickness direction. The conductor layer 3 comprises a first conductor layer 31, a second conductor layer 32, and a third conductor layer 33, arranged in that order in the thickness direction. Specifically, the wired circuit board 1 comprises, in that order toward one side in the thickness direction, the third conductor layer 33, the second porous insulating layer 22, the second conductor layer 32, the first porous insulating layer 21, and the first conductor layer 31. The wired circuit board 1 also comprises a conductor connection portion 4, a cover insulating layer 5, and an adhesive layer 6.

2. Porous insulating layer 2
The porous insulating layer 2 includes a first porous insulating layer 21 and a second porous insulating layer 22 arranged in this order toward the other side in the thickness direction.

2.1 First porous insulating layer 21
The first porous insulating layer 21 has a thickness. The first porous insulating layer 21 extends in the planar direction. The first porous insulating layer 21 has a generally flat plate shape. The first porous insulating layer 21 has a first through hole 23 and two second through holes 24.

The first through hole 23 is located in the middle of the first porous insulating layer 21 in the first direction. The first direction is included in the surface direction.

One second through hole 24 is arranged on one side of the first through hole 23 in the first direction, spaced apart. The other second through hole 24 is arranged on the other side of the first through hole 23 in the first direction, spaced apart. The other second through hole 24 is arranged on the opposite side of the one second through hole 24 from the first through hole 23 in the first direction. As a result, the one second through hole 24, the first through hole 23, and the other second through hole 24 are lined up in order in the first direction. In other words, the first through hole 23 is arranged between two second through holes 24.

The first through hole 23 and the two second through holes 24 each penetrate the first porous insulating layer 21 in the thickness direction. The inner circumferential surfaces that define the first through hole 23 and the two second through holes 24 in the first porous insulating layer 21 extend along the thickness direction. The inner circumferential surfaces may have a tapered shape in which the cross-sectional area gradually increases toward one side in the thickness direction.

2.2 Second porous insulating layer 22
The second porous insulating layer 22 is disposed on the other side in the thickness direction of the first porous insulating layer 21. The second porous insulating layer 22 is spaced apart from the first porous insulating layer 21 in the thickness direction.
The second porous insulating layer 22 is bonded to the first porous insulating layer 21 via a second adhesive layer 62, which will be described later.

The second porous insulating layer 22 has a thickness. The second porous insulating layer 22 extends in the planar direction. The second porous insulating layer 22 has a generally flat plate shape. The second porous insulating layer 22 has two third through holes 25.

When projected in the thickness direction, each of the two third through holes 25 overlaps with each of the two second through holes 24. The two third through holes 25 are aligned at a distance from each other in the first direction.

Each of the two third through holes 25 penetrates the second porous insulating layer 22 in the thickness direction. The inner circumferential surfaces that define each of the two third through holes 25 in the second porous insulating layer 22 are aligned in the thickness direction. The inner circumferential surfaces may have a tapered shape in which the cross-sectional area gradually increases toward the other side in the thickness direction.

2.3 Material of Porous Insulation Layer 2 Examples of materials for the porous insulation layer 2 include resins. There are no particular restrictions on the resins. Examples of resins include polycarbonate resins, polyimide resins, fluorinated polyimide resins, epoxy resins, phenolic resins, urea resins, melamine resins, diallyl phthalate resins, silicone resins, thermosetting urethane resins, fluororesins, and liquid crystal polymers. Polyimide resins and liquid crystal polymers are preferred.

2.4 Physical Properties of Porous Insulating Layer 2 The porous insulating layer 2 is porous and has closed cells and/or open cells.

The porosity of the porous insulating layer 2 is, for example, 50% or more, preferably 60% or more, more preferably 70% or more, and even more preferably 80% or more. The porosity of the porous insulating layer 2 is, for example, less than 100%, or even 99% or less. When the material of the porous insulating layer 2 is polyimide resin, the porosity of the porous insulating layer 2 can be calculated using the following formula:

Dielectric constant of porous insulating layer 2=dielectric constant of air×porosity+dielectric constant of polyimide×(1−porosity)
Here, the dielectric constant of air is 1 and the dielectric constant of polyimide resin is 3.5, so
Dielectric constant of porous insulating layer 2 = porosity + 3.5 (1 - porosity)
Porosity (%)=[(3.5−dielectric constant of porous insulating layer 2)/2.5]×100

The dielectric constant of the porous insulating layer 2 at a frequency of 60 GHz is, for example, 2.5 or less, preferably 1.9 or less, more preferably 1.6 or less, or, for example, greater than 1.0. The dielectric constant of the porous insulating layer 2 is measured using a resonator method at a frequency of 60 GHz.

The dielectric loss tangent of the porous insulating layer 2 at a frequency of 60 GHz is, for example, 0.006 or less, and is, for example, greater than 0. The dielectric loss tangent of the porous insulating layer 2 is measured using a resonator method at a frequency of 60 GHz.

3. Conductor layer 3
The conductor layer 3 extends in a second direction that intersects the thickness direction and the first direction. Specifically, the second direction is perpendicular to the thickness direction and the first direction.

The conductor layer 3 comprises a first conductor layer 31, a second conductor layer 32, and a third conductor layer 33, arranged in that order toward the other side in the thickness direction.

3.1 First conductor layer 31
The first conductor layer 31 is disposed on one side in the thickness direction of the first porous insulating layer 21. Specifically, the first conductor layer 31 is disposed on one surface in the thickness direction of the first porous insulating layer 21. The first conductor layer 31 has a first signal line 34 as an example of a first wiring portion, and two first ground lines 35 as examples of two second wiring portions.

3.1.1 First signal line 34
The first signal line 34 transmits a signal in the second direction. Examples of the signal include a differential signal. The signal includes a small current, for example, less than 1 A, or even less than 0.1 A. The first signal line 34 is disposed in a middle portion of the first conductor layer 31 in the first direction. The first signal line 34 is disposed on one side of the first through hole 23 in the thickness direction. The first signal line 34 blocks one end of the first through hole 23 in the thickness direction. The first signal line 34 contacts one surface of the first porous insulating layer 21 in the thickness direction surrounding the first through hole 23. The first signal line 34 includes a signal terminal 341. The signal terminal 341 is disposed at an end of the first signal line 34 in the second direction. The signal terminal 341 is connected to an electrode of an external substrate (not shown).

The first signal line 34 is thinner than the first ground line 35, which will be described next. Specifically, the thickness T1 of the first signal line 34 is, for example, 50 μm or less, preferably 35 μm or less, more preferably 18 μm or less, and is, for example, 4 μm or more. Note that the thickness T1 of the first signal line 34 is the length in the thickness direction between one surface in the thickness direction of the first porous insulating layer 21 and one surface in the thickness direction of the first signal line 34.

3.1.2 Two first ground lines 35
Each of the two first ground lines 35 earths a weak current that affects the first signal line 34. The weak current includes, for example, a current less than 1 A, or even less than 0.1 A. Each of the two first ground lines 35 is disposed on one side in the thickness direction of each of the two second through holes 24. Each of the two first ground lines 35 closes one end of each of the two second through holes 24 in the thickness direction. Each of the two first ground lines 35 contacts one surface in the thickness direction of the first porous insulating layer 21 surrounding the two second through holes 24.

The two first ground lines 35 are arranged at a distance from each other in the first direction. One first ground line 35 is arranged at a distance from the first signal line 34 on one side in the first direction.
The other first ground line 35 is arranged at a distance from the first signal line 34 on the other side in the first direction. The other first ground line 35 is arranged on the opposite side of the one first ground line 35 with respect to the first signal line 34 in the first direction. As a result, the one first ground line 35, the first signal line 34, and the other first ground line 35 are lined up in order at a distance from each other in the first direction. In other words, the first signal line 34 is arranged between two first ground lines 35.

At least one of the two first ground lines 35 includes a ground terminal 351. The ground terminal 351 is disposed at the end of the first ground line 35 in the second direction. An earth member (not shown) is connected to the ground terminal 351.

Each of the two first ground lines 35 is thicker than the first signal line 34.

On the other hand, if each of the two first ground wires 35 has the same thickness as the first signal wire 34, the pressing described below will cause the thickness of the porous insulating layer 2 overlapping the first signal wire 34 and the first ground wire 35 to vary significantly in the thickness direction, resulting in significant variations in the electrical characteristics of the first signal wire 34. Specifically, this will result in a mismatch in the characteristic impedance of the first signal wire 34.

The thickness T2 of the two first ground lines 35 is, for example, 6 μm or more, preferably 20 μm or more, more preferably 40 μm or more, and is, for example, 52 μm or less. The thickness T2 of the first ground line 35 is the length in the thickness direction between one surface in the thickness direction of the first porous insulating layer 21 and one surface in the thickness direction of the first ground line 35.

The ratio (T2/T1) of the thickness T2 of the first ground wire 35 to the thickness T1 of the first signal wire 34 exceeds 1, preferably 1.2 or greater, more preferably 1.4 or greater, and even more preferably 1.6 or greater. There is no upper limit to the ratio (T2/T1) of the thickness T2 of the first ground wire 35 to the thickness T1 of the first signal wire 34. The upper limit of the ratio (T2/T1) is, for example, 13.

3.2 Second conductor layer 32
The second conductor layer 32 is disposed on the other side in the thickness direction of the first porous insulating layer 21. The second conductor layer 32 is disposed on the opposite side of the first conductor layer 31 in the thickness direction with respect to the first porous insulating layer 21. The second conductor layer 32 is disposed between the first porous insulating layer 21 and the second porous insulating layer 22 in the thickness direction. The second conductor layer 32 is electrically connected to the first conductor layer 31. The second conductor layer 32 includes a second signal line 36 and two second ground lines 37.

3.2.1 Second signal line 36
The second signal line 36 transmits the above-mentioned signal in the second direction together with the first signal line 34. When projected in the thickness direction, the second signal line 36 overlaps with the first signal line 34. The second signal line 36 is electrically connected to the first signal line 34 in the thickness direction.

3.2.2 Two second ground lines 37
The two second ground lines 37, together with the two first ground lines 35, earth weak currents that affect the first signal line 34 and the second signal line 36. The two second ground lines 37 are arranged spaced apart on one side and the other side in the first direction of the second signal line 36. The second ground lines 37 overlap the first ground lines 35 when projected in the thickness direction.

Each of the two second ground lines 37 has the same thickness as the second signal line 36.

3.3 Third conductor layer 33
The third conductor layer 33 is an example of a ground layer. That is, the third conductor layer 33, together with the first ground line 35 and the second ground line 37, earths weak currents that affect the first signal line 34 and the second signal line 36.

The third conductor layer 33 is arranged on the other side in the thickness direction of the second porous insulating layer 22. Specifically, the third conductor layer 33 is arranged on the other surface in the thickness direction of the second porous insulating layer 22. The third conductor layer 33 is arranged on the opposite side of the second conductor layer 32 in the thickness direction with respect to the second porous insulating layer 22. The third conductor layer 33 has a third ground portion 38 as an example of a third wiring portion, and a fourth ground portion 39 as an example of a fourth wiring portion.

3.3.1 Third ground portion 38
The third ground portion 38 is disposed on the other surface in the thickness direction of the second porous insulating layer 22 between the two third through holes 25. The third ground portion 38 extends in the first direction. When projected in the thickness direction, the third ground portion 38 overlaps with the first signal line 34. When projected in the thickness direction, the third ground portion 38 encompasses the first signal line 34. Specifically, the third ground portion 38 includes an overlapping portion 381 and a non-overlapping portion 382. The overlapping portion 381 overlaps with the first signal line 34. The non-overlapping portion 382 does not overlap with the first signal line 34. In the present embodiment, the overlapping portion 381 is an intermediate portion of the third ground portion 38 in the first direction. The non-overlapping portion 382 extends outward from each of one end and the other end of the overlapping portion 381 in the first direction. The third ground portion 38 has a flat plate shape.

The third ground portion 38 is thinner than the fourth ground portion 39, which will be described next. Specifically, the thickness T3 of the third ground portion 38 is, for example, 50 μm or less, preferably 35 μm or less, more preferably 18 μm or less, and is, for example, 4 μm or more. The thickness T3 of the third ground portion 38 is the length in the thickness direction between the other surface in the thickness direction of the second porous insulating layer 22 and the other surface in the thickness direction of the third ground portion 38.

3.3.2 Fourth ground portion 39
Each of the two fourth ground portions 39 is disposed on the other side in the thickness direction of each of the two third through holes 25. Each of the two fourth ground portions 39 closes the other end portion in the thickness direction of each of the two third through holes 25. Each of the two fourth ground portions 39 contacts the other surface in the thickness direction around the two third through holes 25 in the second porous insulating layer 22.

The two fourth ground portions 39 are arranged at a distance from each other in the first direction. Each of the two fourth ground portions 39 has a flat plate shape. When projected in the thickness direction, the fourth ground portion 39 overlaps the first ground line 35. One side portion in the thickness direction of one fourth ground portion 39 is connected to one end portion in the first direction of the third ground portion 38 (overlapping portion 382). One side portion in the thickness direction of the other fourth ground portion 39 is connected to the other end portion in the first direction of the third ground portion 38 (overlapping portion 382). As a result, the two fourth ground portions 39 are electrically connected to each other via the third ground portion 38.

Each of the two fourth ground portions 39 is thicker than the third ground portion 38. When each of the two fourth ground portions 39 is thicker than the third ground portion 38, the thickness of the porous insulating layer 2 that overlaps the third ground portion 38 and the fourth ground portion 39 in the thickness direction is prevented from fluctuating significantly during the pressing process described below, thereby preventing significant fluctuations in the electrical characteristics of the first signal line 34 and the second signal line 36.

The thickness T4 of the two fourth ground portions 39 is, for example, 6 μm or more, preferably 20 μm or more, more preferably 40 μm or more, and is, for example, 52 μm or less. The thickness T4 of the fourth ground portion 39 is the length in the thickness direction between the other surface in the thickness direction of the second porous insulating layer 22 and the other surface in the thickness direction of the fourth ground portion 39.

The ratio (T4/T3) of the thickness T4 of the fourth ground portion 39 to the thickness T3 of the third ground portion 38 exceeds 1, preferably 1.2 or greater, more preferably 1.4 or greater, and even more preferably 1.6 or greater. There is no upper limit to the ratio (T4/T3) of the thickness T4 of the fourth ground portion 39 to the thickness T3 of the third ground portion 38. An upper limit to the ratio (T4/T3) is, for example, 13.

3.4 Material of the conductor layer 3
There are no limitations on the material of the conductor layer 3. Examples of the material of the conductor layer 3 include copper, iron, silver, gold, aluminum, nickel, and alloys thereof (stainless steel and bronze). A preferred material of the conductor layer 3 is copper.

4. Conductor connection part 4
The conductor connecting portions 4 are arranged in the thickness direction between the first conductor layer 31 and the second conductor layer 32 and between the second conductor layer 32 and the third conductor layer 33. The conductor connecting portions 4 are arranged in the first through hole 23, the second through hole 24, and the third through hole 25. The conductor connecting portions 4 have a first conductor connecting portion 41, two second conductor connecting portions 42, and two third conductor connecting portions 43.

4.1 First conductor connecting portion 41
A portion (main portion) of the first conductor connecting portion 41 fills the first through hole 23, and the remaining portion (the other end in the thickness direction) of the second conductor connecting portion 42 protrudes from the first through hole 23 toward the other side in the thickness direction. One end in the thickness direction of the first conductor connecting portion 41 contacts (is continuous with) the first signal line 34. The other end in the thickness direction of the first conductor connecting portion 41 contacts the second signal line 36. This electrically connects the first signal line 34 and the second signal line 36 via the first conductor connecting portion 41. Therefore, the first signal line 34, the second signal line 36, and the first conductor connecting portion 41 form a signal path that is approximately I-shaped in cross section. The signal path extends in the thickness direction and the second direction.

4.2 Second conductor connecting portion 42
A part (main part) of the second conductor connecting part 42 fills the second through-hole 24, and the remainder (the other end in the thickness direction) of the second conductor connecting part 42 protrudes from the second through-hole 24 toward the other side in the thickness direction. One end in the thickness direction of the second conductor connecting part 42 contacts (is continuous with) the first ground wire 35. The other end in the thickness direction of the second conductor connecting part 42 contacts the second ground wire 37. As a result, the first ground wire 35 and the second ground wire 37 are electrically connected via the second conductor connecting part 42.

4.3 Third conductor connecting portion 43
A portion (main portion) of the third conductor connection portion 43 fills the third through hole 25, and the remaining portion (one end portion in the thickness direction) of the third conductor connection portion 43 protrudes from the third through hole 25 toward one side in the thickness direction. The other end portion in the thickness direction of the third conductor connection portion 43 contacts (is continuous with) the fourth ground portion 39. The one end portion in the thickness direction of the third conductor connection portion 43 contacts the second ground wire 37. As a result, the second ground wire 37 and the third conductor layer 33 are electrically connected via the third conductor connection portion 43.

As a result, the first ground line 35, the second ground line 37, the third conductor layer 33, the second conductor connection portion 42, and the third conductor connection portion 43 form a ground path that is approximately U-shaped in cross section. The ground path is open toward one side in the thickness direction in cross section.

4.4 Material of Conductor Connection Portion 4 The material of the conductor connection portion 4 is the same as the material of the conductor layer 3 described above.

5. Cover insulating layer 5
The insulating cover layer 5 is disposed on one side and the other side in the thickness direction of the conductor layer 3. The insulating cover layer 5 has a first insulating cover layer 51 and a second insulating cover layer 52.

5.1 First insulating cover layer 51
The first cover insulating layer 51 is disposed on one side of the first conductor layer 31 in the thickness direction. The first cover insulating layer 51 forms one surface in the thickness direction of the wired circuit board 1. The first cover insulating layer 51 exposes the signal terminals 341 and the ground terminals 351. The first cover insulating layer 51 covers the first conductor layer 31 except for the signal terminals 341 and the ground terminals 351.

5.2 Second insulating cover layer 52
The second insulating cover layer 52 is disposed on the other side of the third conductor layer 33 in the thickness direction. The second insulating cover layer 52 forms the other surface in the thickness direction of the wired circuit board 1. The second insulating cover layer 52 covers the third conductor layer 33.

5.3 Material of the Insulating Cover Layer 5 Examples of materials for the insulating cover layer 5 include the resins described above.

6. Adhesive layer 6
The adhesive layer 6 is disposed between the above-described layers. There are no limitations on the material (or raw material) of the adhesive layer 6. The adhesive layer 6 includes a first adhesive layer 61, a second adhesive layer 62, and a third adhesive layer 63, which are arranged in this order toward the other side in the thickness direction.

6.1 First adhesive layer 61
The first adhesive layer 61 is disposed on one thickness direction surface of the first conductor layer 31 and the first porous insulating layer 21 and on the other thickness direction surface of the first cover insulating layer 51. The first adhesive layer 61 bonds the first conductor layer 31 and the first porous insulating layer 21 to the first cover insulating layer 51. The first adhesive layer 61 contacts one thickness direction surface and a side surface of the first conductor layer 31 and one thickness direction surface of the first porous insulating layer 21 around the first conductor layer 31. The first adhesive layer 61 contacts the other thickness direction surface of the first cover insulating layer 51.

6.2 Second adhesive layer 62
The second adhesive layer 62 is disposed on the other thickness-wise surface of the first porous insulating layer 21 and on one thickness-wise surface of the second porous insulating layer 22. That is, the second adhesive layer 62 is disposed between the first porous insulating layer 21 and the second porous insulating layer 22. The second adhesive layer 62 buries the second conductor layer 32 in the thickness direction. Specifically, the second adhesive layer 62 contacts both thickness-wise surfaces and the side surfaces of the second conductor layer 32. The second adhesive layer 62 also contacts the side surfaces of the remaining portion of the conductor connection portion 4 described above. Specifically, the second adhesive layer 62 contacts the peripheral side surface of the other thickness-wise end of the first conductor connection portion 41, the peripheral side surface of the other thickness-wise end of the second conductor connection portion 42, and the peripheral side surface of one thickness-wise end of the third conductor connection portion 43.

6.3 Third adhesive layer 63
The third adhesive layer 63 is disposed on the other thickness direction surfaces of the third conductor layer 33 and the second porous insulating layer 22, and on one thickness direction surface of the second cover insulating layer 52. Note that Fig. 1 does not show the state in which the third adhesive layer 63 is disposed on the other thickness direction surface of the second porous insulating layer 22. The third adhesive layer 63 bonds the third conductor layer 33 and the second porous insulating layer 22 to the second cover insulating layer 52. The third adhesive layer 63 contacts the other thickness direction surface and side surface of the third conductor layer 33, and the other thickness direction surface of the second porous insulating layer 22 around the third conductor layer 33.

7. Fourth adhesive layer 64 and reinforcing layer 7
The wired circuit board 1 may further include a fourth adhesive layer 64 and a reinforcing layer 7 shown by imaginary lines.

The fourth adhesive layer 64 is disposed on the other thickness-wise surface of the second cover insulating layer 52. The fourth adhesive layer 64 bonds the second cover insulating layer 52 to the reinforcing layer 7, which will be described next.

The reinforcing layer 7 reinforces the first signal line 34 and the third ground portion 38. The reinforcing layer 7 is disposed on the other thickness-wise side of the second cover insulating layer 52. Specifically, the reinforcing layer 7 is adhered to the other thickness-wise surface of the second cover insulating layer 52 via the fourth adhesive layer 64. The reinforcing layer 7 overlaps the first signal line 34 and the third ground portion 38 when projected in the thickness direction. The reinforcing layer 7 has a flat plate shape. The material of the reinforcing layer 7 is not limited. Examples of materials for the reinforcing layer 7 include metals and hard resins. Preferred materials for the reinforcing layer 7 include metals, specifically stainless steel, copper, iron, and aluminum. The thickness of the reinforcing layer 7 is not limited.

8. Method for Manufacturing Wired Circuit Board 1 Next, a method for manufacturing the wired circuit board 1 will be described with reference to FIGS. 1 to 4B.

8.1 Preparation of First Porous Laminate 81 As shown in FIG. 2A, in this method, first, a first porous laminate 81 is prepared.

The first porous laminate 81 comprises, in order toward one side in the thickness direction, a second conductor layer 32, a one-side second adhesive layer 62A, a first porous insulating layer 21, and a first base layer 311.

The second conductor layer 32 in the first porous laminate 81 is disposed on the other side in the thickness direction of the first porous insulating layer 21. The second conductor layer 32 in the first porous laminate 81 has not yet been patterned and is not the second conductor layer 32 of the wired circuit board 1 shown in Figure 1.

The one-side second adhesive layer 62A is arranged on one thickness-wise surface of the second conductor layer 32 and on the other thickness-wise surface of the first porous insulating layer 21.

The first base layer 311 is disposed on one surface in the thickness direction of the first porous insulating layer 21. The first base layer 311 is included in the first conductor layer 31 of the printed circuit board 1 in Figure 1.

A method for preparing the first porous laminate 81 is described, for example, in Japanese Patent Application Laid-Open No. 2019-123851.

2B , the first via 91 is then formed in the first base layer 311, the first porous insulating layer 21, and the one-side second adhesive layer 62A. The first via 91 in the first porous insulating layer 21 corresponds to the first through hole 23 described above.

The first via 91 can be formed, for example, by drilling. Examples of drilling methods include laser processing, drilling, and blasting. Laser processing is preferred.

2C , the first plating layer 312 is then formed on the inner circumferential surface of the first via 91 and one surface in the thickness direction of the first base layer 311. The first plating layer 312 formed on the inner circumferential surface of the first via 91 is the first conductor connection portion 41 described above.

2D , the second conductor layer 32 is patterned to form the second signal line 36 and two second ground lines 37. Examples of methods for patterning the second conductor layer 32 include wet etching and dry etching, and preferably wet etching.

8.5 Bonding of Second Porous Laminate 82 to Second Conductor Layer 32 As shown in the lower view of FIG. 2D and FIG. 3A, the second porous laminate 82 is bonded to the second conductor layer 32.

As shown in the lower diagram of Figure 2D, first, a second porous laminate 82 is prepared. The second porous laminate 82 includes, in order toward the other side in the thickness direction, a second adhesive layer 62B on the other side, a second porous insulating layer 22, and a second base layer 331.

The other-side second adhesive layer 62B is arranged on one surface in the thickness direction of the second porous insulating layer 22.

The second base layer 331 is disposed on the other surface in the thickness direction of the second porous insulating layer 22. The second base layer 331 is included in the third conductor layer 33 described above.

A method for preparing the second porous laminate 82 is described, for example, in JP 2019-123851 A.

Next, as shown by the arrow in Figure 2D and Figure 3A, the second adhesive layer 62B on the other side of the second porous laminate 82 is bonded to the second conductor layer 32. A press (not shown) capable of pressing in the thickness direction is used. The pressing pressure is not limited. The pressing pressure is, for example, 0.5 MPa or more, preferably 3 MPa or more, and, for example, 10 MPa or less. The pressing time is, for example, 1 minute or more, preferably 10 minutes or more, and, for example, 120 minutes or less. The pressing may be a heat press. The pressing temperature is, for example, 80°C or more, preferably 120°C or more, and, for example, 300°C or less.

When the other-side second adhesive layer 62B is bonded as described above, the one-side second adhesive layer 62A and the other-side second adhesive layer 62B deform and enter between the adjacent second signal line 36 and second ground line 37. As a result, the one-side second adhesive layer 62A and the other-side second adhesive layer 62B form the second adhesive layer 62. In Figures 3A to 4B, the interface between the one-side second adhesive layer 62A and the other-side second adhesive layer 62B is shown with a virtual line, but this interface does not need to be observed. The one-side second adhesive layer 62A and the other-side second adhesive layer 62B form an integral unit.

3B , the second via 92 is formed in the first plating layer 312, the first base layer 311, and the one-side second adhesive layer 62A. The second via 92 in the first porous insulating layer 21 is the second through hole 24.

In addition, a third via 93 is formed in the second base layer 331, the second porous insulating layer 22, and the other-side second adhesive layer 62B. The third via 93 in the second porous insulating layer 22 is the third through hole 25.

Methods for forming the second via 92 and the third via 93 include the same methods as those exemplified for the first via 91.

3C , the second plating layer 313 is formed on one surface in the thickness direction of the first plating layer 312 and on the inner surface of the second via 92. At the same time, the third plating layer 332 is formed on the other surface in the thickness direction of the second base layer 331 and on the inner surface of the third via 93.

Specifically, before the second plating layer 313 and the third plating layer 332 are formed, as shown in FIG. 3B , a first resist 95 and a second resist 96 are respectively disposed on one thickness-wise surface of the first plating layer 312 and the other thickness-wise surface of the second base layer 331. Both the first resist 95 and the second resist 96 are plating resists. The first resist 95 has a reverse pattern of the second plating layer 313. The second resist 96 has a reverse pattern of the third plating layer 332.

Then, the resist laminate 83, which includes the first plating layer 312 on which the first resist 95 is disposed and the second base layer 331 on which the second resist 96 is disposed, is immersed in a plating bath to perform the plating process.

The second plating layer 313 is deposited on one thickness-wise surface of the first plating layer 312 exposed from the first resist 95 and on the inner surface of the second via 92. On the other hand, the second plating layer 313 is not deposited on one thickness-wise surface of the first plating layer 312 on which the first resist 95 is disposed.

A third plating layer 332 is deposited on the other thickness-wise surface of the second base layer 331 exposed from the second resist 96 and on the inner surface of the third via 93. On the other hand, the third plating layer 332 is not deposited on the other thickness-wise surface of the second base layer 331 on which the second resist 96 is disposed.

This forms the third conductor layer 33, which includes the third ground portion 38 and the fourth ground portion 39.

The third ground section 38 is formed from the second base layer 331. Therefore, the thickness T3 of the third ground section 38 is the same as the thickness of the second base layer 331.

The fourth ground portion 39 is formed from the second base layer 331 and the third plating layer 332. Therefore, the thickness T4 of the fourth ground portion 39 is the same as the total thickness of the second base layer 331 and the third plating layer 332.

Then, the first resist 95 and second resist 96 are removed.

8.8 Patterning of First Plating Layer 312 and First Underlayer 311 As shown in FIG. 4A , the first plating layer 312 and the first underlayer 311 are patterned. Examples of the patterning of the first plating layer 312 and the first underlayer 311 include wet etching and dry etching, and preferably wet etching. This forms the wiring 31 including the first signal line 34 and the first ground line 35 (performing the first step).

The first signal line 34 is formed from a patterned first base layer 311 and a patterned first plating layer 312. Therefore, the thickness T1 of the first signal line 34 is the total thickness of the first base layer 311 and the first plating layer 312.

The first ground line 35 is formed from a patterned first base layer 311, a patterned first plating layer 312, and a second plating layer 313. Therefore, the thickness T2 of the first ground line 35 is the total thickness of the first base layer 311, the first plating layer 312, and the second plating layer 313.

4B , the first cover laminate 85 is bonded to the first conductor layer 31 (performing the second step). As shown by the imaginary lines, the first cover laminate 85 includes a first insulating cover layer 51 and a first adhesive layer 61, which are arranged in this order toward the other side in the thickness direction.

The second cover laminate 86 is then bonded to the second conductor layer 32. As shown by the imaginary lines, the second cover laminate 86 includes a second cover insulating layer 52 and a second adhesive layer 62, arranged in that order toward one side in the thickness direction.

The above-mentioned pressing machine is used for the above-mentioned lamination. The pressing conditions are the same as above.

When the first cover laminate 85 is bonded as described above, the first adhesive layer 61 penetrates between the adjacent first signal line 34 and first ground line 35. The first adhesive layer 61 contacts one thickness-wise surface of the first porous insulating layer 21 that is exposed from the first signal line 34 and first ground line 35.

When the second cover laminate 86 is bonded as described above, the second adhesive layer 62 contacts the other surface in the thickness direction of the second porous insulating layer 22 around the third conductor layer 33.

This completes the manufacturing process of the wired circuit board 1, which includes the porous insulating layer 2, the conductor layer 3, the conductor connection portion 4, the cover insulating layer 5, and the adhesive layer 6.

Furthermore, as shown in FIG. 1, when a reinforcing layer 7 is provided on the wired circuit board 1, the reinforcing layer 7 is bonded to the second cover insulating layer 52 via the fourth adhesive layer 64. The above-mentioned press machine is used to bond the reinforcing layer 7. The pressing conditions are the same as those described above.

9. Effects of the First Embodiment In the wired circuit board 1, the first ground wire 35 is thicker than the first signal wire 34. In other words, the first signal wire 34 is thinner than the first ground wire 35.

Therefore, for example, when the second porous laminate 82 (see FIG. 2D ) is bonded to the second conductor layer 32, or when the reinforcing layer 7 is provided on the wired circuit board 1, if the first porous insulating layer 21 is pressed in the thickness direction, the first porous insulating layer 21 that overlaps the first signal line 34 in the thickness direction will be subjected to a smaller pressing pressure than the first porous insulating layer 21 that overlaps the first ground line 35 in the thickness direction. Therefore, the thickness variation of the first porous insulating layer 21 that overlaps the first signal line 34 in the thickness direction can be suppressed more effectively than the thickness variation of the 21 that overlaps the first ground line (second wiring portion) 35 in the thickness direction. Specifically, mismatching of the characteristic impedance of the first signal line 34 can be suppressed.

As a result, fluctuations in the electrical characteristics of the first signal line 34 can be suppressed more than fluctuations in the electrical characteristics of the first ground line 35.

On the other hand, although the first porous insulating layer 21 overlapping the first ground line 35 fluctuates significantly, the weak current flowing through the first ground line 35 is grounded, so large fluctuations in the electrical characteristics of the first ground line 35 are tolerated.

In this wired circuit board 1, the third conductor layer 33, which serves as the ground layer, includes a third ground portion 38 that overlaps the first signal line 34 and a fourth ground portion 39 that overlaps the first ground line 35 and is thicker than the third ground portion 38. Therefore, when the wired circuit board 1 is pressed in the thickness direction, the porous insulating layer 2 (first porous insulating layer 21 and second porous insulating layer 22) that overlaps the first signal line 34 in the thickness direction receives a smaller press pressure than the porous insulating layer 2 that overlaps the first ground line 35 in the thickness direction. Therefore, variation in the thickness of the porous insulating layer 2 that overlaps the first signal line 34 in the thickness direction can be more effectively suppressed than variation in the thickness of the porous insulating layer 2 that overlaps the first ground line 35 in the thickness direction. Specifically, mismatches in the characteristic impedance of the first signal line 34 can be more effectively suppressed.

Furthermore, in the above-described manufacturing method, even if a large press pressure is applied to the porous insulating layer 2 (first porous insulating layer 21 and second porous insulating layer 22) during the process of bonding the first cover laminate 85 to the first conductor layer 31 as shown in FIG. 4B , as described above, the variation in the thickness of the porous insulating layer 2 overlapping the first signal line 34 in the thickness direction can be suppressed more than the variation in the thickness of the porous insulating layer 2 overlapping the first ground line 35 in the thickness direction. As a result, the variation in the electrical characteristics of the first signal line 34 can be suppressed more than the variation in the electrical characteristics of the first ground line 35.

10. Modifications In the modification, the same components and steps as those in the first embodiment are denoted by the same reference numerals, and detailed descriptions thereof will be omitted. Furthermore, the modification can achieve the same effects as those in the first embodiment unless otherwise specified. Furthermore, the first embodiment and its modification can be combined as appropriate.

The first ground line 35, the second ground line 37, and the third conductor layer 33 may be the first power line, the second power line, and the power layer, respectively. The first power line, the second power line, and the power layer, together with the second conductor connection portion 42 and the third conductor connection portion 43, form a power path. A large current, for example, 1 A or more, or even 10 A or more, flows through the power path.

As shown in FIG. 1, the first signal line 34 is arranged between two first ground lines 35. Although not shown, in a modified example, the first signal line 34 may be arranged on the opposite side of one first ground line 35 from the other first ground line 35 in the first direction. Also, the first signal line 34 may be arranged on the opposite side of one first ground line 35 from the other first ground line 35 in the first direction.

Preferably, the first signal line 34 is arranged between the two first ground lines 35. In this way, during pressing using a flat press plate, the porous insulating layer 2 that overlaps the two first ground lines 35 in the thickness direction can receive a large press pressure in a balanced manner, and the porous insulating layer 2 that overlaps the first signal line 34 arranged between the two first ground lines 35 receives a smaller press pressure. Therefore, fluctuations in the thickness of the porous insulating layer 2 that overlaps the first signal line 34 in the thickness direction can be more effectively suppressed than fluctuations in the thickness of the porous insulating layer 2 that overlaps the first ground line 35 in the thickness direction.

Although not shown, there may be only one first ground line (second wiring section) 35.

In the wired circuit board 1 shown in Figure 5, the conductor layer 3 has a first conductor layer 30 as an example of a ground layer. The first conductor layer 30 is disposed on one surface in the thickness direction of the first porous insulating layer 21. The first conductor layer 30 has a first ground portion 301 and a second ground portion 302.

The first ground portion 301 is disposed on one surface in the thickness direction of the first porous insulating layer 21 between the two second through holes 24. The first ground portion 301 extends in the first direction. When projected in the thickness direction, the first ground portion 301 overlaps with the third ground portion 38. The first ground portion 301 has a flat plate shape.

The other side portion in the thickness direction of one second ground portion 302 is connected to one end portion in the first direction of the first ground portion 301. The other side portion in the thickness direction of the other second ground portion 302 is connected to the other end portion in the first direction of the first ground portion 301. As a result, the two second ground portions 302 are electrically connected to each other via the first ground portion 301.

Therefore, the first conductor layer 30, the second ground line 37, the third conductor layer 33, and the conductor connection portion 4 form a ground path having a substantially rectangular frame shape in cross-section. The rectangular frame surrounds the second signal line 36 in cross-section.

As shown in Figure 6, the wired circuit board 1 comprises one porous insulating layer 2, one conductor layer 3, two adhesive layers 6, and one cover insulating layer 5.

The porous insulating layer 2 is a first porous insulating layer 21. The first porous insulating layer 21 does not have a second through hole 24.

The conductor layer 3 is the first conductor layer 31.

The adhesive layer 6 comprises a first adhesive layer 61 and a second adhesive layer 62.

The cover insulating layer 5 is the first cover insulating layer 51.

In the wired circuit board 1 shown in Figure 6, the first porous insulating layer 21, the second adhesive layer 62, the first conductor layer 31, the first adhesive layer 61, and the first cover insulating layer 51 are arranged in this order toward one side in the thickness direction.

In the wired circuit board 1 shown in Figure 7, the conductor layer 3 includes the first conductor layer 31 and the third conductor layer 40 described above.

The third conductor layer 40 includes a second signal line 36 and two fourth ground sections 39.

Although not shown, the porous insulating layer 2 includes a skin layer located at one end and/or the other end in the thickness direction. The skin layer extends in the surface direction. The skin layer is smooth. For example, the first porous insulating layer 21 includes a skin layer located at one end and/or the other end in the thickness direction. The second porous insulating layer 22 includes a skin layer at one end and/or the other end in the thickness direction.

The skin layer located at one end of the first porous insulating layer 21 in the thickness direction forms one side of the first porous insulating layer 21 in the thickness direction. The skin layer located at the other end of the first porous insulating layer 21 in the thickness direction forms the other side of the first porous insulating layer 21 in the thickness direction. The ratio of the thickness of the skin layer to the thickness of the first porous insulating layer 21 is, for example, less than 0.1. The thickness of the skin layer is appropriately adjusted to ensure the peel strength of the skin layer to the first base layer 311. Specifically, the thickness of the skin layer is, for example, 1 μm or more, and, for example, 50 μm or less, preferably 30 μm or less.

The skin layer located at one end of the second porous insulating layer 22 in the thickness direction forms one side of the second porous insulating layer 22 in the thickness direction. The skin layer located at the other end of the second porous insulating layer 22 in the thickness direction forms the other side of the second porous insulating layer 22 in the thickness direction. The ratio of the thickness of the skin layer to the thickness of the second porous insulating layer 22 is, for example, less than 0.1. The thickness of the skin layer is appropriately adjusted to ensure peel strength from the second adhesive layer 62A on one side of the skin layer. Specifically, the thickness of the skin layer is, for example, 1 μm or more, and, for example, 50 μm or less, preferably 30 μm or less.

Although not shown, adhesive layer 6 includes a fourth adhesive layer and a fifth adhesive layer, which are also not shown.

The fourth adhesive layer is disposed on one surface in the thickness direction of the first porous insulating layer 21. The fourth adhesive layer is interposed between the first porous insulating layer 21 and the first conductor layer 31. The fourth adhesive layer bonds the first porous insulating layer 21 to the first conductor layer 31. In this modified example, the fourth adhesive layer and the second adhesive layer 62 (one-side second adhesive layer 62A, see Figure 3C) are disposed on one surface and both surfaces in the thickness direction of the first porous insulating layer 21, respectively.

The fifth adhesive layer is disposed on the other thickness-wise surface of the second porous insulating layer 22. The fifth adhesive layer is interposed between the second porous insulating layer 22 and the third conductor layer 33. The fifth adhesive layer bonds the second porous insulating layer 22 to the third conductor layer 33. In this modified example, a second adhesive layer 62 (other-side second adhesive layer 62B, see Figure 3C) and a fifth adhesive layer 4 are disposed on each of one and the other thickness-wise surfaces of the second porous insulating layer 22.

To manufacture this modified wired circuit board 1, as shown in Figure 2A, a first porous laminate 81 is prepared, which includes, in order toward one side in the thickness direction, a second conductor layer 32, a second adhesive layer 62A on one side, a first porous insulating layer 21, a fourth adhesive layer (not shown), and a first base layer 311.

As shown in the lower diagram of Figure 2D, a second porous laminate 82 is used, which includes, in order toward the other side of the thickness, a second adhesive layer 62B on the other side, a second porous insulating layer 22, a fifth adhesive layer (not shown), and a second base layer 331.

1 Wired circuit board 2 Porous insulating layer 3 Conductor layer 4 Conductor connection portion 5 Cover insulating layer 21 First porous insulating layer 22 Second porous insulating layer 23 First through hole 24 Second through hole 25 Third through hole 30, 31 First conductor layer 32 Second conductor layer 33, 40 Third conductor layer (ground layer)
34 First signal line (first wiring portion)
35 First ground line (second wiring portion)
36 Second signal line 37 Second ground line 38 Third ground section (third wiring section)
39 Fourth ground portion (fourth wiring portion)
51 First insulating cover layer 52 Second insulating cover layer

Claims (5)

a porous insulating layer and a conductor layer are provided in this order toward one side in the thickness direction;
a ground layer disposed on the other surface of the porous insulating layer in the thickness direction;
the conductor layer has a first wiring portion and a second wiring portion that is thicker than the first wiring portion,
the ground layer has a third wiring portion overlapping the first wiring portion and a fourth wiring portion overlapping the second wiring portion when projected in a thickness direction;
The fourth wiring portion is thicker than the third wiring portion . two second wiring portions are arranged at an interval from each other in a direction perpendicular to the thickness direction,
The printed circuit board according to claim 1 , wherein the first wiring portion is disposed between two of the second wiring portions. the porous insulating layer has through holes that penetrate the porous insulating layer in a thickness direction,
The printed circuit board according to claim 1 , further comprising a conductor connection portion filled in said through hole, said conductor connection portion being in contact with said conductor layer and said ground layer. Further comprising an adhesive layer and a cover insulating layer,
The wired circuit board according to claim 1 , wherein the cover insulating layer covers the conductor layer and the porous insulating layer from one side in a thickness direction via the adhesive layer. a first step of disposing a conductor layer having a first wiring portion and a second wiring portion thicker than the first wiring portion on one surface of a porous insulating layer in a thickness direction;
a second step of pressing a cover insulating layer onto the conductor layer and the porous insulating layer via an adhesive layer.