JP7772306B2 - Semiconductor device and method for manufacturing the same - Google Patents

Description

The present invention relates to a semiconductor device and a method for manufacturing a semiconductor device.

Ferroelectric random access memory (FeRAM) is a well-known memory that uses polarization reversal of a ferroelectric material to store data in a ferroelectric capacitor. The ferroelectric capacitor comprises a lower electrode, a ferroelectric film disposed on the lower electrode, and an upper electrode disposed on the ferroelectric film. A conductive plug is formed on the upper electrode, connecting to the upper electrode.

When a ferroelectric film is reduced by hydrogen generated during the manufacturing process of FeRAM, its characteristics deteriorate. Therefore, methods have been proposed to prevent hydrogen from penetrating into the ferroelectric film (see, for example, Patent Document 1). Furthermore, ferroelectric capacitors are formed by patterning them into the desired shape using techniques such as etching, and a recovery annealing process (heat treatment) is performed in an oxygen atmosphere to repair process damage. This recovery annealing process forms an oxide layer on the top surface of the upper electrode, and this oxide layer can increase the contact resistance between the conductive plug and the upper electrode. Therefore, methods have been proposed to prevent this increase in contact resistance (see, for example, Patent Document 2).

JP 2009-188243 A Japanese Patent Application Laid-Open No. 2001-127264

However, the method described in Patent Document 2 leaves room for improvement in terms of suppressing an increase in contact resistance between the conductive plug and the upper electrode.

One aspect is to suppress an increase in contact resistance.

In one aspect, the semiconductor device comprises a ferroelectric capacitor having a first electrode, a ferroelectric film provided on the first electrode, and a second electrode provided on the ferroelectric film; an oxidation inhibitor film provided in contact with the upper surface of the second electrode; and a conductive plug penetrating the oxidation inhibitor film and including an adhesion film in contact with the oxidation inhibitor film and the second electrode, and a conductive film on the adhesion film, wherein the second electrode contains a first metal element, the adhesion film contains a second metal element, and the oxidation inhibitor film includes an oxide film or nitride film of a third metal element having a higher ionization tendency than the first metal element and the second metal element, or an iridium nitride film.

In one aspect, a method for manufacturing a semiconductor device includes the steps of: forming a film that will become a first electrode; forming a ferroelectric film on the film that will become the first electrode; forming a film that will become a second electrode on the ferroelectric film; forming an oxidation inhibitor film in contact with the upper surface of the film that will become the second electrode; patterning the film that will become the first electrode, the ferroelectric film, the film that will become the second electrode, and the oxidation inhibitor film to form a ferroelectric capacitor having the first electrode, the ferroelectric film, and the second electrode; performing a heat treatment on the ferroelectric capacitor in an oxygen atmosphere; and, after the heat treatment, forming a conductive plug that penetrates the oxidation inhibitor film and includes an adhesion film in contact with the oxidation inhibitor film and the second electrode and a conductive film on the adhesion film, wherein the second electrode contains a first metal element, the adhesion film contains a second metal element, and the oxidation inhibitor film includes an oxide film or nitride film of a third metal element having a higher ionization tendency than the first metal element and the second metal element, or an iridium nitride film.

One aspect is that it can suppress an increase in contact resistance.

FIG. 1 is a cross-sectional view of a semiconductor device according to a first embodiment. 2A to 2C are cross-sectional views (part 1) illustrating a method for manufacturing a semiconductor device according to the first embodiment. 3A and 3B are cross-sectional views (part 2) illustrating the method for manufacturing the semiconductor device according to the first embodiment. 4A and 4B are cross-sectional views (part 3) illustrating the method for manufacturing the semiconductor device according to the first embodiment. 5A and 5B are cross-sectional views (part 1) illustrating a method for manufacturing a semiconductor device according to a comparative example. 6A and 6B are cross-sectional views (part 2) illustrating a method for manufacturing a semiconductor device according to a comparative example. FIG. 7 shows the results of the oxidation investigation carried out on Samples 1 and 2.

An embodiment of the present invention will now be described with reference to the drawings.

FIG. 1 is a cross-sectional view of a semiconductor device 100 according to a first embodiment. As shown in FIG. 1, the semiconductor device 100 is formed on a semiconductor substrate 10, which is, for example, a P-type silicon substrate. An element isolation region 12 made of an insulator such as silicon oxide (SiO ₂ ) is formed in a surface layer of the semiconductor substrate 10, defining a region in which a transistor Ta is formed. Also, a source region S and a drain region D of the transistor Ta are formed in the surface layer of the semiconductor substrate 10. The source region S and the drain region D are made of, for example, an N-type semiconductor.

A gate electrode G is provided on a semiconductor substrate 10 via a gate insulating film 14. The gate insulating film 14 is made of, for example, _SiO2 , and the gate electrode G is made of, for example, polysilicon. The gate electrode G functions as a word line. Sidewalls 16 made of an insulator such as _SiO2 are provided on the sides of the gate electrode G. Silicide layers 18 are provided on the surfaces of the source region S, the drain region D, and the gate electrode G to reduce contact resistance. The transistor Ta is a field effect transistor.

A cover film 20, an interlayer insulating film 22, an etch stopper film 24, an interlayer insulating film 26, an oxidation suppression film 28, and a buffer film 30 are stacked on the transistor Ta in this order. The cover film 20 is approximately 50 to 100 nm thick and is made of an insulator such as silicon _nitride (SiN). The interlayer insulating film 22 is approximately 300 to 400 nm thick and is made of SiO2 or the like. The etch stopper film 24 is approximately 20 to 50 nm thick and is made of an insulator such as SiN. The interlayer insulating film 26 is approximately 200 to 300 nm thick and is made of _SiO2 or the like. The oxidation suppression film 28 is approximately 50 to 150 nm thick and is made of an insulator such as SiN. The buffer film 30 is approximately 200 to 300 nm thick and is made of an insulator such as _SiO2 .

Conductive plugs 32, 34 penetrate the interlayer insulating film 22 and cover film 20 and are connected to the source region S and drain region D, respectively. The conductive plugs 32, 34 are made of a conductor such as tungsten (W). A wiring 38 that functions as a bit line is provided, penetrating the interlayer insulating film 26 and etch stopper film 24. The wiring 38 is electrically connected to the drain region D of transistor Ta via the conductive plug 34. The wiring 38 is made of a conductor such as W. A conductive plug 36 is provided, penetrating the buffer film 30, oxidation suppression film 28, interlayer insulating film 26, and etch stopper film 24, and is connected to the conductive plug 32. The conductive plug 36 is made of a conductor such as W.

A ferroelectric capacitor Ca is provided on the buffer film 30. The ferroelectric capacitor Ca has a layered structure in which a lower electrode 40, a ferroelectric film 42, and an upper electrode 44 are stacked. The lower electrode 40 is electrically connected to the source region S of the transistor Ta via conductive plugs 36 and 32.

The lower electrode 40 is formed by stacking an adhesion film 46, an oxygen barrier conductive film 48, and an electrode film 50 in this order. The adhesion film 46 is approximately 1 nm to 10 nm thick and is made of a conductor such as titanium nitride (TiN). The adhesion film 46 functions to improve adhesion between the conductive plug 36 and the oxygen barrier conductive film 48. The oxygen barrier conductive film 48 is approximately 50 nm to 100 nm thick and has low oxygen permeability, functioning to suppress oxygen diffusion into the conductive plug 36. The oxygen barrier conductive film 48 has lower oxygen permeability than the adhesion film 46 and the electrode film 50. The oxygen barrier conductive film 48 is made of, for example, titanium aluminum nitride (TiAlN), titanium aluminum oxynitride (TiAlON), titanium silicon nitride (TiSiN), tantalum aluminum nitride (TaAlN), tantalum aluminum oxynitride (TaAlON), or tantalum silicon nitride (TaSiN). The electrode film 50 is approximately 10 to 100 nm thick and is made of a conductor such as iridium (Ir).

The ferroelectric film 42 is formed containing a ferroelectric oxide having a perovskite crystal structure _, such as PZT (Pb(Zr,Ti) _O3 ) or SBT ( _SrBi2Ta2O9 ), etc. The thickness of the ferroelectric film 42 is about 50 nm to ₁₅₀ nm.

The upper electrode 44 is formed to contain a first metal element. In Example 1, the first metal element is iridium (Ir). The upper electrode 44 is formed by laminating an electrode film 52 and an electrode film 54 in this order. For example, the electrode film 52 has a thickness of about 100 nm to 200 nm and is made of iridium oxide (IrO ₂ ). The electrode film 54 is provided to reduce contact resistance, has a thickness of 50 nm to 150 nm, and is made of iridium (Ir).

An oxidation suppression film 56, which is an insulating film, is provided in contact with the upper surface of the electrode film 54 of the upper electrode 44. The oxidation suppression film 56 includes an oxide film or nitride film of a third metal element. The third metal element is a metal having a higher ionization tendency than the first metal element included in the upper electrode 44 and the second metal element included in the adhesion film 66 of the conductive plug 64, which will be described later. In Example 1, the third metal element is aluminum (Al). For example, the oxidation suppression film 56 is an aluminum oxide (Al _x O _y ) film or an aluminum nitride (Al _x N _y ) film having a thickness of approximately 50 nm to 100 nm.

The sides of the lower electrode 40, ferroelectric film 42, upper electrode 44, and oxidation prevention film 56 are continuous, with no discontinuous protruding portions formed. The widths of the lower electrode 40, ferroelectric film 42, upper electrode 44, and oxidation prevention film 56 may continuously narrow from the lower electrode 40 toward the oxidation prevention film 56, or may be approximately the same width.

A protective film 58 is provided to cover the ferroelectric capacitor Ca and the oxidation suppression film 56. The protective film 58 has a thickness of about 20 nm to 70 nm and is made of aluminum oxide (Al _x O _y ), magnesium oxide (Mg _x O _y ), aluminum nitride (Al _x N _y ), or magnesium nitride (Mg _x N _y ). The protective film 58 has the function of suppressing the penetration of hydrogen and moisture into the ferroelectric capacitor Ca.

The oxidation prevention film 56 and the protective film 58 may be formed of the same material (e.g. _{, AlxOy} ) or different materials (e.g., the oxidation prevention film 56 is _AlxOy and the protective film 58 _{is MgxOy )} . The same material means that the constituent elements are the same, but the composition ratios may be different. When the oxidation prevention film 56 and the protective film ₅₈ are formed of the same material (e.g., _AlxOy ), the thickness of _AlxOy on the top surface of the upper electrode 44 is thicker than the thickness _{of AlxOy on} the side surface of the ferroelectric capacitor Ca. For example, the thickness of _AlxOy on the top surface of the upper _electrode 44 may be _1.5 times or more, 2.0 times or more, or 2.5 times or more the thickness _{of AlxOy} on the side surface of the ferroelectric capacitor Ca.

An interlayer insulating film 60 made of SiO ₂ or the like is provided on the protective film 58. The thickness of the interlayer insulating film 60 is approximately 1000 nm to 1800 nm. A conductive plug 64 is provided penetrating the interlayer insulating film 60, the protective film 58, and the oxidation suppression film 56. The conductive plug 64 is connected to the upper electrode 44 of the ferroelectric capacitor Ca. The conductive plug 64 includes an adhesion film 66 in contact with the interlayer insulating film 60, the protective film 58, the oxidation suppression film 56, and the electrode film 54 of the upper electrode 44, and a conductive film 68 provided on the adhesion film 66. The adhesion film 66 functions to improve adhesion between the conductive film 68 and the interlayer insulating film 60, the protective film 58, the oxidation suppression film 56, and the electrode film 54 of the upper electrode 44. The adhesion film 66 is formed by containing a second metal element. The second metal element is a metal with a lower ionization tendency than the third metal element (Al) contained in the oxidation suppression film 56. In Example 1, the second metal element is titanium (Ti). For example, the adhesion film 66 has a thickness of about 2 nm to 10 nm and is formed of titanium (Ti), titanium nitride (TiN), or a laminate of Ti and TiN. The conductive film 68 is formed of, for example, tungsten (W).

Wiring 70, which functions as a plate line, is provided on the interlayer insulating film 60. The wiring 70 has a layered structure in which a barrier film 72, a wiring film 74, and a barrier film 76 are stacked. The barrier films 72 and 76 are made of, for example, Ti or TiN. The wiring film 74 is made of a conductor such as an aluminum-copper alloy. The wiring 70 is electrically connected to the upper electrode 44 of the ferroelectric capacitor Ca via a conductive plug 64.

[Manufacturing method]
2A to 4B are cross-sectional views showing a manufacturing method of the semiconductor device 100 according to the first embodiment. FIG. 4B is an enlarged view of region A in FIG. 4A. As shown in FIG. 2A, an isolation region 12 is formed in a surface layer of a semiconductor substrate 10, e.g., a P-type silicon substrate, using shallow trench isolation (STI) technology. Next, a SiO ₂ film for forming a gate insulating film 14 is formed on the surface of the semiconductor substrate 10 using thermal oxidation, and then a polysilicon film for forming a gate electrode G is deposited using chemical vapor deposition (CVD). The SiO ₂ film and polysilicon film are then patterned using photolithography and etching to form the gate insulating film 14 and the gate electrode G.

Next, an insulating film such as SiO ₂ is formed by CVD to cover the gate electrode G, and then the insulating film is etched back to form sidewalls 16 that cover the side surfaces of the gate electrode G. Next, using the gate electrode G and the sidewalls 16 as a mask, ion implantation is performed to form the source region S and the drain region D. After that, heat treatment is performed to activate the N-type impurity diffusion regions that constitute the source region S and the drain region D. Next, a salicide process is used to form silicide layers 18 on the surfaces of the source region S, the drain region D, and the gate electrode G to reduce contact resistance. This forms a transistor Ta in the semiconductor substrate 10.

As shown in FIG. 2B , a cover film 20 is formed by depositing an insulating film such as SiN on the surface of the transistor Ta using CVD. Next, an interlayer insulating film 22 such as SiO ₂ is formed on the cover film 20 using CVD, and the surface of the interlayer insulating film 22 is then planarized using CMP (chemical mechanical polishing). Next, contact holes reaching the source region S and the drain region D are formed in the interlayer insulating film 22 and the cover film 20 using photolithography and etching. Next, an adhesive film such as Ti is formed on the side and bottom surfaces of the contact holes using sputtering or CVD, and the contact holes are then filled with a conductive film such as W using CVD. Next, excess adhesive film and conductive film deposited on the interlayer insulating film 22 are removed using CMP, forming conductive plugs 32 and 34.

2C, an insulating film such as SiN is deposited on the interlayer insulating film 22 using CVD to form an etch stopper film 24. Next, an interlayer insulating film ₂₆ such as SiO2 is formed on the etch stopper film 24 using CVD. Next, photolithography and etching are used to form linear trenches in the interlayer insulating film 26 and the etch stopper film 24 in regions where interconnects 38 will be formed. Next, an adhesive film such as Ti is formed on the side and bottom surfaces of the linear trenches using sputtering or CVD, and then a conductive film such as W is filled into the linear trenches using CVD. Next, CMP is used to remove excess adhesive film and conductive film deposited on the interlayer insulating film 26, thereby forming interconnects 38.

Next, an insulating film such as SiN is deposited on the interlayer insulating film 26 using CVD to form an oxidation prevention film 28. Next, an insulating film such as _SiO2 is deposited on the oxidation prevention film 28 using CVD to form a buffer film 30. Next, photolithography and etching are used to form contact holes that penetrate the buffer film 30, the oxidation prevention film 28, the interlayer insulating film 26, and the etch stopper film 24 and reach the conductive plug 32. Next, an adhesion film such as Ti is formed on the side and bottom surfaces of the contact hole using sputtering or CVD, and then the contact hole is filled with a conductive film such as W using CVD. Next, CMP is used to remove excess adhesion film and conductive film deposited on the buffer film 30, thereby forming a conductive plug 36. The conductive plug 36 is connected to the conductive plug 32.

As shown in FIG. 3A , an adhesion film 46 made of, for example, TiN is formed on the buffer film 30 by physical vapor deposition (PVD). An oxygen barrier conductive film 48 made of, for example, TiAlN is formed on the adhesion film 46 by PVD. An electrode film 50 made of, for example, Ir is formed on the oxygen barrier conductive film 48 by PVD. A ferroelectric film 42 made of, for example, PZT is formed on the electrode film 50 by PVD or CVD. Thereafter, the ferroelectric film 42 is subjected to rapid thermal processing, which is a heat treatment in an oxygen atmosphere. This causes desorption and oxidation of excess elements in the ferroelectric film 42, completing the crystallization of the ferroelectric film 42. Next, an electrode film 52 made of, for example, IrO ₂ is formed on the ferroelectric film 42 by PVD. An electrode film 54 made of, for example, Ir is formed on the electrode film 52 by PVD. An oxidation prevention film 56 made of, for example, Al _x O _y or Al _x N _y is formed on the electrode film 54 by sputtering.

As shown in FIG. 3(b), photolithography and etching are used to pattern the oxidation suppression film 56, electrode film 54, electrode film 52, ferroelectric film 42, electrode film 50, oxygen barrier conductive film 48, and adhesion film 46. This results in the formation of a ferroelectric capacitor Ca having a lower electrode 40 including the adhesion film 46, oxygen barrier conductive film 48, and electrode film 50, and an upper electrode 44 including the ferroelectric film 42, electrode film 52, and electrode film 54. After the ferroelectric capacitor Ca is formed, a recovery annealing process, which is a heat treatment in an oxygen atmosphere, is performed on the ferroelectric capacitor Ca to remove process damage such as etching.

4A and 4B, a protective film 58 made of, for example, _AlxOy , _MgxOy , _AlxNy , or _MgxNy is formed by CVD or _PVD so as to cover the ferroelectric capacitor Ca and the oxidation suppression film 56. An interlayer insulating film 60 mainly containing _SiO2 is formed on the protective film 58 by CVD. The surface of the interlayer insulating film 60 is then planarized by _CMP . Next, _{photolithography} and _etching are used to form contact holes that penetrate the interlayer insulating film 60, the protective film 58, and the oxidation suppression film 56 and reach the upper electrode 44 of the ferroelectric capacitor Ca. Next, an adhesion film 66 made of, for example, Ti, TiN, or a laminate of Ti and TiN is formed on the side and bottom surfaces of the contact holes by sputtering. Then, a conductive film 68 such as W is filled into the contact holes by CVD. Next, the excess adhesive film 66 and conductive film 68 deposited on the interlayer insulating film 60 are removed by CMP, thereby forming conductive plugs 64 .

After that, as shown in FIG. 1, a barrier film 72, a wiring film 74, and a barrier film 76 are laminated on the surface of the interlayer insulating film 60. Next, this laminated film is patterned using photolithography and etching to form wiring 70. The wiring 70 is electrically connected to the upper electrode 44 of the ferroelectric capacitor Ca via the conductive plug 64. Through the above steps, the semiconductor device 100 of Example 1 is formed.

[Comparative Example]
The semiconductor device according to the comparative example differs from the semiconductor device 100 of the first embodiment in that no oxidation suppression film is provided on the top surface of the upper electrode 44. The other configurations are the same as those of the semiconductor device 100 of the first embodiment.

5A to 6B are cross-sectional views showing a semiconductor device manufacturing method according to a comparative example. FIG. 6B is an enlarged view of region A in FIG. 6A. First, the same manufacturing process as that shown in FIGS. 2A to 2C of Example 1 is performed. Then, as shown in FIG. 5A, an adhesion film 46 made of TiN, an oxygen barrier conductive film 48 made of TiAlN, an electrode film 50 made of Ir, and a ferroelectric film 42 made of PZT are formed on the buffer film 30. The ferroelectric film 42 is then subjected to rapid thermal processing, which is a heat treatment under an oxygen atmosphere. Next, an electrode film 52 made of _IrO2 and an electrode film 54 made of Ir are formed on the ferroelectric film 42.

5B, the electrode film 54, the electrode film 52, the ferroelectric film 42, the electrode film 50, the oxygen barrier conductive film 48, and the adhesive film 46 are patterned using photolithography and etching. This results in a ferroelectric capacitor Ca having a lower electrode 40 including the adhesive film 46, the oxygen barrier conductive film 48, and the electrode film 50, and an upper electrode 44 including the ferroelectric film 42, the electrode film 52, and the electrode film 54. After the ferroelectric capacitor Ca is formed, a recovery annealing process, which is a heat treatment in an oxygen atmosphere, is performed on the ferroelectric capacitor Ca to remove process damage such as etching. During this recovery annealing process, the upper surface of the electrode film 54 is exposed to the oxygen atmosphere, and an oxide layer 55 is formed on the upper surface of the electrode film 54. The oxide layer 55 is, for example, an iridium oxide (IrO _x ) layer.

As shown in Figures 6(a) and 6(b), a protective film 58 is formed to cover the ferroelectric capacitor Ca. An interlayer insulating film 60 is formed on the protective film 58. Next, photolithography and etching are used to form contact holes that penetrate the interlayer insulating film 60 and protective film 58 and reach the upper electrodes 44 of the ferroelectric capacitors Ca. Next, an adhesion film 66 made of Ti, TiN, or a laminate of Ti and TiN is formed on the side and bottom surfaces of the contact holes using a sputtering method. Thereafter, a conductive film 68 such as W is filled into the contact holes using a CVD method. Next, CMP is used to remove excess adhesion film 66 and conductive film 68 deposited on the interlayer insulating film 60, thereby forming conductive plugs 64.

Because an oxide layer 55 formed by oxidizing the electrode film 54 is formed on the upper surface of the electrode film 54, the adhesion film 66 of the conductive plug 64 is formed in contact with the oxide layer 55. The adhesion film 66 is formed of Ti, TiN, or a laminate of Ti and TiN, and the electrode film 54 is formed of Ir. Since Ti has a greater ionization tendency than Ir, an increase in temperature during the manufacturing process of the adhesion film 66 and the conductive film 68 facilitates solid-phase diffusion of oxygen contained in the oxide layer 55 into the adhesion film 66. The diffusion of oxygen into the adhesion film 66 may result in the partial formation of an insulating layer 65 made of an oxide (TiO _x ) or oxynitride (TiON) of Ti (the second metal element) contained in the adhesion film 66 between the conductive plug 64 and the electrode film 54. For example, when the conductive film 68 is formed using a CVD method, the temperature rises to approximately 400° C., which facilitates solid-phase diffusion of oxygen contained in the oxide layer 55 into the adhesion film 66.

Then, although not shown, wiring 70 including a barrier film 72, a wiring film 74, and a barrier film 76 is formed on the surface of the interlayer insulating film 60, similar to the semiconductor device 100 of Example 1.

In the comparative example, an oxide layer 55 is formed on the upper surface of the electrode film 54 of the upper electrode 44 by a recovery annealing process after the formation of the ferroelectric capacitor Ca. Therefore, due to the temperature rise when forming the conductive plug 64 in contact with the electrode film 54, oxygen in the oxide layer 55 diffuses into the adhesion film 66 of the conductive plug 64 in a solid phase. As a result, an insulating layer 65 made of an oxide (TiO _x ) or oxynitride (TiON) of Ti (second metal element) contained in the adhesion film 66 is formed. The partial formation of the insulating layer 65 between the conductive plug 64 and the electrode film 54 increases the contact resistance between the conductive plug 64 and the upper electrode 44. Furthermore, the variation in contact resistance between the conductive plug 64 and the upper electrode 44 between a plurality of semiconductor devices increases.

Even if the contact holes for forming the conductive plugs 64 are formed by etching deeply enough to remove the oxide layer 55, the adhesion film 66 is formed in contact with the side surfaces of the oxide layer 55. Therefore, even in this case, oxygen in the oxide layer 55 diffuses into the adhesion film 66 in a solid phase, and an insulating layer 65 made of an oxide (TiO _x ) or oxynitride (TiON) of Ti (second metal element) contained in the adhesion film 66 is formed.

In contrast, in Example 1, as shown in FIGS. 3(a) and 3(b), an oxidation inhibitor film 56 is formed in contact with the upper surface of the electrode film 54 of the upper electrode 44 before performing a recovery annealing treatment (heat treatment) on the ferroelectric capacitor Ca. Therefore, even when a recovery annealing treatment is performed on the ferroelectric capacitor Ca, oxidation of the upper surface of the electrode film 54 is suppressed. The oxidation inhibitor film 56 is an oxide or nitride film of Al (third metal element), which has a higher ionization tendency than Ir (first metal element) contained in the electrode film 54. Films containing metal elements with a higher ionization tendency are more susceptible to oxidation than films containing metal elements with a lower ionization tendency. Therefore, even if the oxidation inhibitor film 56 is not a dense film and oxygen penetrates the interior during the recovery annealing treatment, the oxygen is easily absorbed into the oxidation inhibitor film 56, which contains Al, which has a higher ionization tendency, and is suppressed from reaching the electrode film 54. This effectively suppresses oxidation of the upper surface of the electrode film 54.

Because an oxide layer is less likely to form on the upper surface of the electrode film 54, the formation of an insulating layer made of an oxide or oxynitride of Ti (the second metal element) contained in the adhesion film 66 between the conductive plug 64 and the electrode film 54 is suppressed, as shown in FIG. 4(b). This prevents an increase in contact resistance between the conductive plug 64 and the upper electrode 44 and reduces variations in contact resistance between multiple semiconductor devices 100.

As shown in FIG. 4(b), the adhesion film 66 of the conductive plug 64 is formed in contact with the side surface of the oxidation prevention film 56. The oxidation prevention film 56 is an oxide or nitride film of Al (a third metal element), which has a higher ionization tendency than Ti (a second metal element) contained in the adhesion film 66. Therefore, the oxygen contained in the oxidation prevention film 56 is less likely to diffuse into the adhesion film 66, which contains Ti, which has a lower ionization tendency. Therefore, even if the adhesion film 66 is formed in contact with the oxidation prevention film 56, the formation of an insulating film made of an oxide or oxynitride of Ti (a second metal element) contained in the adhesion film 66 is suppressed.

As described above, according to the first embodiment, the oxidation suppression film 56 is provided in contact with the upper surface of the upper electrode 44 of the ferroelectric capacitor Ca. A conductive plug 64 is provided, which includes an adhesion film 66 that penetrates the oxidation suppression film 56 and is in contact with the oxidation suppression film 56 and the upper electrode 44, and a conductive film 68 on the adhesion film 66. The oxidation suppression film 56 includes an oxide film (Al _x O _y ) or nitride film (Al _x N _y ) of Al (a third metal element) that has a higher ionization tendency than Ir (a first metal element) contained in the upper electrode 44 and Ti (a second metal element) contained in the adhesion film 66. This prevents the formation of an insulating film made of an oxide or oxynitride of Ti (a second metal element) contained in the adhesion film 66 between the conductive plug 64 and the upper electrode 44, as described above. Therefore, an increase in contact resistance between the conductive plug 64 and the upper electrode 44 and variations in contact resistance among a plurality of semiconductor devices 100 can be suppressed.

In addition, in Example 1, the upper electrode 44 contains iridium (Ir). Ir is advantageous in that it remains conductive even when oxidized, and its relatively weak catalytic action makes it less likely for the characteristics of the ferroelectric film 42 to deteriorate. Furthermore, oxygen is supplied to the ferroelectric film 42 from iridium oxide, thereby suppressing deterioration of the characteristics of the ferroelectric capacitor Ca. The adhesion film 66 contains titanium (Ti). This improves adhesion between the conductive film 68 and the upper electrode 44 and oxidation suppression film 56.

In the first embodiment, the oxidation suppression film 56 includes an oxide film (Al _x O _y ) or a nitride film (Al _x N _y ) of aluminum (Al). This makes it possible to suppress the formation of an insulating film made of an oxide or oxynitride of Ti (second metal element) contained in the adhesion film 66 between the conductive plug 64 and the upper electrode 44, and also to suppress the penetration of hydrogen and the like into the ferroelectric capacitor Ca. Note that the oxidation suppression film 56 may include an oxide film (Mg _x O _y ) or a nitride film (Mg _x N _y ) of magnesium (Mg) instead of the oxide film (Al _x O _y ) or nitride film (Al _x N _y ) of aluminum (Al). Even in this case, it is possible to suppress the formation of an insulating film made of an oxide or oxynitride of Ti (second metal element) contained in the adhesion film 66 between the conductive plug 64 and the upper electrode 44, and also to suppress the penetration of hydrogen and the like into the ferroelectric capacitor Ca. _{The oxidation} prevention film 56 may be _a laminated film of at _least two layers selected from _AlxOy , _AlxNy , _MgxOy , and _MgxNy .

In addition, in the first embodiment, the oxidation prevention film 56 and the protective film 58 may be formed of the same material (e.g. _{, AlxOy} ). In this case, the thickness of _AlxOy on the top surface of the ferroelectric capacitor Ca is thicker than the thickness _{of AlxOy on} the side surface of the ferroelectric capacitor Ca. In this way, by making the thickness _{of AlxOy} on the top surface of the ferroelectric capacitor Ca thicker, it _is possible to effectively prevent hydrogen and the like from penetrating into the ferroelectric capacitor Ca.

In the first embodiment, the oxidation suppression film 56 and the protective film 58 may be formed of different materials (for example, the oxidation suppression film 56 may _{be AlxOy} and the protective film 58 may be _AlxNy or _{MgxOy , etc.} ), which broadens the range of materials that can be selected for the oxidation suppression film 56 and the protective film 58.

In Example 1, the upper electrode 44 is shown as containing Ir, but this is not limiting and may be formed as containing platinum (Pt), for example. The adhesion film 66 is shown as containing Ti, but may be formed of other materials as long as they can function as an adhesive, such as chromium (Cr). The oxidation prevention film 56 may be formed as long as it contains an oxide or nitride film of a third metal element that has a greater ionization tendency than the first metal element contained in the upper electrode 44 and the second metal element contained in the adhesion film 66, and may be formed as a material other than an oxide or nitride film of Al or Mg.

The semiconductor device according to the second embodiment differs from the semiconductor device 100 according to the first embodiment in that an iridium nitride (IrN _{x )} film is used as the oxidation prevention film 56. The other configurations are the same as those of the first embodiment, and therefore illustrations and descriptions thereof will be omitted. The semiconductor device according to the second embodiment is formed by the same method as the manufacturing method of the semiconductor device 100 according to the first embodiment shown in FIGS. 2A to 4B, except that an IrN x film is formed as the oxidation prevention film 56.

Here, an experiment for evaluating the oxidation characteristics of an _IrNx film and an Ir film will be described. The following samples 1 and 2 were used in the experiment.
Sample 1: A 5 nm thick iridium nitride (IrN _x ) film was formed on a magnesium oxide (MgO) substrate with a titanium (Ti) adhesive film interposed therebetween. Sample 2: A 5 nm thick iridium (Ir) film was formed on a magnesium oxide (MgO) substrate with a titanium (Ti) adhesive film interposed therebetween. Samples 1 and 2 were left for 3 minutes in an atmosphere of 10% oxygen and argon at a temperature of 400°C and a pressure of 1 Torr, and the oxidation amounts of the Ir film and IrN _x film were investigated. The temperature was then raised to 500°C and left for 3 minutes, after which the oxidation amounts of the Ir film and IrN _x film were investigated. The temperature was then raised to 600°C and left for 3 minutes, after which the oxidation amounts of the Ir film and IrN _x film were investigated. The oxidation amounts were investigated using X-ray photoelectron spectroscopy (XPS).

FIG. 7 shows the results of the oxidation investigation conducted on Samples 1 and 2. The horizontal axis of FIG. 7 represents temperature, and the vertical axis represents the volume ratio of the _IrO2 film to the _IrNx film and Ir film. As shown in FIG. 7, it can be seen that the _IrNx film is less susceptible to oxidation than the Ir film. In other words, it can be said that the _IrNx film has a high effect of suppressing oxygen diffusion.

For this reason, in Example 2, an iridium nitride (IrN _x ) film is used for the oxidation inhibitor film 56. As a result, even when a recovery annealing process is performed on the ferroelectric capacitor Ca, the oxidation inhibitor film 56 has a high effect of suppressing oxygen diffusion, thereby suppressing oxygen from reaching the electrode film 54. This suppresses oxidation of the upper surface of the electrode film 54, and as a result, suppresses the formation of an insulating layer made of an oxide or oxynitride of Ti (second metal element) contained in the adhesion film 66 between the conductive plug 64 and the electrode film 54. This makes it possible to suppress an increase in contact resistance between the conductive plug 64 and the upper electrode 44 and variations in contact resistance between a plurality of semiconductor devices. Furthermore, although the adhesion film 66 is formed in contact with the side surface of the oxidation inhibitor film 56, because the oxidation inhibitor film 56 is an iridium nitride (IrN _x ) film, diffusion of oxygen from the oxidation inhibitor film 56 to the adhesion film 66 is suppressed. Therefore, in this respect as well, the formation of an insulating film made of an oxide or oxynitride of Ti (second metal element) contained in the adhesion film 66 is suppressed.

In Example 2, as in Example 1, the upper electrode 44 is not limited to being formed containing Ir, but may be formed containing, for example, platinum (Pt). The adhesion film 66 is not limited to being formed containing Ti, but may be formed containing, for example, chromium (Cr).

Although the present invention has been described in detail above with reference to specific embodiments, the present invention is not limited to these specific embodiments, and various modifications and variations are possible within the scope of the invention as set forth in the claims.

10 Semiconductor substrate 40 Lower electrode (first electrode)
42 Ferroelectric film 44 Upper electrode (second electrode)
46 Adhesion film 48 Oxygen barrier conductive film 50, 52, 54 Electrode film 56 Oxidation suppression film 58 Protective film 60 Interlayer insulating film 64 Conductive plug 65 Insulating layer 66 Adhesion film 68 Conductive film 100 Semiconductor device Ca Ferroelectric capacitor G Gate electrode S Source region D Drain region Ta Transistor

Claims (8)

a ferroelectric capacitor having a first electrode, a ferroelectric film provided on the first electrode, and a second electrode provided on the ferroelectric film;
an oxidation prevention film provided in contact with an upper surface of the second electrode;
a conductive plug that penetrates the oxidation suppression film and is in contact with the oxidation suppression film and the second electrode, and that includes an adhesive film and a conductive film on the adhesive film;
The oxidation inhibitor film is an iridium nitride film. a ferroelectric capacitor having a first electrode, a ferroelectric film provided on the first electrode, and a second electrode provided on the ferroelectric film;
an oxidation prevention film provided in contact with an upper surface of the second electrode;
a conductive plug that penetrates the oxidation suppression film and is in contact with the oxidation suppression film and the second electrode, and that includes an adhesive film and a conductive film on the adhesive film;
the second electrode includes a first metal element;
the adhesion film contains a second metal element,
the oxidation suppression film is an insulating film including a nitride film of a third metal element having a higher ionization tendency than the first metal element and the second metal element. The semiconductor device according to claim 2 , wherein said third metal element is aluminum. the second electrode includes iridium;
The semiconductor device according to claim 1 , wherein the adhesive film contains titanium. a protective film covering the ferroelectric capacitor and the oxidation suppression film,
the oxidation suppression film and the protective film are oxide films or nitride films formed of the same material;
4. The semiconductor device according to claim 2 , wherein the thickness of said oxide film or said nitride film on the top surface of said ferroelectric capacitor is greater than the thickness of said oxide film or said nitride film on the side surface of said ferroelectric capacitor. a protective film covering the ferroelectric capacitor and the oxidation suppression film,
3. The semiconductor device according to claim 2 , wherein said oxidation suppression film and said protection film are oxide films or nitride films made of different materials. forming a film to be a first electrode;
forming a ferroelectric film on the film that will become the first electrode;
forming a film to be a second electrode on the ferroelectric film;
forming an oxidation prevention film in contact with an upper surface of the film that will become the second electrode;
a step of patterning the film to be the first electrode, the ferroelectric film, the film to be the second electrode, and the oxidation suppression film to form a ferroelectric capacitor having the first electrode, the ferroelectric film, and the second electrode;
a step of subjecting the ferroelectric capacitor to a heat treatment in an oxygen atmosphere;
and after the heat treatment, forming a conductive plug that penetrates the oxidation suppression film and is in contact with the oxidation suppression film and the second electrode, and that includes an adhesive film and a conductive film on the adhesive film,
The method for manufacturing a semiconductor device, wherein the oxidation inhibitor film is an iridium nitride film. forming a film to be a first electrode;
forming a ferroelectric film on the film that will become the first electrode;
forming a film to be a second electrode on the ferroelectric film;
forming an oxidation prevention film in contact with an upper surface of the film that will become the second electrode;
a step of patterning the film to be the first electrode, the ferroelectric film, the film to be the second electrode, and the oxidation suppression film to form a ferroelectric capacitor having the first electrode, the ferroelectric film, and the second electrode;
a step of subjecting the ferroelectric capacitor to a heat treatment in an oxygen atmosphere;
and after the heat treatment, forming a conductive plug that penetrates the oxidation suppression film and is in contact with the oxidation suppression film and the second electrode, and that includes an adhesive film and a conductive film on the adhesive film,
A method for manufacturing a semiconductor device, wherein the second electrode contains a first metal element, the adhesion film contains a second metal element, and the oxidation inhibition film contains a nitride film of a third metal element having a greater ionization tendency than the first metal element and the second metal element.