JP7775864B2 - gaming machines - Google Patents

Description

The present invention relates to an amusement machine.

Pachinko machines and slot machines are well-known gaming machines. For example, pachinko machines are equipped with a storage section for storing gaming balls. The gaming balls stored in the storage section are guided to a gaming ball launcher and launched toward the gaming area in response to the player's launch operation. Then, for example, when a gaming ball enters a ball entry section provided in the gaming area, a lottery process is executed, or a process is executed to increase the number of gaming balls available to the player.

In a slot machine, when a game value such as medals has been bet and the start lever is operated to start a new game, a lottery process is executed by the control means. Furthermore, when the lottery process is executed, the control means executes rotation start control to start the reels, and if the stop button is operated while the reels are spinning, the control means executes rotation stop control to stop the reels. If the reels stop spinning after stopping, and the result corresponds to a winning combination in the lottery process, a bonus corresponding to the winning combination is awarded to the player (see, for example, Patent Document 1).

Japanese Patent Application Laid-Open No. 2020-044062

Here, in gaming machines such as those exemplified above, it is necessary to appropriately control the execution of notifications, and there is still room for improvement in this regard.

The present invention was made in consideration of the circumstances exemplified above, and aims to provide a gaming machine that can optimally control the execution of notifications.

In order to solve the above problem, the present invention provides a display device comprising:
a predetermined display control means for causing a predetermined display to be performed on the predetermined display means;
a predetermined display control means for controlling the predetermined display means to display a pre-notification display for notifying that a predetermined state is approaching in a pre-stage state that is a stage preceding the predetermined state;
a specific display control means for controlling the specific display means to display a specific display in place of the specific display or in a more noticeable manner than the specific display, based on the occurrence of a specific start trigger in a situation where the specific display is being displayed;
a specific display termination control means for terminating the specific display when a predetermined termination trigger occurs;
a predetermined advance notification control means for executing a predetermined advance notification regarding the approach of the predetermined state in addition to the advance notification display based on the occurrence of a predetermined trigger;
Equipped with
The specific display is started while the advance warning display is being continued based on the occurrence of the predetermined start trigger while the advance warning display is being performed ,
The predetermined trigger occurs when the predetermined termination trigger occurs while the advance notification display is being performed .

This invention makes it possible to optimally control the execution of notifications.

FIG. 1 is a front view of a slot machine according to a first embodiment. 1 is a perspective view of the slot machine with the front door open. FIG. FIG. FIG. 10 is a diagram showing the arrangement of symbols on each reel. 10 is an explanatory diagram showing the relationship between the symbols visible through the display window and the combination lines. FIG. FIG. 10 is an explanatory diagram showing the relationship between winning modes and the benefits to be awarded. 10A is a front view of the common display area, and FIG. 10B is an explanatory diagram for explaining the contents of information corresponding to the stop order displayed on the common display section. 10A and 10B are explanatory diagrams for explaining the relationship between the notification content of the stop order in the image display device and the display content of the stop order in the multi-purpose display unit. FIG. 2 is an electrical configuration diagram of the slot machine. FIG. 2 is an explanatory diagram for explaining a setting mode of programs and data in a main ROM. FIG. 10 is an explanatory diagram for explaining the setting manner of each area in the main RAM. 10 is an explanatory diagram for explaining various storage areas provided in a work area for in-region processing and various storage areas provided in a work area for out-region processing; FIG. 10 is a flowchart showing a main process executed by a main MPU. 10 is a flowchart showing a timer interrupt process executed by the main MPU. 10 is a flowchart showing normal processing executed by a main MPU. 10 is a flowchart showing the lottery process for determining a role executed by the main MPU. FIG. 10 is an explanatory diagram for explaining a role lottery table when three coins are bet. FIG. 10 is an explanatory diagram for explaining a role lottery table when two coins are bet. FIG. 10 is an explanatory diagram for explaining the relationship between the order in which the reels stop and the winning patterns that are achieved. FIG. 10 is an explanatory diagram for explaining the game state and game section. 10 is a flowchart showing the processing executed by the main MPU at the start of a game. 10 is a flowchart showing a reel control process executed by the main MPU. 10 is a flowchart showing the response processing executed by the main MPU when a game ends. 10 is a flowchart showing a normal start-up process executed by the main MPU. 10 is a flowchart showing a normal process executed by the main MPU. 10 is a flowchart showing a base AT start process executed by the main MPU. 10 is a flowchart showing a base AT process executed by the main MPU. A flowchart showing the game area control processing executed by the main MPU. (a) An explanatory diagram for explaining the electrical configuration regarding communication between the main MPU and the production side MPU, and (b) an explanatory diagram for explaining commands sent from the main MPU to the production side MPU. 10A is an explanatory diagram for explaining information included in a rotation reception command A, and FIG. 10B is an explanatory diagram for explaining information included in a rotation reception command B. FIG. FIG. 10A is an explanatory diagram for explaining information included in a game end command A, and FIG. 10B is an explanatory diagram for explaining information included in a game end command B. 10 is a flowchart showing a command setting process executed by a main MPU. (a) to (d) are explanatory diagrams for explaining the contents of the display effects executed by the image display device when transition to the AT state is awaited. 10 is a flowchart showing the normal performance control processing executed by the performance side MPU. 10 is a flowchart showing the performance adjustment process executed by the performance side MPU. (a) to (c) are explanatory diagrams for explaining the execution of the continuous display performance when an abnormality occurs in a signal path group after the opening section of the continuous display performance has started in a situation where transition to the base AT state is awaited, and the abnormality in the signal path group is resolved when the showdown result section starts. (a) and (b) are explanatory diagrams for explaining the execution of the continuous display effect when an abnormality occurs in a signal path group after the opening section of the continuous display effect has started in a situation where transition to the base AT state is being waited for, and the abnormality in the signal path group is resolved just before the end of the last game in the waiting situation. (a) and (b) are explanatory diagrams for explaining the execution of the continuous display performance when an abnormality in the signal path group occurs after the opening section of the continuous display performance has started in a situation where transition to the base AT state is awaited, and the abnormality in the signal path group is resolved in a game later than the game in which control of the awaiting state ends in the main MPU and control of the base AT state begins. (a) to (i) are time charts showing the progress of a display performance when a temporary abnormality occurs in a signal path group while a continuous display performance is being performed on an image display device. (a) is an explanatory diagram for explaining the display contents of the image display device in the base AT state, and (b) is an explanatory diagram for explaining the display contents of the image display device in the ending AT state. An explanatory diagram to explain the contents of the memory area of the production side RAM for storing information for displaying various images in the base AT state and the ending AT state. This is a flowchart showing the AT performance control processing executed by the performance side MPU. 10 is a flowchart showing the remaining number counter adjustment process executed by the production side MPU. (a) An explanatory diagram showing how the reel stopping order is displayed on the image display device in the base AT state; (b) An explanatory diagram for explaining the display content of the image display device when the reel stopping order is inconsistent in the base AT state; (c) An explanatory diagram for explaining the display content of the image display device when the reel stopping order is correct in the base AT state. (a) to (g) are time charts showing the progress of the display effects when a temporary abnormality occurs in the signal path group while the reel stop order is being announced. (a) to (e) are time charts showing how the remaining number of gaming media to be awarded displayed in the remaining number to be awarded image on the image display device is corrected to display the accurate number to be awarded as the remaining number of gaming media to be awarded is added in the base AT state. 10A to 10C are explanatory diagrams for explaining how the image display device executes the effect of adding on the number of awards. 10 is a flowchart showing a first initialization process for out-of-area use executed by the main MPU; 10 is a flowchart showing a second initialization process for out-of-area use executed by the main MPU; 10 is a flowchart showing a completion monitoring process executed by a main MPU. 10 is a flowchart showing a monitoring execution process executed by a main MPU. 10 is a flowchart showing a termination setting process executed by the main MPU. (a) An explanatory diagram for explaining the content of an image that notifies that the ending conditions are approaching to be met in the ending AT state; (b) An explanatory diagram for explaining the content of an image that notifies that the ending conditions have been met and the ending AT state has ended; (c) An explanatory diagram for explaining the content of an image that notifies that the forced termination of the game is approaching; and (d) An explanatory diagram for explaining the content of an image that notifies that the game has been forced to be terminated. 10 is a flowchart showing the pre-end notification processing executed by the production side MPU. 10 is a flowchart showing a monitoring execution process executed by a main MPU in the second embodiment; 10 is a flowchart showing a termination setting process executed by the main MPU. 10 is a flowchart showing the pre-end notification processing executed by the production side MPU in the third embodiment. 13A is a flowchart showing the reference reaching control process executed by the production-side MPU in the fourth embodiment, and FIG. 13B is an explanatory diagram for explaining the contents of the reference reaching image. FIG. 13 is a diagram showing the arrangement of reels in the fifth embodiment. FIG. 10 is an explanatory diagram showing the relationship between winning modes and the benefits to be awarded. FIG. 2 is an explanatory diagram for explaining the configuration of a main MPU. 10 is a flowchart showing the lottery process for determining a role executed by the main MPU. FIG. 10A is an explanatory diagram for explaining a non-internal utility lottery table, and FIG. 10B is an explanatory diagram for explaining an internal utility lottery table. FIG. 10 is an explanatory diagram for explaining the relationship between the order in which the reels stop and the winning patterns that are achieved. FIG. 10 is an explanatory diagram for explaining the game state and game section. 10 is a flowchart showing the response processing executed by the main MPU when a game ends. 10 is a flowchart showing a bonus process executed by the main MPU. (a) and (b) are explanatory diagrams for explaining the contents of the AT transition lottery presentation. 10 is a flowchart showing advantageous lottery processing executed by the main MPU at the start of a game. (a) An explanatory diagram for explaining the probability of winning the AT transition lottery when there is no BB, and (b) a flowchart showing the processing for the AT transition lottery when there is no BB, which is executed by the main MPU. (a) is an explanatory diagram for explaining the probability of an additional win occurring in an additional lottery when there is no BB, and (b) is a flowchart showing the processing for the additional lottery when there is no BB, which is executed by the main MPU. This is a flowchart showing the control processing for AT effects executed by the effect side MPU. (a) and (b) are explanatory diagrams for explaining how the stop operation notification and the additional challenge performance are performed. 10 is a flowchart showing a stop operation notification control process executed by a main MPU. 10 is a flowchart showing a process for notifying a stop operation executed by the production side MPU. 10 is a flowchart showing a normal process executed by the main MPU. This is a flowchart showing the bonus end processing executed by the main MPU. 10 is a flowchart showing an AT process executed by a main MPU. 10 is a flowchart showing an achievement response process executed by the main MPU. 10 is a flowchart showing a post-achievement top-up process executed by the main MPU. This is a flowchart showing the processing for the additional challenge presentation executed by the presentation side MPU. FIG. 20 is a diagram showing the arrangement of each reel in the sixth embodiment. FIG. 10 is an explanatory diagram showing the relationship between winning modes and the benefits to be awarded. FIG. 10A is an explanatory diagram for explaining a non-internal utility lottery table, and FIG. 10B is an explanatory diagram for explaining an internal utility lottery table. FIG. 10 is an explanatory diagram for explaining the relationship between the order in which the reels stop and the winning patterns that are achieved. (a) and (b) are explanatory diagrams for explaining how the stop operation notification and additional challenge performance are carried out, and (c) is an explanatory diagram for explaining the configuration of the main RAM. 10 is a flowchart showing an achievement response process executed by the main MPU. 10 is a flowchart showing a post-achievement top-up process executed by the main MPU. FIG. 13A is an explanatory diagram for explaining the configuration of the main ROM in the seventh embodiment, and FIG. 13B is a flowchart showing the lottery process for winning roles executed by the main MPU. 13A to 13D are explanatory diagrams for explaining the display content of a notification before a forced termination in an image display device according to an eighth embodiment. 10 is a flowchart showing the pre-end notification processing executed by the production side MPU. 10 is a flowchart showing pre-termination control processing executed by the production side MPU. 10 is a flowchart showing a demo performance control process executed by the performance side MPU. 13 is a flowchart showing normal processing executed by a main MPU in the ninth embodiment. 10 is a flowchart showing the response processing executed by the main MPU when a game ends. 10 is a flowchart showing a base AT process executed by the main MPU. 10 is a flowchart showing a BB control process executed by the main MPU. 10 is a flowchart showing a freeze setting process executed by a main MPU; 10 is a flowchart showing an external output setting process executed by the main MPU. 13 is a flowchart showing the lottery process for winning roles executed by the main MPU in the tenth embodiment. 10 is a flowchart showing the processing executed by the main MPU at the start of a game. FIG. 23 is a front view of a slot machine and a card unit according to an eleventh embodiment. 1 is a perspective view of the slot machine and card unit with the front door of the slot machine open. FIG. FIG. 2 is an electrical configuration diagram of the slot machine. (a) An explanatory diagram for explaining the message that the value number side MPU sends to the card unit and the message that the value number side MPU receives from the card unit; (b) An explanatory diagram for explaining the information set in the data section of the gaming machine information notification; (c) An explanatory diagram for explaining gaming machine performance information, gaming machine installation information, and hall control/fraud monitoring information. 10A to 10D are time charts showing how messages are sent and received between the value side MPU and the card unit. (a) to (c) are time charts showing how three types of gaming machine information notifications are set in the value number side transmission buffer. 10 is a flowchart showing normal processing executed by a main MPU. 10 is a flowchart showing a timer interrupt process executed by the main MPU. 10A is an explanatory diagram for explaining the configuration of the value number side RAM, and FIG. 10B is a flowchart showing the value number side main processing executed by the value number side MPU. 10 is a flowchart showing a value number side timer interrupt process executed by the value number side MPU. (a) An explanatory diagram for explaining the configuration of a work area for in-area processing, (b) an explanatory diagram for explaining the configuration of a current external signal area, and (c) an explanatory diagram for explaining the configuration of a reserved external signal area. 10 is a flowchart showing an external output process executed by the main MPU. 10A to 10G are time charts showing how the state of the game start signal output from the main MPU to the value number MPU changes. (a) to (g) are time charts showing how the state of the base AT signal output from the main side MPU to the value side MPU changes. (a) An explanatory diagram for explaining errors recognized by the main MPU and error information corresponding to the errors; (b) An explanatory diagram for explaining an error display corresponding to "limit of granted power reached"; (c) An explanatory diagram for explaining an error display corresponding to "unit connection abnormality"; and (d) An explanatory diagram for explaining an initial screen display. 10 is a flowchart showing a start waiting process executed by the main MPU. 10 is a flowchart showing an error information update process executed by the main MPU. 10A is an explanatory diagram for explaining the data structure of an error command, and FIG. 10B is a flowchart showing an error information transmission process executed by a main MPU. (a) An explanatory diagram for explaining the configuration of the production-side RAM, and (b) a flowchart showing the error response processing executed by the production-side MPU. 10 is a flowchart showing the main processing of the production side executed by the production side MPU. 10A to 10I are time charts showing how an error message corresponding to "upper limit reached" is displayed. (a) An explanatory diagram for explaining the configuration of the work area for in-area processing in the 12th embodiment, (b) an explanatory diagram for explaining the configuration of the current external signal area, and (c) an explanatory diagram for explaining the configuration of the reserved external signal area. 10 is a flowchart showing a base AT process executed by the main MPU. 10 is a flowchart showing a second zone transition process executed by the main MPU; 10 is a flowchart showing a normal process executed by the main MPU. 10 is a flowchart showing an external output process executed by the main MPU. (a) to (g) are time charts showing how the state of the AT initial hit signal changes. (a) An explanatory diagram for explaining the configuration of the work area for in-area processing in the 13th embodiment, (b) an explanatory diagram for explaining the configuration of the current external signal area, and (c) an explanatory diagram for explaining the configuration of the reserved external signal area. 10 is a flowchart showing normal processing executed by a main MPU. 10 is a flowchart showing an external output process executed by the main MPU. 10A to 10I are time charts showing how the state of signals changes during a game. FIG. 20A is an explanatory diagram for explaining the configuration of a work area for in-area processing in the fourteenth embodiment, and FIG. 20B is a flowchart showing reel stop processing executed by the main MPU. 10 is a flowchart showing the response process executed by the main MPU when a game ends. 10 is a flowchart showing the processing executed by the main MPU at the start of a game. 10 is a flowchart showing a normal process executed by the main MPU. (a) An explanatory diagram for explaining the effects executed on the image display device in normal game mode, (b) An explanatory diagram for explaining the color navigation effects executed on the image display device, (c) An explanatory diagram for explaining the state in which monochrome display is being performed on the image display device, and (d) An explanatory diagram for explaining the configuration of the effect-side RAM. 10 is a flowchart showing the performance control processing executed by the performance side MPU. 10A to 10H are time charts showing how monochrome display is performed on an image display device. A flowchart showing the performance control processing executed by the performance side MPU in the 15th embodiment. 10A to 10I are time charts showing how monochrome display is performed on an image display device. A flowchart showing the processing at the start of a game executed by the main MPU in the 16th embodiment. 10 is a flowchart showing the response process executed by the main MPU when a game ends. 10 is a flowchart showing a base AT compatible process executed by a main MPU. 10 is a flowchart showing a normal response process executed by a main MPU. (a) An explanatory diagram explaining how the number of continuing games is displayed on the image display device, (b) An explanatory diagram explaining the configuration of the presentation side RAM, and (c) An explanatory diagram explaining how the CZ expectation presentation is performed on the image display device. 10 is a flowchart showing the performance control processing executed by the performance side MPU. 10 is a flowchart showing the game number display process executed by the production side MPU. This is a flowchart showing the CZ expectation performance processing executed by the performance side MPU. (a) to (j) are time charts showing how the value of the display game number counter is updated. 10A to 10I are time charts showing how the image of the number of games executed is displayed on the image display device. (a) An explanatory diagram for explaining the configuration of the presentation side RAM in the 17th embodiment, and (b) a flowchart showing the game number display process executed by the presentation side MPU. FIG. 22 is an oblique view of a pachinko machine and a management unit according to the eighteenth embodiment. FIG. 1 is an exploded perspective view showing the main components of a pachinko machine. FIG. 2 is a front view showing the configuration of the game board. FIG. 2 is a block diagram showing the electrical configuration of the pachinko machine. An explanatory diagram for explaining the detailed configuration of the main control device and the dispensing control device. FIG. 2 is an explanatory diagram for explaining the configuration of a main CPU. 1A is an explanatory diagram for explaining a memory area used by the main MPU, and FIGS. 1B and 1C are explanatory diagrams for explaining the initial values of registers for address specification. FIG. 2 is an explanatory diagram for explaining the contents of various counters and various storage areas. 10 is a flowchart showing main processing in a main MPU. FIG. 10 is an explanatory diagram for explaining the configuration for discharging game balls that have flowed down the game area. 1A is an explanatory diagram for explaining the configuration of a main ROM, and FIG. 1B is a flowchart showing a register setting process in a main MPU. 10 is a flowchart showing an initial setting process for non-specific control in the main MPU. 10 is a flowchart showing a random number initial value update process in the main MPU. (a) An explanatory diagram for explaining the configuration of the main MPU used to start timer interrupt processing; (b) An explanatory diagram for explaining the start address table of the interrupt processing; (c) An explanatory diagram for explaining the data configuration of the start address pointer; and (d) A flowchart showing the interrupt start processing in the main MPU. 10 is a flowchart showing a timer interrupt process in the main MPU. 10 is a flowchart showing the normal power control process in the main MPU. 10 is a flowchart showing the special chart special power control processing in the main MPU. 10 is a flowchart showing a power outage monitoring process in the main MPU. 10 is an explanatory diagram for explaining various storage areas provided in a work area for specific control and various storage areas provided in a work area for non-specific control. FIG. This is a flowchart showing the ball entry detection process executed by the main MPU. This is a flowchart showing the 10 prize ball corresponding processing executed by the main MPU. 10 is a flowchart showing a fraud detection process in the main MPU. 10 is a flowchart showing an external output setting process executed by the main MPU; 10 is a flowchart showing a magnetic monitoring process executed by a main MPU. 10 is a flowchart showing a second management process executed by the main MPU. 10 is a flowchart showing the management process of the total acquisition number in the main MPU. 10 is a flowchart showing a base value calculation setting process in a main MPU. (a) An explanatory diagram for explaining the power monitored by the power outage monitoring board and the voltage monitoring circuit, (b) An explanatory diagram for explaining various voltages, (c) An explanatory diagram for explaining the conditions for starting the power outage signal, the first reset signal, and the second reset signal, and (d) An explanatory diagram for explaining the conditions for falling the power outage signal, the first reset signal, and the second reset signal. (a) is a functional block diagram for explaining the configuration for controlling the power outage signal and the first reset signal in the power outage monitoring board, and (b) is a functional block diagram for explaining the configuration for resetting the main MPU. (a) An explanatory diagram for explaining the relationship between the first reset signal and the second reset signal input to the reset circuit and the state of the main MPU, and (b) a flowchart showing the main reset release processing in the main MPU. (a) to (e) are time charts showing how the main CPU is reset after the supply of operating power to the pachinko machine has begun. 10A to 10G are time charts showing how the main MPU is reset when the reset signal input to the reset circuit goes to a LOW level. An explanatory diagram for explaining the electrical configuration of the dispensing control board. (a) is an explanatory diagram for explaining the data that the dispensing side MPU receives from the main side MPU and management unit via asynchronous serial communication, and (b) is a flowchart showing the dispensing side main processing in the dispensing side MPU. A flowchart showing the payout side reset release process in the payout side MPU. (a) to (h) are time charts showing how the payout side MPU stops operating after the reset release condition of the payout side MPU is met, and how reception of gaming machine information sent from the main side MPU is avoided during the payout side release waiting period. 22 is a flowchart showing the main processing of the main MPU in the nineteenth embodiment. This is a flowchart showing the special chart change start processing in the main MPU. (a) An explanatory diagram for explaining the data structure of the low probability first win/loss table, and (b) an explanatory diagram for explaining the data structure of the first jackpot allocation table. This is a flowchart showing the process for determining whether the result is correct or incorrect, which is executed by the main MPU. 10 is a flowchart showing a process for determining distribution executed by a main MPU; FIG. 13A is an explanatory diagram for explaining the contents of resetting the main MPU in the twentieth embodiment, and FIG. 13B is an explanatory diagram for explaining the configuration of the main MPU. FIG. 10 is a functional block diagram showing a configuration for resetting the main MPU. 10 is a flowchart showing a main-side reset release process executed by the main-side MPU. FIG. 21 is a functional block diagram showing a configuration for controlling a first reset execution signal and a second reset execution signal output from a reset circuit in a twenty-first embodiment. 10A to 10F are time charts showing how the reset of the main MPU is released after the supply of operating power to the main MPU has started. FIG. 22 is a functional block diagram showing a configuration for controlling a first reset execution signal and a second reset execution signal output from a reset circuit according to a twenty-second embodiment. 10A to 10F are time charts showing how the reset of the main MPU is released after the supply of operating power to the main MPU has started. A flowchart showing the dispensing side reset release processing of the main side MPU in the 23rd embodiment.

First Embodiment
A first embodiment of the present invention applied to a slot machine 10, which is a type of gaming machine, will be described in detail below with reference to the drawings. Fig. 1 is a front view of the slot machine 10, Fig. 2 is a perspective view of the slot machine 10 with the front door 12 open, and Fig. 3 is a front view of the cabinet 11.

As shown in Figures 2 and 3, the slot machine 10 has a housing 11 that forms its outer shell. The housing 11 is formed by fixing multiple wooden panels together, giving it an overall box-like shape that is open to the front.

As shown in Figures 1 and 2, a front door 12 is attached to the front side of the housing 11. The front door 12 is supported by the housing 11 around a pivot 15 on the left side of the housing 11, allowing the interior space of the housing 11 to be opened and closed. The front door 12 is locked so that it cannot be opened by a locking device 13 on the back side of the front door 12, and this locked state can be released by unlocking the key cylinder 14 with a specified key.

As shown in Figure 1, a gaming panel 20 is provided near the upper center of the front door 12. The gaming panel 20 has three vertically elongated display windows 21L, 21M, and 21R arranged side by side. The display windows 21L, 21M, and 21R are made of a transparent or translucent material, and the interior of the slot machine 10 can be seen through each of the display windows 21L, 21M, and 21R.

As shown in Figures 2 and 3, the interior of the housing 11 is divided into two sections, upper and lower, by a partition plate 11a, and a reel unit 31 is attached to the top of the partition plate 11a. The reel unit 31 includes a cylindrical left reel 32L, a center reel 32M, and a right reel 32R. Each reel 32L, 32M, and 32R is rotatably supported so that its central axis coincides with the axis of rotation of the corresponding reel 32L, 32M, and 32R. The axes of rotation of each reel 32L, 32M, and 32R are arranged on the same axis extending approximately horizontally, and each reel 32L, 32M, and 32R corresponds one-to-one with each display window 21L, 21M, and 21R. Therefore, a portion of the surface of each reel 32L, 32M, and 32R is visible through the corresponding display window 21L, 21M, and 21R. Furthermore, when reels 32L, 32M, and 32R rotate forward, the surfaces of reels 32L, 32M, and 32R are displayed through display windows 21L, 21M, and 21R as if they are moving from top to bottom.

As shown in Figure 1, a start lever 41 is provided on the lower left side of the gaming panel 20, which is operated to start the rotation of each of the reels 32L, 32M, and 32R. When this start lever 41 is operated when a predetermined number or more of gaming media (or gaming value), which are either medals or virtual medals, have been bet, each of the reels 32L, 32M, and 32R begins to spin simultaneously.

Stop buttons 42, 43, and 44 are provided to the right of the start lever 41 and can be operated to individually stop each of the spinning reels 32L, 32M, and 32R. Each stop button 42, 43, and 44 is located directly below the display window 21L, 21M, and 21R corresponding to the reel 32L, 32M, and 32R to be stopped. Each stop button 42, 43, and 44 becomes capable of stopping the left reel 32L once a predetermined time has elapsed since the reel began spinning.

One game (play) is played from the time when the start lever 41 is operated to start the rotation of each reel 32L, 32M, 32R, until the time when the rotation of each reel 32L, 32M, 32R is stopped by the operation of each stop button 42, 43, 44, and the time when various processes such as the awarding of gaming media and management of the game status are completed.

A medal insertion slot 45 for inserting medals is provided below and to the right of the display windows 21L, 21M, and 21R. As shown in FIG. 2, medals inserted through the medal insertion slot 45 are guided by a selector 52 provided on the back of the front door 12 to a hopper device 53 if reception is permitted, or to a medal receiving tray 59 through a medal ejection slot 58 provided at the bottom front of the front door 12 if reception is prohibited (see FIG. 1). The hopper device 53 has the function of dispensing medals stored in a storage tank through the medal ejection slot 58 to the medal receiving tray 59 if a winning combination corresponding to the awarding of game media is achieved on the main line ML (described below). As shown in FIG. 1, a return button 46 is provided below the medal insertion slot 45, which is pressed when a medal inserted into the medal insertion slot 45 becomes stuck in the selector 52.

On the lower left side of the display windows 21L, 21M, and 21R, there are provided a first credit insertion button 47 for inserting the maximum number of credited virtual medals that can be bet at one time, and a second credit insertion button 48 for inserting two virtual medals at a time. In this slot machine 10, there are two situations in which the number of gaming media (medals or virtual medals) that can be bet (i.e., bet setting) at one time is "3" and "2".

When the first credit insertion button 47 is operated in a situation where the number of bets allowed at one time is "3," the current number of bets is "0," and three or more virtual medals are stored and stored, the number of bets will decrease by three virtual medals and become "3." When the first credit insertion button 47 is operated in a situation where the number of bets allowed at one time is "3," the current number of bets is "1," and two or more virtual medals are stored and stored, the number of bets will decrease by two virtual medals and become "3." When the first credit insertion button 47 is operated in a situation where the number of bets allowed at one time is "3," the current number of bets is "2," and one or more virtual medals are stored and stored, the number of bets will decrease by one virtual medal and become "3." When the first credit insertion button 47 is operated in a situation where the number of bets allowed at one time is "2," the current number of bets is "0," and two or more virtual medals are stored and stored, the number of bets will decrease by two virtual medals and become "2." When the number of bets that can be made at one time is "2", the current number of bets is "1", and one or more virtual medals are stored and stored, if the first credit insertion button 47 is operated, one virtual medal will be deducted and the number of bets will become "2".

If the first credit insertion button 47 is operated when the number of stored virtual medals is less than the difference between the number of available bets and the current number of bets, the number of bets will increase by the number of virtual medals, and the number of virtual medals will become 0.

When the second credit insert button 48 is operated in a situation where the number of bets that can be made at one time is "3," the current number of bets is "0," and two or more virtual medals are stored and stored, the number of bets will decrease by two virtual medals and become "2." When the second credit insert button 48 is operated in a situation where the number of bets that can be made at one time is "3," the current number of bets is "1," and one or more virtual medals are stored and stored, the number of bets will decrease by one virtual medal and become "2." When the second credit insert button 48 is operated in a situation where the number of bets that can be made at one time is "2," the current number of bets is "0," and two or more virtual medals are stored and stored, the number of bets will decrease by two virtual medals and become "2." When the second credit insert button 48 is operated in a situation where the number of bets that can be made at one time is "2," the current number of bets is "1," and one or more virtual medals are stored and stored, the number of bets will decrease by one virtual medal and become "2."

If the second credit insertion button 48 is operated when the number of stored virtual medals is one and the current number of bets is "0," the number of bets will become "1" and the number of virtual medals will become zero.

The first credit insertion button 47 has a larger pressing surface that is pressed when the player operates the button than the second credit insertion button 48. This improves the operability of the first credit insertion button 47.

A settlement button 51 is provided to the left of the start lever 41. This slot machine 10 has a credit function that stores and stores, as virtual medals, any surplus medals inserted up to a predetermined maximum value (50 medals) and medals paid out when a prize is won. When the settlement button 51 is operated while virtual medals are stored and stored, the virtual medals are paid out from the medal outlet 58 as real medals.

As shown in Figures 2 and 3, a power supply unit 54 is provided inside the cabinet 11 to the left of the hopper unit 53. The power supply unit 54 is provided with a power switch 55 that is operated when powering on or off, a reset button 56 for resetting various states of the slot machine 10, and a setting key insertion hole 57 into which a setting key held by the amusement hall manager is inserted and operated to change the setting value of the slot machine 10 within the range of "1" to "6."

Next, we will explain the symbols on each reel 32L, 32M, and 32R.

Figure 4 shows the arrangement of symbols on the left reel 32L, center reel 32M, and right reel 32R. As shown in the figure, 21 symbols are arranged in a row on each of the reels 32L, 32M, and 32R. Furthermore, numbers ranging from "0" to "20" are assigned to correspond to each of the reels 32L, 32M, and 32R. However, these numbers are used by the main control device 70 (described below) to identify the symbols visible through the display windows 21L, 21M, and 21R, and are not actually assigned to the reels 32L, 32M, and 32R. However, these numbers will be used in the following explanation.

There are seven types of symbols: "Bell" (e.g., position 20 on left reel 32L), "Replay" (e.g., position 19 on left reel 32L), "Watermelon" (e.g., position 18 on left reel 32L), "Red 7" (e.g., position 15 on left reel 32L), "BAR" (e.g., position 10 on left reel 32L), "Cherry" (e.g., position 9 on left reel 32L), and "White 7" (e.g., position 5 on left reel 32L). The number and arrangement order of each symbol differs on each reel 32L, 32M, and 32R.

Figure 5 is a front view of the display windows 21L, 21M, and 21R. Each display window 21L, 21M, and 21R is formed so that three of the 21 symbols on the corresponding reel 32L, 32M, and 32R are visible in their entirety. Therefore, when each reel 32L, 32M, and 32R is stopped, 3 x 3 = 9 symbols are visible through the display window 21L, 21M, and 21R.

In this slot machine 10, a single main line ML is set to connect the positions where the symbols on each reel 32L, 32M, and 32R are visible. The main line ML is a line connecting the middle symbols on the left reel 32L, the middle symbols on the middle reel 32M, and the middle symbols on the right reel 32R. When a predetermined number or more gaming media have been bet, the reels 32L, 32M, and 32R begin to spin, and if a winning combination is achieved on the main line ML, the player is awarded one of the following benefits: gaming media, a replay, or a change in gaming state.

In other words, in this slot machine 10, only one main line ML is set as a line on which a win can be achieved. This main line ML is set as a line that extends in a straight line. Therefore, even if a winning combination of symbols is achieved on a line that extends in a straight line, such as subline SL1 connecting the upper symbol on the left reel 32L, the middle symbol on the middle reel 32M, and the lower symbol on the right reel 32R; subline SL2 connecting the upper symbol on the left reel 32L, the upper symbol on the middle reel 32M, and the upper symbol on the right reel 32R; subline SL3 connecting the lower symbol on the left reel 32L, the lower symbol on the middle reel 32M, and the lower symbol on the right reel 32R; and subline SL4 connecting the lower symbol on the left reel 32L, the middle symbol on the middle reel 32M, and the upper symbol on the right reel 32R, no winning combination will be achieved.

The following explains the relationship between winning symbol combinations and the benefits awarded when a prize is awarded, with reference to Figure 6. Figure 6 is an explanatory diagram illustrating the relationship between winning symbol combinations and the benefits awarded when a prize is awarded.

The minor winning combinations that result in the awarding of gaming media include the 1st supplementary winning combination, the 2nd supplementary winning combination, the 3rd supplementary winning combination, the 4th supplementary winning combination, the 5th supplementary winning combination, the 6th supplementary winning combination, the 7th supplementary winning combination, the 8th supplementary winning combination, the 9th supplementary winning combination, the 1st bell winning combination, the 2nd bell winning combination, the 1st watermelon winning combination, the 2nd watermelon winning combination, and the cherry winning combination. Specifically, if the stopped symbol on the left reel 32L on the main line ML is a "bell" symbol, the stopped symbol on the middle reel 32M is a "bell" symbol, and the stopped symbol on the right reel 32R is a "red 7" symbol, then the 1st supplementary winning combination occurs. If the stopped symbol on the left reel 32L on the main line ML is a "bell" symbol, the stopped symbol on the center reel 32M is a "red 7" symbol, and the stopped symbol on the right reel 32R is a "bell" symbol, a second supplementary win will be awarded. If the stopped symbol on the left reel 32L on the main line ML is a "red 7" symbol, the stopped symbol on the center reel 32M is a "bell" symbol, and the stopped symbol on the right reel 32R is a "bell" symbol, a third supplementary win will be awarded. If the stopped symbol on the left reel 32L on the main line ML is a "bell" symbol, the stopped symbol on the center reel 32M is a "bell" symbol, and the stopped symbol on the right reel 32R is a "BAR" symbol, a fourth supplementary win will be awarded. If the stopped symbol on the left reel 32L on the main line ML is a "bell" symbol, the stopped symbol on the middle reel 32M is a "bell" symbol, and the stopped symbol on the right reel 32R is a "bell" symbol, a fifth supplementary win will be awarded. If the stopped symbol on the left reel 32L on the main line ML is a "BAR" symbol, the stopped symbol on the middle reel 32M is a "bell" symbol, and the stopped symbol on the right reel 32R is a "bell" symbol, a sixth supplementary win will be awarded. If the stopped symbol on the left reel 32L on the main line ML is a "bell" symbol, the stopped symbol on the middle reel 32M is a "bell" symbol, and the stopped symbol on the right reel 32R is a "white 7" symbol, a seventh supplementary win will be awarded. If the stopped symbol on the left reel 32L on the main line ML is a "bell" symbol, the stopped symbol on the middle reel 32M is a "white 7" symbol, and the stopped symbol on the right reel 32R is a "bell" symbol, then an 8th supplementary win will occur. If the stopped symbol on the left reel 32L on the main line ML is a "white 7" symbol, the stopped symbol on the middle reel 32M is a "bell" symbol, and the stopped symbol on the right reel 32R is a "bell" symbol, then a 9th supplementary win will occur. If any of the 1st to 9th supplementary wins occur, the number of gaming media to be awarded will be "1".

If the stopped symbol on the left reel 32L on the main line ML is a "bell" symbol, the stopped symbol on the middle reel 32M is a "bell" symbol, and the stopped symbol on the right reel 32R is a "bell" symbol, a first bell win will occur. If the stopped symbol on the left reel 32L on the main line ML is a "bell" symbol, the stopped symbol on the middle reel 32M is a "bell" symbol, and the stopped symbol on the right reel 32R is a "replay" symbol, a second bell win will occur. If either the first bell win or the second bell win occurs, the number of gaming media to be awarded will be "15".

If the stopped symbol on the left reel 32L on the main line ML is a "watermelon" symbol, the stopped symbol on the middle reel 32M is a "watermelon" symbol, and the stopped symbol on the right reel 32R is a "watermelon" symbol, a first watermelon win will be awarded. If the stopped symbol on the left reel 32L on the main line ML is a "watermelon" symbol, the stopped symbol on the middle reel 32M is a "watermelon" symbol, and the stopped symbol on the right reel 32R is a "BAR" symbol, a second watermelon win will be awarded. If either the first watermelon win or the second watermelon win is awarded, the number of game media to be awarded will be "5". If the stopped symbol on the left reel 32L on the main line ML is a "cherry" symbol, a cherry win will be awarded regardless of the stopped symbol on the middle reel 32M or the right reel 32R. If a cherry wins, the number of gaming media awarded will be "4".

Winnings that grant a replay bonus, which allows you to play the next game without betting gaming media, include the Regular Replay Win, the First Chance Replay Win, and the Second Chance Replay Win. In detail, if the stopped symbol on the left reel 32L on the main line ML is a "Replay" symbol, the stopped symbol on the center reel 32M is a "Replay" symbol, and the stopped symbol on the right reel 32R is a "Replay" symbol, then if the stopped symbol on the left reel 32L on the main line ML is a "Red 7" symbol, the stopped symbol on the center reel 32M is a "Red 7" symbol, and the stopped symbol on the right reel 32R is a "BAR" symbol, then if the stopped symbol on the left reel 32L on the main line ML is a "Replay" symbol, and the stopped symbol on the center reel 32M is a "BAR" symbol, then If the stopping pattern is a "red 7" and the stopping pattern on the right reel 32R is a "replay" pattern, if the stopping pattern on the left reel 32L on the main line ML is a "replay" pattern, the stopping pattern on the center reel 32M is a "red 7" pattern, and the stopping pattern on the right reel 32R is a "bar" pattern, or if the stopping pattern on the left reel 32L on the main line ML is a "watermelon" pattern, the stopping pattern on the center reel 32M is a "red 7" pattern, and the stopping pattern on the right reel 32R is a "bell" pattern, a regular replay win will be awarded.If the stopping pattern on the left reel 32L on the main line ML is a "replay" pattern, the stopping pattern on the center reel 32M is a "cherry" pattern, and the stopping pattern on the right reel 32R is a "bell" pattern, a first chance replay win will be awarded. If the stopped symbol on the left reel 32L on the main line ML is a "watermelon" symbol, the stopped symbol on the middle reel 32M is a "bell" symbol, and the stopped symbol on the right reel 32R is a "replay" symbol, a second chance replay win will occur.

If any of the above replay wins are achieved, a replay bonus will be awarded, which allows you to play the next game without having to bet any gaming media. Specifically, if any of the replay wins are achieved in a game where you bet on gaming media "3," you will be able to start the next game with gaming media "3" betted, without having to bet any gaming media. Also, if any of the replay wins are achieved in a game where you bet on gaming media "2," you will be able to start the next game with gaming media "2" betted, without having to bet any gaming media.

State transition wins that only result in a transition in the game state include the first CB win and the second CB win. Specifically, a first CB win occurs when the stopped symbols on the left reel 32L, the center reel 32M, and the right reel 32R on the main line ML are a "red 7" symbol, a "red 7" symbol, and a "white 7" symbol, respectively. A second CB win occurs when the stopped symbols on the left reel 32L, the center reel 32M, and the right reel 32R on the main line ML are a "white 7" symbol, a "white 7" symbol, and a "red 7" symbol, respectively. When a first CB win occurs, the game state transitions to the first CB state ST2, and when a second CB win occurs, the game state transitions to the second CB state ST3 (see Figure 20).

The first CB state ST2 and the second CB state ST3 are game states in which, when a combination of symbols corresponding to a small win stops on the main line ML, a win is achieved and medals are paid out regardless of whether a winning combination is achieved. For example, even if the win flag corresponding to the first bell win is not set to "1," gaming media will be awarded to the player when a combination of symbols corresponding to the first bell win stops on the main line ML. On the other hand, a replay win is achieved only if the corresponding combination has been won in a lottery.

In the first CB state ST2 and the second CB state ST3, reel control is different from that in the non-CB state. In the non-CB state, reel control is performed for each reel 32L, 32M, and 32R, allowing the reels to slide up to four symbols after the stop buttons 42-44 are operated. In other words, in the non-CB state, reel control is performed for each reel 32L, 32M, and 32R, stopping the reels within a specified time (190 milliseconds) after the stop buttons 42-44 are operated. On the other hand, in the first CB state ST2 and the second CB state ST3, the above-mentioned reel control is performed for the center reel 32M and the right reel 32R, i.e., reel control similar to that in the base game, but the above-mentioned reel control is not performed for the left reel 32L. For the left reel 32L, reel control is performed, allowing the reel to slide up to one symbol after the left stop button 42 is operated. In other words, in the first CB state ST2 and the second CB state ST3, reel control is performed on the left reel 32L to stop it within a predetermined time (75 msec) that is shorter than the specified time after the left stop button 42 is operated.

Note that in the first CB state ST2 and the second CB state ST3, the reel control that allows a maximum of one symbol to slide is not limited to the left reel 32L. The reel corresponding to the first operated stop button may be controlled to slide a maximum of one symbol, or a predetermined reel may be controlled to slide a maximum of one symbol only. Furthermore, the reel corresponding to the second or last operated stop button may be controlled to slide a maximum of one symbol, so that the reel corresponding to the stop buttons operated in a certain order may be controlled to slide a maximum of one symbol only.

In the first CB state ST2 and the second CB state ST3, if a combination corresponding to a replay win is won, the replay win takes priority, and if a replay win is not possible, a first bell win may occur. Also, a first bell win may occur even if a combination corresponding to a replay win is not won.

Both the first CB state ST2 and the second CB state ST3 are game states that do not increase the number of game media owned by the player. Furthermore, both the first CB state ST2 and the second CB state ST3 are game states that result in the number of game media owned by the player at the end of the game state being less than the number of game media owned by the player at the start of the game state.

Next, we will explain the devices used to perform various notifications and effects.

As shown in FIG. 1, an upper lamp 61 and a speaker 62 are provided at the top of the front door 12, as well as an image display device 63. If an abnormality occurs in the slot machine 10, the upper lamp 61 is controlled to emit light in a manner corresponding to the abnormality, and is also controlled to emit light in a manner corresponding to the winning result. The upper lamp 61 is also controlled to emit light so that a light effect corresponding to the display effect on the image display device 63 is produced. The speakers 62 are provided as a pair on the left and right, and are controlled to output sound or audio corresponding to the abnormality if an abnormality occurs in the slot machine 10, and are also controlled to output sound or audio corresponding to the winning result. The speakers 62 are also controlled to output sound so that a sound effect corresponding to the display effect on the image display device 63 is produced.

The image display device 63 has a display surface and is configured as a liquid crystal display device with a liquid crystal display, but is not limited to a liquid crystal display device and may be another display device with a display surface such as a plasma display device, an organic EL display device, or a CRT, or may be a dot matrix display. If an abnormality occurs in the slot machine 10, the display is controlled so that an image corresponding to the abnormality is displayed on the display surface. The image display device 63 is also controlled so that images corresponding to the winning combination results in the internal lottery and the winning results in each game are displayed on the display surface. In other words, the image display device 63 executes display effects.

The gaming panel 20 on the front door 12 is provided, below the display windows 21L, 21M, and 21R, with a credit display unit 65 that displays the number of stored virtual medals; a dual-purpose display unit 66 that displays the number of gaming media awarded when a small win is achieved, and also displays information corresponding to the stop order of reels 32L, 32M, and 32R when notified by the image display device 63, and also displays information about the gaming history management results; and a zone display unit 67 that displays information indicating that the gaming zone is the second zone. The credit display unit 65 is made up of a 7-segment display, and each segment uses a single-color LED, such as green.

Figure 7(a) is a front view of the common display area 68, which is provided with a combined display unit 66 and a section display unit 67. The common display area 68 contains the combined display unit 66, which consists of two 7-segment displays 66a, 66b arranged side by side in the horizontal direction, and the section display unit 67, which consists of one light-emitting element, as shown in Figure 7(a).

When any of the small prize winnings (1st to 9th supplementary prize winnings, 1st bell prize winning, 2nd bell prize winning, 1st watermelon prize winning, 2nd watermelon prize winning, or cherry prize winning) corresponding to the awarding of game media is achieved, the number of game media awarded corresponding to that small prize winning is displayed on the dual-purpose display unit 66 at the end of the game in which that small prize winning was achieved. Specifically, when any of the 1st to 9th supplementary prize winnings is achieved in non-CB mode, the left 7-segment display 66a becomes non-displayable and the right 7-segment display 66b displays "1," thereby indicating that "1" game media has been awarded. When either the 1st bell winning or the second bell winning is achieved in non-CB mode, the left 7-segment display 66a displays "1" and the right 7-segment display 66b displays "5," thereby indicating that "15" game media have been awarded. Furthermore, when either the first watermelon win or the second watermelon win is achieved in the non-CB state, the left 7-segment display 66a goes dark and the right 7-segment display 66b displays "5," thereby indicating that "5" gaming media have been awarded. Furthermore, when a cherry win is achieved in the non-CB state, the left 7-segment display 66a goes dark and the right 7-segment display 66b displays "4," thereby indicating that "4" gaming media have been awarded.

In the first CB state ST2 and the second CB state ST3, the number of gaming media awarded when a small win is achieved is "1". Therefore, when a small win is achieved in the first CB state ST2 or the second CB state ST3, the left 7-segment display 66a becomes invisible and the right 7-segment display 66b displays "1", indicating that "1" gaming media has been awarded.

On the other hand, even if a win that does not award gaming media, such as a replay win or a CB win, occurs, the display corresponding to that win will not be made on the dual-purpose display unit 66, and in this case the 7-segment displays 66a, 66b will remain hidden. The display of the number of gaming media awarded on the dual-purpose display unit 66 will end when gaming media are bet to start the next game after that display, and the 7-segment displays 66a, 66b will remain hidden at the time this bet is made.

When the stop order of reels 32L, 32M, and 32R is announced on the image display device 63, information corresponding to the announced stop order is displayed on the dual-purpose display unit 66. FIG. 7(b) is an explanatory diagram illustrating the content of the information corresponding to the stop order displayed on the dual-purpose display unit 66. As shown in FIG. 7(b), in this slot machine 10, the stop order of reels 32L, 32M, and 32R announced on the image display device 63 includes a stop order in which the first stop is on the left reel 32L, the second stop is on the center reel 32M, and the third stop is on the right reel 32R; a stop order in which the first stop is on the left reel 32L, the second stop is on the right reel 32R, and the third stop is on the center reel 32M; a stop order in which the first stop is on the center reel 32M, the second stop is on the left reel 32L, and the third stop is on the right reel 32R; There are stop orders in which the second stop is on the right reel 32R and the third stop is on the left reel 32L, stop orders in which the first stop is on the right reel 32R, the second stop is on the left reel 32L and the third stop is on the center reel 32M, stop orders in which the first stop is on the right reel 32R, the second stop is on the center reel 32M and the third stop is on the left reel 32L, stop orders in which the first stop is on the left reel 32L and the rest are optional, stop orders in which the first stop is on the center reel 32M and the rest are optional, and stop orders in which the first stop is on the right reel 32R and the rest are optional.

The notification of the stop order on the image display device 63 can be executed when, in the non-CB state, a winning combination is achieved during the winning combination lottery process, if the winning combination includes the first bell winning data and any of the first through sixth supplementary winning data, or if the winning combination includes the second bell winning data and any of the seventh through ninth supplementary winning data. Specifically, if a winning combination includes the first bell winning data and any of the first through sixth supplementary winning data is achieved, the first bell win is achieved if reels 32L, 32M, and 32R stop in the stop order corresponding to the current winning combination. If reels 32L, 32M, and 32R do not stop in the stop order corresponding to the current winning combination, one of the first through sixth supplementary winning combinations may be achieved. If the first bell win is achieved, the player is awarded 15 gaming media as explained above. If one of the first through sixth supplementary winning combinations is achieved, the player is awarded 1 gaming media as explained above.

If a winning combination includes the second bell winning data and any of the seventh to ninth supplementary winning data, the second bell win will occur if reels 32L, 32M, and 32R stop in the stopping order corresponding to the current winning combination. If reels 32L, 32M, and 32R do not stop in the stopping order corresponding to the current winning combination, any of the seventh to ninth supplementary winning combinations may occur. If the second bell win occurs, the player will be awarded 15 gaming media as already explained, and if any of the seventh to ninth supplementary winning combinations occurs, the player will be awarded 1 gaming media as already explained.

When one of the above stop orders is notified by the image display device 63, the left 7-segment display 66a of the dual-purpose display unit 66 remains in a non-display state, while the right 7-segment display 66b displays the stop order corresponding to that order. This display content is as shown in Figure 7(b), with the stop order display content of the dual-purpose display unit 66 set in a one-to-one correspondence with the stop order notification content of the image display device 63. However, this is not limited to this, and multiple types of display content of the dual-purpose display unit 66 may be set in correspondence with some or all of the stop order notification content of the image display device 63.

The display content of the stop order on the dual-purpose display unit 66 differs from the display content that is displayed when the dual-purpose display unit 66 displays a display corresponding to the awarding of gaming media. This makes it easier to distinguish whether the content displayed on the dual-purpose display unit 66 corresponds to the number of gaming media awarded or the stop order of reels 32L, 32M, and 32R.

Figures 8(a) and 8(b) are explanatory diagrams illustrating the relationship between the notification content of the stop order on the image display device 63 and the display content of the stop order on the dual-purpose display unit 66.

When the stop order of reels 32L, 32M, and 32R is announced on the image display device 63, as shown in Figure 8(a), the image display device 63 displays unit display images G1-G3 in the same number as the number of stop operations required to end the game, and each unit display image G1-G3 displays an image corresponding to the stop order of reels 32L, 32M, and 32R. Specifically, a left unit display image G1 corresponding to the left reel 32L, a middle unit display image G2 corresponding to the center reel 32M, and a right unit display image G3 corresponding to the right reel 32R are displayed. FIG. 8(a) shows the notification of the stop order when the first stop is on the center reel 32M, the second stop is on the left reel 32L, and the third stop is on the right reel 32R, so the left unit display image G1 displays an image of "2" corresponding to the stop order of the left reel 32L, the middle unit display image G2 displays an image of "1" corresponding to the stop order of the middle reel 32M, and the right unit display image G3 displays an image of "3" corresponding to the stop order of the right reel 32R.

As described above, the image display device 63 displays an image notifying the stop order of reels 32L, 32M, and 32R, whereas the combined display unit 66 displays an "L" corresponding to the stop order of reels 32L, 32M, and 32R, as shown in FIG. 8(b). In other words, the image display device 63 displays unit display images G1-G3 corresponding to the number of reels 32L, 32M, and 32R, and displays an image corresponding to the stop order of the corresponding reels 32L, 32M, and 32R in each unit display image G1-G3, whereas the combined display unit 66 displays an image unrelated to the number of reels 32L, 32M, and 32R. This allows the player to focus on the display content on the image display device 63, even if the combined display unit 66 displays a display corresponding to the notification of the stop order of reels 32L, 32M, and 32R.

The display range of the dual-purpose display unit 66 is narrower than that of the image display unit 63. This also makes it possible to reduce the player's attention to the dual-purpose display unit 66 compared to the image display unit 63. Furthermore, the dual-purpose display unit 66 is located on the opposite side of the display windows 21L, 21M, and 21R, which allow the reels 32L, 32M, and 32R to be viewed, from the image display unit 63. This means that the dual-purpose display unit 66 is positioned at a distance from the image display unit 63, which also makes it possible to reduce the player's attention to the dual-purpose display unit 66.

When the stop order of reels 32L, 32M, and 32R is announced, the display corresponding to the stop order of reels 32L, 32M, and 32R on the combined display unit 66 and the display corresponding to the stop order of reels 32L, 32M, and 32R on the image display unit 63 begin after the winning combination lottery process is completed and before the stop operation for reels 32L, 32M, and 32R is enabled. In this case, the display corresponding to the stop order of reels 32L, 32M, and 32R on the combined display unit 66 begins before the display corresponding to the stop order of reels 32L, 32M, and 32R on the image display unit 63. However, these displays may also begin simultaneously or approximately simultaneously, or the display start order may be reversed. Furthermore, the display corresponding to the stop order of reels 32L, 32M, and 32R on the combined display unit 66 and the image display unit 63 ends when a stop command is issued for all reels 32L, 32M, and 32R in the game for which the display was executed.

The dual-purpose display unit 66 is located in the center of the common display area 68, while the interval display unit 67 is located in a corner of the common display area 68. The interval display unit 67 is a display unit for notifying that the game interval is the second interval SC2 of the first interval SC1 and the second interval SC2 (see FIG. 20). The second interval SC2 is a period in which an advantageous game state (specifically, a base AT state ST4 and an ending AT state ST5) can be initiated and the advantageous game state can be continued, in which the expected number of game media to be acquired in one game (the value obtained by subtracting the number of game media bet in one game from the expected number of game media to be awarded in one game) can exceed zero by notifying the stopping order of the reels 32L, 32M, and 32R, which allows for the establishment of advantageous winnings for the player when different winning combinations are achieved depending on the stopping order of the reels 32L, 32M, and 32R. On the other hand, the first section SC1 is a section in which an advantageous gaming state does not start and does not continue.

The interval display unit 67 lights up when the expected value of gaming media acquisition exceeds "0" due to the notification of the stopping order of reels 32L, 32M, and 32R, which allows for a winning combination advantageous to the player when the winning combination results in different winning combinations depending on the stopping order of reels 32L, 32M, and 32R, or when the winning combination results in different winning combinations depending on the stopping order of reels 32L, 32M, and 32R, is in an advantageous gaming state. When the interval display unit 67 lights up, it remains lit until the second interval SC2 ends, and then turns off when the second interval SC2 ends and the first interval SC1 begins.

As described above, once the section display unit 67 is lit during the second section SC2, it remains lit until the end of the second section SC2. The dual-purpose display unit 66, which is integrated into the common display area 68, is lit when a gaming medium is awarded and turned off when the next game begins, and is lit when the stopping order of reels 32L, 32M, and 32R is displayed on the image display device 63 and turned off when the game ends. Therefore, in a configuration where the section display unit 67 is not too noticeable to players by being located within the common display area 68, it is possible to proactively create a situation where only the section display unit 67 is lit in the common display area 68 during the second section SC2, making it easier for the amusement hall manager to check the section display unit 67.

Instead of maintaining the lit state of the section display unit 67 during the second section SC2, the section display unit 67 may be configured to flash at a predetermined cycle during the second section SC2. Furthermore, other displays, such as a liquid crystal display device, may be used as the combined display unit 66 and the section display unit 67.

The slot machine 10 is equipped with various control devices. Specifically, as shown in FIG. 3, a main control device 70 is provided above the reel unit 31. The main control device 70 is attached to the back plate 11b, which forms the back surface of the cabinet 11. The main control device 70 is configured by housing a main control board 71 in a board box 81. An MPU 72 is mounted on one of the board surfaces, the device mounting surface, of the main control board 71. The board box 81 is transparent so that the MPU 72 housed therein can be visually observed from outside the board box 81. Note that while the board box 81 is colorless and transparent, it may also be colored and transparent as long as the MPU 72 housed therein can be visually observed from outside the board box 81. The main control device 70 is mounted on the back plate 11b of the cabinet 11 so that the opposing wall portion 82 of the board box 81, which faces the device mounting surface of the main control board 71, faces the front of the slot machine 10. Therefore, by opening the front door 12 toward the front of the slot machine 10 relative to the cabinet 11 and exposing the internal space of the cabinet 11, it becomes possible to visually observe the opposing wall 82 of the circuit board box 81, and also to visually observe the MPU 72 through the opposing wall 82.

The board box 81 is formed by combining multiple case bodies, one behind the other. These multiple case bodies are provided with connecting portions 83 that prevent separation of the case bodies and leave a mark when the case bodies are separated. Multiple connecting portions 83 are arranged side by side along one side of the roughly rectangular board box 81. This allows for separation of the case bodies, even if some connecting portions 83 are used to prevent separation and those connecting portions 83 are destroyed, allowing the case bodies to be separated. Furthermore, since the connecting portions 83 are destroyed when the case bodies are separated, leaving a mark, it is possible to visually check the connecting portions 83 to determine whether the case bodies have been separated fraudulently. Furthermore, a sealing sticker 84 is affixed to another side of the board box 81, other than the side along which the connecting portions 83 are arranged, spanning the boundary between the case bodies. When the sealing sticker 84 is peeled off, an adhesive layer remains on the case body. This makes it possible to leave a trace if the sealing seal 84 is peeled off when the case body is separated.

As shown in FIG. 2, the slot machine 10 is equipped with a performance control device 90 in addition to the main control device 70. The performance control device 90 is placed on the front door 12, stacked behind the image display device 63. The performance control device 90 controls the upper lamp 61, speaker 62, and image display device 63 based on commands received from the main control device 70. Note that, like the main control device 70, the performance control device 90 is configured with a control board housed in a board box.

Next, the electrical configuration of this slot machine 10 will be explained based on the block diagram in Figure 9.

As already explained, the main control board 71 of the main control device 70 is equipped with an MPU 72. The MPU 72 is equipped with a ROM 73 that stores various control programs and fixed value data executed by the MPU 72, a RAM 74 that is memory for temporarily storing various data when executing the control programs stored in the ROM 73, a random number circuit 75 that sequentially updates random numbers within a predetermined numerical range based on a clock signal output from a clock circuit, and a clock circuit that outputs a rectangular wave of a predetermined frequency. The MPU 72 also incorporates an interrupt circuit, a data input/output circuit, and the like. It is not essential that the ROM 73 and RAM 74 be integrated into a single chip for the MPU 72; they may each be integrated into separate chips.

The MPU 72 is provided with input and output ports. The input side of the MPU 72 is connected to various sensors, including the reel unit 31, a start detection sensor 41a that detects operation of the start lever 41, stop detection sensors 42a, 43a, and 44a that individually detect operation of each stop button 42, 43, and 44, an inserted medal detection sensor 45a that detects medals inserted through the medal insertion slot 45, credit insertion detection sensors 47a and 48a that individually detect operation of each credit insertion button 47 and 48, a settlement detection sensor 51a that detects operation of the settlement button 51, a payout detection sensor for the hopper device 53, a reset detection sensor that detects operation of the reset button 56 provided on the power supply device 54, and a setting key detection sensor that detects insertion of a setting key into the setting key insertion hole 57. Signals from each of these sensors are input to the MPU 72.

The output side of the MPU 72 is connected to the reel unit 31, the selector drive unit 52a provided on the selector 52, the payout motor of the hopper device 53, the dual-purpose display unit 66, the section display unit 67, the presentation control device 90, and other components. In each game, the MPU 72 controls the rotation and drive of each reel 32L, 32M, and 32R of the reel unit 31. The selector 52 has the function of detecting medals inserted through the medal insertion slot 45 with the inserted medal detection sensor 45a and then guiding them to the hopper device 53 if acceptance is permitted, or discharging them into the medal tray 59 without being detected by the inserted medal detection sensor 45a if acceptance is prohibited. The selector drive unit 52a has the function of switching the state of the selector 52 between an acceptance permitted state and an acceptance prohibited state, specifically by operating a path switching piece provided on the selector 52 between an acceptance permitted position and an acceptance prohibited position. The MPU 72 switches the state of the selector 52 between an acceptance permission state and an acceptance prohibition state by switching between the output state and stop state of the drive signal to the selector drive unit 52a.

The MPU 72 controls the drive of the hopper device 53 when a small win is achieved and medals are paid out. Furthermore, when game media are awarded, the MPU 72 controls the display of the dual-purpose display unit 66 so that the number of game media awarded is displayed. Furthermore, when the second section SC2 is reached and an alert trigger occurs, the MPU 72 controls the display of the section display unit 67 so that an alert is issued that the second section SC2 is being reached. Furthermore, the MPU 72 controls the display of the dual-purpose display unit 66 so that an indication corresponding to the game management results is displayed.

The MPU 72 sends commands to the effect control device 90 at each timing of each game, and when sending a command to the effect control device 90 to cause the image display device 63 to notify the stop order of reels 32L, 32M, and 32R, it controls the display of the combined display unit 66 so that a display corresponding to the content to be notified is displayed. In this case, direct display control of the image display device 63 is performed by the effect control device 90, while direct display control of the combined display unit 66 is performed by the MPU 72. In other words, direct display control is performed by the effect control device 90 for the image display device 63, which is subject to relatively complex display control, and direct display control is performed by the MPU 72 for the combined display unit 66, which is subject to relatively simple display control. This makes it possible to perform both displays that emphasize increasing attention to the effects and displays that emphasize reliability, while reducing the processing load on the MPU 72.

A power outage monitoring circuit (not shown) provided in the power supply 54 is connected to the input side of the MPU 72. The power supply 54 is equipped with a power supply unit and a power outage monitoring circuit that supply drive power to the main control unit 70 and other electronic devices in the slot machine 10. The power outage monitoring circuit monitors the voltage applied to the power supply unit from an external power source and outputs a power outage signal to the MPU 72 if the voltage drops below a reference voltage. The MPU 72 executes power outage processing upon receiving the power outage signal and enables the processing state before the power outage to be restored after power is restored. The power supply 54 also has a power outage power supply unit that supplies backup power to the RAM 74 as power during power outage when the supply of operating power from the external power source is cut off. As a result, even when the supply of operating power from the external power source is cut off, data is stored and maintained in the RAM 74 as long as the power outage power supply unit can supply backup power (for example, for one or two days).

The performance control device 90 is equipped with a performance control board 91 for controlling the execution of various notifications and performances. The performance control board 91 is equipped with an MPU 92. The MPU 92 contains a ROM 93 that stores various control programs and fixed value data executed by the MPU 92, and a RAM 94 that temporarily stores various data when the control programs stored in the ROM 93 are executed. It also contains a clock circuit that outputs a rectangular wave of a predetermined frequency, an interrupt circuit, a data input/output circuit, a random number generation circuit, and other circuits.

Note that it is not essential that the ROM 93 and RAM 94 be integrated into a single chip for the MPU 92; they may each be integrated into a separate chip. Furthermore, when the supply of operating power from the external power source is cut off, the RAM 94 is not supplied with backup power from the power interruption power supply unit of the power supply device 54.

The MPU 92 is provided with an input port and an output port. As already explained, the MPU 72 of the main control unit 70 is connected to the input side of the MPU 92, and various commands are received from the MPU 72. The upper lamp 61, speaker 62, and image display device 63 are connected to the output side of the MPU 92. Based on commands received from the MPU 72 of the main control unit 70, the MPU 92 controls the light emission of the upper lamp 61, the sound output of the speaker 62, and the display of the image display device 63, thereby enabling various notifications and performances to be performed.

The performance control board 91 is equipped with a video display processor (VDP), character ROM, video RAM, and other components, not shown, in addition to the MPU 92. The VDP is a type of drawing circuit that directly operates an image processing device that serves as an LCD display driver incorporated in the image display device 63. The VDP is involved in the reading and writing of data from the video RAM, and reads image data stored in the video RAM from the character ROM at predetermined times to display on the image display device 63. The character ROM serves as an image data library for storing character data such as designs to be displayed on the image display device 63. This character ROM stores bitmap image data of various display designs, a color palette table that is referenced when determining the color to be displayed for each dot in the bitmap image, and other data. The video RAM is memory for storing display data to be displayed on the image display device 63. When the MPU 92 determines the execution content of the performance based on commands received from the MPU 72 of the main control device 70, it outputs a drawing list to the VDP that specifies the image content corresponding to each update timing in accordance with the determined execution content of the performance. The VDP reads image data from the character ROM in accordance with the drawing list, and creates display data in the video RAM using the read image data. The VDP then outputs an image signal corresponding to the created display data to the image display device 63, causing the image display device 63 to display an image corresponding to the display data.

For the sake of convenience, in the following explanation, the MPU 72, ROM 73, and RAM 74 of the main control device 70 will be referred to as the main MPU 72, main ROM 73, and main RAM 74, respectively, and the MPU 92, ROM 93, and RAM 94 of the performance control device 90 will be referred to as the performance MPU 92, performance ROM 93, and performance RAM 94, respectively.

<Intra-area processing and extra-area processing>
Next, the execution of various controls by the main MPU 72 will be described.

The various control processes executed by the main MPU 72 using programs are divided into in-area processes and out-area processes. Specifically, processes for managing game history and processes related to monitoring whether the total number of game media acquired has reached a number corresponding to forced game termination are considered out-area processes. Processes other than the out-area processes, including control for progressing the game based on the player's game operations, are considered in-area processes. Specifically, the main process (Figure 13), which is executed when the supply of operating power to the main MPU 72 begins, includes all processes other than the first out-area initialization process and the second out-area initialization process described below as in-area processes, and the first out-area initialization process and the second out-area initialization process described below as out-area processes. Furthermore, the timer interrupt process (Figure 14), which is periodically initiated as an interrupt, includes all processes other than the management process described below as in-area processes, and the management process is considered out-area processes. Furthermore, the normal process (Figure 15), which is executed to control one game, includes all processes other than the end monitoring process described below as in-area processes, and the end monitoring process is considered out-area processes.

Figure 10 is an explanatory diagram illustrating how programs and data are set in the main ROM 73. In accordance with the fact that the processing executed by the main MPU 72 is divided into in-area processing and out-area processing, as shown in Figure 10, the addresses of the areas in the main ROM 73 where programs and data for in-area processing are stored are clearly distinguished from those where programs and data for out-area processing are stored.

Specifically, programs for in-region processing are collectively stored in the areas of consecutive addresses within the range of address X(1) to address X(k+2). Addresses X(k+3) to X(k+5), which are consecutive to address X(1) to address X(k+2), are unused addresses where no data is stored, and data for in-region processing are collectively stored in the areas of consecutive addresses within the range of address X(k+6) to address X(m+2). Addresses X(m+3) to X(m+5), which are consecutive to address X(k+6) to address X(m+2), are unused addresses where no data is stored, and programs for out-region processing are collectively stored in the areas of consecutive addresses within the range of address X(m+6) to address X(n+2). Additionally, addresses X(n+3) to X(n+5), which are consecutive to addresses X(m+6) to X(n+2), are unused area addresses where no data is stored, and data for out-of-area processing is collectively stored in the consecutive address areas within the range of addresses X(n+6) to X(p+2). Note that the relationship between the above programs and data and addresses is set both in physical addresses in the main ROM 73 and in logical addresses on the memory map recognized by the main MPU 72.

As described above, programs and data for in-region processing and programs and data for out-of-region processing are stored in areas with different address ranges, regardless of the execution order of the processes for executing the corresponding controls. Therefore, when checking only the programs and data for in-region processing, it is only necessary to check the area in the address range where these programs and data for in-region processing are stored, and when checking only the programs and data for out-of-region processing, it is only necessary to check the area in the address range where these programs and data for out-of-region processing are stored. This makes it possible to efficiently check programs and data separately for in-region and out-of-region processing. This also makes it possible to efficiently correct programs and data separately for in-region and out-of-region processing.

By setting an address range for an unused area where no data is stored between the address range of the area where the program and data for in-region processing are stored and the address range of the area where the program and data for out-of-region processing are stored, it becomes easier to grasp the boundary between the address range for in-region processing and the address range for out-of-region processing when checking.

In the address ranges for in-area processing and the address ranges for out-of-area processing, programs and data are stored in different address ranges regardless of the execution order of the processes that execute the corresponding controls, which makes it possible to efficiently check programs and data separately. Furthermore, by setting an address range for an unused area where no data is stored between the address range of the area where the program is stored and the address range of the area where the data is stored, it becomes easier to grasp the boundary between the address range of the program and the address range of the data when checking.

Figure 11 is an explanatory diagram illustrating the setting of each area in the main RAM 74. In accordance with the fact that the processing executed using programs in the main MPU 72 is distinguished between in-area processing and out-of-area processing, as shown in Figure 11, the address ranges of the work area 96 for in-area processing and the stack area 97 for in-area processing are clearly distinguished from the address ranges of the work area 98 for out-of-area processing and the stack area 99 for out-of-area processing in the main RAM 74.

Specifically, the area of each consecutive address within the range of address Y(1) to address Y(r+2) is set as a work area 96 for in-region processing. Furthermore, addresses Y(r+3) to Y(r+5), which are consecutive to addresses Y(1) to Y(r+2), are unused addresses, and the area of each consecutive address within the range of addresses Y(r+6) to Y(s+2) is set as a stack area 97 for in-region processing. Furthermore, addresses Y(s+3) to Y(s+5), which are consecutive to addresses Y(r+6) to Y(s+2), are unused addresses, and the area of each consecutive address within the range of addresses Y(s+6) to Y(t+2) is set as a work area 98 for out-of-region processing. Additionally, addresses Y(t+3) to Y(t+5), which are consecutive to addresses Y(s+6) to Y(t+2), are unused area addresses, and the areas of consecutive addresses within the range of addresses Y(t+6) to Y(u+2) are set as stack areas 99 for out-of-area processing. Note that the relationship between each area and address as described above is set both as a physical address in the main RAM 74 and as a logical address on the memory map recognized by the main MPU 72.

As described above, by separately setting the work area 96 for in-region processing and the work area 98 for out-region processing, different areas of the main RAM 74 are used when performing various calculations, etc., when the main MPU 72 performs in-region processing and when it performs out-region processing. This makes it less likely that information in the main RAM 74 required for one of the in-region processing and out-region processing will be erased when the other is performed. Incidentally, the main MPU 72 issues a load command when writing information to each work area 96, 98 and reading information from each work area 96, 98.

By separately setting up the stack area 97 for in-region processing and the stack area 99 for out-region processing, different areas of the main RAM 74 are used when saving information stored in the main MPU 72's registers and when storing program return address information, depending on whether the main MPU 72 is executing in-region processing or out-region processing. This makes it less likely that information used in the other process will be erased when saving information stored in the main MPU 72's registers or storing program return address information while one of the two processes is being executed. Incidentally, the main MPU 72 issues a push command when writing information to each stack area 97, 99, and a pop command when reading information from each stack area 97, 99. Furthermore, when reading information from each stack area 97, 99, the order in which information is written to the stack area 97, 99 is such that the most recent information is read first.

Here, when the main MPU 72 executes in-area processing, the main MPU 72 can write information to the work area 96 for in-area processing and the stack area 97 for in-area processing, and can read information from the work area 96 for in-area processing and the stack area 97 for in-area processing. On the other hand, when the main MPU 72 executes in-area processing, the main MPU 72 can read information from the work area 98 for out-area processing and the stack area 99 for out-area processing, but cannot write information to the work area 98 for out-area processing and the stack area 99 for out-area processing. This makes it possible to prevent information used in out-area processing from being accidentally erased while in-area processing is being executed.

Furthermore, when the main MPU 72 executes out-of-area processing, the main MPU 72 can write information to the work area 98 for out-of-area processing and the stack area 99 for out-of-area processing, and can read information from the work area 98 for out-of-area processing and the stack area 99 for out-of-area processing. On the other hand, when the main MPU 72 executes out-of-area processing, the main MPU 72 can read information from the work area 96 for in-area processing and the stack area 97 for in-area processing, but cannot write information to the work area 96 for in-area processing and the stack area 97 for in-area processing. This makes it possible to prevent information used in in-area processing from being accidentally erased when out-of-area processing is being executed.

Note that backup power will continue to be supplied to the main RAM 74 even after power to the slot machine 10 is shut off, and this backup power will be supplied to all of the work area 96 for intra-area processing, the stack area 97 for intra-area processing, the work area 98 for extra-area processing, and the stack area 99 for extra-area processing. As a result, the information stored in the work area 96 for intra-area processing, the stack area 97 for intra-area processing, the work area 98 for extra-area processing, and the stack area 99 for extra-area processing will be retained as long as backup power is being supplied, even after power to the slot machine 10 is shut off.

Figure 12 is an explanatory diagram illustrating the various storage areas provided in the work area 96 for in-region processing and the various storage areas provided in the work area 98 for out-of-region processing.

The work area 96 for processing within the area includes a bet number setting counter 96a, a credit counter 96b, a continued game count counter 96c, a total number of wins counter 96d, an AT difference number counter 96e, a standby counter 96f, a release game count counter 96g, a CZ state counter 96h, various flag areas 96i, a start status area 96j, and an end status area 96k. The bet number setting counter 96a is a counter that allows the main MPU 72 to determine the number of bets on the game to be executed. The credit counter 96b is a counter that allows the main MPU 72 to determine the number of virtual medals stored and stored. The continued game count counter 96c is a counter that allows the main MPU 72 to determine the number of games executed from the start of the second section SC2 when the second section SC2 is continued without the first section SC1 in between. The total acquisition counter 96d is a counter that allows the main MPU 72 to determine the total number of gaming media acquired from the start of the second section SC2 when the second section SC2 continues without the first section SC1 in between. The AT difference counter 96e is a counter that allows the main MPU 72 to determine the remaining number of gaming media awarded in the base AT state ST4.

The standby counter 96f is a counter used by the main MPU 72 to determine the number of games remaining until the base AT state ST4 or CZ state is initiated in the normal gaming state ST1. The release game number counter 96g is a counter used by the main MPU 72 to determine the maximum number of games required until the base AT state ST4 is initiated in the normal gaming state ST1. The CZ state counter 96h is a counter used by the main MPU 72 to determine the number of games remaining until the CZ state ends. The various flags area 96i is an area where multiple flags are provided to specify the gaming state in the main MPU 72. The start status area 96j is an area for storing the gaming state and gaming section of the current game at the start of the game. The end status area 96k is an area for storing the gaming state and gaming section of the next game at the end of the game.

The work area 98 for out-of-area processing is provided with a management counter group 98a, a termination determination counter 98b, and a termination flag 98c. The management counter group 98a is provided with multiple counters used by the main MPU 72 to manage game history. The termination determination counter 98b is a counter that allows the main MPU 72 to identify the trigger for forcibly terminating gameplay as gameplay continues. The termination flag 98c is a flag that allows the main MPU 72 to identify a situation in which gameplay is forcibly terminated and further gameplay is not possible.

<Main processing>
Next, the processing executed by the main MPU 72 will be described. First, the main processing executed by the main MPU 72 when the supply of operating power to the main MPU 72 is started will be described with reference to the flowchart in Fig. 13. Of the processing in steps S101 to S119 in the main processing, the processing other than the first initialization processing for outside the area that is called and executed in step S102 and the second initialization processing for outside the area that is called and executed in step S107 is executed as in-area processing using a program for in-area processing and data for in-area processing, and the first initialization processing for outside the area and the second initialization processing for outside the area are executed as out-of-area processing using a program for out-of-area processing and data for out-of-area processing.

The main processing first executes initialization processing upon power on (step S101). During initialization processing upon power on, interrupts due to timer interrupt processing are permitted, and various initial settings are made to registers and I/O devices within the main MPU 72.

Then, the first initialization process for the out-of-area area is executed using a CALLI instruction (step S102). The first initialization process for the out-of-area area is included in the out-of-area area processing. In other words, when the main processing changes from a situation in which in-area processing is being executed to a situation in which out-of-area processing is executed, the out-of-area area processing is called using a CALLI instruction. When the first initialization process for the out-of-area area is executed using a CALLI instruction, the flag register information of the main MPU 72 is first saved to the stack area 97 for in-area processing. The flag register includes a carry flag, zero flag, P/V flag, sign flag, and half carry flag, and the flag register information changes depending on the execution results of arithmetic instructions, rotate instructions, input/output instructions, and the like. By saving this flag register information before the program for the first initialization process for the out-of-area area processing, which is an out-of-area processing, is started, the flag register information in the state before it changes after the call of the first initialization process for the out-of-area area or the start of the first initialization process for the out-of-area area, can be saved to the stack area 97 for in-area processing. When the first initialization process for outside the region is executed by the CALLI instruction, the flag register information is saved to the stack area 97 for the internal process, and then the timer interrupt process (FIG. 14) is prohibited from interrupting and starting while the first initialization process for outside the region, which is the external process, is being executed. After the timer interrupt process (FIG. 14) is prohibited from interrupting, the program corresponding to the first initialization process for outside the region is started. The details of the first initialization process for outside the region will be explained later.

Next, the system determines whether the power is turned on with the setting key inserted into the setting key insertion hole 57 and turned on (Step S103). If the power is turned on with the setting key turned on (Step S103: YES), and if the reset button 56 was not pressed when the power was turned on (Step S104: NO), a partial area clear process is executed (Step S105). If the reset button 56 was pressed when the power was turned on (Step S104: YES), a full area clear process is executed (Step S106). The partial area clear process initializes a portion of the work area 96 for the area processing and initializes the entire stack area 97 for the area processing. Specifically, the areas to be initialized in the work area 96 for the area processing are cleared to "0" and initialized, except for the area in which the second CB winning data is stored, while the area in which the second CB winning data is stored is not initialized. Furthermore, in the partial clear process for within the region, the work area 98 for outside the region processing and the stack area 99 for outside the region processing are not initialized. In the full clear process for within the region, the entire work area 96 for inside the region processing is initialized, and the entire stack area 97 for inside the region processing is initialized. In the full clear process for within the region, the work area 98 for outside the region processing and the stack area 99 for outside the region processing are not initialized.

After executing the processing in step S105 or step S106, the second initialization processing for outside the area is executed by the CALLI instruction (step S107). The second initialization processing for outside the area is included in the outside area processing. In other words, when the main processing changes from a situation in which inside the area processing is being executed to a situation in which outside area processing is to be executed, the outside area processing is called by the CALLI instruction. The content of the CALLI instruction has already been explained. The content of the second initialization processing for outside the area will be explained later.

Then, the setting value update process is executed (step S108). In the setting value update process, the current setting value is read, provided that the setting key is inserted and turned ON, and the current setting value is displayed on the credit display unit 65. When the setting value update process is executed, either the partial clear process (step S105) or the full clear process (step S106) has been executed beforehand. Therefore, when the setting value update process starts, the credit display unit 65 displays a value corresponding to a setting value of "1." In the setting value update process, the setting value is updated by "1" each time the reset button 56 is operated, and the updated setting value is displayed on the credit display unit 65. Note that if the reset button 56 is operated when the setting value is "6," the setting value is updated to "1." If the setting key is released after the start lever 41 is operated, the setting value selected at that time becomes the setting value set in this setting value update process, and the setting value update process ends. In this case, the display of the setting value on the credit display unit 65 ends. Then, the process proceeds to normal processing (step S109). Normal processing will be explained in detail later.

If the setting key is not turned ON during the main processing (step S103: NO), the power restoration processing from step S110 onward is executed. The power restoration processing is a process for restoring the state of the slot machine 10 to the state before the power was shut off. In the power restoration processing, the main RAM 74 is checked to determine whether the setting value of the slot machine 10 is normal (step S110). Specifically, a setting value between "1" and "6" is determined to be normal, and a setting value equal to or greater than "0" or "7" is determined to be abnormal. If the setting value is normal, it is determined whether the power outage flag is set to "1" (step S111). The power outage flag is stored in the main RAM 74, and if the supply of operating power to the main MPU 72 is stopped and the predetermined power outage processing is executed normally, the power outage flag is set to "1". If the power outage flag is set to "1", it is checked whether the RAM determination value is normal (step S112). Specifically, the checksum value of the main RAM 74 is checked to determine whether the value is normal.

If all steps S110 to S112 return a positive judgment, this means that the power outage processing was executed normally during the previous power outage. In this case, the value of the stack pointer saved in the main RAM 74 is written to the stack pointer of the main MPU 72, and the data saved in the main RAM 74 is restored to the register of the main MPU 72, thereby restoring the state of the register of the main MPU 72 to the state it was in before the power was interrupted (step S113). In addition, the power outage flag in the main RAM 74 is cleared to "0" (step S114). After that, a power restoration command is sent to the production MPU 92 to acknowledge the execution of the power restoration processing (step S115), and the address before the power was interrupted is returned to (step S116).

On the other hand, if a negative judgment is made in any of steps S110 to S112, an operation prohibition process is executed. In the operation prohibition process, the execution of the next timer interrupt process (Figure 14) is prohibited (step S117), all output ports of the main MPU 72 are cleared to "0" to turn off all actuators connected to those output ports (step S118), and an error notification process is executed to notify the hall manager or other person that an error has occurred (step S119). This then becomes an infinite loop. The operation prohibition process is released by executing a partial clear process for the area (step S105) or a full clear process for the area (step S106).

<Timer interrupt processing>
Next, the timer interrupt processing executed by the main MPU 72 will be described with reference to the flowchart in Figure 14. The timer interrupt processing is initiated, for example, every 1.49 milliseconds. Of the processing steps S201 to S216 in the timer interrupt processing, all processing steps except for the management processing called and executed in step S215 are executed as in-area processing using an in-area processing program and in-area processing data, while the management processing is executed as out-of-area processing using an out-of-area processing program and in-area processing data.

In the register save process (step S201), the values of all registers in the main MPU 72 used in normal processing (described later) are saved to the work area 96 for in-area processing. In step S202, it is determined whether the power outage flag is set to "1." If the power outage flag is set to "1," processing proceeds to step S203, where power outage processing is executed. The power outage flag is set when a power outage signal is input to the main MPU 72 from the power outage monitoring circuit of the power supply unit 54. In the power outage processing, it is first determined whether command transmission has completed. If transmission has not completed, processing ends and the timer interrupt process is resumed, terminating command transmission. If command transmission has completed, the value of the stack pointer of the main MPU 72 is saved in the work area 96 for in-area processing. The output status of the output ports of the main MPU 72 is then cleared, and all actuators (not shown) are turned off. Then, when the power outage is resolved, a judgment value is calculated to determine whether the data in the main RAM 74 is normal or not, and saved in the work area 96 for in-area processing, and further RAM access is prohibited. After the above processing is performed, an infinite loop is entered in preparation for the possibility that the power will be completely cut off and processing will no longer be possible.

If the power outage flag is not set to "1" in step S202, various processes from step S204 onwards are carried out. In step S204, a watchdog timer clear process is carried out to initialize the value of the watchdog timer, which is used to monitor for malfunctions. In step S205, an interrupt end declaration process is carried out, which enables the main MPU 72 itself to set the next timer interrupt. In step S206, a stepping motor control process is carried out to drive the stepping motors provided on each of the reels 32L, 32M, and 32R in order to spin these reels 32L, 32M, and 32R.

In step S207, sensor monitoring processing is performed to read the status of various sensors connected to the input port and monitor whether the read results are normal. In step S208, timer subtraction processing is performed to subtract values from each counter and timer. In step S209, counter processing is performed to output the results of counting the number of medals bet and the number of medals paid out to the outside. In step S210, command output processing is performed to send various commands to the production-side MPU 92. In step S211, port output processing is performed to output data corresponding to the I/O device from the input/output port.

Then, it is determined whether the end flag 98c provided in the work area 98 for outside-area processing is set to "1" (step S212). If the end flag 98c is set to "1", processing is executed to cause a corresponding signal to be output externally from the slot machine 10 to the gaming hall's management computer (step S213). If a negative determination is made in step S212, or if the processing of step S213 is executed, in step S214, the values of each register saved in the work area 96 for inside-area processing in the previous step S201 are restored to the corresponding register in the main MPU 72.

In step S215, management processing is executed using the CALLI command. Management processing is included in the out-of-area processing. In other words, when the main processing changes from a situation where in-area processing is being executed to a situation where out-of-area processing is being executed, the out-of-area processing is called using the CALLI command. The content of the CALLI command has already been explained.

In the management processing, a load command is first used to set the stack pointer of the main MPU 72 to a fixed address at the start of the out-of-area processing. Then, a load command is used to save information from various registers of the main MPU 72 to the work area 98 for out-of-area processing. Then, the management execution processing is executed. In the management execution processing, the ratio of the total number of games in the second section SC2 to the total number of games is calculated, and the resulting ratio is displayed on the dual-purpose display unit 66. In this case, the calculation of the ratio of the total number of games in the second section SC2 to the total number of games may be performed for each set value. In this configuration, even if the set value is changed, the calculation may continue without initializing the ratio information performed for each set value. After the management execution processing is executed, a load command is used to set the stack pointer of the main MPU 72 to a fixed address at the time of returning to in-area processing after the management processing ends, and a load command is further used to restore the various information saved in the work area 98 for out-of-area processing to the corresponding registers of the main MPU 72.

In step S216, an interrupt permission process is performed to permit the next timer interrupt. Executing step S216 completes one execution of the timer interrupt process.

<Normal processing>
Next, the normal processing executed by the main MPU 72 will be described with reference to the flowchart in Fig. 15. Of the processes in steps S301 to S316 in the normal processing, the processes other than the end monitoring process called and executed in step S311 are executed as in-area processing using a program for in-area processing and data for in-area processing, and the end monitoring process is executed as out-of-area processing using a program for out-of-area processing and data for out-of-area processing.

First, an interrupt permission process is performed to allow the next timer interrupt (step S301). Then, a wait-for-start process is executed (step S302). During the wait-for-start process, if any replay wins were achieved in the previous game, a bet setting equal to the previous bet number is set in the bet number setting counter 96a provided in the main RAM 74. The bet number setting counter 96a is a counter used by the main MPU 72 to determine the number of bets for the game to be executed. If no replay wins were achieved in the previous game, the main MPU 72 sets the bet limit for the current game to "3" if the current game state is not in the second CB state ST3. If the current game state is in the second CB state ST3, the main MPU 72 sets the bet limit for the current game to "2." Provided the value of the bet number setting counter 96a is not the current bet limit, the main MPU 72 determines whether one or more virtual medals have been stored and a valid bet operation has been performed. The main RAM 74 is provided with a credit counter 96b as an area for storing the number of stored virtual medals. If a valid bet operation is performed when the value of the credit counter 96b is 1 or greater, the bet setting process is executed.

In the bet setting process, when the first credit insertion button 47 is operated, if the sum of the value of the bet number setting counter 96a and the value of the credit counter 96b is equal to or greater than the upper bet limit, the value of the bet number setting counter 96a is set to the upper bet limit and the value of the number of virtual medals used in the setting is subtracted from the credit counter 96b; if the sum of the value of the bet number setting counter 96a and the value of the credit counter 96b is less than the upper bet limit, the value of the credit counter 96b is added to the bet number setting counter 96a and then the value of the credit counter 96b is cleared to "0". Furthermore, in the bet number setting process, when the second credit insertion button 48 is operated, if the sum of the value of the bet number setting counter 96a and the value of the credit counter 96b is 2 or greater, the value of the bet number setting counter 96a is set to "2" and the value of the number of virtual medals used in the setting is subtracted from the credit counter 96b; if the sum of the value of the bet number setting counter 96a and the value of the credit counter 96b is less than 2, the value of the credit counter 96b is added to the bet number setting counter 96a and then the value of the credit counter 96b is cleared to "0."

During the start waiting process, if a medal is inserted into the medal insertion slot 45 and one medal is detected by the inserted medal detection sensor 45a, and the value of the bet number setting counter 96a in the main RAM 74 is less than the upper limit number of bets, the value of the bet number setting counter 96a is incremented by 1, and if the value of the bet number setting counter 96a is equal to or greater than the upper limit number of bets, the value of the credit counter 96b in the main RAM 74 is incremented by 1. If the value of the bet number setting counter 96a is equal to or greater than the upper limit number of bets and the value of the credit counter 96b is equal to or greater than the upper limit number of accumulated memories (specifically, "50"), an acceptance prohibition process is executed. When the acceptance prohibition process is executed, even if a medal is inserted into the medal insertion slot 45, the medal is ejected into the medal tray 59 without being detected by the inserted medal detection sensor 45a.

If the settlement button 51 is operated during the start wait process, the settlement process is executed. During the settlement process, if a replay win has not been achieved, the hopper device 53 is controlled and driven so that the number of medals corresponding to the sum of the value of the bet number setting counter 96a and the value of the credit counter 96b are discharged into the medal tray 59. In this case, the bet number setting counter 96a is cleared to "0" and the credit counter 96b is also cleared to "0". On the other hand, if a replay win has been achieved, the hopper device 53 is controlled and driven so that the number of medals corresponding to the value of the credit counter 96b are discharged into the medal tray 59. In this case, the credit counter 96b is cleared to "0".

After executing the start waiting process in step S302, it is determined whether the number of bets required to start the game has been set (step S303). If a negative determination is made in step S303, the process returns to step S302. If a positive determination is made in step S303, it is determined whether the start lever 41 has been operated (step S304). If the start lever 41 has not been operated, the process returns to step S302.

If the start lever 41 is operated (step S304: YES), the main line ML is activated and then the acceptance prohibition process is executed (step S305). By executing the acceptance prohibition process, even if a medal is inserted into the medal insertion slot 45, the medal will be ejected into the medal tray 59 without being detected by the inserted medal detection sensor 45a.

Then, in step S306, information that enables identification of the game state (normal game state ST1, first CB state ST2, second CB state ST3, base AT state ST4, ending AT state ST5, or CZ state) and game section (either first section SC1 or second section SC2) for the current game is stored in the start status area 96j in the work area 96 for in-area processing in the main RAM 74. In addition, in step S307, a role selection process is executed to select a role for the current game, and in step S308, a reel control process is executed to drive and control each of the reels 32L, 32M, and 32R in a manner corresponding to the result of the current role selection process.

Then, the medium dispensing process is executed (step S309). In the medium dispensing process, if a small win has been achieved in the current game, a process is executed to grant the player a number of gaming media corresponding to the small win. Specifically, when virtual medals are to be awarded, a value corresponding to the current small win is added to the credit counter 96b in the main RAM 74, and if the value of the credit counter 96b has reached the upper limit of the stored memory number, the hopper device 53 is driven and controlled so that the number of medals exceeding the upper limit of the stored memory number are paid out to the medal tray 59. Furthermore, in the medium dispensing process, the display of the dual-purpose display unit 66 is controlled so that a display corresponding to the number of gaming media to be awarded this time is displayed. The display corresponding to the number of gaming media on the dual-purpose display unit 66 continues until a new gaming media bet is made.

Then, a game end response process is executed to enable the setting of the game status and game zone corresponding to the result of this game (step S310). Furthermore, an end monitoring process is executed using a CALLI command (step S311). The end monitoring process is included in the out-of-area process. In other words, when the main process changes from a situation in which an in-area process is being executed to a situation in which an out-of-area process is being executed, the out-of-area process is called using a CALLI command. The contents of the CALLI command have already been explained. The contents of the end monitoring process will be explained later. Furthermore, an external output setting process is executed to output the status of the slot machine 10 to the gaming hall's management computer (step S312).

Then, a termination setting process is executed to determine whether or not to forcibly terminate the game, and to set up a forcible termination of the game if the conditions for forcibly terminating the game are met (step S313). The details of the termination setting process will be described later. Furthermore, information that enables identification of the game state (normal game state ST1, first CB state ST2, second CB state ST3, base AT state ST4, ending AT state ST5, or CZ state) and game zone (first zone SC1 or second zone SC2) at the end of the current game, i.e., in the next game, is stored in the termination status area 96k in the work area 96 for in-area processing in the main RAM 74. Furthermore, a process is executed to send a game termination command to the presentation-side MPU 92 to notify that one game has ended (step S315). Then, an acceptance permission process is executed (step S316). By executing the acceptance permission process, medals inserted through the medal insertion slot 45 are detected by the inserted medal detection sensor 45a and then collected by the hopper device 53.

<Role selection process>
Next, the lottery process for winning combinations executed in step S307 of the normal process (FIG. 15) will be described with reference to the flowchart in FIG. 16. Note that the processes in steps S401 to S411 in the lottery process for winning combinations are executed as intra-area processing using intra-area processing programs and intra-area processing data.

In step S401, a random number is obtained to be used when determining whether a winning combination has been achieved. In this slot machine 10, when the start lever 41 is operated, the random number at that time is latched from the random number circuit 75. The random number circuit 75 generates a random number between "0" and "65535." When the main MPU 72 confirms the operation of the start lever 41, it stores the value latched by the random number circuit 75 in a specified register of the main MPU 72. This configuration makes it possible to quickly obtain a random number when the start lever 41 is operated, thereby avoiding problems such as synchronization. The random number circuit 75 is configured to latch the value of the free-running counter each time the start lever 41 is operated.

After obtaining the random number, a lottery table for determining whether a winning combination will be achieved is read from the main ROM 73 (step S402). This slot machine 10 is pre-set with six setting values, from "1" to "6." By inserting a setting key into the setting key insertion hole 57, turning it ON, and performing a predetermined operation, the player can select the winning probability corresponding to the setting value for the winning combination lottery process. A setting value of "n+1" provides a more favorable winning probability for the player than "n." Specifically, since the winning probability of a given combination is higher for a setting value of "n+1" than for "n," a setting value of "n+1" is more favorable for the player than for "n." Furthermore, even with the same setting value, a bet of "3" gaming media is more favorable for the player than a bet of "2." Furthermore, there are two game states: a first CB state ST2 and a second CB state ST3. In step S402, a lottery table corresponding to the combination of the current setting value, the current number of bets, and the current game status is selected.

The lottery table in the non-CB state will be explained using the example where the setting value is "3". Figure 17 is an explanatory diagram for explaining the lottery table for three coins that is selected when the number of bets is "3", and Figure 18 is an explanatory diagram for explaining the lottery table for two coins that is selected when the number of bets is "2". Note that the following explanation will refer to the explanatory diagram in Figure 19 as appropriate.

As shown in Figures 17 and 18, index values IV are set in the winning combination table whether three coins or two coins are bet. Each index value IV is associated with winning data (i.e., a winning combination) that will result in a win, and a point value PV is set. The point value PV determines the winning probability of the corresponding index value IV in relation to the maximum value ("65535") of the random number circuit 75. Furthermore, the number of index values IV is the same when three coins are bet and when two coins are bet, and the type of winning data set for each index value IV is the same when three coins are bet and when two coins are bet, except for index value IV = 17.

Specifically, index values IV = 1-6 are set with the first bell winning data and one of the first through sixth supplementary winning data. When a win occurs with index value IV = 1, if the first stop (the reel on which the stop command was first issued) is the left reel 32L, the second stop (the reel on which the stop command was second issued) is the center reel 32M, and the third stop (the reel on which the stop command was last issued) is the right reel 32R, as shown in FIG. 19, the first bell winning is guaranteed regardless of the timing of operation of the stop buttons 42-44; otherwise, the first supplementary winning may be achieved. When a win occurs with index value IV = 2, if the first stop (the reel on which the stop command was first issued) is the left reel 32L, the second stop (the reel on which the stop command was second issued) is the center reel 32M, and the third stop (the reel on which the stop command was last issued) is the right reel 32R, the first bell winning is guaranteed regardless of the timing of operation of the stop buttons 42-44; otherwise, the fourth supplementary winning may be achieved. When the index value IV = 3 is a winning combination, if the first stop is the center reel 32M, the second stop is the left reel 32L, and the third stop is the right reel 32R, the first bell win is guaranteed regardless of the timing of operation of the stop buttons 42 to 44; otherwise, the third supplementary win may be achieved. When the index value IV = 4 is a winning combination, if the first stop is the center reel 32M, the second stop is the right reel 32R, and the third stop is the left reel 32L, the first bell win is guaranteed regardless of the timing of operation of the stop buttons 42 to 44; otherwise, the sixth supplementary win may be achieved. When the index value IV = 5 is a winning combination, if the first stop is the right reel 32R, the second stop is the left reel 32L, and the third stop is the center reel 32M, the first bell win is guaranteed regardless of the timing of operation of the stop buttons 42 to 44; otherwise, the second supplementary win may be achieved. When a win occurs with index value IV = 6, if the first stop is on the right reel 32R, the second stop is on the center reel 32M, and the third stop is on the left reel 32L, the first bell win will be achieved regardless of the operation timing of each stop button 42-44; in all other cases, the fifth supplementary win may be achieved.

As already explained, in the slot machine 10, when in the non-CB state, reel control is performed on each reel 32L, 32M, and 32R, allowing the reels to slide up to four symbols after the stop buttons 42-44 are operated. In other words, reel control is performed on each reel 32L, 32M, and 32R, causing the reels to stop within the specified time (190 milliseconds) after the stop buttons 42-44 are operated. This reel control makes it easier to achieve a winning combination corresponding to a winning role, while also preventing the achievement of a winning combination corresponding to a non-winning role. However, since the amount of rotation of the reels 32L, 32M, and 32R that can be slid is limited as described above, if there are five or more symbols among the constituent symbols that make up the combination of symbols to form a winning combination on one reel 32L, 32M, and 32R, it is possible that the constituent symbols will not stop on the main line ML depending on the timing of operation of the corresponding stop buttons 42 to 44 (this phenomenon is also known as a ``missed win''). The first bell win, second bell win, and various replay wins are win modes that will not result in missed wins depending on the timing of the stop buttons 42-44 stop operation relative to the rotational position of reels 32L, 32M, and 32R. The first through ninth supplementary wins, first watermelon win, second watermelon win, cherry win, first CB win, and second CB win are win modes that may result in missed wins depending on the timing of the stop buttons 42-44 stop operation relative to the rotational position of reels 32L, 32M, and 32R.

Index values IV = 7 to 9 are set with the second bell winning data and one of the seventh to ninth supplementary winning data. When a win occurs with index value IV = 7, as shown in FIG. 19, if the first stop is the left reel 32L, the second bell winning is guaranteed to occur regardless of the type of the second and third stop targets (reels 32L, 32M, 32R) or the operation timing of each stop button 42 to 44; otherwise, the seventh supplementary winning may occur. When a win occurs with index value IV = 8, if the first stop is the center reel 32M, the second bell winning is guaranteed to occur regardless of the type of the second and third stop targets (reels 32L, 32M, 32R) or the operation timing of each stop button 42 to 44; otherwise, the ninth supplementary winning may occur. If the index value IV = 9 and a win occurs, and the first stop is the right reel 32R, the second bell win will be achieved regardless of the type of the second and third stop targets (reels 32L, 32M, 32R) or the operation timing of each stop button 42-44; otherwise, the eighth supplementary win may be achieved.

As shown in Figures 17 and 18, first bell winning data is set for index value IV = 10. If a win occurs with index value IV = 10, as shown in Figure 19, the first bell win is guaranteed regardless of the stopping order of reels 32L, 32M, and 32R or the operation timing of each stop button 42-44.

As shown in Figures 17 and 18, only the first watermelon winning data is set for index value IV=11. If a win occurs with index value IV=11, the first watermelon winning can be achieved regardless of the stopping order of reels 32L, 32M, and 32R, as shown in Figure 19. However, depending on the operation timing of each stop button 42-44, there is a possibility that the first watermelon winning will not be achieved. As shown in Figures 17 and 18, only the second watermelon winning data is set for index value IV=12. If a win occurs with index value IV=12, the second watermelon winning can be achieved regardless of the stopping order of reels 32L, 32M, and 32R, as shown in Figure 19. However, depending on the operation timing of each stop button 42-44, there is a possibility that the second watermelon winning will not be achieved.

As shown in Figures 17 and 18, only cherry winning data is set for index value IV = 13. If a win occurs with index value IV = 13, a cherry winning can occur regardless of the stopping order of reels 32L, 32M, and 32R, as shown in Figure 19. However, depending on the timing of operation of the left stop button 42 relative to the spinning position of left reel 32L, a cherry winning may not occur.

As shown in Figures 17 and 18, only the first chance replay winning data is set for index value IV = 14. If a win occurs with index value IV = 14, as shown in Figure 19, the first chance replay winning is guaranteed to occur regardless of the stopping order of reels 32L, 32M, and 32R and the timing of operation of each stop button 42 to 44. Also, as shown in Figures 17 and 18, only the second chance replay winning data is set for index value IV = 15. If a win occurs with index value IV = 15, as shown in Figure 19, the second chance replay winning is guaranteed to occur regardless of the stopping order of reels 32L, 32M, and 32R and the timing of operation of each stop button 42 to 44. Also, as shown in Figures 17 and 18, only the normal replay winning data is set for index value IV = 16. If a win occurs with index value IV = 16, as shown in Figure 19, a normal replay win is guaranteed regardless of the stopping order of reels 32L, 32M, and 32R or the operation timing of each stop button 42-44.

For index value IV=17, only the first CB winning data is set as shown in FIG. 17 for the role selection table when three coins are bet, and only the second CB winning data is set as shown in FIG. 18 for the role selection table when two coins are bet. In other words, the first CB winning data is set as a winning role only when the number of gaming media bets is "3," and the first CB winning can only be achieved when the number of gaming media bets is "3." Furthermore, the second CB winning data is set as a winning role only when the number of gaming media bets is "2," and the second CB winning can only be achieved when the number of gaming media bets is "2." When the first CB winning data is set, if the number of gaming media bets is "3," the first CB winning can be achieved regardless of the stopping order of reels 32L, 32M, and 32R, as shown in FIG. 19. However, the first CB winning may not be achieved depending on the operation timing of each stop button 42-44. When the second CB winning data is set, if the number of gaming media bets is "2," as shown in Figure 19, the second CB win can be achieved regardless of the stopping order of reels 32L, 32M, and 32R. However, the second CB win may not be achieved depending on the operation timing of each stop button 42-44.

Here, winning data other than the first CB winning data and second CB winning data is erased in the game in which the winning occurred, regardless of whether the corresponding win is achieved, and is not carried over to games following the game in which the winning occurred. In contrast, the first CB winning data and second CB winning data are stored and retained in the game following the game in which the winning occurred until the corresponding win is achieved, except when the main RAM 74 is cleared (for first CB winning data, a partial clear process for within the area (step S105) or a full clear process for within the area (step S106) is performed; for second CB winning data, a full clear process for within the area (step S106)). In this case, in a game in which either the first CB winning data or the second CB winning data is carried over, the index values IV corresponding to the first CB winning data and the second CB winning data are excluded from the lottery.

In other words, if a game is played with the number of bets being "3," and the first CB winning data is set in the main RAM 74, but the first CB winning data is carried over because the first CB winning data is not achieved, the index value IV corresponding to the first CB winning data will be excluded from the lottery even if a game is subsequently played with the number of bets being "3," and the index value IV corresponding to the second CB winning data will be excluded from the lottery even if a game is subsequently played with the number of bets being "2." Also, if a game is played with the number of bets being "2," and the second CB winning data is set in the main RAM 74, and the second CB winning data is carried over because the second CB winning data is not achieved, the index value IV corresponding to the first CB winning data will be excluded from the lottery even if a game is subsequently played with the number of bets being "3," and the index value IV corresponding to the second CB winning data will be excluded from the lottery even if a game is subsequently played with the number of bets being "2." This makes it possible to prevent either the first CB winning data or the second CB winning data from being newly stored when either the first CB winning data or the second CB winning data has already been stored, and makes it possible to prevent multiple CB winning data from being accumulated and stored.

When the role selection table for betting three coins in FIG. 17 is selected, the probability of winning when index value IV = 1, the probability of winning when index value IV = 2, the probability of winning when index value IV = 3, the probability of winning when index value IV = 4, the probability of winning when index value IV = 5, and the probability of winning when index value IV = 6 are each approximately 1/21.8. The probability of winning when index value IV = 7, the probability of winning when index value IV = 8, and the probability of winning when index value IV = 9 are each approximately 1/21.8. The probability of winning when index value IV = 10 is approximately 1/9.4. The probability of winning when index value IV = 11 is approximately 1/164. The probability of winning when index value IV = 12 is approximately 1/146. The probability of winning when index value IV = 13 is approximately 1/423. Furthermore, the probability of winning when index value IV = 14 is approximately 1/328. Furthermore, the probability of winning when index value IV = 15 is approximately 1/164. Furthermore, the probability of winning when index value IV = 16 is approximately 1/7.3. Furthermore, the probability of winning when index value IV = 17 is approximately 1/3.3.

On the other hand, when the role selection table for two bets in Figure 18 is selected, the probability of winning for each of the index values IV = 1 to 16 is lower than when the role selection table for three bets is selected. Specifically, when the role selection table for two bets is selected, the probability of winning for each of the index values IV = 1 to 16 is less than two-thirds of the probability when the role selection table for three bets is selected. This makes it possible to increase the probability of a small role win, which involves the award of gaming media, and a replay win, which involves the award of a replay, in a game played when three gaming media are bet, compared to a game played when two gaming media are bet.

However, when the role selection table for two bets is selected, the probability of winning when the index value IV = 17 is approximately 1/2.2. In contrast, when the role selection table for three bets is selected as described above, the probability of winning when the index value IV = 17 is approximately 1/3.3. This makes it possible to increase the probability that second CB winning data is stored in the main RAM 74 in a game executed when two gaming media are bet, compared to the probability that first CB winning data is stored in the main RAM 74 in a game executed when three gaming media are bet.

In addition to the role selection table for betting three coins and the role selection table for betting two coins, the main ROM 73 also stores a CB selection table referenced in the role selection process (Figure 16) for the first CB state ST2 and the second CB state ST3. The CB selection table contains only one index value IV, and that index value IV is set to normal replay winning data. The probability of winning with that index value IV is 3/10. If the left stop button 42 is operated at the specified timing, a normal replay win is achieved regardless of the stopping order of the reels 32L, 32M, and 32R. If the left stop button 42 is not operated at the specified timing, a normal replay win is not achieved even if normal replay winning data is stored. On the other hand, if the index value IV is won but the left stop button 42 is not operated at the specified timing, or if the index value IV is not won, a first bell win may be achieved.

Here, the winning probability is the same for index values IV set to "1" through "6" for values other than index values IV = 12 and 15. This applies whether the number of gaming media bets is "3" or "2." In contrast, the winning probability for index values IV = 12 and 15 varies between the setting values of "1" through "6." Specifically, the winning probability for index value IV = 12 is lowest for a setting value of "1," with the winning probability increasing as the setting value increases and being highest for a setting value of "6." Furthermore, the winning probability for index value IV = 15 is lowest for a setting value of "1," with the winning probability increasing as the setting value increases and being highest for a setting value of "6." This makes it possible to create differences in the degree of advantage between the setting values of "1" through "6."

Returning to the explanation of the role lottery process (Figure 16), after selecting a lottery table in step S402, the index value IV is set to "1" (step S403), and then the judgment value DV used to determine whether the role is a win or a loss is set (step S404). In this judgment value setting process, the point value PV corresponding to the current index value IV is added to the current judgment value DV to set a new judgment value DV. Note that in the initial judgment value setting process, the value of the random number obtained in step S401 is set as the current judgment value DV, and the point value PV corresponding to the current index value IV (index value IV = 1) is added to this random number value to set the new judgment value DV.

Then, a determination is made as to whether the winning combination corresponding to the index value IV has been achieved (step S405). The winning combination is determined by determining whether the determination value DV has exceeded "65535". If it has exceeded "65535" (step S405: YES), a winning data acquisition process is executed to set the winning data corresponding to the index value IV at that time in the main RAM 74 (step S406).

If the judgment value DV does not exceed "65535" (step S405: NO), this means that the hand corresponding to the index value IV has not been achieved. In such a case, the index value IV is incremented by 1 (step S407), and then a determination is made as to whether or not there is a hand corresponding to the index value IV, i.e., whether or not there is a target for which a win/loss determination must be made (step S408). Specifically, a determination is made as to whether or not the index value IV incremented by 1 exceeds the maximum value of the index value IV set in the lottery table. If there is a target for which a win/loss determination must be made, the process returns to step S404, and the determination of the win/loss of the hand continues. At this time, in step S404, the point value PV corresponding to the current index value IV is added to the judgment value DV used to determine the win/loss of the previous hand (i.e., the current judgment value DV) to obtain a new judgment value DV, and in step S405, the win/loss of the hand is determined based on this judgment value DV.

When the processing of step S406 is executed, or when a negative judgment is made in step S408, this means that the winning/losing judgment of the winning combination has been completed. In this case, a first stop information setting process is executed to set stop information for reel stop control (step S409). Then, game start processing is executed (step S410). Details of the game start processing will be explained later, but various settings at the start of the game are made based on the results of the winning combination lottery process. Then, processing is executed to send rotation acceptance commands A and B to the production side MPU 92 to recognize that one game has started (step S411).

<Game status and game zone>
Here, the gaming states and gaming intervals will be explained. Figure 20 is an explanatory diagram for explaining the gaming states and gaming intervals that exist in the slot machine 10.

The slot machine 10 has four gaming states: a normal gaming state ST1, a first CB state ST2, a second CB state ST3, a base AT state ST4, and an ending AT state ST5. These gaming states ST1 to ST5 do not overlap with one another.

Normal gaming state ST1 is a gaming state in which the player remains when the partial clear process for the area (step S105) or the full clear process for the area (step S106) is executed. Furthermore, when the first CB state ST2 or second CB state ST3 that occurs in normal gaming state ST1 ends, or when the base AT state ST4 or ending AT state ST5 ends, the gaming state becomes normal gaming state ST1. In normal gaming state ST1, one game can be played regardless of whether the number of gaming media bets is "3" or "2."

In normal gaming state ST1, whether three coins or two coins are bet, the expected net increase in gaming media per game (the value obtained by subtracting the "number of gaming media bet in one game" from the "expected number of gaming media awarded in one game") is zero or less. Furthermore, normal gaming state ST1 exists in a non-internal state in which neither the first CB winning data nor the second CB winning data is stored in the main RAM 74, and an internal state in which either the first CB winning data or the second CB winning data is stored in the main RAM 74.

The first CB state ST2 is a gaming state to which the player enters when a first CB win occurs when the first CB winning data is stored in the main RAM 74. In the first CB state ST2, one game can be played when the number of gaming media bets is "3", but one game cannot be played when the number of gaming media bets is "2". Furthermore, the second CB state ST3 is a gaming state to which the player enters when a second CB win occurs when the second CB winning data is stored in the main RAM 74. In the second CB state ST3, one game can be played when the number of gaming media bets is "2", but because the maximum bet limit is set to "2", it is not possible to bet "3" gaming media.

The first CB state ST2 and the second CB state ST3 are game states that do not increase the number of game media owned by the player. Furthermore, both the first CB state ST2 and the second CB state ST3 are game states that result in the number of game media owned by the player at the end of the game state being less than the number of game media owned by the player at the start of the game state.

The base AT state ST4 is a gaming state that is entered when the conditions for entering the base AT state ST4 are met in the normal gaming state ST1. The base AT state ST4 ends when the remaining number of awarded gaming media measured by the AT difference number counter 96e becomes "0" or when the conditions before the ending of the second section SC2 are met. When the base AT state ST4 ends because the remaining number of awarded gaming media measured by the AT difference number counter 96e becomes "0", the game transitions to the normal gaming state ST1. Furthermore, when the conditions before the ending are met and the base AT state ST4 ends, the game transitions to the ending AT state ST5.

The ending AT state ST5 is a game state that is entered when the pre-ending conditions are met in the base AT state ST4. The ending AT state ST5 ends when the ending conditions of the second section SC2 are met. When the ending AT state ST5 ends, the game state transitions to the normal game state ST1.

In the base AT state ST4 and the ending AT state ST5, one game can be played regardless of whether the number of gaming media bets is "3" or "2." In the base AT state ST4 and the ending AT state ST5, there are a non-internal state in which neither the first CB winning data nor the second CB winning data is stored in the main RAM 74, and an internal state in which either the first CB winning data or the second CB winning data is stored in the main RAM 74.

In the base AT state ST4 and the ending AT state ST5, if an index value IV = 1 to 6 is won, the stopping order of reels 32L, 32M, and 32R that will result in the first bell winning is announced. Furthermore, in the base AT state ST4 and the ending AT state ST5, if an index value IV = 7 to 9 is won, the stopping order of reels 32L, 32M, and 32R that will result in the second bell winning is announced. If the first bell winning or the second bell winning is won, 15 game media are awarded. This makes it possible to increase the expected number of game media awarded in one game in the base AT state ST4 and the ending AT state ST5. In the base AT state ST4 and the ending AT state ST5, if three coins are bet, the expected net increase in gaming media in one game will exceed "0", and in the base AT state ST4 and the ending AT state ST5, if two coins are bet, the expected net increase in gaming media in one game will be 0 or less.

In a configuration in which various game states ST1-ST5 exist as described above, a game interval is set in addition to these game states ST1-ST5. A first interval SC1 and a second interval SC2 are set as game intervals. In other words, in this slot machine 10, the factors that determine the game situation are the number of gaming media bets of "2" and "3," the setting values of "1" to "6," the various game states ST1-ST5, and the game intervals of the first interval SC1 and the second interval SC2.

The first section SC1 is a section in which an advantageous gaming state (base AT state ST4 and ending AT state ST5) is not initiated, in which the expected net increase in gaming media in one game (the value obtained by subtracting the number of gaming media bet in one game from the expected number of gaming media awarded in one game) exceeds zero when the stopping order of reels 32L, 32M, and 32R is notified, and the advantageous gaming state does not continue. When the partial clear process for the area (step S105) or the full clear process for the area (step S106) is executed, the normal gaming state ST1 is entered, and the first section SC1 is entered. Furthermore, the first section SC1 is entered when the initialization process for second section SC2 is executed in second section SC2.

When a transition trigger to the second section SC2 occurs in the first section SC1 based on the winning combination lottery process (Figure 16), the game transitions from the first section SC1 to the second section SC2. In this case, if a game with a bet of "3" is played in the first section SC1, a transition trigger to the second section SC2 may occur, while if a game with a bet of "2" is played in the first section SC1, a transition trigger to the second section SC2 will not occur. Therefore, a player hoping to transition to the second section SC2 in the first section SC1 should play a game with a bet of "3" rather than a game with a bet of "2." The second section SC2 is a section in which the above-mentioned advantageous gaming state can begin and can continue. The second section SC2 ends when the base AT state ST4 or the ending AT state ST5 ends and the game transitions to the normal gaming state ST1. When the second section SC2 ends, the game transitions to the first section SC1.

The ending condition for the second section SC2 is set such that either the total number of games played as a result of the second section SC2 continuing without a transition to the first section SC1 reaching the upper limit (specifically, 4,000 games), or the total number of game media acquired as a result of the second section SC2 continuing without a transition to the first section SC1 reaching the upper limit (specifically, 2,400). The total number of acquired coins refers to the increase in the predetermined difference, where the predetermined difference is the value obtained by subtracting the total number of game media consumed to play games while the second section SC2 is continuing ("0" when no games are being played) from the total number of game media awarded by games played while the second section SC2 is continuing ("0" when no game media is awarded). If either of these ending conditions is met, even if the remaining number of gaming media awarded measured using the AT difference counter 96e is one or more, the ending AT state ST5 ends in the game in which the ending condition is met, the second section SC2 ends, and the game transitions to the first section SC1 and normal gaming state ST1. This makes it possible to prevent the second section SC2 from continuing excessively.

The normal game state ST1, first CB state ST2, and second CB state ST3 can be reached in either the first section SC1 or the second section SC2. On the other hand, the base AT state ST4 and ending AT state ST5 are never reached in the first section SC1, but only in the second section SC2.

In the normal gaming state ST1 in the second section SC2, a lottery process for transitioning to the base AT state ST4 can be executed based on the results of the lottery process (Figure 16) for each game. However, this lottery process is executed in games with a bet of "3" but not in games with a bet of "2." Also, in the normal gaming state ST1 in the second section SC2, the value of the release game number counter 96g stored in the main RAM 74 is decremented by 1 each time a game is executed. If the value of the release game number counter 96g after the decrement is "0," transition to the base AT state ST4 is confirmed. However, this decrement of the release game number counter 96g is executed in games with a bet of "3," but not in games with a bet of "2." Therefore, in the normal gaming state ST1 in the second section SC2, it is more advantageous for the player to execute a game with a bet of "3" than a game with a bet of "2."

Even if it is advantageous to play games with a bet of "3" in the normal game state ST1, base AT state ST4, and ending AT state ST5 in the second section SC2, the number of game media awarded in games with a bet of "2" in any of the normal game state ST1, base AT state ST4, and ending AT state ST5 in the second section SC2 is added to the total number of game media awarded in the second section SC2, and games with a bet of "2" played in any of the normal game state ST1, base AT state ST4, and ending AT state ST5 in the second section SC2 are added to the total number of games played as the second section SC2 continues. In other words, even though games with a bet of "2" in any of the normal game state ST1, base AT state ST4, and ending AT state ST5 in the second section SC2 are disadvantageous to the player, such games contribute to the realization of the ending conditions of the second section SC2. From this perspective, when the player is in the normal game state ST1, base AT state ST4, or ending AT state ST5 in the second section SC2, it is more advantageous for the player to have a game with a bet of "3" executed than to have a game with a bet of "2" executed.

Even in the second section SC2, a first CB win and a second CB win are possible, just like in the first section SC1. If a first CB win is achieved in the second section SC2, the first CB state ST2 is entered in the second section SC2, and the second section SC2 is maintained in the first CB state ST2 and after the first CB state ST2 ends. Furthermore, if a second CB win is achieved in the second section SC2, the second CB state ST3 is entered in the second section SC2, and the second section SC2 is maintained in the second CB state ST3 and after the second CB state ST3 ends. As already explained, the first CB state ST2 and the second CB state ST3 are game states in which the number of game media owned by the player at the end of the game state is less than the number of game media owned by the player at the start of the game state. In other words, the first CB state ST2 and the second CB state ST3 are game states that are disadvantageous to the player. On the other hand, games played in either the first CB state ST2 or the second CB state ST3 in the second section SC2 are added to the total number of games played as the second section SC2 continues. In other words, even though games played in the first CB state ST2 and the second CB state ST3 are disadvantageous to the player, those games contribute to achieving the ending conditions of the second section SC2. Therefore, if the first CB state ST2 or the second CB state ST3 occurs in the second section SC2, it will be even more disadvantageous to the player.

<Processing at the start of the game>
Next, the game start processing executed in step S410 of the winning combination lottery processing (FIG. 16) will be described with reference to the flowchart in FIG. 20. Note that the processing in steps S501 to S512 in the game start processing is executed as intra-area processing using intra-area processing programs and intra-area processing data.

If the second section flag in the various flag areas 96i in the work area 96 for intra-area processing is not set to "1" and is in the first section SC1 (step S501: YES), the system determines whether the number of bets for the current game is "2" by determining whether the value of the bet number setting counter 96a in the work area 96 for intra-area processing is "2" (step S502). If the number of bets for the current game is "2" (step S502: YES), the system does not execute the process to set the number of bets to the second section SC2. On the other hand, if the number of bets for the current game is "3" (step S502: NO), the system executes the second section transition process (step S504) on the condition that one of the index values IV is won in the lottery process for the current game (Figure 16) (step S503: YES). In the second section transition process, the system sets the second section flag in the various flag areas 96i to "1" to transition the game section from the first section SC1 to the second section SC2. In addition, the continued game number counter 96c in the work area 96 for in-area processing is cleared to "0," and the total win number counter 96d is set to "63121" as its initial value.

The total acquisition counter 96d is a two-byte counter that can take values from "0" to "65535." In this case, by setting the total acquisition counter 96d to "63121" as its initial value, the value of the total acquisition counter 96d will not reach its minimum value until the number of game media owned by the player decreases by 63121 from the initial value. If the number of game media owned by the player decreases by more than 63121 from the initial value, the value of the total acquisition counter 96d will reverse from its minimum value to its maximum value. When this reversal occurs, the total acquisition counter 96d is cleared to "0." Therefore, if the number of game media owned by the player decreases by more than 63121 after transitioning to the second section SC2, the excess amount will not be counted by the total acquisition counter 96d. On the other hand, if the value of the total acquisition counter 96d reaches "65521," the ending condition is met, and the ending AT state ST5 ends. In other words, when the number of gaming media owned by the player increases by 2,400 from the initial value when the second section SC2 begins, the ending condition is met and the ending AT state ST5 ends. The ending condition is also met when the value of the continued game number counter 96c reaches "4,000." In other words, when the number of games played in the second section SC2 reaches 4,000, the ending condition is met and the ending AT state ST5 ends.

The second section transition process also sets the ceiling game count to "1000" in the release game count counter 96g in the work area 96 for in-region processing in the main RAM 74. Each time a game with a bet of "3" is played in the second section SC2 and normal gaming state ST1, the value of the release game count counter 96g is decremented by 1. When the value of the release game count counter 96g after the decrement reaches "0," processing is executed to transition to the base AT state ST4. Note that even in the second section SC2, if a game with a bet of "2" is played, the value of the release game count counter 96g is not decremented, and the value of the release game count counter 96g is not decremented when a game is played in CB state ST2 or ST3. Furthermore, the second section transition process switches the section display unit 67 from an off state to an on state.

If the second interval flag in the various flags area 96i is set to "1" and the game is in the second interval SC2 (step S501: NO), the value of the continued game counter 96c is incremented by 1 (step S505). Then, the value of the bet number setting counter 96a is determined to be "2" to determine whether the number of bets for the current game is "2" (step S506), and the current game state is determined to be the first CB state ST2 or the second CB state ST3 (step S507). If the number of bets for the current game is "2" (step S506: YES), or if the current game state is the first CB state ST2 or the second CB state ST3 (step S507: YES), the game start processing is terminated without executing the processing from step S508 onwards.

If the number of bets on this game is "3" and the current gaming state is neither the first CB state ST2 nor the second CB state ST3 (steps S506 and S507: NO), processing from step S508 onwards is executed. In step S508, it is determined whether the current gaming state is the normal gaming state ST1. If it is the normal gaming state ST1 (step S508: YES), normal start processing is executed (step S509). Details of the normal start processing will be explained later.

If the game is not in the normal game state ST1 (step S508: NO), this means that the current game state is in the base AT state ST4 or the ending AT state ST5. In this case, on the condition that the index value IV = 1 to 9 is selected in the lottery process for the current game (FIG. 16) (step S510: YES), the stop order data setting process is executed (step S511). In the stop order data setting process, if the index value IV = 1 to 6 is selected in the lottery process for the current game (FIG. 16), a display corresponding to the stop order of reels 32L, 32M, and 32R that will result in the first bell win is displayed on the dual-purpose display unit 66. Furthermore, if the index value IV = 7 to 9 is selected in the lottery process for the current game (FIG. 16), a display corresponding to the stop order of reels 32L, 32M, and 32R that will result in the second bell win is displayed on the dual-purpose display unit 66.

If a negative judgment is made in step S510, or if the processing of step S511 is executed, it is determined whether the current game state is the base AT state ST4 (step S512). If the current game state is the ending AT state ST5 (step S512: NO), the game start processing is terminated as is. If the current game state is the base AT state ST4 (step S512: YES), the base AT start processing (step S513) is executed, and then the game start processing is terminated. Details of the base AT start processing will be explained later.

<Reel control processing>
Next, the reel control process executed in step S308 of the normal process (FIG. 15) will be described with reference to the flowchart of FIG. 22. Note that the processes of steps S601 to S614 in the reel control process are executed as intra-area processing using an intra-area processing program and intra-area processing data.

First, a spin start process is performed to initiate the rotation of each reel 32L, 32M, and 32R (step S601). This process checks whether a predetermined wait time (e.g., 4.1 seconds) has elapsed since the start of rotation of reels 32L, 32M, and 32R in the previous game. If the wait time has not elapsed, the process waits until the wait time has elapsed. If the wait time has elapsed, the process resets the wait time for the next game and sets spin start information in the motor control storage area provided in the work area 96 for in-area processing in the main RAM 74. This process initiates the stepping motor acceleration process in the stepping motor control process of step S206 in the timer interrupt process (Figure 14), causing each reel 32L, 32M, and 32R to begin spinning. The process then waits until each reel 32L, 32M, and 32R rotates at a predetermined constant speed, and the spin start process ends. Additionally, when the rotation speed of each reel 32L, 32M, 32R reaches a constant speed, the main MPU 72 lights up the lamps (not shown) of each stop button 42-44 to notify the player that it is now possible to issue a stop command.

Then, it is determined whether any of the stop buttons 42-44 has been operated (step S602). If none of the stop buttons 42-44 have been operated, the process of step S602 is repeated until one of the stop buttons 42-44 is operated. If it is determined that one of the stop buttons 42-44 has been operated, it is determined whether or not the stop button 42-44 corresponding to the spinning reel 32L, 32M, 32R has been operated, i.e., whether or not a stop command has been issued (step S603). If a stop command has not been issued, the process returns to step S602, and the process of step S602 is repeated until one of the stop buttons 42-44 is operated. If a stop command has been issued, a stop start command is sent (step S604). The stop start command is a command that causes the production-side MPU 92 to recognize which of the stop buttons 42-44 has been operated to issue the current stop command. If a stop start command has been sent, the stop control process shown in steps S605 to S611 is performed to stop the spinning reel.

In the stop control process, the symbol number of the reaching symbol that has reached the base position (specifically, the bottom row) at the time the stop buttons 42-44 are operated is confirmed (step S605). Specifically, the symbol number of the reaching symbol that has reached the base position is confirmed based on the number of excitation pulses output from the time the detection signal of the reel index sensor is input. Then, based on the stop information stored in the main RAM 74, the number of slips of the reels 32L, 32M, and 32R that should be stopped this time is calculated (step S606).

In this slot machine 10, five stop patterns are available for stopping each reel 32L, 32M, 32R when the stop buttons 42-44 are operated: a stop pattern in which the reaching symbol that has reached the base position is stopped; a stop pattern in which the corresponding reel 32L, 32M, 32R slides one symbol, then stops; a stop pattern in which the corresponding reel 32L, 32M, 32R slides two symbols, then stops; a stop pattern in which the corresponding reel 32L, 32M, 32R slides three symbols, then stops; and a stop pattern in which the corresponding reel 32L, 32M, 32R slides four symbols. Therefore, in step S606, a value between "0" and "4" is calculated as the number of slips based on the stop information stored in the work area 96 for intra-area processing in the main RAM 74.

Then, the calculated slip count is added to the symbol number of the reached symbol to determine the symbol number of the stopped symbol that will actually stop at the base position (step S607). It is then determined whether the symbol number of the reached symbol on reels 32L, 32M, and 32R that should be stopped this time is equal to the symbol number of the stopped symbol (step S608). If they are equal, a reel stop process is performed to stop the rotation of reels 32L, 32M, and 32R (step S609). It is then determined whether all reels 32L, 32M, and 32R have stopped (step S610). If all reels 32L, 32M, and 32R have not stopped, a second stop information setting process is performed (step S611), and the process returns to step S602.

Here, stop information refers to information that causes the stop patterns of each reel 32L, 32M, and 32R to correspond to the results of the role lottery process (Figure 16). Using this stop information, it is possible to calculate the number of slips (specifically, "0" to "4") for the reaching symbol that reaches the base position when each stop button 42-44 is stopped. This stop information includes slip number data indicating the correspondence between each symbol and the number of slips, which is stored in advance in the main ROM 73 as data for in-area processing in correspondence with each lottery result and the stop order of each reel 32L, 32M, and 32R. However, this is not limited to this, and the slip number data corresponding to each lottery result and the stop order of each reel 32L, 32M, and 32R may be derived while the reels 32L, 32M, and 32R are spinning, for example.

The processes for setting the stop information include a first stop information setting process executed in step S409 of the winning combination lottery process (FIG. 16) and a second stop information setting process executed in step S611 of the reel control process (FIG. 22). In the first stop information setting process, stop information is set according to the results of the winning combination lottery process. In the second stop information setting process, the stop information stored in the work area 96 for in-area processing in the main RAM 74 in the first stop information setting process or the previous second stop information setting process is changed after the reels have stopped. In the second stop information setting process, the stop information is changed based on the set winning data, the stopping order of reels 32L, 32M, and 32R, and the stop results of stopped reels 32L, 32M, and 32R.

If it is determined in step S610 that all reels 32L, 32M, and 32R have stopped, an all-reel stop command indicating that all reels 32L, 32M, and 32R have stopped is sent to the production-side MPU 92 (step S612). Then, a winning determination process is executed (step S613). In the winning determination process, the type of symbols stopped on the main line ML on each reel 32L, 32M, and 32R is identified. Then, based on the winning data stored in the work area 96 for in-area processing in the main RAM 74, it is determined whether the combination of symbols stopped and displayed on the main line ML on each reel 32L, 32M, and 32R corresponds to a winning combination in the winning combination lottery process. If the combination corresponds to a winning combination, a winning combination is established, and a winning combination process is executed. In the winning response processing, if the winning is a small winning combination, information on the number of gaming media to be awarded is set in the work area 96 for in-region processing in the main RAM 74 so that gaming media can be awarded in the media awarding processing. On the other hand, if the winning is a replay winning combination, a flag setting process is executed to enable the replay setting process to be executed in the next start waiting process. After executing the winning determination process, a winning result command is sent to the production side MPU 92 (step S614). The winning result command includes data indicating whether or not a winning combination has been achieved this time, and, if a winning combination has been achieved, includes data indicating the type of winning combination. The winning result command also includes data corresponding to the results of the lottery process (FIG. 16) for the winning combination in this game.

<Handling at the end of a game>
Next, the end-of-game response processing executed in step S310 of the normal processing (FIG. 15) will be described with reference to the flowchart of FIG. 23. Note that, because the processing of step S310 in the normal processing (FIG. 15) is executed after the reel control processing (step S308), the end-of-game response processing is executed after all rotations of the reels 32L, 32M, and 32R in one game have stopped. Furthermore, the processing of steps S701 to S706 in the end-of-game response processing is executed as intra-area processing using intra-area processing programs and intra-area processing data.

First, CB processing is executed to control the transition and progress of the first CB state ST2 or the second CB state ST3 (step S701). In the CB processing, if a first CB win is achieved in the current game, the first CB state flag provided in the various flag area 96i in the work area 96 for intra-area processing is set to "1," and the first CB winning data stored in the work area 96 for intra-area processing is cleared. This changes the game state to the first CB state ST2. In the first CB state ST2, the game is executed only when "3" gaming media have been bet. In the CB processing, if a second CB win is achieved in the current game, the second CB state flag provided in the various flag area 96i in the work area 96 for intra-area processing is set to "1," and the second CB winning data stored in the work area 96 for intra-area processing is cleared. This changes the game state to the second CB state ST3. In the second CB state ST3, a game is only executed when two gaming media have been bet. In the first CB state ST2 or the second CB state ST3, if a first bell win occurs in the current game, the value of the total award counter provided in the work area 96 for in-area processing is incremented by one. The total award counter is a counter used by the main MPU 72 to determine the total number of gaming media awarded in the first CB state ST2 or the second CB state ST3, and is cleared to zero when the first CB state ST2 or the second CB state ST3 is initiated. If the value of the total award counter after incrementing by one reaches 30, which is the termination reference number for the first CB state ST2 and the second CB state ST3, the CB state flag corresponding to the current CB state ST2 or ST3 is cleared to zero.

In the response process at the end of game play, after executing CB processing in step S701, if the game state is neither the first CB state ST2 nor the second CB state ST3 (step S702: NO), the process jumps to the process corresponding to the current game state (step S703). Specifically, if the game state is the normal game state ST1, normal processing is executed (step S704), if the game state is the base AT state ST4, base AT processing is executed (step S705), and if the game state is the ending AT state ST5, game section control processing is executed (step S706). Also, if a positive judgment is made in step S702 because the game state is CB state ST2 or ST3, if normal processing is executed in step S704, or if base AT processing is executed in step S705, game section control processing is then executed (step S706).

<Normal startup process>
Next, the normal start processing executed in step S509 of the game start processing (FIG. 21) will be described with reference to the flowchart of FIG. 24. Note that the processing of steps S801 to S811 in the normal start processing is executed as intra-area processing using an intra-area processing program and intra-area processing data.

First, the value of the release game number counter 96g is decremented by 1 (step S801). As a result, if a game with a bet of "3" is played in the second section SC2 and normal game state ST1, the remaining ceiling game number is decremented by 1. Then, it is determined whether the AT win flag provided in the various flags area 96i in the work area 96 for intra-area processing is set to "1" (step S802). The AT win flag is a flag used by the main MPU 72 to determine whether a transition to the base AT state ST4 has been confirmed. If the AT win flag is set to "1" (step S802: YES), this normal start processing is terminated without executing the processing from step S803 onwards.

If the AT winning flag is not set to "1" (step S802: NO), the AT lottery process is executed (step S803). In the AT lottery process, the AT lottery table provided as data for in-area processing in the main ROM 73 is read, and the current random number information is read from the lottery counter provided in the work area 96 for in-area processing and updated periodically. The AT lottery table and random number information are used to determine whether a transition to the base AT state ST4 has been won. The AT lottery table contains a set of numerical information referenced when not in the CZ state and a set of numerical information referenced when in the CZ state. In this case, the set of numerical information referenced when in the CZ state is set to have a higher probability of winning a transition to the base AT state ST4 than the set of numerical information referenced when not in the CZ state. Furthermore, regardless of whether the set of numerical information is referenced when in the CZ state or when not in the CZ state, the game that wins an index value IV with a relatively low winning probability in the role lottery process (FIG. 16) is set to have a higher probability of winning a transition to the base AT state ST4 than a game that wins an index value IV with a relatively high winning probability in the role lottery process (FIG. 16). When not in the CZ state, the expected value of winning a transition to the base AT state ST4 is approximately 5%, and when in the CZ state, the expected value of winning a transition to the base AT state ST4 is approximately 50%.

If the AT lottery process results in a win to transition to base AT state ST4 (step S804: YES), the AT win flag in the various flag areas 96i is set to "1", and the CZ win flag set in the various flag areas 96i in the work area 96 for in-area processing is cleared to "0" (step S805). The CZ win flag is a flag that the main MPU 72 uses to identify that a transition to the CZ state has been confirmed.

Then, the standby counter 96f provided in the work area 96 for intra-area processing is set to "4", which corresponds to the number of standby games (step S806). When the AT win flag is set to "1", the standby counter 96f is used by the main MPU 72 to determine the number of games remaining until a transition to the base AT state ST4 is triggered. When the value of the standby counter 96f is 1 or greater, a game with a bet number of "3" is played in a gaming state other than CB state ST2 or ST3, causing the value of the standby counter 96f to be decremented by 1, and when the value of the standby counter 96f after decrementing by 1 becomes "0", a transition to the base AT state ST4 occurs.

If the AT lottery process does not result in a win to transition to base AT state ST4 (step S804: NO), the CZ state is determined by determining whether the CZ state flag in the various flag areas 96i in the work area 96 for intra-area processing is set to "1", and it is also determined whether the CZ winning flag in the various flag areas 96i in the work area 96 for intra-area processing is set to "1" (step S807). If the CZ state is reached or the CZ winning flag is set to "1" (step S807: YES), this normal start processing is terminated.

If the game is not in the CZ state and the CZ winning flag is not set to "1" (step S807: NO), the CZ lottery process is executed (step S808). In the CZ lottery process, a CZ lottery table provided as data for intra-area processing in the main ROM 73 is read, and the current random number information is read from a lottery counter provided in the work area 96 for intra-area processing and updated periodically. The CZ lottery table and random number information are used to determine whether a transition to the CZ state has been won. The CZ lottery table is set so that a game that wins an index value IV with a relatively low winning probability in the role lottery process (FIG. 16) has a higher probability of winning a transition to the CZ state than a game that wins an index value IV with a relatively high winning probability in the role lottery process (FIG. 16). The expected value of winning a transition to the CZ state is approximately 10%.

If the CZ lottery process results in a win to transition to the CZ state (step S809: YES), the CZ win flag in the various flags area 96i is set to "1" (step S810). Then, the standby counter 96f in the work area 96 for intra-area processing is set to "4," which corresponds to the number of standby games (step S811). When the CZ win flag is set to "1," the standby counter 96f is used by the master MPU 72 to determine the number of games remaining until a transition to the CZ state is triggered. When the value of the standby counter 96f is 1 or greater, a game with a bet of "3" is played in a gaming state other than CB state ST2 or ST3, causing the value of the standby counter 96f to be decremented by 1. When the value of the standby counter 96f after decrementing by 1 becomes "0," a transition to the CZ state occurs.

<Normal processing>
Next, the normal processing executed in step S704 of the response processing at the end of a game (FIG. 23) will be described with reference to the flowchart of FIG. 25. Note that the processing in steps S901 to S914 in the normal processing is executed as intra-area processing using an intra-area processing program and intra-area processing data.

First, the number of bets for the current game is determined to be "2" by determining whether the value of the bet number setting counter 96a is "2" (step S901). If the number of bets for the current game is "2" (step S901: YES), the normal processing is terminated without executing the processing from step S902 onwards. If the number of bets for the current game is "3" (step S901: NO), the value of the release game number counter 96g in the work area 96 for intra-area processing is determined to be "0" to determine whether the ceiling number of games has been played in the second section SC2 and normal gaming state ST1 (step S902). If the value of the release game number counter 96g is "0" (step S902: YES), this means that the ceiling number of games has been played in the second section SC2 and normal gaming state ST1, and therefore processing is executed to set the base AT state ST4 in steps S907 and S908. This processing will be described later.

If the value of the release game number counter 96g is not "0" (step S902: NO), it is determined whether the value of the standby counter 96f in the work area 96 for in-area processing is 1 or greater (step S903). In a situation where transition to the base AT state ST4 has been confirmed and transition to the base AT state ST4 has been pending for four games, or in a situation where transition to the CZ state has been confirmed and transition to the CZ state has been pending for four games, the value of the standby counter 96f is 1 or greater. If the value of the standby counter 96f is 1 or greater (step S903: YES), the value of the standby counter 96f is decremented by 1 (step S904), and it is determined whether the value of the standby counter 96f after decrementing by 1 is "0" (step S905).

If the value of the standby counter 96f after subtracting 1 is "0" (step S905: YES), the system determines whether the AT win flag in the various flag areas 96i in the work area 96 for intra-area processing is set to "1," thereby determining whether this is the final game of the four games for which transition to the base AT state ST4 is being waited for (step S906). If a positive determination is made in step S906, processing is executed to set the game to the base AT state ST4 in steps S907 and S908. Specifically, the base AT state flag in the various flag areas 96i in the work area 96 for intra-area processing is set to "1," and the AT win flag and CZ state flag are cleared to "0" (step S907). Then, the AT state start setting process is executed (step S908). In the AT state start setting process, the AT difference number counter 96e in the work area 96 for intra-area processing is set to "200" as the initial award number. As already explained, the AT difference number counter 96e is a counter that allows the main MPU 72 to determine the remaining number of gaming media awarded in the base AT state ST4.

If a negative judgment is made in step S906, processing is executed in steps S909 and S910 to set the CZ state. Specifically, the CZ state flag in the various flags area 96i in the work area 96 for intra-area processing is set to "1," and the CZ win flag is cleared to "0" (step S909). Then, processing is executed to set the start of the CZ state (step S910). In the processing to set the start of the CZ state, the CZ state counter 96h provided in the work area 96 for intra-area processing is set to "10" as the number of games to continue in the CZ state. As already explained, the CZ state counter 96h is a counter used by the main MPU 72 to determine the number of games remaining until the CZ state ends. When the CZ state flag is set to "1" and the game enters the CZ state, the AT lottery process executed in step S803 of the normal start processing (Figure 24) references the group of numerical information that is referenced in the AT lottery table when the game is in the CZ state, so the chances of winning the transition to the base AT state ST4 are higher than when the game is not in the CZ state.

If the value of the standby counter 96f is determined to be "0" in step S903, the CZ state is determined by determining whether the CZ state flag in the various flag areas 96i in the work area 96 for intra-area processing is set to "1" (step S911). If the CZ state is determined (step S911: YES), the value of the CZ state counter 96h is decremented by 1 (step S912). If the value of the CZ state counter 96h after decrementing by 1 is "0" (step S913: YES), the CZ state is terminated by clearing the CZ state flag in the various flag areas 96i to "0" (step S914). When the CZ state flag is cleared to "0" and the CZ state is terminated, the AT lottery process executed in step S803 of the normal start processing (FIG. 24) references the numerical information group that is referenced when the CZ state is not in the AT lottery table. Therefore, the likelihood of winning the transition to the base AT state ST4 is lower than when the CZ state is in the CZ state.

<Base AT start processing>
Next, the base AT start processing executed in step S513 of the game start processing (FIG. 21) will be described with reference to the flowchart of FIG. 26. The processing of steps S1001 to S1009 in the base AT start processing is executed as an area processing using an area processing program and area processing data.

First, the add-on lottery process is executed (step S1001). In the add-on lottery process, an add-on lottery table provided as data for in-area processing in the main ROM 73 is read, and the current random number information is read from a lottery counter provided in the work area 96 for in-area processing and updated regularly. This add-on lottery table and random number information are used to determine whether an add-on win has been awarded for the remaining number of awards in the base AT state ST4. The add-on lottery table is set so that a game that wins an index value IV with a relatively low winning probability in the role lottery process (FIG. 16) has a higher probability of winning an add-on win than a game that wins an index value IV with a relatively high winning probability in the role lottery process (FIG. 16), and so that the expected number of gaming media to be awarded in the event of an add-on win is also higher.

If an additional win is made in the additional lottery process (step S1002: YES), the number of gaming media selected in the additional lottery process is added to the AT difference number counter 96e in the work area 96 for in-area processing (step S1003). If an additional win is made, the number of gaming media to be awarded is either 20, 50, 80, 100, or 200.

If a negative judgment is made in step S1002 or if the processing of step S1003 is executed, it is determined whether the result of the lottery process for the current role (Figure 16) for the current game is a losing result (step S1004). If the result of the lottery process for the role (Figure 16) is a losing result (step S1004: YES), "3" is added to the AT difference number counter 96e in the work area 96 for intra-area processing (step S1005). If the result of the lottery process for the role (Figure 16) for the game in which the number of bets is "3" is a losing result, this means that the number of gaming media owned by the player has decreased by three, so "3" is added to the AT difference number counter 96e to add that amount to the number of remaining gaming media awarded in the base AT state ST4. Furthermore, in games where the number of bets is "2", the base AT start processing (FIG. 26) is not executed, so even if the winning combination lottery processing (FIG. 16) results in a loss in a game where the number of bets is "2", no increment is made to the AT difference number counter 96e; moreover, in games where the number of bets is "2", the value of the AT difference number counter 96e is not updated regardless of the results of the winning combination lottery processing (FIG. 16) or the winning result.

If any index value IV is selected in the winning combination lottery process (Figure 16) (step S1004: NO), it is determined whether the selected index value IV is one of "1" to "13" (step S1006). In other words, it is determined whether the selected index value IV is selected with the winning data corresponding to the award of gaming media. If a positive determination is made in step S1006, the AT difference number counter 96e is decremented regardless of whether the winning data for that index value IV is selected (step S1007).

In the subtraction process of the AT difference number counter 96e, the number of game media awarded that would be awarded if the winning data set for the winning index value IV, which is the winning data with the largest number of game media awarded, is subtracted by "3", which is the number of bets placed on the current game, and the result is subtracted from the AT difference number counter 96e. This subtraction process is performed regardless of whether the winning data has won or not. Specifically, when the winning index value IV is any of "1" to "10", the winning data with the largest number of game media awarded is the first bell winning data or the second bell winning data, and therefore "12", which is the result of subtracting "3" from "15", which is the number of game media awarded that would be awarded if the winning data has won, is subtracted from the AT difference number counter 96e. Furthermore, when the index value IV is "11" or "12", the winning data that will result in the maximum number of game media to be awarded is the first watermelon winning data or the second watermelon winning data, so "2", which is the result of subtracting "3" from "5", which is the number of game media to be awarded if the winning data wins, is subtracted from the AT difference number counter 96e. Furthermore, when the index value IV is "13", the winning data that will result in the maximum number of game media to be awarded is the cherry winning data, so "1", which is the result of subtracting "3" from "4", which is the number of game media to be awarded if the winning data wins, is subtracted from the AT difference number counter 96e. In other words, in the base AT state ST4, even if a winning entry corresponding to the winning data that would give the largest number of gaming media among the winning data set for the winning index value IV is not achieved due to a missed win, the number of gaming media that would be awarded if a winning entry corresponding to the winning data that would give the largest number of gaming media were achieved will be subtracted by "3", which is the number of bets for this game, and the result will be subtracted from the AT difference number counter 96e.

Then, it is determined whether the value of the AT difference number counter 96e has become "0" or less as a result of the subtraction process in step S1007 (step S1008). If the value of the AT difference number counter 96e is "0" or less (step S1008: YES), the AT difference number counter 96e is cleared to "0" (step S1009).

<Processing for base AT>
Next, the base AT processing executed in step S705 of the response processing at the end of the game (FIG. 23) will be described with reference to the flowchart in FIG. 27. The processing of steps S1101 to S1105 in the base AT processing is executed as an in-area processing using a program for in-area processing and data for in-area processing.

If the value of the AT difference counter 96e in the work area 96 for intra-area processing is "0" (step S1101: YES), this means that the conditions for terminating the base AT state ST4 have been met. In this case, the base AT state flag and second interval flag in the various flag area 96i in the work area 96 for intra-area processing are cleared to "0" (step S1102). This ends the situation in the second interval SC2 and base AT state ST4, and transitions to the situation in the first interval SC1 and normal gaming state ST1. Furthermore, when the second interval SC2 ends, the interval display unit 67 changes from a lit state to an unlit state.

However, this is not limited to this, and the second section SC2 may be maintained without ending even if the base AT state ST4 ends when the value of the AT difference counter 96e becomes "0." In this case, the second section SC2 may end when the value of the AT difference counter 96e becomes "0" and the base AT state ST4 ends when the total number of winnings measured by the total winnings counter 96d in the work area 96 for intra-area processing is a predetermined number or more, such as 2,000 or more, or when the value of the AT difference counter 96e becomes "0" and the base AT state ST4 ends when the number of continued games measured by the continued game number counter 96c in the work area 96 for intra-area processing is a predetermined number or more, such as 1,000 or more.

If the value of the AT difference number counter 96e is not "0" (step S1101: NO), it is determined whether the value of the continued games counter 96c in the work area 96 for intra-area processing is greater than or equal to "3950," which is the value corresponding to the fulfillment of the pre-ending condition (step S1103), and it is determined whether the value of the total wins counter 96d in the work area 96 for intra-area processing is greater than or equal to "65321," which is the value corresponding to the fulfillment of the pre-ending condition (step S1104). Because the number of continued games corresponding to the fulfillment of the ending condition for the second section SC2 is "4000," the number of continued games corresponding to the fulfillment of the pre-ending condition, "3950," is a smaller number of games. Furthermore, the total number of wins corresponding to the fulfillment of the ending condition for the second section SC2 is "2400", obtained by subtracting "63121", the initial value of the total wins counter 96d when the second section SC2 starts, from "65521", the value of the total wins counter 96d corresponding to the fulfillment of the ending condition. In contrast, the total number of wins corresponding to the fulfillment of the pre-ending condition is "2200", obtained by subtracting "63121", the initial value of the total wins counter 96d when the second section SC2 starts, from "65321", the value of the total wins counter 96d corresponding to the fulfillment of the pre-ending condition. Therefore, the total number of wins corresponding to the fulfillment of the pre-ending condition is less than the total number of wins corresponding to the fulfillment of the ending condition for the second section SC2.

If a positive judgment is made in either step S1103 or step S1104, it means that the conditions before the ending occur have been met. In this case, the ending AT state flag provided in the various flags area 96i in the work area 96 for in-area processing in the main RAM 74 is set to "1," and the base AT state flag in the various flags area 96i is cleared to "0" (step S1105). This causes the game state to transition from the base AT state ST4 to the ending AT state ST5.

Here, if the number of continuing games or total number of wins in the second section SC2 in the base AT state ST4 corresponds to the fulfillment of the conditions before the ending occurs, the state transitions to the ending AT state ST5 regardless of the value of the AT difference number counter 96e, i.e., the number of remaining gaming media awarded in the base AT state ST4. The ending AT state ST5 then continues until the ending conditions of the second section SC2 are fulfilled. This makes it possible to ensure that the ending conditions of the second section SC2 are fulfilled when the conditions before the ending occurs in the second section SC2 are fulfilled.

<Gaming area control processing>
Next, the game zone control process executed in step S706 of the response process at the end of a game (FIG. 23) will be described with reference to the flowchart of FIG. 28. Note that the processes of steps S1201 to S1208 in the game zone control process are executed as intra-area processing using an intra-area processing program and intra-area processing data.

First, it is determined whether the game zone is the second zone SC2 by determining whether the second zone flag in the various flags area 96i in the work area 96 for intra-zone processing is set to "1" (step S1201). If the game zone is the first zone SC1 (step S1201: NO), this game zone control process is terminated without executing the processes from step S1202 onwards. If the game zone is the second zone SC2 (step S1201: YES), it is determined whether the value of the continued game number counter 96c in the work area 96 for intra-zone processing is "4000" or greater, thereby determining whether the number of continued games in the second zone SC2 has reached the number of games corresponding to the establishment of the ending condition (step S1202). If a positive determination is made in step S1202, initialization processing for the second zone SC2 is executed in step S1208. This initialization processing will be described later.

If a negative judgment is made in step S1202, it is determined whether any of the following replay wins has been achieved in the current game: a first chance replay win, a second chance replay win, or a normal replay win (step S1203). In this case, whether the number of bets in the current game is "2" or "3," the determination in step S1203 is also made, and whether the current game is in the normal game state ST1, the first CB state ST2, the second CB state ST3, the base AT state ST4, or the ending AT state ST5, the determination in step S1203 is also made. If any of the replay wins has been achieved (step S1203: YES), the process proceeds to step S1207 without executing the processes in steps S1204 to S1206.

If no replay wins have been achieved (step S1203: NO), the number of bets for the current game is subtracted from the number of game media awarded to the player in the current game, and the result of this subtraction is added to the total wins counter 96d in the work area 96 for in-area processing (step S1204). In this case, if no game media have been awarded to the player in the current game, the number of bets for the current game, "2" or "3," is subtracted from the value of the total wins counter 96d. Also, if game media have been awarded to the player in the current game but the number of game media awarded is less than the number of bets for the current game, the value obtained by subtracting the number of game media awarded in the current game from the number of bets for the current game is subtracted from the value of the total wins counter 96d. On the other hand, if the number of game media awarded to the player in the current game is more than the number of bets for the current game, the value obtained by subtracting the number of game media awarded in the current game from the number of bets for the current game is added to the value of the total wins counter 96d.

Then, it is determined whether the value of the total acquisition counter 96d is 0 or less (step S1205). If the value of the total acquisition counter 96d is 0 or less (step S1205: YES), the total acquisition counter 96d is cleared to "0" (step S1206). As already explained, when the second section SC2 is entered, the total acquisition counter 96d is set to an initial value of "63121." Therefore, the value of the total acquisition counter 96d will not become 0 or less until the number of gaming media owned by the player decreases by 63121 from the initial value. If the number of gaming media owned by the player decreases by more than 63121 from the initial value, the value of the total acquisition counter 96d will become 0 or less, and in this case, the total acquisition counter 96d is cleared to "0." Therefore, if the number of gaming media owned by the player decreases by more than 63121 after entering the second section SC2, the excess amount will not be counted by the total acquisition counter 96d.

If a positive judgment is made in step S1203, a negative judgment is made in step S1205, or the processing of step S1206 is executed, it is determined whether the value of the total winnings counter 96d exceeds "65,521" (step S1207). In other words, it is determined whether the increase in the number of gaming media owned by the player from the initial value when the second section SC2 started exceeds 2,400. If a positive judgment is made in step S1207, initialization processing of the second section SC2 is executed in step S1208, as in the case of a positive judgment in step S1202. In this initialization processing, the second section flag, base AT state flag, and ending AT state flag in the various flag areas 96i in the work area 96 for intra-area processing are cleared to "0," and the AT difference number counter 96e in the work area 96 for intra-area processing is cleared to "0." This results in a situation in which the first section SC1 is in the normal gaming state ST1. Furthermore, when the second section SC2 ends, the section display unit 67 changes from an on state to an off state.

<Configuration for communication between the main MPU 72 and the performance MPU 92>
Next, we will explain the configuration related to communication between the main MPU 72 and the performance side MPU 92. Figure 29(a) is an explanatory diagram for explaining the electrical configuration related to communication between the main MPU 72 and the performance side MPU 92.

The main MPU 72 and the performance-side MPU 92 are electrically connected by a signal path group 101. The signal path group 101 includes a first signal path group 103 provided on the main control board 71 to electrically connect the main MPU 72 and the main connector 102, a second signal path group 105 provided on the performance control board 91 to electrically connect the performance-side MPU 92 and the performance connector 104, and a connector unit 106 provided to connect to each of the main connector 102 and the performance connector 104. The connector unit 106 includes a first connector 106a at one end and a second connector 106b at the other end. The first connector 106a is detachably connected to the main connector 102, and the second connector 106b is detachably connected to the performance connector 104. The signal path group 101 formed by the first signal path group 103, main side connector 102, connector unit 106, performance side connector 104, and second signal path group 105 has multiple signal paths to enable parallel communication. Note that the signal path group 101 is not limited to a configuration that uses parallel communication, and may also use serial communication.

While multiple types of commands are sent from the master MPU 72 to the production MPU 92 using signal path group 101, no signals, including commands, are sent from the production MPU 92 to the master MPU 72. In other words, communication between the master MPU 72 and production MPU 92 is one-way communication from the master MPU 72 to the production MPU 92.

Figure 29(b) is an explanatory diagram illustrating commands sent from the main MPU 72 to the production MPU 92.

When the supply of operating power to the main MPU 72 begins and processing returns to that before the power outage occurred, a return command is sent from the main MPU 72 to the performance MPU 92. When the supply of operating power to the main MPU 72 begins and the setting value update process (step S108) is started in the main processing (Figure 13), a setting change start command is sent from the main MPU 72 to the performance MPU 92, and when the setting value update process ends, a setting change end command is sent from the main MPU 72 to the performance MPU 92.

When a bet on gaming media is set, a bet setting command is sent from the main MPU 72 to the presentation MPU 92. When a predetermined number of gaming media have been bet, and the start lever 41 is operated to start the game, rotation acceptance command A and rotation acceptance command B are sent from the main MPU 72 to the presentation MPU 92. When the game starts and reels 32L, 32M, and 32R begin to rotate, a rotation start command is sent from the main MPU 72 to the presentation MPU 92. When the acceleration period of reels 32L, 32M, and 32R has completed, they are rotating at a constant speed, and it is possible to stop reels 32L, 32M, and 32R, a stop possible command is sent from the main MPU 72 to the presentation MPU 92.

When all reels 32L, 32M, and 32R are spinning and a stop command is issued to any of the reels 32L, 32M, and 32R, a first stop start command is sent from the main MPU 72 to the presentation MPU 92. When two reels 32L, 32M, and 32R are spinning and a stop command is issued to the spinning reel 32L, 32M, and 32R, a second stop start command is sent from the main MPU 72 to the presentation MPU 92. When one reel 32L, 32M, and 32R is spinning and a stop command is issued to that reel 32L, 32M, and 32R, a third stop start command is sent from the main MPU 72 to the presentation MPU 92. These first to third stop start commands include information corresponding to the type of reel 32L, 32M, and 32R that is the target of the stop command. When all reels 32L, 32M, and 32R have stopped spinning, an all-reel stop command is sent from the main MPU 72 to the presentation MPU 92. When operation of the stop buttons 42-44 corresponding to the last spinning reels 32L, 32M, and 32R is completed, a symbol command is sent from the main MPU 72 to the presentation MPU 92. When the winning determination process (step S613) in the reel control process (FIG. 22) is completed, a winning result command is sent from the main MPU 72 to the presentation MPU 92. The winning result command includes information on whether or not a winning has occurred in the current game, and, if a winning has occurred, information on the winning result. When all processing for one game has completed, a game end command A and a game end command B are sent from the main MPU 72 to the presentation MPU 92.

When a specific error occurs in the slot machine 10, an error occurrence command is sent from the main MPU 72 to the presentation MPU 92, and when the specific error is resolved, an error resolution command is sent from the main MPU 72 to the presentation MPU 92. When the front door 12 changes from a closed state to an open state, or from an open state to a closed state, a door open/close command is sent from the main MPU 72 to the presentation MPU 92.

<Rotation Acceptance Commands A and B and Game End Commands A and B>
Figure 30(a) is an explanatory diagram for explaining the information contained in rotation acceptance command A, Figure 30(b) is an explanatory diagram for explaining the information contained in rotation acceptance command B, Figure 31(a) is an explanatory diagram for explaining the information contained in game end command A, and Figure 31(b) is an explanatory diagram for explaining the information contained in game end command B.

As shown in Figure 30 (a), the rotation acceptance command A includes command header information that enables the production side MPU 92 to identify it as a rotation acceptance command A, information on the setting value that is set to be used, information on the number of bets for the current game, information on the type of lottery result corresponding to the result of the role lottery process (Figure 16), information on the stop order of reels 32L, 32M, and 32R when an index value IV = 1 to 9 is selected in the base AT state ST4 or ending AT state ST5 and the stop order is announced, and information on the stop order of reels 32L, 32M, and 32R for the current game. It includes information on the game state (either normal game state ST1, first CB state ST2, second CB state ST3, base AT state ST4, ending AT state ST5, or CZ state), information on the game state of the next game (either normal game state ST1, first CB state ST2, second CB state ST3, base AT state ST4, ending AT state ST5, or CZ state), information on the game interval of the current game (either first interval SC1 or second interval SC2), and information on the game interval of the next game (either first interval SC1 or second interval SC2).

At the start of the game, before the timing of setting the rotation acceptance command A, information that enables the current game status and game section to be identified is stored in the start status area 96j in the work area 96 for intra-area processing. At the end of the game, before the timing of setting the game end command A, information that enables the current game status and game section to be identified is stored in the end status area 96k in the work area 96 for intra-area processing. Information on the game status of the current game is read from the start status area 96j, and information on the game status of the next game is read from the end status area 96k. However, the end status area 96k at the start of the game stores information on the game status and game section at the end of the previous game. Therefore, the game status information for the current game in the rotation acceptance command A and the game status information for the next game will be the same, and the game section information for the current game in the rotation acceptance command A and the game section information for the next game will be the same. Additionally, if the stop order of reels 32L, 32M, and 32R is not announced, the stop order information will be set to information indicating that the stop order will not be announced.

As information on the type of lottery result corresponding to the result of the lottery process for winning roles (Figure 16), the winning index value IV is not transmitted as is, but rather, if the index value IV containing the first bell winning data is won, information corresponding to the first bell is transmitted, if the index value IV containing the second bell winning data is won, information corresponding to the second bell is transmitted, if the index value IV containing the first watermelon winning data is won, information corresponding to the first watermelon is transmitted, if the index value IV containing the second watermelon winning data is won, information corresponding to the second watermelon is transmitted, and if the index value IV containing the cherry winning data is won, If the index value IV containing the first chance replay winning data is selected, information corresponding to a cherry is transmitted; if the index value IV containing the second chance replay winning data is selected, information corresponding to a second chance replay is transmitted; if the index value IV containing the normal replay winning data is selected, information corresponding to a normal replay is transmitted; if the index value IV containing the first CB winning data is selected, information corresponding to the first CB is transmitted; and if the index value IV containing the second CB winning data is selected, information corresponding to the second CB is transmitted. By configuring the index value IV not to be transmitted as is, even if the rotation acceptance command A is fraudulently read when the game is not in the base AT state ST4 or the ending AT state ST5, it is possible to prevent the stop order of reels 32L, 32M, and 32R that allows for the first or second bell win from being determined in a game where index value IV = 1 to 9 is selected.

In a configuration in which the information for the rotation acceptance command A is set as described above, the game end command A is set with the same information as the rotation acceptance command A, as shown in Figure 31 (a). However, the content of the command header information differs between the rotation acceptance command A and the game end command A. Furthermore, information on the game status of the current game is read from the start status area 96j, and information on the game status of the next game is read from the end status area 96k. However, if a transition in the game status or game section has occurred in the current game, information on the game status or game section after that transition is stored in the end status area 96k at the end of the game. Therefore, the game status information for the current game in the game end command A may differ from the game status information for the next game, and the information on the game section of the current game in the game end command A may differ from the information on the game section of the next game.

When sending a rotation acceptance command A or a game end command A, the command header information corresponding to each command is first set. Then, setting value information is read from the area in the work area 96 for intra-area processing in the main RAM 74 where the setting value to be used is stored, bet number information is read from the bet number setting counter 96a in the work area 96 for intra-area processing, lottery result type information corresponding to the winning index value IV information stored in the work area 96 for intra-area processing is read from intra-area processing data in the main ROM 73, stop order information is read from the area in which stop order information is stored in the work area 96 for intra-area processing, game status and game section information stored in the start status area 96j in the work area 96 for intra-area processing, and game status and game section information stored in the end status area 96k in the work area 96 for intra-area processing. The read information is then set for the rotation acceptance command A or game end command A that is being set, respectively.

As shown in Figure 30(b), the rotation acceptance command B includes command header information that enables the production side MPU 92 to identify it as a rotation acceptance command B, information on the number of continued games counter 96c in the work area 96 for intra-area processing, information on the total number of wins counter 96d in the work area 96 for intra-area processing, information on the number of release games counter 96g in the work area 96 for intra-area processing, information on the standby counter 96f in the work area 96 for intra-area processing, information on the CZ state counter 96h in the work area 96 for intra-area processing, information on the AT difference number counter 96e in the work area 96 for intra-area processing, information on the number of bonuses awarded if a bonus is awarded in the bonus lottery processing of the base AT start processing (Figure 26) at the start of the current game, and information on the end judgment counter 98b in the work area 98 for extra-area processing. In a configuration in which the information for the rotation acceptance command B is set as described above, the game end command B is set with information similar to that for the rotation acceptance command B, as shown in Figure 31(b). However, the information in the command header differs between rotation acceptance command B and game end command B.

When sending a rotation acceptance command B or a game end command B, first set the command header information corresponding to each command. Then, in the work area 96 for in-area processing in the main RAM 74, information is read from each of the areas that store information on the number of continued games counter 96c, total number of wins counter 96d, number of release games counter 96g, standby counter 96f, CZ state counter 96h, AT difference number counter 96e, and the number of bonuses awarded in the work area 96 for in-area processing, as well as information from the end determination counter 98b in the work area 98 for out-area processing. Then, the read information is set for the rotation acceptance command B or game end command B that is being set, respectively.

The rotation acceptance command A and rotation acceptance command B set as described above are set in step S411 of the winning combination lottery process (Figure 16) and sent from the main MPU 72 to the production MPU 92. In other words, the rotation acceptance command A and rotation acceptance command B are sent from the main MPU 72 to the production MPU 92 when each game starts and the winning combination lottery process is executed. In addition, the game end command A and game end command B are set in step S315 of the normal process (Figure 15) and sent from the main MPU 72 to the production MPU 92. In other words, the game end command A and game end command B are sent from the main MPU 72 to the production MPU 92 when each game ends.

<Command setting process>
Next, the command setting process that is called in common to set the rotation acceptance command A, the rotation acceptance command B, the game end command A, and the game end command B will be described with reference to the flowchart in Fig. 32. Note that the processes of steps S1301 to S1315 in the command setting process are executed as intra-area processing that utilizes the intra-area processing program and intra-area processing data.

The command setting process is called and executed as a subroutine when setting rotation acceptance command A in step S411 of the winning combination lottery process (Figure 16), and is also called and executed as a subroutine when setting rotation acceptance command B. Furthermore, the command setting process is called and executed as a subroutine when setting game end command A in step S315 of the normal process (Figure 15), and is also called and executed as a subroutine when setting game end command B.

If the command to be set this time is either a rotation acceptance command A or a game end command A (step S1301: YES), if it is a rotation acceptance command A (step S1302: YES), the command header information corresponding to the rotation acceptance command A is read from the data for in-area processing (step S1303). If it is a game end command A (step S1302: NO), the command header information corresponding to the game end command A is read from the data for in-area processing (step S1304). When the processing of step S1303 or step S1304 is executed, "8" is set as the number of reads in a specified register of the master MPU 72 (step S1305). The number of reads information is information that allows the master MPU 72 to identify the number of times information is read to set the command and the address of the area where the information to be read is stored.

Then, information corresponding to the read count information stored in a specified register is read (step S1306). If the read count information is "8," setting value information is read from the area in the work area 96 for intra-area processing where the setting value to be used is stored. If the read count information is "7," bet number information is read from the bet number setting counter 96a in the work area 96 for intra-area processing. If the read count information is "6," information on the type of lottery result corresponding to the winning index value IV information stored in the work area 96 for intra-area processing is read from the intra-area processing data in the main ROM 73. If the read count information is "5," stop order information is read from the area in the work area 96 for intra-area processing where the stop order information is stored. If the read count information is "4," game status information stored in the start status area 96j is read. If the read count information is "3," game status information stored in the end status area 96k is read. If the read count information is "2", the information on the play section stored in the start status area 96j is read. If the read count information is "1", the information on the play section stored in the end status area 96k is read.

Then, the value of the read count stored in a specified register is decremented by 1 (step S1307), and it is determined whether the value of the read count after decrementing by 1 is "0" (step S1308). If the read count is not "0" (step S1308: NO), the processes of steps S1306 and S1307 are executed. In other words, the processes of steps S1306 and S1307 are repeated until the read count becomes "0". If the read count is "0" (step S1308: YES), this command setting process is terminated.

If the command to be set this time is either a rotation acceptance command B or a game end command B (step S1301: NO), if it is a rotation acceptance command B (step S1309: YES), the command header information corresponding to the rotation acceptance command B is read from the data for in-area processing (step S1310); if it is a game end command B (step S1309: NO), the command header information corresponding to the game end command B is read from the data for in-area processing (step S1311). If the processing of step S1310 or step S1311 is executed, the number of reads is set to "8" in a specified register of the main MPU 72 (step S1312).

Then, information corresponding to the information on the number of reads stored in a specified register is read (step S1313). If the information on the number of reads is "8", information on the number of continued games counter 96c in the work area 96 for intra-area processing is read. If the number of reads is "7", information on the total number of won counter 96d in the work area 96 for intra-area processing is read. If the number of reads is "6", information on the number of released games counter 96g in the work area 96 for intra-area processing is read. If the number of reads is "5", information on the standby counter 96f in the work area 96 for intra-area processing is read. If the number of reads is "4", information on the CZ state counter 96h in the work area 96 for intra-area processing is read. If the number of reads is "3", information on the AT difference number counter 96e in the work area 96 for intra-area processing is read. If the number of reads is "2", information is read from the area storing information on the number of added bonuses in the work area 96 for intra-area processing. If the number of reads is "1", the information of the end determination counter 98b in the work area 98 for out-of-area processing is read.

Then, the value of the read count stored in a specified register is decremented by 1 (step S1314), and it is determined whether the value of the read count after decrementing by 1 is "0" (step S1315). If the read count is not "0" (step S1315: NO), the processes of steps S1313 and S1314 are executed. In other words, the processes of steps S1313 and S1314 are repeated until the read count becomes "0". If the read count is "0" (step S1315: YES), this command setting process is terminated.

In step S411 of the winning combination lottery process (Figure 16), the command setting process is executed once to set rotation acceptance command A, and the command setting process is executed once more to set rotation acceptance command B. These set rotation acceptance command A and rotation acceptance command B are then transmitted to the production-side MPU 92. Also, in step S315 of the normal process (Figure 15), the command setting process is executed once to set game end command A, and the command setting process is executed once more to set game end command B. These set game end command A and game end command B are then transmitted to the production-side MPU 92.

<Continuous display effect>
Next, we will explain the contents of the display effects executed by the image display device 63 in a situation where the transition to the base AT state ST4 has been confirmed in the normal gaming state ST1 and the transition to the AT state ST4 is awaited. Figures 33(a) to 33(d) are explanatory diagrams for explaining the contents of the display effects executed by the image display device 63 in a situation where the transition to the base AT state ST4 is awaited.

When a transition to the base AT state ST4 is confirmed in the second section SC2 while in the normal gaming state ST1, the standby counter 96f in the work area 96 for in-area processing is set to "4". If the standby counter 96f is set to a value of 1 or greater, the value of the standby counter 96f is decremented by 1 each time a game is played. When the value of the standby counter 96f after decrementing by 1 becomes "0", a transition from the normal gaming state ST1 to the base AT state ST4 occurs. In other words, the transition to the base AT state ST4 will be awaited for four games after the transition to the base AT state ST4 is confirmed.

When a transition to the base AT state ST4 is awaited, a continuous display effect is executed on the image display device 63 to make the player anticipate a transition to the base AT state ST4. Furthermore, the continuous display effect can also be executed on the image display device 63 in a situation in which a transition to the base AT state ST4 has not been confirmed in the second section SC2 and normal gaming state ST1. In other words, the continuous display effect is executed whether a transition to the base AT state ST4 occurs afterwards or if a transition to the base AT state ST4 does not occur. In the case of a continuous display effect in which a transition to the base AT state ST4 occurs, a transition-related effect is executed at the end of the continuous display effect, indicating that a transition to the base AT state ST4 will occur. In the case of a continuous display effect in which a transition to the base AT state ST4 does not occur, a non-transition-related effect is executed at the end of the continuous display effect, indicating that a transition to the base AT state ST4 will not occur. Therefore, when a continuous display effect occurs, the player will pay attention to the continuous display effect, hoping that a transition-related effect will eventually occur.

When a continuous display effect is being executed, the upper lamp 61 and speaker 62 will display an effect corresponding to that continuous display effect. Furthermore, the number of games for which the continuous display effect is executed is not limited to four, but may be two, three, five, six, or more games. Rather than a fixed number of games, the number of games may be determined by lottery, allowing for a variable number of games.

The continuous display effect progresses through the effect sections as each game is played. Specifically, in the first game, an opening section is executed, indicating that the showdown effect is about to begin. In the opening section, an opening-corresponding image G11 is displayed, as shown in Figure 33 (a). In the second game, a first half showdown section of the showdown effect is executed. In the first half showdown section, a first half showdown image G12 corresponding to the first half of the scene in which two character images are facing off, as shown in Figure 33 (b), is displayed. In the third game, a second half showdown section of the showdown effect is executed. In the second half showdown section, a second half showdown image corresponding to the second half of the scene in which two character images are facing off is displayed.

In the fourth game, the match result section of the match presentation is executed. In the match result section, a match result image G13 corresponding to the match result between the two character images is displayed, as shown in Figure 33 (c). The match result image G13 in Figure 33 (c) is a victory-corresponding image displayed in the continuous display presentation when a transition to the base AT state ST4 occurs. In the continuous display presentation when a transition to the base AT state ST4 does not occur, a defeat-corresponding image such as "Sorry!" is displayed as the match result image G13. In the continuous display presentation when a transition to the base AT state ST4 occurs, an AT start image G14 indicating that the base AT state ST4 will begin is displayed after the match result section, as shown in Figure 33 (d). The AT start image G14 displays that the base AT state ST4 has begun and the initial number of game media awarded in that base AT state ST4.

The AT start image G14 is displayed when game end commands A and B are received from the main MPU 72 during the fourth game while a transition to the base AT state ST4 is pending. In other words, if the game end command A indicates that the current game's game state is normal game state ST1 and the next game's game state is base AT state ST4, the presentation MPU 92 can determine that the base AT state ST4 will begin from the next game. Furthermore, the presentation MPU 92 can determine the initial award number from the value of the AT difference number counter 96e included in game end command B. In this case, the presentation MPU 92 controls the image display device 63 so that the AT start image G14 is displayed with the specified initial award number displayed. Note that in the continuous display effect when a transition to the base AT state ST4 does not occur, the base effect, which is not the continuous display effect in the normal game state ST1, resumes after the match result division.

The above-mentioned continuous display effect is executed even in a situation where a transition to the CZ state has been confirmed in the normal gaming state ST1 and the transition to the CZ state is pending. Furthermore, continuous display effects can also be executed in a situation where a transition to the CZ state has not been confirmed in the normal gaming state ST1. Therefore, when a player sees a continuous display effect, they will expect a transition to the base AT state ST4, and even if they do not transition to the base AT state ST4, they will expect a transition to the CZ state.

<Normal performance control processing>
Next, the normal effect control process executed by the effect-side MPU 92 will be described with reference to the flowchart of Fig. 34. The normal effect control process is repeatedly executed at a relatively short cycle (for example, every 2 milliseconds) in the normal gaming state ST1.

If rotation acceptance commands A and B are received from the main MPU 72 (step S1401: YES), the presentation adjustment process is executed (step S1402). The presentation adjustment process is a process for resolving any discrepancies between the game progress controlled by the main MPU 72 and the content of the presentation execution control by the presentation MPU 92. Details of the presentation adjustment process will be explained later.

Then, it is determined whether the current game is in the CZ state from the information on the game status of the current game included in the rotation acceptance command A (step S1403). If the current game is in the CZ state (step S1403: YES), the number of remaining games in the CZ state is determined from the information on the CZ state counter 96h included in the rotation acceptance command B, and data is set to execute the CZ state effect corresponding to that remaining number of games (step S1404). As a result, the image display device 63 executes a display effect corresponding to the remaining number of games to continue in the CZ state, and the upper lamp 61 and speaker 62 execute light emission effects and sound output effects corresponding to that display effect.

If the current game is not in the CZ state (step S1403: NO), it is determined whether the current game is in the premonition state (step S1405). The premonition state is either a state in which a transition to the base AT state ST4 has been confirmed and the transition to the base AT state ST4 is pending, or a state in which a transition to the CZ state has been confirmed and the transition to the CZ state is pending. The premonition state continues for four games whether a transition to the base AT state ST4 is pending or a transition to the CZ state is pending; however, the number of games for which the premonition state continues may differ between the former and latter states. Furthermore, the determination of whether the premonition state is in the premonition state is made by determining whether the value of the waiting counter 96f included in the rotation acceptance command B is 1 or greater.

If the game is in the real premonition state (step S1405: YES), an update process for the real premonition effect corresponding to the value of the standby counter 96f included in the rotation acceptance command B is executed (step S1406). Specifically, if the value of the standby counter 96f is "4," this means that the real premonition state has begun in the current game. In this case, data is set for the display effect of the image display device 63 to execute the opening segment of the continuous display effect. As a result, an opening-related image G11 such as that shown in FIG. 33(a) is displayed on the image display device 63. Data is also set for the upper lamp 61 and speaker 62 to execute the light-emitting effect and sound output effect corresponding to the display effect. If the value of the standby counter 96f is "3," data is set for the display effect of the image display device 63 to execute the first half showdown segment of the continuous display effect. As a result, a first half showdown image G12 such as that shown in FIG. 33(b) is displayed on the image display device 63. Data is also set for the upper lamp 61 and speaker 62 to execute the light-emitting effect and sound output effect corresponding to the display effect.

When the value of the standby counter 96f is "2", data is set for the display performance of the image display device 63 so that the second half competition segment of the continuous display performance is executed. As a result, the second half competition image will be displayed on the image display device 63. Data is also set for the upper lamp 61 and speaker 62 to execute the light-emitting effect and sound output effect corresponding to that display performance. When the value of the standby counter 96f is "1", data is set for the display performance of the image display device 63 so that the competition result segment of the continuous display performance is executed. As a result, a competition result image G13 such as that shown in FIG. 33(d) will be displayed on the image display device 63. Data is also set for the upper lamp 61 and speaker 62 to execute the light-emitting effect and sound output effect corresponding to that display performance.

Note that the processing of step S1406 is executed in the same manner for both the actual premonition state when transitioning to the base AT state ST4 and the actual premonition state when transitioning to the CZ state, thereby resulting in the continuous display effect being executed in the same manner for both actual premonition states. However, this is not limited to this, and the execution manner of step S1406 may be different for the actual premonition state when transitioning to the base AT state ST4 and the actual premonition state when transitioning to the CZ state, thereby resulting in the continuous display effect being executed in a different manner for each actual premonition state. In this case, the content of the continuous display effect may be completely different for the actual premonition state when transitioning to the base AT state ST4 and the actual premonition state when transitioning to the CZ state. Alternatively, the content of the continuous display effect in each actual premonition state may be the same, but a higher expectation level may be achieved for the actual premonition state when transitioning to the base AT state ST4 than for the actual premonition state when transitioning to the CZ state. Furthermore, in a configuration in which the presentation content may differ between the premonition state when transitioning to the base AT state ST4 and the premonition state when transitioning to the CZ state, it is necessary to set at least one of the AT winning flag and the CZ winning flag in the rotation acceptance command A or the rotation acceptance command B.

If the present state is not a true premonition state (step S1405: NO), it is determined whether the present state is a false premonition state (step S1407). The false premonition state is a state in which a continuous display effect is executed on the image display device 63 when neither a transition to the base AT state ST4 nor a transition to the CZ state is confirmed. If the present state is a false premonition state (step S1407: YES), a false premonition effect update process is executed (step S1408). The false premonition effect is executed when a lottery executed by the production side MPU 92 results in a false premonition effect, as will be described in detail later. The production side RAM 94 is provided with a false premonition effect counter. If a false premonition effect is generated in the false premonition effect generation lottery process, the false premonition effect counter is set to "4." The value of the false premonition effect counter is decremented by 1 each time rotation acceptance commands A and B are received, i.e., each time a game is executed. The process of decrementing the value of the false premonition effect counter by 1 is executed when the false premonition effect update process is completed.

In the false premonition effect update process, if the value of the false premonition effect counter is "4," data is set for the display effect of the image display device 63 to execute the opening segment of the continuous display effects. As a result, an opening-related image G11 such as that shown in FIG. 33(a) is displayed on the image display device 63. Data is also set for the upper lamp 61 and speaker 62 to execute the light-emitting effect and sound output effect corresponding to that display effect. If the value of the false premonition effect counter is "3," data is set for the display effect of the image display device 63 to execute the first half showdown segment of the continuous display effects. As a result, a first half showdown image G12 such as that shown in FIG. 33(b) is displayed on the image display device 63. Data is also set for the upper lamp 61 and speaker 62 to execute the light-emitting effect and sound output effect corresponding to that display effect.

If the value of the false premonition counter is "2", data is set for the display performance of the image display device 63 to execute the second half battle segment of the continuous display performance. As a result, the second half battle image will be displayed on the image display device 63. Data is also set for the upper lamp 61 and speaker 62 to execute the light-emitting effect and sound output effect corresponding to that display performance. If the value of the false premonition counter is "1", data is set for the display performance of the image display device 63 to execute the battle result segment of the continuous display performance. As a result, the battle result image will be displayed on the image display device 63. In this case, an effect indicating a loss in the battle performance will be executed. Data is also set for the upper lamp 61 and speaker 62 to execute the light-emitting effect and sound output effect corresponding to that display performance.

If the false premonition state is not reached (step S1407: NO), a lottery process for determining whether a false premonition effect will occur is executed (step S1409). In the lottery process for determining whether a false premonition effect will occur, a lottery table for false premonition effects stored in the effect-side ROM 93 is read, and numerical information is read from a lottery counter that is periodically updated in the effect-side RAM 94. The read numerical information is compared against the lottery table for false premonition effects. The probability of winning a false premonition effect occurrence is set to 10%. If a false premonition effect occurrence is determined (step S1410: YES), a false premonition effect setting process is executed (step S1411). In the false premonition effect setting process, the false premonition effect counter is set to "4". This means that a false premonition effect will begin from the next game.

If the processing of step S1404 is executed, if the processing of step S1406 is executed, if the processing of step S1408 is executed, if a negative judgment is made in step S1410, or if the processing of step S1411 is executed, other processing in response to the reception of rotation acceptance commands A and B is executed. Such other processing includes controlling the illumination of the bet lamp according to the number of bets.

If a stop start command or an all-reel stop command is received from the main MPU 72 (step S1413: YES), a presentation update process is executed (step S1414). In the presentation update process, settings are made to advance the presentation execution content in response to the reception of either a stop start command or an all-reel stop command. In this case, when a stop start command corresponding to the first stop is received, a stop command is issued to the first reel 32L, 32M, 32R, and stop control of that reel 32L, 32M, 32R is initiated, and the presentation execution content is advanced accordingly. Furthermore, when a stop start command corresponding to the second stop is received, a stop command is issued to the second reel 32L, 32M, 32R, and stop control of that reel 32L, 32M, 32R is initiated, and the presentation execution content is advanced accordingly. Furthermore, when a stop start command corresponding to the third stop is received, a stop command is issued to the third reel 32L, 32M, 32R, and stop control of those reels 32L, 32M, 32R is initiated, and settings are made to allow the performance execution to proceed accordingly. Furthermore, when an all reels stop command is received, settings are made to allow the performance execution to proceed accordingly, as all reels 32L, 32M, 32R have stopped.

In the continuous display performance, the opening segment, first half showdown segment, second half showdown segment, and showdown result segment all progress in execution when a stop start command corresponding to the first stop is received, when a stop start command corresponding to the second stop is received, when a stop start command corresponding to the third stop is received, and when an all reels stop command is received. For example, when the display performance of the opening segment is being executed on the image display device 63, the execution content of the display performance of the opening segment progresses accordingly when a stop start command corresponding to the first stop is received, the execution content of the display performance of the opening segment progresses accordingly when a stop start command corresponding to the second stop is received, the execution content of the display performance of the opening segment progresses accordingly when a stop start command corresponding to the third stop is received, and the execution content of the display performance of the opening segment progresses accordingly when an all reels stop command is received. Furthermore, for example, in a situation where the display performance for the second half showdown section is being executed by the image display device 63, when a stop start command corresponding to the first stop is received, the execution content of the display performance for the second half showdown section will proceed accordingly, when a stop start command corresponding to the second stop is received, the execution content of the display performance for the second half showdown section will proceed accordingly, when a stop start command corresponding to the third stop is received, the execution content of the display performance for the second half showdown section will proceed accordingly, and when an all reel stop command is received, the execution content of the display performance for the second half showdown section will proceed accordingly.

When game end commands A and B are received from the main MPU 72 (step S1415: YES), the MPU 92 determines whether the CZ state will begin in the next game by determining whether the information about the game status of the current game included in game end command A does not correspond to the CZ state and whether the information about the game status of the next game included in game end command A corresponds to the CZ state (step S1416). In other words, because game end command A is configured to include not only information about the game status of the current game but also information about the game status of the next game, the production MPU 92 can determine that a transition to the CZ state has occurred in the current game and that the CZ state will begin in the next game simply by checking the contents of game end command A.

If it is determined that the CZ state will begin from the next game (step S1416: YES), a CZ effect setting process is executed (step S1417). In the CZ effect setting process, data is set so that an effect corresponding to the CZ state is executed. As a result, a display effect corresponding to the CZ state is started on the image display device 63, and the upper lamp 61 and speaker 62 execute a light emission effect and a sound output effect corresponding to the display effect.

If the situation is not such that the CZ state will start from the next game (step S1416: NO), it is determined whether the game state information for the current game included in the game end command A does not correspond to the base AT state ST4 and whether the game state information for the next game included in the game end command A corresponds to the base AT state ST4, thereby determining whether the base AT state ST4 will start from the next game (step S1418). In other words, because the game end command A is configured to include not only information on the game state for the current game but also information on the game state for the next game, the production side MPU 92 can determine that a transition to the base AT state ST4 has occurred in the current game and that the base AT state ST4 will start from the next game simply by checking the contents of the game end command A.

If it is determined that the base AT state ST4 will start from the next game (step S1418: YES), the presentation side AT state flag stored in the presentation side RAM 94 is set to "1" (step S1419). The presentation side AT state flag is a flag used by the presentation side MPU 92 to determine whether or not the base AT state ST4 is in effect. If the presentation side AT state flag is not set to "1", the normal presentation control process (Figure 34) is executed, and if the presentation side AT state flag is set to "1", the AT presentation control process (Figure 42) described below is executed.

Then, the value of the AT difference number counter 96e included in the game end command B is set to the display target remaining number counter 94a (see Figure 41) provided in the presentation side RAM 94 (step S1420). In the base AT state ST4, the remaining number of gaming media to be awarded until the termination conditions of the base AT state ST4 are met is displayed on the image display device 63, and the number of awards corresponding to the value of the display target remaining number counter 94a is displayed on the image display device 63 as the remaining number of gaming media to be awarded. When the base AT state ST4 is initiated, "200" is set as the initial number of awards in the AT difference number counter 96e, and the value of the AT difference number counter 96e included in the game end command B at the time of transition to the base AT state ST4 is this initial number of awards, "200". Therefore, in step S1420, the display target remaining number counter 94a is set to "200", and the image display device 63 displays 200 as the remaining number of gaming media to be awarded.

Then, the AT effect setting process is executed (step S1421). In the AT effect setting process, data is set so that an effect corresponding to the base AT state ST4 is executed. As a result, a display effect corresponding to the base AT state ST4 is initiated on the image display device 63, and the upper lamp 61 and speaker 62 execute a light emission effect and a sound output effect corresponding to the display effect.

If the processing of step S1412 is executed, if the processing of step S1414 is executed, if a negative judgment is made in step S1415, if the processing of step S1417 is executed, if a negative judgment is made in step S1418, or if the processing of step S1421 is executed, other processing is executed (step S1422). In other processing, processing is executed to execute effects or notifications corresponding to the reception of commands other than the rotation acceptance commands A and B, the stop start command, the all reel stop command, and the game end commands A and B.

<Performance adjustment processing>
Next, the effect adjustment process executed in step S1402 of the normal effect control process (FIG. 34) will be described with reference to the flowchart of FIG. 35. As already explained, the effect adjustment process is executed when rotation reception commands A and B are received from the main MPU 72.

First, it is determined whether CZ state information is set as the game state information for the current game included in rotation acceptance command A (step S1501). If CZ state information is set (step S1501: YES), it is determined whether the effect corresponding to the CZ state has already started by checking the data for the effect to be executed set in the effect side RAM 94 (step S1502). If the effect corresponding to the CZ state has not yet started (step S1502: NO), a CZ effect setting process is executed (step S1503). In the CZ effect setting process, data is set so that an effect corresponding to the CZ state is executed. As a result, a display effect corresponding to the CZ state is started on the image display device 63, and a light-emitting effect and a sound output effect corresponding to the display effect are executed on the upper lamp 61 and speaker 62.

If CZ state information is not set as the game state information for the current game included in the rotation acceptance command A (step S1501: NO), it is determined whether base AT state ST4 information is set as the game state information for the current game included in the rotation acceptance command A (step S1504). As already explained, if the presentation-side AT state flag in the presentation-side RAM 94 is not set to "1," the presentation-side MPU 92 executes normal presentation control processing (FIG. 34) assuming that the game state is normal game state ST1, and executes presentation adjustment processing (FIG. 35) in the normal presentation control processing. In this case, if it is determined in the presentation adjustment processing that base AT state ST4 information is set as the game state information for the current game included in the rotation acceptance command A (step S1504: YES), this means that the presentation-side MPU 92 was executing presentation control corresponding to normal game state ST1, even though the game is actually in base AT state ST4. Therefore, in such a case, it begins execution control of presentation corresponding to base AT state ST4 in steps S1505 to S1510.

Specifically, first, the production side AT state flag in the production side RAM 94 is set to "1" (step S1505). As already explained, the production side AT state flag is a flag used by the production side MPU 92 to determine whether or not the base AT state ST4 is in effect. If the production side AT state flag is not set to "1", the normal production control process (Figure 34) is executed, and if the production side AT state flag is set to "1", the AT production control process (Figure 42) described below is executed.

Then, the value of the AT difference number counter 96e included in the rotation acceptance command B is set to the display target remaining number counter 94a (see Figure 41) in the presentation-side RAM 94 (step S1506). In the base AT state ST4, the number of awards corresponding to the value of the display target remaining number counter 94a is displayed on the image display device 63 as the remaining number of awards of gaming media until the termination conditions of the base AT state ST4 are met. When the base AT state ST4 is initiated, the AT difference number counter 96e is set to "200" as the initial number of awards. However, the situation in which the display target remaining number counter 94a is set in step S1506 of the presentation adjustment process (Figure 35) is a situation in which the presentation-side MPU 92 is executing presentation control corresponding to the normal gaming state ST1, even though the base AT state ST4 is actually in effect. Therefore, when the processing of step S1506 is executed, it is possible that the remaining number of awards of gaming media in the base AT state ST4 is already less than the initial number of awards. In step S1506, the value of the AT difference number counter 96e is set to the display target remaining number counter 94a, and the current remaining number of awarded gaming media in the base AT state ST4 is displayed on the image display device 63.

Then, the AT effect setting process is executed (step S1507). In the AT effect setting process, data is set so that an effect corresponding to the base AT state ST4 is executed. As a result, a display effect corresponding to the base AT state ST4 is initiated on the image display device 63, and the upper lamp 61 and speaker 62 execute a light emission effect and a sound output effect corresponding to the display effect.

Then, it is determined whether the stop order information included in the rotation acceptance command A is set to indicate that the stop order of reels 32L, 32M, and 32R should be announced in the current game (step S1508). If one of index values IV = 1 to 9 is won in the role lottery process (Figure 16) in the base AT state ST4 or the ending AT state ST5, the stop order of reels 32L, 32M, and 32R that will result in the first bell win or second bell win will be announced on the image display device 63 and the dual-purpose display unit 66. If the main MPU 72 determines that such an announcement should be made, information corresponding to that stop order is set in the rotation acceptance command A as stop order information. If the main MPU 72 does not determine that such an announcement should be made, information corresponding to not announcing the stop order is set in the rotation acceptance command A as stop order information. If information indicating that the stop order of reels 32L, 32M, and 32R should be announced is set in rotation acceptance command A (step S1508: YES), that stop order information is stored in production-side RAM 94 (step S1509). Data is then set so that an announcement corresponding to that stop order information is executed on the image display device 63 (step S1510). This causes the image display device 63 to begin announcing the stop order of reels 32L, 32M, and 32R that will result in the establishment of a first bell win or a second bell win. This announcement of the stop order continues until game end commands A and B are received from the main-side MPU 72.

As described above, because rotation acceptance command A contains information about the game's current game state, if the presentation side MPU 92 is actually in base AT state ST4 but is controlling the execution of a presentation corresponding to normal game state ST1, it becomes possible for the presentation side MPU 92 to control the execution of a presentation corresponding to base AT state ST4. Here, a situation in which the presentation side MPU 92 is actually in base AT state ST4 but is controlling the execution of a presentation corresponding to normal game state ST1 can occur if an abnormality occurs in the signal path group 101 between the main side MPU 72 and the presentation side MPU 92.

For example, if the connection between the main connector 102 of the main control board 71 and the first connector 106a of the connector unit 106 is insufficient and temporarily disconnects, or if the connection between the presentation connector 104 of the presentation control board 91 and the second connector 106b of the connector unit 106 is insufficient and temporarily disconnects, an abnormality may occur in the signal path group 101, preventing commands from being properly sent from the main MPU 72 to the presentation MPU 92. This may result in the presentation MPU 92 controlling the execution of presentations corresponding to normal game state ST1, even though the game is actually in base AT state ST4. Furthermore, if an abnormality such as the one described above occurs in the signal path group 101 during the execution of a continuous display presentation while a transition to base AT state ST4 is pending, commands may not be properly sent from the main MPU 72 to the presentation MPU 92. Furthermore, not only when transition to base AT state ST4 is awaited, but also when transition to CZ state is awaited while a continuous display performance is being executed, an abnormality in the signal path group 101 as described above may occur, preventing proper transmission of commands from the main side MPU 72 to the performance side MPU 92.

Figures 36(a) to 36(c) are explanatory diagrams illustrating the execution of the continuous display effect when an abnormality in the signal path group 101 as described above occurs after the opening section of the continuous display effect has started while transition to base AT state ST4 is pending, and the abnormality in the signal path group 101 is resolved when the competition result section starts.

As shown in Figure 36 (a), an abnormality occurs in the signal path group 101 while the image display device 63 is executing the display presentation of the opening section. In this case, the presentation side MPU 92 is unable to receive commands from the main side MPU 72, so the display presentation of the opening section on the image display device 63 is maintained without progressing its presentation content. Thereafter, the abnormality in the signal path group 101 continues in the second and third games while transition to the base AT state ST4 is awaited, so the display presentation of the opening section on the image display device 63 is maintained without progressing its presentation content.

Then, just before the start of the fourth game while transition to base AT state ST4 is awaited, the abnormality in signal path group 101 is resolved. In this case, as already explained, step S1406 in the normal effect control process (FIG. 34) executes processing to execute a continuous display effect of the effect content corresponding to the value of the standby counter 96f included in rotation acceptance command B. As a result, the image display device 63 skips the display effects for the first half showdown section and second half showdown section from the state in which the display effect for the opening section is being executed as shown in FIG. 36(a), and executes the display effect for the showdown result section as shown in FIG. 36(b). Then, when game end commands A and B for the current game are received, an AT start image G14 indicating the start of base AT state ST4 is displayed as shown in FIG. 36(c).

Figures 37(a) and 37(b) are explanatory diagrams illustrating the execution of a continuous display effect when an abnormality in the signal path group 101 as described above occurs after the opening segment of the continuous display effect has begun in a situation where transition to base AT state ST4 is awaited, and the abnormality in the signal path group 101 is resolved immediately before the end of the final game in that waiting situation.

As shown in Figure 37 (a), an abnormality occurs in the signal path group 101 while the image display device 63 is executing the display presentation of the opening section. In this case, the presentation side MPU 92 is unable to receive commands from the main side MPU 72, so the display presentation of the opening section on the image display device 63 is maintained without progressing its presentation content. Thereafter, the abnormality in the signal path group 101 continues in the second and third games while transition to the base AT state ST4 is awaited, so the display presentation of the opening section on the image display device 63 is maintained without progressing its presentation content.

Then, just before the end of the fourth game while transition to base AT state ST4 is pending, the abnormality in signal path group 101 is resolved, and game end commands A and B for the fourth game are received by the presentation side MPU 92. In this case, the AT presentation setting process is executed as already explained in step S1421 of the normal presentation control process (FIG. 34), and the AT start image G14 indicating the start of base AT state ST4 is displayed on the image display device 63, as shown in FIG. 37(b).

Figures 38(a) and 38(b) are explanatory diagrams illustrating the execution of the continuous display effect when an abnormality in the signal path group 101 as described above occurs after the opening segment of the continuous display effect has begun in a situation where transition to base AT state ST4 is awaited, and the abnormality in the signal path group 101 is resolved in the main MPU 72 in a game after the game in which control of the awaiting situation ends and control of base AT state ST4 begins.

As shown in Figure 38 (a), an abnormality occurs in the signal path group 101 while the image display device 63 is executing the display presentation of the opening section. In this case, the presentation side MPU 92 is unable to receive commands from the main side MPU 72, and therefore the display presentation of the opening section on the image display device 63 is maintained without progressing its presentation content. Thereafter, the abnormality in the signal path group 101 continues not only in the second, third, and fourth games in which transition to the base AT state ST4 is awaited, but also in games after the base AT state ST4 has begun, and therefore the display presentation of the opening section on the image display device 63 is maintained without progressing its presentation content.

Then, after the second game has ended since the base AT state ST4 began, the abnormality in the signal path group 101 is resolved, and the rotation acceptance commands A and B for the third game since the base AT state ST4 began are received by the presentation-side MPU 92. In this case, as already explained, the AT presentation setting process is executed in step S1507 of the presentation adjustment process (FIG. 35), and the AT start image G14 indicating the start of the base AT state ST4 is displayed on the image display device 63 as shown in FIG. 38(b). Also, as already explained, in the base AT state ST4, even if a winning combination corresponding to the winning data set for the winning index value IV that results in the largest number of gaming media being awarded is not achieved due to a missed win, the number of gaming media that would have been awarded if the winning combination corresponding to the winning data that results in the largest number of gaming media being awarded is subtracted by the number of bets for this game, "3," and the result is subtracted from the AT difference number counter 96e. Therefore, the number of remaining gaming media awarded in the AT start image G14 is not the initial number of 200, but rather a number less than 200 (for example, 188) that corresponds to the content of the games played so far in the base AT state ST4. Also, since the current game in the base AT state ST4 has won one of index values IV = 1 to 9 in the role selection process (Figure 16), step S1510 is executed in the presentation adjustment process (Figure 35), and the stop order notification image G15 is displayed as shown in Figure 38 (b).

Next, the progression of the display effect when a temporary abnormality in the signal path group 101 occurs while the continuous display effect is being executed on the image display device 63 will be described with reference to the time charts in Figures 39(a) to 39(i). Figure 39(a) shows the period during which the abnormality in the signal path group 101 occurs, Figure 39(b) shows the period during which the base AT state ST4 is in effect, Figure 39(c) shows the execution period of one game, Figure 39(d) shows the timing when the start lever 41 is operated, Figure 39(e) shows the timing when the third stop operation is performed on reels 32L, 32M, and 32R, Figure 39(f) shows the period during which the opening section of the continuous display effect is being executed, Figure 39(g) shows the period during which the first half showdown section or second half showdown section of the continuous display effect is being executed, Figure 39(h) shows the period during which the showdown result section of the continuous display effect is being executed, and Figure 39(i) shows the period during which the AT start image G14 is displayed on the image display device 63.

First, we will explain what happens when an abnormality in the signal path group 101 does not occur during a continuous display performance that is being executed while transition to base AT state ST4 is pending.

At timing t1, the start lever 41 is operated as shown in Figure 39(d), starting a new game as shown in Figure 39(c). If the AT is won in the AT lottery process (step S803) at the start of this game, the opening segment of the continuous display presentation begins as shown in Figure 39(f). Then, at timing t2, the rotation of all reels 32L, 32M, and 32R is stopped as shown in Figure 39(e), and the game ends as shown in Figure 39(c).

Then, at timing t3, the start lever 41 is operated as shown in Figure 39(d), and a new game begins as shown in Figure 39(c). Since this game is the second game in which transition to base AT state ST4 is awaited, the competition section presentation in the continuous display presentation begins at timing t3 as shown in Figure 39(g). The competition section presentation is executed over two games. Then, at timing t4, the rotation of all reels 32L, 32M, and 32R is stopped as shown in Figure 39(e), and the game ends as shown in Figure 39(c).

Then, at timing t5, the start lever 41 is operated as shown in FIG. 39(d), starting a new game as shown in FIG. 39(c). Since this game is the fourth game in which transition to the base AT state ST4 is awaited, the match result division display in the continuous display display begins at timing t5 as shown in FIG. 39(h). Then, at timing t6, the rotation of all reels 32L, 32M, and 32R is stopped as shown in FIG. 39(e), and the game ends as shown in FIG. 39(c). In this case, since this is the fourth game in which transition to the base AT state ST4 is awaited in this game, the base AT state ST4 begins at timing t6 as shown in FIG. 39(b). Furthermore, the game end command A sent from the master MPU 72 to the display MPU 92 at the end of this game contains information on the normal game state ST1 as the game state information for the current game and information on the base AT state ST4 as the game state information for the next game. Therefore, as shown in Figure 39(i), at timing t6, the image display device 63 begins displaying the AT start image G14.

Then, at timing t7, the start lever 41 is operated as shown in Figure 39(d), and a new game begins as shown in Figure 39(c). This game becomes the first game in the base AT state ST4.

Next, we will explain what happens when an abnormality occurs in signal path group 101 during a continuous display performance while transition to base AT state ST4 is pending.

At timing t9, the start lever 41 is operated as shown in Figure 39(d), starting a new game as shown in Figure 39(c). If the AT is won in the AT lottery process (step S803) at the start of this game, the opening segment of the continuous display presentation begins as shown in Figure 39(f).

Subsequently, at timing t10 during the game, an abnormality occurs in the signal path group 101 as shown in Figure 39(a). In this case, even if the main MPU 72 executes processing to send a command, the command is not received by the presentation MPU 92. Therefore, even if the game ends at timing t11 as shown in Figure 39(c) and a new game is executed from timing t12 to timing t13, the opening segment presentation continues as shown in Figure 39(f). Furthermore, even if a fourth game is executed from timing t14 to timing t15 as shown in Figure 39(c) while a transition to base AT state ST4 is pending, the opening segment presentation continues. In this case, base AT state ST4 begins at timing t15 as shown in Figure 39(b). Furthermore, even if games are executed in base AT state ST4 from timing t16 to timing t17 and from timing t18 to timing t19, the opening segment presentation continues.

Then, at timing t20, the abnormality in the signal path group 101 is resolved as shown in Figure 39(a). Then, when the signal path group 101 is normal, the start lever 41 is operated at timing t21 as shown in Figure 39(d), starting a new game as shown in Figure 39(c). In this case, even though the game status information for the current game included in the rotation acceptance command A sent from the main MPU 72 to the presentation MPU 92 corresponds to the base AT state ST4, the presentation AT state flag in the presentation RAM 94 is not set to "1," causing the normal presentation control process (Figure 34) to be executed. A positive judgment is made in step S1504 of the presentation adjustment process (Figure 35), and processing is executed to start the presentation of the base AT state ST4 in steps S1505 to S1510. Therefore, at timing t21, the AT start image G14 begins to be displayed on the image display device 63 as shown in Figure 39(i).

As described above, if an abnormality occurs in the signal path group 101 during the execution of a continuous display effect while transition to base AT state ST4 is pending, and the abnormality in the signal path group 101 is then resolved, the continuous display effect will not be resumed from the effect content immediately before the abnormality in the signal path group 101 occurred, but will be adjusted to a content that matches the progress of the game under the control of the main MPU 72. This makes it possible to execute an effect that matches the number of games remaining until base AT state ST4 begins or the progress of base AT state ST4 after the abnormality is resolved, even if a temporary abnormality occurs in the signal path group 101.

Next, we will explain what happens when an abnormality occurs in signal path group 101 during a continuous display performance in a false premonition state.

At timing t23, the start lever 41 is operated as shown in Figure 39(d), starting a new game as shown in Figure 39(c). In this game, the continuous display effect in the false premonition state begins, and the opening segment of the continuous display effect begins as shown in Figure 39(f).

Subsequently, at time t24, which is midway through the game, an abnormality occurs in the signal path group 101, as shown in Figure 39(a). In this case, even if the main MPU 72 executes processing to send a command, the command is not received by the presentation MPU 92. Therefore, even if the game ends at time t25 as shown in Figure 39(c) and a new game starts at time t26, the presentation of the opening segment continues as shown in Figure 39(f).

Then, at timing t27, the abnormality in the signal path group 101 is resolved as shown in Figure 39(a). Then, with the signal path group 101 remaining normal, the game ends at timing t28, and at timing t29, the start lever 41 is operated as shown in Figure 39(d), starting a new game as shown in Figure 39(c). In this case, in the continuous display effect during the false premonition state, the production-side MPU 92 executes the effect corresponding to the value of the false premonition effect counter in the production-side RAM 94 during the false premonition effect update process (step S1408) in the normal effect control process (Figure 34). At timing t29, the value of the false premonition effect counter is "3," which corresponds to the second game of the continuous display effect, and therefore the showdown section of the continuous display effect begins as shown in Figure 39(g). The showdown section effect is executed over two games. After that, at timing t30, as shown in Figure 39(e), all reels 32L, 32M, and 32R stop spinning, and the game ends as shown in Figure 39(c).

Then, at timing t31, the start lever 41 is operated as shown in Figure 39(d), and a new game begins as shown in Figure 39(c). In this case, the value of the false premonition effect counter is "1", which corresponds to the fourth game of the continuous display effect, so the match result classification effect in the continuous display effect begins as shown in Figure 39(h). Then, at timing t6, the rotation of all reels 32L, 32M, and 32R is stopped as shown in Figure 39(e), and the game ends as shown in Figure 39(c). This time, the false premonition state is in effect, so there is no transition to the base AT state ST4 or the CZ state.

As described above, if an abnormality occurs in the signal path group 101 during the execution of a continuous display effect in a false premonition state and the abnormality in the signal path group 101 is subsequently resolved, the effect for the segment corresponding to the value of the false premonition effect counter immediately before the abnormality occurred will be executed, even if the game has been completed by the time the abnormality is resolved. This makes it possible to execute the effects for each segment of the continuous display effect in a false premonition state even if an abnormality occurs in the signal path group 101.

<Performance in AT state>
Next, the display contents of the image display device 63 in the base AT state ST4 and the ending AT state ST5 will be described. Figure 40(a) is an explanatory diagram for explaining the display contents of the image display device 63 in the base AT state ST4, and Figure 40(b) is an explanatory diagram for explaining the display contents of the image display device 63 in the ending AT state ST5.

In the base AT state ST4, as shown in FIG. 40(a), the image display device 63 displays a remaining award number image G21, an acquisition number image G22, and a number of games played image G23. The remaining award number image G21 is an image for notifying the remaining number of gaming media awarded in the base AT state ST4. However, not only is the remaining number of gaming media awarded stored in the AT difference number counter 96e of the main RAM 74 displayed as the remaining award number image G21, but a number less than the remaining number of gaming media awarded stored in the AT difference number counter 96e may also be displayed as the remaining award number image G21. The acquisition number image G22 is an image for notifying the total number of gaming media acquired by the player since transitioning to the current base AT state ST4. The number of games played image G23 is an image for notifying the total number of games played since transitioning to the current base AT state ST4.

In the ending AT state ST5, as shown in Figure 40 (b), the image display device 63 displays the number of acquisitions image G22 and the number of games played image G23, while the remaining number of awards image G21 is not displayed. As already explained, the ending AT state ST5 continues until the ending conditions of the second section SC2 are met regardless of the value of the AT difference number counter 96e in the main RAM 74, so there is no need to display the remaining number of awards of gaming media as the remaining number of awards image G21. Furthermore, the number of acquisitions image G22 is an image for notifying the player of the total number of gaming media acquired since transitioning to the previous base AT state ST4. The number of games played image G23 is an image for notifying the player of the total number of games played since transitioning to the previous base AT state ST4.

Figure 41 is an explanatory diagram illustrating the contents of the memory area of the performance-side RAM 94, which stores information for displaying the various images G21 to G23 in the base AT state ST4 and the ending AT state ST5.

The presentation-side RAM 94 is provided with a display target remaining number counter 94a, a non-display target remaining number counter 94b, an AT acquisition number counter 94c, and an AT consumption number counter 94d. The display target remaining number counter 94a is a counter for storing information on the number of gaming media remaining to be awarded in the base AT state ST4 that are to be displayed in the award number image G21 of the image display device 63. The non-display target remaining number counter 94b is a counter for storing information on the number of gaming media remaining to be awarded in the base AT state ST4 that are not to be displayed in the award number image G21 of the image display device 63. The sum of the values of the display target remaining number counter 94a and the non-display target remaining number counter 94b matches the value of the AT difference number counter 96e in the main RAM 74. The AT acquisition number counter 94c is a counter for storing the total number of gaming media acquired by the player since transitioning to the previous base AT state ST4. The number of wins corresponding to the value of the AT win count counter 94c is displayed on the image display device 63 as a win count image G22. The AT consumption count counter 94d is a counter for storing the total number of games played since transitioning to the previous base AT state ST4, and the number of games corresponding to the value of the AT consumption count counter 94d is displayed on the image display device 63 as a game consumption count image G23.

<AT performance control processing>
Next, the AT performance control process executed by the performance side MPU 92 will be described with reference to the flowchart of Fig. 42. The AT performance control process is repeatedly executed in a relatively short cycle (for example, 2 milliseconds) in the base AT state ST4 or the ending AT state ST5.

If rotation acceptance commands A and B are received from the main MPU 72 (step S1601: YES), it is determined whether the stop order information included in rotation acceptance command A is set to indicate that the stop order of reels 32L, 32M, and 32R should be notified in the current game (step S1602). If index value IV = 1 to 9 is selected in the role selection process (FIG. 16) in base AT state ST4 or ending AT state ST5, the stop order of reels 32L, 32M, and 32R that will result in a first bell win or a second bell win will be notified on the image display device 63 and the dual-purpose display unit 66. If the main MPU 72 determines that such notification should be made, information corresponding to that stop order is set in rotation acceptance command A as stop order information. If the main MPU 72 does not determine that such notification should be made, information corresponding to not notifying the stop order is set in rotation acceptance command A as stop order information. If information indicating that the stop order of reels 32L, 32M, and 32R should be announced is set in rotation acceptance command A (step S1602: YES), that stop order information is stored in production-side RAM 94 (step S1603). Data is then set so that an announcement corresponding to that stop order information is executed on image display device 63 (step S1604). This causes image display device 63 to begin announcing the stop order of reels 32L, 32M, and 32R that will result in the establishment of a first bell win or a second bell win. This announcement of the stop order continues until game end commands A and B are received from the main-side MPU 72.

Figure 44 (a) is an explanatory diagram showing the stop order of reels 32L, 32M, and 32R displayed on the image display device 63 in the base AT state ST4. When the remaining award number image G21, the number of wins image G22, and the number of games played image G23 are displayed on the image display device 63, a stop order image G24 is displayed to notify the stop order of reels 32L, 32M, and 32R.

Returning to the explanation of the AT presentation control process (Figure 42), if a negative judgment is made in step S1602 or if the process of step S1604 is executed, the value of the AT consumption number counter 94d in the presentation side RAM 94 is incremented by 1 (step S1605). In addition, the number of bets for the current game is read from the rotation acceptance command A received this time, and the read number of bets is subtracted from the value of the AT acquisition number counter 94c in the presentation side RAM 94 (step S1606). Thereafter, adjustment processing of the remaining number counter is executed (step S1607). Figure 43 is a flowchart showing the remaining number counter adjustment processing.

The value of the AT difference number counter 96e contained in the rotation acceptance command B received this time is read. The sum of the value of the display target remaining number counter 94a and the value of the non-display target remaining number counter 94b in the performance side RAM 94 is calculated. Then, it is determined whether the calculated sum matches the value of the AT difference number counter 96e (step S1701). If it is determined in step S1701 that the calculated sum does not match the value of the AT difference number counter 96e (step S1701: YES), the discrepancy is calculated (step S1702). Specifically, the calculated sum is subtracted from the value of the AT difference number counter 96e. Then, the value resulting from the subtraction is added to the non-display target remaining number counter 94b (step S1703). In this case, if the value calculated in step S1702 is a positive value, the value of the non-display target remaining number counter 94b increases, and the sum of the value of the display target remaining number counter 94a and the value of the non-display target remaining number counter 94b matches the value of the AT difference number counter 96e. Furthermore, if the value calculated in step S1702 is a negative value, the value of the non-display target remaining number counter 94b decreases, and the sum of the value of the display target remaining number counter 94a and the value of the non-display target remaining number counter 94b matches the value of the AT difference number counter 96e.

By executing the remaining number counter adjustment process (Figure 43) as described above, even if an abnormality occurs in the signal path group 101 between the main MPU 72 and the performance MPU 92, causing the sum of the value of the display target remaining number counter 94a and the value of the non-display target remaining number counter 94b to not match the value of the AT difference number counter 96e, it is possible to make the value of this sum match the value of the AT difference number counter 96e.

Returning to the explanation of the AT effect control process (Figure 42), after executing the process of step S1607, an AT effect update process is executed (step S1608). In the AT effect update process, processing is executed to update the content of the effects in the base AT state ST4 or the ending AT state ST5 in accordance with the start of a new game. As a result, the content of the effects in the base AT state ST4 or the ending AT state ST5 in the upper lamp 61, speaker 62, and image display device 63 is updated in accordance with the start of a new game.

Then, based on the information on the number of additional awards included in the currently received rotation acceptance command B, it is determined whether or not the remaining number of awards of gaming media in the base AT state ST4 has been added in this game (step S1609). If the remaining number of awards has been added (step S1609: YES), a non-display lottery process is executed (step S1610). In the non-display lottery process, a non-display lottery table provided in the presentation side ROM 93 is read, and numerical information is read from a lottery counter that is periodically updated in the presentation side RAM 94, and the read numerical information is compared against the non-display lottery table. The probability of a non-display win in the non-display lottery process is set to 40%.

If a non-display win is obtained (step S1611: YES), an allocation process to the non-display target remaining number counter 94b is executed (step S1612). Specifically, the value of the number of awards to be added is added to the non-display target remaining number counter 94b. As a result, the number of awards to be added this time is not displayed in the remaining award number image G21 on the image display device 63, but is stored in the presentation side RAM 94 as the remaining number of awards for the gaming media to be hidden. Furthermore, if a non-display win is obtained, a presentation showing that the remaining number of awards in the base AT state ST4 has been added in this game is not executed. Therefore, even though the remaining number of awards in the base AT state ST4 has actually been added, a presentation corresponding to this addition is not executed.

If a non-display win is not obtained (step S1611: NO), the sum of the number of awards to be added this time and the value stored in the non-display remaining number counter 94b in the presentation RAM 94 is added to the display remaining number counter 94a in the presentation RAM 94 (step S1613). This notifies the player that an addition has occurred this time and not only the number of awards to be added this time, but also the value of the non-display remaining number counter 94b if the value of the non-display remaining number counter 94b is 1 or greater, indicating that the remaining number of awards of gaming media in the base AT state ST4 has been added. By configuring the announcement of the number of awards to be added in this way, including the value of the non-display remaining number counter 94b, it is possible to increase the number of additional awards announced at one time. Furthermore, when an addition to the number of awards occurs in this way, a corresponding addition effect is executed by the upper lamp 61, speaker 62, and image display device 63.

If a negative judgment is made in step S1609, if the processing of step S1612 is executed, or if the processing of step S1613 is executed, it is determined whether the current state is the base AT state ST4 based on the information on the game status of the current game contained in the rotation acceptance command A received this time (step S1614). If it is the base AT state ST4 (step S1614: YES), it is determined whether the current game can be the final game of the base AT state ST4 based on the information on the type of lottery result contained in the rotation acceptance command A received this time and the value of the AT difference number counter 96e contained in the rotation acceptance command B received this time (step S1615). If a positive judgment is made in step S1615, a LAST display setting process is executed (step S1616). In the LAST display setting process, the image display device 63 is controlled to display the text image "LAST" to notify the player that this is the final game of the base AT state ST4. This allows the player to understand that the base AT state ST4 will end with the current game.

On the other hand, if the ending AT state ST5 is reached, a negative determination is made in step S1614, and the LAST display setting process (step S1616) is not executed. Therefore, in the final game of the ending AT state ST5, the text image "LAST" is not displayed on the image display device 63. The ending AT state ST5 basically ends when the value of the total win counter 96d exceeds "65521," which corresponds to the fulfillment of the ending conditions. However, if a so-called miss occurs despite winning one of the index values IV = 1 to 13 in the role lottery process (Figure 16), the value of the total win counter 96d is not updated, and it is unclear whether this is the final game until all reels 32L, 32M, and 32R have stopped spinning. Therefore, by not displaying the text image "LAST" on the image display device 63 in the ending AT state ST5, it is possible to prevent player confusion.

If the AT effect control process receives a stop start command from the master MPU 72 (step S1617: YES), it determines whether the stop order of reels 32L, 32M, and 32R has been notified for the current game (step S1618). If the stop order of reels 32L, 32M, and 32R has been notified (step S1618: YES), it determines whether the stop order of reels 32L, 32M, and 32R included in the currently received stop start command matches the stop order data stored in the effect-side RAM 94 in step S1603 at the start of the current game (step S1619). If they do not match (step S1619: NO), it executes a mismatch response setting process (step S1620). In the mismatch response setting process, an effect corresponding to a mismatch in the stop order of reels 32L, 32M, and 32R is executed. Specifically, the display color of the image display device 63 is made darker than before. This allows the player to recognize that they have made a mistake in the stopping order of reels 32L, 32M, and 32R.

Figure 44 (b) is an explanatory diagram illustrating the display content of the image display device 63 when the stopping order of reels 32L, 32M, and 32R does not match in base AT state ST4. When the remaining award number image G21, the number of wins image G22, and the number of games played image G23 are displayed on the image display device 63, a blackout image G25 is displayed, corresponding to the fact that the stopping order of reels 32L, 32M, and 32R does not match.

If step S1619 determines that the stop order of reels 32L, 32M, and 32R is inconsistent when reels 32L, 32M, and 32R stop for the first time, step S1619 determines that the stop order of reels 32L, 32M, and 32R is inconsistent when reels 32L, 32M, and 32R stop for the second and third times, regardless of the stop order of reels 32L, 32M, and 32R. Furthermore, the effect corresponding to the inconsistent stop order continues until the end of the game in which the effect was started.

On the other hand, if the stopping order of reels 32L, 32M, and 32R matches (step S1619: YES), it is determined whether the currently received stop start command corresponds to the third stop (step S1621). If it corresponds to the third stop (step S1621: YES), the GET effect setting process is executed (step S1622). In the GET effect setting process, an effect corresponding to the fact that the stopping order of reels 32L, 32M, and 32R matches all the way to the end is executed. Specifically, the text image "GET!" is displayed on the image display device 63. This allows the player to recognize that the stopping order of reels 32L, 32M, and 32R was correct.

Figure 44 (c) is an explanatory diagram illustrating the display content of the image display device 63 when the stopping order of reels 32L, 32M, and 32R is correct in base AT state ST4. When the remaining award number image G21, the acquisition number image G22, and the number of games played image G23 are displayed on the image display device 63, a GET image G26 is displayed, which corresponds to the correct stopping order of reels 32L, 32M, and 32R.

When the processing of step S1620 is executed, when a negative judgment is made in step S1621, or when the processing of step S1622 is executed, the AT effect update processing is executed (step S1623). In the AT effect update processing, settings are made to advance the execution content of the effect in response to the reception of a stop start command. In this case, when a stop start command corresponding to the first stop is received, a stop command is issued to the first reel 32L, 32M, 32R, and stop control of that reel 32L, 32M, 32R is initiated, and the execution content of the effect is advanced in response to that. Furthermore, when a stop start command corresponding to the second stop is received, a stop command is issued to the second reel 32L, 32M, 32R, and stop control of that reel 32L, 32M, 32R is initiated, and the execution content of the effect is advanced in response to that. Additionally, when a stop start command corresponding to the third stop is received, a stop command is issued to the third reel 32L, 32M, 32R, and stop control of those reels 32L, 32M, 32R is initiated, and settings are made to ensure that the performance content progresses in response to this.

If the AT presentation control process receives a winning result command from the main MPU 72 (step S1624: YES), it executes an update process for the display target remaining number counter 94a in the presentation RAM 94 (step S1625). If the number of bets for the current game is "2," this update process ends without executing any process, but if the number of bets for the current game is "3," it executes a process to update the value of the display target remaining number counter 94a. If the number of bets for the current game is "3," and the lottery process for the role in the current game (Figure 16) results in the index value IV = 1 to 6, or 10 being won, then "12," which is the result of subtracting the number of bets (3) from "15," which corresponds to the establishment of the first bell winning, is subtracted from the value of the display target remaining number counter 94a, regardless of the winning result. Furthermore, if an index value IV = 7 to 9 is won, regardless of the winning result, "12" is subtracted from the value of the display target remaining number counter 94a. This is the result of subtracting the bet number "3" from "15" corresponding to the second bell winning, regardless of the winning result. If an index value IV = 11 is won, regardless of the winning result, "2" is subtracted from the value of the display target remaining number counter 94a. This is the result of subtracting the bet number "3" from "5" corresponding to the first watermelon winning, regardless of the winning result. If an index value IV = 12 is won, regardless of the winning result, "2" is subtracted from the value of the display target remaining number counter 94a. This is the result of subtracting the bet number "3" from "5" corresponding to the second watermelon winning, regardless of the winning result. If an index value IV = 13 is won, regardless of the winning result, "1" is subtracted from the value of the display target remaining number counter 94a. This is the result of subtracting the bet number "3" from "4" corresponding to the cherry winning, regardless of the winning result.

Here, when the base AT state ST4 is selected, the remaining award number image G21 corresponding to the value of the display target remaining number counter 94a is displayed on the image display device 63, whereas when the ending AT state ST5 is selected, the remaining award number image G21 corresponding to the value of the display target remaining number counter 94a is not displayed on the image display device 63. In other words, even though the remaining award number image G21 is not displayed on the image display device 63 in the ending AT state ST5, the update process for the display target remaining number counter 94a is executed. This eliminates the need to switch whether to execute the update process for the display target remaining number counter 94a depending on whether the state is the base AT state ST4 or the ending AT state ST5, thereby reducing the processing load. However, this is not limited to this, and the update process for the display target remaining number counter 94a may not be executed in the ending AT state ST5.

Furthermore, in step S1625, if a number of gaming media exceeding the bet number "3" is awarded and the value of the display target remaining number counter 94a is decremented as described above, causing the value of the display target remaining number counter 94a to become 0 or less, a determination is made as to whether the value of the non-display target remaining number counter 94b is 1 or greater. If the value of the non-display target remaining number counter 94b is 1 or greater, the value of the non-display target remaining number counter 94b is added to the display target remaining number counter 94a. As a result, if the value of the non-display target remaining number counter 94b is 1 or greater and the value of the display target remaining number counter 94a becomes 0 or less, the value of the non-display target remaining number counter 94b can be reflected in the remaining awarded number image G21.

Then, the processor executes an update process for the AT acquisition counter 94c in the presentation-side RAM 94 (step S1626). If the number of bets on the current game is "2," the update process ends without executing any process. If the number of bets on the current game is "3," the processor executes a process to update the value of the AT acquisition counter 94c. If the number of bets on the current game is "3," and gaming media have been awarded in the current game, the number of gaming media awarded is added to the AT acquisition counter 94c. In other words, in the update process for the display target remaining number counter 94a, the display target remaining number counter 94a is decremented assuming that the maximum number of gaming media set for the winning index value IV has been awarded to the player, regardless of whether a so-called miss occurred. In contrast, in the update process for the AT acquisition counter 94c, the number of gaming media corresponding to the actual winning result is added to the AT acquisition counter 94c.

For example, if the stopping order of reels 32L, 32M, and 32R matches in a game that wins one of index values IV = 1 to 6, a GET image G26 is displayed on the image display device 63, as shown in FIG. 44(c), the remaining award number image G21 is reduced by 12 from the remaining awarded game media to become "88 remaining," and the acquisition number image G22 is increased by 12 to the acquired game media to become "112 acquired." On the other hand, if the stopping order of reels 32L, 32M, and 32R does not match in that game, a blackout image G25 is displayed on the image display device 63, as shown in FIG. 44(b), the remaining award number image G21 is reduced by 12 from the remaining awarded game media to become "88 remaining," and the number of acquired game media in the acquisition number image G22 remains at "100 acquired" without any addition.

In the AT effect control process, if game end commands A and B are received from the main MPU 72 (step S1627: YES), it is determined whether a transition to the ending AT state ST5 has occurred by determining whether the information on the game state of the current game included in game end command A corresponds to the base AT state ST4 and whether the information on the game state of the next game included in game end command A corresponds to the ending AT state ST5 (step S1628). If a transition to the ending AT state ST5 has occurred (step S1628: YES), the ending AT effect setting process is executed (step S1629). In the ending AT effect setting process, data is set so that an effect corresponding to the ending AT state ST5 is executed. As a result, a display effect corresponding to the ending AT state ST5 is initiated on the image display device 63, and light emission and sound output effects corresponding to the display effect are executed on the upper lamp 61 and speaker 62.

If a transition to the ending AT state ST5 has not occurred (step S1628: NO), the system determines whether the game state information for the current game included in the currently received game end command A corresponds to the base AT state ST4 or the ending AT state ST5, and whether the game state information for the next game included in the game end command A corresponds to the normal game state ST1, thereby determining whether the base AT state ST4 or the ending AT state ST5 has ended and a transition to the normal game state ST1 has occurred (step S1630). If a transition to the normal game state ST1 has occurred (step S1630: YES), the presentation side AT state flag in the presentation side RAM 94 is cleared to "0" (step S1631). This switches the system from a state in which the AT presentation control process (FIG. 42) is being executed to a state in which the normal presentation control process (FIG. 34) is being executed.

Then, the result effect setting process is executed (step S1632). In the result effect setting process, an image is displayed on the image display device 63 to inform the player of the total number of gaming media acquired by the player in the current AT state (base AT state ST4 or ending AT state ST5) and the total number of games played in the current AT state. In this case, the total number of gaming media acquired by the player is displayed as a number corresponding to the value of the AT acquisition number counter 94c in the presentation side RAM 94, and the total number of games played is displayed as a number corresponding to the value of the AT consumption number counter 94d in the presentation side RAM 94. In addition, in the result effect setting process for the ending AT state ST5, the ending completion image G32, described below, is displayed on the image display device 63.

In addition to the above processes, the AT effect control process also executes other processes in step S1633. These other processes execute processes to execute effects or notifications corresponding to the reception of commands other than rotation acceptance commands A and B, stop start commands, winning result commands, and game end commands A and B.

Next, the progression of the display effects when a temporary abnormality in the signal path group 101 occurs while the stop order of reels 32L, 32M, and 32R is being notified will be described with reference to the time charts in Figures 45(a) to 45(g). Figure 45(a) shows the period during which the abnormality in the signal path group 101 occurs, Figure 45(b) shows the execution period of one game, Figure 45(c) shows the timing when the start lever 41 is operated, Figure 45(d) shows the timing when an operation to stop the rotation of reels 32L, 32M, and 32R is performed, Figure 45(e) shows the period during which the stop order of reels 32L, 32M, and 32R is being notified, Figure 45(f) shows the period during which the GET image G26 is displayed on the image display device 63, and Figure 45(g) shows the period during which the blackout image G25 is displayed on the image display device 63.

First, we will explain the case where no abnormality occurs in the signal path group 101 while the stop order of reels 32L, 32M, and 32R is being notified, and the rotation of reels 32L, 32M, and 32R is stopped in the notified stop order.

When the start lever 41 is operated at timing t1, as shown in Figure 45(c), a new game begins as shown in Figure 45(b). The game is executed in the base AT state ST4 or the ending AT state ST5. When one of index values IV = 1 to 6 is selected in the role lottery process (Figure 16) for this game, notification of the stop order of reels 32L, 32M, and 32R begins at timing t1, as shown in Figure 45(e). Thereafter, stop operations for reels 32L, 32M, and 32R are performed at timings t2, t3, and t4, as shown in Figure 45(d), and stop commands are issued to the reels 32L, 32M, and 32R corresponding to the stop operations. In this case, all of these stop operations follow the notified stop order. Therefore, when a third stop occurs at timing t4, the first bell win is achieved. Also, as shown in Figure 45 (f), at timing t4, a GET image G26, which corresponds to the correct stopping order of reels 32L, 32M, and 32R, is displayed on the image display device 63. This GET image G26 continues until the next game starts.

Next, we will explain the case where no abnormality occurs in the signal path group 101 while the stop order of reels 32L, 32M, and 32R is being notified, and the rotation of reels 32L, 32M, and 32R stops in an order different from the notified stop order.

When the start lever 41 is operated at timing t5 as shown in Figure 45(c), a new game begins as shown in Figure 45(b). The game is executed in the base AT state ST4 or the ending AT state ST5. When one of index values IV = 1 to 6 is selected in the role lottery process (Figure 16) for this game, notification of the stop order of reels 32L, 32M, and 32R begins at timing t5 as shown in Figure 45(e). Thereafter, stop operations for reels 32L, 32M, and 32R are performed at timings t6, t7, and t8, respectively, as shown in Figure 45(d), and stop commands are generated for the reels 32L, 32M, and 32R corresponding to the stop operations. In this case, the reels 32L, 32M, and 32R targeted for the second stop are different from the stop order targeted for notification. Therefore, at timing t7, as shown in FIG. 45(g), a blackout image G25 corresponding to the mismatch in the stopping order of reels 32L, 32M, and 32R is displayed on the image display device 63. This blackout image G25 continues until the next game starts.

Next, we will explain the case where an abnormality occurs in the signal path group 101 while the stop order of reels 32L, 32M, and 32R is being announced, and the abnormality in the signal path group 101 is resolved within one game.

When the start lever 41 is operated at timing t9 as shown in Figure 45(c), a new game begins as shown in Figure 45(b). This game is executed in the base AT state ST4 or the ending AT state ST5. If one of index values IV = 1 to 6 is selected in the role selection process (Figure 16) for this game, notification of the stop order of reels 32L, 32M, and 32R begins at timing t9 as shown in Figure 45(e).

Subsequently, at timing t10 during the game, an abnormality occurs in signal path group 101 as shown in Figure 45(a). In this case, even if the main MPU 72 executes processing to send a command, the command is not received by the production MPU 92, and therefore, even if a stop operation is performed at timings t11 and t12 as shown in Figure 45(d), the production MPU 92 does not receive a stop start command.

Then, at time t13, which is before the third stop, the abnormality in the signal path group 101 is resolved as shown in FIG. 45(a). Then, at time t14, the third stop occurs as shown in FIG. 45(d). In this case, the production-side MPU 92 receives the stop start command corresponding to the third stop without receiving the stop start command corresponding to the first stop or the stop start command corresponding to the second stop. Therefore, it determines that the stop order of reels 32L, 32M, and 32R is inconsistent. Therefore, at time t14, as shown in FIG. 45(g), a blackout image G25 corresponding to the inconsistency in the stop order of reels 32L, 32M, and 32R is displayed on the image display device 63. This blackout image G25 continues until the next game starts. Note that the notification of the stop order of reels 32L, 32M, and 32R is terminated when game end commands A and B are received, even if the stop start command corresponding to the first stop or the stop start command corresponding to the second stop has not been received.

With the above configuration, even if the reels 32L, 32M, and 32R are stopped in the notified stopping order, if the production-side MPU 92 determines that the stopping order of reels 32L, 32M, and 32R is inconsistent due to an abnormality in the signal path group 101, a blackout image G25 corresponding to the inconsistency in the stopping order of reels 32L, 32M, and 32R is displayed on the image display device 63. This makes it possible for the amusement hall manager to be made aware of the possibility of some kind of abnormality occurring in the signal path group 101 through information provided by the player.

In addition, without being limited to the above configuration, even if a stop start command corresponding to the third stop is received when the stop start command corresponding to the first stop and the stop start command corresponding to the second stop have not been received, if the type of reels 32L, 32M, 32R to be stopped that are included in the stop start command corresponding to the third stop matches the stop order data stored in the performance side RAM 94, the GET image G26 corresponding to the correct stop order of reels 32L, 32M, 32R may be displayed on the image display device 63. Furthermore, even if a stop start command corresponding to a second stop is received before a stop start command corresponding to a first stop has been received, if the types of reels 32L, 32M, and 32R to be stopped that are included in the stop start command corresponding to the second stop match the stop order data stored in the performance-side RAM 94, and if the types of reels 32L, 32M, and 32R to be stopped that are included in a subsequently received stop start command corresponding to a third stop match the stop order data stored in the performance-side RAM 94, then a GET image G26 indicating that the stop order of reels 32L, 32M, and 32R is correct may be displayed on the image display device 63.

Next, we will explain what happens when an abnormality occurs in the signal path group 101 while the stop order of reels 32L, 32M, and 32R is being announced, and the abnormality in the signal path group 101 is not resolved within one game.

When the start lever 41 is operated at timing t15 as shown in Figure 45(c), a new game begins as shown in Figure 45(b). The game is executed in the base AT state ST4 or the ending AT state ST5. When one of index values IV = 1 to 6 is selected in the role selection process (Figure 16) for this game, notification of the stop order of reels 32L, 32M, and 32R begins at timing t9 as shown in Figure 45(e).

Subsequently, at timing t16 during the game, an abnormality occurs in the signal path group 101, as shown in Figure 45(a). In this case, even if the main MPU 72 executes processing to send a command, the command is not received by the presentation MPU 92. Therefore, even if stop operations are performed at timings t17, t18, and t19 as shown in Figure 45(d), the presentation MPU 92 does not receive a stop start command. Furthermore, even if game end commands A and B are sent from the main MPU 72 upon the end of one game, the game end commands A and B are not received by the presentation MPU 92. Therefore, even after one game has ended, the notification of the stop order of reels 32L, 32M, and 32R on the image display device 63, which began at timing t15 as shown in Figure 45(e), continues.

Then, at timing t20, the start lever 41 is operated as shown in Figure 45(c), starting a new game as shown in Figure 45(b). This game is executed in the base AT state ST4 or the ending AT state ST5. In the role lottery process (Figure 16) for this game, one of index values IV = 1 to 6 is won. However, even in this situation, the abnormality in the signal path group 101 continues as shown in Figure 45(a), and therefore the notification of the stop order of reels 32L, 32M, and 32R on the image display device 63, which began at timing t15 as shown in Figure 45(e), continues as is. In this case, the stop order of reels 32L, 32M, and 32R for which notification continues is different from the stop order that allows the first bell win to be achieved in this game.

Then, at time t21, which is before the first stop occurs in the current game, the abnormality in the signal path group 101 is resolved, as shown in Figure 45(a). However, because time t21 is after rotation acceptance commands A and B are sent from the main MPU 72, the notification of the stop order of reels 32L, 32M, and 32R on the image display device 63, which began at time t15 as shown in Figure 45(e), continues as is. In other words, the image display device 63 is notifying a stop order that is different from the stop order that will result in the first bell winning in the current game. Note that the dual-purpose display unit 66, which is directly controlled by the main MPU 72, displays a display corresponding to the stop order that will result in the first bell winning in the current game.

After that, at times t22, t23, and t24, as shown in Figure 45(d), reels 32L, 32M, and 32R are stopped, and stop commands are issued to the reels 32L, 32M, and 32R corresponding to these stop operations. In this case, the player stops reels 32L, 32M, and 32R in the stop order displayed on the image display device 63 since the start of the previous game. This is a different stop order from the stop order that would result in the first bell winning in the current game, and the first bell winning does not occur. However, this stop order matches the correct stop order stored in the presentation RAM 94 at the start of the previous game. Therefore, the production-side MPU 92 determines that the operation to stop reels 32L, 32M, and 32R has been performed in the correct stopping order, and so at timing t24, as shown in Figure 45 (f), a GET image G26 corresponding to the correct stopping order of reels 32L, 32M, and 32R is displayed on the image display device 63. This GET image G26 continues until the next game starts.

With the above configuration, even if an abnormality in the signal path group 101 causes the notification of the stopping order of reels 32L, 32M, and 32R from the previous game to continue in the current game, resulting in a mismatch between the stopping order of reels 32L, 32M, and 32R that allows the first bell to be won in the current game and the stopping order of reels 32L, 32M, and 32R notified by the image display device 63, the production side MPU 92 will display a GET image G26 on the image display device 63, corresponding to the correct stopping order of reels 32L, 32M, and 32R, if the stopping order of reels 32L, 32M, and 32R notified by the image display device 63 matches the order of the actual stopping operations. This makes it less likely that the GET image G26 will not be displayed on the image display device 63 even if the reels 32L, 32M, and 32R are stopped in the order indicated by the image display device 63.

Next, we will explain, with reference to the time charts in Figures 46(a) through 46(e), how the remaining number of gaming media displayed in the remaining number image G21 on the image display device 63 is corrected to display the correct number of gaming media as the remaining number of gaming media to be awarded is increased in the base AT state ST4. Figure 46(a) shows the period during which an abnormality occurs in the signal path group 101, Figure 46(b) shows the execution period of one game, Figure 46(c) shows the timing when the increase in the number of gaming media to be awarded occurs, Figure 46(d) shows the period during which the increase in the remaining number of gaming media to be awarded is stored in the non-display remaining number counter 94b in the presentation-side RAM 94, and Figure 46(e) shows the period during which a discrepancy occurs between the value of the AT difference number counter 96e and the remaining number of gaming media to be awarded as determined by the presentation-side MPU 92. In addition, the following explanation will refer to Figures 47(a) through 47(c), which are explanatory diagrams illustrating how the effect of increasing the number of gaming media to be awarded is executed on the image display device 63.

First, we will explain the case where no abnormality occurs in the signal path group 101.

As shown in Figure 46(b), one game is played from timing t1 to timing t2 in base AT state ST4. In this case, at timing t1, as shown in Figure 46(c), an additional win occurs in the additional lottery process (step S1001) in the main MPU 72. In the performance MPU 92, a non-display win occurs in the non-display lottery process (step S1610) for the occurrence of the additional win, and therefore the number of awards subject to additional wins is stored in the non-display remaining number counter 94b and becomes a non-display target that is not reflected in the remaining award number image G21, as shown in Figure 46(d).

After that, as shown in Figure 46(b), a new game is played from timing t3 to timing t4. No new additions to the number of awards are made in this game. Then, as shown in Figure 46(b), one game is played from timing t5 to timing t6. In this case, at timing t5, an addition win is made in the addition lottery process (step S1001) in the main MPU 72, as shown in Figure 46(c). Since the non-display lottery process (step S1610) in the performance MPU 92 does not result in a non-display win for the occurrence of this addition, the number of awards that is subject to addition is added to the remaining number to be displayed counter 94a. In this case, the additional award number generated at timing t1 is stored in the non-display remaining number counter 94b, and therefore the resulting number obtained by adding the value stored in the non-display remaining number counter 94b to the award number that became the target of addition at timing t5 is added to the display remaining number counter 94a, and an effect is executed indicating that the award number of the added result has been added, and the award number of the added result is added to the remaining award number in the remaining award number image G21.

Next, we will explain what happens when an abnormality occurs in the signal path group 101.

A new game begins at time t7, as shown in Figure 46(b). Then, at time t8, midway through the game, an abnormality occurs in the signal path group 101, as shown in Figure 46(a). In this case, even if the main MPU 72 executes processing to send a command, the command is not received by the presentation MPU 92. Then, at time t9, the current game ends, as shown in Figure 46(b). In this case, because the presentation MPU 92 is unable to receive the winning result command, although the first watermelon win has occurred in the game, this result is not reflected in the remaining number to be displayed counter 94a. Therefore, at time t9, as shown in Figure 46(e), a discrepancy occurs between the value of the AT difference number counter 96e and the remaining number of awarded gaming media recognized by the presentation MPU 92.

After that, one game is played from timing t10 to timing t11, as shown in Figure 46(b). In this case, at timing t10, as shown in Figure 46(c), an additional win occurs in the additional lottery process (step S1001) in the main MPU 72. However, as shown in Figure 46(a), the abnormality in the signal path group 101 continues even at timing t10, as shown in Figure 46(a). Therefore, because the rotation acceptance commands A and B at the start of the game are not received by the presentation MPU 92, the additional awarded amount is not reflected in either the display target remaining number counter 94a or the non-display target remaining number counter 94b in the presentation RAM 94. This causes a larger discrepancy between the value of the AT difference number counter 96e and the remaining awarded number of gaming media ascertained by the presentation MPU 92.

Then, at t12, after the game from t10 to t11 ends but before a new game begins, the abnormality in the signal path group 101 is resolved as shown in FIG. 46(a). Then, one game is played from t13 to t14 as shown in FIG. 46(b). In this case, the remaining number counter adjustment process (FIG. 43) of step S1607 in the AT effect control process (FIG. 42) is executed at t13, and as shown in FIG. 46(d), the discrepancy between the value of the AT difference number counter 96e and the remaining number of awarded gaming media grasped by the effect-side MPU 92 is stored in the non-display remaining number counter 94b. This resolves the discrepancy between the value of the AT difference number counter 96e and the remaining number of awarded gaming media grasped by the effect-side MPU 92 as shown in FIG. 46(e).

After that, one game is played from t15 to t16 as shown in Figure 46(b). In this case, at t15, as shown in Figure 46(c), an additional win is made in the additional lottery process (step S1001) in the main MPU 72. Since the non-display lottery process (step S1610) for the occurrence of the additional win in the presentation MPU 92 does not result in a non-display win, the number of awards that are subject to the additional win is added to the display target remaining number counter 94a. In this case, the offset number of awards is stored in the non-display target remaining number counter 94b at t13, and therefore the number resulting from adding the value stored in the non-display target remaining number counter 94b to the number of awards that are subject to the additional win at t15 is added to the display target remaining number counter 94a. An effect is executed indicating that the number of awards corresponding to the added number has been added, and the number of awards corresponding to the added number is added to the remaining number of awards in the remaining award number image G21.

In other words, when the remaining award number image G21, the number of wins image G22, and the number of games played image G23 are displayed on the image display device 63 as shown in FIG. 47(a), an additional award number image G27 showing the additional award number is displayed as shown in FIG. 47(b). In this case, the number of awards that were awarded in the current additional award lottery process is 50, but the difference between this and the value of the AT difference number counter 96e stored in the non-display target remaining number counter 94b is 12. Therefore, the additional award number image G27 displays the sum of these, 62, as the number of awards to be added. Then, as shown in FIG. 47(c), the number of awards to be added, displayed as the additional award number image G27, is added to the remaining number of awards displayed as the remaining award number image G21.

With the above configuration, even if an abnormality in the signal path group 101 causes a discrepancy between the value of the AT difference number counter 96e and the remaining number of awarded gaming media as determined by the presentation side MPU 92, the discrepancy is calculated at the start of the first game after the abnormality in the signal path group 101 is resolved, and the calculated discrepancy is stored in the non-display remaining number counter 94b. This makes it possible to resolve the discrepancy between the value of the AT difference number counter 96e and the remaining number of awarded gaming media as determined by the presentation side MPU 92.

In addition, when an addition to the number of awards occurs, the mismatched number of awards stored in the non-display remaining number counter 94b is added to the added number of awards, and the sum is added to the display remaining number counter 94a and reflected in the remaining award number image G21. This makes it possible to reflect the mismatched number of awards in the remaining award number image G21 without creating a sense of incongruity.

<Forced termination of game>
Next, a configuration for forcibly terminating a game as the game continues will be described.

Figure 48 is a flowchart showing the first initialization process for out-of-area use that is called by the CALLI command in step S102 of the main processing (Figure 13) in the master MPU 72. Note that steps S1801 to S1815 in the first initialization process for out-of-area use are executed as out-of-area use processing using the out-of-area processing program and data.

First, a load command is issued to set "LD SP, Y(u+2)" to the stack pointer of the main MPU 72 as a fixed address at the start of non-specific control, Y(u+2) (step S1801). The stack pointer is an area where address information is set, allowing the main MPU 72 to identify the storage area in the stack areas 97 and 99 to which information is to be written in response to a push command. Each time a push command is issued, the stack pointer information is updated to the address of the storage area to be written next. Each time a pop command is issued, the stack pointer information is updated to the address of the storage area to be written previously. Furthermore, when the stack area 99 for out-of-area processing is used, the information to be stored is stored starting from the storage area with the last address in the stack area 99 for out-of-area processing. Each time new information to be stored is added, the storage area to be stored is changed toward the first address in the stack area 99 for out-of-area processing. Therefore, in step S1801, the stack pointer is set to the last address in the stack area 99 for out-of-area processing. This same process of storing information from the memory area with the last address to the memory area with the first address also applies to the stack area 97 for in-area processing.

Then, using a load command with "LD (_WABUF), WA," the information in the WA register of the master MPU 72 is saved to the WA buffer set in the work area 98 for out-of-area processing (step S1802). Also, using a load command with "LD (_BCBUF), BC," the information in the BC register of the master MPU 72 is saved to the BC buffer set in the work area 98 for out-of-area processing (step S1803). Also, using a load command with "LD (_DEBUF), DE," the information in the DE register of the master MPU 72 is saved to the DE buffer set in the work area 98 for out-of-area processing (step S1804). Also, using a load command with "LD (_HLBUF), HL," the information in the HL register of the master MPU 72 is saved to the HL buffer set in the work area 98 for out-of-area processing (step S1805). Furthermore, the information in the IX register of the main MPU 72 is saved to the IX buffer set in the work area 98 for out-of-area processing by a load command as "LD (_IXBUF), IX" (step S1806). Furthermore, the information in the IY register of the main MPU 72 is saved to the IY buffer set in the work area 98 for out-of-area processing by a load command as "LD (_IYBUF), IY" (step S1807).

After steps S1802 to S1807 are executed, initialization processing is performed on the termination determination counter 98b provided in the work area 98 for out-of-area processing (step S1808). As already explained, the termination determination counter 98b is a counter used by the main MPU 72 to identify the trigger for forcibly terminating gameplay as gameplay continues. The first initialization processing for out-of-area processing (Figure 48) is reliably executed without any special operation when the supply of operating power to the main MPU 72 is started and the main processing (Figure 13) is executed. Therefore, the termination determination counter 98b is initialized each time the supply of operating power to the main MPU 72 is stopped and then resumed.

The end judgment counter 98b is a two-byte counter that can take values from "0" to "65535." In this case, when the end judgment counter 98b is initialized, the initial value is set to "46535." Therefore, the value of the end judgment counter 98b will not reach its minimum value until the number of gaming media owned by the player decreases by 46535 from its initial value. When a game is played and the number of gaming media owned by the player decreases, the decrease is subtracted from the end judgment counter 98b. However, if the value of the end judgment counter 98b reverses from the minimum to the maximum value after the subtraction, the value of the end judgment counter 98b is not subtracted. In other words, the decrease in the number of gaming media owned by the player is reflected in the end judgment counter 98b until it reaches 46535, but a decrease exceeding 46535 is not reflected in the end judgment counter 98b. On the other hand, if the value of the end judgment counter 98b increases and reverses from the maximum to the minimum value, the game is forcibly terminated. In other words, if the number of gaming media owned by the player exceeds 19,000 from the initial value of the termination determination counter 98b, the game will be forcibly terminated.

Then, using a load instruction "LD SP, Y(r+a)", the stack pointer of the main MPU 72 is set to Y(r+a) as a fixed address for when returning to in-area processing after the first initialization processing for out-of-area processing is completed (step S1809). Then, using a load instruction "LD WA, (_WABUF)", the information saved in the WA buffer of the work area 98 for out-of-area processing is overwritten in the WA register of the main MPU 72 (step S1810). Also, using a load instruction "LD BC, (_BCBUF)", the information saved in the BC buffer of the work area 98 for out-of-area processing is overwritten in the BC register of the main MPU 72 (step S1811). Furthermore, a load instruction "LD DE, (_DEBUF)" is issued to overwrite the DE register of the primary MPU 72 with the information saved in the DE buffer of the work area 98 for out-of-area processing (step S1812). A load instruction "LD HL, (_HLBUF)" is issued to overwrite the HL register of the primary MPU 72 with the information saved in the HL buffer of the work area 98 for out-of-area processing (step S1813). A load instruction "LD IX, (_IXBUF)" is issued to overwrite the IX register of the primary MPU 72 with the information saved in the IX buffer of the work area 98 for out-of-area processing (step S1814). A load instruction "LD IY, (_IYBUF)" is issued to overwrite the IY register of the primary MPU 72 with the information saved in the IY buffer of the work area 98 for out-of-area processing (step S1815). By executing steps S1810 to S1815, the information in the WA register, BC register, DE register, HL register, IX register, and IY register of the main MPU 72 can be restored to the information corresponding to the in-area processing immediately before the out-of-area processing began.

After steps S1810 to S1815 are executed, the RETI instruction causes a return to the main processing (Figure 13) included in the in-area processing. Execution of the RETI instruction restores the flag register information saved in the stack area 97 for in-area processing before execution of the first initialization processing for outside the area to the flag register of the main MPU 72, and switches the occurrence of timer interrupt processing (Figure 14) from a prohibited state to an permitted state. This restores the information in the flag register of the main MPU 72 to information required to execute in-area processing, and enables new execution of timer interrupt processing.

Figure 49 is a flowchart showing the second initialization process for out-of-area use that is called by the CALLI command in step S107 of the main processing (Figure 13) in the master MPU 72. Note that steps S1901 to S1916 in the second initialization process for out-of-area use are executed as out-of-area use processing using the out-of-area processing program and data.

Steps S1901 to S1907 are identical to steps S1801 to S1807 in the first initialization process for out-of-area processing (Figure 48). After that, initialization of the end determination counter 98b is performed (step S1908), and initialization of the end flag 98c provided in the work area 98 for out-of-area processing is performed (step S1909).

As already explained, the termination determination counter 98b is a counter that allows the main MPU 72 to identify the trigger for forcibly terminating gameplay due to continued gameplay, and the termination flag 98c is a flag that allows the main MPU 72 to identify the situation in which gameplay is forcibly terminated and further gameplay is disabled, as already explained. The second initialization process for out-of-area processing (Figure 48) is executed when the setting value update process (step S108) is executed in the main process (Figure 13), which is activated when the supply of operating power to the main MPU 72 is started. Therefore, if the termination flag 98c is set to "1," forcibly terminating gameplay and disabling further gameplay, the situation in which gameplay is disabled can be resolved and a situation in which gameplay is enabled can be restored by turning the power to the slot machine 10 OFF and then ON again, and inserting the setting key into the setting key insertion hole 57 to turn it ON, thereby executing the setting value update process (step S108). Furthermore, when the end determination counter 98b is initialized, the end determination counter 98b is set to an initial value of "46535".

Then, steps S1910 to S1916 are executed. The processing content of these steps S1910 to S1916 is the same as steps S1809 to S1815 in the first initialization processing for out-of-area use (Figure 48).

Figure 50 is a flowchart showing the end monitoring process called by the CALLI command in step S311 of normal processing (Figure 15) in the main MPU 72. Note that steps S2001 to S2015 in the end monitoring process are executed as out-of-area processing using the out-of-area processing program and out-of-area processing data.

Steps S2001 to S2007 are the same as steps S1801 to S1807 in the first initialization process for out-of-area use (Figure 48). Then, monitoring execution processing is executed (step S2008). The monitoring execution processing will be explained later. Then, steps S2009 to S2015 are executed. The processing content of these steps S2009 to S2015 is the same as steps S1809 to S1815 in the first initialization process for out-of-area use (Figure 48).

<Monitoring execution process>
51 is a flowchart showing the monitoring execution process in step S2008. Note that the processes in steps S2101 to S2110 in the monitoring execution process are executed as out-of-area processing using the out-of-area processing program and out-of-area processing data.

If any replay win has been achieved in the current game (step S2101: YES), the monitoring execution process ends without executing the processes from step S2102 onwards. This is because if a replay win is achieved, the number of medals owned by the player does not increase or decrease.

If no replay wins have been achieved (step S2101: NO), the value of the end determination counter 98b in the work area 98 for out-of-area processing is set to the HL register of the main MPU 72 (step S2102). The result of subtracting the number of gaming media awarded for the current game from the number of bets for the current game is then set to the A register of the main MPU 72 (step S2103). It is then determined whether a carry corresponding to a reversal from the minimum value to the maximum value has occurred as a result of the subtraction (step S2104).

If a positive judgment is made in step S2104, the absolute value of the value in the A register is subtracted from the value in the HL register, and the result is set in the HL register (step S2105). As already explained, the value of the end judgment counter 98b is set in the HL register. In addition, the value obtained by subtracting the number of bets on the current game from the number of gaming media awarded for the current game is set in the A register. In this case, because a positive judgment is made in step S2104, the value obtained by subtracting the number of bets on the current game from the number of gaming media awarded for the current game is a negative value. Therefore, by subtracting the absolute value of this negative value from the value in the HL register, it is possible to reflect the decrease in the number of medals owned by the player in the current game in the end judgment counter 98b.

Then, it is determined whether a carry corresponding to the reversal from the minimum value to the maximum value has occurred in the HL register as a result of the subtraction in step S2105 (step S2106). If a carry has not occurred (step S2106: NO), the value of the HL register is set to the termination judgment counter 98b (step S2107). As a result, the decrease in the number of gaming media owned by the player in this game is reflected in the value of the termination judgment counter 98b. On the other hand, if a carry has occurred (step S2106: YES), the monitoring execution process is terminated without setting the value of the HL register to the termination judgment counter 98b. As a result, the decrease in the number of gaming media owned by the player that falls below the minimum value of the termination judgment counter 98b is not reflected in the value of the termination judgment counter 98b.

If a negative judgment is made in step S2104, the value of the HL register is added to the value of the A register, and the result is set in the HL register (step S2108). As already explained, the value of the end judgment counter 98b is set in the HL register. In addition, the value obtained by subtracting the number of bets on the current game from the number of gaming media awarded for the current game is set in the A register. In this case, because a negative judgment is made in step S2104, the value obtained by subtracting the number of bets on the current game from the number of gaming media awarded for the current game is a positive value. Therefore, by adding this positive value to the value of the HL register, it is possible to reflect the increase in the number of medals owned by the player in the current game in the end judgment counter 98b.

Then, it is determined whether a carry corresponding to the reversal from the maximum value to the minimum value in the HL register has occurred as a result of the addition in step S2108 (step S2109). If a carry has not occurred (step S2109: NO), the value of the HL register is set to the end judgment counter 98b (step S2107). This causes the increase in the number of gaming media owned by the player in this game to be reflected in the value of the end judgment counter 98b. On the other hand, if a carry has occurred (step S2109: YES), this means that the number of gaming media owned by the player has increased by 19,000 from the initial value of the end judgment counter 98b. In this case, the end flag 98c in the work area 98 for outside area processing is set to "1" (step S2110).

<End setting process>
52 is a flowchart showing the end setting process executed in step S313 of the normal process (FIG. 15). Note that steps S2201 to S2203 in the end setting process are executed as intra-area processing using intra-area processing programs and intra-area processing data.

If the termination flag 98c in the work area 98 for out-of-area processing is set to "1" (step S2201: YES), a forced termination command is sent to the production-side MPU 92 (step S2202). Upon receiving the forced termination command, the production-side MPU 92 causes the upper lamp 61, speaker 62, and image display device 63 to issue a notification indicating that the game has been forcibly terminated.

Then, an automatic settlement process is executed (step S2203). In the automatic settlement process, if a value of 1 or greater is stored in the bet number setting counter 96a, the hopper device 53 is controlled and operated so that medals corresponding to the value of the bet number setting counter 96a are paid out to the player. In this case, the value of the bet number setting counter 96a is decremented by 1 each time a medal is paid out, and medals continue to be paid out until the value of the bet number setting counter 96a reaches "0." Also, if a value of 1 or greater is stored in the credit counter 96b, the hopper device 53 is controlled and operated so that medals corresponding to the value of the credit counter 96b are paid out to the player. In this case, the value of the credit counter 96b is decremented by 1 each time a medal is paid out, and medals continue to be paid out until the value of the credit counter 96b reaches "0."

After the automatic settlement process is completed, an interrupt by the timer interrupt process (FIG. 14) is prohibited (step S2204), and then an infinite loop is entered. As a result, the process to progress the game is not executed, and the game is forcibly terminated. To achieve this state of forcibly terminated gameplay, the slot machine 10 must be powered OFF, followed by inserting the setting key into the setting key insertion hole 57 and performing the ON operation, and then powering ON the slot machine 10, so that the setting value update process is executed. Even if the power is powered ON after being powered OFF, if the setting value update process is not executed, the end flag 98c will remain set to "1", and the game will be forcibly terminated again by the end setting process (FIG. 52).

<Displayed when the ending is achieved>
Next, the display contents of the image display device 63 when the ending AT state ST5 ends will be described. Fig. 53(a) is an explanatory diagram for explaining the contents of the image notifying that the ending conditions are approaching to be met in the ending AT state ST5, and Fig. 53(b) is an explanatory diagram for explaining the contents of the image notifying that the ending conditions have been met and the ending AT state ST5 has ended.

When either of the following conditions is met: the value of the total winnings counter 96d in the work area 96 for in-area processing reaches "65421", i.e., the total number of gaming media won since the start of the current second section SC2 reaches 2,300; or the value of the continued games counter 96c in the work area 96 for in-area processing reaches "3,980", i.e., the number of games played since the start of the current second section SC2 reaches 3,980, an image saying "Ending Soon" is displayed on the image display device 63 as a pre-ending image G31 to notify the player that the ending condition is approaching fulfillment, as shown in FIG. 53(a). By checking the pre-ending image G31, the player can understand that the ending AT state ST5 will soon end.

As play continues, the ending AT state ST5 and second section SC2 end when one of the following ending conditions is met: the value of the total number of winnings counter 96d exceeds "65521," meaning that the total number of gaming media won since the start of this second section SC2 exceeds 2,400; or the value of the number of continued games counter 96c reaches "4,000," meaning that the number of games played since the start of this second section SC2 reaches 4,000. In this case, as shown in Figure 53(b), the ending achievement image G32 is displayed on the image display device 63.

The ending completion image G32 displays the word "END" to indicate that the ending conditions have been met and the ending AT state ST5 and second section SC2 have ended, as well as an image to inform the player of the total number of gaming media acquired by the player in the current AT state (base AT state ST4 or ending AT state ST5) and the total number of games played in the current AT state. In this case, the total number of gaming media acquired by the player is displayed as a number corresponding to the value of the AT acquisition counter 94c in the presentation side RAM 94, and the total number of games played is displayed as a number corresponding to the value of the AT consumption counter 94d in the presentation side RAM 94.

<Displayed when forced termination occurs>
Next, the display contents of the image display device 63 when a game is forcibly terminated will be described. Fig. 53(c) is an explanatory diagram for explaining the contents of the image notifying that a game is about to be forcibly terminated, and Fig. 53(d) is an explanatory diagram for explaining the contents of the image notifying that a game has been forcibly terminated.

When the value of the termination determination counter 98b in the work area 98 for out-of-area processing reaches "65385," i.e., when the number of game media owned by the player reaches 18,850 after the supply of operating power to the slot machine 10 is started and the termination determination counter 98b is set to its initial value of "46535," the image display device 63 displays an image reading "150 coins until game termination" as a pre-termination image G33 to notify the player that game termination is approaching, as shown in FIG. 53(c). Furthermore, the number of coins remaining before the forced termination, displayed in this pre-termination image G33, fluctuates depending on the value of the termination determination counter 98b. In other words, if the value of the termination determination counter 98b increases, the number of coins remaining before the forced termination, displayed in the pre-termination image G33, decreases accordingly, and if the value of the termination determination counter 98b decreases, the number of coins remaining before the forced termination, displayed in the pre-termination image G33, increases accordingly. Furthermore, when the value of the end determination counter 98b becomes "65285" or less, the display of the pre-end image G33 is terminated. In other words, the display of the pre-end image G33 begins when the supply of operating power to the slot machine 10 starts and the end determination counter 98b is set to its initial value of "46535", and the number of gaming media owned by the player reaches 18,850, whereas the display of the pre-end image G33 is terminated when the number of gaming media owned by the player falls to 18,750. By checking the pre-end image G33, the player can know that the forced end of the game is approaching, and can also know the number of wins remaining before the forced end of the game occurs.

If gameplay continues, the value of the termination determination counter 98b exceeds "65535." That is, if the number of gaming media owned by the player exceeds 19,000 after the supply of operating power to the slot machine 10 is started and the termination determination counter 98b is set to its initial value of "46535," gameplay is forcibly terminated. In this case, as shown in FIG. 53(d), the image display device 63 displays a forced termination image G34 reading "Payout limit reached. Game stopped." This forced termination image G34 is displayed on the image display device 63 to notify the player that gameplay has been forcibly terminated. This forced termination image G34 remains displayed until the slot machine 10 is powered off. Furthermore, if the slot machine 10 is powered on without the setting value update process being performed and the termination flag 98c remains set to "1," the display of the forced termination image G34 resumes. This allows players and amusement hall managers to understand that gameplay has been forcibly terminated.

<Pre-end notification processing>
54 is a flowchart showing the pre-end notification process executed by the performance-side MPU 92. The pre-end notification process is repeatedly executed at a relatively short interval (for example, every 2 milliseconds) regardless of the game state.

First, it is determined whether a pre-forced termination notification in which the pre-termination image G33 is displayed is in progress (step S2301). If a negative determination is made in step S2301, the value of the termination determination counter 98b contained in the rotation reception command B currently received from the main MPU 72 is determined (step S2302). It is then determined whether the determined value of the termination determination counter 98b is equal to or greater than "65385," which is the start condition for the pre-forced termination notification (step S2303). If the start condition for the pre-forced termination notification is met (step S2303: YES), the pre-forced termination notification setting process is executed (step S2304). This causes the display of the pre-termination image G33 to begin on the image display device 63.

After that, if a pre-ending notification in which a pre-ending image G31 is displayed is being executed (step S2305: YES), the pre-ending notification is terminated (step S2306). As a result, if the display of a pre-ending image G33 begins while the pre-ending image G31 is being displayed on the image display device 63, the display of the pre-ending image G31 is terminated. This makes it possible to prioritize the display of the pre-ending image G33 over the display of the pre-ending image G31, making it easier for the player to recognize that a forced termination of the game is approaching.

If a pre-forced termination notification is being executed (step S2301: YES), the system determines whether a forced termination command has been received from the main MPU 72 (step S2307). The forced termination command is transmitted from the main MPU 72 in step S2202 of the termination setting process (FIG. 52) when the value of the termination determination counter 98b exceeds "65535," i.e., when the number of gaming media owned by the player exceeds 19,000 since the supply of operating power to the slot machine 10 began and the termination determination counter 98b was set to its initial value of "46535." If a forced termination command has been received (step S23078: YES), the system executes a forced termination notification setting process (step S2308). This causes the image display device 63 to begin displaying the forced termination image G34.

If a forced termination command has not been received (step S2307: NO), the value of the termination determination counter 98b contained in the rotation reception command B currently received from the main MPU 72 is determined (step S2308). Then, it is determined whether the determined value of the termination determination counter 98b is less than or equal to "65285," which is the cancellation condition for the forced termination pre-alert (step S2310). This "65285," which corresponds to the cancellation condition for the forced termination pre-alert, is a value less than "65385," which corresponds to the start condition for the forced termination pre-alert, as previously explained. In other words, a forced termination occurs when the value of the termination determination counter 98b exceeds the maximum value of "65535," but the value that serves as the cancellation condition for the forced termination pre-alert is a value that is farther from the value that constitutes the condition for the forced termination than the value that corresponds to the start condition for the forced termination pre-alert.

If the conditions for canceling the pre-forced termination notification are met (step S2310: YES), a process for canceling the pre-forced termination notification is executed (step S2311). This terminates the display of the pre-forced termination image G33 on the image display device 63. If the conditions for canceling the pre-forced termination notification are not met (step S2310: NO), a process for updating the pre-forced termination notification is executed (step S2312). In the process for updating the pre-forced termination notification, the number of wins remaining before the forced termination, displayed in the pre-forced termination image G33, is varied according to the value of the termination determination counter 98b. In other words, if the value of the termination determination counter 98b increases, the number of wins remaining before the forced termination, displayed in the pre-forced termination image G33, is correspondingly decreased; and if the value of the termination determination counter 98b decreases, the number of wins remaining before the forced termination, displayed in the pre-forced termination image G33, is correspondingly increased.

If the pre-forced termination notification is not being executed (step S2301: NO) and the start condition for the pre-forced termination notification is not met (step S2303: NO), it is determined whether the pre-ending notification is being executed (step S2313). If a negative determination is made in step S2313, it is determined whether the value of the continued games counter 96c included in the rotation acceptance command B currently received from the master MPU 72 is equal to or greater than 3980 (step S2314), and it is determined whether the value of the total winnings counter 96d included in the rotation acceptance command B is equal to or greater than 65421 (step S2315). In other words, it is determined whether the number of games executed since the start of the current second section SC2 has reached 3980, and it is determined whether the total number of gaming media won since the start of the current second section SC2 has reached 2300. If a positive determination is made in either step S2314 or step S2315, the pre-ending notification setting process is executed (step S2316). This causes the display of the pre-ending image G31 to begin on the image display device 63. If the ending conditions are met, processing is executed to display the ending achievement image G32 on the image display device 63 during the result effect setting process (step S1632) in the AT effect control process (FIG. 42).

The present embodiment described above provides the following excellent effects:

When one game ends, the game end command A sent from the main MPU 72 to the presentation MPU 92 contains information about the game status of the next game. This allows the presentation MPU 92 to determine the game status information for the next game at the end of the previous game, allowing it to optimally control the execution of presentations corresponding to the game status.

A game end command A containing information about the game state of the next game is sent whether or not a transition in the game state occurs. This eliminates the need to determine whether or not a game end command A needs to be sent depending on whether or not a transition in the game state occurs, simplifying the processing configuration for sending the game end command A.

A game end command A containing information about the game status of the next game is sent for each game. This eliminates the need to determine whether the game is the target for sending the game end command A, simplifying the processing configuration for sending the game end command A.

A game end command A, which includes information about the game status of the next game, is sent when the game is about to end. This makes it possible to fix the timing for sending the game end command A within the scope of one game.

Game end command A, which includes information about the game status of the next game, also includes information about the game status of the current game. This allows the presentation side MPU 92 to identify both the game status information of the current game and the game status information of the next game when it receives game end command A. This allows the presentation side MPU 92 to identify whether or not a change in the game status will occur based on the current game, and to execute presentations that correspond to the results of this identification.

If the game state information for the current game included in the game end command A corresponds to the normal game state ST1, and the game state information for the next game included in the game end command A is the base AT state ST4, the presentation side MPU 92 will start a presentation corresponding to the base AT state ST4, assuming that the base AT state ST4 will start from the next game. This allows the presentation side MPU 92 to optimally control the execution of presentations corresponding to the transition to the base AT state ST4.

When the presentation side MPU 92 receives a rotation acceptance command A including information indicating that the current game corresponds to the base AT state ST4 when a presentation corresponding to the base AT state ST4 is not being executed, the presentation side MPU 92 executes a presentation corresponding to the base AT state ST4. This means that even if the presentation side MPU 92 is unable to identify that a transition from the normal game state ST1 to the base AT state ST4 has occurred in that game due to a communication error or the like, if the communication error is subsequently resolved, the presentation side MPU 92 can identify that the game is in the base AT state ST4 and execute a presentation corresponding to that base AT state ST4.

A termination status area 96k capable of storing information about the game status of the next game is provided in the work area 96 for in-region processing, and the game end command A includes information from this termination status area 96k. This makes it possible to simplify the processing configuration for sending the game end command A in a configuration in which the game end command A is sent including information about the game status of the next game.

The information stored in the end status area 96k is set not only in the game end command A but also in the rotation acceptance command A. This makes it possible for information about the game status of the next game to be sent multiple times at different times in a single game, allowing the production side MPU 92 to appropriately identify information about the game status of the next game.

If a communication abnormality occurs in the signal path group 101 electrically connecting the main MPU 72 and the presentation MPU 92, causing the commands sent from the main MPU 72 to not be received by the presentation MPU 92, and if the communication abnormality is subsequently resolved and rotation acceptance commands A and B are received by the presentation MPU 92, the progression of the presentation content of the premonition effect (real premonition effect or false premonition effect) will differ depending on the game situation. As a result, even if an event occurs in which the presentation MPU 92 is unable to receive commands due to a communication abnormality, the progression of the presentation content of the subsequent premonition effect can be made appropriate depending on the game situation.

Regardless of the game status, if a communication error prevents the presentation MPU 92 from receiving commands while a premonition effect is being executed, the presentation content of that premonition effect will not progress until a new command is received. This makes it possible to prevent the presentation content of the premonition effect from progressing even when a command has not been received from the main MPU 72.

If a communication error causes the presentation MPU 92 to be unable to receive commands while a real premonition effect whose progress is controlled by the main MPU 72 is being executed, and if the presentation MPU 92 subsequently receives rotation acceptance commands A and B, the content of the real premonition effect will be set to the content of the effect corresponding to the value of the standby counter 96f included in the received rotation acceptance commands A and B. This makes it possible to match the content of the real premonition effect to the progress of the game controlled by the main MPU 72, even if a communication error occurs, once the error is resolved. On the other hand, if a communication error causes the presentation MPU 92 to be unable to receive commands while a false premonition effect whose progress is controlled by the presentation MPU 92 is being executed, and if the presentation MPU 92 subsequently receives rotation acceptance commands A and B, the content of the false premonition effect will be set to the content that would have been executed if the communication error had not occurred. This makes it possible to prevent the content of premonition effects whose progress is controlled by the presentation MPU 92 from being skipped.

The main MPU 72 is configured to know that the main premonition effect is being executed based on the value of the standby counter 96f, and the rotation acceptance command B includes information about the standby counter 96f. As a result, even if a communication error occurs during the main premonition effect, the performance MPU 92 can subsequently receive the rotation acceptance command B, allowing the performance MPU 92 to adjust the performance content of the main premonition effect to match the progress of the main premonition effect in the main MPU 72.

The production side MPU 92 uses a false premonition effect counter provided in the production side RAM 94 to determine whether a false premonition effect is being executed and the progress of the false premonition effect. This allows the production side MPU 92 to receive commands normally afterwards, even if a communication error occurs during the false premonition effect, and allows the false premonition effect to proceed with continuity from the effect content immediately before the communication error occurred.

When the presentation side MPU 92 is announcing the stop order of reels 32L, 32M, and 32R, if the rotation of reels 32L, 32M, and 32R is stopped in the announced stop order, the GET image G26 is displayed on the image display device 63 as a correct answer notification, even if the stop order differs from the stop order corresponding to the establishment of a bell win (first bell win or second bell win). It is conceivable that a communication abnormality in the signal path group 101 could cause the presentation side MPU 92 to be unable to grasp the progress of the game, resulting in the announcement of the stop order of reels 32L, 32M, and 32R that will result in a win of index value IV = 1 to 9 and the establishment of a bell win corresponding to that winning combination, continuing even after the end of the game in which the announcement of the stop order of reels 32L, 32M, and 32R was initiated. In this situation, if the communication error in signal path group 101 is resolved from the next game onwards and the presentation-side MPU 92 is able to grasp the progress of the game, it is expected that the player will operate the stop buttons 42-44 in the notified stop sequence of reels 32L, 32M, 32R, even in a game in which a bell win would not be achieved if the stop buttons 42-44 were operated in the stop sequence of reels 32L, 32M, 32R already indicated by the image display device 63. In this case, even if a bell win is not achieved, the GET image G26 will be displayed, allowing the player to understand that the order in which the stop buttons 42-44 were operated corresponds to the stop sequence of reels 32L, 32M, 32R indicated by the image display device 63, and to recognize that the failure to achieve a bell win was not due to an operational error on the player's part.

When the presentation side MPU 92 is announcing the stop order of reels 32L, 32M, and 32R, if the reels 32L, 32M, and 32R stop in a different stop order than the announced stop order, a blackout image G25 will be displayed on the image display device 63 as an incorrect answer notification, even if the stop order matches the stop order corresponding to the establishment of a bell win (first bell win or second bell win). It is conceivable that a communication abnormality in the signal path group 101 could cause the presentation side MPU 92 to be unable to grasp the progress of the game, resulting in the announcement of the stop order of reels 32L, 32M, and 32R that will result in a win of index value IV = 1-9 and the establishment of a bell win corresponding to that winning combination, continuing even after the end of the game in which the announcement of the stop order of reels 32L, 32M, and 32R was initiated. In this situation, if the communication abnormality in signal path group 101 is resolved in the next game or later and the progress of the game can be grasped by production-side MPU 92, it is assumed that a new winning combination will occur in that game with index value IV = 1 to 9 and the stop order of reels 32L, 32M, 32R corresponding to that winning combination will be different from the stop order of reels 32L, 32M, 32R already notified by image display device 63. In this situation, even if a player accidentally operates stop buttons 42 to 44 in the stop order of reels 32L, 32M, 32R corresponding to the newly winning combination in that game instead of the stop order of reels 32L, 32M, 32R notified by image display device 63, and a bell win will be achieved, but because the stop order of reels 32L, 32M, 32R is not the stop order of reels 32L, 32M, 32R notified by image display device 63, a blackout image G25 will be displayed on image display device 63. This allows the player to recognize that a bell win has been achieved even if the stop buttons 42-44 are operated in a different stop order from the stop order notified on the image display device 63.

When the winning combination results in an index value IV = 1-9 during the lottery process and the stop order of reels 32L, 32M, and 32R is announced, the announcement corresponding to that stop order is executed on the dual-purpose display unit 66 under the display control of the main MPU 72. As a result, even if the incorrect stop order of reels 32L, 32M, and 32R is announced on the image display device 63 due to a communication abnormality in the signal path group 101 that prevents the performance MPU 92 from understanding the progress of the game, the correct stop order of reels 32L, 32M, and 32R can be ascertained by checking the dual-purpose display unit 66 controlled by the main MPU 72.

In the base AT state ST4, if one of the index values IV = 1 to 9 is won in the role lottery process, and regardless of whether the bell win corresponding to that winning role is achieved or not, the AT difference number counter 96e is decremented by the amount corresponding to the bell win. This makes it possible to update the value of the AT difference number counter 96e toward "0", which corresponds to the termination information, regardless of the order in which the player operates the stop buttons 42 to 44, when one of the index values IV = 1 to 9 is won in the base AT state ST4.

In the base AT state ST4, the remaining award number image G21 corresponding to the remaining number of awards of gaming media is displayed on the image display device 63. When an index value IV = 1-9 is selected during the role lottery process in the base AT state ST4, the display content of the remaining award number image G21 is updated to correspond to the Bell award, regardless of whether the Bell award corresponding to that winning role is achieved or not. As a result, if a communication error in the signal path group 101 occurs and the Stop buttons 42-44 are operated in the stop order of reels 32L, 32M, and 32R reported by the image display device 63 but the Bell award is not achieved, not only is the GET image G26 executed but the content of the remaining award number image G21 is updated, even if the Bell award is not achieved. This allows the player to understand that the operation of the Stop buttons 42-44 corresponded to the stop order of reels 32L, 32M, and 32R reported by the image display device 63, and to recognize that the failure to achieve the Bell award was not due to an operational error on the player's part.

In the base AT state ST4, the acquired number image G22 is displayed on the image display device 63, allowing the player to grasp the number of gaming media acquired in the base AT state ST4. In this case, if the player wins one of the index values IV = 1 to 9 in the role lottery process and a bell win is achieved, the content of the acquired number image G22 is updated to the amount corresponding to the bell win, but if a bell win is not achieved, the content of the acquired number image G22 is not updated to the amount corresponding to the bell win. This makes it possible to increase the accuracy of the content of the acquired number image G22.

In the base AT state ST4, a remaining award number image G21 corresponding to the remaining awarded number of gaming media in the base AT state ST4 is displayed on the image display device 63. This allows the player to understand when the base AT state ST4 will end by checking the remaining award number image G21. In this case, the presentation side MPU 92 uses the value information of the AT difference number counter 96e contained in the rotation acceptance command B received from the main side MPU 72 to determine whether the remaining awarded number of gaming media known to the presentation side MPU 92 is accurate, and if it determines that it is not accurate, it can then correct the display content of the remaining award number image G21. This makes it possible to increase the accuracy of the content of the remaining award number image G21.

The rotation acceptance command B includes information about the value of the AT difference number counter 96e. This allows the performance side MPU 92 to modify the display content of the remaining award number image G21 using the information in the rotation acceptance command B received from the main side MPU 72.

The presentation side MPU 92 updates the display content of the remaining award number image G21 according to the game result using information contained in the winning result command sent from the main side MPU 72 at the end of the game, and corrects the display content of the remaining award number image G21 using information contained in the rotation acceptance command B sent from the main side MPU 72 at the start of the game. This makes it possible to appropriately update the content of the remaining award number image G21 on the image display device 63 according to the execution of the game in the base AT state ST4, and to appropriately correct the value of the display target remaining number counter 94a to make the content of the remaining award number image G21 accurate.

Each time the production side MPU 92 receives a rotation acceptance command B, it determines whether the value of the AT difference number counter 96e included in the rotation acceptance command B matches the sum of the value of the display target remaining number counter 94a and the value of the non-display target remaining number counter 94b, thereby determining whether the value of the display target remaining number counter 94a should be corrected. If it determines that correction is necessary, the discrepancy is calculated and added to the non-display target remaining number counter 94b, and then the value of the non-display target remaining number counter 94b is added to the display target remaining number counter 94a. This makes it possible to increase the frequency with which the remaining number of awarded gaming media in the base AT state ST4, as determined by the production side MPU 92, is corrected to an accurate value.

When the discrepancy is added to the non-display target remaining number counter 94b, the added value is also added to the display target remaining number counter 94a when the remaining number of awarded gaming media in the base AT state ST4 is added to the display target remaining number counter 94a. This makes it possible to avoid causing discomfort to the player when modifying the contents of the remaining award number image G21.

If gaming media exceeding the bet amount are awarded during game execution, the excess value is added to the end judgment counter 98b. If the value of the end judgment counter 98b exceeds its maximum value and reverts from the maximum value to the minimum value, further game progress is blocked. This makes it possible to block further game progress if the number of gaming media acquired by the player as the game continues to be played reaches a number that would block game progress. In this case, when the value of the end judgment counter 98b reaches "65385," a value slightly less than the maximum value of the end judgment counter 98b, a pre-end image G33 is displayed in a partial area of the image for the effect corresponding to the AT state (base AT state ST4 or ending AT state ST5) on the image display device 63. This makes it possible for a player who is paying attention to the effect corresponding to the AT state to recognize that a situation in which game progress will be blocked is approaching in relation to the value of the end judgment counter 98b.

When the pre-end image G33 is displayed on the image display device 63, the display of the pre-end image G33 is terminated when the value of the end determination counter 98b reaches "65285," which is less than the "65385" value that triggers the start of the display of the pre-end image G33. This prevents the pre-end image G33 from continuing even in situations where the possibility of the game's progress being blocked has decreased due to the value of the end determination counter 98b. Furthermore, by setting the value of the end determination counter 98b that triggers the end of the display of the pre-end image G33 to a value smaller than the value of the end determination counter 98b that triggers the start of the display of the pre-end image G33, it is possible to prevent the start and end of the display of the pre-end image G33 from being repeated in a short period of time.

Even if the AT state ends while the pre-end image G33 is being displayed on the image display device 63, the pre-end image G33 will continue to be displayed in the subsequent normal game state ST1. This makes it possible to display the pre-end image G33 regardless of the game state in situations where there is a high possibility that game progress will be blocked due to the value of the end determination counter 98b.

When a predetermined situation occurs in which the ending conditions for the second section SC2 are close to being met, the image display device 63 displays a pre-ending image G31. This allows the player to recognize that the ending conditions for the second section SC2 are close to being met. In this case, the display of the pre-ending image G33 takes priority over the display of the pre-ending image G31. This makes it possible to focus on notifying the player that a situation is approaching in which game progress will be blocked in relation to the value of the end determination counter 98b, rather than that the ending conditions for the second section SC2 are close to being met.

Even in a situation where the display of the pre-ending image G33 is given priority over the display of the pre-ending establishment image G31, if the supply of operating power is newly started and the value of the end determination counter 98b is initialized, ending the display of the pre-ending establishment image G31. This makes it possible to ensure the display of the pre-ending establishment image G31 when the pre-ending establishment image G33 is not displayed, even in a configuration where the display of the pre-ending image G33 is given priority over the display of the pre-ending establishment image G31.

When the total number of games played in the second section SC2 in the base AT state ST4 reaches 3,950 or more, or when the number of gaming media acquired by the player reaches 2,200 or more, the state transitions to the ending AT state ST5. The ending AT state ST5 continues until the ending conditions of the second section SC2 are met, regardless of the value of the AT difference number counter 96e. As a result, if the base AT state ST4 continues and the conditions for transitioning to the ending AT state ST5 are met, the AT state favorable to the player will continue until the ending conditions of the second section SC2 are met, allowing the player to expect that the conditions for transitioning to the ending AT state ST5 will be met in the base AT state ST4.

If one of the index values IV = 1 to 13 is won in the role lottery process (Figure 16) in the base AT state ST4, regardless of the winning result, the value of the AT difference number counter 96e is subtracted by the amount obtained by subtracting the number of bets from the maximum number of gaming media awarded set for that winning index value IV. This makes it impossible to delay the end of the base AT state ST4 by deliberately preventing a winning result. On the other hand, the total number of gaming media counter 96d, which is used to determine whether the ending conditions of the second section SC2 have been met, will reflect the number of gaming media corresponding to the winning result that actually occurred. This makes it possible to prevent the ending conditions of the second section SC2 from being met when the player has not won the specified number of gaming media.

In a game that could be the final game of the base AT state ST4, a LAST display is executed on the image display device 63 to allow the player to recognize that this is the final game, whereas the LAST display is not executed in a game that could be the final game of the ending AT state ST5. In the base AT state ST4, if one of index values IV = 1 to 13 is won in the role lottery process in a game that could be the final game, the number of gaming media corresponding to that winning is reflected in the AT difference number counter 96e regardless of whether a winning occurs, and the base AT state ST4 ends with that game. Therefore, by executing the LAST display in that game, it is possible to clearly recognize that this is the final game of the base AT state ST4. On the other hand, in the ending AT state ST5, even if one of index values IV = 1 to 13 is won in the lottery process for a game that could be the final game, unless the corresponding winning combination is achieved, the number of game media corresponding to that winning combination will not be reflected in the total number of winnings counter 96d. Therefore, depending on how the player operates the stop buttons 42 to 44, the ending AT state ST5 for that game will not end. Therefore, by not displaying the LAST in that game, it is possible to prevent the player from becoming confused because the ending AT state ST5 does not end even though the LAST display has been displayed.

In the base AT state ST4, an additional bonus may occur that delays the end of the base AT state ST4, whereas in the ending AT state ST5, this additional bonus does not occur. This allows the player to expect an additional bonus to occur in the base AT state ST4, while simplifying the processing configuration in the ending AT state ST5.

Even if the value of the AT difference counter 96e in the base AT state ST4 has not reached a value that allows the ending conditions of the second section SC2 to be met, if the number of games played or the total number of gaming media acquired in the second section SC2 reaches a value that corresponds to the meeting of the conditions for transitioning to the ending AT state ST5, the state will transition to the ending AT state ST5. The ending AT state ST5 then continues until the ending conditions of the second section SC2 are met. As a result, the player will play in the base AT state ST4 in the hope that the number of games played or the total number of gaming media acquired in the second section SC2 will reach a value that corresponds to the meeting of the conditions for transitioning to the ending AT state ST5.

In the base AT state ST4, information corresponding to the value of the AT difference number counter 96e is displayed as the remaining number of awards image G21. This allows the player to understand when the base AT state ST4 will end. On the other hand, in the ending AT state ST5, information regarding the execution of games required until the ending conditions are met is not displayed. This allows the player to expect the ending AT state ST5 to continue for a long time.

The various processes executed by the main MPU 72 are divided into in-area processes and out-area processes. When out-area processes are started after in-area processes are being executed, the information stored in the flag register of the main MPU 72 is saved to the stack area 97 for in-area processes. After the out-area processes are completed, the information saved in the stack area 97 for in-area processes is restored to the flag register of the main MPU 72. This prevents the information stored in the flag register when in-area processes are being executed from being overwritten when out-area processes are being executed. In this case, the specified update process for updating the value of the end determination counter 98b is included in the out-area processes. This makes it possible to update the value of the end determination counter 98b without increasing the program capacity required for in-area processes.

The processing for preventing game progress after the value of the end determination counter 98b exceeds its maximum value is included in the in-area processing. This makes it possible to consolidate processing related to game progress into the in-area processing.

When the supply of operating power is newly started, the end determination counter 98b is initialized, and the process for this initialization is included in the out-of-area processing. This makes it possible to consolidate the process for updating the value of the end determination counter 98b into the out-of-area processing.

The processing for updating the value of the AT difference number counter 96e, the processing for updating the value of the continued game number counter 96c, and the processing for updating the value of the total number of wins counter 96d are included in the in-area processing. This makes it possible to consolidate the processing related to transitions in the game state into the in-area processing.

<Alternative to the First Embodiment>
The following configuration may be applied to the configuration described in the first embodiment. Also, the following configuration may be applied to the configuration described in the embodiments described later, or to a configuration in which the configuration described in the embodiments described later is applied to the first embodiment.

(1) The configuration is not limited to one in which game end command A includes both information about the game status of the current game and information about the game status of the next game; one of game end command A and game end command B may include information about the game status of the current game, and the other of game end command A and game end command B may include information about the game status of the next game.

Furthermore, the configuration is not limited to one in which rotation acceptance command A contains information about the game status of both the current game and the next game; one of rotation acceptance command A and rotation acceptance command B may contain information about the game status of the current game, and the other of rotation acceptance command A and rotation acceptance command B may contain information about the game status of the next game.

(2) It is also possible for either rotation acceptance command A or B to contain information about the game status of the current game, while neither rotation acceptance command A nor B contains information about the game status of the next game; or for either game end command A or B to contain information about the game status of the next game, while neither game end command A nor B contains information about the game status of the current game. In this case, the production side MPU 92 can grasp information about the game status of the current game from rotation acceptance command A or B, and can grasp information about the game status of the next game from game end command A or B.

(3) The timing at which game end commands A and B are sent is not limited to the timing immediately before the acceptance permission process (step S316) is executed, but may be any timing within the range of the timing after the response process at the end of play (step S310) is executed and up to the timing at which a new game can be played. For example, game end commands A and B may be sent after the external output setting process of step S312 is executed and before the end setting process of step S313 is executed.

(4) The presentation side MPU 92 may be configured to determine whether to transition to the second section SC2 based on the information on the play section of the current game and the information on the play section of the next game included in the game end command A, and if it determines to transition to the second section SC2, to execute a presentation corresponding to the second section SC2. This allows the presentation side MPU 92 to start a presentation corresponding to the second section SC2 even if the main side MPU 72 is not configured to send a command indicating that the game has transitioned to the second section SC2.

The presentation side MPU 92 may also be configured to determine whether to transition to the first section SC1 based on the information on the play section of the current game and the information on the play section of the next game included in the game end command A, and if it determines to transition to the first section SC1, to execute a presentation corresponding to the first section SC1. This allows the presentation side MPU 92 to start a presentation corresponding to the first section SC1 even if the main MPU 72 is not configured to send a command indicating that the game has transitioned to the first section SC1.

(5) The configuration is such that the handling of the effects after a communication abnormality is resolved differs between when a communication abnormality in the signal path group 101 occurs while this premonition effect is being executed and when a communication abnormality in the signal path group 101 occurs while a false premonition effect is being executed. However, the configuration may also be such that the handling of the effects after a communication abnormality is resolved differs between when a communication abnormality in the signal path group 101 occurs while the player is in a bonus state that is advantageous to the player and when a communication abnormality in the signal path group 101 occurs while the player is in a normal game state that is not a bonus state. The configuration may also be such that the handling of the effects after a communication abnormality is resolved differs between when a communication abnormality in the signal path group 101 occurs while the player is in an AT state and when a communication abnormality in the signal path group 101 occurs while the player is not in the AT state. The configuration may also be such that the handling of the effects after a communication abnormality is resolved differs between when a communication abnormality in the signal path group 101 occurs while the player is in the first section SC1 and when a communication abnormality in the signal path group 101 occurs while the player is in the second section SC2.

(6) The production-side MPU 92 may be configured to determine whether a communication abnormality has occurred in the signal path group 101. Specifically, when one game is played, the main-side MPU 72 sends various commands in a predetermined order: bet setting command → spin acceptance commands A and B → spin start command → stop enable command → first stop start command → second stop start command → third stop start command → all reel stop command → symbol command → winning result command → game end commands A and B. In this configuration, when the production-side MPU 92 receives a command from the main-side MPU 72, it determines whether the command matches the predetermined order of the previously received command, and if it determines that the command does not match, it determines that a communication abnormality has occurred. This makes it possible for the production-side MPU 92 to determine whether a communication abnormality has occurred in the signal path group 101.

When it is determined that a communication error has occurred, the production-side MPU 92 may be configured to change the execution mode of the effect currently being executed to a mode that corresponds to the occurrence of the communication error. For example, when it is determined that a communication error has occurred, it may be configured to stop the effect currently being executed at that time, or when it is determined that a communication error has occurred, it may be configured to change the content of the effect currently being executed to a content that corresponds to the occurrence of the communication error, or when it is determined that a communication error has occurred, it may be configured to skip the content of the effect currently being executed to the content of the final stage of the effect.

(7) If a communication error occurs in the signal path group 101 while the premonition effect is being executed, the execution of the premonition effect may be terminated at that point if the communication error is subsequently resolved. Furthermore, if a communication error occurs in the signal path group 101 while the premonition effect is being executed, the performance content of the premonition effect may be skipped to the performance content of the final stage regardless of the value of the standby counter 96f if the communication error is subsequently resolved. The configuration for identifying that a communication error has occurred in the performance-side MPU 92 may be the configuration described in (6) above.

(8) If a communication error occurs in the signal path group 101 while a false premonition effect is being executed, the execution of the false premonition effect may be terminated at that point if the communication error is subsequently resolved. Furthermore, if a communication error occurs in the signal path group 101 while a false premonition effect is being executed, the execution of the false premonition effect may be skipped to the execution of the final stage if the communication error is subsequently resolved. Furthermore, if a communication error occurs in the signal path group 101 while a false premonition effect is being executed, the execution of the false premonition effect may be restarted from the beginning if the communication error is subsequently resolved. The configuration for identifying that a communication error has occurred in the performance-side MPU 92 may be the configuration described in (6) above.

(9) When an index value IV = 1 to 9 is selected in the role selection process (Fig. 16) and the stop order of reels 32L, 32M, and 32R that allows for the formation of a bell win corresponding to the selected index value IV is announced on the image display device 63, if the stop buttons 42 to 44 are operated in accordance with the stop order of reels 32L, 32M, and 32R but the production-side MPU 92 does not receive a win result command corresponding to the formation of a bell win, a corresponding announcement may be made. In this case, the announcement may be made together with the display of a GET image G26 on the image display device 63, or may be made in place of the display of a GET image G26 on the image display device 63.

(10) In the role lottery process (Figure 16), if an index value IV = 1 to 9 is selected, a bell win is achieved when the reels 32L, 32M, and 32R stop spinning in the stop order corresponding to the selected index value IV. However, a bell win may also be achieved when the stop buttons 42 to 44 are operated at a predetermined timing relative to the rotation position of a specific reel 32L, 32M, or 32R for that specific reel 32L, 32M, or 32R. In this case, as a notification to enable the bell win to be achieved, the image display device 63 displays a notification that enables the player to specify the timing at which to operate the stop buttons 42 to 44 for that specific reel 32L, 32M, or 32R. Furthermore, in this configuration, if the stop buttons 42-44 are operated at the timing indicated by the image display device 63 to stop a specific reel 32L, 32M, or 32R, a GET image G26 is displayed, and if the stop buttons 42-44 are not operated at the timing indicated by the image display device 63 to stop a specific reel 32L, 32M, or 32R, a blackout image G25 may be displayed.

(11) In the base AT state ST4, the number of gaming media awarded when the winning data set for the winning index value IV that awards the largest number of gaming media is won is subtracted by "3", which is the number of bets for the current game, from the number of gaming media awarded. This result is subtracted from the AT difference number counter 96e regardless of whether the winning data is awarded or not. However, this is not limited to this, and the AT difference number counter 96e may also be subtracted by "3", which is the number of gaming media awarded for the current game, from the number of gaming media corresponding to the actual winning.

(12) The base AT state ST4 is configured to end when the remaining number of gaming media awarded reaches "0," but this is not limited to this. When the base AT state ST4 starts, for example, 50 games may be awarded as the initial number of games, and the state may end when the remaining number of games reaches "0." Furthermore, when the base AT state ST4 starts, for example, 200 coins may be awarded as the initial number of payouts, and the state may end when the remaining number of gaming media to be paid out reaches "0." In this case, the payout number refers to the number of medals and virtual medals paid out to the player when a win is achieved, and is a number that does not take into account the number of bets on each game.

(13) When a game with a bet number of "2" is executed in the base AT state ST4, the result of the game is not reflected in the AT difference number counter 96e. However, instead, even if a game with a bet number of "2" is executed in the base AT state ST4, the result of the game may be reflected in the AT difference number counter 96e.

(14) In the second section SC2, the result of subtracting the number of bets on the current game from the number of gaming media awarded corresponding to the actual winning win is added to the total winning number counter 96d. However, this is not limited to this, and the result of subtracting the number of bets on the current game from the number of gaming media awarded when the winning data that is the largest number of gaming media awarded among the winning data set for the winning index value IV is awarded may also be added to the total winning number counter 96d.

(15) In the second section SC2, the result of subtracting the number of bets placed on the current game from the number of gaming media awarded corresponding to the actual winnings is measured using the total winnings counter 96d, but this is not limited to this, and the number of gaming media awarded corresponding to the actual winnings may also be measured using a total payout counter. In this case, when the value of the total payout counter reaches a value corresponding to the realization of the ending condition (for example, 3,000 coins), the ending condition is realized and the second section SC2 ends.

(16) The presentation-side RAM 94 may not be provided with a non-display target remaining number counter 94b. In this case, if it is determined in the AT presentation control process (FIG. 42) that an addition to the remaining number of game media to be awarded has occurred (step S1609: YES), the number of awards to be added will be added to the display target remaining number counter 94a and reflected in the remaining award number image G21 without the processes of steps S1610 and S1611 being executed. Also, if a discrepancy is calculated in the remaining number counter adjustment process (FIG. 43) (step S1702), the discrepancy will be added to the display target remaining number counter 94a and reflected in the remaining award number image G21.

(17) The timing at which the value of the non-display target remaining number counter 94b is added to the display target remaining number counter 94a is not limited to the timing at which the remaining number of awarded gaming media is increased or the timing at which the value of the display target remaining number counter 94a becomes 0 or less due to the award of a number of gaming media exceeding the bet number of "3" and the decrement of the value of the display target remaining number counter 94a. For example, when the value of the non-display target remaining number counter 94b is 1 or greater, an addition lottery process may be executed, and if an addition win is made in the addition lottery process, the value of the non-display target remaining number counter 94b may be added to the display target remaining number counter 94a. Furthermore, when the value of the non-display target remaining number counter 94b is 1 or greater, the value of the display target remaining number counter 94a may be added to the display target remaining number counter 94a when the value of the display target remaining number counter 94a becomes a predetermined value (e.g., "20") or less.

(18) In the base AT state ST4, the display content of the remaining awarded number image G21 is modified based on a command received from the main MPU 72. However, in addition to or instead of this, the display content of the acquired number image G22 or the number of games played image G23 may also be modified.

(19) The determination of whether the remaining number of gaming media awarded in the base AT state ST4 grasped by the presentation side MPU 92 (the sum of the value of the display target remaining number counter 94a and the value of the non-display target remaining number counter 94b) matches the remaining number of gaming media awarded in the base AT state ST4 grasped by the main side MPU 72 (the value of the AT difference number counter 96e) may be performed using a game end command B sent from the main side MPU 72 at the end of the game, rather than using a rotation acceptance command B sent from the main side MPU 72 at the start of the game.

(20) The content of the presentation in the AT state (base AT state ST4 and ending AT state ST5) may be configured to change in stages depending on the value of the end determination counter 98b. For example, the background color displayed on the image display device 63 in the AT state may be configured to change depending on the value of the end determination counter 98b, and the type and color of the character displayed on the image display device 63 in the AT state may be configured to change depending on the value of the end determination counter 98b.

(21) The termination determination counter 98b is used to measure the total number of gaming media awarded corresponding to the actual winnings minus the number of bets on the current game, and the game is forcibly terminated when the measurement result reaches a value corresponding to a forced termination. However, this is not limited to this. The termination determination counter 98b may be used to measure the total number of gaming media awarded when the winning data set for the winning index value IV that gives the largest number of gaming media is awarded minus the number of bets on the current game, and the game may be forcibly terminated when the measurement result reaches a value corresponding to a forced termination. Alternatively, the total number of gaming media awarded corresponding to the actual winnings may be measured, and the game may be forcibly terminated when the measurement result reaches a value corresponding to a forced termination.

(22) The value of the end determination counter 98b, which is the reference for starting the display of the pre-end image G33, may be different between the AT state (base AT state ST4 and ending AT state ST5) and the normal gaming state ST1. In this case, by configuring the value of the end determination counter 98b, which is the reference for starting the display of the pre-end image G33 in the normal gaming state ST1, to be greater than the value of the end determination counter 98b, which is the reference for starting the display of the pre-end image G33 in the AT state, it is possible to make the pre-end image G33 less likely to be displayed in the normal gaming state ST1 than in the AT state. Furthermore, in this configuration, even if the pre-end image G33 is displayed when the AT state ends, if the value of the end determination counter 98b is less than the reference value for starting the display of the pre-end image G33 in the normal gaming state ST1, the display of the pre-end image G33 may be terminated when transitioning to the normal gaming state ST1.

(23) Although the pre-end image G33 is configured to be displayed even in the normal gaming state ST1, it may alternatively be configured not to display the pre-end image G33 in the normal gaming state ST1. Also, although the pre-end image G33 is configured to be displayed even in the first section SC1, it may alternatively be configured not to display the pre-end image G33 in the first section SC1.

(24) Even if the ending conditions are met and the second section SC2 ends when the pre-end image G33 is displayed in the ending AT state ST5, the pre-end image G33 continues to be displayed in the subsequent first section SC1. However, if the ending conditions are met and the second section SC2 ends when the pre-end image G33 is displayed, the display of the pre-end image G33 may also be terminated.

(25) Although the configuration is such that the value of the end determination counter 98b is initialized when the supply of operating power begins, even if no operation is performed, this is not limited to this. The value of the end determination counter 98b may not be initialized if the supply of operating power begins but a predetermined operation is not performed, and the value of the end determination counter 98b may be initialized if the supply of operating power begins and a predetermined operation is performed. This allows the amusement hall manager to choose whether or not to initialize the value of the end determination counter 98b when the supply of operating power begins, depending on whether or not a predetermined operation is performed.

(26) Although the configuration is such that the end flag 98c is not initialized unless the set value update process is executed when the supply of operating power is started, this is not limited to this. The configuration may be such that the end flag 98c is initialized when a predetermined operation (for example, turning on the start lever 41 or turning on the stop buttons 42 to 44) is performed even if the set value update process is not executed when the supply of operating power is started, or the configuration may be such that the end flag 98c is initialized when the supply of operating power is started even if no operation is performed.

(27) Regardless of the value of the AT difference number counter 96e, when the value of the continuing game number counter 96c or the value of the total number of wins counter 96d becomes a value corresponding to a transition to the ending AT state ST5 and a positive judgment is made in step S1103 or step S1104, the transition from the base AT state ST4 to the ending AT state ST5 occurs. However, this is not limited to this, and the transition from the base AT state ST4 to the ending AT state ST5 may also occur when the value of the AT difference number counter 96e becomes a value that allows the ending condition to be met and the value of the continuing game number counter 96c or the value of the total number of wins counter 96d becomes a value corresponding to a transition to the ending AT state ST5.

(28) When the value of the continuing game number counter 96c or the value of the total number of wins counter 96d reaches a value corresponding to a transition to the ending AT state ST5 and a positive judgment is made in step S1103 or step S1104, a transition from the base AT state ST4 to the ending AT state ST5 occurs. However, the transition from the base AT state ST4 to the ending AT state ST5 may not occur based on the value of the continuing game number counter 96c, and the transition from the base AT state ST4 to the ending AT state ST5 may not occur based on the value of the total number of wins counter 96d.

(29) In the final game of the base AT state ST4, the word "LAST" is displayed on the image display device 63, whereas in the final game of the ending AT state ST5, the word "LAST" is not displayed on the image display device 63. However, the word "LAST" may be displayed on the image display device 63 in the final game of the ending AT state ST5. In this configuration, if the index value IV = 1 to 9 is selected in the role selection process (FIG. 16) in a game that could be the final game of the ending AT state ST5, but the rotation of reels 32L, 32M, and 32R is not stopped in the corresponding stop order, the bell will not be awarded, and the game will not be the final game, and the next game will again be a game that could be the final game. In this case, the word "LAST" may be displayed on the image display device 63 in all games that could be the final games in the ending AT state ST5. Furthermore, if the word "LAST" is displayed on the image display device 63 but a bell is not won in that game, causing the ending AT state ST5 to continue until the next game, the word "LAST" may not be displayed on the image display device 63 in that next game.

(30) When the transition condition from the base AT state ST4 to the ending AT state ST5 is met (when a positive judgment is made in step S1103 or step S1104), if it is determined that forced termination of gameplay will occur based on the value of the termination judgment counter 98b before the ending condition of the second section SC2 is met, in relation to the value of the termination judgment counter 98b, the execution content of the effects in the ending AT state ST5 may be configured to correspond to that execution content. For example, the ending AT state ST5 may be configured to execute an effect corresponding to the number of games expected to be played until forced termination of gameplay occurs based on the value of the termination judgment counter 98b. Furthermore, in this configuration, if the supply of operating power is temporarily stopped during the ending AT state ST5 and then restarted, the value of the termination judgment counter 98b will be initialized. In this case, after the supply of operating power is restarted, the ending AT state ST5 will continue until the ending condition is met. Therefore, in this case, the effect of the ending AT state ST5 corresponding to the case where forced termination of gameplay does not occur will be executed.

(31) In the above configuration, the end determination counter 98b is provided in the work area 98 for out-of-area processing, and the value of the end determination counter 98b is updated during out-of-area processing. Alternatively, the end determination counter 98b may be provided in the work area 96 for in-area processing, and the value of the end determination counter 98b may be updated during in-area processing. Also, in the above configuration, the end flag 98c is provided in the work area 98 for out-of-area processing, and the value of the end flag 98c is updated during out-of-area processing. Alternatively, the end flag 98c may be provided in the work area 96 for in-area processing, and the value of the end flag 98c may be updated during in-area processing.

(32) The continued games counter 96c and total wins counter 96d for determining whether the ending conditions for the second section SC2 have been met are provided in the work area 96 for in-area processing, and the values of the continued games counter 96c and total wins counter 96d are updated during in-area processing. However, instead, the continued games counter 96c and total wins counter 96d may be provided in the work area 98 for out-area processing, and the values of the continued games counter 96c and total wins counter 96d may be updated during out-area processing.

(33) When the ending AT state ST5 is reached, the ending AT state ST5 continues until the ending conditions of the second section SC2 are met. However, when the ending AT state ST5 is reached, a continuation lottery process is performed each time a predetermined number of games are played, each time a predetermined number of gaming media is acquired by the player, or each time a predetermined number of gaming media is paid out. If a continuation win is achieved in the continuation lottery process, the ending AT state ST5 continues. However, if a continuation win is not achieved in the continuation lottery process, the ending AT state ST5 may end.

(34) If it is possible to determine that the ending conditions for the second section SC2 are met before the conditions for forcibly terminating the game are met in relation to the value of the end determination counter 98b, the pre-end image G33 may not be displayed even if the value of the end determination counter 98b reaches a value that would cause the display of the pre-end image G33 to begin.

(35) If the condition for forcibly terminating play based on the value of the termination determination counter 98b is met in the final game of the base AT state ST4, the image display device 63 may be configured not to display the text image "LAST."

Second Embodiment
In this embodiment, the processing configuration for forcibly terminating a game differs from that of the first embodiment. The following describes the configuration that differs from the first embodiment. Note that the description of the same configuration as the first embodiment will be omitted.

In this embodiment, a BB state and an RB state are set instead of the first CB state ST2 and the second CB state ST3. Both the BB state and the RB state correspond to bonus states. The bonus state is a gaming state in which the expected number of gaming media awarded per unit game is higher than in gaming states other than the bonus state. Specifically, a winning combination that enables the first bell win is achieved with a higher probability (e.g., approximately 1/1.5) than in other gaming states. If such a winning combination is achieved, the first bell win is achieved regardless of the stopping order of the reels 32L, 32M, and 32R and the timing of the stop operation of the stop buttons 42-44 relative to the rotation positions of the reels 32L, 32M, and 32R. Meanwhile, the number of gaming media required to start one game in the bonus state is the same as in other gaming states. Therefore, the expected net increase in gaming media per unit game is higher in the bonus state than in gaming states other than the bonus state. The number of gaming media required to start one game in the bonus state may be less than in other gaming states, and the number of gaming media required to start one game in the bonus state may be more than in other gaming states if the expected net increase in gaming media per unit number of games is higher in the bonus state than in gaming states other than the bonus state.

Of the bonus states, the BB state continues over multiple games and ends when an end condition is met based on the occurrence of an event corresponding to the game's execution. The end condition can be any, but in this slot machine 10, the end condition is set to be that the total number of gaming media awarded since the BB state began is equal to or greater than the BB end reference number (specifically, "350"). Alternatively, the end condition may be met when the number of games played in the BB state reaches the BB end reference number.

Of the bonus states, the RB state continues across multiple games and ends when an end condition is met based on the occurrence of an event corresponding to the game's execution. The end condition can be set arbitrarily, but in this slot machine 10, the end condition is set when the total number of gaming media awarded since the RB state began is equal to or greater than the RB end reference number (specifically, 150). This RB end reference number is smaller than the BB end reference number. Therefore, the BB state is a more advantageous gaming state for the player than the RB state. Alternatively, the end condition may be met when the number of games played in the RB state reaches the RB end reference number. In this case, by setting the RB end reference number to a number smaller than the BB end reference number, the BB state can be made a more advantageous gaming state for the player than the RB state.

Figure 55 is a flowchart showing the monitoring execution process in this embodiment, which is executed by the main MPU 72. Note that steps S2401 to S2413 in the monitoring execution process are executed as out-of-area processing using the out-of-area processing program and out-of-area processing data.

First, it is determined whether the value of the end flag 98c in the work area 98 for outside area processing is "0" (step S2401). In this embodiment, the end flag 98c does not have two values, "0" and "1", but rather three values, "0", "1", and "2". If the value of the end flag 98c is "0" (step S2401: YES), it is determined whether any replay win has been achieved in the current game (step S2402). If any replay win has been achieved in the current game (step S2402: YES), this monitoring execution process is terminated without executing the processes from step S2403 onwards.

If no replay wins have been achieved (step S2402: NO), the value of the end determination counter 98b in the work area 98 for out-of-area processing is set to the HL register of the main MPU 72 (step S403). The result of subtracting the number of gaming media awarded for the current game from the number of bets for the current game is then set to the A register of the main MPU 72 (step S2404). It is then determined whether a carry corresponding to a reversal from the minimum value to the maximum value has occurred as a result of the subtraction (step S2405).

If a positive judgment is made in step S2405, the absolute value of the value in the A register is subtracted from the value in the HL register, and the result is set in the HL register (step S2406). As already explained, the value of the end judgment counter 98b is set in the HL register. In addition, the value obtained by subtracting the number of bets placed on the current game from the number of gaming media awarded for the current game is set in the A register. In this case, because a positive judgment is made in step S2405, the value obtained by subtracting the number of bets placed on the current game from the number of gaming media awarded for the current game is a negative value. Therefore, by subtracting the absolute value of this negative value from the value in the HL register, it is possible to reflect the decrease in the number of medals owned by the player in the current game in the end judgment counter 98b.

Then, it is determined whether a carry corresponding to the reversal from the minimum value to the maximum value has occurred in the HL register as a result of the subtraction in step S2406 (step S2407). If a carry has not occurred (step S2407: NO), the value of the HL register is set to the termination judgment counter 98b (step S2408). As a result, the decrease in the number of gaming media owned by the player in this game is reflected in the value of the termination judgment counter 98b. On the other hand, if a carry has occurred (step S2407: YES), the monitoring execution process is terminated without setting the value of the HL register to the termination judgment counter 98b. As a result, the decrease in the number of gaming media owned by the player that falls below the minimum value of the termination judgment counter 98b is not reflected in the value of the termination judgment counter 98b.

If a negative judgment is made in step S2405, the value of the HL register is added to the value of the A register, and the result is set in the HL register (step S2409). As already explained, the value of the end judgment counter 98b is set in the HL register. In addition, the value obtained by subtracting the number of bets on the current game from the number of gaming media awarded for the current game is set in the A register. In this case, because a negative judgment is made in step S2405, the value obtained by subtracting the number of bets on the current game from the number of gaming media awarded for the current game is a positive value. Therefore, by adding this positive value to the value of the HL register, it is possible to reflect the increase in the number of medals owned by the player in the current game in the end judgment counter 98b.

Then, it is determined whether a carry corresponding to the inversion from the maximum value to the minimum value occurred in the HL register as a result of the addition in step S2409 (step S2410). If a carry has not occurred (step S2410: NO), the value of the HL register is set to the end judgment counter 98b (step S2408). This causes the increase in the number of gaming media owned by the player in this game to be reflected in the value of the end judgment counter 98b. On the other hand, if a carry has occurred (step S2410: YES), this means that the number of gaming media owned by the player has increased by 19,000 from the initial value of the end judgment counter 98b. In this case, the end flag 98c in the work area 98 for outside area processing is set to "1" (step S2411).

Then, it is determined whether the current gaming state is either the BB state or the RB state (step S2412). If the current gaming state is neither the BB state nor the RB state (step S2412: NO), the end flag 98c is set to "2" (step S2413). On the other hand, if the current gaming state is either the BB state or the RB state (step S2412: YES), the end flag 98c is maintained at "1" and this monitoring execution process is terminated.

Figure 56 is a flowchart showing the end setting process in this embodiment, which is executed by the main MPU 72. Note that steps S2501 to S2504 in the end setting process are executed as out-of-area processing using the out-of-area processing program and out-of-area processing data.

If the termination flag 98c in the work area 98 for out-of-area processing is set to "2" (step S2501: YES), a forced termination command is sent to the production-side MPU 92 (step S2502). Upon receiving the forced termination command, the production-side MPU 92 causes the upper lamp 61, speaker 62, and image display device 63 to issue a notification indicating that the game has been forcibly terminated.

Then, an automatic settlement process is executed (step S2503). In the automatic settlement process, if a value of 1 or greater is stored in the bet number setting counter 96a, the hopper device 53 is controlled and operated so that medals corresponding to the value of the bet number setting counter 96a are paid out to the player. In this case, the value of the bet number setting counter 96a is decremented by 1 each time a medal is paid out, and medals continue to be paid out until the value of the bet number setting counter 96a reaches "0." Also, if a value of 1 or greater is stored in the credit counter 96b, the hopper device 53 is controlled and operated so that medals corresponding to the value of the credit counter 96b are paid out to the player. In this case, the value of the credit counter 96b is decremented by 1 each time a medal is paid out, and medals continue to be paid out until the value of the credit counter 96b reaches "0."

After the automatic settlement process is completed, an interrupt by the timer interrupt process (FIG. 14) is prohibited (step S2504), and then an infinite loop is entered. As a result, no processing to progress the game is executed, and the game is forcibly terminated. To achieve this state of forcibly terminated gameplay, the slot machine 10 must be powered OFF, followed by inserting the setting key into the setting key insertion hole 57 and performing the ON operation, and then powering ON the slot machine 10, so that the setting value update process is executed. Even if the power is powered ON after being powered OFF, if the setting value update process is not executed, the end flag 98c will remain set to "1", and the game will be forcibly terminated again by the end setting process (FIG. 56).

With the above configuration, even if the value of the termination determination counter 98b exceeds its maximum value, if the game is in BB or RB state, the game is awaited to be forcibly terminated, and if the currently active BB or RB state ends, the game is forcibly terminated. This makes it possible to prevent the profits from the BB or RB state from being lost even if the game is forcibly terminated.

Third Embodiment
In this embodiment, the processing configuration of the pre-end notification process executed by the production-side MPU 92 differs from that of the first embodiment. The following describes the configuration that differs from the first embodiment. Note that the description of the same configuration as the first embodiment will be omitted.

Figure 57 is a flowchart showing the pre-end notification process in this embodiment, which is executed by the production-side MPU 92.

First, it is determined whether a pre-forced termination notification in which the pre-termination image G33 is displayed is in progress (step S2601). If a negative determination is made in step S2601, the value of the termination determination counter 98b contained in the rotation reception command B currently received from the main MPU 72 is determined (step S2602). Then, it is determined whether the determined value of the termination determination counter 98b is equal to or greater than "65385," which is the start condition for the pre-forced termination notification (step S2603). If the start condition for the pre-forced termination notification is met (step S2603: YES), the pre-forced termination notification setting process is executed (step S2604). This causes the display of the pre-termination image G33 to begin on the image display device 63.

In this embodiment, even if a pre-forced termination notification is initiated, no processing is performed to terminate the pre-ending notification. Therefore, if a pre-forced termination notification is initiated when the pre-ending notification G31 is displayed on the image display device 63 as a pre-ending notification, both the pre-ending notification G31 and the pre-end notification G33 will be displayed on the image display device 63.

If a pre-forced termination notification is being executed (step S2601: YES), it is determined whether a forced termination command has been received from the main MPU 72 (step S2605). The forced termination command is transmitted from the main MPU 72 in step S2202 of the termination setting process (FIG. 52) when the value of the termination determination counter 98b exceeds "65535," i.e., when the number of gaming media owned by the player exceeds 19,000 since the supply of operating power to the slot machine 10 began and the termination determination counter 98b was set to its initial value of "46535." If a forced termination command has been received (step S2605: YES), the forced termination notification setting process is executed (step S2606). This causes the image display device 63 to begin displaying the forced termination image G34.

If a forced termination command has not been received (step S2605: NO), the value of the termination determination counter 98b included in the rotation reception command B received this time from the main MPU 72 is determined (step S2607). Then, it is determined whether the determined value of the termination determination counter 98b is equal to or less than "65285," which is the cancellation condition for the pre-forced termination notification (step S2608). If the cancellation condition for the pre-forced termination notification is met (step S2608: YES), a cancellation process for the pre-forced termination notification is executed (step S2609). This terminates the display of the pre-forced termination image G33 on the image display device 63. If the cancellation condition for the pre-forced termination notification is not met (step S2608: NO), a cancellation process for the pre-forced termination notification is executed (step S2610). In the update process for the pre-forced termination notification, the remaining number of acquisitions until the occurrence of the forced termination, displayed in the pre-forced termination image G33, is changed according to the value of the termination determination counter 98b. In other words, if the value of the termination determination counter 98b increases, the number of wins remaining until forced termination occurs, displayed in the pre-termination image G33, is decreased accordingly, and if the value of the termination determination counter 98b decreases, the number of wins remaining until forced termination occurs, displayed in the pre-termination image G33, is increased accordingly.

If a negative judgment is made in step S2603, if the processing of step S2604 is executed, if the processing of step S2609 is executed, or if the processing of step S2610 is executed, it is determined whether or not a pre-ending notification is being executed (step S2611). If a negative judgment is made in step S2611, it is determined whether or not the value of the number of continued games counter 96c included in the rotation acceptance command B currently received from the main MPU 72 is greater than or equal to 3980 (step S2612). If a positive judgment is made in step S2612, a pre-ending notification setting process for the number of continued games is executed (step S2613). This causes the image display device 63 to begin displaying a pre-ending image G31 corresponding to the number of continued games. The pre-ending image G31 corresponding to the number of continued games displays the number of remaining games required until the ending condition corresponding to the number of continued games is fulfilled. Specifically, the value of the number of continued games counter 96c contained in the rotation acceptance command B currently received from the main MPU 72 is subtracted from the "4000" games, which is the number of games required to achieve the ending condition, and the number of games resulting from this subtraction is displayed in the pre-ending image G31 as the remaining number of games required until the ending condition corresponding to the number of continued games is achieved.

If a negative judgment is made in step S2612 or if the processing of step S2613 is executed, it is determined whether the value of the total acquisition counter 96d included in the rotation acceptance command B currently received from the main MPU 72 is greater than or equal to "65,421" (step S2614). If a positive judgment is made in step S2614, the setting process for the pre-ending notification for the total acquisition number is executed (step S2615). This causes the image display device 63 to start displaying the pre-ending image G31 corresponding to the total acquisition number. The pre-ending image G31 corresponding to the total acquisition number displays the number of remaining gaming media required to achieve the ending condition corresponding to the total acquisition number. Specifically, the value of the total acquisition counter 96d included in the rotation acceptance command B currently received from the main MPU 72 is subtracted from "65,521," which is the number at which the ending condition is achieved, and the resulting number is displayed in the pre-ending image G31 as the number of remaining gaming media required to achieve the ending condition corresponding to the total acquisition number. If the ending conditions are met, the result effect setting process (step S1632) in the AT effect control process (FIG. 42) executes processing to display the ending achievement image G32 on the image display device 63.

If a pre-ending notification is being executed and a positive judgment is made in step S2611, it is determined whether a pre-ending notification for the number of games to be continued is being executed (step S2616). If a positive judgment is made in step S2616, an update process for the pre-ending notification for the number of games to be continued is executed (step S2617). In the update process for the pre-ending notification for the number of games to be continued, the number of games remaining until the ending condition displayed in the pre-ending image G31 is met is changed according to the value of the number of games to be continued counter 96c included in the rotation acceptance command B currently received from the main MPU 72. In other words, if the value of the number of games to be continued counter 96c increases, the number of games remaining until the ending condition displayed in the pre-ending image G31 is met is decreased accordingly.

If a negative judgment is made in step S2616 or the processing of step S2617 is executed, it is determined whether a pre-ending notification for the total number of winnings is being executed (step S2618). If a positive judgment is made in step S2618, an update process for the pre-ending notification for the total number of winnings is executed (step S2619). In the update process for the pre-ending notification for the total number of winnings, the number of remaining gaming media required to be acquired until the ending condition corresponding to the total number of winnings is achieved is varied according to the value of the total winnings counter 96d included in the rotation acceptance command B currently received from the main MPU 72. In other words, if the value of the total winnings counter 96d increases, the number of remaining gaming media required to be acquired until the ending condition displayed in the pre-ending image G31 is achieved is correspondingly decreased, and if the value of the total winnings counter 96d decreases, the number of remaining gaming media required to be acquired until the ending condition displayed in the pre-ending image G31 is achieved is correspondingly increased.

With the above configuration, even when a pre-end image G33 indicating that the forced end of the game is approaching is displayed on the image display device 63, a pre-ending image G31 indicating that the ending conditions for the second section SC2 are about to be met is displayed on the image display device 63. This makes it possible to simultaneously notify the player that the forced end of the game is approaching and that the ending conditions for the second section SC2 are about to be met.

When the pre-ending image G31 is displayed due to the number of games continued in the second section SC2, the pre-ending image G31 will notify the number of games remaining until the ending conditions are met. Furthermore, when the pre-ending image G31 is displayed due to the total number of gaming media acquired in the second section SC2, the pre-ending image G31 will notify the number of gaming media remaining that are required to be acquired until the ending conditions are met. This allows the player to know when the ending conditions for the second section SC2 will be met by checking the pre-ending image G31.

<Fourth embodiment>
This embodiment differs from the first embodiment in that a reference reaching control process is executed by the production side MPU 92. The following describes the configuration that differs from the first embodiment. Note that the description of the same configuration as the first embodiment will be basically omitted.

Figure 58 (a) is a flowchart showing the reference achievement control process executed by the performance-side MPU 92. Note that the reference achievement control process is executed after the update process of the AT acquisition number counter 94c is executed in step S1626 in the AT performance control process (Figure 42).

First, it is determined whether the current game is the final game of the AT state (base AT state ST4 or ending AT state ST5) (step S2701). If a negative determination is made in step S2701, the standard reaching control process is terminated without executing the processes from step S2702 onwards. If a positive determination is made in step S2701, it is determined whether the value of the AT acquisition number counter 94c in the presentation side RAM 94 has reached one of the standard numbers (step S2702). The AT acquisition number counter 94c is a counter that stores the total number of gaming media acquired by the player since transitioning to the previous base AT state ST4. In addition, the standard numbers are set to 500, 1000, 1500, and 2000. These standard numbers are set to be fewer than the 2400 set as the ending condition for the AT state, and are set as multiples of 500.

If a positive judgment is made in step S2702, a setting process for a standard reaching image corresponding to the currently reached standard number is executed (step S2703). In this setting process, data is set so that the standard reaching image corresponding to the currently reached standard number is displayed on the image display device 63, and sound output control of the speaker 62 is performed so that a sound output effect corresponding to the display of the standard reaching image is produced.

Figure 58(b) is an explanatory diagram illustrating the contents of the reference achievement image G41.

As shown in Figure 58 (b), the image display device 63 displays an image "OVER 500" as the standard reaching image G41. This standard reaching image G41 is the image that is displayed when the standard number of 500 sheets is reached, and when the standard number of 1000 sheets is reached, "OVER 1000 sheets" is displayed, when the standard number of 1500 sheets is reached, "OVER 1500 sheets" is displayed, and when the standard number of 2000 sheets is reached, "OVER 2000 sheets" is displayed.

Here, in the final game of the AT state, even if the value of the AT acquisition number counter 94c reaches one of the reference numbers, the reference achievement image G41 will not be displayed. This makes it possible to prevent the reference achievement image G41 from being displayed overlapping with an image displayed on the image display device 63 informing the player of the total number of gaming media acquired by the player in the current AT state (base AT state ST4 or ending AT state ST5) and the total number of games played in the current AT state as a result presentation in the final game of the AT state.

On the other hand, the pre-end image G33, which notifies the player that the forced end of play is approaching, is displayed even in the final game of the AT state. This makes it possible for the player to recognize that the forced end of play is approaching even in the final game of the AT state.

It is also possible to configure the image display device 63 not to display the reference achievement image G41 in the final game of the base AT state ST4, but to display the reference achievement image G41 in the image display device 63 in the final game of the ending AT state ST5.It is also possible to configure the image display device 63 to display the reference achievement image G41 in the final game of the base AT state ST4, but not to display the reference achievement image G41 in the image display device 63 in the final game of the ending AT state ST5.

Fifth Embodiment
In this embodiment, the processing configuration for executing various lottery processes and the content of the game differ from those of the first embodiment. The following describes the configuration that differs from the first embodiment. Note that the description of the same configuration as the first embodiment will basically be omitted.

We will now explain the symbols on each reel 32L, 32M, and 32R. Figure 59 shows the arrangement of symbols on the left reel 32L, center reel 32M, and right reel 32R in this embodiment. As already explained in the first embodiment above, 21 symbols are arranged in a row on each reel 32L, 32M, and 32R.

As shown in Figure 59, there are seven types of symbols: "cherry" symbol (e.g., position 20 on the left reel 32L), "bell" symbol (e.g., position 19 on the left reel 32L), "black BAR" symbol (e.g., position 18 on the left reel 32L), "replay" symbol (e.g., position 17 on the left reel 32L), "watermelon" symbol (e.g., position 16 on the left reel 32L), "white 7" symbol (e.g., position 9 on the left reel 32L), and "red 7" symbol (e.g., position 6 on the left reel 32L). The number and arrangement order of each symbol differs on each reel 32L, 32M, and 32R.

As already explained in the first embodiment with reference to FIG. 5, in this slot machine 10, one main line ML is set to connect the positions where the symbols on each reel 32L, 32M, and 32R are visible. The main line ML is a line connecting the middle symbols on the left reel 32L, the middle symbols on the middle reel 32M, and the middle symbols on the right reel 32R. When a predetermined number of gaming media or more are bet, the reels 32L, 32M, and 32R begin to spin. If a winning combination corresponding to a winning combination is formed on the main line ML, one of the following benefits is awarded: gaming media, a replay benefit, or a transition to a new gaming state. As in the first embodiment, only one main line ML can result in a winning combination. Even if a winning combination is formed on a line extending in a straight line, such as sub-lines SL1 to SL4 (see FIG. 5), no winning combination is formed.

Below, we will explain the relationship between winning symbol combinations and the benefits that will be awarded if a prize is won, with reference to Figure 60. Figure 60 is an explanatory diagram that explains the relationship between winning symbol combinations and the benefits that will be awarded if a prize is won.

The minor winning combinations that award gaming media include the 1st to 7th supplementary winning combinations, the 1st to 6th red bell winning combinations, the 1st to 6th black bell winning combinations, the regular bell winning combinations, the 1st cherry winning combination, the 2nd cherry winning combination, and the watermelon winning combination. Specifically, a first supplementary winning combination occurs when the stopped symbol on the left reel 32L on the main line ML is a "replay" symbol, the stopped symbol on the middle reel 32M is a "bell" symbol, and the stopped symbol on the right reel 32R is a "bell" symbol. A second supplementary winning combination occurs when the stopped symbol on the left reel 32L on the main line ML is a "bell" symbol, the stopped symbol on the middle reel 32M is a "bell" symbol, and the stopped symbol on the right reel 32R is a "replay" symbol. If the stopped symbol on the left reel 32L on the main line ML is a "bell" symbol, the stopped symbol on the center reel 32M is a "replay" symbol, and the stopped symbol on the right reel 32R is a "bell" symbol, a third supplementary win will be awarded. If the stopped symbol on the left reel 32L on the main line ML is a "red 7" symbol or a "black BAR" symbol, the stopped symbol on the center reel 32M is a "bell" symbol, and the stopped symbol on the right reel 32R is a "red 7" symbol or a "black BAR" symbol, a fourth supplementary win will be awarded. If the stopped symbol on the left reel 32L on the main line ML is a "red 7" symbol or a "black BAR" symbol, the stopped symbol on the center reel 32M is a "red 7" symbol or a "black BAR" symbol, and the stopped symbol on the right reel 32R is a "replay" symbol, a fifth supplementary win will be awarded. If the stopped symbol on the left reel 32L on the main line ML is a "bell" symbol, the stopped symbol on the center reel 32M is a "red 7" symbol or a "black BAR" symbol, and the stopped symbol on the right reel 32R is a "red 7" symbol or a "black BAR" symbol, then a sixth supplementary win will occur. If the stopped symbol on the left reel 32L on the main line ML is a "red 7" symbol or a "black BAR" symbol, the stopped symbol on the center reel 32M is a "replay" symbol, and the stopped symbol on the right reel 32R is a "red 7" symbol or a "black BAR" symbol, then a seventh supplementary win will occur. If any of the first to seventh supplementary wins occurs, the number of gaming media to be awarded will be "1".

If the stopped symbol on the left reel 32L on the main line ML is a "red 7" symbol, the stopped symbol on the middle reel 32M is a "bell" symbol, and the stopped symbol on the right reel 32R is a "bell" symbol, the first red bell win will be achieved. If the stopped symbol on the left reel 32L on the main line ML is a "red 7" symbol, the stopped symbol on the middle reel 32M is a "bell" symbol, and the stopped symbol on the right reel 32R is a "replay" symbol, the second red bell win will be achieved. If the stopped symbol on the left reel 32L on the main line ML is a "bell" symbol, the stopped symbol on the middle reel 32M is a "red 7" symbol, and the stopped symbol on the right reel 32R is a "bell" symbol, the third red bell win will be achieved. If the stopped symbol on the left reel 32L on the main line ML is a "bell" symbol, the stopped symbol on the middle reel 32M is a "red 7" symbol, and the stopped symbol on the right reel 32R is a "replay" symbol, the fourth red bell win will be achieved. If the stopped symbol on the left reel 32L on the main line ML is a "bell" symbol, the stopped symbol on the middle reel 32M is a "bell" symbol, and the stopped symbol on the right reel 32R is a "red 7" symbol, the fifth red bell win will be achieved. If the stopped symbol on the left reel 32L on the main line ML is a "bell" symbol, the stopped symbol on the middle reel 32M is a "replay" symbol, and the stopped symbol on the right reel 32R is a "red 7" symbol, the sixth red bell win will be achieved. If the first, third, or fifth red bell win occurs, the number of gaming media to be awarded will be "11," and if the second, fourth, or sixth red bell win occurs, the number of gaming media to be awarded will be "13."

If the stopped symbol on the left reel 32L on the main line ML is a "black BAR" symbol, the stopped symbol on the middle reel 32M is a "bell" symbol, and the stopped symbol on the right reel 32R is a "bell" symbol, the first black bell win will be awarded. If the stopped symbol on the left reel 32L on the main line ML is a "black BAR" symbol, the stopped symbol on the middle reel 32M is a "bell" symbol, and the stopped symbol on the right reel 32R is a "replay" symbol, the second black bell win will be awarded. If the stopped symbol on the left reel 32L on the main line ML is a "bell" symbol, the stopped symbol on the middle reel 32M is a "black BAR" symbol, and the stopped symbol on the right reel 32R is a "bell" symbol, the third black bell win will be awarded. If the stopped symbol on the left reel 32L on the main line ML is a "bell" symbol, the stopped symbol on the middle reel 32M is a "black BAR" symbol, and the stopped symbol on the right reel 32R is a "replay" symbol, the fourth black bell win will be achieved. If the stopped symbol on the left reel 32L on the main line ML is a "bell" symbol, the stopped symbol on the middle reel 32M is a "bell" symbol, and the stopped symbol on the right reel 32R is a "black BAR" symbol, the fifth black bell win will be achieved. If the stopped symbol on the left reel 32L on the main line ML is a "bell" symbol, the stopped symbol on the middle reel 32M is a "replay" symbol, and the stopped symbol on the right reel 32R is a "black BAR" symbol, the sixth black bell win will be achieved. If the first, third, or fifth black bell win occurs, the number of gaming media to be awarded will be "10", and if the second, fourth, or sixth black bell win occurs, the number of gaming media to be awarded will be "12".

If the stopped symbol on the left reel 32L along the main line ML is a "bell" symbol, the stopped symbol on the middle reel 32M is a "bell" symbol, and the stopped symbol on the right reel 32R is a "bell" symbol, a normal bell win will occur. When a normal bell win occurs, the number of gaming media to be awarded will be "15".

If the stopped symbol on the left reel 32L on the main line ML is a "cherry" symbol, a cherry win will occur regardless of the stopped symbol on the middle reel 32M or the stopped symbol on the right reel 32R. If a cherry win occurs, the number of game media to be awarded will be "2". If the stopped symbol on the left reel 32L on the main line ML is a "watermelon" symbol, the stopped symbol on the middle reel 32M is a "watermelon" symbol, and the stopped symbol on the right reel 32R is a "watermelon" symbol, a watermelon win will occur. If a watermelon win occurs, the number of game media to be awarded will be "5".

Winnings that grant the privilege of replaying the next game without betting include the Regular Replay Win, the First Chance Replay Win, and the Second Chance Replay Win. Specifically, if the stopped symbol on the left reel 32L on the main line ML is a "Replay" symbol, the stopped symbol on the center reel 32M is a "Replay" symbol, and the stopped symbol on the right reel 32R is a "Replay" symbol, then if the stopped symbol on the left reel 32L on the main line ML is a "Red 7" symbol or a "Black BAR" symbol, the stopped symbol on the center reel 32M is a "Black BAR" symbol or a "Cherry" symbol, and the stopped symbol on the right reel 32R is a "Black BAR" symbol or a "Watermelon" symbol, In some cases, if the stopped symbol on the left reel 32L on the main line ML is a "white 7" symbol or a "watermelon" symbol, the stopped symbol on the center reel 32M is a "replay" symbol, and the stopped symbol on the right reel 32R is a "bell" symbol, or if the stopped symbol on the left reel 32L on the main line ML is a "white 7" symbol or a "watermelon" symbol, the stopped symbol on the center reel 32M is a "bell" symbol, and the stopped symbol on the right reel 32R is a "replay" symbol, a first chance replay is won. If the stopped symbol on the left reel 32L on the main line ML is a "replay" symbol, the stopped symbol on the center reel 32M is a "replay" symbol, and the stopped symbol on the right reel 32R is a "black BAR" symbol or a "watermelon" symbol, a second chance replay win will occur.

If any of the above replay wins are achieved, a replay bonus will be awarded, which will allow you to play the next game without having to bet any gaming media. In this embodiment, the number of gaming media required to start a game is set to "3" in all gaming states (normal gaming state ST11, bonus internal state ST12, BB state ST13, and AT state ST14, which will be described later with reference to Figure 65). If any of the replay wins is achieved in a game in which "3" gaming media have been bet, you will be able to start playing the next game with "3" gaming media bet, without having to bet any gaming media.

A BB win is a state transition win that only results in a transition in the game state. Specifically, a BB win occurs when the stopped symbols on the left reel 32L, the center reel 32M, and the right reel 32R on the main line ML are a "red 7" symbol. When a BB win is achieved, the game state transitions to the BB state, which is a bonus state. The bonus state is a game state in which the expected number of game media awarded per unit number of games is higher than in game states other than the bonus state. Specifically, the winning combination that allows for the normal bell win has a higher probability (e.g., approximately 1/1.5) than in other game states. If the winning combination is achieved, the normal bell win occurs regardless of the stopping order of the reels 32L, 32M, and 32R and the timing of the stop operation of the stop buttons 42-44 relative to the rotational positions of the reels 32L, 32M, and 32R. Meanwhile, the number of gaming media required to start one game in the bonus state is the same as in other game states. Therefore, the expected net increase in gaming media per unit game is higher in the bonus state than in game states other than the bonus state. The number of gaming media required to start one game in the bonus state may be fewer than in other game states. Alternatively, the number of gaming media required to start one game in the bonus state may be greater than in other game states if the expected net increase in gaming media per unit game is higher in the bonus state than in game states other than the bonus state.

The BB state continues over multiple games and ends when an end condition is met based on the occurrence of an event corresponding to the content of the game. The end condition can be any condition, but in this slot machine 10, the end condition is set to be that the total number of gaming media awarded since the BB state began is equal to or greater than the BB end reference number (specifically, "350"). Note that the end condition may also be met when the number of games played in the BB state reaches the BB end reference number.

Next, the main processing executed by the main MPU 72 will be described. In the main processing, a partial clearing process of the main RAM 74 is executed instead of the partial clearing process for the area in step S105 of the main processing (FIG. 13) in the first embodiment described above, and a full clearing process of the main RAM 74 is executed instead of the full clearing process for the area in step S106 of the main processing (FIG. 13) in the first embodiment described above. In the partial clearing process of the main RAM 74, some areas of the main RAM 74 are initialized, and in the full clearing process of the main RAM 74, all areas of the main RAM 74 are initialized. In the partial clearing process of the main RAM 74, areas other than the area in which the BB winning data is stored are cleared to "0" for initialization, and in the full clearing process of the main RAM 74, all areas, including the area in which the BB winning data is stored, are cleared to "0" for initialization.

Next, before explaining the role selection process (Figure 62) executed by the main MPU 72, we will explain the configuration of the main RAM 74 used in the role selection process. Figure 61 is an explanatory diagram for explaining the configuration of the main MPU 72.

As shown in FIG. 61, the main RAM 74 is provided with an index value counter 74a. In the role lottery process (FIG. 62) described below, a role lottery table in which winning data is associated with each of multiple index values IV is referenced. The index value counter 74a is a counter that allows the main MPU 72 to determine the index value IV that was won in the role lottery process (FIG. 62). The index value counter 74a is a one-byte counter having bits 0 to 7. If an index value IV between "1" and "20" is won in the role lottery process, the index value counter 74a is set to the corresponding numerical value information between "1" and "20". Furthermore, if no index value IV is won in the role lottery process, the value of the index value counter 74a becomes "0". By referencing the index value counter 74a, the main MPU 72 can determine whether or not an index value IV was won in the role lottery process and which index value IV was won.

Next, the role selection process executed by the main MPU 72 will be explained with reference to the flowchart in Figure 62. As already explained in the first embodiment above, the role selection process is executed in step S307 of the normal processing (Figure 15).

First, the value of the index value counter 74a in the main RAM 74 is cleared to "0" (step S2801). This ensures that the index value counter 74a does not have the index value IV set.

Then, in steps S2802 to S2806, the same processing as steps S401 to S405 of the winning combination lottery process (Figure 16) in the first embodiment is executed. Specifically, a random number is obtained to be used when determining whether the winning combination has been achieved (step S2802). As already explained in the first embodiment, the main MPU 72 stores in a specified register of the main MPU 72 the value latched in the random number circuit 75, based on whether operation of the start lever 41 has been confirmed, from among the random numbers between "0" and "65535" generated by the random number circuit 75.

Then, a lottery table for determining whether a winning combination has been achieved is read from the main ROM 73 (step S2803). As already explained in the first embodiment, the slot machine 10 is provided with six preset values ranging from "1" to "6." By inserting the setting key into the setting key insertion hole 57, turning it ON, and performing a predetermined operation, the player can set the winning probability corresponding to which setting value the lottery process for the winning combination will be executed. A setting value of "n+1" provides a more favorable winning probability for the player than "n." Specifically, since the winning probability of a predetermined combination is higher for a setting value of "n+1" than for "n," a setting value of "n+1" is more favorable for the player than for "n." In step S2803, a lottery table corresponding to the combination of the current setting value and the current game state is selected. The main ROM 73 stores, corresponding to each setting value, a non-internal role lottery table that is selected in the role lottery process (FIG. 62) when the game is in a non-bonus state (i.e., a gaming state other than the bonus state) and a non-bonus internal state (i.e., a gaming state other than the bonus internal state) in which BB winning data is not stored in the main RAM 74; an internal role lottery table that is selected in the role lottery process when the game is in a non-bonus state and a bonus internal state in which BB winning data is stored in the main RAM 74; and a bonus role lottery table that is selected in the role lottery process when the game is in a bonus state.

The lottery table in the non-bonus state will be explained using the example where the setting value is "3". Figure 63(a) is an explanatory diagram for explaining the non-internal role lottery table TB1 selected in the role lottery process (Figure 62) when in the non-bonus internal state, and Figure 63(b) is an explanatory diagram for explaining the internal role lottery table TB2 selected in the role lottery process when in the bonus internal state. Note that the following explanation will refer to the explanatory diagram in Figure 64 as appropriate.

As shown in Figures 63(a) and 63(b), index values IV are set in the non-internal role selection table TB1 and the internal role selection table TB2, similar to the role selection table when three coins are bet (Figure 17) and the role selection table when two coins are bet (Figure 18) in the first embodiment described above. Each index value IV is associated with winning data (i.e., a role) that will result in a win, and a point value PV is set. The point value PV determines the winning probability of the corresponding index value IV in relation to the maximum value ("65535") of the random number circuit 75.

Index values IV of "1" to "20" are set in the non-internal role selection table TB1, and index values IV of "1" to "19" are set in the internal role selection table TB2. Furthermore, the types of winning data set for each index value IV of "1" to "19" in these role selection tables TB1 and TB2 are the same.

Specifically, index values IV = 1 to 12 are set to one of the first through sixth red bell winning data and the first through sixth black bell winning data, one of the first through third supplementary winning data, and one of the fourth through seventh supplementary winning data. When a win occurs with index value IV = 1, as shown in FIG. 64, the first red bell winning can be achieved if the first stop (the reel on which the stop command was first issued) is the left reel 32L, the second stop (the reel on which the stop command was second issued) is the center reel 32M, and the third stop (the reel on which the stop command was last issued) is the right reel 32R. In all other cases, the first supplementary winning or the fourth supplementary winning is reliably achieved regardless of the timing of operation of the stop buttons 42 to 44. In the case where a win is made with an index value IV=2, and the first stop is on the left reel 32L, the second stop is on the center reel 32M, and the third stop is on the right reel 32R, a first black bell win may be made, and in all other cases, a first supplementary win or a fourth supplementary win will be made regardless of the operation timing of the stop buttons 42 to 44. In the case where a win is made with an index value IV=3, and the first stop is on the left reel 32L, the second stop is on the right reel 32R, and the third stop is on the center reel 32M, a second red bell win may be made, and in all other cases, a second supplementary win or a fifth supplementary win will be made regardless of the operation timing of the stop buttons 42 to 44. When a win occurs with index value IV = 4, if the first stop is on the left reel 32L, the second stop is on the right reel 32R, and the third stop is on the center reel 32M, a second black bell win may be achieved; in all other cases, a second or fifth supplementary win will be achieved regardless of the operation timing of the stop buttons 42-44.

When an index value IV = 5 is won, if the first stop is the center reel 32M, the second stop is the left reel 32L, and the third stop is the right reel 32R, a third red bell win is possible; otherwise, a third or sixth supplemental win is guaranteed regardless of the timing of operation of the stop buttons 42-44. When an index value IV = 6 is won, if the first stop is the center reel 32M, the second stop is the left reel 32L, and the third stop is the right reel 32R, a third black bell win is possible; otherwise, a third or sixth supplemental win is guaranteed regardless of the timing of operation of the stop buttons 42-44. If a win occurs with index value IV = 7, and the first stop is on the center reel 32M, the second stop is on the right reel 32R, and the third stop is on the left reel 32L, a fourth red bell win is possible; in all other cases, a second or fifth supplemental win is guaranteed regardless of the operation timing of the stop buttons 42-44. If a win occurs with index value IV = 8, and the first stop is on the center reel 32M, the second stop is on the right reel 32R, and the third stop is on the left reel 32L, a fourth black bell win is possible; in all other cases, a second or fifth supplemental win is guaranteed.

When an index value IV = 9 is selected and the first stop is on the right reel 32R, the second stop is on the left reel 32L, and the third stop is on the center reel 32M, a fifth red bell win is possible; otherwise, a second or sixth supplemental win is guaranteed regardless of the timing of operation of the stop buttons 42-44. When an index value IV = 10 is selected and the first stop is on the right reel 32R, the second stop is on the left reel 32L, and the third stop is on the center reel 32M, a fifth black bell win is possible; otherwise, a second or sixth supplemental win is guaranteed regardless of the timing of operation of the stop buttons 42-44. If a win occurs with index value IV = 11, and the first stop is on the right reel 32R, the second stop is on the center reel 32M, and the third stop is on the left reel 32L, a sixth red bell win is possible; otherwise, a third or seventh supplemental win is guaranteed regardless of the timing of operation of the stop buttons 42-44. If a win occurs with index value IV = 12, and the first stop is on the right reel 32R, the second stop is on the center reel 32M, and the third stop is on the left reel 32L, a sixth black bell win is possible; otherwise, a third or seventh supplemental win is guaranteed regardless of the timing of operation of the stop buttons 42-44.

In this embodiment, reel control is performed on each reel 32L, 32M, and 32R in all game modes, allowing up to four symbols to slide after the stop buttons 42-44 are operated. In other words, reel control is performed on each reel 32L, 32M, and 32R to stop within a specified time (190 milliseconds) after the stop buttons 42-44 are operated. This reel control makes it easier to achieve a winning combination corresponding to a winning role and prevents winnings corresponding to non-winning roles from being achieved. However, because the amount of rotation of each reel 32L, 32M, and 32R that can slide is limited as described above, if five or more symbols exist among the constituent symbols that make up a winning combination on one reel 32L, 32M, and 32R, depending on the timing of the operation of the corresponding stop button 42-44, the constituent symbols may not stop on the main line ML (this phenomenon is also known as a "missed win"). The first through seventh supplementary wins, normal bell wins, and various replay wins are win modes that will not result in a missed win if reels 32L, 32M, and 32R are stopped in the corresponding order, while the first through sixth red bell wins, first through sixth black bell wins, cherry wins, watermelon wins, and BB wins are win modes that may result in a missed win depending on the timing of the stop operation of stop buttons 42-44 relative to the rotational position of reels 32L, 32M, and 32R.

Normal bell winning data is set for index value IV=13, as shown in Figures 63(a) and 63(b). If a win occurs with index value IV=13, the normal bell win is guaranteed, regardless of the stopping order of reels 32L, 32M, and 32R or the operation timing of each stop button 42-44, as shown in Figure 64.

As shown in Figures 63(a) and 63(b), in the non-internal role lottery table TB1 and the internal role lottery table TB2, only cherry winning data is set for index value IV = 14, and cherry winning data and BB winning data are set for index value IV = 15. However, when the role lottery process (Figure 62) is executed in a non-bonus internal state, a win does not occur with index value IV = 14. Furthermore, when the role lottery process is executed in a bonus internal state, a win does not occur with index value IV = 15. This prevents BB winning data from being stored in the main RAM 74 in a bonus internal state where BB winning data is already stored.

Winning data other than BB winning data is erased in the game in which a win occurs, regardless of whether the corresponding win occurs or not, and is not carried over to games following the game in which a win occurred. In contrast, BB winning data is stored and retained in the game following the game in which a win occurred until the corresponding win occurs, except when the main RAM 74 is cleared (the main RAM 74 partial clearing process or the main RAM 74 full clearing process already described).

Of the index values IV = 1-13, 15-20 that can result in a win in the lottery process for winning combinations executed in a non-bonus internal state (Figure 62), only "15" is set as the index value IV for which cherry winning data is set, and BB winning data is set for this index value IV = 15 in addition to the cherry winning data. Therefore, if the lottery process for winning combinations is executed in a non-bonus internal state and an index value IV (specifically "15") for which cherry winning data is set is won, and a BB win is not achieved in the game in which the lottery process for that combination is executed, the system will enter a bonus internal state in which BB winning data is set in the main RAM 74. Furthermore, of the index values IV = 1-13, 15-20 that can result in a win in the lottery process for winning combinations executed in a non-bonus internal state, "20" is also an index value IV for which BB winning data is set in addition to "15." The bonus internal state also occurs when the lottery process for a role is executed in a non-bonus internal state, resulting in a win with index value IV = 20, for which BB winning data is set, and no BB win is achieved in the game in which the lottery process for that role is executed. If the lottery process for a role is executed in the bonus internal state and a win occurs with index value IV = 14, a cherry win can be achieved regardless of the stopping order of reels 32L, 32M, and 32R, as shown in Figure 64. However, depending on the timing of operation of the left stop button 42, a cherry win may not be achieved.

When the lottery process for winning combinations (Figure 62) is executed in a non-bonus internal state and a win is achieved with index value IV = 15, as shown in Figure 64, a cherry win or a BB win can be achieved regardless of the stopping order of reels 32L, 32M, and 32R. If the left stop button 42 is operated at a timing when the "cherry" symbol on the left reel 32L can be stopped on the main line ML, the stop control of the left reel 32L is executed so that the "cherry" symbol stops on the main line ML, even if the "red 7" symbol on the left reel 32L can be stopped on the main line ML. Therefore, when a win is achieved with index value IV = 15, a cherry win takes priority over a BB win. However, depending on the timing of operation of the left stop button 42, a cherry win may not be achieved, and depending on the timing of operation of each stop button 42-44, a BB win may not be achieved.

As shown in Figures 63(a) and 63(b), only watermelon winning data is set for index value IV = 16. If a win occurs with index value IV = 16, as shown in Figure 64, a watermelon win can be achieved regardless of the stopping order of reels 32L, 32M, and 32R. However, depending on the operation timing of each stop button 42 to 44, a watermelon win may not be achieved.

As shown in Figures 63(a) and 63(b), only the first chance replay winning data is set for index value IV = 17. If a win occurs with index value IV = 17, the first chance replay winning is guaranteed, regardless of the stopping order of reels 32L, 32M, and 32R and the timing of operation of each stop button 42-44, as shown in Figure 64. Furthermore, as shown in Figures 63(a) and 63(b), only the second chance replay winning data is set for index value IV = 18. If a win occurs with index value IV = 18, the second chance replay winning is guaranteed, regardless of the stopping order of reels 32L, 32M, and 32R and the timing of operation of each stop button 42-44, as shown in Figure 64. Furthermore, as shown in Figures 63(a) and 63(b), only the regular replay winning data is set for index value IV = 19. If a win occurs with index value IV = 19, as shown in Figure 64, a normal replay win is guaranteed regardless of the stopping order of reels 32L, 32M, and 32R or the operation timing of each stop button 42-44.

The index value IV=20 is set in the non-internal utility lottery table TB1, which is referenced in the non-bonus internal state, and is not set in the internal utility lottery table TB2, which is referenced in the bonus internal state. In the non-internal utility lottery table TB1, only BB winning data is set for the index value IV=20, as shown in FIG. 63(a). When BB winning data is set in the main RAM 74, as shown in FIG. 64, a BB win can be achieved regardless of the stopping order of the reels 32L, 32M, and 32R. However, there is a possibility that a BB win will not be achieved depending on the operation timing of each stop button 42-44.

As described above, the internal utility lottery table TB2 referenced in the bonus internal state does not contain an index value IV in which only BB winning data is set. This makes it possible to prevent new BB winning data from being stored in the bonus internal state where BB winning data is already stored in the main RAM 74, and to prevent multiple BB winning data from being accumulated and stored.

The index value IV = 20 is an index value IV that can only be won in a non-bonus state and a non-bonus internal state. Therefore, by determining that the index value IV = 20 has been won in the role lottery process ( FIG. 62 ), the main MPU 72 can determine that the current role lottery process was executed in a non-bonus state and a non-bonus internal state, and that the index value IV for which the BB winning data is set has been won in the role lottery process. This simplifies the processing configuration for executing the process corresponding to winning the index value IV for which the BB winning data is set in the role lottery process executed in a non-bonus state and a non-bonus internal state, compared to a configuration that requires, in addition to a process for determining whether the BB winning data is set in the main RAM 74, a process for determining whether the BB winning data is the BB winning data set in the current game, and a configuration that, in addition to a process for determining whether the index value IV for which the BB winning data is set has been won in the role lottery process, a process for determining whether the role lottery process was executed in a non-bonus state and a non-bonus internal state.

In the role lottery process (Figure 62), similar to the role lottery process (Figure 16) already described in the first embodiment above, the larger the PV value set in the index value IV, the higher the probability of winning with that index value IV. As shown in FIG. 63(a), in the non-internal utility lottery table TB1, the PV value set for index values IV=1 to 12 is "2250", the PV value set for index value IV=13 is "7000", the PV value set for index value IV=14 is "0", the PV value set for index value IV=15 is "850", the PV value set for index value IV=16 is "155", the PV value set for index value IV=17 is "200", the PV value set for index value IV=18 is "400", the PV value set for index value IV=19 is "9000", and the PV value set for index value IV=20 is "500".

When non-internal utility lottery table TB1 is selected, the probability of winning when index value IV = 1 through index value IV = 12 is approximately 1/29.1. The probability of winning when index value IV = 13 is approximately 1/9.4. The probability of winning when index value IV = 15 is approximately 1/77.1. The probability of winning when index value IV = 16 is approximately 1/423. The probability of winning when index value IV = 17 is approximately 1/328. The probability of winning when index value IV = 18 is approximately 1/164. The probability of winning when index value IV = 19 is approximately 1/7.3. The probability of winning when index value IV = 20 is approximately 1/131. Because the point value PV set for index value IV = 14 is "0", if non-internal utility lottery table TB1 is selected, index value IV = 14 will not result in a win.

As shown in Figures 63(a) and 63(b), the same PV values are set for index values IV = 1 to 13, 16 to 19 in the internal utility lottery table TB2 as the PV values set for index values IV = 1 to 13, 16 to 19 in the non-internal utility lottery table TB1. When the internal utility lottery table TB2 is selected, the probability of winning when index value IV = 1 to the probability of winning when index value IV = 13 and the probability of winning when index value IV = 16 to the probability of winning when index value IV = 19 are the same as when the non-internal utility lottery table TB1 is selected.

As shown in Figure 63 (b), in the internal utility lottery table TB2, the PV value set for index value IV = 14 is "850", and the PV value set for index value IV = 15 is "0". When the internal utility lottery table TB2 is selected, the probability of winning when index value IV = 14 is approximately 1/77.1. Because the point value PV set for index value IV = 15 is "0", there is no chance of winning when index value IV = 15 when the internal utility lottery table TB2 is selected.

As described above, when non-internal utility lottery table TB1 is selected, of the index values IV = 1-13, 15-20 that can result in a win, only "15" is set to cherry winning data. Also, when internal utility lottery table TB2 is selected, of the index values IV = 1-14, 16-19 that can result in a win, only "14" is set to cherry winning data. Furthermore, the probability of winning with index value IV = 14 when internal utility lottery table TB2 is selected (approximately 1/77.1) is the same as the probability of winning with index value IV = 15 when non-internal utility lottery table TB1 is selected (approximately 1/77.1). Therefore, the probability of winning with an index value IV that is set to cherry winning data is the same when non-internal utility lottery table TB1 and internal utility lottery table TB2 are selected.

Next, we will explain the bonus feature lottery table selected in the bonus state. Although not shown in the figure, the bonus feature lottery table has index values IV of "1" and "2" set. Only normal bell winning data is set for index value IV = 1. If a win occurs with index value IV = 1, a normal bell win is guaranteed regardless of the stopping order of reels 32L, 32M, and 32R or the operation timing of each stop button 42-44. Only watermelon winning data is set for index value IV = 2. If a win occurs with index value IV = 2, a watermelon win can be achieved regardless of the stopping order of reels 32L, 32M, and 32R. However, depending on the operation timing of each stop button 42-44, a watermelon win may not be achieved.

In the bonus utility lottery table, the PV value set for index value IV = 1 is "45,000," and the PV value set for index value IV = 2 is "10,000." When the bonus utility lottery table is selected, the probability of winning when index value IV = 1 is approximately 1/1.5. Also, the probability of winning when index value IV = 2 is approximately 1/6.6.

As a result of the bonus role lottery table being set in this way, in the BB state, a normal bell win will generally be achieved in each game, resulting in the award of 15 game media, but a watermelon win may also be achieved, and in that case, 5 game media will be awarded. In contrast, the BB state ends when the total number of game media awarded since the BB state began reaches or exceeds the BB end reference number (e.g., 350). Therefore, the number of games required to end the BB state will vary depending on the results of the role lottery process (Figure 62) and whether or not a miss occurs. The bonus role lottery table is common across the setting values of 1 to 6, which vary the advantage of the slot machine 10.

As described above, when the role lottery process (Figure 62) is executed in a non-bonus state and a non-bonus internal state, the index values IV = 1-13, 15-20 that can result in a win, and the index values IV to which BB winning data is set are "15" and "20." The index values IV of "15" or "20" are index values IV that can result in a win only when the role lottery process is executed in that state. Therefore, based on the fact that the index value IV that resulted in a win in the role lottery process is "15" or "20," the main MPU 72 can determine that the role lottery process was executed in a non-bonus state and a non-bonus internal state, and that the index value IV to which BB winning data is set in the role lottery process was won.

Returning to the explanation of the role lottery process (Figure 62), after selecting a lottery table in step S2803, the index value IV is set to "1" (step S2804), and a judgment value DV used when determining whether the role is a hit or miss is set (step S2805). In this judgment value setting process, the point value PV corresponding to the current index value IV is added to the current judgment value DV to set a new judgment value DV. Note that in the initial judgment value setting process for each game, the value of the random number obtained in step S2802 is set as the current judgment value DV, and the point value PV corresponding to the current index value IV (index value IV = 1) is added to this random number value to set a new judgment value DV.

Then, a determination is made as to whether the role corresponding to the index value IV has been won (step S2806). In determining whether the role has been won, it is determined whether the determination value DV has exceeded "65535". If it has exceeded "65535" (step S2806: YES), the current index value IV is set in the index value counter 74a in the main RAM 74 (step S2807). This allows the main MPU 72 to determine the index value IV that has been won in the role lottery process. Then, the winning data corresponding to that index value IV is set in the main RAM 74 (step S2808). This allows the main MPU 72 to determine the currently won minor roles, replay roles, and BB roles.

If a negative judgment is made in step S2806, steps S2809 and S2810 execute the same processing as steps S407 and S408 of the lottery process for determining the winning combination in the first embodiment (Figure 16). Specifically, if the judgment value DV does not exceed "65535" (step S2806: NO), i.e., if the winning combination corresponding to the index value IV is not obtained, the index value IV is incremented by 1 (step S2809), and a determination is made as to whether or not there is a winning combination corresponding to the index value IV, i.e., whether or not there is a winning combination to be determined (step S2810). Specifically, a determination is made as to whether or not the index value IV to which 1 has been incremented exceeds the maximum value of the index value IV set in the lottery table. If there is a winning combination to be determined, the process returns to step S2805, and the winning combination determination continues. At this time, in step S2805, the point value PV corresponding to the current index value IV is added to the judgment value DV used to determine whether the previous hand was a hit (i.e., the current judgment value DV) to obtain a new judgment value DV, and in step S2806, the hand is judged to be a hit or miss based on this judgment value DV.

When the processing of step S2808 is executed, or when a negative judgment is made in step S2810, this means that the judgment of whether the winning combination has been achieved or not has been completed. In this case, in step S2811, the same processing as step S409 of the winning combination lottery processing (FIG. 16) in the first embodiment is executed. Specifically, a first stop information setting process is executed (step S2811) to set stop information for reel stop control. Thereafter, in step S2812, an advantageous lottery process at the start of the game is executed, in step S2813, a first control process for the play area is executed, and in step S2814, a stop operation notification control process is executed. The details of the advantageous lottery process at the start of the game (step S2812), the first control process for the play area (step S2813), and the stop operation notification control process (step S2814) will be described later.

Then, the production side MPU 92 executes a game start command transmission process (step S2815). In this transmission process, if any winning combination is achieved in the current combination lottery process (FIG. 62), information corresponding to the winning combination, information corresponding to the current game state, and information corresponding to the processing results of steps S2812 and S2813 are set in the game start command, and the game start command is transmitted to the production side MPU 92. The game start command is a command for making the production side MPU 92 aware that a new game has started, and is a command for making the production side MPU 92 aware of various information determined by the main side MPU 72. When the production side MPU 92 receives the game start command, it determines various information for the current game from the game start command and determines the content of the effects in accordance with the various information determined. The production side MPU 92 then reads a data table corresponding to the determined content of the effects from the production side ROM 93 to the production side RAM 94, and controls the light emission of the upper lamp 61, the sound output of the speaker 62, and the display of the image display device 63 according to the read data table.

Next, we will explain the game states and game intervals. Figure 65 is an explanatory diagram for explaining the game states and game intervals that exist in this slot machine 10.

This slot machine 10 has three gaming states: a normal gaming state ST11, a bonus internal state ST12, a BB state ST13, and an AT state ST14. These gaming states ST11 to ST14 do not overlap with each other. Also, as already explained, the number of gaming media bets required to start a game in these gaming states ST11 to ST14 is set to "3."

The normal gaming state ST11 is a gaming state that is entered by executing the partial clearing process of the main RAM 74 or the full clearing process of the main RAM 74, as already explained. Furthermore, if the BB state ST13 ends and does not transition to the AT state ST14, or if the AT state ST14 ends, the gaming state becomes the normal gaming state ST11.

The bonus internal state ST12 is a game state in which the player remains if a BB win is not achieved in a game for which BB winning data is set, and ends if a BB win is achieved. As already explained, in the bonus internal state ST12, the internal role lottery table TB2 is referenced in the role lottery process (Figure 62). Since the replay probability in the bonus internal state ST12 (i.e., the probability of winning a role that allows a replay win to be achieved) is the same as when the non-internal role lottery table TB1 is referenced, the bonus internal state ST12 can also be said to be a game state in which the replay probability is maintained at the same probability as the replay probability in the normal gaming state ST11 and the AT state ST14. However, this is not limited to this, and the replay probability in the bonus internal state ST12 may be configured to be higher than in the normal gaming state ST11 or the AT state ST14, or the replay probability in the bonus internal state ST12 may be configured to be lower than in the normal gaming state ST11 or the AT state ST14.

The BB state ST13 is the gaming state to which the game enters when a BB win occurs while BB winning data is stored in the main RAM 74. The contents of the BB state ST13 have already been explained.

The AT state ST14 is a gaming state to which the player transitions based on the occurrence of an AT transition win, as described below. If an AT transition win occurs in the normal gaming state ST11, the game in which the AT transition win occurred will transition to the AT state ST14 after the end of the game. Furthermore, if an AT transition win occurs in the bonus internal state ST12, a BB win is achieved and the player transitions to the BB state ST13, and then transitions to the AT state ST14 after the BB state ST13 ends. Furthermore, if an AT transition win occurs in the BB state ST13, the player transitions to the AT state ST14 after the BB state ST13 ends. The AT state ST14 ends when the remaining number of awarded gaming media in the AT state ST14 becomes "0" or when the ending conditions of the second section SC2, described below, are met. When the AT state ST14 ends, the gaming state returns to the normal gaming state ST11. Furthermore, if a bonus win occurs during the AT state ST14, the player transitions to the bonus internal state ST12 or the BB state ST13. In this case, after BB state ST13 ends, the system will return to AT state ST14.

In a configuration in which various game states ST11-ST14 exist as described above, a game zone is set in addition to these game states ST11-ST14. As with the first embodiment, a first zone SC1 and a second zone SC2 are set as game zones. In other words, in this slot machine 10, the factors that determine the game situation are the setting values "1" to "6," the various game states ST11-ST14, and the game zones of the first zone SC1 and the second zone SC2.

The first section SC1 is a section in which an advantageous gaming state (AT state ST14) is not initiated in which the expected net increase in gaming media in one game (the value obtained by subtracting the number of gaming media bet in one game from the expected number of gaming media awarded in one game) may exceed "0" when the stopping order of reels 32L, 32M, and 32R is notified, and the advantageous gaming state does not continue. When the partial clearing process or the full clearing process of the main RAM 74, as described above, is executed, the normal gaming state ST11 is entered, and the first section SC1 is entered. Furthermore, the first section SC1 is also entered when the initialization process of the second section SC2 is executed in the second section SC2.

When a transition trigger to the second section SC2 occurs in the first section SC1 based on the role lottery process (Figure 62), the system transitions from the first section SC1 to the second section SC2. The second section SC2 is a section in which the above-mentioned advantageous gaming state (specifically, the AT state ST14) can begin and in which the above-mentioned advantageous gaming state can continue. The second section SC2 ends when the AT state ST14 ends and the system transitions to the normal gaming state ST11. When the second section SC2 ends, the system transitions to the first section SC1.

The ending condition for the second section SC2 is that either the total number of games played as a result of the second section SC2 continuing without a transition to the first section SC1 reaching the upper limit (specifically, 1,500 games), or the limited total net increase in gaming media reaching the upper limit (specifically, 2,400) as a result of the second section SC2 continuing without a transition to the first section SC1 occurring. The limited total net increase in gaming media refers to the increase in the predetermined difference from the predetermined reference value, where the minimum of the predetermined difference is the predetermined reference value, and the difference is calculated by subtracting the total number of gaming media consumed to play games while the second section SC2 is continuing ("0" when no games are being played) from the total number of gaming media awarded through games played while the second section SC2 is continuing ("0" when no gaming media are awarded). If either of these ending conditions is met, even if the game is in the middle of AT state ST14, the AT state ST14 ends in the game where the ending condition was met, and the second section SC2 ends, transitioning to the first section SC1 and normal game state ST11. This makes it possible to prevent the second section SC2 from continuing excessively.

The normal game state ST11, bonus internal state ST12, and BB state ST13 can be entered in either the first section SC1 or the second section SC2. On the other hand, the AT state ST14 is never entered in the first section SC1, but only in the second section SC2.

Next, we will explain the first control process for the gaming area executed by the main MPU 72. As already explained, the first control process for the gaming area is executed in step S2813 in the role lottery process (Figure 62).

In the first control process for the gaming zone, if the gaming state is normal ST11, it is determined whether the second zone flag in the main RAM 74 is set to "1." The second zone flag is a flag that the main MPU 72 uses to identify whether the gaming zone is the second zone SC2. If the second zone flag is set to "1," it is the second zone SC2, and if the value of the second zone flag is "0," it is the first zone SC1. In the first control process for the gaming zone, if the gaming state is normal ST11 and the second zone flag is not set to "1," processing is executed to set the gaming zone to the second zone SC2, provided that the value of the index value counter 74a in the main RAM 74 is "1" or greater, i.e., a winning combination has been achieved in the current combination lottery process (Figure 62).

In the process for setting the second section SC2, the second section flag in the main RAM 74 is set to "1" to set the second section SC2, and the continued games counter 74b (see FIG. 61) and total wins counter 74c (see FIG. 61) in the main RAM 74 are both cleared to "0." The continued games counter 74b is a counter used by the main MPU 72 to determine the number of games played from the start of the second section SC2 when the second section SC2 is continued without the first section SC1 in between. The total wins counter 74c is a counter used by the main MPU 72 to determine the limited total net increase in gaming media from the start of the second section SC2 when the second section SC2 is continued without the first section SC1 in between. Then, the section display unit 67 is turned on. In the process for turning on the section display unit 67, the section display unit 67 is switched from an off state to an on state. This will cause the section display unit 67 to start notifying the user that they are in the second section SC2.

Next, the response processing at the end of a game executed by the main MPU 72 will be explained with reference to the flowchart in Figure 66. As already explained in the first embodiment above, the response processing at the end of a game is executed in step S310 of the normal processing (Figure 15).

When a game ends, bonus processing is first executed (step S2901). Figure 67 is a flowchart showing the bonus processing.

In the bonus processing (Figure 67), when BB winning data is set in the main RAM 74 and a BB win corresponding to that BB winning data is achieved (step S3001: YES), the BB flag in the main RAM 74 is set to "1" (step S3002). The BB flag is a flag that allows the main MPU 72 to determine that the game is in the BB state ST13. By setting the BB flag to "1" in step S3002, the main MPU 72 can determine that the game is in the BB state ST13.

Then, the total payout counter stored in the main RAM 74 is cleared to "0" (step S3003). The total payout counter is a counter used by the main MPU 72 to determine the total number of gaming media awarded to the player in BB state ST13. The main MPU 72 determines whether the conditions for terminating BB state ST13 have been met based on the value of the total payout counter. Then, a bonus start command indicating that the bonus state will begin is sent to the presentation MPU 92 (step S3004). By receiving the bonus start command, the presentation MPU 92 starts a presentation corresponding to BB state ST13.

If a negative determination is made in step S3001, it is determined whether the value of the index value counter 74a in the main RAM 74 is "15" or "20" (step S3005). As already explained, the index value IV of "15" or "20" is an index value IV that can result in a win only when the role lottery process (Figure 62) is executed in a non-bonus state and a non-bonus internal state (i.e., a normal game state ST11 or AT state ST14 in which the non-internal role lottery table TB1 is selected). If a negative determination is made in step S3001 and a positive determination is made in step S3005, i.e., if the index value IV for which BB winning data is set is won in the current role lottery process and the transition to the bonus internal state ST12 occurs without establishing a BB win corresponding to the BB winning data, an internal state start command is sent to the production side MPU 92 (step S3006). The internal state start command is a command that allows the presentation side MPU 92 to recognize the transition to the bonus internal state ST12. Upon receiving the internal state start command, the presentation side MPU 92 causes the upper lamp 61, speaker 62, and image display device 63 to start a presentation corresponding to the bonus internal state ST12.

If the BB flag in the main RAM 74 is set to "1" after a negative determination is made in step S3005 (step S3007: YES), a determination is made as to whether or not gaming media have been awarded in the current game (step S3008). In step S3008, a positive determination is made if the value of the payout number counter provided in the main RAM 74 is "1" or greater. The payout number counter is a counter that allows the main MPU 72 to determine the number of gaming media awarded in the media awarding process in step S309 of the normal processing (FIG. 15) when a small winning combination is achieved. When a small winning combination is achieved, the payout number counter is set with the number of awards corresponding to the small winning combination achieved in the winning determination process in step S613 of the reel control processing (FIG. 22).

If gaming media have been awarded (step S3008: YES), a value corresponding to the number of gaming media awarded this time is added to the total payout counter in the main RAM 74 (step S3009). It is then determined whether the value of the total payout counter after this addition is equal to or greater than the BB termination reference number (specifically, equal to or greater than 350) (step S3010).

If a positive determination is made in step S3010, bonus end processing is executed (step S3011). In the bonus end processing, processing for ending the BB state ST13 and processing for setting the game state after the end of the BB state ST13 are executed. Details of the bonus end processing (step S3011) will be described later.

As described above, when the role lottery process (Figure 62) is executed in a non-bonus state and a non-bonus internal state, the index values IV = 1 to 13, 15 to 20 that can result in a win, and the index values IV to which BB win data is set are "15" and "20." The index values IV of "15" or "20" are index values IV that can result in a win only when the role lottery process is executed in that state. Therefore, in the bonus process (Figure 67), it is possible to determine whether it is time to transition to the bonus internal state ST12 by executing a process to determine whether the value of the index value counter 74a is "15" or "20." This simplifies the processing configuration for determining whether it is time to transition to the bonus internal state ST12, and also simplifies the processing configuration for the bonus processing (FIG. 67), compared to a configuration in which, in order to determine whether or not it is time to transition to the bonus internal state ST12, it is necessary to process whether or not BB winning data is set in the main RAM 74, as well as to process whether or not the BB winning data is the BB winning data set for the current game, and a configuration in which, in addition to process to determine whether or not the index value IV for which the BB winning data is set in the role lottery processing, it is necessary to process whether or not the role lottery processing was executed in a non-bonus state and a non-bonus internal state. Furthermore, by simplifying the processing configuration for the bonus processing, it is possible to reduce the data capacity of the program corresponding to the bonus processing.

Returning to the explanation of the response process at the end of play (FIG. 66), after the bonus process (FIG. 67) is executed in step S2901, it is determined whether the bonus internal state ST12 or BB state ST13 is in progress (step S2902). In step S2902, a positive determination is made if BB winning data is set in the main RAM 74 or if the BB flag in the main RAM 74 is set to "1".

If the current gaming state is neither the bonus internal state ST12 nor the BB state ST13 (step S2902: NO), the process jumps to the processing corresponding to the current gaming state (step S2903). Specifically, if the gaming state is the normal gaming state ST11, normal processing is executed (step S2904), and if the gaming state is the AT state ST14, AT processing is executed (step S2905). In the normal processing (step S2904), if an AT transition win occurs in the normal gaming state ST11, processing is executed to transition to the AT state ST14, and if the first section SC1 is being used to transition to the AT state ST14, processing is executed to start the second section SC2. In addition, in the AT processing (step S2905), processing is executed to control the progress of the AT state ST14. Details of the normal processing (step S2904) and the AT processing (step S2905) will be described later.

If a positive judgment is made in step S2902, if the processing of step S2904 is executed, or if the processing of step S2905 is executed, a second control process for the gaming area is executed (step S2906). In the second control process for the gaming area, if the transition condition from the second area SC2 to the first area SC1 is met, a process for transitioning the gaming area to the first area SC1 is executed. In addition, in the second control process for the gaming area (step S2906), if the transition condition from the second area SC2 to the first area SC1 is not met, an ending response process is executed.

In the ending response process, provided that the first ending flag stored in the main RAM 74 is not set to "1", it is determined whether the sum of the value of the continuing game number counter 74b stored in the main RAM 74 and the value of the AT continuation counter 74d stored in the main RAM 74 divided by the expected acquisition value of gaming media in the AT state ST14 is equal to or greater than the upper limit number of games for the second section SC2. The AT continuation counter 74d is a counter used by the main MPU 72 to determine the remaining number of gaming media awarded in the AT state ST14. The upper limit number of games for the second section SC2 is set to 1,500 games.

If the value of the above sum is equal to or greater than the upper limit number of games for the second section SC2, the first ending flag in the main RAM 74 is set to "1". The first ending flag is a flag that the main MPU 72 uses to identify whether the number of games played in the second section SC2, as measured using the continued game counter 74b, is likely to reach the upper limit number of games. When the first ending flag is set to "1", no additional addition to the remaining number of awards will occur in the AT state ST14. This makes it possible to prevent further addition to the remaining number of awards in the AT state ST14 in a situation where the ending conditions for the second section SC2 are met.

When the first ending flag is set to "1", a first ending command is sent to the presentation-side MPU 92. When the presentation-side MPU 92 receives the first ending command when the presentation has not yet started in the execution mode corresponding to the ending period, and if the game state at that time is AT state ST14, the presentation-side MPU 92 uses the reception of the first ending command as an opportunity to change the execution mode of the presentation on the upper lamp 61, speaker 62, and image display device 63 to the execution mode corresponding to the ending period. On the other hand, when the presentation-side MPU 92 receives the first ending command when the presentation has not yet started in the execution mode corresponding to the ending period and the game state is not AT state ST14, when the game state transitions to AT state ST14, the presentation-side MPU 92 changes the execution mode of the presentation on the upper lamp 61, speaker 62, and image display device 63 to the execution mode corresponding to the ending period.

In the ending response process, provided that the second ending flag in the main RAM 74 is not set to "1", it is determined whether the sum of the value of the total winnings counter 74c in the main RAM 74 and the value of the AT continuation counter 74d in the main RAM 74 is equal to or greater than the upper limit net increase in the second section SC2. The upper limit net increase in the second section SC2 is set to 2,400 coins.

If the value of the above sum is equal to or greater than the upper limit net increase in the second section SC2, the second ending flag in the main RAM 74 is set to "1". The second ending flag is a flag that the main MPU 72 uses to identify whether the limited total net increase in the number of gaming media measured using the total acquisition counter 74c is likely to reach the upper limit net increase. When the second ending flag is set to "1", no additional addition to the remaining award number occurs in the AT state ST14. This makes it possible to prevent further addition to the remaining award number in the AT state ST14 in a situation where the ending condition for the second section SC2 is met.

When the second ending flag is set to "1", a second ending command is sent to the presentation side MPU 92. When the presentation side MPU 92 receives the second ending command when the presentation has not yet started in the execution mode corresponding to the ending period, if the game state at that time is AT state ST14, the presentation execution mode on the upper lamp 61, speaker 62, and image display device 63 will be changed to the execution mode corresponding to the ending period upon receiving the second ending command. On the other hand, when the presentation side MPU 92 receives the second ending command when the presentation has not yet started in the execution mode corresponding to the ending period and the game state is not AT state ST14, upon transition to AT state ST14, the presentation execution mode on the upper lamp 61, speaker 62, and image display device 63 will be changed to the execution mode corresponding to the ending period.

In the response process at the end of play (FIG. 66), after executing the second control process for the play area in step S2906, a win data clearing process is executed (step S2907). In the win data clearing process, all win data set in the main RAM 74 other than the BB win data is cleared. This prevents win data other than the BB win data from being carried over to games following the game in which the win occurred. Furthermore, if a BB win is not achieved in a game in which the BB win data is set, the BB win data can be stored and retained until a BB win is achieved, even in games following the game in which the win occurred.

Next, the contents of the AT transition lottery effect executed in the normal gaming state ST11, bonus internal state ST12, and BB state ST13, and the contents of the additional lottery effect executed in the bonus internal state ST12, BB state ST13, and AT state ST14 will be explained using examples where an AT transition lottery effect is executed in the bonus internal state ST12, and where an additional lottery effect is executed in the bonus internal state ST12. Figures 68(a) and 68(b) are explanatory diagrams for explaining the contents of the AT transition lottery effect. The AT transition lottery effect and the additional lottery effect are executed using the upper lamp 61, speaker 62, and image display device 63.

When a game is started in the bonus internal state ST12, an internal state effect is executed. In the internal state effect, as shown in Figures 68(a) and 68(b), a display effect is executed in which an internal state character image G51 is displayed on the image display device 63. The content of this display effect corresponds to the lottery result of the role lottery process (Figure 62). Furthermore, in the internal state effect, sound output control of the speaker 62 is executed so that a sound corresponding to the display effect is output, and light emission control of the upper lamp 61 is executed so that the upper lamp 61 emits light at a timing corresponding to the display effect.

There are two types of AT transition lotteries to determine whether or not to transition to the AT state ST14: a non-BB AT transition lottery held in the normal gaming state ST11 or the bonus internal state ST12, and a BB AT transition lottery held in the BB state ST13. In a situation where the player is in the normal gaming state ST11, or in a situation where an AT transition win has not yet occurred in the bonus internal state ST12 transitioned from the normal gaming state ST11, the non-BB AT transition lottery is executed by winning the index value IV (specifically, any of "14" to "18") that triggers the AT transition lottery in the role lottery process (Figure 62). Furthermore, in a situation where an AT transition win has not yet occurred in the BB state ST13 entered from the normal gaming state ST11, or in a situation where an AT transition win has not yet occurred in the BB state ST13 entered from the normal gaming state ST11 via the bonus internal state ST12, that is, in a situation where the BB state ST13 is active and it has not been determined that the AT state ST14 will be entered after the BB state ST13 ends, an AT transition lottery for BB is executed by winning the index value IV (specifically, "2") that triggers the AT transition lottery in the role lottery process (FIG. 62). Then, when an AT transition lottery for non-BB or BB is executed, the AT transition lottery presentation is executed regardless of whether an AT transition win has occurred.

There are normal draws and re-draws for the AT transition lottery. The normal draw for the AT transition lottery is conducted both when the AT transition lottery is conducted during a non-BB period and when the AT transition lottery is conducted during a BB period. The re-draw for the AT transition lottery is conducted when both the conditions of winning the index value IV (specifically, "14") for which cherry winning data is set in the role lottery process (Figure 62) conducted in the bonus internal state ST12, and the normal draw for the AT transition lottery during a non-BB period are met. If the AT transition is won in the re-draw, a transition to the AT state ST14 occurs after the end of the BB state ST13, just as if the AT transition is won in the normal draw. The re-draw is not conducted if the AT transition is won in the normal draw.

If the index value IV that triggers the AT transition lottery is won in the role lottery processing (Figure 62) executed in the normal game state ST11 or BB state ST13, and a normal lottery is held in the AT transition lottery, a re-draw in the AT transition lottery will not be held because the condition of winning the index value IV for which cherry winning data is set in the role lottery processing executed in the bonus internal state ST12 is not met. Also, if the index value IV that triggers the AT transition lottery is won (specifically, any of "16" to "18") other than the index value IV for which cherry winning data is set in the role lottery processing executed in the bonus internal state ST12, and a normal lottery is held in the AT transition lottery, a re-draw in the AT transition lottery will not be held because the condition of winning the index value IV for which cherry winning data is set in the role lottery processing executed in the bonus internal state ST12 is not met.

In this way, a re-draw is executed only if the index value IV for which cherry winning data is set is won in the lottery process for the role executed in the bonus internal state ST12 (Figure 62), provided that the normal lottery for the AT transition lottery results in a loss. This allows the player to be given a maximum of two opportunities to generate an AT transition win only if the index value IV for which cherry winning data is set is won in the lottery process for the role executed in the bonus internal state ST12.

As already explained, if a BB win is achieved in a game for which BB winning data is set, the game transitions to the BB state ST13 without passing through the bonus internal state ST12. The bonus internal state ST12 is the game state to which the game transitions if a BB win is not achieved in a game for which BB winning data is set. Furthermore, the bonus internal state ST12 is a state in which the game transitions to the BB state ST13 is confirmed when a symbol combination corresponding to a BB win is stopped on the main line ML. By configuring the AT transition lottery to be re-drawn only in the bonus internal state ST12, a player who is unable to achieve a BB win in a game for which BB winning data is set and ends up remaining in the bonus internal state ST12 can feel that they have made a profit by having a re-drawn lottery. This can increase the enjoyment of the game.

When an AT transition lottery is executed in the bonus internal state ST12, as shown in FIG. 68(a), when the rotation of the reels 32L, 32M, and 32R begins based on the operation of the start lever 41, a normal lottery frame image G52 is displayed at the top of the image display device 63, and a re-lottery frame image G53 is displayed to the right of the normal lottery frame image G52. A text image G54 reading "AT transition lottery" is then displayed within the normal lottery frame image G52. A sound is also output from the speaker 62 to notify the player that the AT transition lottery is about to begin. Furthermore, if the index value IV = 14, for which cherry winning data is set, is won during the role lottery process (FIG. 62) executed in the bonus internal state ST12, a text image G55 reading "(when an internal cherry is won)" is displayed within the normal lottery frame image G52 below the text image G54 reading "AT transition lottery." This allows the player to be notified that an AT transition lottery will be held in the bonus internal state ST12.

If the result of the normal lottery in the AT transition lottery is a loss, one second after the display of these images G52 to G55 begins, a text image G56 saying "Miss" will be displayed within the frame of the normal lottery frame image G52 to the right of the text image G54 saying "AT transition lottery" and the text image G55 saying "(If an internal cherry is won)," as shown in FIG. 68(a). Furthermore, if the AT transition is won in the normal lottery in the AT transition lottery, one second after the display of the images G52 to G55 begins, a text image saying "Win" (not shown) will be displayed within the frame of the normal lottery frame image G52 to the right of the text image G54 saying "AT transition lottery" and the text image G55 saying "(If an internal cherry is won)." Then, a sound announcing that an AT transition win has occurred is output from the speaker 62, and the upper lamp 61 lights up in a manner announcing that an AT transition win has occurred. This allows an AT transition win to be notified.

Although not shown in the figures, when an AT transition lottery is executed when there is no BB in the normal game state ST11, or when an AT transition lottery is executed when there is a BB in the BB state ST13, the normal lottery frame image G52, the re-lottery frame image G53, and the text image G54 saying "AT transition lottery" are displayed. In addition, a sound is output from the speaker 62 to notify that the AT transition lottery is starting. If the normal lottery results in a loss, the text image G56 saying "Miss" is displayed within the frame of the normal lottery frame image G52, and if an AT transition win occurs, the text image saying "Win" (not shown) is displayed. In addition, if an AT transition win occurs, a sound is output from the speaker 62 to notify that an AT transition win has occurred, and the upper lamp 61 lights up in a manner to notify that an AT transition win has occurred.

If the index value IV = 14, for which cherry winning data is set, is won in the role lottery process (Figure 62) executed in the bonus internal state ST12, and the normal lottery in the AT transition lottery results in a loss, then one second after the text image G56 saying "Miss" begins to be displayed in the frame of the normal lottery frame image G52, the text image G57 saying "Re-lottery" will be displayed in the frame of the re-lottery frame image G53, as shown in Figure 68 (b). In addition, a sound is output from the speaker 62 to notify that a re-lottery in the AT transition lottery is about to begin. This notifies the player that a re-lottery will be held.

If an AT transition win occurs in the re-draw, then one second after the character image G57 reading "RE-DRAWING" begins to be displayed, a character image G58 reading "WIN" is displayed within the frame of the re-draw frame image G53 to the right of the character image G57 reading "RE-DRAWING", as shown in FIG. 68(b). A sound announcing that an AT transition win has occurred is output from the speaker 62, and the upper lamp 61 lights up in a manner announcing that an AT transition win has occurred. This allows notification that an AT transition win has occurred in the re-draw. If the re-draw results in a loss, then one second after the character image G57 reading "RE-DRAWING" begins to be displayed, a character image reading "LOSE" (not shown) is displayed within the frame of the re-draw frame image G53 to the right of the character image G57 reading "RE-DRAWING".

If only a normal lottery is conducted in the AT transition lottery, the AT transition lottery effect begins when the start lever 41 is operated to start the game, and the AT transition lottery effect ends one second after that timing. Also, if a normal lottery and a re-lottery are conducted in the AT transition lottery, the AT transition lottery effect begins when the start lever 41 is operated to start the game, and the AT transition lottery effect ends three seconds after that timing. As already explained in the first embodiment above, the rotation start processing in step S601 of the reel control processing (FIG. 22) executed in step S308 of the normal processing (FIG. 15) waits until a predetermined wait time (specifically, 4.1 seconds) has elapsed since the rotation of reels 32L, 32M, and 32R began in the previous game. Therefore, the AT transition lottery effect ends before the rotation of reels 32L, 32M, and 32R begins in the game following the game in which the AT transition effect was initiated.

As described above, regardless of whether an AT transition win occurs, when a non-BB AT transition lottery or a BB AT transition lottery is executed, the AT transition lottery effect is executed, thereby informing the player that an AT transition win may occur when the AT transition lottery effect begins, and making the player hopeful that an AT transition win may occur. By displaying the text image "(when an internal cherry is won)" G55 within the frame of the normal lottery frame image G52, the player can understand that even if the normal lottery in the non-BB AT transition lottery results in a loss, there is still a possibility that an AT transition win will occur in the non-BB AT transition lottery. By displaying the text image G58 "Re-lottery" within the frame of the re-lottery frame image G53, the player is informed that an AT transition win may occur in the re-lottery, making the player hopeful that an AT transition win may occur. This makes it possible to increase the enjoyment of the game.

When in AT state ST14 or when an AT transition win has occurred, there are two types of additional draws to determine whether or not to generate an additional draw that increases the remaining number of gaming media awarded in AT state ST14: an additional draw for non-BB held in bonus internal state ST12 or AT state ST14, and an additional draw for BB held in BB state ST13. When an AT transition win has already occurred in bonus internal state ST12 or when in AT state ST14, if the index value IV (specifically, any of "14" to "18") that triggers the additional draw is won in the role draw process (Figure 62), an additional draw for non-BB will be executed, provided that neither the first ending flag nor the second ending flag in the main RAM 74 is set to "1." Furthermore, in a situation where an AT transition win has already occurred in the BB state ST13 transitioned from the normal gaming state ST11, a situation where an AT transition win has already occurred in the BB state ST13 transitioned from the normal gaming state ST11 via the bonus internal state ST12, a situation where the BB state ST13 transitioned from the AT state ST14, or a situation where the BB state ST13 transitioned from the AT state ST14 via the bonus internal state ST12 is occurring, i.e., a situation where the BB state ST13 is occurring and it has already been determined that the AT state ST14 will transition after the BB state ST13 ends, if the index value IV (specifically, "2") that triggers the bonus lottery is won in the role lottery process, a BB bonus lottery is executed, provided that neither the first ending flag nor the second ending flag in the main RAM 74 is set to "1". Then, when a non-BB bonus lottery or a BB bonus lottery is executed, the bonus lottery effect is executed regardless of whether an bonus win has occurred.

As with the AT transition lottery described above, there are regular and re-lotteries for the additional lottery. The regular lottery for the additional lottery is held both when an additional lottery is held during a non-BB and when an additional lottery is held during a BB. If an additional lottery is won in the regular lottery, the remaining number of awarded gaming media in the AT state ST14 is incremented by "20." A re-lottery for the additional lottery is held when the index value IV (specifically, "14") for which cherry winning data is set is won in the role lottery process (Figure 62) executed in the bonus internal state ST12, and the regular lottery for the additional lottery during a non-BB is unsuccessful. If an additional lottery is won in the re-lottery, the remaining number of awarded gaming media in the AT state ST14 is incremented by "20," just as in the case of an additional lottery win in the regular lottery. The re-lottery is not held if an additional lottery is won in the regular lottery.

A re-draw for the additional draw is not performed when the index value IV that triggers the additional draw is won in the role drawing process (Figure 62) executed in BB state ST13 or AT state ST14, and a normal draw for the additional draw during BB or a normal draw for the additional draw during non-BB is performed. Furthermore, a re-draw for the additional draw is not performed when the index value IV other than the index value IV for which cherry winning data is set is won in the role drawing process (Figure 62) executed in the bonus internal state ST12, and the index value IV that triggers the additional draw (specifically, any of "16" to "18") is won, and a normal draw for the additional draw during non-BB is performed.

In this way, a re-draw is executed only if the index value IV for which cherry winning data is set is won in the role lottery process (Figure 62) executed in the bonus internal state ST12, provided that the normal lottery for the additional lottery results in a loss. This allows the player to be given up to two opportunities to generate an additional win only if the index value IV for which cherry winning data is set is won in the role lottery process executed in the bonus internal state ST12.

By configuring the system so that a re-draw of the additional lottery can be performed only in the bonus internal state ST12, players who are unable to achieve a BB win in a game for which BB winning data has been set and end up in the bonus internal state ST12 can feel that they have made a profit by having a re-draw performed. This can increase the enjoyment of the game.

Although not shown, when an additional lottery is executed when a non-BB occurs in the bonus internal state ST12, the image display device 63 displays the normal lottery frame image G52 and the re-lottery frame image G53 (see Figure 68(a)), just as when an AT transition lottery is executed when a non-BB occurs, and a text image (not shown) saying "Add-on lottery" is displayed within the frame of the normal lottery frame image G52. In addition, a sound is output from the speaker 62 to notify the player that an additional lottery is about to begin. This notifies the player that an additional lottery will be held. Furthermore, when the index value IV = 14, for which cherry winning data is set, is won in the role lottery process (Figure 62) executed in the bonus internal state ST12, a text image G55 saying "(when an internal cherry is won)" (see Figure 68(a)) is displayed below the text image saying "Add-on lottery" within the frame of the normal lottery frame image G52 (see Figure 68(a)). This notifies the player that an additional lottery will be held in the bonus internal state ST12.

If the result of the regular lottery in the additional lottery is a loss, one second after the display of these images begins, a text image G56 (see Figure 68 (a)) that reads "Miss" will be displayed within the frame of the regular lottery frame image G52 to the right of the text image "Additional lottery" and the text image G55 that reads "(When an internal cherry is won)." Also, if an additional win is achieved in the regular lottery in the additional lottery, one second after the display of the above images begins, a text image (not shown) that reads "Win" will be displayed within the frame of the regular lottery frame image G52 to the right of the text image "Additional lottery" and the text image G55 that reads "(When an internal cherry is won)." Then, a sound that notifies the user that an additional win has occurred is output from the speaker 62, and the upper lamp 61 lights up in a manner that notifies the user that an additional win has occurred. This allows the user to be notified that an additional win has occurred.

When an additional lottery is executed when there is no BB in the normal game state ST11, or when an additional lottery is executed when there is a BB in the BB state ST13, the normal lottery frame image G52, the re-lottery frame image G53, and the text image "Additional lottery" are displayed. A sound is also output from the speaker 62 to notify that the AT transition lottery will begin. If the normal lottery results in a loss, the text image G56 that reads "Miss" is displayed within the frame of the normal lottery frame image G52, and if an additional win occurs, the text image "Win" (not shown) is displayed. If an additional win occurs, a sound is output from the speaker 62 to notify that an additional win has occurred, and the upper lamp 61 lights up in a manner to notify that an additional win has occurred.

If the index value IV = 14, for which cherry winning data is set, is won in the role lottery process (Figure 62) executed in the bonus internal state ST12, and the normal lottery for the additional lottery during a non-BB period results in a loss, then one second after the text image G56 saying "Miss" begins to be displayed within the frame of the normal lottery frame image G52, the text image G57 saying "Re-lottery" (see Figure 68 (b)) is displayed within the frame of the re-lottery frame image G53. In addition, a sound is output from the speaker 62 to notify that a re-lottery for the additional lottery will be started. This notifies the player that a re-lottery will be held.

If an additional win occurs in the re-draw, a text image G58 (see Figure 68 (b)) saying "WIN" is displayed within the frame of the re-draw frame image G53 to the right of the text image G57 saying "RE-DRAWING" one second after the text image G57 saying "RE-DRAWING" begins to be displayed. In addition, a sound notifying that an AT transition win has occurred is output from the speaker 62, and the upper lamp 61 lights up in a manner notifying that an AT transition win has occurred. This makes it possible to notify that an AT transition win has occurred in the re-draw. If the re-draw results in a loss, a text image saying "LOSE" (not shown) is displayed within the frame of the re-draw frame image G53 to the right of the text image G57 saying "RE-DRAWING" one second after the text image G57 saying "RE-DRAWING" begins to be displayed.

If only a regular lottery is conducted in the additional lottery, the additional lottery effect begins when the start lever 41 is operated to start the game, and the additional lottery effect ends one second after that timing. Also, if a regular lottery and a re-lottery are conducted in the additional lottery, the additional lottery effect begins when the start lever 41 is operated to start the game, and the additional lottery effect ends three seconds after that timing. As already explained in the first embodiment above, the rotation start processing in step S601 of the reel control processing (FIG. 22) executed in step S308 of the regular processing (FIG. 15) waits until a predetermined wait time (specifically, 4.1 seconds) has elapsed since the rotation of reels 32L, 32M, and 32R began in the previous game. Therefore, the additional lottery effect ends before the rotation of reels 32L, 32M, and 32R begins in the game following the game in which the additional lottery effect was started.

Regardless of whether an additional win occurs, when a non-BB additional lottery or a BB additional lottery is executed, an additional lottery effect is executed, thereby informing the player that an additional win may occur when the additional lottery effect begins, and making the player hopeful that an additional win may occur. By displaying the text image "(when an internal cherry is won)" G55 within the frame of the normal lottery frame image G52, the player can understand that even if the normal lottery for the non-BB additional lottery results in a loss, there is still a possibility of an additional win in the non-BB additional lottery. By displaying the text image "Re-draw" G58 within the frame of the re-draw frame image G53, the player is informed that an additional win may occur in the re-draw, making the player hopeful that an additional win may occur. This can increase the player's interest in the game.

Next, the advantageous lottery processing at the start of the game executed by the main MPU 72 will be explained with reference to the flowchart in Figure 69. As already explained, the advantageous lottery processing at the start of the game is executed in step S2812 of the role lottery processing (Figure 62).

First, it is determined whether either the first ending flag or the second ending flag in the main RAM 74 is set to "1" (step S3101). If either ending flag is set to "1" (step S3101: YES), the advantageous lottery process at the start of the game (Figure 69) is terminated. By not executing the processes from step S3102 onwards when the first ending flag is set to "1," it is possible to prevent the execution of an additional lottery when the number of games played in the second section SC2, measured using the continued game counter 74b, is likely to reach the upper limit. Furthermore, by not executing the processes from step S3102 onwards when the second ending flag is set to "1," it is possible to prevent the execution of an additional lottery when the limited total net increase in gaming media, measured using the total acquisition counter 74c, is likely to reach the upper limit.

If a negative judgment is made in step S3101, it is determined whether the current gaming state is BB state ST13 (step S3102). If it is BB state ST13 (step S3102: YES), it is determined whether the value of the index value counter 74a in the main RAM 74 is "2" (step S3103). If the value of the index value counter 74a is "2" (step S3103: YES), that is, if the index value IV for which the watermelon winning data is set in the role lottery process (Figure 62) in BB state ST13 is won, it is determined whether the gaming state at the time the BB role that triggered the current BB state ST13 was won was AT state ST14 (step S3104). Furthermore, if a negative judgment is made in step S3104, it is determined whether the AT transition confirmation flag provided in the main RAM 74 is set to "1" (step S3105). The AT transition confirmation flag is a flag that allows the main MPU 72 to determine whether an AT transition win has occurred.

If a negative judgment is made in steps S3104 and S3105, the AT transition lottery process for BB is executed (step S3106). In the AT transition lottery process for BB, first, the BB transition lottery table is read from the main ROM 73. Then, a random number for the lottery is obtained from a lottery counter that is updated periodically (specifically, every 1.49 milliseconds) in the main RAM 74. The lottery counter is configured as a loop counter that sequentially updates the value within the range of "0" to "255". Then, the AT transition success/failure determination process for BB is executed. In the AT transition success/failure determination process for BB, the obtained random number for the lottery and the read BB transition lottery table are used to determine by lottery whether or not to transition to the AT state ST14 after the current BB state ST13 ends. In the AT transition success/failure determination process for BB, the probability of winning the AT transition is 3/8.

If an AT transition win is determined in the AT transition lottery process during BB (step S3107: YES), the AT transition confirmation flag in the main RAM 74 is set to "1" (step S3108). This allows the main MPU 72 to determine that an AT transition win has occurred. Then, the setting process for the AT continuation counter 74d is executed (step S3109). As already explained, the AT continuation counter 74d is a counter used by the main MPU 72 to determine the remaining number of awarded gaming media in the AT state ST14. In the setting process for the AT continuation counter 74d (step S3109), information corresponding to "200", which is the initial number of awarded gaming media in the AT state ST14, is set in the AT continuation counter 74d.

If a negative judgment is made in step S3107, or if the processing of step S3109 is performed, a first AT transition lottery result command is sent to the presentation side MPU 92 (step S3110). Data indicating that an AT transition win has occurred in the normal lottery in the AT transition lottery during BB is set in the first AT transition lottery result command, provided that the AT transition confirmation flag in the main RAM 74 is set to "1". By receiving the first AT transition lottery result command, the presentation side MPU 92 understands that the normal lottery in the AT transition lottery has been held and understands the result of that normal lottery. Then, an AT transition lottery effect is executed. In the AT transition lottery effect executed based on the reception of the first AT transition lottery result command, only an effect announcing the result of the normal lottery is executed, and an effect announcing the result of the re-draw is not executed.

If a positive judgment is made in step S3104 or if a positive judgment is made in step S3105, the BB bonus lottery process is executed (step S3111). In the BB bonus lottery process, first the BB bonus lottery table is read from the main ROM 73. Then, a random number for the lottery between "0" and "255" is obtained from the lottery counter, which is updated periodically (specifically, every 1.49 milliseconds) in the main RAM 74. Then, the BB bonus win/loss determination process is executed. In the BB bonus win/loss determination process, the obtained random number for the lottery and the read BB bonus lottery table are used to determine by lottery whether or not an additional win will occur. In the BB bonus win/loss determination process, there is a 1/4 probability of an additional win.

If an additional win is achieved in the additional lottery process during BB (step S3112: YES), an increment process is executed on the AT continuation counter 74d (step S3113). In the increment process on the AT continuation counter 74d, "20" is added to the value of the AT continuation counter 74d. This increases the remaining number of awarded gaming media by "20" in the AT state ST14, which is entered after the end of the BB state ST13.

If a negative judgment is made in step S3112, or if the processing of step S3113 is performed, a first additional lottery result command is sent to the production side MPU 92 (step S3114). Data indicating that an additional win has occurred in the regular lottery in the additional lottery during BB is set in the first additional lottery result command, provided that an additional win has occurred. By receiving the first additional lottery result command, the production side MPU 92 understands that a regular lottery in the additional lottery has been executed and understands the result of that regular lottery. Then, it causes an additional lottery effect to be executed. In the additional lottery effect executed based on the reception of the first additional lottery result command, only an effect announcing the result of the regular lottery is executed, and an effect announcing the result of the re-draw is not executed.

If a negative judgment is made in step S3102, i.e., if the game is in the normal gaming state ST11, the bonus internal state ST12, or the AT state ST14, it is determined whether the value of the index value counter 74a in the main RAM 74 is between "14" and "18" (step S3115). If the value of the index value counter 74a is between "14" and "18" (step S3115: YES), the normal win flag 74e and the re-lottery win flag 74f (see FIG. 61) stored in the main RAM 74 are cleared to "0" (step S3116). The normal win flag 74e is a flag that enables the main MPU 72 to determine whether an AT transition win has occurred in the normal lottery in the AT transition lottery when there is no BB, or whether an additional win has occurred in the normal lottery in the additional lottery when there is no BB. In addition, the re-lottery winning flag 74f is a flag that enables the main MPU 72 to grasp that an AT transition winning has occurred in a re-lottery in an AT transition lottery when there is no BB, or that an additional winning has occurred in a re-lottery in an additional lottery when there is no BB. By clearing the normal winning flag 74e and the re-lottery winning flag 74f to "0" in step S3116, it is possible to start the AT transition lottery process when there is no BB (step S3119) or the additional lottery process when there is no BB (step S3120) when there is no BB, even when the normal winning flag 74e and the re-lottery winning flag 74f are not set to "1".

Then, it is determined whether the current gaming state is AT state ST14 (step S3117). If a negative determination is made in step S3117, it is determined whether the AT transition confirmation flag stored in the main RAM 74 is set to "1" (step S3118). If a negative determination is made in steps S3117 and S3118, the AT transition lottery process for non-BB situations, described below, is executed (step S3119). Furthermore, if a positive determination is made in step S3117 or step S3118, the additional lottery process for non-BB situations, described below, is executed (step S3120).

Next, prior to explaining the AT transition lottery process (step S3119) when a non-BB occurs, we will explain the lottery tables used in the AT transition lottery process when a non-BB occurs. As shown in FIG. 61, first to fifth transition lottery tables 111 to 115 are stored in the main ROM 73. The first transition lottery table 111 is a lottery table that is read out when an index value IV = 14 is achieved in the role lottery process (FIG. 62). The second transition lottery table 112 is a lottery table that is read out when an index value IV = 15 is achieved. The third transition lottery table 113 is a lottery table that is read out when an index value IV = 16 is achieved. The fourth transition lottery table 114 is a lottery table that is read out when an index value IV = 17 is achieved. The fifth transition lottery table 115 is a lottery table that is read out when an index value IV = 18 is achieved.

Figure 70 (a) is an explanatory diagram illustrating the probability of winning the AT transition lottery when there is no BB. As already explained, a re-draw in the AT transition lottery when there is no BB is executed on the condition that the index value IV = 14 is won in the lottery process for the role in the bonus internal state ST12 (Figure 62) and the normal lottery result in the AT transition lottery when there is no BB is lost. If the index value IV = 15 to 18 is won in the lottery process for the role in the normal game state ST11 (Figure 62), or if the index value IV = 16 to 18 is won in the lottery process for the role in the bonus internal state ST12, only the normal lottery is executed in the AT transition lottery when there is no BB.

First, we will explain the probability of winning the AT transition in a regular lottery. If index value IV = 14 is won and the regular lottery is executed using first transition lottery table 111, there is an approximately 3.1% chance of winning the AT transition. If index value IV = 15 is won and the regular lottery is executed using second transition lottery table 112, there is an approximately 3.1% chance of winning the AT transition. If index value IV = 16 is won and the regular lottery is executed using third transition lottery table 113, there is a 25% chance of winning the AT transition. If index value IV = 17 is won and the regular lottery is executed using fourth transition lottery table 114, there is an approximately 21.9% chance of winning the AT transition. If index value IV = 18 is won and the regular lottery is executed using fifth transition lottery table 115, there is an approximately 9.4% chance of winning the AT transition.

When a re-draw is conducted for the AT transition lottery when there is no BB, the first transition lottery table 111 is used, just as when a normal lottery is conducted. The probability of winning the AT transition in this re-draw is the same as the probability of winning the AT transition in a normal lottery (specifically, approximately 3.1%). Considering cases where an AT transition win occurs in a normal lottery and cases where an AT transition win occurs in a re-draw, the probability of winning the AT transition when index value IV = 14 is won and the AT transition lottery when there is no BB is approximately 6.2%. Furthermore, the probability of winning the AT transition when index value IV = any of 15 to 18 is won and the AT transition lottery when there is no BB is the probability of winning the AT transition in a normal lottery, as already explained.

As such, the probability of winning the AT transition lottery during a non-BB period is lowest when an index value IV = 15 is won, and the probability of winning the AT transition lottery during a non-BB period increases in the following order: when an index value IV = 15 is won → when an index value IV = 14 is won → when an index value IV = 18 is won → when an index value IV = 17 is won → when an index value IV = 16 is won. Also, as already explained, when the role selection process (FIG. 62) is executed in the normal gaming state ST11, the probability of winning the index value IV = 15 is the highest among the probabilities of winning the index value IV = 15 to the probabilities of winning the index value IV = 18, and the probability of winning when the role selection process (FIG. 62) is executed in the normal gaming state ST11 decreases in the following order: index value IV = 15 → index value IV = 18 → index value IV = 17 → index value IV = 16. Furthermore, when a lottery process for a winning combination is executed in the bonus internal state ST12, the probability of winning an index value IV=14 is the highest among the probabilities of winning an index value IV=14 and the probabilities of winning an index value IV=16 to IV=18. The probability of winning when a lottery process for a winning combination is executed in the bonus internal state ST12 decreases in the order of index value IV=14 → index value IV=18 → index value IV=17 → index value IV=16. As already explained, the probability of winning with index value IV=14 when a lottery process for a winning combination is executed in the bonus internal state ST12 is set to the same probability as the probability of winning with index value IV=15 when a lottery process for a winning combination is executed in the normal game state ST11.

As a result, if an index value IV of 14 to 18 is won and a normal lottery is executed in the AT transition lottery when there is no BB, the lower the winning probability of the index value IV won in the role lottery process (Figure 62), the more likely it is that an AT transition win will occur in the normal lottery.

Of the index values IV of "14" and "15" for which cherry winning data is set, if a win occurs with index value IV = 14, a re-draw will be conducted on the condition that the normal draw for the AT transition lottery when there is no BB results in a loss, whereas if a win occurs with index value IV = 15, a re-draw will not be conducted even if the normal draw for the AT transition lottery when there is no BB results in a loss. As a result, in the role lottery process (Figure 62), the probability of winning index value IV = 14 is set to the same probability as the probability of winning index value IV = 15, and the probability of winning AT transition in a normal lottery when index value IV = 14 is won and the AT transition lottery when a non-BB result is executed is set to the same probability as the probability of winning AT transition in a normal lottery when index value IV = 15 is won and the AT transition lottery when a non-BB result is executed. In this configuration, the probability of winning AT transition, including re-drawing, when index value IV = 14 is won and the AT transition lottery when a non-BB result is executed can be made higher than the probability of winning AT transition when index value IV = 15 is won and the AT transition lottery when a non-BB result is executed.

By configuring the system so that an AT transition lottery is more likely to occur when an index value IV (specifically, "14") for which cherry winning data is set is won during the role lottery process in the bonus internal state ST12 and the AT transition lottery is executed when there is no BB, than when an index value IV (specifically, "15") for which cherry winning data is set is won during the role lottery process in the normal game state ST11 and the AT transition lottery is executed when there is no BB, it is possible to reduce the possibility of a player feeling that they have lost out if they are unable to achieve a BB win in a game for which BB winning data is set and end up remaining in the bonus internal state ST12. This can increase the enjoyment of the game.

Next, the AT transition lottery processing executed by the main MPU 72 when there is no BB will be explained with reference to the flowchart in Figure 70 (b). As already explained, the AT transition lottery processing when there is no BB is executed in step S3119 of the advantageous lottery processing at the start of the game (Figure 69).

First, the transition lottery tables 111-115 corresponding to the value of the index value counter 74a in the main RAM 74 are read from the main ROM 73 (step S3201). In step S3201, if the value of the index value counter 74a is "14", the first transition lottery table 111 is read; if the value of the index value counter 74a is "15", the second transition lottery table 112 is read; if the value of the index value counter 74a is "16", the third transition lottery table 113 is read; if the value of the index value counter 74a is "17", the fourth transition lottery table 114 is read; and if the value of the index value counter 74a is "18", the fifth transition lottery table 115 is read.

Then, a random number between "0" and "255" for the lottery is obtained from the lottery counter, which is updated periodically (specifically, every 1.49 milliseconds) in the main RAM 74 (step S3202), and the AT transition success/failure determination process for non-BB is executed (step S3203). In the AT transition success/failure determination process for non-BB, the random number for the lottery obtained in step S3202 and the transition lottery tables 111-115 read in step S3301 are used to determine by lottery whether or not an AT transition win will occur.

In a game in which an index value IV = 15 to 18 is won in the winning combination lottery process (Figure 62), steps S3202 and S3203 are executed once, resulting in a regular lottery. In that game, steps S3202 and S3203 are executed only once. This allows only a regular lottery to be executed in a game in which an index value IV = 15 to 18 is won in the winning combination lottery process.

In a game in which index value IV = 14 is won in the lottery process for a winning combination, steps S3202 and S3203 are executed first, thereby executing a normal lottery. If the normal lottery results in a loss, steps S3202 and S3203 are executed again, thereby executing a re-lottery. On the other hand, if an AT transition win occurs in the normal lottery, steps S3202 and S3203 will not be executed again in that game. This makes it possible to execute a re-lottery on the condition that the normal lottery results in a loss in a game in which index value IV = 14 is won in the lottery process for a winning combination.

If an AT transition win occurs in the AT transition win/loss determination process when there is no BB in step S3203 (step S3204: YES), the AT transition confirmation flag in the main RAM 74 is set to "1" (step S3205). This allows the main MPU 72 to determine that an AT transition win has occurred. Thereafter, similar to step S3109 of the advantageous lottery process at the start of the game (FIG. 69) already described, a setting process for the AT continuation counter 74d is executed (step S3206). In the setting process for the AT continuation counter 74d, information corresponding to "200", which is the initial number of awards in the AT state ST14, is set to the AT continuation counter 74d.

If the non-BB AT transition success/failure determination process in step S3203 results in a failure (step S3204: NO), the system determines whether the value of the index value counter 74a in the main RAM 74 is "14" (step S3207). If the value of the index value counter 74a is "14" (step S3207: YES), the system determines whether the re-lottery flag 74g (see FIG. 61) in the main RAM 74 is set to "1" (step S3208). The re-lottery flag 74g is a flag that allows the main MPU 72 to determine whether a re-lottery has already been held for the non-BB AT transition lottery or the non-BB additional lottery in the current game. If the re-lottery flag 74g is not set to "1" (step S3208: NO), i.e., if a re-lottery has not yet been held, the system sets the re-lottery flag 74g to "1" (step S3209) and proceeds to step S3202. Then, with the first transition lottery table 111 loaded into the main RAM 74, steps S3202 and S3203 are executed again. As a result, if the index value IV = 14 is won in the role lottery process, a re-lottery can be executed on the condition that the normal lottery in the AT transition lottery when there is no BB results in a loss.

By setting the re-draw flag 74g to "1" in step S3209, a positive determination can be made the next time the determination process of step S3208 is executed in the current game. This ensures that if the index value IV = 14 is won in the role selection process and the normal lottery for the AT transition lottery during a non-BB period results in a loss, only one re-draw will be executed.

After the setting process for the AT continuation counter 74d is executed in step S3206, if the re-draw flag 74g is not set to "1" (step S3210: NO), i.e., if an AT transition win occurs in the normal draw, the normal win flag 74e in the main RAM 74 is set to "1" (step S3211). This allows the main MPU 72 to know that an AT transition win has occurred in the normal draw during the AT transition lottery when there is no BB.

If the re-lottery flag 74g is set to "1" (step S3210: YES), i.e., if an AT transition win occurs in the re-lottery, the re-lottery win flag 74f in the main RAM 74 is set to "1" (step S3212). This allows the main MPU 72 to determine that an AT transition win has occurred in the re-lottery in the AT transition lottery during a non-BB. Then, the value of the re-lottery flag 74g is cleared to "0" (step S3213).

If a negative judgment is made in step S3207, the process proceeds to step S3215. As a result, in a game in which the index value IV = 15 to 18 is won in the role lottery process (Figure 62), a re-lottery will not be held if the normal lottery in the AT transition lottery when there is no BB results in a loss. Furthermore, if a positive judgment is made in step S3208, the value of the re-lottery flag 74g is cleared to "0" (step S3214), and the process proceeds to step S3215. As a result, a re-lottery will not be held again if the re-lottery in the AT transition lottery when there is no BB results in a loss.

If a negative judgment is made in step S3207, if the processing of step S3211 is executed, if the processing of step S3213 is executed, or if the processing of step S3214 is executed, it is determined whether the value of the index value counter 74a in the main RAM 74 is "14", thereby determining whether the index value IV (specifically "14") for which cherry winning data is set in the bonus internal state ST12 is won and an AT transition lottery is executed when there is no BB (step S3215).

If a negative judgment is made in step S3215, a first AT transition lottery result command is sent to the presentation-side MPU 92 (step S3216). Data indicating that an AT transition win has occurred in the normal lottery in the AT transition lottery during a non-BB, provided that the value of the normal win flag 74e is "1", is set in the first AT transition lottery result command. By receiving the first AT transition lottery result command, the presentation-side MPU 92 understands that a normal lottery in the AT transition lottery has been held and the result of that normal lottery. Then, the presentation-side MPU 92 executes an AT transition lottery effect. In the AT transition lottery effect executed based on the reception of the first AT transition lottery result command, only an effect announcing the result of the normal lottery is executed, and an effect announcing the result of the re-draw is not executed.

If a positive judgment is made in step S3215, a second AT transition lottery result command is sent to the presentation-side MPU 92 (step S3217). The second AT transition lottery result command contains data indicating that an AT transition win occurred in the normal lottery in the AT transition lottery when there is no BB, provided that the value of the normal win flag 74e is "1." Furthermore, the second AT transition lottery result command contains data indicating that an AT transition win occurred in the re-lottery in the AT transition lottery when there is no BB, provided that the value of the re-lottery win flag 74f is "1." By receiving the second AT transition lottery result command, the presentation-side MPU 92 determines that a normal lottery in the AT transition lottery was conducted and the result of the normal lottery. Furthermore, by receiving the second AT transition lottery result command, the presentation-side MPU 92 determines whether a re-lottery in the AT transition lottery was conducted and, if a re-lottery was conducted, the result of the re-lottery. The AT transition lottery presentation is then executed. In the AT transition lottery effect that is executed based on receiving the second AT transition lottery result command, an effect is executed to notify the result of the regular lottery, and if a re-lottery is held, an effect is executed to notify the result of the re-lottery.

As already explained, among the index values IV that can result in a win in the role lottery process (Figure 62) in the normal gaming state ST11 or the bonus internal state ST12, the index values IV for which cherry winning data is set are "14" and "15." The index value IV = 14 is an index value IV that can result in a win when the role lottery process (Figure 62) is executed in the bonus internal state ST12, and is also an index value IV that does not result in a win when the role lottery process is executed in the normal gaming state ST11. Therefore, in a configuration in which index values IVs with cherry winning data and BB winning data are set exist, the AT transition lottery process for non-BB situations can determine whether the index value counter 74a's value is "14" by executing a process to determine whether the index value IV for which cherry winning data is set has been won in the role lottery process (Figure 62) in the bonus internal state ST12. This simplifies the processing configuration for determining whether the index value IV for which cherry winning data is set has been won in the lottery processing for roles in the bonus internal state ST12, compared to a configuration that requires processing to determine whether cherry winning data is set and whether the cherry winning data is set in the lottery processing for roles executed in a situation where the bonus internal state ST12 is already in effect.

By simplifying the processing configuration for determining whether the index value IV for which cherry winning data is set has been won during the role lottery processing in the bonus internal state ST12, it is possible to simplify the processing configuration for the AT transition lottery processing (Figure 70 (b)) when there is no BB, and also reduce the data capacity of the main ROM 73 required to store the program corresponding to the AT transition lottery processing when there is no BB.

Next, prior to explaining the non-BB bonus lottery process (step S3120), we will explain the lottery tables used in the non-BB bonus lottery process. As shown in FIG. 61, the main ROM 73 stores first to fifth bonus lottery tables 116-119, 121. The first bonus lottery table 116 is a lottery table that is read out when index value IV = 14 is achieved in the role lottery process (FIG. 62). The second bonus lottery table 117 is a lottery table that is read out when index value IV = 15 is achieved. The third bonus lottery table 118 is a lottery table that is read out when index value IV = 16 is achieved. The fourth bonus lottery table 119 is a lottery table that is read out when index value IV = 17 is achieved. The fifth bonus lottery table 121 is a lottery table that is read out when index value IV = 18 is achieved.

Figure 71 (a) is an explanatory diagram illustrating the probability of winning an additional bonus in the non-BB bonus lottery. As already explained, a re-draw in the non-BB bonus lottery is executed on the condition that the index value IV = 14 is won in the role lottery process (Figure 62) in the bonus internal state ST12 and the normal lottery in the non-BB bonus lottery results in a loss. If the index value IV = 15 to 18 is won in the role lottery process (Figure 62) in the normal game state ST11, or if the index value IV = 16 to 18 is won in the role lottery process in the bonus internal state ST12, only the normal lottery in the non-BB bonus lottery is executed.

First, we will explain the probability of an additional win in a regular lottery. If you win index value IV = 14 and the regular lottery is held using the first additional lottery table 116, there is an approximately 1.6% chance of an additional win. If you win index value IV = 15 and the regular lottery is held using the second additional lottery table 117, there is an approximately 1.6% chance of an additional win. If you win index value IV = 16 and the regular lottery is held using the third additional lottery table 118, there is a 12.5% chance of an additional win. If you win index value IV = 17 and the regular lottery is held using the fourth additional lottery table 119, there is an approximately 10.9% chance of an additional win. If you win index value IV = 18 and the regular lottery is held using the fifth additional lottery table 121, there is an approximately 4.7% chance of an additional win.

When a re-draw is conducted for the bonus lottery when there is no BB, the first bonus lottery table 116 is used, just as when a regular lottery is conducted. The probability of an bonus win occurring in this re-draw is the same as the probability of an bonus win occurring in a regular lottery (specifically, approximately 1.6%). Taking into account the cases where an bonus win occurs in a regular lottery and the cases where an bonus win occurs in a re-draw, the probability of an bonus win occurring when an index value IV = 14 is won and a bonus lottery when there is no BB is approximately 3.1%. Furthermore, the probability of an bonus win occurring when an index value IV = 15 to 18 is won and a bonus lottery when there is no BB is the probability of an bonus win occurring in a regular lottery, as already explained.

In this way, when an index value IV = 14 to 18 is won in the role lottery process (Figure 62) and a non-BB bonus lottery is held, the probability of an bonus win occurring in the non-BB bonus lottery is lowest when an index value IV = 15 is won. The probability of an bonus win occurring in the non-BB bonus lottery increases in the following order: when an index value IV = 15 is won → when an index value IV = 14 is won → when an index value IV = 18 is won → when an index value IV = 17 is won → when an index value IV = 16 is won. Also, as already explained, when the role lottery process (Figure 62) is executed in the normal gaming state ST11, the probability of winning with index value IV = 15 is the highest among the probabilities of winning with index value IV = 15 to the probabilities of winning with index value IV = 18. The probability of winning in the lottery process for a role in the normal gaming state ST11 decreases in the order of index value IV=15 → index value IV=18 → index value IV=17 → index value IV=16. Furthermore, when the lottery process for a role is executed in the bonus internal state ST12, the probability of winning with index value IV=14 is the highest among the probability of winning with index value IV=14 and the probability of winning with index value IV=16 to the probability of winning with index value IV=18. The probability of winning in the lottery process for a role in the bonus internal state ST12 decreases in the order of index value IV=14 → index value IV=18 → index value IV=17 → index value IV=16. Furthermore, as already explained, the probability of a win occurring with index value IV = 14 when the lottery process for a role is executed in the bonus internal state ST12 is set to be the same as the probability of a win occurring with index value IV = 15 when the lottery process for a role is executed in the normal gaming state ST11.

As a result, if an index value IV of 14 to 18 is won and a normal lottery is executed in the non-BB additional lottery, the lower the winning probability of the index value IV won in the role lottery process (Figure 62), the more likely it is that an additional win will occur in the non-BB additional lottery.

Of the index values IV of "14" and "15" for which cherry winning data is set, if a win occurs with index value IV = 14, a re-draw will be held on the condition that the regular draw for the additional draw in the non-BB case results in a losing result, while if a win occurs with index value IV = 15, a re-draw will not be held even if the regular draw for the additional draw in the non-BB case results in a losing result. As a result, in the role lottery process (Figure 62), the probability of winning index value IV=14 is set to the same probability as the probability of winning index value IV=15, and the probability of winning an additional bonus in the regular lottery when index value IV=14 is won and a non-BB additional lottery is executed is set to the same probability as the probability of winning an additional bonus in the regular lottery when index value IV=15 is won and a non-BB additional lottery is executed. In this configuration, the probability of winning an additional bonus, including a re-lottery, when index value IV=14 is won and a non-BB additional lottery is executed can be made higher than the probability of winning an additional bonus when index value IV=15 is won and a non-BB additional lottery is executed.

By configuring the system so that an additional win is more likely to occur when an index value IV (specifically, "14") for which cherry winning data is set in the role lottery process in the bonus internal state ST12 is won and an additional lottery is executed when there is no BB, than when an index value IV (specifically, "15") for which cherry winning data is set in the role lottery process in the AT state ST14 is won and an additional lottery is executed when there is no BB, it is possible to reduce the possibility of a player feeling that they have lost out if they are unable to achieve a BB win in a game for which BB winning data is set and end up remaining in the bonus internal state ST12. This can increase the enjoyment of the game.

Next, the process for the additional lottery when there is no BB executed by the main MPU 72 will be explained with reference to the flowchart in Figure 71 (b). As already explained, the process for the additional lottery when there is no BB is executed in step S3120 of the advantageous lottery process at the start of the game (Figure 69).

First, the add-on lottery tables 116-119, 121 corresponding to the value of the index value counter 74a in the main RAM 74 are read from the main ROM 73 (step S3301). In step S3301, if the value of the index value counter 74a is "14", the first add-on lottery table 116 is read; if the value of the index value counter 74a is "15", the second add-on lottery table 117 is read; if the value of the index value counter 74a is "16", the third add-on lottery table 118 is read; if the value of the index value counter 74a is "17", the fourth add-on lottery table 119 is read; and if the value of the index value counter 74a is "18", the fifth add-on lottery table 121 is read.

Then, a random number between "0" and "255" for the lottery is obtained from the lottery counter, which is updated periodically (specifically, every 1.49 milliseconds) in the main RAM 74 (step S3302), and a process for determining whether or not an additional win will occur when there is no BB is executed (step S3303). In the process for determining whether or not an additional win will occur when there is no BB, the random number for the lottery obtained in step S3302 and the additional lottery tables 116-119, 121 read in step S3301 are used to determine by lottery whether or not an additional win will occur.

In a game in which the winning combination results in an index value IV of 15 to 18 in the lottery process (Figure 62), steps S3302 and S3303 are executed once, resulting in a regular lottery for the non-BB bonus lottery. In this game, steps S3302 and S3303 are executed only once. This allows only the regular lottery for the non-BB bonus lottery to be executed.

In a game in which index value IV = 14 is won in the lottery process for winning combinations, steps S3302 and S3303 are executed first, and a regular lottery for the non-BB additional lottery is executed. If the regular lottery results in a loss, steps S3302 and S3303 are executed again, and a re-lottery for the non-BB additional lottery is executed. On the other hand, if an additional lottery results in a win, steps S3302 and S3303 are not executed again for that game. As a result, in a game in which index value IV = 14 is won in the lottery process for winning combinations, a re-lottery can be executed on the condition that the regular lottery for the non-BB additional lottery results in a loss.

If an additional win occurs in the non-BB additional win determination process in step S3303 (step S3304: YES), an increment process of the AT continuation counter 74d is executed (step S3305), similar to step S3113 in the advantageous lottery process at the start of the game (Figure 69) already described. In the increment process of the AT continuation counter 74d, "20" is added to the value of the AT continuation counter 74d. As a result, the remaining number of awarded game media in the AT state ST14, which is entered after the end of the BB state ST13, increases by "20".

If the non-BB bonus lottery result in step S3303 is a loss (step S3304: NO), the value of the index value counter 74a in the main RAM 74 is determined to be "14" (step S3306). If the value of the index value counter 74a is "14" (step S3306: YES), the value of the re-lottery flag 74g in the main RAM 74 is determined to be "1" (step S3307). If the re-lottery flag 74g is not set to "1" (step S3307: NO), i.e., if a re-lottery for the non-BB bonus lottery has not yet been performed in this game, the re-lottery flag 74g is set to "1" (step S3308), and the process proceeds to step S3302. Then, with the first bonus lottery table 116 loaded into the main RAM 74, the processes of steps S3302 and S3303 are executed again. This allows a re-draw to be performed if the index value IV = 14 is won in the role drawing process and the normal draw for the additional draw during a non-BB win results in a loss.

By setting the re-draw flag 74g to "1" in step S3308, a positive determination can be made the next time the determination process in step S3307 is executed in the current game. This ensures that if the index value IV = 14 is won in the role drawing process (Figure 62) and the normal drawing for the additional draw during a non-BB time period results in a loss, only one re-draw will be executed.

After the AT continuation counter 74d is incremented in step S3305, if the re-draw flag 74g is not set to "1" (step S3309: NO), i.e., if an additional win occurs in the regular draw, the regular win flag 74e in the main RAM 74 is set to "1" (step S3310). This allows the main MPU 72 to determine that an additional win has occurred in the regular draw during an additional draw when there is no BB.

If the re-draw flag 74g is set to "1" (step S3309: YES), i.e., if an additional win occurs in the re-draw, the re-draw win flag 74f in the main RAM 74 is set to "1" (step S3311). This allows the main MPU 72 to determine that an additional win has occurred in the re-draw of the additional draw during a non-BB event. The value of the re-draw flag 74g is then cleared to "0" (step S3312).

If a negative judgment is made in step S3306, the process proceeds to step S3314. As a result, in a game in which an index value IV = 15 to 18 is won in the role lottery process (Figure 62), a re-lottery will not be held even if the normal lottery for the additional lottery when there is no BB results in a loss. Furthermore, if a positive judgment is made in step S3307, the value of the re-lottery flag 74g is cleared to "0" (step S3313), and the process proceeds to step S3314. As a result, a re-lottery will not be held again if the re-lottery for the additional lottery when there is no BB results in a loss.

If a negative judgment is made in step S3306, if the processing of step S3310 is executed, if the processing of step S3312 is executed, or if the processing of step S3313 is executed, it is determined whether the value of the index value counter 74a in the main RAM 74 is "14", thereby determining whether the index value IV (specifically "14") for which cherry winning data is set in the bonus internal state ST12 has been won and an additional lottery has been executed in the non-BB state (step S3314).

If a negative judgment is made in step S3314, a first additional lottery result command is sent to the production side MPU 92 (step S3315). Data indicating that an additional win has occurred in the normal lottery in the additional lottery during a non-BB is set in the first additional lottery result command, provided that the value of the normal win flag 74e is "1". By receiving the first additional lottery result command, the production side MPU 92 understands that a normal lottery in the additional lottery has been held and understands the result of that normal lottery. Then, it causes an additional lottery effect to be executed. In the additional lottery effect executed based on the reception of the first additional lottery result command, only an effect announcing the result of the normal lottery is executed, and an effect announcing the result of the re-draw is not executed.

If a positive judgment is made in step S3314, a second additional lottery result command is sent to the production-side MPU 92 (step S3316). The second additional lottery result command contains data indicating that an additional win occurred in the normal lottery for the additional lottery when there is no BB, provided that the value of the normal win flag 74e is "1." Furthermore, the second additional lottery result command contains data indicating that an additional win occurred in the re-lottery for the additional lottery when there is no BB, provided that the value of the re-lottery win flag 74f is "1." By receiving the second additional lottery result command, the production-side MPU 92 determines that a normal lottery for the additional lottery was held and the result of the normal lottery. Furthermore, by receiving the second additional lottery result command, the production-side MPU 92 determines whether a re-lottery for the additional lottery was held and, if a re-lottery was held, the result of the re-lottery. The additional lottery performance is then executed. In the additional lottery effect that is executed based on receiving the second additional lottery result command, an effect is executed to notify the result of the regular lottery, and if a re-lottery is held, an effect is executed to notify the result of the re-lottery.

As already explained, among the index values IVs that can result in a win in the role lottery process (Figure 62) in the bonus internal state ST12 or the AT state ST14, the index values IV for which cherry winning data is set are "14" and "15." The index value IV = 14 is an index value IV that can result in a win when the role lottery process (Figure 62) is executed in the bonus internal state ST12, and is also an index value IV that does not result in a win when the role lottery process is executed in the AT state ST14. Therefore, in a configuration in which index values IVs with cherry winning data and BB winning data are set exist, the additional lottery process for non-BB (Figure 71(b)) can determine whether the index value counter 74a's value is "14" by executing a process to determine whether the index value IV with cherry winning data is won in the role lottery process in the bonus internal state ST12. This simplifies the processing configuration for determining whether the index value IV for which cherry winning data is set has been won in the lottery processing for roles in the bonus internal state ST12, compared to a configuration that requires processing to determine whether cherry winning data is set and whether the cherry winning data is set in the lottery processing for roles executed in a situation where the bonus internal state ST12 is already in effect.

By simplifying the processing configuration for determining whether or not the index value IV for which cherry winning data is set has been won in the role lottery processing (Figure 62) in the bonus internal state ST12, it is possible to simplify the processing configuration for the additional lottery processing for non-BB (Figure 71 (b)), and also reduce the data capacity of the main ROM 73 required to store the program corresponding to the additional lottery processing for non-BB.

Next, the control processing for AT effects executed by the performance-side MPU 92 will be explained with reference to the flowchart shown in Figure 72. The control processing for AT effects is repeatedly executed by the performance-side MPU 92 at relatively short intervals (for example, every 4 milliseconds).

When a first AT transition lottery result command or a second AT transition lottery result command is received from the main MPU 72 (step S3401: YES), the start process of the AT transition lottery effect is executed (step S3402). In the start process of the AT transition lottery effect, an AT transition lottery effect table corresponding to the data set in the received first AT transition lottery result command or second AT transition lottery result command is read from the effect side ROM 93. By controlling the execution of the effect in accordance with the read AT transition lottery effect table, a light emission effect corresponding to the AT transition lottery effect is performed on the upper lamp 61, a sound output effect corresponding to the AT transition lottery effect is performed on the speaker 62, and a display effect corresponding to the AT transition lottery effect is performed on the image display device 63. The content of the AT transition lottery effect has already been explained.

When the first or second additional lottery result command is received from the main MPU 72 (step S3403: YES), the start process of the additional lottery effect is executed (step S3404). In the start process of the additional lottery effect, an additional lottery effect table corresponding to the data set in the received first or second additional lottery result command is read from the effect side ROM 93. By controlling the execution of the effect according to the read additional lottery effect table, a light-emitting effect corresponding to the additional lottery effect is performed on the upper lamp 61, a sound output effect corresponding to the additional lottery effect is performed on the speaker 62, and a display effect corresponding to the additional lottery effect is performed on the image display device 63. The content of the additional lottery effect has already been explained.

Next, we will explain the details of the notifications and effects executed in AT state ST14.

As already explained, each of the index values IV = 1 to 12 is set to a combination of any of the first to sixth red bell winning data and any of the first to sixth black bell winning data, any of the first to third supplementary winning data, and any of the fourth to seventh supplementary winning data. In the AT state ST14, if any of the index values IV = 1 to 12 is won in the role selection process (Figure 62), a stop operation notification is executed to notify the operation sequence and operation timing of the stop buttons 42 to 44 to achieve any of the red bell winnings or any of the black bell winnings.

The stop operation notification will notify the stop order and target range for achieving either a red bell win or a black bell win. The stop order notification will notify the stop order for achieving either a red bell win or a black bell win corresponding to either the red bell win data or the black bell win data set in the index value IV selected in the winning combination lottery process (Figure 62). The target range notification will notify the target range for the timing of operating the stop buttons 42-44 on each reel 32L, 32M, 32R to achieve the red bell win or black bell win. In addition, in the AT state ST14, an additional challenge effect will be executed in which the player attempts to complete the first to sixth missions given at the start of the AT state ST14 and generate an additional bonus on the remaining number of bonuses in the AT state ST14. Details of the additional challenge effect will be described later.

Figures 73(a) and 73(b) are explanatory diagrams for explaining how the stop operation notification and the additional challenge presentation are carried out. First, the stop order notification will be explained. The stop order notification is executed by the image display device 63. When the stop order notification is executed, as shown in Figure 73(a), the image display device 63 displays the same number of unit display images G1 to G3 as the number of stop operations required to end the game, and each unit display image G1 to G3 displays an image corresponding to the stop order of the reels 32L, 32M, and 32R. Specifically, a left unit display image G1 corresponding to the left reel 32L, a middle unit display image G2 corresponding to the middle reel 32M, and a right unit display image G3 corresponding to the right reel 32R are displayed. FIG. 73(a) shows the notification of the stop order when the first stop is on the left reel 32L, the second stop is on the right reel 32R, and the third stop is on the center reel 32M, so the left unit display image G1 displays an image of "1" corresponding to the stop order of the left reel 32L, the center unit display image G2 displays an image of "3" corresponding to the stop order of the center reel 32M, and the right unit display image G3 displays an image of "2" corresponding to the stop order of the right reel 32R. Based on the stop order notification, the player can determine the operation order of the stop buttons 42-44 that will result in either a red bell win or a black bell win.

Next, the target range notification will be explained. The target range notification is executed by the speaker 62 and the image display device 63. As already explained, in each game state ST11 to ST14, reel control that allows each reel 32L, 32M, and 32R to slide up to four symbols after the stop buttons 42 to 44 are operated is performed. Also, as already explained with reference to Figures 63(a) and 63(b), in the non-internal function lottery table TB1 and the internal function lottery table TB2, the red bell winning data set with index value IV = 1 is the first red bell winning data, and the red bell winning data set with index value IV = 3 is the second red bell winning data. Furthermore, when an index value IV of "1" or "3" is selected, the first stop must be on the left reel 32L to achieve the first red bell winning or the second red bell winning. Furthermore, as already explained with reference to Figure 60, in order to achieve the first or second red bell win, the "red 7" symbol on the left reel 32L must stop on the main line ML. In order to stop the "red 7" symbol on the left reel 32L on the main line ML, the left stop button 42 must be operated when symbols included in the "left red range," which is the range of symbols 0 to 6 and 19 to 20 on the left reel 32L, are on the main line ML.

When an index value IV of "1" or "3" is hit in AT state ST14 and the game begins, a text image G61 saying "Aim for the left red range" is displayed on the image display device 63, and the sound "Red on the left" is output from the speaker 62, as shown in FIG. 73(a). The text image G61 is displayed above the unit display image G1 corresponding to the first stop. This prompts the player to operate the left stop button 42 when the symbols included in the "left red range" (the 0th to 6th and 19th to 20th ranges on the left reel 32L) are on the main line ML, and increases the chances of achieving a first or second red bell win.

As already explained with reference to Figures 63(a) and 63(b), in the non-internal utility lottery table TB1 and the internal utility lottery table TB2, the red bell winning data set with index value IV = 5 is the third red bell winning data, and the red bell winning data set with index value IV = 7 is the fourth red bell winning data. When an index value IV of "5" or "7" is won, the first stop must be on the middle reel 32M to achieve the third or fourth red bell winning. Furthermore, as already explained with reference to Figure 60, the "red 7" symbol on the middle reel 32M must stop on the main line ML to achieve the third or fourth red bell winning. To stop the "red 7" symbol on the middle reel 32M on the main line ML, the middle stop button 43 must be operated when symbols included in the "middle red range," which is the range from the 4th to the 13th symbols on the middle reel 32M, are on the main line ML.

Although not shown in the figures, when an index value IV of "5" or "7" is won in AT state ST14 and the game begins, a text image saying "Aim for the middle red range" is displayed on the image display device 63, and the sound "middle red" is output from the speaker 62. This text image is displayed above the unit display image G2 corresponding to the first stop. This urges the player to operate the middle stop button 43 when a symbol included in the "middle red range" (the fourth to thirteenth range on the middle reel 32M) is on the main line ML, and also increases the likelihood of achieving a third or fourth red bell win.

As already explained with reference to Figures 63(a) and 63(b), in the non-internal utility lottery table TB1 and the internal utility lottery table TB2, the red bell winning data set with index value IV = 9 is the fifth red bell winning data, and the red bell winning data set with index value IV = 11 is the sixth red bell winning data. When an index value IV of "9" or "11" is won, the first stop must be on the right reel 32R to achieve the fifth or sixth red bell winning. Furthermore, as already explained with reference to Figure 60, the "red 7" symbol on the right reel 32R must stop on the main line ML to achieve the fifth or sixth red bell winning. To stop the "red 7" symbol on the right reel 32R on the main line ML, the right stop button 44 must be operated when symbols included in the "right red range," which is the range from 10 to 19 on the right reel 32R, are on the main line ML.

Although not shown in the figures, when an index value IV of "9" or "11" is won in AT state ST14 and the game begins, a text image saying "Aim for the red range" is displayed on the image display device 63, and a sound saying "red on the right" is output from the speaker 62. This text image is displayed above the unit display image G3 corresponding to the first stop. This prompts the player to operate the right stop button 44 when a symbol included in the "red range on the right" (the 10th to 19th range on the right reel 32R) is on the main line ML, and increases the likelihood of achieving the 5th or 6th red bell win.

As already explained with reference to Figures 63(a) and 63(b), in the non-internal utility lottery table TB1 and the internal utility lottery table TB2, the black bell winning data set at index value IV = 2 is the first black bell winning data, and the black bell winning data set at index value IV = 4 is the second black bell winning data. When an index value IV of "2" or "4" is won, the first stop must be on the left reel 32L to achieve the first black bell winning or the second black bell winning. Furthermore, as already explained with reference to Figure 60, the "black BAR" symbol on the left reel 32L must stop on the main line ML to achieve the first black bell winning or the second black bell winning. In order to stop the "black BAR" symbol on the left reel 32L on the main line ML, the left stop button 42 must be operated when symbols included in the "left black range," which is the range from the 6th to the 18th symbols on the left reel 32L, are on the main line ML.

Although not shown in the figures, when an index value IV of "2" or "4" is won in AT state ST14 and the game begins, a text image saying "Aim for the left black area" is displayed on the image display device 63, and the sound "left black" is output from the speaker 62. This text image is displayed above the unit display image G1 corresponding to the first stop. This urges the player to operate the left stop button 42 when the symbols included in the "left black area" (the 6th to 18th range on the left reel 32L) are on the main line ML, and increases the likelihood of achieving a first black bell win or a second black bell win.

As already explained with reference to Figures 63(a) and 63(b), in the non-internal utility lottery table TB1 and the internal utility lottery table TB2, the black bell winning data set with index value IV = 6 is the third black bell winning data, and the black bell winning data set with index value IV = 8 is the fourth black bell winning data. When an index value IV of "6" or "8" is won, the first stop must be on the middle reel 32M to achieve the third black bell winning or the fourth black bell winning. Furthermore, as already explained with reference to Figure 60, the "black BAR" symbol on the middle reel 32M must stop on the main line ML to achieve the third black bell winning or the fourth black bell winning. To stop the "black BAR" symbol on the middle reel 32M on the main line ML, the middle stop button 43 must be operated when symbols included in the "middle black range" - the range of symbols 0 to 5 and 14 to 18 on the middle reel 32M - are on the main line ML.

Although not shown in the figures, when an index value IV of "6" or "8" is won in AT state ST14 and the game begins, a text image saying "Aim for the middle black range" is displayed on the image display device 63, and the sound "middle black" is output from the speaker 62. This text image is displayed above the unit display image G2 corresponding to the first stop. This prompts the player to operate the middle stop button 43 when a symbol included in the "middle black range" (the 0th to 5th and 14th to 18th symbols on the middle reel 32M) is on the main line ML, and increases the likelihood of achieving a third or fourth black bell win.

As already explained with reference to Figures 63(a) and 63(b), in the non-internal utility lottery table TB1 and the internal utility lottery table TB2, the black bell winning data set with index value IV = 10 is the fifth black bell winning data, and the black bell winning data set with index value IV = 12 is the sixth black bell winning data. Furthermore, when an index value IV of "10" or "12" is won, the first stop must be on the right reel 32R to achieve the fifth black bell winning or the sixth black bell winning. Furthermore, as already explained with reference to Figure 60, the "black BAR" symbol on the right reel 32R must stop on the main line ML to achieve the fifth black bell winning or the sixth black bell winning. To stop the "black BAR" symbol on the right reel 32R on the main line ML, the right stop button 44 must be operated when symbols included in the "right black range," which is the range of symbols 0 to 10 and 19 to 20 on the right reel 32R, are on the main line ML.

Although not shown in the figures, when an index value IV of "10" or "12" is hit in AT state ST14 and the game begins, a text image saying "Aim for the black area on the right" is displayed on the image display device 63, and the sound "black on the right" is output from the speaker 62. This text image is displayed above the unit display image G3 corresponding to the first stop. This prompts the player to operate the right stop button 44 when the symbols included in the "black area on the right" (the 0th to 10th and 19th to 20th ranges on the right reel 32R) are on the main line ML, and increases the chances of achieving the 5th or 6th black bell win.

Next, we will explain the content of the additional challenge effect that is executed in AT state ST14.

When AT state ST14 begins, six missions, Mission 1 to Mission 6, are given. Mission 1 is to "achieve the 1st or 2nd Red Bell win, which are red bell wins that can be achieved by making the first stop on the left reel 32L." Mission 2 is to "achieve the 3rd or 4th Red Bell win, which are red bell wins that can be achieved by making the first stop on the middle reel 32M." Mission 3 is to "achieve the 5th or 6th Red Bell win, which are red bell wins that can be achieved by making the first stop on the right reel 32R." The fourth mission is to "achieve the first or second black bell win, which is a black bell win that can be achieved by making the first stop on the left reel 32L," the fifth mission is to "achieve the third or fourth black bell win, which is a black bell win that can be achieved by making the first stop on the center reel 32M," and the sixth mission is to "achieve the fifth or sixth black bell win, which is a black bell win that can be achieved by making the first stop on the right reel 32R." In the AT state ST14, if all of the first through sixth missions are completed, a post-completion bonus is applied to increase the remaining number of gaming media awarded in the AT state ST14, provided that neither the first ending flag nor the second ending flag in the main RAM 74 is set to "1."

If the last of the first through sixth missions is achieved by achieving any of the first through sixth red bell wins, a post-achievement bonus will be added that increases the remaining number of awarded gaming media in AT state ST14 by 40. Furthermore, if the last of the first through sixth missions is achieved by achieving any of the first through sixth black bell wins, a post-achievement bonus will be added that increases the remaining number of awarded gaming media in AT state ST14 by 30. This draws attention to the type of bell win that will be achieved when the last of the first through sixth missions is achieved, making the game more enjoyable.

As shown in Figure 73 (a), when the additional challenge effect starts, the text image G62 saying "Complete all missions" and the first achievement status display area G63 to the sixth achievement status display area G68 are displayed on the image display device 63. The display of these text image G62 and achievement status display areas G63 to G68 continues until the AT state ST14 ends. However, if all missions are completed before the AT state ST14 ends, the display of the text image G62 saying "Complete all missions" will end based on the fact that this state has been reached.

The first achievement status display area G63 displays the progress status of the first mission, the second achievement status display area G64 displays the progress status of the second mission, and the third achievement status display area G65 displays the progress status of the third mission. When missions 1 to 3 have not been cleared, as shown in FIG. 73(a), the first achievement status display area G63 displays the word "Left Red," the second achievement status display area G64 displays the word "Middle Red," and the third achievement status display area G65 displays the word "Right Red." When mission 1 is cleared, the word displayed in the first achievement status display area G63 changes to "Completed," as shown in FIG. 73(b). When mission 2 is cleared, the word displayed in the second achievement status display area G64 changes to "Completed," and when mission 3 is cleared, the word displayed in the third achievement status display area G65 changes to "Completed."

The fourth achievement status display area G66 displays the progress status of the fourth mission, the fifth achievement status display area G67 displays the progress status of the fifth mission, and the sixth achievement status display area G68 displays the progress status of the sixth mission. When missions four through six have not been cleared, as shown in FIG. 73(a), the fourth achievement status display area G66 displays the word "left black," the fifth achievement status display area G67 displays the word "middle black," and the sixth achievement status display area G68 displays the word "right black." When mission four is cleared, the word displayed in the fourth achievement status display area G66 changes to "Completed," as shown in FIG. 73(b). Furthermore, when mission five is cleared, the word displayed in the fifth achievement status display area G67 changes to "Completed," and when mission six is cleared, the word displayed in the sixth achievement status display area G68 changes to "Completed."

In this way, by allowing the player to check the completion status of the first through sixth missions based on the display in the first through sixth completion status display areas G63 through G68, it is possible to grasp the missions that have yet to be completed. Furthermore, the more missions that are completed, the greater the sense of anticipation that all missions will be completed and additional points will be added upon completion.

In the additional challenge presentation, when any of the missions is cleared, the upper lamp 61 is controlled to emit light in a manner that notifies the player that the mission has been cleared, and sound output is controlled so that a sound that notifies the player that the mission has been cleared is output from the speaker 62. The word "Achieved" is then displayed in the achievement status display areas G63 to G68 that correspond to the cleared mission.

As shown in Figure 73 (b), if the last completed mission was any of the first to third missions, the image display device 63 will display a text image G69 saying "Completed by achieving red last" and a text image G71 saying "+40 coins" corresponding to the number of coins awarded. Also, although not shown, if the last completed mission was any of the fourth to sixth missions, the image display device 63 will display a text image saying "Completed by achieving black last" and a text image saying "+30 coins" corresponding to the number of coins awarded. This allows the player to understand that the remaining number of gaming media awarded in the AT state ST14 has increased by completing all of the first to sixth missions.

When transitioning from the normal gaming state ST11 to the AT state ST14, when the BB state ST13 transitioned from the normal gaming state ST11 ends and transitions to the AT state ST14, or when the BB state ST13 transitioned from the normal gaming state ST11 via the bonus internal state ST12 ends and transitions to the AT state ST14, the additional challenge effect begins. The additional challenge effect ends when all missions are completed and additional bonuses are added after completion, when the first ending flag in the main RAM 74 is set to "1" when there are missions that have not yet been completed, or when the second ending flag in the main RAM 74 is set to "1" when there are missions that have not yet been completed.

By configuring the add-on challenge effect to end when the first ending flag in the main RAM 74 is set to "1," it is possible to prevent the add-on challenge effect from being executed in situations where the number of games played in the second section SC2, as measured using the continued games counter 74b, is likely to reach the upper limit. Furthermore, by configuring the add-on challenge effect to end when the second ending flag in the main RAM 74 is set to "1," it is possible to prevent the add-on challenge effect from being executed in situations where the limited total net increase in gaming media, as measured using the total acquisition counter 74c, is likely to reach the upper limit. This prevents situations where add-on play cannot be performed after completion even though all missions have been completed.

If BB winning data is set in the main RAM 74 and the bonus state transitions to the bonus internal state ST12 or the BB state ST13 while the AT state ST14 is in progress and the additional challenge effect has not yet ended (a state in which there are missions that have not yet been completed), the additional challenge effect will be stopped. When the BB state ST13 ends and the AT state ST14 is restored, the stopped additional challenge effect will resume with the missions that were completed before the stoppage having been completed, provided that neither the first ending flag nor the second ending flag in the main RAM 74 is set to "1."

When BB state ST13 ends and the game returns to AT state ST14, the additional challenge effect is resumed with the missions that were completed before the stoppage still completed. This prevents the player from feeling that they have lost information about the missions that were completed before the stoppage. Furthermore, by configuring the additional challenge effect not to be executed when BB state ST13 ends and the game returns to AT state ST14 while the first ending flag in the main RAM 74 is set to "1," the additional challenge effect can be prevented from being executed in situations where the number of games played in the second section SC2, measured using the continued game counter 74b, is likely to reach the upper limit. Furthermore, by configuring the additional challenge effect not to be executed when BB state ST13 ends and the game returns to AT state ST14 while the second ending flag in the main RAM 74 is set to "1," the additional challenge effect can be prevented from being executed in situations where the limited total net increase in gaming media, measured using the total acquisition counter 74c, is likely to reach the upper limit.

When the game is in AT state ST14 and all missions have already been achieved and the additional challenge effect has ended, BB winning data is set in the main RAM 74, transitioning to the bonus internal state ST12 or BB state ST13 occurs, and when BB state ST13 ends and the game returns to AT state ST14, a new additional challenge effect begins with not all missions being achieved. This prevents a situation in AT state ST14 where the additional challenge effect has ended and no additional bonuses can be generated after achievement continues for a long time.

Next, the stop operation notification control process executed by the main MPU 72 will be explained with reference to the flowchart in Figure 74. As already explained, the stop operation notification control process is executed in step S2814 of the role selection process (Figure 62).

First, it is determined whether the current gaming state is AT state ST14 (step S3501), and if it is not AT state ST14 (step S3501: NO), the processing from step S3502 onwards is not executed. This makes it possible to prevent the stop operation notification from being executed in gaming states other than AT state ST14 (i.e., normal gaming state ST11, bonus internal state ST12, or BB state ST13).

If the game is in AT state ST14 (step S3501: YES), it is determined whether the value of the index value counter 74a in the main RAM 74 is 1 or greater (step S3502). If the value of the index value counter 74a is 1 or greater (step S3502: YES), it is determined whether the value of the index value counter 74a is 2 or less (step S3503). If a positive determination is made in step S3503, that is, if an index value IV of 1 or 2 is won in the lottery process for the role in this game (FIG. 62), a left-center stop operation notification command is read from the main ROM 73 (step S3504). The left-center stop operation notification command contains data for causing the production side MPU 92 to notify the stop order in which the first stop is the left reel 32L, the second stop is the center reel 32M, and the third stop is the right reel 32R.

If a negative determination is made in step S3503, it is determined whether the value of the index value counter 74a is equal to or less than "4" (step S3505). If a positive determination is made in step S3505, i.e., if an index value IV of "3" or "4" is won in the lottery process for the role in this game (FIG. 62), a left/right stop operation notification command is read from the main ROM 73 (step S3506). The left/right stop operation notification command contains data for causing the production side MPU 92 to notify the stop order in which the first stop is the left reel 32L, the second stop is the right reel 32R, and the third stop is the center reel 32M.

If a negative determination is made in step S3505, it is determined whether the value of the index value counter 74a is equal to or less than "6" (step S3507). If a positive determination is made in step S3507, that is, if an index value IV of "5" or "6" is won in the lottery process for the role in this game (FIG. 62), a center left stop operation notification command is read from the main ROM 73 (step S3508). The center left stop operation notification command contains data for causing the production side MPU 92 to notify the stop order in which the first stop is the center reel 32M, the second stop is the left reel 32L, and the third stop is the right reel 32R.

If a negative determination is made in step S3507, it is determined whether the value of the index value counter 74a is equal to or less than "8" (step S3509). If a positive determination is made in step S3509, that is, if an index value IV of "7" or "8" is won in the lottery process for the role in this game (FIG. 62), a center right stop operation notification command is read from the main ROM 73 (step S3510). The center right stop operation notification command contains data for causing the production side MPU 92 to notify the stop order in which the first stop is the center reel 32M, the second stop is the right reel 32R, and the third stop is the left reel 32L.

If a negative determination is made in step S3509, it is determined whether the value of the index value counter 74a is equal to or less than "10" (step S3511). If a positive determination is made in step S3511, that is, if an index value IV of "9" or "10" is won in the lottery process for the role in this game (FIG. 62), a right/left stop operation notification command is read from the main ROM 73 (step S3512). The right/left stop operation notification command contains data for causing the production side MPU 92 to notify the stop order in which the first stop is the right reel 32R, the second stop is the left reel 32L, and the third stop is the center reel 32M.

If a negative determination is made in step S3511, it is determined whether the value of the index value counter 74a is equal to or less than "12" (step S3513). If a positive determination is made in step S3513, that is, if an index value IV of "11" or "12" is won in the lottery process for the role in this game (FIG. 62), a right-center stop operation notification command is read from the main ROM 73 (step S3514). The right-center stop operation notification command contains data for causing the production-side MPU 92 to notify the stop order in which the first stop is the right reel 32R, the second stop is the center reel 32M, and the third stop is the left reel 32L.

When step S3504, step S3506, step S3508, step S3510, step S3512, or step S3514 is performed, the process determines whether the value of the index value counter 74a in the main RAM 74 is odd by determining whether the value of the 0th bit of the index value counter 74a is "1" (step S3515). As already explained, the index value counter 74a is a 1-byte counter having bits 0 to 7. If an odd index value IV is won in the winning combination lottery process (Figure 62) and the odd index value IV is set in the index value counter 74a, the 0th bit of the index value counter 74a is set to "1." Furthermore, if an even index value IV is won in the winning combination lottery process and the even index value IV is set in the index value counter 74a, the 0th bit of the index value counter 74a is set to "0." Furthermore, if none of the index values IV are selected in the winning combination lottery process (FIG. 62), the value of the index value counter 74a becomes "0" and the 0th bit of the index value counter 74a is set to "0". In step S3515, if the value of the 0th bit of the 0th to 7th bits of the index value counter 74a is "1", the value of the index value counter 74a is determined to be odd.

If the configuration were to determine whether the numerical information set in index value counter 74a is odd by calculating the remainder when the numerical information set in index value counter 74a is divided by "2" and executing a determination process to determine whether the remainder is "1," a process would be required to calculate the remainder. In contrast, by determining whether the value of index value counter 74a is odd by determining whether the value of the 0th bit in index value counter 74a is "1," the amount of processing required to determine whether the value of index value counter 74a is odd can be reduced.

If a positive determination is made in step S3515, red bell winning information indicating that an index value IV to which any red bell winning data is set is set in the stop operation notification command read into the main RAM 74 (step S3516). In step S3516, the value of one bit in the data of the stop operation notification command corresponding to the red bell winning information indicating that an index value IV to which any red bell winning data is set, or the black bell winning information indicating that an index value IV to which any black bell winning data is set, is changed from "0" to "1." When the value of the one bit is "0," the black bell winning information is set, and when the one bit is set to "1," the red bell winning information is set. The stop operation notification command is read into the main RAM 74 with the black bell winning information set. Therefore, if a negative determination is made in step S3515 and the red bell winning information is not set in the stop operation notification command, the black bell winning information remains set.

If a negative judgment is made in step S3515, or if the processing of step S3516 is performed, a process for transmitting a stop operation notification command is executed (step S3517). In the process for transmitting the stop operation notification command, the stop operation notification command read into the main RAM 74 is transmitted to the production side MPU 92.

As already explained with reference to Figures 63(a), 63(b), and 64, in the non-internal utility lottery table TB1 and the internal utility lottery table TB2, the index values IV = 1 to 2 are set to first red bell winning data or first black bell winning data, which can be used to achieve a win by making the first stop the left reel 32L and the second stop the center reel 32M. Therefore, a left-center stop operation notification command can be read out based on the value of the index value counter 74a being in the numerical range of "1" to "2." Furthermore, the index values IV = 3 to 4 are set to second red bell winning data or second black bell winning data, which can be used to achieve a win by making the first stop the left reel 32L and the second stop the right reel 32R. Therefore, a left-right stop operation notification command can be read out based on the value of the index value counter 74a being in the numerical range of "3" to "4." Furthermore, index values IV = 5 to 6 are set to third red bell winning data or third black bell winning data, which can achieve a win by making the first stop on the center reel 32M and the second stop on the left reel 32L. Therefore, a center left stop operation notification command can be read out based on the value of the index value counter 74a being in the numerical range of "5" to "6."

Index values IV = 7-8 are set to the fourth red bell winning data or the fourth black bell winning data, which can be used to achieve a win by setting the first stop on the center reel 32M and the second stop on the right reel 32R. Therefore, a center-right stop operation notification command can be read out based on the value of the index value counter 74a being in the range of "7" to "8." Furthermore, index values IV = 9-10 are set to the fifth red bell winning data or the fifth black bell winning data, which can be used to achieve a win by setting the first stop on the right reel 32R and the second stop on the left reel 32L. Therefore, a right-left stop operation notification command can be read out based on the value of the index value counter 74a being in the range of "9" to "10." Furthermore, index values IV = 11-12 are set to the sixth red bell winning data or the sixth black bell winning data, which can be used to achieve a win by setting the first stop on the right reel 32R and the second stop on the center reel 32M. Therefore, a right-center stop operation notification command can be read out based on the value of the index value counter 74a being in the numerical range of "11" to "12." This simplifies the processing configuration for reading out a stop operation notification command corresponding to numerical information based on whether any numerical information in the numerical range of "1" to "12" is set in the index value counter 74a, compared to a configuration in which a process is performed to determine whether each piece of numerical information falling within the numerical range of "1" to "12" is set in the index value counter 74a, and a stop operation notification command corresponding to that numerical information is read out based on a positive determination.

As already explained with reference to Figures 63(a), 63(b), and 64, in non-internal utility lottery table TB1 and internal utility lottery table TB2, any of the first to sixth red bell winning data is set to odd index values IV = 1, 3, 5, 7, 9, 11 in the numerical range of index value IV = 1 to 12, and any of the first to sixth black bell winning data is set to even index values IV = 2, 4, 6, 8, 10, 12 in the numerical range of index value IV = 1 to 12. When the index value counter 74a has any numerical information within the numerical range of "1" to "12" set in the index value counter 74a, the main MPU 72 executes processing to determine whether the numerical information set in the index value counter 74a is odd, and executes processing to change the black bell winning information set in the stop operation notification command to red bell winning information based on a positive determination. This simplifies the processing configuration for setting the winning information in the stop operation notification command that corresponds to the numerical information set in the index value counter 74a, out of the red bell winning information and black bell winning information, to a state where the winning information is set in the stop operation notification command, compared to a configuration that executes a process to determine whether the value of the index value counter 74a is one of "1," "3," "5," "7," "9," or "11," and then executes a process to change the black bell winning information set in the stop operation notification command to red bell winning information based on a positive determination.

Next, the stop operation notification process executed by the production-side MPU 92 will be explained with reference to the flowchart shown in Figure 75. The stop operation notification process is repeatedly executed by the production-side MPU 92 at relatively short intervals (for example, every 4 milliseconds).

First, it is determined whether the stop operation notification flag stored in the production-side RAM 94 is set to "1" (step S3601). The stop operation notification flag is a flag that allows the production-side MPU 92 to determine that a stop operation notification is being executed. If the stop operation notification flag is not set to "1" (step S3601: NO), it is determined whether any stop operation notification command has been received from the main-side MPU 72 (step S3602).

If any stop operation notification command has been received (step S3602: YES), the stop order notification start process is executed (step S3603). In the stop order notification start process, the left unit display image G1, middle unit display image G2, and right unit display image G3 corresponding to the received stop operation notification command are started to be displayed on the image display device 63. This starts the stop order notification on the image display device 63. Based on the stop order notification, the player can understand the operation sequence of the stop buttons 42-44 that will result in either a red bell win or a black bell win.

Then, the target range notification start process is executed (step S3604). In the target range notification start process, if a left-center stop operation notification command or a left-right stop operation notification command in which red bell winning information is set is received, the target range notification table for left red is read from the presentation-side ROM 93 to the presentation-side RAM 94, and in accordance with the target range notification table for left red, the display of a text image G61 saying "Aim for the left red range" is started on the image display device 63, and the audio output of "left red" is started from the speaker 62. Also, if a center-left stop operation notification command or a center-right stop operation notification command in which red bell winning information is set is received, the target range notification table for center red is read from the presentation-side ROM 93 to the presentation-side RAM 94, and in accordance with the target range notification table for center red, the display of a text image saying "Aim for the middle red range" is started on the image display device 63, and the audio output of "middle red" is started from the speaker 62. Furthermore, when a right/left stop operation notification command or a right/center stop operation notification command for which red bell winning information is set is received, the target range notification table for right red is read from the production-side ROM 93 to the production-side RAM 94, and in accordance with the target range notification table for right red, the image display device 63 begins to display the text image "Aim for the red range on the right," and the speaker 62 begins to output the audio "red on the right."

In the target range notification start process (step S3604), if a left-center stop operation notification command or a left-right stop operation notification command for which black bell winning information is set is received, the target range notification table for the left black is read from the production side ROM 93 to the production side RAM 94, and in accordance with the target range notification table for the left black, the display of a text image (not shown) saying "Aim for the left black range" is initiated on the image display device 63, and the audio output of "left black" is initiated from the speaker 62. Also, if a center-left stop operation notification command or a center-right stop operation notification command for which black bell winning information is set is received, the target range notification table for the middle black is read from the production side ROM 93 to the production side RAM 94, and in accordance with the target range notification table for the middle black, the display of a text image saying "Aim for the middle black range" is initiated on the image display device 63, and the audio output of "middle black" is initiated from the speaker 62. Furthermore, if a right/left stop operation notification command or a right/center stop operation notification command in which black bell winning information is set is received, the target range notification table for right black is read from the production-side ROM 93 to the production-side RAM 94, and according to the target range notification table for right black, the image display device 63 begins to display the text image "Aim for the black range on the right," and the speaker 62 begins to output the audio "black on the right." After that, the stop operation notification flag in the production-side RAM 94 is set to "1" (step S3605). This allows the production-side MPU 92 to know that a stop operation notification is being executed.

If the stop operation notification flag in the production side RAM 94 is set to "1" (step S3601: YES), the stop operation notification execution process is executed (step S3606). In the stop operation notification execution process, if any of the target range notification tables has been read from the production side RAM 94, the target range notification is performed on the speaker 62 and the image display device 63 in accordance with that target range notification table.

If a stop command is received from the main MPU 72 (step S3607: YES), it is determined whether the stop command corresponds to the first stop (step S3608). If a stop command corresponding to the first stop is received (step S3608: YES), the target range notification termination process is executed (step S3609). In the target range notification termination process, the display of the text image G61 "Aim for the left red range," the text image "Aim for the middle red range," the text image "Aim for the right red range," the text image "Aim for the left black range," the text image "Aim for the middle black range," or the text image "Aim for the right black range," which is being executed on the image display device 63, is terminated. This prevents the player from misunderstanding that they must continue to aim for the red range or the black range when operating the stop buttons 42-44 after the second stop.

If the stop command received from the main MPU 72 is a stop command corresponding to the third stop (step S3610: YES), the stop order notification termination process is executed (step S3611). In the stop order notification termination process, the stop order notification being executed by the speaker 62 and the image display device 63 is terminated. After that, the stop operation notification in progress flag in the presentation side RAM 94 is cleared to "0" (step S3612). This allows the presentation side MPU 92 to know that the stop operation notification has ended.

Next, before explaining the normal processing (Figure 76) executed by the main MPU 72, we will explain the configuration of the main RAM 74 used to execute the additional challenge performance. As shown in Figure 61, the main RAM 74 is provided with a red left achievement flag 74h, a red center achievement flag 74i, a red right achievement flag 74j, a black left achievement flag 74k, a black center achievement flag 74l, and a black right achievement flag 74m.

The red left achievement flag 74h is a flag that allows the main MPU 72 to determine that the first mission has been achieved, the red center achievement flag 74i is a flag that allows the main MPU 72 to determine that the second mission has been achieved, and the red right achievement flag 74j is a flag that allows the main MPU 72 to determine that the third mission has been achieved. The black left achievement flag 74k is a flag that allows the main MPU 72 to determine that the fourth mission has been achieved, the black center achievement flag 74l is a flag that allows the main MPU 72 to determine that the fifth mission has been achieved, and the black right achievement flag 74m is a flag that allows the main MPU 72 to determine that the sixth mission has been achieved.

Next, the normal processing executed by the main MPU 72 will be explained with reference to the flowchart in Figure 76. As already explained, the normal processing is executed in step S2904 of the response processing at the end of game play (Figure 66).

If the AT transition confirmation flag in the main RAM 74 is set to "1" (step S3701: YES), that is, if an AT transition win occurs in the normal gaming state ST11, the AT transition confirmation flag is cleared to "0" (step S3702), and the achievement flag clear process is executed (step S3703). In the achievement flag clear process, the red left achievement flag 74h, red center achievement flag 74i, red right achievement flag 74j, black left achievement flag 74k, black center achievement flag 74l, and black right achievement flag 74m in the main RAM 74 are cleared to "0". This allows a new additional challenge presentation to be started when not all missions have been achieved when transitioning from the normal gaming state ST11 to the AT state ST14.

Then, the additional challenge in progress flag stored in the main RAM 74 is set to "1" (step S3704). The additional challenge in progress flag is a flag that allows the main MPU 72 to understand that the additional challenge performance is being executed and that there are missions that have not yet been completed. Then, an additional challenge start command is sent to the performance MPU 92 (step S3705). When the performance MPU 92 receives the additional challenge start command, it starts the additional challenge on the upper lamp 61, speaker 62, and image display device 63.

Then, the AT state flag stored in the main RAM 74 is set to "1" (step S3706). The AT state flag is a flag that allows the main MPU 72 to determine that the game is in AT state ST14. Then, an AT transition command is sent to the performance MPU 92 (step S3707). When the performance MPU 92 receives the AT transition command, it causes the upper lamp 61, speaker 62, and image display device 63 to start the base performance of AT state ST14.

After that, if the second interval flag in the main RAM 74 is not set to "1" (step S3708: NO), processing is executed to set the second interval SC2 (steps S3709 to S3710). In the processing to set the second interval SC2, the second interval flag in the main RAM 74 is first set to "1" to set the second interval SC2, and the number of continued games counter 74b and the total number of wins counter 74c in the main RAM 74 are both cleared to "0" (step S3709). Then, processing is executed to light up the interval display unit 67 (step S3710). In the processing to light up the interval display unit 67, the interval display unit 67 is switched from an off state to an on state. This causes the interval display unit 67 to start notifying the player that the second interval SC2 is being entered.

Next, the bonus end processing executed by the main MPU 72 will be explained with reference to the flowchart in Figure 77. As already explained, the bonus end processing is executed in step S3011 of the bonus processing (Figure 67).

First, it is determined whether the game state at the time the BB role that triggered the current BB state ST13 was won was AT state ST14 (step S3801). If a positive determination is made in step S3801, it is determined whether either the first ending flag or the second ending flag in the main RAM 74 is set to "1" (step S3802). If neither ending flag is set to "1" (step S3802: NO), it is determined whether the additional challenge flag in the main RAM 74 is set to "1" (step S3803).

If the additional challenge in progress flag is set to "1" (step S3803: YES), that is, if the additional challenge performance that was being executed before the BB state ST13 that is ending this time was started was stopped midway, an additional challenge resume command is sent to the performance side MPU 92 (step S3804). When the performance side MPU 92 receives the additional challenge resume command, it resumes the additional challenge performance from the stopped state.

If a negative judgment is made in step S3801, it is determined whether the AT transition confirmation flag in the main RAM 74 is set to "1" (step S3805). If the AT transition confirmation flag is set to "1" (step S3805: YES), that is, if an AT transition win has occurred, the AT transition confirmation flag is cleared to "0" (step S3806).

If a negative determination is made in step S3803 or if step S3806 is performed, steps S3807 through S3809 are executed, similar to steps S3703 through S3705 in the normal processing (FIG. 76) already described. Specifically, an achievement flag clearing process is first executed to clear the red left achievement flag 74h, red center achievement flag 74i, red right achievement flag 74j, black left achievement flag 74k, black center achievement flag 74l, and black right achievement flag 74m to "0" (step S3807). As a result, in a normal gaming state ST11 or in an AT state ST14 where all missions have been achieved and the bonus challenge effect has ended, BB winning data is set in the main RAM 74, and the game transitions to the bonus internal state ST12 or BB state ST13. When the BB state ST13 ends and the game transitions to the AT state ST14, a new bonus challenge effect can be initiated even though not all missions have been achieved.

Then, the additional challenge in progress flag in the main RAM 74 is set to "1" (step S3808). This allows the main MPU 72 to understand that the additional challenge presentation is being executed and that there are missions that have not yet been completed. Then, an additional challenge start command is sent to the presentation MPU 92 (step S3809). When the presentation MPU 92 receives the additional challenge start command, it starts the additional challenge on the upper lamp 61, speaker 62, and image display device 63.

If a positive judgment is made in step S3802, if the processing of step S3804 is performed, or if the processing of step S3809 is performed, steps S3810 to S3814 are the same as steps S3706 to S3710 in the normal processing (FIG. 76) already described. Specifically, the AT status flag in the main RAM 74 is set to "1" (step S3810), and an AT transition command is sent to the presentation MPU 92 (step S3811). Thereafter, if the second interval flag in the main RAM 74 is not set to "1" (step S3812: NO), the second interval flag in the main RAM 74 is set to "1" to set the second interval SC2, and the number of continued games counter 74b and the total number of wins counter 74c in the main RAM 74 are each cleared to "0" (step S3813). Then, the section display unit 67 is turned on by executing the lighting process (step S3814).

If a negative judgment is made in step S3805, if a positive judgment is made in step S3812, or if the processing of step S3814 is performed, a BB end command indicating that the BB state ST13 has ended is sent to the production side MPU 92 (step S3815). When the production side MPU 92 receives the BB end command, it causes the upper lamp 61, speaker 62, and image display device 63 to perform a performance indicating that the BB state ST13 has ended.

Next, the AT processing executed by the main MPU 72 will be explained with reference to the flowchart in Figure 78. As already explained, the AT processing is executed in step S2905 of the response processing at the end of game play (Figure 66).

First, it is determined whether a small win has been achieved in the current game, resulting in the awarding of a number of gaming media exceeding the bet number of "3" (step S3901). In step S3901, a positive determination is made if the value of the payout number counter in the main RAM 74 is "3" or greater. This makes it possible to make a positive determination if any of the first to sixth red bell wins, the first to sixth black bell wins, the regular bell win, and the watermelon win is achieved. If a positive determination is made in step S3901, a subtraction process is executed on the AT continuation counter 74d (step S3903), provided that the value of the AT continuation counter 74d in the main RAM 74 is 1 or greater (step S3902: YES). In this subtraction process, the bet number of "3" is subtracted from the number of gaming media awarded in the current game, and the resulting value is subtracted from the AT continuation counter 74d.

If a negative judgment is made in step S3901, if a negative judgment is made in step S3902, or if the processing of step S3903 is executed, it is determined whether the additional challenge flag in the main RAM 74 is set to "1" (step S3904). If the additional challenge flag is set to "1" (step S3904: YES), it is determined whether either the first ending flag or the second ending flag in the main RAM 74 is set to "1" (step S3905). If neither the first ending flag nor the second ending flag is set to "1" (step S3905: NO), the achievement response processing described below is executed (step S3906).

If any ending flag in the main RAM 74 is set to "1" (step S3905: YES), the additional challenge in progress flag in the main RAM 74 is cleared to "0" (step S3907). This allows the additional challenge performance to end if any ending flag is set to "1" while the additional challenge performance is being performed. After that, an additional challenge end command is sent to the performance side MPU 92 (step S3908). When the performance side MPU 92 receives the additional challenge end command, it causes the additional challenge performance to end on the upper lamp 61, speaker 62, and image display device 63.

If a negative judgment is made in step S3904, if the processing of step S3906 is performed, or if the processing of step S3908 is performed, it is determined whether the value of the AT continuation counter 74d in the main RAM 74 is "0" (step S3909). If the value of the AT continuation counter 74d is "0" (step S3909: YES), i.e., if the remaining number of gaming media awarded in the current AT state ST14 is "0," it is determined whether the add-on challenge flag in the main RAM 74 is set to "1" (step S3910). If the add-on challenge flag is set to "1" (step S3910: YES), steps S3911 to S3912 execute the same processing as steps S3907 to S3908 already described. Specifically, the add-on challenge flag in the main RAM 74 is cleared to "0" (step S3911). This allows the additional challenge effect to end when the remaining number of gaming media awarded in AT state ST14 becomes "0" and AT state ST14 ends while the additional challenge effect is being executed. An additional challenge end command is then sent to the effect-side MPU 92 (step S3912). Upon receiving the additional challenge end command, the effect-side MPU 92 causes the upper lamp 61, speaker 62, and image display device 63 to end the additional challenge effect.

If a negative judgment is made in step S3910, or if the processing of step S3912 is performed, the AT state flag in the main RAM 74 is cleared to "0" (step S3913). This allows the main MPU 72 to understand that the AT state ST14 has ended. An AT end command is then sent to the presentation side MPU 92 (step S3914). When the presentation side MPU 92 receives the AT end command, it controls the upper lamp 61, speaker 62, and image display device 63 so that a presentation indicating the end of the AT state ST14 is executed and then a presentation corresponding to the normal game state ST11 is started.

Then, processing to end the second section SC2 (steps S3915 to S3917) is executed. Specifically, initialization processing for the second section SC2 is first executed (step S3915). In the initialization processing for the second section SC2, the second section flag in the main RAM 74 is cleared to "0". This changes the play section to the first section SC1. Then, processing to turn off the section display unit 67 is executed, switching the section display unit 67 from a lit state to a lit state (step S3916). This ends the notification on the section display unit 67 that it is the second section SC2. Then, a second section initialization command indicating that the second section SC2 has been initialized is sent to the presentation-side MPU 92 (step S3917). This causes the presentation-side MPU 92 to execute a presentation corresponding to the end of the second section SC2.

Next, the achievement response processing executed by the main MPU 72 will be explained with reference to the flowchart in Figure 79. As already explained, the achievement response processing (step S3906) is executed on the condition that neither the first ending flag nor the second ending flag in the main RAM 74 is set to "1" (step S3905: NO) during the AT processing (Figure 78).

First, it is determined whether the value of the payout number counter in the main RAM 74 is equal to or greater than "2" (step S4001). As already explained, the payout number counter is a counter that allows the main MPU 72 to determine the number of gaming media to be awarded in the media awarding process in step S309 of normal processing (Figure 15) when a small win is achieved. If the value of the payout number counter is equal to or greater than "2" (step S4001: YES), i.e., if a small win in which the number of awarded gaming media is set to "2" or greater has been achieved, it is determined whether the value of the index value counter 74a in the main RAM 74 is odd by determining whether the value of the 0th bit in the index value counter 74a is equal to "1" (step S4002). As already explained, by determining whether the value of the index value counter 74a is odd by determining whether the value of the 0th bit in the index value counter 74a is "1", the number of processes required to determine whether the value of the index value counter 74a is odd can be reduced compared to a configuration in which the remainder is calculated when the numerical information set in the index value counter 74a is divided by "2" and the remainder is determined to be "1".

As already explained with reference to Figures 63(a) and 63(b), any of the first through sixth red bell winning data is set to odd index values IV in the range of index values IV = 1 to 12, and any of the first through sixth black bell winning data is set to even index values IV in that range. If the value of the index value counter 74a is odd (step S4002: YES), processing corresponding to a red bell winning is executed in steps S4003 to S4011. If the value of the index value counter 74a is even (step S4002: NO), processing corresponding to a black bell winning is executed in steps S4012 to S4020.

If a positive determination is made in step S4002, it is determined whether the value of the index value counter 74a in the main RAM 74 is equal to or less than "4" (step S4003). As already explained with reference to Figures 63(a) and 63(b), in the non-internal role lottery table TB1 and the internal role lottery table TB2, the index values IV = 1 and 3 are set to either the red bell winning data (specifically, the first red bell winning data or the second red bell winning data) that can result in a win when the first stop is the left reel 32L. If a positive determination is made in step S4003, i.e., if the index value IV of "1" or "3" is won in the role lottery process (Figure 62) and the first red bell winning or the second red bell winning is achieved, it is determined whether the red left achievement flag 74h in the main RAM 74 is set to "1" (step S4004). If the red-left achievement flag 74h is not set to "1" (step S4004: NO), the red-left achievement flag 74h is set to "1" (step S4005). This allows the main MPU 72 to recognize that the first mission has been achieved.

If the value of the index value counter 74a in the main RAM 74 is equal to or greater than "5" (step S4003: NO), it is determined whether the value of the index value counter 74a is equal to or less than "8" (step S4006). As already explained with reference to Figures 63(a) and 63(b), in the non-internal role lottery table TB1 and the internal role lottery table TB2, the index values IV = 5 and 7 are set to either the red bell winning data (specifically, the third red bell winning data or the fourth red bell winning data) that can be used to achieve a win by setting the first stop to the center reel 32M. If a positive determination is made in step S4006, i.e., if the index value IV of "5" or "7" is won in the role lottery process (Figure 62) and the third red bell winning or the fourth red bell winning is achieved, it is determined whether the red center achievement flag 74i in the main RAM 74 is set to "1" (step S4007). If the red achievement flag 74i is not set to "1" (step S4007: NO), the red achievement flag 74i is set to "1" (step S4008). This allows the main MPU 72 to recognize that the second mission has been achieved.

If the value of the index value counter 74a in the main RAM 74 is equal to or greater than "9" (step S4006: NO), the system determines whether the value of the index value counter 74a is equal to or less than "12" (step S4009). As already explained with reference to Figures 63(a) and 63(b), in the non-internal role lottery table TB1 and the internal role lottery table TB2, the index values IV = 9 and 11 are set to either the red bell winning data (specifically, the fifth red bell winning data or the sixth red bell winning data) that can result in a win when the first stop is the right reel 32R. If a positive determination is made in step S4009, i.e., if the index value IV of "9" or "11" is won in the role lottery process (Figure 62) and the fifth or sixth red bell winning is achieved, the system determines whether the red right achievement flag 74j in the main RAM 74 is set to "1" (step S4010). If the red right achievement flag 74j is not set to "1" (step S4010: NO), the red right achievement flag 74j is set to "1" (step S4011). This allows the main MPU 72 to recognize that the third mission has been achieved.

If a negative determination is made in step S4002, it is determined whether the value of the index value counter 74a in the main RAM 74 is equal to or less than "4" (step S4012). As already explained with reference to Figures 63(a) and 63(b), in the non-internal role lottery table TB1 and the internal role lottery table TB2, the index values IV = 2 and 4 are set to either the black bell winning data (specifically, the first black bell winning data or the second black bell winning data) that can result in a win when the first stop is the left reel 32L. If a positive determination is made in step S4012, i.e., if the index value IV of "2" or "4" is won in the role lottery process (Figure 62) and the first black bell winning or second black bell winning is achieved, it is determined whether the black left achievement flag 74k in the main RAM 74 is set to "1" (step S4013). If the black left achievement flag 74k is not set to "1" (step S4013: NO), the black left achievement flag 74k is set to "1" (step S4014). This allows the main MPU 72 to recognize that the fourth mission has been achieved.

If the value of the index value counter 74a in the main RAM 74 is equal to or greater than "5" (step S4012: NO), it is determined whether the value of the index value counter 74a is equal to or less than "8" (step S4015). As already explained with reference to Figures 63(a) and 63(b), in the non-internal role lottery table TB1 and the internal role lottery table TB2, the index value IV = 6, 8 is set to either the black bell winning data (specifically, the third black bell winning data or the fourth black bell winning data) that can be used to achieve a win by setting the first stop to the center reel 32M. If a positive determination is made in step S4015, i.e., if the index value IV of "6" or "8" is won in the role lottery process (Figure 62) and the third black bell winning or the fourth black bell winning is achieved, it is determined whether the black center achievement flag 74l in the main RAM 74 is set to "1" (step S4016). If the black center achievement flag 74l is not set to "1" (step S4016: NO), the black center achievement flag 74l is set to "1" (step S4017). This allows the main MPU 72 to recognize that the fifth mission has been achieved.

If the value of the index value counter 74a in the main RAM 74 is equal to or greater than 9 (step S4015: NO), the system determines whether the value of the index value counter 74a is equal to or less than 12 (step S4018). As already explained with reference to Figures 63(a) and 63(b), in the non-internal role lottery table TB1 and the internal role lottery table TB2, the index values IV = 10 and 12 are set to either the fifth black bell winning data or the sixth black bell winning data, which can result in a win when the first stop is the right reel 32R. If a positive determination is made in step S4018, i.e., if the index value IV of 10 or 12 is won in the role lottery process (Figure 62) and the fifth black bell winning or sixth black bell winning is achieved, the system determines whether the black right achievement flag 74m in the main RAM 74 is set to 1 (step S4020). If the black right achievement flag 74m is not set to "1" (step S4020: NO), the black right achievement flag 74m is set to "1" (step S4021). This allows the main MPU 72 to recognize that the sixth mission has been achieved.

If step S4005, step S4008, step S4011, step S4014, step S4017, or step S4020 has been performed, an achievement command is sent to the production-side MPU 92 (step S4021). The achievement command is sent so that the production-side MPU 92 can grasp the mission that has been completed. The achievement command contains information that identifies the type of mission that has been completed (specifically, numerical information between "1" and "6"). When the production-side MPU 92 receives an achievement command, it identifies the mission that has been completed and causes the upper lamp 61, speaker 62, and image display device 63 to execute an effect corresponding to the completion of the mission.

Then, the post-achievement bonus process is executed (step S4021). The post-achievement bonus process is executed when a win occurs with index value IV = 1 to 12, resulting in one of the first to sixth red bell wins and one of the first to sixth black bell wins, and one of the achievement flags is set to "1".

If a positive judgment is made in step S4004, a positive judgment is made in step S4007, a negative judgment is made in step S4009, a positive judgment is made in step S4010, a positive judgment is made in step S4013, a positive judgment is made in step S4016, a negative judgment is made in step S4018, or a positive judgment is made in step S4019, the achievement response process (Figure 79) is terminated. As a result, if the process of setting achievement flags 74h to 74m to "1" is not performed, the processes of steps S4021 and S4022 can be prevented from being performed.

As already explained with reference to Figures 63(a), 63(b) and 64, in the non-internal utility lottery table TB1 and the internal utility lottery table TB2, any of the index values IV of "1" to "12" is set to any one of the first to sixth red bell winning data and the first to sixth black bell winning data, any one of the first to third supplementary winning data, and any one of the fourth to seventh supplementary winning data. As already explained with reference to Figure 60, the number of game media awarded when the first, third, and fifth red bell wins are achieved is set to "11", the number of game media awarded when the second, fourth, and sixth red bell wins are achieved is set to "13", the number of game media awarded when the first, third, and fifth black bell wins are achieved is set to "10", the number of game media awarded when the second, fourth, and sixth black bell wins are achieved is set to "12", and the number of game media awarded when the first to seventh supplementary wins are achieved is set to "1". For this reason, in step S4001 of the achievement response processing (FIG. 79), a process is executed to determine whether the value of the payout counter in the main RAM 74 is equal to or greater than "2." Based on a positive determination in this process, the main MPU 72 can determine in a single determination process that any of the minor winning combinations has been achieved, that the value of the index value counter 74a is equal to or greater than "1," that any of the first through sixth red bell winning combinations and/or the first through sixth black bell winning combinations may have occurred, and that none of the first through seventh supplemental winning combinations have occurred. This simplifies the processing configuration of the achievement response processing (FIG. 79) compared to a configuration that requires multiple determination processes to determine these things.

63(a), 63(b), and 64, in the non-internal utility lottery table TB1 and the internal utility lottery table TB2, any of the first through sixth red bell winning data is set for odd-numbered index values IV = 1, 3, 5, 7, 9, and 11 in the numerical range of index value IV = 1 to 12, and any of the first through sixth black bell winning data is set for even-numbered index values IV = 2, 4, 6, 8, 10, and 12 in the numerical range of index value IV = 1 to 12. Therefore, in step S4002 of the achievement response process (FIG. 79), a process is executed to determine whether the value of the index value counter 74a is odd, and if a positive determination is made, the process can proceed to the process corresponding to the red bell winning (steps S4003 to S4011), or if a negative determination is made, the process can proceed to the process corresponding to the black bell winning (steps S4012 to S4020). This simplifies the processing configuration of the achievement response processing (Figure 79) compared to a configuration that requires multiple determination processes to determine whether to proceed to processing corresponding to a red bell win and whether to proceed to processing corresponding to a black bell win.

Of the numerical information "0" through "20" that can be set in the index value counter 74a, the index values IV = 1, 3, 5, 7, 9, and 11 that are the subject of processing corresponding to a Red Bell win include index values IV that are not consecutive with any of the other index values IV that are the subject of that processing. In contrast, in step S4002, a process is performed to determine whether the value of the index value counter 74a is odd, and if a positive determination is made, the process proceeds to the Red Bell win processing (steps S4003 through S4011). This reduces the number of determination processes required to identify whether any of the index values IV that are the subject of processing corresponding to a Red Bell win are set in the index value counter 74a, compared to a configuration in which a determination process is performed to determine whether each of the index values IV = 1, 3, 5, 7, 9, and 11 that are the subject of processing corresponding to a Red Bell win is set in the index value counter 74a.

Of the numerical information "0" through "20" that can be set in the index value counter 74a, the index values IV = 2, 4, 6, 8, 10, and 12 that are the subject of processing corresponding to a black bell win include index values IV that are not consecutive with any of the other index values IV that are the subject of that processing. In contrast, in step S4002, a process is performed to determine whether the value of the index value counter 74a is odd, and if a negative determination is made, the process proceeds to the processing corresponding to a black bell win (steps S4012 through S4020). This reduces the number of determination processes required to identify whether any of the index values IV that are the subject of processing corresponding to a black bell win are set in the index value counter 74a, compared to a configuration in which a determination process is performed to determine whether each of the index values IV = 2, 4, 6, 8, 10, and 12 that are the subject of processing corresponding to a black bell win is set in the index value counter 74a.

As already explained with reference to Figures 63(a), 63(b), and 64, in the non-internal utility lottery table TB1 and the internal utility lottery table TB2, the numerical range of index value IV = 1 to 4 is set to one of the first red bell winning data, first black bell winning data, second red bell winning data, and second black bell winning data, which can be used to achieve a win by making the first stop on the left reel 32L. Therefore, the master MPU 72 can proceed to processing for setting the red left achievement flag 74h or the black left achievement flag 74k based on the value of the index value counter 74a being within the numerical range of "1" to "4." Furthermore, the numerical range of index value IV = 5 to 8 is set to one of the third red bell winning data, third black bell winning data, fourth red bell winning data, and fourth black bell winning data, which can be used to achieve a win by making the first stop on the center reel 32M. Therefore, the main MPU 72 can proceed to processing for setting the red center achievement flag 74i or processing for setting the black center achievement flag 74l based on the value of the index value counter 74a being within the numerical range of "5" to "8." Furthermore, the numerical range of index value IV = 9 to 12 is set with any of the fifth red bell winning data, fifth black bell winning data, sixth red bell winning data, and sixth black bell winning data, which can result in a win when the first stop is the right reel 32R. Therefore, the main MPU 72 can proceed to processing for setting the red right achievement flag 74j or processing for setting the black right achievement flag 74m based on the value of the index value counter 74a being within the numerical range of "9" to "12."

When the value of the index value counter 74a is identified as an odd number greater than or equal to "1," the main MPU 72 executes a process to determine whether the value of the index value counter 74a is less than or equal to "4," and if a positive determination is made, can proceed to a process to set the red-left achievement flag 74h. This simplifies the processing configuration of the achievement response process (Figure 79) compared to a configuration that includes a process to determine whether the value of the index value counter 74a is "1" and a process to determine whether the value of the index value counter 74a is "3," and proceeds to a process to set the red-left achievement flag 74h based on a positive determination made in either of these determination processes.

When the value of the index value counter 74a is identified as an odd number greater than or equal to "5," the main MPU 72 executes a process to determine whether the value of the index value counter 74a is less than or equal to "8," and if a positive determination is made, can proceed to a process to set the red-medium achievement flag 74i. This simplifies the processing configuration of the achievement response process (Figure 79) compared to a configuration that includes a process to determine whether the value of the index value counter 74a is "5" and a process to determine whether the value of the index value counter 74a is "7," and proceeds to a process to set the red-medium achievement flag 74i based on a positive determination made in either of these determination processes.

When the value of the index value counter 74a is identified as an odd number greater than or equal to "9," the main MPU 72 executes a process to determine whether the value of the index value counter 74a is less than or equal to "12," and if a positive determination is made, can proceed to a process to set the red-right achievement flag 74j. This simplifies the processing configuration of the achievement response process (Figure 79) compared to a configuration that includes a process to determine whether the value of the index value counter 74a is "9" and a process to determine whether the value of the index value counter 74a is "11," and proceeds to a process to set the red-right achievement flag 74j based on a positive determination made in either of these determination processes.

When the value of the index value counter 74a is identified as an even number greater than or equal to "1," the main MPU 72 executes a process to determine whether the value of the index value counter 74a is less than or equal to "4," and if a positive determination is made, can proceed to a process to set the black left achievement flag 74k. This simplifies the processing configuration of the achievement response process (Figure 79) compared to a configuration that includes a process to determine whether the value of the index value counter 74a is "2" and a process to determine whether the value of the index value counter 74a is "4," and proceeds to a process to set the black left achievement flag 74k based on a positive determination made in either of these determination processes.

When the value of the index value counter 74a is identified as an even number greater than or equal to "5," the main MPU 72 executes a process to determine whether the value of the index value counter 74a is less than or equal to "8," and if a positive determination is made, can proceed to a process to set the black center achievement flag 74l. This simplifies the processing configuration of the achievement response process (Figure 79) compared to a configuration that includes a process to determine whether the value of the index value counter 74a is "6" and a process to determine whether the value of the index value counter 74a is "8," and proceeds to a process to set the black center achievement flag 74l based on a positive determination made in either of these determination processes.

When the value of the index value counter 74a is identified as an even number greater than or equal to "9," the main MPU 72 executes a process to determine whether the value of the index value counter 74a is less than or equal to "12," and if a positive determination is made, the main MPU 72 can proceed to a process to set the black-right achievement flag 74m. This simplifies the processing configuration of the achievement response process (Figure 79) compared to a configuration that includes a process to determine whether the value of the index value counter 74a is "10" and a process to determine whether the value of the index value counter 74a is "12," and proceeds to a process to set the black-right achievement flag 74m based on a positive determination made in either of these determination processes. Furthermore, by simplifying the processing configuration of the achievement response process (Figure 79), the data capacity of the main ROM 73 required to store the program corresponding to the achievement response process can be reduced.

Next, the post-achievement add-on process executed by the main MPU 72 will be explained with reference to the flowchart in Figure 80. As already explained, the post-achievement add-on process is executed in step S4022 of the achievement response process (Figure 79). The post-achievement add-on process is executed when the value of the index value counter 74a in the main RAM 74 is between "1" and "12" and when one of the first to sixth red bell wins and one of the first to sixth black bell wins has been achieved in the current game.

In the post-achievement top-up process, if all of the achievement flags 74h to 74m in the main RAM 74 are set to "1" (step S4101: YES), the process determines whether the value of the index value counter 74a in the main RAM 74 is odd by determining whether the value of the 0th bit of the index value counter 74a is "1" (step S4102). As already explained, by determining whether the value of the index value counter 74a is odd by determining whether the value of the 0th bit of the index value counter 74a is "1," the number of processes required to determine whether the value of the index value counter 74a is odd can be reduced compared to a configuration in which the remainder is calculated when the numerical information set in the index value counter 74a is divided by "2" and the remainder is determined to be "1."

As already explained, any of the first to sixth red bell winning data is set to the odd index value IV in the numerical range of "1" to "12." If a positive determination is made in step S4102, "40," which is the number of awards corresponding to the red bell winning, is added to the AT continuation counter 74d in the main RAM 74 (step S4103). This increases the remaining number of awards of gaming media in the AT state ST14 by "40."

As already explained, any of the first to sixth black bell winning data is set to the even index value IV in the numerical range of "1" to "12." If a negative determination is made in step S4102, "30," which is the number of awards corresponding to the black bell winning, is added to the AT continuation counter 74d in the main RAM 74 (step S4104). This increases the remaining number of awards of gaming media in the AT state ST14 by "30."

In this way, if any red bell win is achieved and all of the first through sixth missions are completed, the remaining number of game media awarded in AT state ST14 is increased by 40, and if any black bell win is achieved and all of the first through sixth missions are completed, the remaining number of game media awarded in AT state ST14 is increased by 30. By configuring the number of game media awarded to be increased depending on the type of mission completed last out of missions 1 through 6, it is possible to draw attention to the type of mission completed last, thereby increasing the enjoyment of the game.

As already explained, red bell winning data is set for odd index values IV in the numerical range of "1" to "12," and black bell winning data is set for even index values IV. Therefore, by determining whether the value of the index value counter 74a is odd, it is possible to determine whether the currently established winning is a red bell winning, out of the red bell winning and black bell winning. This simplifies the processing configuration for determining whether the currently established winning is a red bell winning.

If step S4103 or step S4104 is performed, a post-achievement add-on command is sent to the presentation side MPU 92 (step S4105). The post-achievement add-on command is set with numerical information corresponding to the remaining number of gaming media awarded in AT state ST14, which was added to the AT continuation counter 74d in step S4103 or step S4104. Based on the received post-achievement add-on command, the presentation side MPU 92 can determine that all missions have been achieved and the remaining number of gaming media awarded in AT state ST14 has increased, as well as the amount of this increase. When the presentation side MPU 92 receives a post-achievement add-on command, it causes the upper lamp 61, speaker 62, and image display device 63 to execute a presentation indicating that the remaining number of gaming media awarded in AT state ST14 has increased and the amount of this increase, and also causes a display corresponding to the end of the add-on challenge presentation to be executed on the image display device 63 after the presentation ends.

Then, the additional challenge flag in the main RAM 74 is cleared to "0" (step S4106). This allows the main MPU 72 to understand that all missions have been completed and the additional challenge presentation has ended.

As described above, among the numerical information "0" to "20" that can be set in the index value counter 74a, the index values IV = 1, 3, 5, 7, 9, and 11 that are the subject of the process corresponding to the Red Bell winning (step S4103) include index values IV that are not consecutive with any of the other index values IV that are the subject of that process. In contrast, in step S4102, a process is performed to determine whether the value of the index value counter 74a is odd, and if a positive determination is made, the process proceeds to the process corresponding to the Red Bell winning (step S4103). This reduces the number of determination processes required to identify that any of the index values IV that are the subject of the process corresponding to the Red Bell winning are set in the index value counter 74a, compared to a configuration in which a determination process is performed to determine whether each of the index values IV = 1, 3, 5, 7, 9, and 11 that are the subject of the process corresponding to the Red Bell winning is set in the index value counter 74a.

Of the numerical information "0" through "20" that can be set in the index value counter 74a, the index values IV = 2, 4, 6, 8, 10, and 12 that are the subject of the process corresponding to the black bell win (step S4104) include index values IV that are not consecutive with any of the other index values IV that are the subject of that process. In contrast, in step S4102, a process is performed to determine whether the value of the index value counter 74a is odd, and if a negative determination is made, the process proceeds to the process corresponding to the black bell win (step S4104). This reduces the number of determination processes required to identify whether any of the index values IV that are the subject of the process corresponding to the black bell win are set in the index value counter 74a, compared to a configuration in which a determination process is performed to determine whether each of the index values IV = 2, 4, 6, 8, 10, and 12 that are the subject of the process corresponding to the black bell win is set in the index value counter 74a.

Next, the processing for the additional challenge presentation executed by the presentation-side MPU 92 will be described with reference to the flowchart shown in Figure 81. The processing for the additional challenge presentation is repeatedly executed by the presentation-side MPU 92 at relatively short intervals (for example, every 4 milliseconds).

When an additional challenge start command is received from the main MPU 72 (step S4201: YES), the additional challenge performance start process is executed (step S4202). In the additional challenge performance start process, the additional challenge performance table is read from the performance side ROM 93 to the performance side RAM 94. The performance execution control is performed in accordance with the additional challenge performance table, and the additional challenge performance is started on the upper lamp 61, speaker 62, and image display device 63. As already explained with reference to Figure 73 (a), when the additional challenge performance is started, a text image G62 saying "Complete all missions" and the first to sixth achievement status display areas G63 to G68 are displayed on the image display device 63. The first achievement status display area G63 then displays the text "Left Red," the second achievement status display area G64 displays the text "Middle Red," the third achievement status display area G65 displays the text "Right Red," the fourth achievement status display area G66 displays the text "Left Black," the fifth achievement status display area G67 displays the text "Middle Black," and the sixth achievement status display area G68 displays the text "Right Black." The display of these text images G62 and achievement status display areas G63-G68 continues until the AT state ST14 ends.

When an achievement command is received from the main MPU 72 (step S4203: YES), the achievement effect start process is executed (step S4204). In the achievement effect start process, the type of mission that has been achieved is identified from the information contained in the received achievement command, and the achievement effect table corresponding to the identified mission is read from the effect ROM 93 to the effect RAM 94. The execution of the effect is controlled in accordance with the achievement effect table, and light emission control is performed so that the upper lamp 61 emits light in a manner that indicates that the mission has been achieved, and sound output control is performed so that a sound indicating that the mission has been achieved is output from the speaker 62. Furthermore, on the image display device 63, the text displayed in the achievement status display areas G63-G68 corresponding to the currently achieved mission is changed to "Achieved." This allows the player to know which missions have already been achieved and which missions have not yet been achieved.

When a post-achievement bonus command is received from the master MPU 72 (step S4205: YES), the start process for the post-achievement bonus effect is executed (step S4206). In the start process for the post-achievement bonus effect, the number of bonus points to be added in the current post-achievement bonus effect is determined from the information contained in the received post-achievement bonus command, and the post-achievement bonus effect table corresponding to the determined number of bonus points is read from the performance-side ROM 93 to the performance-side RAM 94. By controlling the execution of the effect according to the post-achievement bonus effect table, the upper lamp 61 produces a light-emitting effect corresponding to the completion of all of the first through sixth missions, the speaker 62 produces a sound output effect corresponding to the completion of all of the first through sixth missions, and the image display device 63 produces a display effect corresponding to the completion of all of the first through sixth missions. As previously explained, if the currently completed mission was one of the first through third missions, the image display device 63 displays a text image G69 stating "Finally achieve red and complete" and a text image G71 corresponding to the number of bonus points. Furthermore, if the currently completed mission is any of the fourth through sixth missions, the image display device 63 will display a text image saying "Complete by achieving black last" and a text image corresponding to the number of awarded game media. This allows the player to understand that the remaining number of awarded game media in the AT state ST14 has increased by completing all of the first through sixth missions.

If a bonus start command or internal state start command is received from the main MPU 72 (step S4207: YES), processing to stop the additional challenge effect is executed (step S4208). In the processing to stop the additional challenge effect, the upper lamp 61, speaker 62, and image display device 63 are set to a state in which the additional challenge effect is not being executed.

If an additional challenge resume command is received from the main MPU 72 (step S4209: YES), the additional challenge presentation resumes (step S4210). In the additional challenge presentation resume process, the additional challenge presentation is resumed on the upper lamp 61, speaker 62, and image display device 63 from the state where it was stopped in the additional challenge presentation stop process (step S4208).

If an additional challenge end command is received from the main MPU 72 (step S4211: YES), the additional challenge effect end process is executed (step S4212). In the additional challenge effect end process, the additional challenge effect being executed on the upper lamp 61, speaker 62, and image display device 63 is ended.

The present embodiment described above provides the following excellent effects:

The index value IV that wins in the role lottery process (Figure 62) from among multiple index values IV (specifically, "1" to "20") is set in the index value counter 74a. This makes it possible to identify the index value IV that wins in the role lottery process (Figure 62) based on the numerical information set in the index value counter 74a.

In the stop operation notification control process (FIG. 74), a process (step S3516) corresponding to the red bell winning data corresponding to the set index value IV is executed based on whether the numerical information set in the index value counter 74a is one of the odd index values IV = 1, 3, 5, 7, 9, or 11. Therefore, compared to a configuration in which a determination process is executed to determine whether the index value IV for each of the odd index values IV = 1, 3, 5, 7, 9, or 11 is set in the index value counter 74a, and a process corresponding to the red bell winning data corresponding to the set index value IV is executed based on a positive determination in one of these determination processes, the number of determination processes required to identify a win for one of the odd index values IV = 1, 3, 5, 7, 9, or 11 can be reduced. This simplifies the process configuration for executing the corresponding process (step S3516) based on a win for one of the index values IV for which the red bell winning data is set, and reduces the data volume required to store the program corresponding to that process.

In the achievement response processing (Figure 79) and the post-achievement additional processing (Figure 80), processing corresponding to the establishment of a red bell win (steps S4003 to S4011 and step S4103) is executed based on whether the numerical information set in the index value counter 74a is one of odd index values IV = 1, 3, 5, 7, 9, or 11. Therefore, compared to a configuration in which a determination process is executed to determine whether the index value IV for each odd index value IV = 1, 3, 5, 7, 9, or 11 is set in the index value counter 74a, and processing corresponding to the establishment of a red bell win is executed based on a positive determination in one of these determination processes, the number of determination processes required to identify the establishment of a red bell win can be reduced. This simplifies the processing configuration for executing the corresponding processing (steps S4003 to S4011 and step S4103) based on the establishment of a red bell win, and reduces the data volume required to store the program corresponding to the processing.

In the achievement response processing (FIG. 79) and the post-achievement additional processing (FIG. 80), processing corresponding to the establishment of a black bell win (steps S4012 to S4020 and step S4104) is executed based on whether the numerical information set in the index value counter 74a is one of the even index values IV = 2, 4, 6, 8, 10, or 12. Therefore, compared to a configuration in which a determination process is executed to determine whether the index value IV for each of the even index values IV = 2, 4, 6, 8, 10, or 12 is set in the index value counter 74a, and processing corresponding to the establishment of a black bell win is executed based on a positive determination in one of these determination processes, the number of determination processes required to identify the establishment of a black bell win can be reduced. This simplifies the processing configuration for executing the corresponding processing (steps S4012 to S4020 and step S4104) based on the establishment of a black bell win, and reduces the data volume required to store the program corresponding to that processing.

In the stop operation notification control process (FIG. 74), a process (step S3516) is executed corresponding to the fact that the red bell winning data corresponds to the index value IV = 1, 3, 5, 7, 9, or 11, for which the index value IV = 1, 3, 5, 7, 9, or 11 is set, based on the value of the 0th bit in the numerical information set in the index value counter 74a being "1." Therefore, compared to a configuration in which a determination process is executed for each of these index values IV = 1, 3, 5, 7, 9, or 11 to determine whether that index value IV is set in the index value counter 74a, and a process corresponding to the fact that the red bell winning data corresponds to the index value IV = 1, 3, 5, 7, 9, or 11 is set based on a positive determination in one of these determination processes, the number of determination processes required to identify whether the index value IV = 1, 3, 5, 7, 9, or 11 has been won can be reduced. This simplifies the process configuration for executing the corresponding process (step S3516) based on the fact that the red bell winning data has been set to one of the index values IV, and reduces the data volume required to store the program corresponding to that process.

In the achievement response processing (Figure 79) and the post-achievement additional processing (Figure 80), processing corresponding to the establishment of a red bell win (steps S4003 to S4011 and step S4103) is executed based on the value of the 0th bit in the numerical information set in the index value counter 74a being "1." Therefore, compared to a configuration in which a determination process is executed to determine whether the index value IV for each of index values IV = 1, 3, 5, 7, 9, or 11 is set in the index value counter 74a, and processing corresponding to the establishment of a red bell win is executed based on a positive determination in any of these determination processes, the number of determination processes required to identify the establishment of a red bell win can be reduced. This simplifies the processing configuration for executing the corresponding processing (steps S4003 to S4011 and step S4103) based on the establishment of a red bell win, and reduces the data volume required to store the program corresponding to that processing.

In the achievement response processing (Figure 79) and the post-achievement additional processing (Figure 80), processing corresponding to the establishment of a black bell win (steps S4012 to S4020 and step S4104) is executed based on the value of the 0th bit in the numerical information set in the index value counter 74a being "0." Therefore, compared to a configuration in which a determination process is executed to determine whether the index value IV for each of index values IV = 2, 4, 6, 8, 10, or 12 is set in the index value counter 74a, and processing corresponding to the establishment of a black bell win is executed based on a positive determination in any of these determination processes, the number of determination processes required to identify the establishment of a black bell win can be reduced. This simplifies the processing configuration for executing the corresponding processing (steps S4012 to S4020 and step S4104) based on the establishment of a black bell win, and reduces the data volume required to store the program corresponding to that processing.

The main RAM 74 is provided with an index value counter 74a, to which an index value IV is set between "1" and "20," including values between "1" and "4." The main MPU 72 executes a determination process (step S4002) to determine whether the numerical information stored in the index value counter 74a is an odd number, and if a positive determination is made in this determination process, executes processing corresponding to the Red Bell prize (steps S4003 to S4011). Of the numerical information set in the index value counter 74a, the number of numerical information targeted for processing corresponding to the Red Bell prize is two or more (specifically, six: "1," "3," "5," "7," "9," and "11"). Therefore, compared to a configuration that executes a determination process to determine whether each piece of numerical information targeted for processing corresponding to the Red Bell prize is stored in the index value counter 74a, the processing configuration for executing processing corresponding to the Red Bell prize can be simplified. This allows for a reduction in the data size of the program corresponding to this processing.

The main MPU 72 executes a determination process to determine whether the numerical information stored in the index value counter 74a is an odd number, and if a negative determination is made in this determination process, executes the process corresponding to the Black Bell win (the processes in steps S4012 to S4020). Of the numerical information set in the index value counter 74a, the number of numerical information that is the target of the process corresponding to the Black Bell win is two or more (specifically, six: "2," "4," "6," "8," "10," and "12"). Therefore, compared to a configuration that executes a determination process to determine whether each piece of numerical information that is the target of the process corresponding to the Black Bell win is stored in the index value counter 74a, the processing configuration for executing the process corresponding to the Black Bell win can be simplified. This allows for a reduction in the data size of the program corresponding to this process.

When the value of the index value counter 74a is an odd number greater than or equal to "1," the main MPU 72 executes a determination process (step S4003) to determine whether the value of the index value counter 74a is less than or equal to "4." If a positive determination is made in this determination process, the main MPU 72 executes processes (steps S4004 to S4005) corresponding to the red bell prize, which can be achieved by causing the first stop to land on the left reel 32L. Of the numbers included in the range of "1" to "4," the number of numbers that are subject to the process corresponding to the red bell prize, which can be achieved by causing the first stop to land on the left reel 32L, is two or more (specifically, two: "1" and "3"). Therefore, compared to a configuration that executes a determination process to determine whether each of the target values for processing corresponding to a red bell win, which can be achieved by causing the left reel 32L to land first, is stored in the index value counter 74a, the processing configuration for executing the process corresponding to a red bell win, which can be achieved by causing the left reel 32L to land first, can be simplified. Furthermore, the numerical range of "1" to "4" is a numerical range that includes three or more consecutive numerical values. Therefore, by executing a determination process to determine whether the value of the index value counter 74a is "4" or less when the value of the index value counter 74a is "1" or greater, the processing configuration for determining whether the value of the index value counter 74a is within the numerical range of "1" to "4" can be simplified. This allows for a reduction in the data size of the program corresponding to this processing.

When the value of the index value counter 74a is an even number greater than or equal to "1," the main MPU 72 executes a determination process (step S4012) to determine whether the value of the index value counter 74a is less than or equal to "4." If a positive determination is made in the determination process, the main MPU 72 executes processes (steps S4012 to S4014) corresponding to the black bell prize, which can be achieved by causing the first reel to stop on the left reel 32L. Of the numbers included in the range of "1" to "4," the number of numbers that are subject to the process corresponding to the black bell prize, which can be achieved by causing the first reel to stop on the left reel 32L, is two or more (specifically, two: "2" and "4"). Therefore, compared to a configuration that executes a determination process to determine whether each of the target values for processing corresponding to a black bell win, which can be achieved by having the left reel 32L land first, is stored in the index value counter 74a, it is possible to simplify the processing configuration for executing the process corresponding to a black bell win, which can be achieved by having the left reel 32L land first. This allows for a reduction in the data size of the program corresponding to this processing.

When the value of the index value counter 74a is an odd number greater than or equal to 5, the main MPU 72 executes a determination process (step S4006) to determine whether the value of the index value counter 74a is less than or equal to 8, and if a positive determination is made in the determination process, executes processes (steps S4007 to S4008) corresponding to the red bell prize, which can be achieved by causing the first stop to land on the center reel 32M. Of the numbers in the range of 5 to 8, the number of numbers that are the target of the process corresponding to the red bell prize, which can be achieved by causing the first stop to land on the center reel 32M, is two or more (specifically, two: 5 and 7). Therefore, compared to a configuration that executes a determination process to determine whether each of the target values for processing corresponding to a red bell win, which can be achieved by causing the first reel to stop on the center reel 32M, is stored in the index value counter 74a, the processing configuration for executing the processing corresponding to a red bell win, which can be achieved by causing the first reel to stop on the center reel 32M, can be simplified. Furthermore, the numerical range of "5" to "8" is a numerical range that includes three or more consecutive numerical values. Therefore, by executing a determination process to determine whether the value of the index value counter 74a is "8" or less when the value of the index value counter 74a is "5" or greater, the processing configuration for determining whether the value of the index value counter 74a is within the numerical range of "5" to "8" can be simplified. This allows for a reduction in the data size of the program corresponding to this processing.

When the value of the index value counter 74a is an even number greater than or equal to 5, the main MPU 72 executes a determination process (step S4015) to determine whether the value of the index value counter 74a is less than or equal to 8, and if a positive determination is made in the determination process, executes processes (steps S4016 to S4017) corresponding to the black bell prize, which can be achieved by causing the first reel to stop on the center reel 32M. Of the numbers included in the range of 5 to 8, the number of numbers that are subject to the process corresponding to the black bell prize, which can be achieved by causing the first reel to stop on the center reel 32M, is two or more (specifically, two: 6 and 8). Therefore, compared to a configuration that executes a determination process to determine whether each of the target values for processing corresponding to a black bell win, which can be achieved by having the first reel stop land on the center reel 32M, is stored in the index value counter 74a, it is possible to simplify the processing configuration for executing the process corresponding to a black bell win, which can be achieved by having the first reel stop land on the center reel 32M. This allows for a reduction in the data size of the program corresponding to this processing.

When the value of the index value counter 74a is equal to or greater than "1," the main MPU 72 executes the process of setting the red-left achievement flag 74h to "1" and the processes of steps S4006 to S4011 as processes corresponding to the combination of the results of the process of determining whether the value of the index value counter 74a is an odd number and the results of the process of determining whether the value of the index value counter 74a is equal to or less than "4." This simplifies the processing configuration for executing these processes.

When the value of the index value counter 74a is equal to or greater than "1," the main MPU 72 executes processing to set the black left achievement flag 74k to "1" and steps S4015 to S4020 as processing corresponding to the combination of the results of the determination processing to determine whether the value of the index value counter 74a is odd and the results of the determination processing to determine whether the value of the index value counter 74a is equal to or less than "4." This simplifies the processing configuration for executing these processes.

In the role selection process (Figure 62), the role selection tables TB1 and TB2 are used to execute the role selection determination process (step S2806), and in the bonus internal state ST12, the internal role selection table TB2 is used to execute the role selection determination process. This prevents the processing configuration of the role selection process (Figure 62) from becoming too complicated, while allowing the role selection process (Figure 62) to be executed with content appropriate to the game status. By setting multiple index values IV, including index value IV=14 and index value IV=15, when the role selection process (Figure 62) is executed in the bonus internal state ST12, it is possible to generate a situation in which index value IV=14 is the target of judgment, and also to generate a situation in which index value IV=15 is the target of judgment. In the internal role lottery table TB2, the point value PV set corresponding to index value IV=14 is numerical information (specifically, "850") that can result in a win in the role win/loss determination process, and the point value PV set corresponding to index value IV=15 is numerical information (specifically, "0") that will not result in a win in the role win/loss determination process. Therefore, when the role lottery process (FIG. 62) is executed in the bonus internal state ST12, a configuration can be created in which a win can occur in situations where index value IV=14 is the target of determination, and a configuration can be created in which a win will not occur in situations where index value IV=15 is the target of determination.

When the role lottery process (Figure 62) is executed in the bonus internal state ST12, in a configuration in which a win does not occur when index value IV = 15 is the target of judgment, the index value IV = 15 is set in the internal role lottery table TB2 used when the role lottery process (Figure 62) is executed in the bonus internal state ST12. This prevents fluctuations in the number of index values IV that are subject to judgment before index value IV = 14 becomes the target of judgment in the role lottery process (Figure 62), and the number of index values IV that are subject to judgment before index value IV = 15 becomes the target of judgment, depending on the game state in which the role lottery process (Figure 62) is executed. This makes it possible to ensure that win/loss judgments are made appropriately.

In the non-internal role lottery table TB1, of the index values IV = 14 and 15 for which cherry winning data is set, BB winning data is set only for index value IV = 15. As a result, in the role lottery process (Figure 62) executed in the non-bonus internal state, if a win occurs at the index value IV for which cherry winning data is set, BB winning data is set in the main RAM 74 and the bonus internal state ST12 is entered. Furthermore, in the bonus internal state ST12 where BB winning data has already been set in the main RAM 74, it is possible to prevent duplicate BB winning data from being set in the main RAM 74.

In the bonus internal state ST12, the lottery process for the role (Figure 62) is executed by referencing the internal role lottery table TB2. In the internal role lottery table TB2, the only index values IV for which cherry winning data is set are "14" and "15." When the lottery process for the role is executed by referencing the internal role lottery table TB2, a win will not occur at index value IV = 15, but a win may occur at index value IV = 14. Based on the fact that "14" is set in the index value counter 74a, the main MPU 72 executes processing corresponding to a win at the index value IV for which cherry winning data is set in the bonus internal state ST12. As a result, the index value IV for which cherry win data is set is common between the non-bonus internal state and the bonus internal state ST12, and in addition to the process for determining whether the index value IV for which cherry win data is set has been won, a process for determining whether the index value IV has been won in the bonus internal state ST12 is executed. Compared to this configuration, the processing configuration for executing the process corresponding to winning the index value IV for which cherry win data is set in the bonus internal state ST12 can be simplified. This makes it possible to reduce the data size of the program corresponding to this processing.

In the non-bonus internal state, the role lottery process (Figure 62) is executed by referencing the non-internal role lottery table TB1. In the non-internal role lottery table TB1, the only index values IV for which cherry winning data is set are "14" and "15." When the role lottery process is executed by referencing the non-internal role lottery table TB1, a win will not occur with index value IV = 14, but a win may occur with index value IV = 15. Based on the fact that the index value counter 74a is set to "15," the main MPU 72 executes processing corresponding to the occurrence of a win in the non-bonus internal state with an index value IV for which any cherry winning data is set. As a result, the index value IV for which cherry win data is set is common between the non-bonus internal state and the bonus internal state ST12, and in addition to the process for determining whether the index value IV for which cherry win data is set has been won, a process for determining whether the index value IV has been won in the non-bonus internal state is executed. This simplifies the processing configuration for executing the process corresponding to winning the index value IV for which cherry win data is set in the non-bonus internal state, compared to a configuration that executes a process for determining whether the index value IV has been won in the non-bonus internal state. This makes it possible to reduce the data size of the program corresponding to this processing.

Sixth Embodiment
In this embodiment, the content of the additional challenge effect is different from that of the fifth embodiment. Below, the configuration that differs from the fifth embodiment will be explained. Note that the explanation of the same configuration as the fifth embodiment will basically be omitted.

Figure 82 shows the arrangement of symbols on the left reel 32L, center reel 32M, and right reel 32R in this embodiment. In this embodiment, in addition to the seven types of symbols in the fifth embodiment, a "Blue BAR" symbol is also present. Specifically, as shown in Figure 82, there are eight types of symbols: a "Cherry" symbol (e.g., the 20th symbol on the left reel 32L), a "Bell" symbol (e.g., the 19th symbol on the left reel 32L), a "Blue BAR" symbol (e.g., the 18th symbol on the left reel 32L), a "Replay" symbol (e.g., the 17th symbol on the left reel 32L), a "Watermelon" symbol (e.g., the 16th symbol on the left reel 32L), a "Black BAR" symbol (e.g., the 14th symbol on the left reel 32L), a "White 7" symbol (e.g., the 9th symbol on the left reel 32L), and a "Red 7" symbol (e.g., the 6th symbol on the left reel 32L). The number and arrangement order of the various symbols differ on each of the reels 32L, 32M, and 32R.

Below, we will explain the relationship between winning symbol combinations and the benefits that will be awarded if a prize is won, with reference to Figure 83. Figure 83 is an explanatory diagram that explains the relationship between winning symbol combinations and the benefits that will be awarded if a prize is won.

Similar to the fifth embodiment, the minor prizes that result in the award of gaming media include the 1st to 7th supplementary prizes, the 1st to 6th red bell prizes, the regular bell prize, the cherry prize, and the watermelon prize. Also, instead of the 1st to 6th black bell prizes in the fifth embodiment, the 1st to 3rd black bell prizes and the 1st to 3rd blue bell prizes are available.

The symbols on the left reel 32L, center reel 32M, and right reel 32R that must stop on the main line ML to achieve each of the first to third supplementary wins, the first to sixth red bell wins, the regular bell win, the cherry win, and the watermelon win are as already explained in the fifth embodiment above. Furthermore, the number of gaming media that will be awarded when these small wins are achieved is as already explained in the fifth embodiment above.

If the stopped symbol on the left reel 32L on the main line ML is either a "red 7", "black BAR" or "blue BAR", the stopped symbol on the middle reel 32M is a "bell", and the stopped symbol on the right reel 32R is either a "red 7", "black BAR" or "blue BAR", a fourth supplementary win will be awarded. If the stopped symbol on the left reel 32L on the main line ML is either a "red 7", "black BAR" or "blue BAR", the stopped symbol on the middle reel 32M is either a "red 7", "black BAR" or "blue BAR", and the stopped symbol on the right reel 32R is a "replay", a fifth supplementary win will be awarded. If the stopped symbol on the left reel 32L on the main line ML is a "bell" symbol, the stopped symbol on the center reel 32M is either a "red 7" symbol, a "black BAR" symbol, or a "blue BAR" symbol, and the stopped symbol on the right reel 32R is either a "red 7" symbol, a "black BAR" symbol, or a "blue BAR" symbol, then a sixth supplementary win is awarded. If the stopped symbol on the left reel 32L on the main line ML is either a "red 7" symbol, a "black BAR" symbol, or a "blue BAR" symbol, the stopped symbol on the center reel 32M is a "replay" symbol, and the stopped symbol on the right reel 32R is either a "red 7" symbol, a "black BAR" symbol, or a "blue BAR" symbol, then a seventh supplementary win is awarded. As with the fifth embodiment, if any of the fourth to seventh supplementary wins is awarded, the number of gaming media to be awarded is "1."

If the stopped symbol on the left reel 32L on the main line ML is a "black BAR" symbol, the stopped symbol on the middle reel 32M is a "bell" symbol, and the stopped symbol on the right reel 32R is a "bell" symbol, as in the fifth embodiment above, the first black bell win will be awarded. If the stopped symbol on the left reel 32L on the main line ML is a "blue BAR" symbol, the stopped symbol on the middle reel 32M is a "bell" symbol, and the stopped symbol on the right reel 32R is a "replay" symbol, the first blue bell win will be awarded. If the stopped symbol on the left reel 32L on the main line ML is a "bell" symbol, the stopped symbol on the middle reel 32M is a "black BAR" symbol, and the stopped symbol on the right reel 32R is a "bell" symbol, the second black bell win will be awarded. If the stopped symbol on the left reel 32L on the main line ML is a "bell" symbol, the stopped symbol on the middle reel 32M is a "blue BAR" symbol, and the stopped symbol on the right reel 32R is a "replay" symbol, a second blue bell win will be awarded. If the stopped symbol on the left reel 32L on the main line ML is a "bell" symbol, the stopped symbol on the middle reel 32M is a "bell" symbol, and the stopped symbol on the right reel 32R is a "black BAR" symbol, a third black bell win will be awarded. If the stopped symbol on the left reel 32L on the main line ML is a "bell" symbol, the stopped symbol on the middle reel 32M is a "replay" symbol, and the stopped symbol on the right reel 32R is a "blue BAR" symbol, a third blue bell win will be awarded. If you win any of the first to third black bells, the number of gaming media to be awarded will be "10", and if you win any of the first to third blue bells, the number of gaming media to be awarded will be "12".

As with the fifth embodiment, winning combinations that grant a replay bonus, allowing the player to play the next game without betting gaming media, include the normal replay winning combination, the first chance replay winning combination, and the second chance replay winning combination. The symbols on the left reel 32L, center reel 32M, and right reel 32R that must stop on the main line ML to achieve the first chance replay winning combination are as already explained in the fifth embodiment.

If the stopped symbol on the left reel 32L on the main line ML is a "replay" symbol, the stopped symbol on the middle reel 32M is a "replay" symbol, and the stopped symbol on the right reel 32R is a "replay" symbol, then the stopped symbol on the left reel 32L on the main line ML is a "red 7" symbol, a "black BAR" symbol, or a "blue BAR" symbol, the stopped symbol on the middle reel 32M is a "black BAR" symbol, a "blue BAR" symbol, or a "cherry" symbol, and the stopped symbol on the right reel 32R is a "black BAR" symbol, a "blue BAR" symbol, or a A regular replay win occurs when the stopped symbol on the left reel 32L on the main line ML is a "white 7" or "watermelon," the stopped symbol on the middle reel 32M is a "replay," and the stopped symbol on the right reel 32R is a "bell," or when the stopped symbol on the left reel 32L on the main line ML is a "white 7" or "watermelon," the stopped symbol on the middle reel 32M is a "bell," and the stopped symbol on the right reel 32R is a "replay." A second chance replay win occurs when the stopped symbol on the left reel 32L on the main line ML is a "replay," the stopped symbol on the middle reel 32M is a "replay," and the stopped symbol on the right reel 32R is a "black BAR," "blue BAR," or "watermelon."

As with the fifth embodiment, a BB win is a state transition win that only results in a transition of the game state. The symbols on the left reel 32L, center reel 32M, and right reel 32R that must stop on the main line ML to achieve a BB win are as already explained in the fifth embodiment.

Next, we will explain the lottery table in non-bonus mode, using the setting value "3" as an example.

Figure 84(a) is an explanatory diagram for explaining the non-internal role selection table TB3 selected in the role selection process (Figure 62) when the game is in a non-bonus state and a non-bonus internal state (i.e., normal gaming state ST11 or AT state ST14), and Figure 84(b) is an explanatory diagram for explaining the internal role selection table TB4 selected in the role selection process (Figure 62) when the game is in the bonus internal state ST12. Note that the following explanation will refer to the explanatory diagram in Figure 85 as appropriate.

As shown in Figures 84(a) and 84(b), index values IV are set in the non-internal utility lottery table TB3 and the internal utility lottery table TB4, similar to the non-internal utility lottery table TB1 and the internal utility lottery table TB2 already described in the fifth embodiment. Each index value IV is associated with winning data (i.e., a winning combination) and is also set with a point value PV.

Index values IV of "1" to "20" are set in the non-internal utility lottery table TB3, and index values IV of "1" to "19" are set in the internal utility lottery table TB4. Furthermore, the types of winning data set for each index value IV = 1 to 19 in the internal utility lottery table TB4 are the same as the types of winning data set for each index value IV = 1 to 19 in the non-internal utility lottery table TB3.

The index values IV = 1, 3, 5, 7, 9, 11, 13-20 in the non-internal utility lottery table TB3 are set with the same winning data and point values PV as the index values IV = 1, 3, 5, 7, 9, 11, 13-20 in the non-internal utility lottery table TB1 in the fifth embodiment. Furthermore, when a win occurs with index value IV = 1, 3, 5, 7, 9, 11, 13-20, the relationship between the stopping order of the reels 32L, 32M, and 32R, the operation timing of the stop buttons 42-44, and the actual or potential winnings is as already explained in the fifth embodiment.

The index values IV = 1, 3, 5, 7, 9, 11, 13-19 in the internal utility lottery table TB4 are set with the same winning data and point values PV as the index values IV = 1, 3, 5, 7, 9, 11, 13-19 in the internal utility lottery table TB2 in the fifth embodiment. Furthermore, when a win occurs with one of the index values IV = 1, 3, 5, 7, 9, 11, 13-19, the relationship between the stopping order of the reels 32L, 32M, and 32R, the operation timing of the stop buttons 42-44, and the actual or potential winnings is as already explained in the fifth embodiment.

In non-internal utility lottery table TB3 and internal utility lottery table TB4, index values IV = 2, 4, 6, 8, 10, and 12 are set to any one of the first through third black bell winning data and the first through third blue bell winning data, any one of the first through third supplemental winning data, and any one of the fourth through seventh supplemental winning data. When a win occurs with index value IV = 2, if the first stop is on the left reel 32L, the second stop is on the center reel 32M, and the third stop is on the right reel 32R, the first black bell winning can be achieved; otherwise, the first supplemental winning or the fourth supplemental winning is reliably achieved regardless of the operation timing of the stop buttons 42-44. If a win occurs with index value IV = 6, and the first stop is the center reel 32M, the second stop is the left reel 32L, and the third stop is the right reel 32R, a second black bell win is possible; in all other cases, a third or sixth supplemental win is guaranteed regardless of the operation timing of the stop buttons 42-44. If a win occurs with index value IV = 10, and the first stop is the right reel 32R, the second stop is the left reel 32L, and the third stop is the center reel 32M, a third black bell win is possible; in all other cases, a second or sixth supplemental win is guaranteed.

When an index value IV = 4 is selected and the first stop is on the left reel 32L, the second stop is on the right reel 32R, and the third stop is on the center reel 32M, a first blue bell win is possible; otherwise, a second or fifth supplemental win is guaranteed regardless of the timing of operation of the stop buttons 42-44. When an index value IV = 8 is selected and the first stop is on the center reel 32M, the second stop is on the right reel 32R, and the third stop is on the left reel 32L, a second blue bell win is possible; otherwise, a second or fifth supplemental win is guaranteed regardless of the timing of operation of the stop buttons 42-44. When a win occurs with index value IV = 12, if the first stop is on the right reel 32R, the second stop is on the center reel 32M, and the third stop is on the left reel 32L, a third blue bell win may be achieved; in all other cases, a third or seventh supplementary win will be achieved regardless of the timing of operation of the stop buttons 42-44.

The first through seventh supplementary wins, regular bell wins, and various replay wins are win modes that will not result in a missed win if reels 32L, 32M, and 32R are stopped in the corresponding order. The first through sixth red bell wins, first through third black bell wins, first through third blue bell wins, cherry wins, watermelon wins, and BB wins are win modes that may result in a missed win depending on the timing of the stop buttons 42-44 stop operation relative to the rotational position of reels 32L, 32M, and 32R.

As shown in Figures 84(a) and 84(b), the PV value set for index values IV = 2, 4, 6, 8, 10, and 12 in non-internal utility lottery table TB3 and internal utility lottery table TB4 is "2250." When non-internal utility lottery table TB3 or internal utility lottery table TB4 is selected, the probability of winning when index value IV = 2, the probability of winning when index value IV = 4, the probability of winning when index value IV = 6, the probability of winning when index value IV = 8, the probability of winning when index value IV = 10, and the probability of winning when index value IV = 12 are each approximately 1/29.1.

Similar to the fifth embodiment, when non-internal utility lottery table TB3 is selected, the index value IV set with cherry winning data is only "15" among the index values IV = 1-13, 15-20 that can result in a win. Also, when internal utility lottery table TB4 is selected, the index value IV set with cherry winning data is only "14" among the index values IV = 1-14, 16-19 that can result in a win. Furthermore, the probability of winning with index value IV = 14 when internal utility lottery table TB4 is selected (approximately 1/77.1) is the same as the probability of winning with index value IV = 15 when non-internal utility lottery table TB3 is selected (approximately 1/77.1). As a result, the probability of winning with an index value IV set with cherry winning data is the same when non-internal utility lottery table TB3 is selected and when internal utility lottery table TB4 is selected.

Next, we will explain the details of the notifications and effects executed in AT state ST14.

As already explained, each of the index values IV = 1 to 12 is set to a combination of any of the first to sixth red bell winning data, the first to third black bell winning data, and the first to third blue bell winning data, any of the first to third supplementary winning data, and any of the fourth to seventh supplementary winning data. In the AT state ST14, if any of the index values IV = 1 to 12 is won in the role selection process (Figure 62), a stop operation notification is executed to notify the operation sequence and timing of the stop buttons 42 to 44 to achieve a red bell winning, black bell winning, or blue bell winning.

The stop operation notification includes a stop order notification and a target range notification for achieving any one of the red bell wins, any one of the black bell wins, or any one of the blue bell wins. The stop order notification notifies the player of the stop order for achieving a red bell win, black bell win, or blue bell win corresponding to any one of the red bell win data, any one of the black bell win data, or any one of the blue bell win data set in the index value IV selected in the winning combination lottery process (Figure 62). The target range notification notifies the player of the target range for the timing of operating the stop buttons 42-44 on each reel 32L, 32M, and 32R to achieve the red bell win, black bell win, or blue bell win. Furthermore, in the AT state ST14, an additional bonus challenge effect is executed, in which the player attempts to complete the mission given at the start of the AT state ST14 and generate an additional bonus that increases the remaining number of awarded gaming media in the AT state ST14. Details of the additional bonus challenge effect will be described later.

Figures 86(a) and 86(b) are explanatory diagrams for explaining how the stop operation notification and the additional challenge presentation are carried out. First, the stop order notification will be explained. The stop order notification is executed by the image display device 63. When the stop order notification is executed, as shown in Figure 86(a), the image display device 63 displays the same number of unit display images G1 to G3 as the number of stop operations required to end the game, and each unit display image G1 to G3 displays an image corresponding to the stop order of the reels 32L, 32M, and 32R. Specifically, a left unit display image G1 corresponding to the left reel 32L, a middle unit display image G2 corresponding to the middle reel 32M, and a right unit display image G3 corresponding to the right reel 32R are displayed. Figure 86(a) shows the notification of the stop order when the first stop is on the left reel 32L, the second stop is on the right reel 32R, and the third stop is on the center reel 32M, so the left unit display image G1 displays an image of "1" corresponding to the stop order of the left reel 32L, the center unit display image G2 displays an image of "3" corresponding to the stop order of the center reel 32M, and the right unit display image G3 displays an image of "2" corresponding to the stop order of the right reel 32R. Based on the stop order notification, the player can determine the operation order of the stop buttons 42-44 that will result in any one of the red bell wins, any one of the black bell wins, or any one of the blue bell wins.

Next, the target range notification will be explained. The target range notification is performed by the speaker 62 and the image display device 63. As already explained, in each game state ST11 to ST14, reel control that allows each reel 32L, 32M, and 32R to slide up to four symbols after the stop buttons 42 to 44 are operated is performed.

As already explained in the fifth embodiment with reference to FIG. 73(a), when an index value IV of "1" or "3" is won in AT state ST14 and the game starts, a text image G61 saying "Aim for the left red range" is displayed on the image display device 63, and a voice message saying "left red" is output from the speaker 62. The text image G61 is displayed above the unit display image G1 corresponding to the first stop. This prompts the player to operate the left stop button 42 when the symbols included in the "left red range" (the 0th to 6th and 19th to 20th ranges on the left reel 32L) are on the main line ML, and increases the likelihood of achieving a first red bell win or a second red bell win.

As already explained in the fifth embodiment above, when an index value IV of "5" or "7" is won in AT state ST14 and the game begins, a text image saying "Aim for the middle red range" is displayed on the image display device 63, and the sound "middle red" is output from the speaker 62. This text image is displayed above the unit display image G2 corresponding to the first stop. This urges the player to operate the middle stop button 43 when a symbol included in the "middle red range" (the fourth to thirteenth range on the middle reel 32M) is on the main line ML, and increases the likelihood of achieving a third or fourth red bell win.

As already explained in the fifth embodiment above, when an index value IV of "9" or "11" is won in AT state ST14 and the game begins, a text image saying "Aim for the red range" is displayed on the image display device 63, and a voice message saying "Red on the right" is output from the speaker 62. This text image is displayed above the unit display image G3 corresponding to the first stop. This prompts the player to operate the right stop button 44 when a symbol included in the "red range on the right" (the 10th to 19th symbols on the right reel 32R) is on the main line ML, and increases the likelihood of achieving the 5th or 6th red bell win.

As already explained with reference to Figures 84(a) and 84(b), in the non-internal utility lottery table TB3 and the internal utility lottery table TB4, the black bell winning data set at index value IV = 2 is the first black bell winning data. When index value IV = 2 is won, the first stop must be on the left reel 32L to achieve the first black bell win. Also, as already explained with reference to Figure 85, to achieve the first black bell win, the "black BAR" symbol on the left reel 32L must stop on the main line ML. To stop the "black BAR" symbol on the left reel 32L on the main line ML, the left stop button 42 must be operated when a symbol included in the "left black range," which is the 6th to 14th range of the left reel 32L, is on the main line ML.

As shown in Figure 86 (a), when index value IV = 2 is won in AT state ST14 and the game starts, a text image G72 saying "Aim for the left black area" is displayed on the image display device 63, and the sound "left black" is output from the speaker 62. The text image G72 is displayed above the unit display image G1 corresponding to the first stop. This prompts the player to operate the left stop button 42 when the symbols included in the "left black area" (the 6th to 14th range of the left reel 32L) are on the main line ML, and increases the chances of achieving the first black bell win.

As already explained with reference to Figures 84(a) and 84(b), in the non-internal utility lottery table TB3 and the internal utility lottery table TB4, the blue bell winning data set at index value IV = 4 is the first blue bell winning data. When index value IV = 4 is won, the first stop must be on the left reel 32L to achieve the first blue bell winning. Also, as already explained with reference to Figure 85, to achieve the first blue bell winning, the "blue BAR" symbol on the left reel 32L must stop on the main line ML. To stop the "blue BAR" symbol on the left reel 32L on the main line ML, the left stop button 42 must be operated when a symbol included in the "left blue range," which is the 14th to 18th range of the left reel 32L, is on the main line ML.

Although not shown in the figures, when index value IV = 4 is hit in AT state ST14 and the game starts, a text image saying "Aim for the left blue range" is displayed on the image display device 63, and the sound "left blue" is output from the speaker 62. This text image is displayed above the unit display image G1 corresponding to the first stop. This urges the player to operate the left stop button 42 when the symbols included in the "left blue range" (the 14th to 18th range on the left reel 32L) are on the main line ML, and increases the chances of achieving the first blue bell win.

As already explained with reference to Figures 84(a) and 84(b), in the non-internal utility lottery table TB3 and the internal utility lottery table TB4, the black bell winning data set at index value IV = 6 is the second black bell winning data. When index value IV = 6 is won, the first stop must be on the center reel 32M to achieve the second black bell win. Also, as already explained with reference to Figure 85, to achieve the second black bell win, the "black BAR" symbol on the center reel 32M must stop on the main line ML. To stop the "black BAR" symbol on the center reel 32M on the main line ML, the center stop button 43 must be operated when a symbol included in the "middle black range," which is the range of symbols 0 to 1 and 14 to 18 on the center reel 32M, is on the main line ML.

Although not shown in the figures, when index value IV = 6 is hit in AT state ST14 and the game starts, a text image saying "Aim for the middle black range" is displayed on the image display device 63, and the sound "middle black" is output from the speaker 62. This text image is displayed above the unit display image G2 corresponding to the first stop. This prompts the player to operate the middle stop button 43 when a symbol included in the "middle black range" (the 0th to 1st and 14th to 18th ranges on the middle reel 32M) is on the main line ML, and increases the likelihood of achieving a second black bell win.

As already explained with reference to Figures 84(a) and 84(b), in the non-internal utility lottery table TB3 and the internal utility lottery table TB4, the blue bell winning data set at index value IV = 8 is the second blue bell winning data. When index value IV = 8 is won, the first stop must be on the center reel 32M to achieve the second blue bell win. Also, as already explained with reference to Figure 85, to achieve the second blue bell win, the "blue BAR" symbol on the center reel 32M must stop on the main line ML. To stop the "blue BAR" symbol on the center reel 32M on the main line ML, the center stop button 43 must be operated when a symbol included in the "middle blue range," which is the first to fifth range of the center reel 32M, is on the main line ML.

Although not shown in the figures, when index value IV = 8 is won in AT state ST14 and the game starts, a text image saying "Aim for the middle blue range" is displayed on the image display device 63, and the sound "middle blue" is output from the speaker 62. This text image is displayed above the unit display image G2 corresponding to the first stop. This urges the player to operate the middle stop button 43 when a symbol included in the "middle blue range" (the first to fifth range on the middle reel 32M) is on the main line ML, and increases the likelihood of achieving a second blue bell win.

As already explained with reference to Figures 84(a) and 84(b), in the non-internal utility lottery table TB3 and the internal utility lottery table TB4, the black bell winning data set at index value IV = 10 is the third black bell winning data. When index value IV = 10 is won, the first stop must be on the right reel 32R to achieve the third black bell win. As already explained with reference to Figure 85, to achieve this third black bell win, the "black BAR" symbol on the right reel 32R must stop on the main line ML. To stop the "black BAR" symbol on the right reel 32R on the main line ML, the right stop button 44 must be operated when symbols included in the "right black range," which is the range of symbols 0 to 6 and 19 to 20 on the right reel 32R, are on the main line ML.

Although not shown in the figures, when index value IV = 10 is hit in AT state ST14 and the game starts, a text image saying "Aim for the black area on the right" is displayed on the image display device 63, and the sound "black on the right" is output from the speaker 62. This text image is displayed above the unit display image G3 corresponding to the first stop. This prompts the player to operate the right stop button 44 when the symbols included in the "black area on the right" (the range of symbols 0 to 6 and 19 to 20 on the right reel 32R) are on the main line ML, and increases the chances of achieving a third black bell win.

As already explained with reference to Figures 84(a) and 84(b), in the non-internal utility lottery table TB3 and the internal utility lottery table TB4, the blue bell winning data set at index value IV = 12 is the third blue bell winning data. When index value IV = 12 is won, the first stop must be on the right reel 32R to achieve the third blue bell win. As already explained with reference to Figure 85, to achieve this third blue bell win, the "blue BAR" symbol on the right reel 32R must stop on the main line ML. To stop the "blue BAR" symbol on the right reel 32R on the main line ML, the right stop button 44 must be operated when a symbol included in the "right blue range," which is the sixth to tenth range on the right reel 32R, is on the main line ML.

Although not shown in the illustration, when index value IV = 12 is hit in AT state ST14 and the game starts, a text image saying "Aim for the blue range on the right" is displayed on the image display device 63, and the sound "blue on the right" is output from the speaker 62. This text image is displayed above the unit display image G3 corresponding to the first stop. This prompts the player to operate the right stop button 44 when the symbols included in the "blue range on the right" (the range from the sixth to tenth symbols on the right reel 32R) are on the main line ML, and increases the chances of achieving the third blue bell win.

Next, we will explain the content of the additional challenge effect that is executed in AT state ST14.

When AT state ST14 begins, three missions, Missions 11 to 13, are given. Mission 11 involves "achieving the first red bell, second red bell, first black bell, or first blue bell win, which can be achieved by making the first stop on the left reel 32L." Mission 12 involves "achieving the third red bell, fourth red bell, second black bell, or second blue bell win, which can be achieved by making the first stop on the center reel 32M." Mission 13 involves "achieving the fifth red bell, sixth red bell, third black bell, or third blue bell win, which can be achieved by making the first stop on the right reel 32R." In AT state ST14, if all of these 11th to 13th missions are completed, a post-achievement bonus will be applied to increase the remaining number of gaming media awarded in AT state ST14, provided that neither the first ending flag nor the second ending flag in the main RAM 74 is set to "1".

If the last of the 11th to 13th missions is completed by achieving any of the first through sixth red bell wins, a post-completion bonus is applied that increases the remaining number of awarded gaming media in the AT state ST14 by 40. Furthermore, if the last of the 11th to 13th missions is completed by achieving any of the first through third black bell wins, a post-completion bonus is applied that increases the remaining number of awarded gaming media in the AT state ST14 by 30. Furthermore, if the last of the 11th to 13th missions is completed by achieving any of the first through third blue bell wins, a post-completion bonus is applied that increases the remaining number of awarded gaming media in the AT state ST14 by 60. This draws attention to the type of bell win that will be achieved when the last of the 11th to 13th missions is completed, thereby increasing the enjoyment of the game.

When the AT state ST14 starts, the text image G62 saying "Complete all missions" and the eleventh achievement status display area G73 to the thirteenth achievement status display area G75 are displayed on the image display device 63. The display of these text image G62 and achievement status display areas G73 to G75 continues until the AT state ST14 ends. However, if all missions are completed before the AT state ST14 ends, the display of the text image G62 saying "Complete all missions" will end based on the fact that this state has been reached.

The 11th achievement status display area G73 displays the progress status of the 11th mission, the 12th achievement status display area G74 displays the progress status of the 12th mission, and the 13th achievement status display area G75 displays the progress status of the 13th mission. When the 11th to 13th missions have not been cleared, as shown in FIG. 86(a), the word "left" is displayed in the 11th achievement status display area G73, the word "middle" is displayed in the 12th achievement status display area G74, and the word "right" is displayed in the 13th achievement status display area G75. When the 11th mission is cleared, the word displayed in the 11th achievement status display area G73 changes to "completed" as shown in FIG. 86(b). Furthermore, when the 12th mission is cleared, the word displayed in the 12th achievement status display area G74 changes to "completed," and when the 13th mission is cleared, the word displayed in the 13th achievement status display area G75 changes to "completed."

In this way, by allowing the player to check the progress of missions 11 to 13 based on the display in the 11th to 13th progress status display areas G73 to G75, it is possible to grasp the missions that have not yet been completed. Furthermore, the more missions that are completed, the greater the sense of anticipation that all missions will be completed and additional points will be awarded upon completion.

In the additional challenge presentation, when any of the missions is cleared, the upper lamp 61 is controlled to emit light in a manner that notifies the player that the mission has been cleared, and sound output is controlled so that a sound that notifies the player that the mission has been cleared is output from the speaker 62. The word "Achieved" is then displayed in the achievement status display areas G73 to G75 that correspond to the cleared mission.

As shown in FIG. 86(b), when the last of the 11th to 13th missions is completed by winning any of the first to third blue bells, the image display device 63 displays a text image G76 saying "Finally, achieve blue and complete" and a text image G77 corresponding to the number of awards. Also, although not shown, when the last of the 11th to 13th missions is completed by winning any of the first to sixth red bells, the image display device 63 displays a text image saying "Finally, achieve red and complete" and a text image corresponding to the number of awards. Furthermore, although not shown, when the last of the 11th to 13th missions is completed by winning any of the first to third black bells, the image display device 63 displays a text image saying "Finally, achieve black and complete" and a text image corresponding to the number of awards. This allows the player to understand that the remaining number of awards has increased by completing all of the 11th to 13th missions.

Next, prior to describing the achievement response processing (Figure 87) executed by the main MPU 72, the configuration of the main RAM 74 used in this achievement response processing will be described. Figure 86(c) is an explanatory diagram for explaining the configuration of the main RAM 74. As shown in Figure 86(c), the main RAM 74 is provided with a left achievement flag 74n, a middle achievement flag 74o, and a right achievement flag 74p. The left achievement flag 74n is a flag that allows the main MPU 72 to determine that the 11th mission has been achieved, the middle achievement flag 74o is a flag that allows the main MPU 72 to determine that the 12th mission has been achieved, and the right achievement flag 74p is a flag that allows the main MPU 72 to determine that the 13th mission has been achieved.

Next, the achievement response processing executed by the main MPU 72 will be explained with reference to the flowchart in Figure 87. As already explained in the fifth embodiment above, the achievement response processing (step S3906) is executed on the condition that neither the first ending flag nor the second ending flag in the main RAM 74 is set to "1" (step S3905: NO) in the AT processing (Figure 78).

First, similar to step S4001 of the achievement response processing (FIG. 79) in the fifth embodiment, it is determined whether the value of the payout number counter in the main RAM 74 is "2" or greater (step S4301). If the value of the payout number counter is "2" or greater (step S4301: YES), i.e., if a small win in which the number of gaming media awarded is set to "2" or greater has been achieved, it is determined whether the value of the index value counter 74a in the main RAM 74 is "4" or less (step S4302).

If a positive determination is made in step S4302, this means that a win has occurred with an index value IV of any of "1" to "4." As already explained, index values IV = 1 to 4 are set to any of the red bell winning data, black bell winning data, and blue bell winning data (specifically, first red bell winning data, second red bell winning data, first black bell winning data, and first blue bell winning data), which can result in a win when the first stop is the left reel 32L.

If a positive determination is made in step S4302, it is determined whether the left achievement flag 74n in the main RAM 74 is set to "1" (step S4303). If the left achievement flag 74n is not set to "1" (step S4303: NO), the left achievement flag 74n is set to "1" (step S4304). This allows the main MPU 72 to determine that the 11th mission has been achieved.

If a negative determination is made in step S4302, it is determined whether the value of the index value counter 74a is equal to or less than "8" (step S4305). If a positive determination is made in step S4305, this means that a win has occurred with an index value IV of any of "5" to "8." As already explained, index values IV = 5 to 8 are set to any of the red bell winning data, black bell winning data, and blue bell winning data (specifically, third red bell winning data, fourth red bell winning data, second black bell winning data, and second blue bell winning data), which can result in a win when the first stop is the middle reel 32M.

If a positive determination is made in step S4305, it is determined whether the intermediate achievement flag 74o in the main RAM 74 is set to "1" (step S4306). If the intermediate achievement flag 74o is not set to "1" (step S4306: NO), the intermediate achievement flag 74o is set to "1" (step S4307). This allows the main MPU 72 to determine that the 12th mission has been achieved.

If a negative determination is made in step S4305, it is determined whether the value of the index value counter 74a is equal to or less than "12" (step S4308). If a positive determination is made in step S4308, this means that a win has occurred with an index value IV of any of "9" to "12." As already explained, index values IV = 9 to 12 are set to any of the red bell winning data, black bell winning data, and blue bell winning data (specifically, the fifth red bell winning data, the sixth red bell winning data, the third black bell winning data, and the third blue bell winning data), which can result in a win when the first stop is the right reel 32R.

If a positive determination is made in step S4308, it is determined whether the right achievement flag 74p in the main RAM 74 is set to "1" (step S4309). If the right achievement flag 74p is not set to "1" (step S4309: NO), the right achievement flag 74p is set to "1" (step S4310). This allows the main MPU 72 to determine that the 13th mission has been achieved.

If step S4304, step S4307, or step S4310 has been performed, an achievement command is sent to the production side MPU 92 (step S4311). The achievement command is a command sent so that the production side MPU 92 can grasp the mission that has been completed. The achievement command contains information that identifies the type of mission that has been completed (specifically, numerical information between "1" and "3"). When the production side MPU 92 receives an achievement command, it identifies the mission that has been completed and causes the upper lamp 61, speaker 62, and image display device 63 to execute an effect corresponding to the completion of the mission.

Then, the post-achievement bonus process is executed (step S4312). The post-achievement bonus process is executed when a win occurs with index value IV = 1 to 12, resulting in one of the first to sixth red bell wins, the first to third black bell wins, or the first to third blue bell wins, and one of the achievement flags 74n to 74p is set to "1."

If a positive judgment is made in step S4303, step S4306, or step S4309, the achievement response process (Figure 87) is terminated. This prevents the processes of steps S4311 and S4312 from being executed if the process of setting achievement flags 74n to 74p to "1" is not executed.

As already explained with reference to Figures 84(a), 84(b) and 85, in the non-internal utility lottery table TB3 and the internal utility lottery table TB4, any of the index values IV of "1" to "12" is set to any one of the first to sixth red bell winning data, the first to third black bell winning data and the first to third blue bell winning data, any one of the first to third supplementary winning data and any one of the fourth to seventh supplementary winning data. As already explained with reference to Figure 83, the number of game media awarded when the first, third, and fifth red bell wins are achieved is set to "11", the number of game media awarded when the second, fourth, and sixth red bell wins are achieved is set to "13", the number of game media awarded when the first to third black bell wins are achieved is set to "10", the number of game media awarded when the first to third blue bell wins are achieved is set to "12", and the number of game media awarded when the first to seventh supplementary wins are achieved is set to "1". For this reason, in step S4301 of the achievement response processing (FIG. 87), a process is executed to determine whether the value of the payout counter in the main RAM 74 is equal to or greater than "2." Based on a positive determination in this process, the main MPU 72 can determine in a single determination process that any of the minor winning combinations has been achieved, that the value of the index value counter 74a is equal to or greater than "1," that any of the first through sixth red bell winning combinations, the first through third black bell winning combinations, and the first through third blue bell winning combinations may have occurred, and that the first through seventh supplemental winning combinations have not occurred. This simplifies the processing configuration of the achievement response processing (FIG. 87) compared to a configuration that requires multiple determination processes to determine these things.

As already explained with reference to Figures 84(a), 84(b), and 85, in the non-internal utility lottery table TB3 and the internal utility lottery table TB4, the numerical range of index value IV = 1 to 4 is set to any of the first red bell winning data, first black bell winning data, second red bell winning data, and first blue bell winning data, which can be used to achieve a win by making the first stop on the left reel 32L. Therefore, the master MPU 72 can proceed to processing to set the left achievement flag 74n based on the value of the index value counter 74a being within the numerical range of "1" to "4." Furthermore, the numerical range of index value IV = 5 to 8 is set to any of the third red bell winning data, second black bell winning data, fourth red bell winning data, and second blue bell winning data, which can be used to achieve a win by making the first stop on the center reel 32M. Therefore, the main MPU 72 can proceed to processing to set the medium achievement flag 74o based on the value of the index value counter 74a being within the range of "5" to "8." Furthermore, the numerical range of index value IV = 9 to 12 contains any of the fifth red bell winning data, third black bell winning data, sixth red bell winning data, and third blue bell winning data, which can result in a win when the first stop is the right reel 32R. Therefore, the main MPU 72 can proceed to processing to set the right achievement flag 74p based on the value of the index value counter 74a being within the range of "9" to "12." This simplifies the processing configuration for setting the achievement flags 74n to 74p corresponding to the numerical information set in the index value counter 74a.

Next, the post-achievement top-up processing executed by the main MPU 72 will be explained with reference to the flowchart in Figure 88. As already explained, the post-achievement top-up processing is executed in step S4312 of the achievement response processing (Figure 87).

In the post-achievement top-up process, if all of the achievement flags 74n to 74p in the main RAM 74 are set to "1" (step S4401: YES), the process determines whether the value of the index value counter 74a is odd by determining whether the value of the 0th bit of the index value counter 74a in the main RAM 74 is "1" (step S4402). As already explained in the fifth embodiment above, by determining whether the value of the index value counter 74a is odd by determining whether the value of the 0th bit of the index value counter 74a is "1", the number of processes required to determine whether the value of the index value counter 74a is odd can be reduced compared to a configuration in which the remainder when the numerical information set in the index value counter 74a is divided by "2" is calculated and the remainder is determined to be "1".

As already explained, in the non-internal utility lottery table TB3 and the internal utility lottery table TB4, any of the first to sixth red bell winning data is set to the odd index value IV in the numerical range of "1" to "12." If a positive determination is made in step S4402, "40," which is the number of awards corresponding to the red bell win, is added to the AT continuation counter 74d in the main RAM 74 (step S4403). This increases the remaining number of awards of gaming media in the AT state ST14 by "40."

As already explained, in the non-internal utility lottery table TB3 and the internal utility lottery table TB4, the index value IV of "2" ("00000010" in binary), "6" ("00000110" in binary) or "10" ("00001010" in binary) is set to one of the first to third black bell winning data, and the index value IV of "4" ("00000100" in binary), "8" ("00001000" in binary) or "12" ("00000100" in binary) is set to one of the first to third blue bell winning data. Therefore, if the value of the 0th bit in the index value counter 74a is "0" and the value of the 1st bit is "1," this means that the final mission has been achieved by winning any of the first to third black bells, and if the values of the 0th bit and the 1st bit in the index value counter 74a are "0," this means that the final mission has been achieved by winning any of the first to third blue bells.

If the value of the 0th bit of the index value counter 74a in the main RAM 74 is "0" (step S4402: NO), it is determined whether the value of the 1st bit of the index value counter 74a is "1" (step S4404). If a positive determination is made in step S4404, i.e., if the final mission is accomplished by the establishment of any of the first to third black bell wins, "30", which is the number of awards corresponding to the black bell win, is added to the AT continuation counter 74d in the main RAM 74 (step S4405). This increases the remaining number of awards of gaming media in the AT state ST14 by "30". If a negative determination is made in step S4404, i.e., if the final mission is accomplished by the establishment of any of the first to third blue bell wins, "60", which is the number of awards corresponding to the blue bell win, is added to the AT continuation counter 74d in the main RAM 74 (step S4406). This increases the remaining number of awards of gaming media in the AT state ST14 by "60".

In this way, if any red bell win is achieved and all of missions 11 to 13 are completed, the remaining number of game media awarded in AT state ST14 is incremented by 40. If any black bell win is achieved and all of missions 11 to 13 are completed, the remaining number of game media awarded in AT state ST14 is incremented by 30. Furthermore, if any blue bell win is achieved and all of missions 11 to 13 are completed, the remaining number of game media awarded in AT state ST14 is incremented by 60. By configuring the number of game media awarded to be incremented to vary depending on the type of mission 11 to 13 that is completed last, it is possible to draw attention to the type of mission 11 to 13 that is completed last, thereby increasing the enjoyment of the game.

As already explained, in the non-internal utility lottery table TB3 and the internal utility lottery table TB4, in the numerical range of "1" to "12," any of the red bell winning data is set for the index value IV where the value of the 0th bit in the index value counter 74a is "1." Furthermore, in the numerical range of "1" to "12," any of the black bell winning data is set for the index value IV where the value of the 0th bit in the index value counter 74a is "0" and the value of the 1st bit is "1." Furthermore, in the numerical range of "1" to "12," any of the blue bell winning data is set for the index value IV where the values of the 0th bit and the 1st bit in the index value counter 74a are "0." Therefore, by performing a process to determine whether the value of the 0th bit in the index value counter 74a is "1" and a process to determine whether the value of the 1st bit in the index value counter 74a is "1," the main MPU 72 can identify the type of bell winning that has occurred—red bell winning, black bell winning, or blue bell winning. This simplifies the processing configuration for identifying the type of bell win that has occurred.

If step S4403, step S4405, or step S4406 is performed, a post-achievement add-on command is sent to the presentation-side MPU 92 (step S4407). The post-achievement add-on command is set with numerical information corresponding to the remaining number of gaming media awarded in AT state ST14, which was added to the AT continuation counter 74d in step S4403, step S4405, or step S4406. The presentation-side MPU 92 executes a post-achievement add-on effect based on the received post-achievement add-on command. Based on the content of the post-achievement add-on effect, the player can understand that all missions have been accomplished and the remaining number of gaming media awarded in AT state ST14 has increased, as well as the amount of this increase. If the presentation-side MPU 92 receives a post-achievement add-on command, it causes the upper lamp 61, speaker 62, and image display device 63 to execute an effect announcing that the remaining number of gaming media awarded in AT state ST14 has increased and the amount of this increase has been increased.

Then, the additional challenge flag in the main RAM 74 is cleared to "0" (step S4408). This allows the main MPU 72 to understand that all missions have been completed and the additional challenge presentation has ended.

As described above, of the index values IV = 1 to 12 in the non-internal utility lottery table TB3 and the internal utility lottery table TB4, the range of index values IV = 1 to 4 is set to one of the red bell winning data, black bell winning data and blue bell winning data, which can be used to achieve a win by making the first stop the left reel 32L; the range of index values IV = 5 to 8 is set to one of the red bell winning data, black bell winning data and blue bell winning data, which can be used to achieve a win by making the first stop the middle reel 32M; and the range of index values IV = 9 to 12 is set to one of the red bell winning data, black bell winning data and blue bell winning data, which can be used to achieve a win by making the first stop the right reel 32R. This simplifies the following processing: a processing configuration for setting the left achievement flag 74n to "1" based on a winning index value IV containing any of the red bell winning data, black bell winning data, and blue bell winning data that can be used to establish a win by having the left reel 32L as the first stop; a processing configuration for setting the middle achievement flag 74o to "1" based on a winning index value IV containing any of the red bell winning data, black bell winning data, and blue bell winning data that can be used to establish a win by having the center reel 32M as the first stop; and a processing configuration for setting the right achievement flag 74p to "1" based on a winning index value IV containing any of the red bell winning data, black bell winning data, and blue bell winning data that can be used to establish a win by having the right reel 32R as the first stop. This reduces the data capacity of the main ROM 73 required to store the programs corresponding to these processes.

In the non-internal utility lottery table TB3 and the internal utility lottery table TB4, among the index values IV = 1 to 12, the index value IV where the 0th bit is "1" (specifically, any of "1", "3", "5", "7", "9" and "11") is set to one of the first to sixth red bell winning data, the index value IV where the 0th bit is "0" and the 1st bit is "1" (specifically, any of "2", "6" and "10") is set to one of the first to third black bell winning data, and the index value IV where the 0th bit is "0" and the 1st bit is "0" (specifically, any of "4", "8" and "12") is set to one of the first to third blue bell winning data. This simplifies the processing configuration for adding the number of awards corresponding to a red bell win to the AT continuation counter 74d based on winning the index value IV set to any of the first through sixth red bell win data, the processing configuration for adding the number of awards corresponding to a black bell win to the AT continuation counter 74d based on winning the index value IV set to any of the first through third black bell win data, and the processing configuration for adding the number of awards corresponding to a blue bell win to the AT continuation counter 74d based on winning the index value IV set to any of the first through third blue bell win data. This reduces the data capacity of the main ROM 73 required to store the programs corresponding to these processes.

Of the numerical information "0" through "20" that can be set in the index value counter 74a, the index values IV = 1, 3, 5, 7, 9, and 11 that are the target of the process corresponding to the Red Bell winning (step S4403) include index values IV that are not consecutive with any of the other index values IV that are the target of that process. In contrast, in step 8002, a process is performed to determine whether the value of the index value counter 74a is odd, and if a positive determination is made, the process proceeds to the Red Bell winning process. This reduces the number of determination processes required to identify that any of the index values IV that are the target of the process corresponding to the Red Bell winning are set in the index value counter 74a, compared to a configuration in which a determination process is performed to determine whether each of the index values IV = 1, 3, 5, 7, 9, and 11 that are the target of the process corresponding to the Red Bell winning is set in the index value counter 74a.

Of the numerical information "0" through "20" that can be set in the index value counter 74a, the index values IV = 2, 4, 6, 8, 10, and 12 that are the subject of the processing corresponding to the black bell or blue bell win (steps S4404 through S4406) include index values IV that are not consecutive with any of the other index values IV that are the subject of that processing. In contrast, in step 8002, a process is performed to determine whether the value of the index value counter 74a is odd, and if a negative determination is made, the process proceeds to the processing corresponding to the black bell or blue bell win. This reduces the number of determination processes required to identify that any of the index values IV that are the subject of the processing corresponding to the black bell or blue bell win are set in the index value counter 74a, compared to a configuration in which a determination process is performed to determine whether each of the index values IV = 2, 4, 6, 8, 10, and 12 that are the subject of the processing corresponding to the black bell or blue bell win is set in the index value counter 74a.

Seventh Embodiment
In this embodiment, the setting of the index value IV that is won in the lottery process for winning the role differs from that of the fifth embodiment. The following describes the configuration that differs from the fifth embodiment. Note that the description of the same configuration as the fifth embodiment will basically be omitted.

Using the example where the setting value is "3", the lottery table in the non-bonus state (specifically, any of the normal gaming state ST11, the bonus internal state ST12, and the AT state ST14) will be explained. Figure 89(a) is an explanatory diagram for explaining the configuration of the main ROM 73 in this embodiment. As shown in Figure 89(a), the main ROM 73 stores a non-bonus role lottery table TB5. The non-bonus role lottery table TB5 is selected in the role lottery process executed in the normal gaming state ST11, the bonus internal state ST12, and the AT state ST14.

The index values IV, winning data, and point values PV set in the non-bonus role lottery table TB5 are the same as those in the non-internal role lottery table TB1 (Figure 63(a)) in the fifth embodiment. Index values IV of "1" to "20" are set in the non-bonus role lottery table TB5. The types of winning data set for each index value IV = 1 to 20 in the non-bonus role lottery table TB5 are the same as the types of winning data set for each index value IV = 1 to 20 in the non-internal role lottery table TB1 in the fifth embodiment. Furthermore, the relationship between the stop order of the reels 32L, 32M, and 32R and the operation timing of the stop buttons 42 to 44 when a win occurs with an index value IV = 1 to 20, and the actual or potential winning combinations is as already explained in the fifth embodiment.

In non-bonus role lottery table TB5, the PV value set for index values IV=1-12 is "2250", the PV value set for index value IV=13 is "7000", the PV value set for index value IV=14 is "0", the PV value set for index value IV=15 is "850", the PV value set for index value IV=16 is "155", the PV value set for index value IV=17 is "200", the PV value set for index value IV=18 is "400", the PV value set for index value IV=19 is "9000", and the PV value set for index value IV=20 is "500".

When non-bonus lottery table TB5 is selected, the probability of winning when index value IV = 1 through index value IV = 12 is approximately 1/29.1. The probability of winning when index value IV = 13 is approximately 1/9.4. The probability of winning when index value IV = 15 is approximately 1/77.1. The probability of winning when index value IV = 16 is approximately 1/423. The probability of winning when index value IV = 17 is approximately 1/328. The probability of winning when index value IV = 18 is approximately 1/164. The probability of winning when index value IV = 19 is approximately 1/7.3. The probability of winning when index value IV = 20 is approximately 1/131. Because the point value PV set for index value IV = 14 is "0", when the role selection process (Figure 89 (b)) is executed with reference to non-bonus role selection table TB5, the judgment value DV will not exceed the maximum value of "65535" when index value IV = 14.

Next, the role selection process executed by the main MPU 72 will be explained with reference to the flowchart in Figure 89 (b). As already explained in the first embodiment above, the role selection process is executed in step S307 of the normal process (Figure 15).

Steps S4501 to S4506 are the same as steps S2801 to S2806 in the lottery process for determining winning combinations in the fifth embodiment (Figure 62). Specifically, the value of the index value counter 74a in the main RAM 74 is first cleared to "0" (step S4501). This allows the index value counter 74a to be in a state where the index value IV is not set.

Then, a random number to be used when determining whether the winning combination has been achieved is obtained (step S4502). As already explained in the fifth embodiment above, the main MPU 72 stores in the main RAM 74 the value latched in the random number circuit 75, from among the random numbers between "0" and "65535" generated by the random number circuit 75, based on confirmation of operation of the start lever 41. The main MPU 72 then reads out from the main ROM 73 a lottery table for determining whether the winning combination has been achieved (step S4503). In step S4503, a lottery table corresponding to the combination of the current setting value and the current game state is selected.

Then, the index value IV is set to "1" (step S4504), and the judgment value DV used to determine whether the winning combination is a hit or a miss is set (step S4505). In this judgment value setting process, the point value PV corresponding to the current index value IV is added to the current judgment value DV to set a new judgment value DV. Note that in the initial judgment value setting process for each game, the value of the random number obtained in step S4502 is set as the current judgment value DV, and the point value PV corresponding to the current index value IV (index value IV = 1) is added to this random number value to set a new judgment value DV.

Then, a win/loss determination is made for the role corresponding to the index value IV (step S4506). In determining whether the role is a win/loss determination, it is determined whether the determination value DV exceeds "65535." If a negative determination is made in step S4506, steps S4507 and S4508 execute the same processing as steps S2809 to S2810 of the role lottery process (Figure 62) in the fifth embodiment described above. Specifically, if the determination value DV does not exceed "65535" (step S4506: NO), i.e., if the role corresponding to the index value IV is not a win/loss determination, the index value IV is incremented by 1 (step S4507), and then it is determined whether there is a role corresponding to the index value IV, i.e., whether there is a target for which a win/loss determination should be made (step S4508). Specifically, it is determined whether the index value IV after incrementing by 1 exceeds the maximum value of the index value IV set in the lottery table. If there is a target for which a win/loss determination should be made, the process returns to step S4505, and the role win/loss determination continues. At this time, in step S4505, the point value PV corresponding to the current index value IV is added to the judgment value DV used to determine whether the previous hand was a hit (i.e., the current judgment value DV) to obtain a new judgment value DV, and in step S4506, the hand is judged to be a hit or miss based on this judgment value DV.

If the determination value DV exceeds "65535" (step S4506: YES), it is determined whether or not the bonus internal state ST12 is in progress by determining whether or not there is BB winning data already set in the main RAM 74 (step S4509). If BB winning data has already been set in the main RAM 74 (step S4509: YES), i.e., if the bonus internal state ST12 is in progress, it is determined whether or not the current index value IV is "15" (step S4510), and if the index value IV is "15" (step S4510: YES), the index value IV is changed to "14" (step S4511). As a result, if the determination value DV exceeds the maximum value when the bonus internal state ST12 is in progress and the index value IV is "15," the winning combination lottery process can be set to select index value IV = 14.

If a negative judgment is made in step S4510, it is determined whether the current index value IV is "20" (step S4512). If a negative judgment is made in step S4509, if the processing of step S4511 is performed, or if a negative judgment is made in step S4512, the current index value IV is set in the index value counter 74a in the main RAM 74 (step S4513), as in step S2807 of the role selection process (Figure 62) in the fifth embodiment above. This allows the main MPU 72 to determine the index value IV that was selected in the current role selection process (Figure 89 (b)).

Then, the winning data set in the role selection table currently read into the main RAM 74 corresponding to the current index value IV is set in the main RAM 74 (step S4514). This allows the main MPU 72 to grasp the currently winning minor roles, replay roles, and BB roles.

As already explained, in the non-bonus role lottery table TB5, the point value PV set corresponding to the index value IV = 14 is "0", and cherry winning data is set corresponding to the index value IV = 14. For this reason, when the non-bonus role lottery table TB5 is referenced, the judgment value DV does not exceed the upper limit value of "65535" in a situation where the index value IV = 14, but when the processing of step S4514 is executed in a state where the processing of steps S4509 to S4511 is executed and the current index value IV is changed from "15" to "14", the cherry winning data set corresponding to the index value IV = 14 in the non-bonus role lottery table TB5 can be set in the main RAM 74.

If the index value IV is "20" during the role selection process (FIG. 89(b)) executed in the bonus internal state ST12 and the judgment value DV exceeds the upper limit of "65535" (step S4509: YES, step S4510: NO, step S4512: YES), the process proceeds to step S4515 without executing steps S4513 and S4514. This prevents duplicate BB winning data from being set in the main RAM 74 in a configuration in which the lottery table referenced in the role selection process (FIG. 89(b)) executed in the non-bonus normal game state ST11, bonus internal state ST12, and AT state ST14 is a common non-bonus role selection table TB5, when BB winning data already exists in the main RAM 74.

If the current role selection process (Figure 89(b)) is executed in a non-bonus internal state (i.e., normal gaming state ST11, BB state ST13, or AT state ST14), a negative judgment is made in step S4509, and steps S4510 to S4512 are not executed. As a result, the index value IV = 14 can be set in the index value counter 74a when the role selection process (Figure 89(b)) is executed in the bonus internal state ST12, and can be set as the index value IV that is not set in the index value counter 74a when the role selection process (Figure 89(b)) is executed in a non-bonus internal state. Furthermore, the index value IV = 20 can be an index value IV that is not set in the index value counter 74a when the lottery process for the winning combination (Figure 89 (b)) is executed in the bonus internal state ST12 or the BB state ST13, but can be an index value IV that can be set in the index value counter 74a when the lottery process for the winning combination (Figure 89 (b)) is executed in the normal gaming state ST11 or the AT state ST14.

If a negative judgment is made in step S4508, a positive judgment is made in step S4512, or the processing of step S4514 is performed, this means that the winning/losing judgment of the winning combination has been completed. In this case, in steps S4515 to S4519, processing similar to steps S2811 to S2815 of the winning combination lottery processing (FIG. 62) in the fifth embodiment is executed. Specifically, a first stop information setting process is executed (step S4515), which sets stop information for reel stop control. Thereafter, in step S4516, an advantageous lottery process at the start of the game is executed, and in step S4517, a first control process for the play area is executed. Thereafter, in step S4518, a stop operation notification control process is executed, and in step S4519, a game start command transmission process is executed.

As described above, the index values IV for which cherry winning data is set are "14" and "15." Furthermore, the main ROM 73 stores only the lottery table (specifically, only the non-bonus role lottery table TB5) referenced in the role lottery process (Figure 89(b)) executed in the non-bonus state, in which a point value PV of "1" or greater is set only for index value IV=15 out of index values IV=14 and 15. When the role lottery process (Figure 89(b)) is executed and the index value IV is "15," if the judgment value DV exceeds the maximum value ("65535"), the index value IV is changed to "14" on the condition that the internal state is non-bonus, and index value IV=14 wins. This eliminates the need to store in the main ROM 73 a lottery table that can only win with index value IV=14 out of index values IV=14 and 15. The lottery process for the winning combination (FIG. 89(b)) is executed in the non-bonus internal state, and when the value of the judgment value DV exceeds the maximum value (65535) when the value of the index value IV is "15", the index value IV=15 is won. The lottery process for the winning combination is executed in the bonus internal state ST12, and when the value of the index value IV is "15", the index value IV=14 is won when the value of the judgment value DV exceeds the maximum value (65535).

By configuring the lottery table for roles referenced in the bonus internal state ST12 (specifically, the non-bonus role lottery table TB5) to be the same as the lottery table for roles referenced in the non-bonus internal state (specifically, the non-bonus role lottery table TB5), the data capacity of the main ROM required to store the lottery table for roles can be reduced compared to a configuration in which a lottery table for roles different from the lottery table for roles referenced in the non-bonus internal state is stored as the lottery table for roles referenced in the bonus internal state ST12.

This configuration allows the main MPU 72 to determine that an index value IV for which cherry winning data is set in the bonus internal state ST12 has been won based on the value of the index value counter 74a in the main RAM 74 being "14." This reduces the amount of data storage space that needs to be reserved in the main RAM 74 to allow the main MPU 72 to determine that an index value IV for which cherry winning data is set in the bonus internal state ST12 has been won, compared to a configuration in which, in addition to the index value counter 74a, a flag is provided in the main RAM 74 for which information indicating that an index value IV for which cherry winning data is set in the bonus internal state ST12 has been won.

Eighth Embodiment
In this embodiment, the content of the execution control of the forced termination pre-notification differs from that of the first embodiment. The following describes the configuration that differs from the first embodiment. Note that the description of the same configuration as the first embodiment will be omitted.

Figures 90(a) to 90(d) are explanatory diagrams illustrating the display content of the pre-forced termination notification on the image display device 63.

As shown in Figures 90(a), 90(b), and 90(d), the image display device 63 displays a presentation character image G80 corresponding to the game state (either the normal game state ST1, the first CB state ST2, the second CB state ST3, the base AT state ST4, or the ending AT state ST5).

In this embodiment, as in the first embodiment, if the number of game media awarded to the player after the initial value of the termination determination counter 98b is set exceeds 19,000, the game is forcibly terminated. Furthermore, if the number of game media awarded to the player after the initial value of the termination determination counter 98b is set reaches 18,850, the image display device 63 displays an image reading "150 coins until game termination" as a pre-termination image G33 to notify the player that the game is approaching a forced termination, as shown in FIG. 90(a). Furthermore, the number of wins remaining before the forced termination, displayed in this pre-termination image G33, fluctuates depending on the value of the termination determination counter 98b. In other words, if the value of the termination determination counter 98b increases, the number of wins remaining before the forced termination, displayed in the pre-termination image G33, decreases accordingly. Furthermore, if the value of the termination determination counter 98b decreases, the number of wins remaining before the forced termination, displayed in the pre-termination image G33, increases accordingly. Furthermore, if the value of the termination determination counter 98b becomes "65,285" or less, the display of the pre-termination image G33 is terminated. In other words, when the supply of operating power to the slot machine 10 starts and the end determination counter 98b is set to an initial value of "46535", and the number of gaming media awarded to the player reaches 18,850, the display of the pre-end image G33 begins, whereas when the number of gaming media awarded to the player falls to 18,750, the display of the pre-end image G33 ceases. By checking the pre-end image G33, the player can know that the forced end of the game is approaching, and can also know the number of wins remaining before the forced end of the game occurs.

Since the game is in the base AT state ST4, the image display device 63 displays the remaining number of awards image G21, the number of acquisitions image G22, and the number of games played image G23, as in the first embodiment described above. The remaining number of awards image G21 is an image for notifying the player of the remaining number of gaming media to be awarded in the base AT state ST4. The number of acquisitions image G22 is an image for notifying the player of the total number of gaming media that have been acquired by the player since the game entered the current base AT state ST4. The number of games played image G23 is an image for notifying the player of the total number of games that have been played since the game entered the current base AT state ST4.

In this embodiment, when the value of the end determination counter 98b reaches "65385," that is, when the supply of operating power to the slot machine 10 begins and the end determination counter 98b is set to its initial value of "46535," and the number of gaming media awarded to the player reaches 18,850, the image display device 63 displays a pre-end emphasis image G81 in addition to the pre-end image G33 to notify the player that the game is approaching a forced end. Similar to the pre-end image G33, the pre-end emphasis image G81 displays an image indicating the remaining number of gaming media to be acquired until the forced end occurs.

The pre-end emphasis image G81 is larger than the pre-end image G33 and is displayed closer to the center of the display surface of the image display device 63. This makes it possible to make the pre-end emphasis image G81 more noticeable than the pre-end image G33. The pre-end emphasis image G81 is also displayed in a separate display position without overlapping the pre-end image G33. This allows the player to recognize the pre-end emphasis image G81 and the pre-end image G33 individually. The pre-end emphasis image G81 is also displayed in a separate display position without overlapping the remaining award number image G21, the acquisition number image G22, and the number of games played image G23 if the base AT state ST4 is in progress, and is displayed in a separate display position without overlapping the acquisition number image G22 and the number of games played image G23 if the ending AT state ST5 is in progress. This makes it possible to display the pre-end emphasis image G81 without reducing the visibility of the remaining award number image G21, the acquisition number image G22, and the number of games played image G23.

As shown in Figure 90(b), the pre-end highlight image G81 is terminated when the game ends and the number of game media awarded to the player reaches 18,850 after the initial value is set in the end determination counter 98b, whereas the pre-end image G33 continues to be displayed even after the game ends, and will continue to be displayed until the game is forced to end unless the number of game media awarded to the player falls to 18,750 and the display end condition is met. Also, while the pre-end image G33 continues to be displayed, if the value of the end determination counter 98b changes as the game progresses, the display of the number of wins remaining until the forced end occurs is updated accordingly, but display conditions such as display position, size, and display color are not changed. As a result, when the number of game media awarded to the player after the initial value is set in the end determination counter 98b reaches 18,850, not only the pre-end image G33 but also the pre-end emphasis image G81 is displayed to emphasize that the forced end of the game is approaching and clearly notify the player, and in subsequent games it is possible to continue to notify the player that the forced end of the game is approaching without making it too noticeable using the pre-end image G33.

The pre-end image G33 continues to be displayed even when the demo image G82 is displayed on the image display device 63, as shown in Figure 90 (c). The display of the effect character image G80 ends when the demo image G82 is displayed, and resumes when the display of the demo image G82 ends. The display of the remaining award number image G21, the acquisition number image G22, and the number of games played image G23 ends when the demo image G82 is displayed, and resumes when the display of the demo image G82 ends. However, this is not limited to this, and the display of at least one of the remaining award number image G21, the acquisition number image G22, and the number of games played image G23 may continue even when the demo image G82 is displayed.

The demo image G82 begins to be displayed when the non-play period, which is the period from the end of one game to the start of the next game on the slot machine 10, exceeds the demo start reference period (e.g., one minute). Note that if one or more medals have been bet, the display of the demo image G82 may not begin even if the non-play period exceeds the demo start reference period, or the display of the demo image G82 may begin. Also, in a gaming state other than the normal gaming state ST1, such as the base AT state ST4 or the ending AT state ST5, the display of the demo image G82 may not begin even if the non-play period exceeds the demo start reference period, or the display of the demo image G82 may begin.

The specific content of the demo image G82 is arbitrary, but the slot machine 10 displays a video of a predetermined character image different from the effect character image G80. The display of the demo image G82 ends when a new game is started. When the display of the demo image G82 ends, the image display device 63 resumes the display before the demo image G82 began. As described above, by continuing to display the pre-end image G33 even when the demo image G82 is being displayed, it is possible to continue to notify the player that the forced end of play is approaching, even during non-play periods. Furthermore, the display conditions of the pre-end image G33, such as the display position, size, and display color, do not change even during the period when the demo image G82 is displayed. This eliminates the need to change the processing content for displaying the pre-end image G33 before and after the start of displaying the demo image G82, thereby reducing the processing load.

When the display of the demo image G82 ends, a pre-end emphasis image G81 is displayed as shown in FIG. 90(d), just as when the display of the pre-end image G33 begins. In this case, the display conditions, such as the display position, size, and display color of the pre-end emphasis image G81, are the same as when the pre-end emphasis image G81 is displayed when the display of the pre-end image G33 begins. However, the number of wins remaining until the forced end occurs, displayed in the pre-end emphasis image G81, corresponds to the value of the end determination counter 98b at that time. Furthermore, the content of the remaining number of wins in this pre-end emphasis image G81 is the same as the content of the remaining number of wins in the pre-end image G33. By displaying the pre-end emphasis image G81 when the display of the demo image G82 ends, it is possible to clearly notify a player who has ended the non-play period and started the game that the forced end of play is approaching.

The display of the pre-end emphasis image G81 ends when the game that triggered the end of the display of the demo image G82 ends. On the other hand, the pre-end image G33 continues to be displayed, just as it was when the demo image G82 was displayed, even if the game that triggered the end of the display of the demo image G82 ends. Even in this case, the display conditions of the pre-end image G33, such as the display position, size, and display color, do not change. In this way, by continuing to display the pre-end image G33, it is possible to continue to notify the player that the forced end of the game is approaching, while by ending the display of the pre-end emphasis image G81, it is possible to avoid overemphasizing the notification that the forced end of the game is approaching.

Next, we will explain the processing configuration of the presentation-side MPU 92, which enables the display of the pre-end image G33, pre-end emphasis image G81, and demo image G82 as described above. Figure 91 is a flowchart showing the pre-end notification processing executed by the presentation-side MPU 92. Note that the pre-end notification processing is repeatedly executed at relatively short intervals (e.g., every 2 milliseconds) regardless of the game status.

First, it is determined whether a pre-forced termination notification in which a pre-termination image G33 is being displayed is in progress (step S4601). If a negative determination is made in step S4601, the value of the termination determination counter 98b contained in the rotation reception command B currently received from the main MPU 72 is determined (step S4602). Then, it is determined whether the determined value of the termination determination counter 98b is equal to or greater than "65385," which is the start condition for a pre-forced termination notification (step S4603). If the start condition for a pre-forced termination notification is met (step S4603: YES), a start-time notification setting process is executed (step S4604). This starts the display of a pre-termination highlight image G81 on the image display device 63. Furthermore, a pre-forced termination notification setting process is executed (step S4605). This starts the display of a pre-termination image G33 on the image display device 63.

After that, if a pre-ending notification in which a pre-ending image G31 (see FIG. 53(a)) is displayed is being executed (step S4606: YES), the pre-ending notification is terminated (step S4607). As a result, if the display of a pre-ending image G33 begins while the pre-ending image G31 is being displayed on the image display device 63, the display of the pre-ending image G31 will be terminated. This makes it possible to prioritize the display of the pre-ending image G33 over the display of the pre-ending image G31, making it easier for the player to recognize that a forced termination of the game is approaching.

If the pre-forced termination notification is not being executed (step S4601: NO) and the start condition for the pre-forced termination notification is not met (step S4603: NO), it is determined whether the pre-ending notification is being executed (step S4608). If a negative determination is made in step S4608, it is determined whether the value of the continued games counter 96c included in the rotation acceptance command B currently received from the master MPU 72 is equal to or greater than 3980 (step S4609), and it is determined whether the value of the total winnings counter 96d included in the rotation acceptance command B is equal to or greater than 65421 (step S4610). In other words, it is determined whether the number of games executed since the start of the current second section SC2 has reached 3980, and it is determined whether the total number of gaming media won since the start of the current second section SC2 has reached 2300. If a positive determination is made in either step S4609 or step S4610, the pre-ending notification setting process is executed (step S4611). This causes the display of the pre-ending image G31 to begin on the image display device 63. If the ending conditions are met, processing is executed to display the ending achievement image G32 on the image display device 63 during the result effect setting process (step S1632) in the AT effect control process (FIG. 42).

If a pre-termination notification is being executed (step S4601: YES), pre-termination control processing is executed (step S4612). Figure 92 is a flowchart showing the pre-termination control processing.

First, it is determined whether a forced termination command has been received from the main MPU 72 (step S4701). The forced termination command is transmitted from the main MPU 72 in step S2202 of the termination setting process (FIG. 52) when the value of the termination determination counter 98b exceeds "65535," i.e., when the number of gaming media owned by the player exceeds 19,000 since the supply of operating power to the slot machine 10 was started and the termination determination counter 98b was set to its initial value of "46535." If a forced termination command has been received (step S4701: YES), a forced termination notification setting process is executed (step S4702). This causes the display of the forced termination image G34 to begin on the image display device 63.

If a forced termination command has not been received (step S4701: NO), the value of the termination determination counter 98b included in the rotation reception command B received from the main MPU 72 is determined (step S4703). Then, it is determined whether the determined value of the termination determination counter 98b is equal to or less than "65285," which is the cancellation condition for the forced termination notification (step S4704). This "65285," which corresponds to the cancellation condition for the forced termination notification, is less than "65385," which corresponds to the start condition for the forced termination notification, as previously explained. In other words, a forced termination occurs when the value of the termination determination counter 98b exceeds its maximum value of "65535." However, the value that corresponds to the cancellation condition for the forced termination notification is farther from the value that corresponds to the start condition for the forced termination notification than the value that corresponds to the value that corresponds to the occurrence condition for the forced termination. If the cancellation condition for the forced termination notification is met (step S4704: YES), the process for canceling the forced termination notification is executed (step S4705). This ends the display of the pre-end image G33 on the image display device 63.

If the conditions for canceling the pre-forced termination notification are not met (step S4704: NO), the pre-forced termination notification update process is executed (step S4706). In the pre-forced termination notification update process, the number of wins remaining before the forced termination occurs, displayed in the pre-termination image G33, is varied according to the value of the termination determination counter 98b. In other words, if the value of the termination determination counter 98b increases, the number of wins remaining before the forced termination occurs, displayed in the pre-termination image G33, is decreased accordingly, and if the value of the termination determination counter 98b decreases, the number of wins remaining before the forced termination occurs, displayed in the pre-termination image G33, is increased accordingly.

Then, it is determined whether the demo effect return flag stored in the presentation-side RAM 94 is set to "1" (step S4707). Here, the demo effect control process executed by the presentation-side MPU 92 to control the execution of demo effects will be described with reference to the flowchart in Figure 93. Note that the demo effect control process is repeatedly executed at relatively short intervals (e.g., every 2 milliseconds) regardless of the game status.

If a demo effect is not currently being executed (step S4801: NO), it is determined whether the conditions for starting the demo effect have been met (step S4802). Specifically, it is determined whether a demo start reference period (e.g., one minute) or more has passed since the previous game ended without a new game being started. If the conditions for starting the demo effect have been met (step S4802: YES), the demo effect setting process is executed (step S4803). This ends the display of the effect character image G80, and the image display device 63 begins displaying a demo image G82. Note that the upper lamp 61 and speaker 62 may be configured to execute a light emission effect and a sound effect corresponding to the demo image G82.

Then, processing to hide various notification images is executed (step S4804). In this case, if the base AT state ST4 is selected, the display of the remaining award number image G21, the acquisition number image G22, and the number of games played image G23 on the image display device 63 is terminated, and if the ending AT state ST5 is selected, the display of the acquisition number image G22 and the number of games played image G23 on the image display device 63 is terminated. However, even if the demo image G82 continues to be displayed when the pre-end image G33 is displayed, the display of the pre-end image G33 continues.

If a demo effect is being executed (step S4801: YES), it is determined whether the conditions for ending the demo effect have been met (step S4805). Specifically, it is determined whether a new game has started. If the conditions for ending the demo effect have not been met (step S4805: NO), a process for updating the demo effect is executed (step S4806). The process for updating the demo effect involves executing a process for updating the display content of the demo image G82 over time. Even when the display content of the demo image G82 is updated, the pre-end image G33 continues to be displayed without changing its display content.

If the demo effect termination conditions are met (step S4805: YES), demo effect termination processing is executed (step S4807). This terminates the display of the demo image G82 on the image display device 63, and the display of the effect character image G80 is resumed. Even in this case, the pre-end image G33 continues to be displayed without any changes to its content. Then, processing is executed to resume the display of various notification images (step S4808). In this case, if the base AT state ST4 is reached, the display of the remaining award number image G21, the acquisition number image G22, and the number of games played image G23 on the image display device 63 is resumed. If the ending AT state ST5 is reached, the display of the acquisition number image G22 and the number of games played image G23 on the image display device 63 is resumed. Then, the demo effect return flag provided in the performance-side RAM 94 is set to "1" (step S4809).

Returning to the explanation of the pre-end control process (Figure 92), if the demo effect return flag in the production side RAM 94 is set to "1" (step S4707: YES), the start notification setting process is executed (step S4708). This causes the image display device 63 to begin displaying the pre-end highlight image G81. After that, the demo effect return flag in the production side RAM 94 is cleared to "0" (step S4709).

If a negative judgment is made in step S4707 or if the processing of step S4709 is executed, it is determined whether the end condition for the start notification is met (step S4710). Specifically, it is determined whether the game in which the display of the pre-end emphasis image G81 was started has ended by determining whether a command indicating that the game has ended has been received from the main MPU 72 in a situation where the flag indicating that the display of the pre-end emphasis image G81 is continuing is set to "1". If a positive judgment is made in step S4710, the end processing of the start notification is executed (step S4711). This ends the display of the pre-end emphasis image G81 that was started when the display of the pre-end emphasis image G33 was started, or the display of the pre-end emphasis image G81 that was started when the display of the demo image G82 was started while the display of the pre-end image G33 was continuing.

The present embodiment described above provides the following excellent effects:

When the pre-end image G33 is being displayed on the image display device 63 and the non-play period exceeds the demo start reference period, the demo image G82 begins to be displayed while the pre-end image G33 continues to be displayed. This prevents the display of the pre-end image G33 from being interrupted due to the start of the demo image G82 display. Therefore, it is possible to continue to notify the player that a forced end to play is approaching even after the start of display of the demo image G82.

When the number of game media awarded to the player since the initial value was set in the end determination counter 98b reaches 18,850, the pre-end emphasis image G81 is displayed in addition to the pre-end image G33, thereby emphasizing to the player that the forced end of the game is approaching.

When the conditions for ending the demo presentation are met and the display of various notification images (if in base AT state ST4, the remaining award number image G21, the number of wins image G22, and the number of games played image G23) resumes, the pre-end emphasis image G81 is displayed in addition to the pre-end image G33, thereby emphasizing to the player that the forced end of play is approaching, rather than the content of the notification provided by the various notification images that resume display.

Ninth Embodiment
In this embodiment, the processing configuration of the main MPU 72 differs from that of the first embodiment. The following describes the configuration that differs from the first embodiment. Note that the description of the same configuration as the first embodiment will basically be omitted.

Figure 94 is a flowchart showing normal processing in this embodiment, which is executed by the main MPU 72. Note that of the processing in steps S4901 to S4917 in normal processing, all processing other than the completion monitoring processing called and executed in step S4911 is executed as in-area processing using a program for in-area processing and data for in-area processing, and the completion monitoring processing is executed as out-of-area processing using a program for out-of-area processing and data for out-of-area processing.

First, an interrupt permission process is performed to permit the next timer interrupt (step S4901). Then, a start wait process is executed (step S4902). The process content of the start wait process is the same as step S302 of the normal process (FIG. 15) in the first embodiment described above. Then, on the condition that the start lever 41 is operated when the number of bets required to start the game has been set (steps S4903 and S4904: YES), the main line ML is activated and then an acceptance prohibition process is executed (step S4905). As a result of the acceptance prohibition process being executed, even if a medal is inserted into the medal insertion slot 45, the medal will be ejected into the medal tray 59 without being detected by the inserted medal detection sensor 45a.

Then, in step S4906, information that enables identification of the game status and game zone for the current game is stored in the start status area 96j in the work area 96 for in-area processing in the main RAM 74. In addition, in step S4907, a role selection process is executed to select a role for the current game, in step S4908, a reel control process is executed to control the drive of each of the reels 32L, 32M, and 32R in a manner corresponding to the result of the role selection process for the current game, and in step S4909, a medium awarding process is executed.

In the role lottery process (step S4907) of this embodiment, the first CB role and the second CB role as in the first embodiment are not set, and instead, a BB role is set, as in the fifth embodiment. Specifically, when three coins are bet, the BB role is set as index value IV = 17 in the role lottery table, and the winning probability is 1/200. Note that the BB role is not set in the role lottery table when two coins are bet. If the BB role is won in the role lottery process (step S4907) and the BB winning data is stored in the main RAM 74, and the stopped symbols on the left reel 32L, center reel 32M, and right reel 32R on the main line ML are a "red 7" symbol, a BB win occurs. When a BB win is achieved, the game state transitions to the BB state.

The BB state is a gaming state in which the expected number of gaming media awarded per unit game is higher than in gaming states other than the BB state. Specifically, the winning combination that enables the normal bell win occurs with a higher probability (e.g., approximately 1/1.5) than in other gaming states. If the winning combination is achieved, the normal bell win occurs regardless of the stopping order of the reels 32L, 32M, and 32R and the timing of the stop operation of the stop buttons 42-44 relative to the rotation positions of the reels 32L, 32M, and 32R. Meanwhile, the number of gaming media required to start one game in the BB state is the same as in other gaming states. Therefore, the expected net increase in gaming media per unit game is higher in the BB state than in gaming states other than the BB state. The BB state continues over multiple games and ends when an ending condition is met based on the occurrence of an event corresponding to the game's execution. The termination condition can be any, but in this slot machine 10, the termination condition is set to be that the total number of gaming media awarded since the BB state began is equal to or greater than the BB termination reference number (specifically, "350"). Note that the termination condition may also be established when the number of games played in the BB state reaches the BB termination reference number.

In normal processing (Figure 94), after executing the medium dispensing process in step S4909, the corresponding process at the end of play is executed (step S4910). In the corresponding process at the end of play, processing is executed to enable the setting of the game status and play area corresponding to the result of the current game. After that, the end monitoring process is executed by the CALLI command (step S4911). The processing content of the end monitoring process is the same as step S311 in the normal processing (Figure 15) in the first embodiment described above.

Then, a freeze setting process is executed (step S4912). In the freeze setting process, a process is executed to set a freeze state that prevents the game from progressing based on the player's operations for a predetermined period of time. Details of the freeze setting process will be explained later. In addition, an external output setting process is executed (step S4913) to output the status of the slot machine 10 to the gaming hall's management computer. Details of the external output setting process will be explained later.

Then, a termination setting process is executed to determine whether or not to forcibly terminate the game, and if the conditions for forcibly terminating the game are met, to set up the game to be forcibly terminated (step S4914). In addition, a process for storing the termination status is executed (step S4915), a process for sending a game termination command is executed (step S4916), and an acceptance permission process is executed (step S4917). The processing content of steps S4914 to S4917 is the same as steps S313 to S316 of the normal processing (Figure 15) in the first embodiment described above.

Next, the end-of-game response processing executed in step S4910 of the normal processing (Figure 94) will be described with reference to the flowchart in Figure 95. Note that, because the processing of step S4910 in the normal processing (Figure 94) is executed after the reel control processing (step S4908), the end-of-game response processing is executed after all rotations of reels 32L, 32M, and 32R in one game have stopped. Furthermore, the processing of steps S5001 to S5011 in the end-of-game response processing is executed as intra-area processing using intra-area processing programs and intra-area processing data.

First, a process for clearing various flags is executed (step S5001). In the process for clearing various flags, the non-BB start flag, the BB freeze flag, and the base AT end flag, which are set in the various flag area 96i of the work area 96 for in-area processing in the main RAM 74, are each cleared to "0." The non-BB start flag is a flag that allows the main MPU 72 to determine whether the current game was started in a situation other than the BB state when one game has been executed. The BB freeze flag is a flag that allows the main MPU 72 to determine whether the current game is a game in which the freeze occurrence condition in the BB state has been met when one game has been executed. The base AT end flag is a flag that allows the main MPU 72 to determine whether the current game is the end game of the base AT state ST4 when one game has been executed.

Then, the current game state is determined to be BB state by determining whether the BB flag provided in the various flag area 96i of the work area 96 for in-area processing in the main RAM 74 is set to "1" (step S5002). The BB flag is a flag used by the main MPU 72 to determine whether the current game state is BB state. If the BB flag is not set to "1" and the current game state is not BB state (step S5002: NO), the non-BB start flag in the main RAM 74 is set to "1" (step S5003). The state in which the non-BB start flag is set to "1" is canceled by executing the processing of step S5001 in the game end response processing (Figure 95) executed when the next game ends, clearing the flag to "0."

Then, the process jumps to the processing corresponding to the current gaming state (step S5004). Specifically, if the gaming state is the normal gaming state ST1, normal processing is executed (step S5005), if the gaming state is the base AT state ST4, base AT processing is executed (step S5006), and if the gaming state is the ending AT state ST5, processing of step S5007 is executed. In addition, if normal processing is executed in step S5005, and if base AT processing is executed in step S5006, processing of step S5007 is also executed. The processing content of the normal processing in step S5005 is the same as step S704 of the corresponding processing at the end of gaming in the first embodiment described above (Figure 23). However, in this embodiment, when the AT state start setting process is executed based on the value of the release game number counter 96g becoming "0" during normal processing, in addition to the process of setting the AT difference number counter 96e in the work area 96 for intra-area processing to "200" as the initial award number, the base AT start flag provided in the work area 96 for intra-area processing is set to "1". The base AT start flag is a flag that allows the main MPU 72 to know that the AT state start setting process has been performed. The AT state start setting process is executed in step S908 of the normal processing (FIG. 25) or in step S5207 of the BB control processing (FIG. 97) described below.

Figure 96 is a flowchart showing the base AT processing in step S5006. Note that steps S5101 to S5106 in the base AT processing are executed as in-area processing using the in-area processing program and in-area processing data.

If the value of the AT difference counter 96e in the work area 96 for intra-area processing is "0" (step S5101: YES), this means that the conditions for terminating the base AT state ST4 have been met. In this case, the base AT state flag and second interval flag in the various flag area 96i in the work area 96 for intra-area processing are cleared to "0" (step S5102). This ends the situation in the second interval SC2 and base AT state ST4, and transitions to the situation in the first interval SC1 and normal gaming state ST1. Furthermore, when the second interval SC2 ends, the interval display unit 67 changes from a lit state to an unlit state.

However, this is not limited to this, and the second section SC2 may be maintained without ending even if the base AT state ST4 ends when the value of the AT difference counter 96e becomes "0." In this case, the second section SC2 may end when the value of the AT difference counter 96e becomes "0" and the base AT state ST4 ends when the total number of winnings measured by the total winnings counter 96d in the work area 96 for intra-area processing is a predetermined number or more, such as 2,000 or more, or when the value of the AT difference counter 96e becomes "0" and the base AT state ST4 ends when the number of continued games measured by the continued game number counter 96c in the work area 96 for intra-area processing is a predetermined number or more, such as 1,000 or more.

Then, the base AT end flag in the main RAM 74 is set to "1" (step S5103). By setting the base AT end flag to "1", the main MPU 72 can determine that the base AT state ST4 has ended in the current game and the game has transitioned to the normal game state ST1. The state in which the base AT end flag is set to "1" is canceled when the processing of step S5001 is executed and the flag is cleared to "0" in the game end response processing (Figure 95) that is executed when the next game ends.

If a negative determination is made in step S5101, steps S5104 to S5106 are executed. The processing content of steps S5104 to S5106 is the same as the processing content of steps S1103 to S1105 in the base AT processing (Figure 27) in the first embodiment described above.

Returning to the explanation of the response process at the end of game play (Figure 95), in step S5007, it is determined whether a BB win has been achieved in the current game. If a BB win has been achieved (step S5007: YES), the BB flag in the main RAM 74 is set to "1" (step S5008). This changes the game state to BB. BB start processing is then executed (step S5009). In the BB start processing, the BB counter provided in the work area 96 for in-area processing in the main RAM 74 is set to "350" as the initial value at the start of BB. The BB counter is a counter used to measure the remaining BB end reference number in the main RAM 74.

If a negative judgment is made in step S5007 or if the processing of step S5009 is executed, the game zone control processing is executed (step S5010). If the BB flag in the main RAM 74 is set to "1" and the current game state is BB (step S5002: YES), the BB control processing is executed in step S5011, and then the game zone control processing is executed (step S5010). The processing content of the game zone control processing is the same as step S706 of the response processing at the end of game play in the first embodiment (Figure 23). As already explained in the first embodiment with reference to the flowchart of Figure 28, in the game zone control processing, if the value of the continued game number counter 96c in the work area 96 for intra-area processing becomes "4000" or greater, or the value of the total win number counter 96d exceeds "65521", the initialization processing of the second zone SC2 (step S1208) is executed. In this embodiment, when the initialization process for the second section SC2 (step S1208) is executed, the ending AT end flag provided in the work area 96 for in-area processing is set to "1". The ending AT end flag is a flag that allows the main MPU 72 to know that the ending AT state ST5 has ended.

Figure 97 is a flowchart showing the BB control processing executed in step S5011 of the response processing at the end of game play (Figure 95). Note that steps S5201 to S5210 in the BB control processing are executed as intra-area processing using intra-area processing programs and intra-area processing data.

First, the non-BB start flag in the main RAM 74 is cleared to "0" (step S5201). As already explained, if it is determined in step S5002 of the response processing at the end of game (FIG. 95) that the BB flag in the main RAM 74 is not set to "1," the non-BB start flag is set to "1" in step S5003, which is a processing timing prior to step S5008, which sets the BB flag in the main RAM 74 to "1" when a BB win is achieved. In other words, in a game started in a situation other than the BB state, the non-BB start flag is set to "1" regardless of whether a BB win is achieved in that game. In this case, when the BB control processing (FIG. 97), which is executed in a game started in the BB state, is started, the non-BB start flag in the main RAM 74 is cleared to "0." Therefore, in the freeze setting process (step S4912) and external output setting process (step S4913), which are set as processing timings later than the corresponding process at the end of game play in step S4910 during one processing cycle of normal processing (FIG. 94), if the value of the non-BB start flag is "0", the main MPU 72 can determine that the current game has started in the BB state, and if the value of the non-BB start flag is "1", the main MPU 72 can determine that the current game has started in a game state other than the BB state.

It is then determined whether an AT-related lottery trigger has occurred in the current game (step S5202). If a watermelon or cherry role is won in the lottery process for roles in the current game (step S4907), it is determined that an AT-related lottery trigger has occurred. If an AT-related lottery trigger has occurred (step S5202: YES), the AT-related lottery process is executed (step S5203). In the AT-related lottery process, if a watermelon role is won in the lottery process for roles in the current game (step S4907), there is a 25% chance of a winning result, and if a cherry role is won in the lottery process for roles in the current game (step S4907), there is a 50% chance of a winning result.

If the AT-related lottery results in a winning result (step S5204: YES), the system determines whether the base AT state flag or ending AT state flag in the main RAM 74 is set to "1" to determine whether it has already been determined that the base AT state ST4 or ending AT state ST5 will occur after the BB state ends (step S5205). If it has not yet been determined that the base AT state ST4 or ending AT state ST5 will occur after the BB state ends (step S5205: NO), the system sets the base AT state flag to "1" (step S5206) and executes the AT state start setting process (step S5207). In the AT state start setting process, the AT difference number counter 96e in the main RAM 74 is set to "200" as the initial award number, similar to step S908 in the normal processing (Figure 25) in the first embodiment. In addition, in the AT state start setting process (step S5207), the system sets the base AT start flag in the main RAM 74 to "1." This allows the main MPU 72 to determine that the AT state start setting process (step S908 or step S5207) has been performed.

If it has already been determined that the base AT state ST4 or ending AT state ST5 will occur after the BB state ends (step S5205: YES), an add-on process is executed (step S5208). In the add-on process, "100" is added to the AT difference number counter 96e in the main RAM 74 as the number of added-on awards. This increases the remaining number of awarded gaming media in the base AT state ST4. Note that the add-on process may also be configured to execute a lottery and add the number of added-on awards selected in the lottery to the AT difference number counter 96e.

When step S5207 or step S5208 is executed, the BB freeze flag in the main RAM 74 is set to "1" (step S5209). As a result, when the current game ends, game progress based on player operations will be blocked for the BB freeze period (e.g., 20 seconds).

If a negative judgment is made in step S5202, if a negative judgment is made in step S5204, or if the processing of step S5209 is executed, a BB end determination process is executed (step S5210). The BB end determination process determines whether or not game media have been awarded in the current game. If game media have been awarded, a value corresponding to the number of game media awarded this time is subtracted from the BB counter in the main RAM 74. If the value of the BB counter after the subtraction is "0" or less, the BB flag in the main RAM 74 is cleared to "0" to end the BB state. When the BB state ends, if the base AT state flag is set to "1", the system transitions to the base AT state ST4. If the ending AT state flag is set to "1", the system transitions to the ending AT state ST5. If neither the base AT state flag nor the ending AT state flag is set to "1", the system transitions to the normal game state ST1.

Next, the freeze setting process executed in step S4912 of normal processing (Figure 94) will be described with reference to the flowchart in Figure 98. Note that steps S5301 to S5308 in the freeze setting process are executed as in-region processing using the in-region processing program and in-region processing data.

If the BB flag in the main RAM 74 is not set to "1" (step S5301: NO), it is determined whether the non-BB start flag in the main RAM 74 is set to "0" (step S5302). In the freeze setting process (FIG. 98) executed in the final game in the BB state, the non-BB start flag in the main RAM 74 is cleared to "0" and the BB flag in the main RAM 74 is cleared to "0" in the BB control process (FIG. 97) in step S5011 of the response process (FIG. 95) at the end of play in the current round of normal processing (FIG. 94). In other words, step S5302 determines whether the current game is the final game in the BB state.

If a negative judgment is made in both step S5301 and step S5302, this means that the current game started in a gaming state other than the BB state. In this case, it is determined whether the base AT end flag in the main RAM 74 is set to "1" (step S5303). If the base AT end flag is set to "1" (step S5303: YES), a freeze setting process is executed at the end of the base AT (step S5304). In this freeze setting process, numerical information corresponding to a freeze period of 10 seconds at the end of the base AT state ST4 is set in a freeze counter provided in the work area 96 for in-area processing in the main RAM 74. The value set in the freeze counter is decremented by 1 each time the timer decrement process (step S208) of the timer interrupt process (Figure 14) is executed.

Then, it is determined whether the value of the freeze counter in the main RAM 74 is 1 or greater (step S5305). If the value of the freeze counter is 1 or greater, a negative determination is made in step S5305, and the processing of step S5305 is executed again. This prevents the freeze setting process (Figure 98) from progressing until the value set in the freeze counter in step S5304 becomes "0," and preventing the freeze setting process (Figure 98) from progressing prevents the normal processing (Figure 94). Therefore, it is not possible to start a new game until the freeze period at the end of base AT state ST4 has elapsed, and the progress of the game based on the player's operations is prevented.

If the BB flag in the main RAM 74 is set to "1" (step S5301: YES), it is determined whether a BB win has occurred in the current game by determining whether the non-BB start flag in the main RAM 74 is set to "1" (step S5306). If a BB win has occurred in the current game, the non-BB start flag is set to "1" in step S5003 of the end-of-game response process (FIG. 95), and the BB flag is set to "1" in step S5008, resulting in both the BB flag and the non-BB start flag being set to "1."

If both the BB flag and non-BB start flag in the main RAM 74 are set to "1", i.e., if a BB win has been achieved in this game (steps S5301 and S5306: YES), and the base AT end flag is set to "1" (step S5303: YES), the freeze setting process at the end of the base AT is executed in step S5304, and then the process proceeds to step S5305. As a result, as already explained, it is not possible to start a new game until the freeze period at the end of the base AT state ST4 has elapsed, and game progress based on the player's operations is blocked.

If the BB flag in the main RAM 74 is set to "1" but the non-BB start flag in the main RAM 74 is not set to "1" (step S5301: YES, step S5306: NO), a determination is made as to whether the BB freeze flag in the main RAM 74 is set to "1" (step S5307). If the BB flag in the main RAM 74 is set to "0" and the non-BB start flag in the main RAM 74 is set to "1" (step S5301: NO, step S5302: YES), this means that the current game is the final game in the BB state. Therefore, a determination is made as to whether the BB freeze flag in the main RAM 74 is set to "1" (step S5307). If the BB freeze flag is set to "1" (step S5307: YES), a BB freeze setting process is executed (step S5308). In this freeze setting process, numerical information corresponding to a BB freeze period of 20 seconds is set in the freeze counter in the main RAM 74. The value set in the freeze counter is decremented by 1 each time the timer decrement process (step S208) of the timer interrupt process (Figure 14) is executed.

Then, it is determined whether the value of the freeze counter in the main RAM 74 is 1 or greater (step S5305). If the value of the freeze counter is 1 or greater, a negative determination is made in step S5305, and the processing of step S5305 is executed again. This prevents the freeze setting processing (Figure 98) from progressing until the value set in the freeze counter in step S5308 becomes "0," and preventing the freeze setting processing (Figure 98) from progressing prevents the normal processing (Figure 94). Therefore, it is not possible to start a new game until the BB freeze period has elapsed, and the progress of the game based on the player's operations is prevented.

As described above, if the current game is started in a gaming state other than the BB state, the freeze setting process (FIG. 98) is executed with the non-BB start flag set to "1." Therefore, a negative judgment is made in step S5302 or a positive judgment is made in step S5306, and the processing of steps S5303 to S5305 is executed. As a result, if the current game is started in a gaming state other than the BB state, a freeze can be generated at the end of the base AT state ST4 on the condition that the base AT end flag is set to "1," regardless of whether a BB win has been achieved in the current game. This prevents a situation where a freeze does not occur at the end of the base AT state ST4 due to a BB win being achieved in the current game, even though the current game is started in a gaming state other than the BB state and the base AT state ST4 has ended in the current game.

If the current game is started in the BB state, the freeze setting process (FIG. 98) is executed with the value of the non-BB start flag set to "0," resulting in a positive determination in step S5302 or a negative determination in step S5306, and the processes of steps S5307, S5308, and S5305 are executed. This makes it possible to set a BB freeze period on the condition that the BB freeze flag is set to "1," regardless of whether the BB state has ended in the current game, when the current game is started in the BB state. This prevents a situation in which a BB freeze period is not set at the end of the current game due to the BB state having ended in the current game, even if the current game is started in the BB state and a winning result is obtained in the AT-related lottery process (step S5203) in the current game.

Next, prior to explaining the external output setting process (Fig. 99) executed in step S4913 of the normal process (Fig. 94), we will explain the BB signal and AT signal that are output externally from the main MPU 72 to the gaming hall management computer located outside the slot machine 10.

The slot machine 10 is provided with an external output terminal board (not shown). The external output terminal board is provided with a BB signal output terminal for transmitting a BB signal to the amusement hall's management computer, and an AT signal output terminal for transmitting an AT signal to the amusement hall's management computer. These output terminals are electrically connected to the main MPU 72 and also to the amusement hall's management computer.

The BB signal is raised from LOW to HI when the BB state is initiated in the slot machine 10, and is lowered from HI to LOW when the BB state is terminated. If the AT state start setting process (step S908) is executed in a game started in a gaming state other than the BB state, the AT signal is raised from LOW to HI when the game ends. If the AT state start setting process (step S5207) is executed in a game started in the BB state, the AT signal is raised from LOW to HI when the BB state ends and the game started in a gaming state other than the BB state ends. The AT signal is also lowered from HI to LOW when the base AT state ST4 ends without transitioning to the ending AT state ST5, or when the ending AT state ST5 ends. The LOW to HIGH level relationship may be reversed for the BB signal and the AT signal.

Next, the external output setting process executed in step S4913 of the normal processing (Figure 94) will be described with reference to the flowchart in Figure 99. Note that steps S5401 to S5412 in the external output setting process are executed as in-area processing using the in-area processing program and in-area processing data.

Steps S5401 and S5402 are the same as steps S5301 and S5302 of the freeze setting process (Figure 98) described above. Specifically, if the BB flag in the main RAM 74 is not set to "1" (step S5401: NO), it is determined whether the non-BB start flag in the main RAM 74 is set to "0" (step S5402).

If the current game starts in the BB state and the BB state ends in the current game (step S5401: NO, step S5402: YES), the BB signal is turned OFF (step S5403) and the external output setting process ends. The BB signal OFF process (step S5403) executes processing to switch the BB signal output to the amusement hall's management computer via the external terminal board from HI level to LOW level. This allows the amusement hall's management computer to know that the BB state has ended in the slot machine 10.

If the BB flag in the main RAM 74 is set to "1" (step S5401: YES), similar to step S5306 in the freeze setting process (FIG. 98) described above, it is determined whether a BB win has occurred in the current game by determining whether the non-BB start flag in the main RAM 74 is set to "1" (step S5404). If the current game started in the BB state and the BB state did not end in the current game (step S5401: YES, step S5404: NO), the external output setting process is terminated. This maintains the BB signal at a HI level.

If both the BB flag and non-BB start flag in the main RAM 74 are set to "1," i.e., if the current game starts in a gaming state other than the BB state and a BB win is achieved in the current game (steps S5401 and S5404: YES), the BB signal is turned ON (step S5405). The BB signal ON process involves switching the BB signal output to the amusement hall's management computer via the external terminal board from a LOW level to a HIGH level. This allows the amusement hall's management computer to know that the BB state has started in the slot machine 10.

If the current game is started in a gaming state other than the BB state and a BB win is not achieved in the current game (steps S5401 and S5402: NO), steps S5406 to S5412 are executed. Also, if the current game is started in a gaming state other than the BB state and a BB win is achieved in the current game (steps S5401 and S5404: YES), step S5405 is executed, followed by steps S5406 to S5412. In this way, steps S5406 to S5412 are executed on the condition that the current game is started in a gaming state other than the BB state.

In step S5406, it is determined whether the base AT end flag in the main RAM 74 is set to "1". If the base AT end flag is not set to "1" (step S5406: NO), it is determined whether the ending AT end flag provided in the work area 96 for in-area processing is set to "1" (step S5407). As already explained, the ending AT end flag is set to "1" when the initialization process for the second section SC2 (step S1208) is executed. If the ending AT end flag is set to "1" (step S5407: YES), the ending AT end flag is cleared to "0" (step S5408).

If a positive judgment is made in step S5406, or if the processing of step S5408 is performed, the AT signal OFF processing is executed (step S5409). The AT signal OFF processing executes processing to switch the AT signal output to the gaming hall's management computer via the external terminal board from HI level to LOW level. This allows the gaming hall's management computer to know that the base AT state ST4 or ending AT state ST5 has ended in the slot machine 10.

If neither the base AT end flag nor the ending AT end flag is set to "1" (steps S5406 and S5407: NO), it is determined whether the base AT start flag in the main RAM 74 is set to "1" (step S5410). As already explained, the base AT start flag is set to "1" by executing the AT state start setting process in step S908 of the normal processing (FIG. 25) or step S5207 of the BB control processing (FIG. 97). If the base AT start flag is set to "1" (step S5410: YES), the AT signal ON process is executed (step S5411). In the AT signal ON process, the AT signal output to the gaming hall's management computer via the external terminal board is switched from a LOW level to a HIGH level. This allows the gaming hall's management computer to know that the base AT state ST4 has started in the slot machine 10.

Then, the base AT start flag is cleared to "0" (step S5412). In this way, the base AT start flag is cleared to "0" when the AT signal ON process (step S5411) is executed. This makes it possible to execute the AT signal ON process (step S5411) when the base AT start flag is set to "1".

If a game is started in a gaming state other than the BB state and the AT state start setting process is executed in step S908 of the normal processing (FIG. 25), the AT signal ON process (step S5411) is executed at the end of the game, regardless of whether a BB win is achieved in the game. Also, if a game is started in the BB state and the AT state start setting process is executed in step S5207 of the BB control processing (FIG. 97), the AT signal ON process (step S5411) is executed at the end of the BB state and the game that was started in a gaming state other than the BB state is finished.

As described above, if the current game starts in the BB state and the BB state ends in the current game (step S5401: NO, step S5402: YES), the BB signal OFF processing (step S5403) is executed regardless of whether the base AT state ST4 has started in the current game. This prevents the BB signal OFF processing (step S5403) from not being executed in a game in which the BB state has ended due to a transition to the base AT state ST4.

If the current game is started in a gaming state other than the BB state, the external output setting process (FIG. 99) is executed with the non-BB start flag set to "1." Therefore, a negative determination is made in step S5402 or a positive determination is made in step S5404, and the processes of steps S5406 to S5412 are executed. As a result, if the current game is started in a gaming state other than the BB state, the AT signal OFF process (step S5409) can be executed on the condition that the base AT end flag or the ending AT end flag is set to "1," regardless of whether a BB win has been achieved in the current game. This prevents a situation in which the AT signal OFF process (step S5409) is not executed due to a BB win being achieved in the current game, even though the current game is started in a gaming state other than the BB state and the base AT state ST4 or the ending AT state ST5 has ended in the current game.

Tenth Embodiment
In this embodiment, the game content is different from that of the first embodiment. The following describes the configuration that differs from the first embodiment. Note that the description of the same configuration as the first embodiment will be basically omitted.

In this embodiment, the first CB state ST2 and second CB state ST3 in the first embodiment are not set as the gaming state, and instead the CB state is set. The CB state is the same gaming state as the first CB state ST2 in the first embodiment. In the normal gaming state ST1, CB state, base AT state ST4, and ending AT state ST5 in this embodiment, the game is executed on the condition that the number of bets is "3".

The symbol arrangements on the left reel 32L, center reel 32M, and right reel 32R are as already explained in the first embodiment with reference to Figure 4. Furthermore, the first CB win and second CB win in the first embodiment do not exist; instead, a CB win exists. Similar to when a first CB win occurs in the first embodiment, a CB win occurs when the stopped symbol on the left reel 32L, the stopped symbol on the center reel 32M, and the stopped symbol on the right reel 32R on the main line ML are a "red 7" symbol, a "red 7" symbol, and a "white 7" symbol.

The winning combination lottery table for betting three coins in this embodiment differs from the winning combination lottery table for betting three coins in the first embodiment (Figure 17) in that CB winning data is set at index value IV = 17. As with the first embodiment, the probability of winning at index value IV = 17 is approximately 1/3.3.

Winning data other than CB winning data is erased in the game in which a win occurs, regardless of whether the corresponding win occurs, and is not carried over to games following the winning game. In contrast, CB winning data is stored and retained until a CB win occurs, even in games following the winning game, except when the all-clear process for within the area (step S106) is performed. In this embodiment, if the supply of operating power to the slot machine 10 is started while the setting key is turned ON, the all-clear process for within the area (step S106) is executed in the main process (FIG. 13), regardless of whether the reset button 56 was pressed when the supply of operating power began. After that, the second initialization process for outside the area in step S107, the setting value update process in step S108, and the normal process in step S109 are executed.

Similar to the first embodiment described above, in a game in which CB winning data is carried over, the index value IV corresponding to the CB winning data is excluded from the lottery. Hereinafter, in this specification, the state in which CB winning data is set in the main RAM 74 will be referred to as the "CB internal state," and the state in which CB winning data is not set in the main RAM 74 will be referred to as the "non-CB internal state."

The CB winning data stored in the main RAM 74 is cleared when a CB win occurs or when the all-clear process for the area (step S106) is performed. On the other hand, even if the initialization process for the second section SC2 is performed in step S1208 of the game section control process (Figure 28) based on the ending condition for the second section SC2 being met, the CB winning data stored in the main RAM 74 is not cleared.

When reels 32L, 32M, and 32R are controlled to stop in the normal game state ST1, base AT state ST4, or ending AT state ST5, the number of slips is set to any value between "0" and "4," as in the first embodiment described above. Also, as shown in FIG. 4, the "red 7" symbol for establishing a CB win on the left reel 32L is set as the 15th symbol. Therefore, to establish a CB win, the left stop button 42 must be operated when a win occurs with index value IV for which CB win data is set in a game started in a non-CB internal state, or when a game is started in a CB internal state, and one of the 11th through 15th symbols is located on the main line ML of the left reel 32L. Additionally, by operating the left stop button 42 when any of the symbols 0-10 or 16-20 are on the main line ML of the left reel 32L, the player can prevent the "red 7" symbol from stopping on the main line ML regardless of the number of slips selected, and can also avoid the formation of a CB win.

As shown in Figure 4, the "cherry", "BAR", and "white 7" symbols are set only in the ranges on the left reel 32L that prevent a CB win (the aforementioned ranges of 0-10 and 16-20). Therefore, by operating the left stop button 42 when the "cherry", "BAR", or "white 7" symbol appears on the main line ML of the left reel 32L, the player can prevent the "red 7" symbol from stopping on the main line ML regardless of the number of slips selected.

As shown in FIG. 4, the "red 7" symbol required to achieve a CB win on the center reel 32M is set as the 17th symbol. Therefore, to achieve a CB win, a win occurs with an index value IV for which CB win data is set in a game started in a non-CB internal state, or a game is started in a CB internal state. The center stop button 43 must be operated when any of the 13th through 17th symbols are on the main line ML of the center reel 32M. Furthermore, by operating the center stop button 43 when any of the 0th through 12th or 18th through 20th symbols are on the main line ML of the center reel 32M, the player can prevent the "red 7" symbol from stopping on the main line ML and avoid a CB win, regardless of the number of slips selected.

As shown in Figure 4, the "BAR" and "White 7" symbols are set only in the ranges on the center reel 32M that prevent a CB win (the aforementioned ranges of 0-12 and 18-20). Therefore, by operating the center stop button 43 when the "BAR" or "White 7" symbol appears on the main line ML of the center reel 32M, the player can prevent the "Red 7" symbol from stopping on the main line ML, regardless of the number of slips selected.

As shown in FIG. 4, the "white 7" symbol required to achieve a CB win is provided as the third and fifteenth symbols on the right reel 32R. Therefore, to achieve a CB win, a win occurs with an index value IV for which CB win data is set in a game started in a non-CB internal state, or a game is started in a CB internal state. The right stop button 44 must be operated when any of the symbols 0-3, 11-15, or 20 is located on the main line ML of the right reel 32R. Furthermore, by operating the right stop button 44 when any of the symbols 4-10 or 16-19 is located on the main line ML of the right reel 32R, the player can prevent the "white 7" symbol from stopping on the main line ML and avoid a CB win, regardless of the number of slips selected.

As shown in Figure 4, the "Red 7" and "BAR" symbols are set only in the ranges on the right reel 32R that prevent a CB win (the aforementioned ranges of 4th to 10th and 16th to 19th symbols). Therefore, by operating the right stop button 44 when the "Red 7" or "BAR" symbol appears on the main line ML of the right reel 32R, the player can prevent the "White 7" symbol from stopping on the main line ML, regardless of the number of slips selected.

Similar to the first embodiment described above, if the index value IV = 1 to 9 is selected in the role lottery process (Figure 100) for a game started in the second section SC2 and in the base AT state ST4 or ending AT state ST5, a stop order notification will be issued to achieve a first bell win or a second bell win. When a stop order notification is issued, the player can achieve a first bell win or a second bell win and avoid a CB win by operating the stop buttons 42 to 44 in the order notified in the stop order notification.

Next, the role selection process executed in step S307 of the normal process (Figure 15) will be explained with reference to the flowchart in Figure 100. Note that steps S5501 to S5513 in the role selection process are executed as intra-area processing using intra-area processing programs and intra-area processing data.

First, it is determined whether or not the internal state of the CB is determined by determining whether or not CB winning data is stored in the work area 96 for in-area processing (step S5501). If the index value IV (specifically, "17") for which the CB winning data is set is won in the role lottery process (Figure 100), the CB winning data is stored in the work area 96 for in-area processing in the winning data acquisition process (step S5510).

If the game is in the CB internal state (step S5501: YES), the CB internal start flag provided in the work area 96 for in-area processing is set to "1" (step S5502). The CB internal start flag is a flag that allows the main MPU 72 to determine whether the current game was started in the CB internal state when one game has been played. The CB internal start flag is cleared to "0" after the game end command transmission process (step S315) is executed in normal processing (FIG. 15) and before the acceptance permission process (step S316) is started. By setting the CB internal start flag to "1" in step S5502, the main MPU 72 can determine that the current game was started in the CB internal state.

If a negative determination is made in step S5501, or if the processing of step S5502 is performed, steps S5503 to S5513 execute the same processing as steps S401 to S411 of the winning combination lottery processing (Figure 16) in the first embodiment described above. Specifically, a random number to be used when determining whether the winning combination is a winning combination is obtained (step S5503), and a lottery table for determining whether the winning combination is a winning combination is read from the main ROM 73 (step S5504). In step S5504, a lottery table corresponding to the combination of the current setting value and the current game state is selected. The processing content of steps S5505 to S5510 is as already described in the first embodiment described above.

If a negative judgment is made in step S5509, or if the processing of step S5510 is performed, i.e., if the winning/losing judgment of the winning combination has been completed, a first stop information setting process is performed to set stop information for reel stop control (step S5511). The processing content of the first stop information setting process is the same as that of step S409 in the winning combination lottery process (FIG. 16) in the first embodiment described above. Then, the game start processing described below is executed (step S5512). Then, similar to step S411 in the winning combination lottery process (FIG. 16) in the first embodiment described above, processing is executed to send rotation acceptance commands A and B to cause the production side MPU 92 to recognize that one game has started (step S5513).

Next, the game start processing executed in step S5512 of the role lottery processing (Figure 100) will be explained with reference to the flowchart in Figure 101. Note that the processing of steps S5601 to S5613 in the game start processing is executed as intra-area processing using intra-area processing programs and intra-area processing data.

First, it is determined whether the current zone is the first zone SC1 (step S5601). In step S5601, a positive judgment is made if the second zone flag in the various flags area 96i in the work area 96 for intra-zone processing is not set to "1." If the current zone is SC1 (step S5601: YES), the second zone transition process is executed (step S5603) on the condition that one of the index values IV is won in the lottery process for the current game (Figure 100) (step S5602: YES). In the second zone transition process, the second zone flag in the various flags area 96i is set to "1," thereby transitioning the play zone from the first zone SC1 to the second zone SC2. Furthermore, the continued game number counter 96c in the work area 96 for intra-zone processing is cleared to "0," and the total win number counter 96d is set to "63121" as its initial value. Furthermore, in the second section transition process (step S5603), the release game number counter 96g in the work area 96 for in-region processing in the main RAM 74 is set to "1000" as the ceiling game number. Each time a game is played in the second section SC2 and normal gaming state ST1, the value of the release game number counter 96g is decremented by 1, and when the value of the release game number counter 96g after the decrement becomes "0," processing is executed to transition to the base AT state ST4. Note that if a game is played in the CB state, the value of the release game number counter 96g is not decremented. Furthermore, in the second section transition process (step S5603), the section display unit 67 is switched from an off state to an on state.

After executing the second zone transition process in step S5603, if the CB internal start flag in the main RAM 74 is set to "1" (step S5604: YES), the CZ state flag in the various flags area 96i in the work area 96 for intra-area processing is set to "1," and the CZ state counter 96h in the work area 96 for intra-area processing is set to "3" (step S5605). Setting the CZ state flag to "1" in step S5605 initiates the CZ state. Furthermore, setting the CZ state counter 96h to "3" indicates that there are three games remaining until the CZ state ends. As already explained in the first embodiment above, when a game is started in the CZ state, the expected value of winning a transition to the base AT state ST4 in the AT lottery process in step S803 of the normal start process (FIG. 24) is higher than when the game is started in a state other than the CZ state.

In this way, when a game transitions from the first section SC1 to the second section SC2, the CZ state begins, provided that the game was started in a CB internal state. If the game was started in a non-CB internal state, the CZ state does not begin even if a transition to the second section SC2 occurs. This makes it possible to create a state (specifically, a CZ state) that is more advantageous to the player when a transition to the second section SC2 occurs in a game started in a CB internal state, compared to when a transition to the second section SC2 occurs in a game started in a non-CB internal state.

When the all-clear process for the area is executed in step S106 of the main processing (Figure 13), the system enters a non-CB internal state in which no CB winning data is stored in the main RAM 74, and the system enters the first section SC1. Furthermore, in the game start processing (Figure 101), if a win occurs with any index value IV in a game started in the first section SC1, a transition to the second section SC2 occurs. Therefore, after the all-clear process for the area (step S106) is executed, the game that first transitions to the second section SC2 is a game that starts in the non-CB internal state. As described above, in a game in which a transition to the second section SC2 occurs, the game transitions to the CZ state, provided that the game was started in the CB internal state. Since the game in which a transition to the second section SC2 first occurs after the all-clear process for the area (step S106) is executed is a game that started in the non-CB internal state, a transition to the CZ state does not occur in that game.

As already explained, when the CB winning data is not stored in the main RAM 74 and the role lottery process (Figure 100) is performed by referring to the role lottery table for three bets, the probability of winning the index value IV (specifically, "17") for which the CB winning data is set is approximately 1/3.3. Also, as already explained, this is a game content in which the game progresses while avoiding the establishment of a CB win. Therefore, it is considered that the CB internal state is reached by the time the ending condition of the second section SC2 is established, and the game is played while avoiding the establishment of a CB win in this CB internal state, thereby establishing the ending condition of the second section SC2. In this way, the ending condition of the second section SC2 is basically established in the CB internal state, and the initialization process of the second section SC2 (step S1208) is executed. Furthermore, even when the initialization process of the second section SC2 (step S1208) is executed, the CB winning data stored in the main RAM 74 is not cleared. Therefore, when the initialization process for the second section SC2 is performed, the state becomes the first section SC1 and the CB internal state. Then, if a win occurs with any index value IV in a game played in this state, a transition to the second section SC2 and a transition to the CZ state occurs.

In this way, when the transition to the second section SC2 occurs for the first time after the ending conditions for the second section SC2 are met and the initialization process for the second section SC2 (step S1208) is executed, the internal state is basically CB at the start of the game in which the transition to the second section SC2 occurs, so the game transitions to the CZ state when the transition to the second section SC2 occurs.

If a negative judgment is made in step S5601, i.e., if the second interval flag in the various flag area 96i is set to "1" and the game is in the second interval SC2, the value of the continued game counter 96c is incremented by 1 (step S5606). Thereafter, if the current game state is the CB state (step S5607: YES), the game start processing is terminated without executing the processing from step S5608 onwards. On the other hand, if the current game state is not the CB state (step S5607: NO), the processing from step S5608 onwards is executed. Specifically, if the current game state is the normal game state ST1 (step S5608: YES), normal start processing is executed (step S5609), similar to step S509 of the game start processing (FIG. 21) in the first embodiment. The content of the normal start processing (step S5609) has already been described in the first embodiment.

If the game is not in the normal gaming state ST1 (step S5608: NO), that is, if the current gaming state is in the base AT state ST4 or the ending AT state ST5, the stop order data setting process is executed (step S5611) on the condition that the lottery process for the current game (FIG. 100) has resulted in a winning combination with an index value IV of 1 to 9 (step S5610: YES). In the stop order data setting process, if the lottery process for the current game (FIG. 100) has resulted in a winning combination with an index value IV of 1 to 6, the dual-purpose display unit 66 displays a display corresponding to the stop order of reels 32L, 32M, and 32R that will result in the first bell winning. Furthermore, if the lottery process for the current game (FIG. 100) has resulted in an index value IV of 7 to 9, the dual-purpose display unit 66 displays a display corresponding to the stop order of reels 32L, 32M, and 32R that will result in the second bell winning.

If a negative judgment is made in step S5610, or if the processing of step S5611 is executed, it is determined whether the current game state is the base AT state ST4 (step S5612). If the current game state is the ending AT state ST5 (step S5612: NO), the game start processing is terminated. Also, if the current game state is the base AT state ST4 (step S5612: YES), the game start processing is terminated after the base AT start processing (step S5613) is executed, similar to step S513 of the game start processing (Figure 21) in the first embodiment described above.

As described above, because the CB internal start flag is set in the main RAM 74, if the current game is started in a non-CB internal state, a win occurs with the index value IV (specifically, "17") for which the CB winning data is set in the lottery process for the current game (Figure 100), and even if the game start process (Figure 101) is executed with the CB winning data stored in the main RAM 74, the main MPU 72 can identify in the game start process (Figure 101) that the current game has started in a non-CB internal state.

By configuring the process to execute the process to start the CZ state (processing of step S5605) on the condition that the CB internal start flag in the main RAM 74 is set to "1", if the current game is started in a non-CB internal state, the index value IV (specifically "17") to which the CB winning data is set in the role lottery process for the current game (Figure 100) will be a winning combination, and even if the game start process (Figure 101) is executed with the CB winning data stored in the main RAM 74, the process to start the CZ state (processing of step S5605) will not be executed. This prevents the process for initiating the CZ state (step S5605) from being executed in a game in which the first transition to the second section SC2 occurs after the execution of the all-clear process for the area (step S106). This occurs when the index value IV (specifically, "17") for which the CB winning data is set in the role lottery process (FIG. 100) is won, and the game start process (FIG. 101) is executed with the CB winning data stored in the main RAM 74. Furthermore, assuming that a game is played while avoiding the establishment of a CB win, the CZ state can be prevented from being initiated when the all-clear process for the area (step S106) is executed to transition to the first section SC1 and then the transition to the second section SC2 occurs. However, the CZ state can be initiated when the initialization process for the second section SC2 (step S1208) is executed to transition to the first section SC1 and then the transition to the second section SC2 occurs.

Eleventh Embodiment
In this embodiment, the configuration of the slot machine 10 is different from that of the first embodiment. The following describes the configuration that differs from that of the first embodiment. Note that the description of the configuration that is the same as that of the first embodiment will basically be omitted.

Figure 102 is a front view of a slot machine 10 and a card unit 130 installed alongside the slot machine 10 in this embodiment, and Figure 103 is a perspective view of the slot machine 10 with the front door 12 open. As with the first embodiment, the front door 12 is supported by the housing 11 so that the interior space of the housing 11 can be opened and closed using an axle 15 provided on the left side of the housing 11 as a pivot axis. The front door 12 is locked so that it cannot be opened by a locking device 13 provided on the back side.

The front door 12 is unlocked by performing an unlocking operation on the key cylinder 14. Furthermore, as will be described in detail below, when a specific error (such as a "unit connection abnormality" error or a "play value full" error) occurs, the specific error can be cleared by performing an error clearing operation on the key cylinder 14. The key cylinder 14 unlocking operation involves inserting a specific key into the key cylinder 14 and rotating the specific key clockwise to a specific angle (e.g., 90 degrees) as viewed from the front in FIG. 102. The key cylinder 14 error clearing operation involves inserting a specific key into the key cylinder 14 and rotating the specific key counterclockwise to a specific angle (e.g., 90 degrees) as viewed from the front in FIG. 102. This configuration in which an error clearing operation is performed on the key cylinder 14 simplifies the configuration of the slot machine 10 compared to configurations in which an operation unit, such as a button, that is operated to clear a specific error (such as a "unit connection abnormality" or "play value full") is provided as a separate operation unit from the key cylinder 14.

Similar to the first embodiment described above, a power supply unit 54 is provided inside the cabinet 11 on the lower left side of the partition plate 11a, and the power supply unit 54 is provided with a power switch 55, a reset button 56, and a setting key insertion hole 57 (see Figure 103). Also, as shown in Figure 103, a value number control device 140 is attached to the left side plate 11c inside the cabinet 11, which stores the number of game values owned by the player (hereinafter referred to as "owned game value number" in this specification). The maximum number of owned game value numbers that can be stored in the value number control device 140 is set to "16383", and if the number of owned game value numbers exceeds this maximum, an error "owned game value number full", described below, will occur.

In this embodiment, betting of game value is performed by decreasing the number of owned game values stored in the value number control device 140, instead of inserting game media (in the first embodiment, inserting game media into the medal insertion slot 45). Furthermore, granting of game value is performed by increasing the number of owned game values stored in the value number control device 140, instead of paying out game media (in the first embodiment, paying out game media into the medal tray 59). Details of the value number control device 140 will be described later.

As shown in FIG. 102, below the display windows 21L, 21M, and 21R on the gaming panel 20, there are provided a gaming value number display unit 123, an error code display unit 124, and an acquisition count display unit 125. In addition, a section display unit 67 is provided in the corner of the display area of the acquisition count display unit 125. As in the first embodiment, the section display unit 67 displays information to indicate that the gaming section is the second section SC2 of the first section SC1 and the second section SC2.

The game value number display unit 123 is provided with five 7-segment displays, and displays the number of owned game values stored in the value number control device 140. The player can ascertain the number of owned game values based on the display on the game value number display unit 123. In addition, the error code display unit 124 is provided with two 7-segment displays, and displays an error code corresponding to an error that has occurred in the slot machine 10. The error code is a combination of two characters (for example, "Ey").

The acquisition count display unit 125 is provided with two 7-segment displays. When game value is awarded, the acquisition count display unit 125 displays the number of game value to be awarded (awarded value number display). When a stop order notification is issued to notify the stop order of reels 32L, 32M, and 32R, information corresponding to that stop order (stop order code) is displayed. The game value numbers awarded upon the establishment of a minor winning combination are set to "1," "4," "5," and "15," and the awarded value number display displays the numerical values corresponding to these game value numbers. The stop order code is displayed on one of the two 7-segment displays in the acquisition count display unit 125 (specifically, the 7-segment display on the right side as viewed from the front in Figure 102). The display content of the stop order code is the same as the display content of the information corresponding to the stop order already described with reference to Figure 7(b) in the first embodiment above. Additionally, instead of the gaming value number display unit 123, error code display unit 124, and acquisition number display unit 125 being configured with 7-segment displays, these display units 123-125 may be configured with LCD displays or the like.

As in the tenth embodiment, the game states are the normal game state ST1, the CB state, the base AT state ST4, and the ending AT state ST5. In each game state, the game can be started by setting the number of game value bets to "3." As shown in FIG. 102, a game value insertion button 126 is provided on the lower left side of the display windows 21L, 21M, and 21R, which is operated to increase the number of game value bets by "3" at once. When the game value insertion button 126 is operated in a situation where the number of owned game values stored in the value number control device 140 is three or more, the number of owned game values is subtracted by three, and the number of game value bets becomes "3." Furthermore, when the game value insertion button 126 is operated in a situation where the number of owned game values is "2," the number of owned game values is subtracted by two, becoming "0," and the number of game value bets becomes "2." Furthermore, if the game value insertion button 126 is operated when the number of owned game values is "1," the number of owned game values is decremented by one to "0," and the number of game values bet becomes "1." Note that in addition to the game value insertion button 126, an insertion button that is operated to increase the number of game values bet by one, or an insertion button that is operated to increase the number of game values bet by two, may also be provided.

As shown in Figure 102, a count button 127 is provided on the lower right side of the display windows 21L, 21M, and 21R. The count button 127 is a button that is operated to transmit some or all of the owned gaming value number stored in the value number control device 140 to the card unit 130. Details of the configuration for transmitting the owned gaming value number to the card unit 130 will be described later.

As in the first embodiment, a settlement button 51 is provided to the left of the start lever 41. The settlement button 51 is operated to return the betted game value to the value number control device 140 as the owned game value number. If the settlement button 51 is operated when the number of game value bets is 1 or more, the information on the number of game value bets is cleared to "0" provided that no game is being executed, and the betted game value number is added to the owned game value number stored in the value number control device 140.

As described above, a value number control device 140 is provided inside the housing 11. The value number control device 140 performs control for managing the owned gaming value number, control for displaying the owned gaming value number, and control for communicating with the card unit 130. The value number control device 140 includes a value number control board 141 (see FIG. 104) described below, and a value number side case body 145 made of transparent resin that houses the value number control board 141. The value number control board 141 is provided with a value number display 146 (see FIG. 104). The value number display 146 has five 7-segment displays, and the value number display 146 displays the owned gaming value number stored in the value number control device 140. The value number display 146 is positioned so that it can be seen from the outside through the transparent value number side case body 145 when the front door 12 is open.

As described above, the game value number display unit 123 and the value number display 146 display the owned game value stored in the value number control device 140. The display content of the game value number display unit 123 is visible from the outside regardless of whether the front door 12 is open or not. On the other hand, the display content of the value number display 146 is not visible from the outside when the front door 12 is closed, but becomes visible when the front door 12 is opened. Players can check the number of owned game values based on the display of the game value number display unit 123. Furthermore, the amusement hall manager can check the number of owned game values based on the display of the game value number display unit 123 when the front door 12 is closed, and can check the number of owned game values based on the display of the value number display 146 when the front door 12 is open.

The value number side case body 145 is provided with a value number clear button 147 that is operated to clear the information on the owned gaming value number stored in the value number control device 140 to "0," and a RAM clear button 148 that is operated to perform initialization processing of the RAM clear target area 144c (described below) in the value number control device 140 (step S5909 of the value number side main processing (Figure 110 (b))).

A roughly rectangular parallelepiped card unit 130 is installed next to the side (specifically, the left side) of the slot machine 10 configured as described above. Banknotes are inserted into the card unit 130, and a card-shaped storage medium M is also inserted. The card unit 130 reads and rewrites the balance information recorded on the storage medium M. The card unit 130 also lends out gaming value based on the balance information stored on the storage medium M. Furthermore, when some or all of the owned gaming value number stored in the value number control device 140 of the slot machine 10 is transmitted to the card unit 130, the card unit 130 stores the gaming value number received from the value number control device 140 in the storage medium M as the "counted gaming value number."

A bill insertion slot 131 for inserting bills is provided at approximately the center in the vertical direction on the front of the card unit 130, and a card insertion slot 132 for inserting a storage medium M is provided below the bill insertion slot 131. Also provided below the card insertion slot 132 are a game value lending button 133 that is operated to lend game value, and a card return button 134 that is operated to eject the storage medium M from the card insertion slot 132. When a bill is inserted into the bill insertion slot 131, the card unit 130 writes balance information corresponding to the amount of the inserted bill to the storage medium M.

Lending of game value is possible when the slot machine 10 and card unit 130 are in a state where game value can be loaned. Here, a state where game value can be loaned in the slot machine 10 is one where the following conditions are met: no game is being executed in the slot machine 10; the number of game value bets has not reached the number of bets required to start a game (specifically, the number of game value bets is between "0" and "2"); and the number of owned game value stored in the value number control device 140 does not exceed its maximum value (specifically, "16,383") due to the current loan of game value. When these three conditions are met, operating the game value loan button 133 executes the loan of game value. Furthermore, a state where game value can be loaned in the card unit 130 is one where an amount equal to or greater than the amount corresponding to the number of game value to be loaned is stored as balance information in the storage medium M.

When game values are loaned, the number of owned game values stored in the value number control device 140 increases by adding the number of game values to be loaned to the number of game values owned before the loan, and the balance information stored in the storage medium M is updated by subtracting the amount corresponding to the number of game values to be loaned from the balance information.

A unit-side display unit 135 is provided on the upper front surface of the card unit 130. When storage medium M is not inserted into card insertion slot 132, unit-side display unit 135 displays a message informing the user whether storage medium M can be inserted into card insertion slot 132, and when storage medium M is inserted into card insertion slot 132, it displays a message informing the user that game value can be loaned by operating game value loan button 133.

A points display 136 and a counted gaming value display 137 are provided on the front of the card unit 130, located between the unit-side display section 135 and the bill insertion slot 131. The points display 136 is composed of three 7-segment LEDs that display the balance information of the storage medium M read by the card unit 130. The points display 136 displays, for example, the hundreds digit and above of the balance information stored on the storage medium M inserted into the card insertion slot 132.

The counted game value display 137 displays the counted game value number stored in the storage medium M. As already explained, the counted game value number is a part or all of the owned game value number stored in the value number control device 140 that is transmitted from the slot machine 10 to the card unit 130 and stored in the storage medium M based on the operation of the count button 127. The counted game value display 137 is provided with five 7-segment displays that display the counted game value number.

Next, the electrical configuration of the slot machine 10 will be described based on the block diagram in Figure 104. As already explained in the first embodiment above, the main control board 71 of the main control device 70 is equipped with a main MPU 72, which is equipped with a main ROM 73, a main RAM 74, a random number circuit 75, and a clock circuit. In addition, the main MPU 72 also has an interrupt circuit, a data input/output circuit, etc. built in.

Similar to the first embodiment described above, various sensors are connected to the input side of the main MPU 72, including a start detection sensor 41a that detects operation of the reel unit 31 and start lever 41, stop detection sensors 42a, 43a, and 44a that individually detect operation of each stop button 42, 43, and 44, a settlement detection sensor 51a that detects operation of the settlement button 51, a reset detection sensor that detects operation of the reset button 56 provided on the power supply unit 54, and a setting key detection sensor that detects insertion of a setting key into the setting key insertion hole 57. Also, as shown in FIG. 104, a door open detection sensor 12a that detects the open state of the front door 12, an error reset sensor 14a that detects an error reset operation for the key cylinder 14, and a gaming value insertion detection sensor 126a that detects operation of the gaming value insertion button 126 are connected to the input side of the main MPU 72. Signals from each of these sensors connected to the input side of the main MPU 72 are input to the main MPU 72.

As in the first embodiment, the reel unit 31, the section display unit 67, the presentation control device 90, and the like are connected to the output side of the main MPU 72. Also, as shown in FIG. 104, the error code display unit 124 and the acquired number display unit 125 are connected to the output side of the main MPU 72. When an error (such as "award limit reached," "unit connection error," "owned gaming value full," "awarding error," or "betting error," which will be described later) occurs, the main MPU 72 controls the display of the error code display unit 124 so that an error code corresponding to the error is displayed. Furthermore, when gaming value is awarded, the main MPU 72 controls the display of the acquired number display unit 125 so that the number of gaming value to be awarded is displayed. Furthermore, when a stop order notification is made to notify the stop order of the reels 32L, 32M, and 32R, the main MPU 72 controls the display of the acquired number display unit 125 so that a stop order code corresponding to the stop order is displayed.

The main MPU 72 sends commands to the effect control device 90 at each timing of each game, and when sending a command to the effect control device 90 to cause the image display device 63 to notify the stop order of reels 32L, 32M, and 32R, it controls the display of the winning number display unit 125 so that the display corresponds to the content to be notified. In this case, direct display control of the image display device 63 is performed by the effect control device 90, while direct display control of the winning number display unit 125 is performed by the main MPU 72. In other words, direct display control is performed by the effect control device 90 for the image display device 63, which is subject to relatively complex display control, and direct display control is performed by the main MPU 72 for the winning number display unit 125, which is subject to relatively simple display control. This makes it possible to perform both displays that emphasize attention to the effects and displays that emphasize reliability, while reducing the processing load on the main MPU 72.

As in the first embodiment, the performance control device 90 is equipped with a performance control board 91, which is equipped with a performance-side MPU 92. The performance-side MPU 92 also has a performance-side ROM 93 and a performance-side RAM 94 built in, as well as a clock circuit that outputs a rectangular wave of a predetermined frequency, an interrupt circuit, a data input/output circuit, and a random number generation circuit built in. As in the first embodiment, the output side of the performance-side MPU 92 is connected to the upper lamp 61, speaker 62, and image display device 63. Based on commands received from the main MPU 72, the performance-side MPU 92 controls the illumination of the upper lamp 61, the sound output of the speaker 62, and the display of the image display device 63, thereby enabling various notifications and performances to be performed.

As shown in FIG. 104, a value number control device 140 is connected to the input and output sides of the main MPU 72. The value number control device 140 is provided with a value number control board 141 and a connection terminal board 128. The connection terminal board 128 is a relay board for connecting the value number control board 141 and the card unit 130. The value number control board 141 is equipped with a value number side MPU 142 that controls the management of owned gaming value numbers, the display of owned gaming value numbers, and communication with the card unit 130.

The value number side MPU 142 incorporates a value number side ROM 143 which stores various control programs and fixed value data executed by the value number side MPU 142, and a value number side RAM 144 which is a memory for temporarily storing various data when the control programs stored in the value number side ROM 143 are executed, as well as a clock circuit which outputs a rectangular wave of a predetermined frequency and an interrupt circuit. Note that it is not essential that the value number side ROM 143 and value number side RAM 144 be integrated into a single chip for the value number side MPU 142; they may each be integrated into a separate chip.

Backup power is supplied to the value number RAM 144 even after power to the slot machine 10 is shut off. As a result, the information stored in the value number RAM 144 (including information on the number of owned gaming values) is retained as long as backup power is supplied, even after power to the slot machine 10 is shut off.

The value number side MPU 142 is provided with an input port and an output port. As shown in FIG. 104, the main side MPU 72 is connected to the input and output sides of the value number side MPU 142, and the value number side MPU 142 can receive information from the main side MPU 72 and transmit information to the main side MPU 72. In addition, the card unit 130 is connected to the input and output sides of the value number side MPU 142. The card unit 130 is equipped with a unit side board (not shown), and the unit side board is equipped with a unit side MPU (not shown) that controls the card unit 130. The value number control board 141 is connected to the unit side board via the connection terminal board 128. The value number side MPU 142 can receive information from the unit side MPU and transmit information to the unit side MPU.

The output side of the value number side MPU 142 is connected to the game value number display unit 123 and to a value number display 146 provided on the value number control board 141. The value number side MPU 142 controls the game value number display unit 123 and the value number display 146 to display the owned game value number stored in the owned number counter.

Connected to the input side of the value number side MPU 142 are a value number clear detection sensor 147a that detects operation of the value number clear button 147, a RAM clear detection sensor 148a that detects operation of the RAM clear button 148, and a count detection sensor 127a that detects operation of the count button 127. When the power switch 55 (see FIG. 103) provided on the power supply device 54 is turned ON while the value number clear button 147 is being operated, the value number side MPU 142 clears to "0" the information on the owned game value number stored in the value number control device 140, and sets the owned game value number to "0." Furthermore, when the power switch 55 is turned ON while the RAM clear button 148 is being operated, the value number side MPU 142 clears to "0" the information on the target area in the value number side RAM 144 (RAM clear target area 144c, described below) and initializes the target area.

When the count button 127 is operated while the number of owned game values stored in the value number control device 140 is 1 or greater, the value number side MPU 142 transmits to the card unit 130 a number of game values corresponding to the duration of the operation. Specifically, if the operation period of the count button 127 is less than 500 milliseconds, a game value of "1" is transmitted to the card unit 130, and if the operation period is 500 milliseconds or greater, a game value of "50" is transmitted to the card unit 130. Furthermore, if the operation of the count button 127 continues for 1 second or longer, the process of transmitting a game value of "50" to the card unit 130 is repeatedly executed over the period until the operation of the count button 127 is terminated. The operation period of the count button 127 required to transmit the number of owned game values to the card unit 130 becomes longer the greater the number of owned game values. This allows the player to realize how many gaming points they have earned based on the period of operation of the counting button 127, even in a configuration where gaming points are managed electromagnetically.

As already explained, when some or all of the owned game value numbers stored in the value number control device 140 are transmitted to the card unit 130, the transmitted game value numbers are stored as counted game value numbers in the storage medium M inserted into the card unit 130. When the card unit 130 stores counted game value numbers in the storage medium M, it also stores identification information for the loan amount (rate) per card set in the card unit 130. This makes it possible to store owned game value numbers for each rate when game value is lent at different rates within an amusement hall. If counted game value numbers at the same rate are already stored in the storage medium M, the newly received owned game value number is added to the already recorded counted game value number.

Next, we will explain the configuration for checking the connection status between the value side MPU 142 and the card unit 130 using the main side MPU 72.

The connection terminal board 128 is provided with a connection confirmation circuit (not shown). The connection confirmation circuit outputs a first connection confirmation signal to the value number control board 141, and also outputs a second connection confirmation signal to the card unit 130. In addition, a connection confirmation voltage (specifically, a 5V DC voltage) is input to the connection confirmation circuit from the card unit 130. When the connection confirmation voltage is not input to the connection confirmation circuit from the card unit 130, the first connection confirmation signal and the second connection confirmation signal are at a HI level; when the connection confirmation voltage is input to the connection confirmation circuit from the card unit 130, these connection confirmation signals become a LOW level.

After the supply of operating power to the card unit 130 begins, the card unit 130, upon becoming ready to begin communication with the slot machine 10, begins outputting the above-mentioned connection confirmation voltage to the connection confirmation circuit provided on the connection terminal board 128. This causes the first connection confirmation signal and the second connection confirmation signal to fall from HI level to LOW level. If a state occurs in which the card unit 130 is not outputting the connection confirmation voltage, the first connection confirmation signal and the second connection confirmation signal rise from LOW level to HI level.

By determining that the first connection confirmation signal input to the value number side MPU 142 is at a LOW level, the value number side MPU 142 can determine that the value number side MPU 142 is properly connected to the card unit 130 and that the card unit 130 is in a state where it can communicate with the slot machine 10. Furthermore, by determining that the second connection confirmation signal received from the connection terminal board 128 is at a LOW level, the card unit 130 can determine that the card unit 130 is properly connected to the connection terminal board 128.

A connection confirmation signal output from the value number side MPU 142 is input to the input side of the main MPU 72. When the first connection confirmation signal input to the value number side MPU 142 rises from a low level to a high level, the value number side MPU 142 raises the connection confirmation signal output to the main MPU 72 from a low level to a high level, and when the first connection confirmation signal input to the value number side MPU 142 falls from a high level to a low level, the connection confirmation signal output to the main MPU 72 falls from a high level to a low level. By determining that the connection confirmation signal input to the main MPU 72 is a low level, the main MPU 72 can determine that the value number side MPU 142 is normally connected to the card unit 130 and that the card unit 130 is capable of communicating with the slot machine 10.

Next, we will explain the content of the communication that takes place between the master MPU 72 and the value number MPU 142. The data that the master MPU 72 sends to the value number MPU 142 includes a bet request command and a grant request command. Furthermore, the data that the master MPU 72 receives from the value number MPU 142 includes a bet request response command and a grant request response command.

The bet request command contains information about the number of gaming values requested to be bet (hereinafter also referred to as the "requested bet number" in this specification). When the value number side MPU 142 receives a bet request command, it subtracts the requested bet number (specifically, "3") from the owned gaming value number and sends a bet request response command to the main MPU 72. The bet request response command contains information about the number of gaming values bet (hereinafter also referred to as the "executed bet number" in this specification). If the owned gaming value number is 0 to 2 and a bet request command is sent, it executes a process to subtract 0 to 2 from the owned gaming value number, so that the owned gaming value number becomes "0," and the bet request response command contains the number of executed bets (hereinafter also referred to as the "executed bet number").

The grant request command contains information about the requested number of game values to be granted (hereinafter also referred to as the "requested grant number" in this specification). When the value number side MPU 142 receives the grant request command, it performs a process of adding the requested grant number (specifically, "1," "4," "5," or "15") to the number of owned game values, and sends a grant request response command to the main side MPU 72. The grant request response command contains information about the number of game values granted (hereinafter also referred to as the "executed grant number" in this specification). If the number of owned game values exceeds the upper limit (specifically, "16,383") as a result of the process of adding the requested grant number to the number of owned game values, an error "owned game value number full" occurs, and information corresponding to the error is set in the grant request response command.

<Configuration regarding communication between the value side MPU 142 and the card unit 130>
Next, the contents of the serial communication performed between the value number side MPU 142 and the card unit 130 will be described. FIG. 105(a) is an explanatory diagram illustrating the telegrams transmitted by the value number side MPU 142 to the card unit 130 via serial communication, and the telegrams received by the value number side MPU 142 from the card unit 130 via serial communication. As shown in FIG. 105(a), the telegrams transmitted from the value number side MPU 142 to the card unit 130 include a gaming machine information notification, a counting notification (7 bytes), and a loan receipt result response (5 bytes), and the telegram received by the value number side MPU 142 from the card unit 130 includes a loan notification (5 bytes). Furthermore, the gaming machine information notifications include a first gaming machine information notification (57 bytes), a second gaming machine information notification (46 bytes), and a third gaming machine information notification (21 bytes), which will be described later.

These messages include a message length section, a command section, a serial number section, a data section, and a checksum section. The message length section is one byte of information indicating the length of the message in bytes. The command section is one byte of information indicating the type of message. The serial number section is one byte of information indicating a serial number set for each type of message. When a gaming machine information notification is sent, the serial number set in the gaming machine information notification is updated; when a counting notification is sent, the serial number set in the counting notification is updated; when a loan notification is sent, the serial number set in the loan notification is updated; and when a loan receipt result response is sent, the serial number set in the loan receipt result response is updated. If the serial number section set in the received message is not consecutive, the value number side MPU 142 or card unit 130 will determine that a message has been lost or a transmission error has occurred. The serial number set in the serial number section is updated from "0" to "255" by incrementing by one each time a message of the same type (e.g., a counting notification) is sent, and returns to "0" after a message with the serial number "255" set is sent. If the value number side MPU 142 or card unit 130 receives a message of the same type (e.g., a counting notification) with the serial number "255" set, and then receives another message of the same type (e.g., a counting notification) with the serial number "0", it determines that the serial number sections set in these messages are consecutive.

The data section contains detailed information about each message. The checksum section is a one-byte piece of information (checksum) calculated by adding together all the data contained in the message other than the checksum section. The card unit 130 determines that a transmission abnormality has occurred if the one-byte piece of information calculated by adding together all the data contained in the received message other than the checksum section does not match the checksum set in the received message.

The value number side MPU 142 sends gaming machine information notifications to the card unit 130 at intervals of 300 milliseconds, and sends a counting notification to the card unit 130 95 milliseconds after the gaming machine information notification. Furthermore, if the value number side MPU 142 receives a loan notification from the card unit 130 within 171 milliseconds after sending the counting notification, it performs the loan process and sends a loan receipt result response to the card unit 130.

Figure 105(b) is an explanatory diagram illustrating the information set in the data section of the gaming machine information notification. As shown in Figure 105(b), gaming machine type information, gaming machine information, and gaming machine information classification information are set in the data section of the gaming machine information notification. Gaming machine type information is information that indicates the type of gaming machine. In the gaming machine information notification sent from the value number side MPU 142 to the card unit 130, gaming machine type information of "1" is set, indicating that the gaming machine is a slot machine. In addition, in the gaming machine information notification sent from a pachinko machine to the card unit 130, gaming machine type information of "2" is set, indicating that the gaming machine is a pachinko machine.

The gaming machine information set in the data section of a gaming machine information notification includes gaming machine performance information, gaming machine installation information, and hall control/fraud monitoring information. One of these three types of gaming machine information is set in a gaming machine information notification. The gaming machine information type information set in the data section of a gaming machine information notification indicates the type of gaming machine information set in the current gaming machine information notification. If the gaming machine information set in the gaming machine information notification is gaming machine performance information, the gaming machine information type information is set to "0". If the gaming machine information set in the gaming machine information notification is gaming machine installation information, the gaming machine information type information is set to "1". If the gaming machine information set in the gaming machine information notification is hall control/fraud monitoring information, the gaming machine information type information is set to "2".

Figure 105(c) is an explanatory diagram for explaining gaming machine performance information, gaming machine installation information, and hall control/fraud monitoring information. Gaming machine performance information is data that indicates the ball output performance of a gaming machine. As shown in Figure 105(c), gaming machine performance information includes information on the total number of bets (the number of gaming value bets accumulated since the power was turned on), the total number of awards (the number of gaming value awards accumulated since the power was turned on), and MY (the maximum difference in number of coins calculated since the power was turned on).

Gaming machine installation information is information used to identify gaming machines. As shown in FIG. 105(c), the gaming machine installation information includes main control chip information and value number control chip information. The main control chip information includes the chip ID, manufacturer code, and product code of the main MPU 72, and the value number control chip information includes the chip ID, manufacturer code, and product code of the value number side MPU 142. The main control chip information is stored in the main ROM 73 and is transmitted from the main MPU 72 to the value number side MPU 142 at predetermined intervals (specifically, every 300 milliseconds) and stored in the value number side RAM 144. The value number control chip information is stored in the value number side ROM 143 and is read out to the value number side RAM 144 at predetermined intervals (specifically, every 300 milliseconds).

Hall control and fraud monitoring information is information output to the gaming hall's management computer HC and information used to monitor fraud. Hall control and fraud monitoring information includes the number of owned gaming values stored in the value number control device 140, the number of gaming values bet (the number of gaming values bet in one game), the number of awarded gaming values (the number of gaming values awarded at the end of one game), external signal information, error codes (error codes corresponding to errors occurring in the gaming machine), and fraud detection information (information on the detection of illegal magnetism, information on the detection of illegal vibration, information on the detection of the opening of the front door 12, and information on the detection of a change in setting value). External signal information indicates the status of the game start signal and AT signal output from the main MPU 72 and input to the value number side MPU 142. Details of these signals will be described later. Error codes and fraud detection information are transmitted from the main MPU 72 to the value number side MPU 142 at predetermined intervals (specifically, every 300 milliseconds) and stored in the value number side RAM 144.

The counting notification sent from the value number side MPU 142 to the card unit 130 is used when the owned game value number stored in the value number control device 140 is sent to the card unit 130. The value number side RAM 144 is provided with a counting counter. The counting counter is set with the game value number sent from the value number side MPU 142 to the card unit 130 depending on the operation mode of the counting button 127. If the counting button 127 is operated for a period of less than 500 milliseconds, the value of the counting counter is incremented by 1. Furthermore, if the counting button 127 is operated continuously for a period of 500 milliseconds or more, the value of the counting counter is incremented by 50 every time 500 milliseconds elapses. The data portion of the counting notification contains the counting counter data. When the counting notification is sent, the value of the counting counter is subtracted from the value of the owned number counter, and the value of the counting counter is cleared to "0".

When the card unit 130 receives a counting notification from the value number side MPU 142, it sends a loan notification within a specified time (specifically, within 171 milliseconds). If the card unit 130 does not receive a counting notification from the value number side MPU 142, the card unit 130 does not send a loan notification. A game value number between "0" and "50" is set in the loan notification. If no game value is loaned, the game value number information of "0" is set in the loan notification. Furthermore, if balance information corresponding to a game value number of "50" or more is stored in the storage medium M and a loan of "50" game value is made based on the operation of the game value loan button 133, the game value number information of "50" is set in the loan notification. Furthermore, if balance information corresponding to any one of the game value numbers "1" to "49" is stored in the storage medium M and the game value lend button 133 is operated to lend one of the game value numbers "1" to "49," the lending notification will contain information about that game value number "1" to "49."

The loan receipt result response sent from the value number side MPU 142 to the card unit 130 is a message responding with the result of the value number side MPU 142 receiving the loan notification. If the serial numbers set in the loan notification received by the value number side MPU 142 are not consecutive, or if the result of adding the number of game values set in the loan notification received by the value number side MPU 142 to the number of owned game values exceeds the maximum number of owned game values that can be stored in the value number control device 140 (specifically, "16383"), information corresponding to the abnormality is set in the loan receipt result response.

A series of communications between the value number side MPU 142 and the card unit 130 begins when the master value number side MPU 142 sends a gaming machine information notification. When the supply of operating power to the slot machine 10 and the card unit 130 begins and the card unit 130 starts up before the value number side MPU 142, the card unit 130 waits until it receives a gaming machine information notification from the value number side MPU 142. Furthermore, if the value number side MPU 142 starts up before the card unit 130, two telegrams are sent to the card unit 130 in the order of gaming machine information notification → counting notification. However, because no loan notification is sent, no loan receipt result response is sent either. Thus, until the card unit 130 starts up, only two telegrams, the gaming machine information notification and counting notification, are sent unilaterally from the value number side MPU 142 to the card unit 130. In addition, the value side MPU 142 may be configured to start sending a message to the card unit 130 based on the detection of the first connection confirmation signal falling from HI to LOW in the value side MPU 142.

The transmission timing cycle for a gaming machine information notification containing gaming machine installation information (hereinafter also referred to in this specification as the "first gaming machine information notification") is set to 60 seconds, the transmission timing cycle for a gaming machine information notification containing gaming machine performance information (hereinafter also referred to in this specification as the "second gaming machine information notification") is set to 180 seconds, and the transmission timing cycle for a gaming machine information notification containing hall control and fraud monitoring information (hereinafter also referred to in this specification as the "third gaming machine information notification") is set to 300 milliseconds. Furthermore, if the transmission timings of these gaming machine information notifications overlap, the transmission of the first gaming machine information notification is given the highest priority, the transmission of the second gaming machine information notification is given the second priority, and the transmission of the third gaming machine information notification is given the third priority.

Next, we will explain the transmission buffer that stores messages sent from the value side MPU 142 to the card unit 130.

As shown in FIG. 104, the value number side MPU 142 is provided with a value number side transmission buffer 149. The value number side transmission buffer 149 is a ring buffer that stores messages (specifically, gaming machine information notifications, counting notifications, and loan receipt result responses) sent from the value number side MPU 142 to the card unit 130. The value number side transmission buffer 149 has a total of 128 memory areas, numbered memory area 0 to memory area 127. One byte of data is stored in each memory area. The value number side RAM 144 is provided with a write pointer. The write pointer is a counter that enables the value number side MPU 142 to determine which memory area of the value number side transmission buffer 149 is the write destination.

The value of the write pointer is updated each time one byte of data is set in the memory area corresponding to the value of the write pointer. The message sent from the value side MPU 142 to the card unit 130 is set one byte at a time in the memory area corresponding to the write pointer. The write pointer is a loop counter that adds one to its previous value each time it is updated, and returns to "0" after reaching its maximum value (specifically, "127"). The value "n" of the write pointer (n is an integer between 0 and 127) corresponds to the state where the write destination is the nth memory area. For example, a value of "0" in the write pointer corresponds to the state where the write destination is the 0th memory area, and a value of "2" in the write pointer corresponds to the state where the write destination is the second memory area.

When there are no unsent messages in the value number side transmission buffer 149 and a message is set in the value number side transmission buffer 149, transmission of that message to the card unit 130 begins. Also, when multiple messages are set in the value number side transmission buffer 149, the multiple messages are sent to the card unit 130 in order of the earliest message set. The value number side transmission buffer 149 has a data capacity of 128 bytes, and can store a first gaming machine information notification (57 bytes), a second gaming machine information notification (46 bytes), and a third gaming machine information notification (21 bytes).

As already explained, the transmission timing of the first gaming machine information notification occurs in a 60-second cycle, the transmission timing of the second gaming machine information notification occurs in a 180-second cycle, and the transmission timing of the third gaming machine information notification occurs in a 300-millisecond cycle. If the transmission timing of the first to third gaming machine information notifications overlap, the three gaming machine information notifications are set in the value number side transmission buffer 149 in the order of first gaming machine information notification → second gaming machine information notification → third gaming machine information notification. As a result, three gaming machine information notifications are transmitted from the value number side MPU 142 to the card unit 130 in that order. Furthermore, if the transmission timing of the first and third gaming machine information notifications overlap, the two gaming machine information notifications are set in the value number side transmission buffer 149 in the order of first gaming machine information notification → third gaming machine information notification. As a result, two gaming machine information notifications will be sent from the value side MPU 142 to the card unit 130 in that order.

The time required to transmit the first gaming machine information notification (57 bytes) is approximately 16 milliseconds, the time required to transmit the second gaming machine information notification (46 bytes) is approximately 13 milliseconds, and the time required to transmit the third gaming machine information notification (21 bytes) is approximately 6 milliseconds. The third gaming machine information notification is generally transmitted at a cycle of 300 milliseconds, but if the transmission timing of the first and third gaming machine information notifications overlap, the transmission timing of the third gaming machine information notification is delayed by approximately 16 milliseconds, and if the transmission timing of the first to third gaming machine information notifications overlap, the transmission timing of the third gaming machine information notification is delayed by approximately 29 milliseconds. However, in the value number side main processing (FIG. 110(b)) described below, the process of setting the third gaming machine information notification in the value number side transmission buffer 149 (step S5922) is performed every 300 milliseconds, regardless of whether the first gaming machine information notification or the second gaming machine information notification has been transmitted.

Next, the sending and receiving of messages between the value number side MPU 142 and the card unit 130 will be described with reference to the time chart in Figure 106. Figure 106(a) shows the timing when the value number side MPU 142 sets a gaming machine information notification in the value number side transmission buffer 149, Figure 106(b) shows the timing when the value number side MPU 142 sets a counting notification in the value number side transmission buffer 149, Figure 106(c) shows the timing when the value number side MPU 142 receives a loan notification from the card unit 130, and Figure 106(d) shows the timing when the value number side MPU 142 sets a loan receipt result response in the value number side transmission buffer 149.

As shown in FIG. 106(a), the value number side MPU 142 sets the gaming machine information notification to be sent from the first to third gaming machine information notifications in the value number side transmission buffer 149 at timing t1. This causes the gaming machine information notification to be sent from the value number side MPU 142 to the card unit 130.

Then, the value number side MPU 142 sets a counting notification in the value number side transmission buffer 149 at timing t2, 95 milliseconds after timing t1. This causes the counting notification to be transmitted from the value number side MPU 142 to the card unit 130. Then, as shown in FIG. 106(c), the value number side MPU 142 receives a loan notification at timing t3, which is within 171 milliseconds after timing t2. At timing t4, as shown in FIG. 106(d), the value number side MPU 142 sets a loan receipt result response in the value number side transmission buffer 149. This causes the loan receipt result response to be transmitted from the value number side MPU 142 to the card unit 130.

Then, as shown in FIG. 106(a), at timing t5, 300 milliseconds after timing t1, the value number side MPU 142 sets the gaming machine information notification to be sent out of the first to third gaming machine information notifications in the value number side transmission buffer 149. This causes the gaming machine information notification to be sent from the value number side MPU 142 to the card unit 130.

Next, the manner in which three types of gaming machine information notifications are set in the value number side transmission buffer 149 will be explained with reference to the time chart in Figure 107. Figure 107(a) shows the timing at which the value number side MPU 142 sets a third gaming machine information notification in the value number side transmission buffer 149, Figure 107(b) shows the timing at which the value number side MPU 142 transmits a second gaming machine information notification to the value number side transmission buffer 149, and Figure 107(c) shows the timing at which the value number side MPU 142 sets a first gaming machine information notification in the value number side transmission buffer 149.

As shown in Figures 107(a) to 107(c), at time t1 when the transmission timings of the first to third gaming machine information notifications overlap, the value number side MPU 142 sets the first to third gaming machine information notifications in the value number side transmission buffer 149 in the order of first gaming machine information notification → second gaming machine information notification → third gaming machine information notification. As a result, the first to third gaming machine information notifications are transmitted to the card unit 130 in the order of first gaming machine information notification → second gaming machine information notification → third gaming machine information notification. Transmission of the first gaming machine information notification begins at time t1. Furthermore, transmission of the second gaming machine information notification begins when transmission of the first gaming machine information notification has finished (approximately 16 milliseconds after time t1). Furthermore, transmission of the third gaming machine information notification begins when transmission of the second gaming machine information notification ends (approximately 29 milliseconds after timing t1).

After that, at time t2, 300 milliseconds after time t1, it is time to send the third gaming machine information notification. At time t2, as shown in FIG. 107(a), the value number side MPU 142 sets the third gaming machine information notification in the value number side transmission buffer 149. As a result, at time t2, transmission of the third gaming machine information notification begins.

After that, at time t3, 60 seconds after time t1, the transmission timing of the first gaming machine information notification and the third gaming machine information notification overlap. As shown in Figures 107(a) and 107(c), at time t3, the value number side MPU 142 sets the first and third gaming machine information notifications in the value number side transmission buffer 149 in the order of first gaming machine information notification → third gaming machine information notification. As a result, the first and third gaming machine information notifications are transmitted to the card unit 130 in the order of first gaming machine information notification → third gaming machine information notification. Transmission of the first gaming machine information notification begins at time t3. Furthermore, transmission of the third gaming machine information notification begins when transmission of the first gaming machine information notification ends (approximately 16 milliseconds after time t3). Then, as shown in FIG. 107(a), at time t4, 300 milliseconds after time t3, the third gaming machine information notification is set in the value number side transmission buffer 149, just as at time t2 already described, and transmission of the third gaming machine information notification begins.

After that, at t5, 60 seconds after t3, the transmission timing of the first gaming machine information notification and the third gaming machine information notification overlap. At t5, similar to the timing of t3 already described, the first and third gaming machine information notifications are set in the value number side transmission buffer 149 in the order of first gaming machine information notification → third gaming machine information notification. As a result, the first and third gaming machine information notifications are transmitted to the card unit 130 in the order of first gaming machine information notification → third gaming machine information notification. After that, as shown in FIG. 107(a), at t6, 300 milliseconds after t5, similar to the timings of t2 and t4 already described, the third gaming machine information notification is set in the value number side transmission buffer 149, and transmission of the third gaming machine information notification begins.

After that, at time t7, 180 seconds after time t1, the transmission timings of the first to third gaming machine information notifications overlap. At time t7, just like at time t1 already explained, the first to third gaming machine information notifications are set in the value side transmission buffer 149 in the order of first gaming machine information notification → second gaming machine information notification → third gaming machine information notification. As a result, the first to third gaming machine information notifications are transmitted to the card unit 130 in the order of first gaming machine information notification → second gaming machine information notification → third gaming machine information notification.

<Normal processing>
Next, the normal processing executed by the main MPU 72 will be described with reference to the flowchart in Fig. 108. Of the processes in steps S5701 to S5723 in the normal processing, the processes other than the end monitoring process called and executed in step S5714 are executed as intra-area processing using a program for intra-area processing and data for intra-area processing, and the end monitoring process is executed as extra-area processing using a program for extra-area processing and data for extra-area processing.

First, similar to step S301 of the normal processing (FIG. 15) in the first embodiment, an interrupt permission process is performed to permit the next timer interrupt (step S5701). Then, a start wait process is executed (step S5702). In the start wait process (step S5702), a replay response process is first executed. In the replay response process, if any replay wins were achieved in the previous game, a bet setting equal to the previous bet number (specifically, "3") is set in the bet number setting counter 96a provided in the work area 96 for intra-area processing. As already explained in the first embodiment, the bet number setting counter 96a is a counter used by the master MPU 72 to identify the number of bets for the game to be executed. In the start waiting process (step S5702), after executing the replay response process, a determination process is performed to determine whether an error has occurred (specifically, any of the following error conditions: "award limit reached," "unit connection abnormality," "owned game value number full," "award abnormality," and "bet abnormality," as described below). If an error has occurred, the determination process is repeated until the error is resolved. If the determination process determines that no error has occurred, a bet setting process is performed. In the bet setting process, a process is performed to set the number of game value bets based on the operation of the game value insertion button 126. In the start waiting process (step S5702), after executing the bet setting process, a settlement operation response process is performed. In the settlement operation response process, provided that a replay win has not been achieved, the number of game values corresponding to the value of the bet number setting counter 96a is added to the number of owned game values stored in the value number control device 140, and the bet number setting counter 96a is cleared to "0." Details of the start waiting process (step S5702) will be described later.

After executing the start wait processing in step S5702, steps S5703 and S5704 perform the same processing as steps S303 and S304 of the normal processing (FIG. 15) in the first embodiment described above. Specifically, it is determined whether the number of bets required to start a game (specifically, "3") has been set (step S5703), and if the number of bets on game value is less than "3" (step S5703: NO), the process returns to step S5702. If a positive determination is made in step S5703, it is determined whether the start lever 41 has been operated (step S5704), and if the start lever 41 has not been operated (step S5704: NO), the process returns to step S5702.

If it is determined in step S5704 that the start lever 41 has been operated, the main line ML is activated and then the acceptance prohibition process is executed (step S5705). After the acceptance prohibition process is executed, operation of the gaming value insertion button 126 is disabled until the acceptance permission process (step S5723) described below is executed. A state in which operation of the gaming value insertion button 126 is disabled means that even if the gaming value insertion button 126 is operated, no gaming value bets will be made based on that operation.

Then, in steps S5706 to S5708, the game start signal start reservation process is executed. In the game start signal start reservation process (steps S5706 to S5708), reservation data is set to raise the game start signal output from the main side MPU 72 to the value side MPU 142 from LOW level to HIGH level. Details of the game start signal start reservation process (steps S5706 to S5708) will be described later.

When the game start signal activation reservation process (steps S5706 to S5708) is completed (specifically, when step S5707 is performed or when step S5708 is performed), steps S5709 to S5711 execute the same processes as steps S306 to S308 of the normal process (Figure 15) in the first embodiment described above. Specifically, step S5709 executes the process of storing the start status, step S5710 executes the process of drawing the winning combination, and step S5711 executes the reel control process. As already explained in the first embodiment above, in the reel control process, if the 4.1-second wait time set when reels 32L, 32M, and 32R started spinning in the previous game has not yet elapsed, the start of spinning of reels 32L, 32M, and 32R is delayed until that wait time has elapsed. Thus, even after a positive determination is made in step S5704 and the game starts, if the 4.1 second wait time has not elapsed since the start of rotation of reels 32L, 32M, and 32R in the previous game, the start of rotation of reels 32L, 32M, and 32R will be delayed until that wait time has elapsed.

Then, the game value awarding process is executed (step S5712). In the game value awarding process, if a small win is achieved in the current game, a grant request command including information on the requested grant number corresponding to the achieved small win is set as a command to be sent to the value number side MPU 142. The grant request command is sent to the value number side MPU 142 in the value number control board communication process in step S5809 of the timer interrupt process (FIG. 109) described below. When the value number side MPU 142 receives the grant request command, it adds the requested grant number set in the grant request command to the owned game value number stored in the value number control device 140 and sends a grant request response command to the main side MPU 72. The value number side MPU 142 also updates the display contents of the game value number display unit 123 and the value number display 146 to the owned game value number after the addition.

Then, in steps S5713 to S5717, the same processing as steps S310 to S311 and steps S313 to S315 of the normal processing (Figure 15) in the first embodiment is executed. Specifically, in step S5713, a response process at the time of game end is executed, in step S5714, an end monitoring process is executed, in step S5715, an end setting process is executed, in step S5716, an end status storage process is executed, and in step S5717, a game end command transmission process is executed.

Then, in steps S5718 to S5722, base AT signal reservation processing is executed. In the base AT signal reservation processing (steps S5718 to S5722), reservation data is set to raise the base AT signal to a HIGH level, provided that the gaming state at the end of the game is the base AT state ST4 and the base AT signal output from the main side MPU 72 to the value number side MPU 142 is at a LOW level. Also, in the base AT signal reservation processing (steps S5718 to S5722), reservation data is set to raise the base AT signal to a LOW level, provided that the gaming state at the end of the game is not the base AT state ST4 and the base AT signal is at a HIGH level. Details of the base AT signal reservation processing (steps S5718 to S5722) will be described later.

When the base AT signal reservation process (steps S5718 to S5722) is completed (specifically, when a negative judgment is made in step S5719, when the process of step S5720 is performed, when a negative judgment is made in step S5721, or when the process of step S5722 is performed), the acceptance permission process is executed (step S5723). Execution of the acceptance permission process enables operation of the gaming value insertion button 126. However, if a game in which a replay win has been achieved has ended, if the number of gaming value bets is already "3", or if the number of owned gaming value is "0", no gaming value will be bet even if the gaming value insertion button 126 is operated. After executing the acceptance permission process (step S5723), the process proceeds to step S5701.

<Timer interrupt processing>
Next, the timer interrupt processing executed by the main MPU 72 will be described with reference to the flowchart in Fig. 109. As already described in the first embodiment, the timer interrupt processing is initiated, for example, every 1.49 milliseconds. Furthermore, of the processing in steps S5801 to S5816 in the timer interrupt processing, the processing other than the management processing called and executed in step S5815 is executed as in-area processing using a program for in-area processing and data for in-area processing, and the management processing is executed as out-area processing using a program for out-area processing and data for out-area processing.

Steps S5801 to S5808 are the same as steps S201 to S208 of the timer interrupt processing (Figure 14) in the first embodiment. Specifically, register save processing is first performed (step S5801). Then, if the power outage flag in the main RAM 74 is set to "1" (step S5802: YES), power outage processing is performed (step S5803).

If it is determined in step S5802 that the power outage flag is not set to "1," or if it is determined in the power outage processing (step S5803) that command transmission has not ended, processing from step S5804 onward is executed. In step S5804, a watchdog timer clear process is executed to initialize the value of the watchdog timer, which monitors for malfunctions. In step S5805, an interrupt end declaration process is executed, which enables the main MPU 72 itself to set the next timer interrupt. Then, in step S5806, a stepping motor control process is executed to drive the stepping motors provided on each of the reels 32L, 32M, and 32R to spin these reels. In step S5807, a sensor monitoring process is executed to read the status of various sensors connected to the input ports and monitor whether the read results are normal. Then, in step S5808, a timer decrement process is executed to decrement the values of each counter and timer.

Then, the value number control board communication process is executed (step S5809). In the value number control board communication process, if a bet request command is set, the process of sending the bet request command to the value number side MPU 142 is executed. Also, in the value number control board communication process (step S5809), if a bet request response command is received from the value number side MPU 142, the process of sending the grant request command to the value number side MPU 142 is executed. In the value number control board communication process (step S5809), if the master MPU 72 does not receive a bet request response command from the value number side MPU 142 within a predetermined period (specifically, within 300.98 milliseconds) after sending a bet request command to the value number side MPU 142, i.e., if a "bet abnormality" error occurs, the bet abnormality flag provided in the work area 96 for intra-area processing is set to "1." The bet abnormality flag is a flag that allows the main MPU 72 to grasp that a "bet abnormality" has occurred. Furthermore, in the value number control board communication processing (step S5809), when a grant request response command is received from the value number side MPU 142, it is determined whether the number of grant requests set in the transmitted grant request command matches the number of executed grants set in the received grant request response command. If the number of grant requests and the number of executed grants match, display data corresponding to the number of executed grants is set as display data to be output to the acquisition number display unit 125. The display corresponding to the number of awarded game values in this acquisition number display unit 125 continues until a new bet of game value is made. Furthermore, if the number of requested awards and the number of actual awards do not match, or if the main MPU 72 fails to receive an award request response command from the value MPU 142 within a predetermined period (specifically, within 300.98 milliseconds) after sending an award request command to the value MPU 142, i.e., if an error known as an "award abnormality" occurs, the award abnormality flag provided in the work area 96 for intra-area processing is set to "1". The award abnormality flag is a flag that enables the main MPU 72 to recognize that an "award abnormality" has occurred. Details of "bet abnormalities" and "award abnormalities" will be described later.

After executing the value number control board communication process (step S5809), an error information update process is executed (step S5810), which updates the error information stored in the work area 96 for in-area processing. Details of the error information update process (step S5810) will be described later. Subsequently, in steps S5811 and S5812, the same processes as steps S210 and S211 of the timer interrupt process (FIG. 14) in the first embodiment are executed. Specifically, in step S5811, a command output process is executed to send various commands to the production-side MPU 92, and in step S5812, a port output process is executed to output data corresponding to the I/O device from the input/output port. The port output process (step S5812) controls the display of the error code display unit 124 and the acquisition number display unit 125. Subsequently, the external output process, which will be described later, is executed (step S5813).

Then, in steps S5814 to S5816, the same processing as steps S214 to S216 of the timer interrupt processing (FIG. 14) in the first embodiment is executed. Specifically, in step S5814, the values of each register saved in the work area 96 for in-area processing in the previous step S5801 are restored to the corresponding register in the main MPU 72. Then, in step S5815, management processing is executed using the CALLI command. Then, in step S5816, interrupt permission processing is executed to permit the next timer interrupt. Execution of the processing in step S5816 completes one execution of the timer interrupt processing.

Next, before explaining the processing executed by the value number side MPU 142, the configuration of the value number side RAM 144 will be explained. Figure 110(a) is an explanatory diagram for explaining the configuration of the value number side RAM 144. As shown in Figure 110(a), the value number side RAM 144 is provided with a value number area 144a, a security area 144b, a RAM clearing target area 144c, and a management area 144d.

The value number area 144a is provided with an owned number counter that stores the number of owned gaming values. The security area 144b is provided with a value number clear detection counter that measures the duration of the ON state of the value number clear detection sensor 147a, and a RAM clear detection counter that measures the duration of the ON state of the RAM clear detection sensor 148a.

The RAM clear target area 144c is provided with a power outage counter, a first connection signal monitoring counter, a count button counter, a count counter, a serial number area, a first value number display data area, a second value number display data area, a main control chip information area, and a value number control chip information area. The power outage counter is a counter for counting the number of consecutive detections of the ON state of the power outage signal input to the value number side MPU 142. The first connection monitoring counter is a counter for counting the number of consecutive detections of the HI level (a state corresponding to a connection abnormality) of the first connection confirmation signal input to the value number side MPU 142. The count button counter is a counter for counting the number of consecutive detections of the ON state of the count detection sensor 127a. As already explained, the count counter is set with the gaming value number sent from the value number side MPU 142 to the card unit 130 depending on the operation mode of the count button 127. In the serial number area, the serial number set in the serial number section of the gaming machine information notification sent from the value number side MPU 142 to the card unit 130, the serial number set in the serial number section of the counting notification, and the serial number set in the loan receipt result response are updated. In the first value number display data area, display data to be sent to the gaming value number display unit 123 is set. In the second value number display data area, display data to be sent to the value number display 146 is set. In the main control chip information area, main control chip information received from the main side MPU 72 is set. In the value number control chip information area, value number control chip information stored in the value number side ROM 143 is read.

The management area 144d is provided with a total bet counter that sets the total number of bets on game value, a total payout counter that sets the total number of game value awarded, and a current MY counter that sets the current MY (the maximum difference in number of coins calculated since power was turned on).

Next, we will explain the processing executed by the value number side MPU 142. First, we will explain the value number side main processing executed by the value number side MPU 142 when the supply of operating power to the value number side MPU 142 begins, with reference to the flowchart in Figure 110 (b).

First, a button operation detection process is executed (step S5901). In the button detection process, the state of the signals input to the value number side MPU 142 from the value number clear detection sensor 147a and the RAM clear detection sensor 148a is read. Then, it is determined whether the value number clear button 147 has been operated (step S5902). If the value number clear button 147 has not been operated (step S5902: NO), it is determined whether a data abnormality has occurred in the value number area 144a (step S5903). In step S5903, a checksum of the value number area 144a is calculated, and if the calculated checksum does not match the checksum of the value number area 144a stored in the value number side RAM 144 before the supply of operating power to the value number side MPU 152 was stopped, it is determined that a data abnormality has occurred in the value number area 144a.

If the value number clear button 147 is operated (step S5902: YES), or if a data abnormality occurs in the value number field 144a (step S5903: YES), an initialization process for the value number field 144a is executed (step S5904). In this initialization process, each area in the value number field 144a is cleared to "0" and each area is initialized.

If a negative determination is made in step S5903, or if the processing of step S5904 is performed, it is determined whether a data abnormality has occurred in the security area 144b (step S5905). In step S5905, a checksum of the security area 144b is calculated, and if the calculated checksum does not match the checksum of the security area 144b stored in the value number side RAM 144 before the supply of operating power to the value number side MPU 152 was stopped, it is determined that a data abnormality has occurred in the security area 144b. If a data abnormality has occurred in the security area 144b (step S5905: YES), an initialization process for the security area 144b is executed (step S5906). In this initialization process, each area of the security area 144b is cleared to "0" and each area is initialized.

If a negative judgment is made in step S5905 or if the processing of step S5906 is performed, it is determined whether the RAM clear button 148 has been operated (step S5907). If the RAM clear button 148 has not been operated (step S5907: NO), it is determined whether a data abnormality has occurred in the RAM clear target area 144c (step S5908). In step S5908, a checksum of the RAM clear target area 144c is calculated, and if the calculated checksum does not match the checksum of the RAM clear target area 144c stored in the value number side RAM 144 before the supply of operating power to the value number side MPU 152 was stopped, it is determined that a data abnormality has occurred in the RAM clear target area 144c. If the RAM clear button 148 has been operated (step S5907: YES) or if a data abnormality has occurred in the RAM clear target area 144c (step S5908: YES), initialization processing of the RAM clear target area 144c is executed (step S5909). During this initialization process, each area in the RAM clear target area 144c is cleared to "0" and the initial settings for each area are performed.

If a negative judgment is made in step S5908, or if the processing of step S5909 is performed, the initial setting processing at power-on is executed (step S5910). In the initial setting processing at power-on, initialization processing of the management area 144d is executed. In this way, when the supply of operating power to the value number side MPU 142 begins, the management area 144d is initialized regardless of whether the value number clear button 147 or the RAM clear button 148 is operated by the amusement hall manager.

In this way, if a data abnormality occurs in the value number area 144a, initialization processing of the value number area 144a is executed; if a data abnormality occurs in the security area 144b, initialization processing of the security area 144b is executed; and if a data abnormality occurs in the RAM clear target area 144c, initialization processing of the RAM clear target area 144c is executed. This makes it possible to reduce the range of initialization based on the occurrence of a data abnormality and to reduce the amount of information lost based on the occurrence of a data abnormality, compared to a configuration in which initialization processing of the value number area 144a, security area 144b, and RAM clear target area 144c is executed when a data abnormality occurs in any of these areas 144a-144c.

Since the initialization process for the value number area 144a is executed based on the operation of the value number clear button 147 when the supply of operating power to the value number side MPU 142 begins, the amusement hall manager can initialize the value number area 144a while maintaining the data in the security area 144b and the RAM clear target area 144c. Since the initialization process for the RAM clear target area 144c is executed based on the operation of the RAM clear button 148 when the supply of operating power to the value number side MPU 142 begins, the amusement hall manager can initialize the RAM clear target area 144c while maintaining the data in the value number area 144a and the security area 144b.

Then, the value number side timer interrupt process (FIG. 111), which will be described later, is prohibited from interrupting (step S5911), and the loan response process is executed (step S5912). In the loan response process, when a loan notification is received from the card unit 130, the loaned gaming value number is added to the value of the owned number counter in the value number side RAM 144, and processing is executed to send a loan receipt result response to the card unit 130.

Then, a bet response process is executed (step S5913). In the bet response process, when a bet request command is received from the main MPU 72, the bet request number (specifically, "3") is subtracted from the owned gaming value number stored in the owned number counter in the value number RAM 144, and a bet request response command including information on the number of bets to be made is sent to the main MPU 72.

Then, the grant response process is executed (step S5914). In the grant response process, when a grant request command is received from the main MPU 72, the grant request number (specifically, "1," "4," "5," or "15") is added to the number of owned gaming values stored in the owned number counter of the value number RAM 144, and a process is executed to send a grant request response command including information on the number of grants executed to the main MPU 72. However, if the number of owned gaming values exceeds the upper limit (specifically, "16,383") as a result of the process of adding the grant request number to the number of owned gaming values, a process is executed to send a grant request response command including information corresponding to the error "Number of owned gaming values full" to the main MPU 72.

Then, the counting process is executed (step S5915). In the counting process, if the counting button 127 is being operated, a process is executed to update the value of the counting counter provided in the value number side RAM 144 in accordance with the operation mode of the counting button 127. Also, in the counting process (step S5915), if it is time to send a counting notification, a process is executed to send the counting notification to the card unit 130. Then, the value of the counting counter is subtracted from the value of the possession number counter in the value number side RAM 144, and the value of the counting counter is cleared to "0".

Then, the settlement process is executed (step S5916). In the settlement process, when a settlement command is received from the main MPU 72, the process executes a process to subtract the number of game value bets set in the received settlement command from the number of owned game value stored in the owned number counter in the value number RAM 144, and executes a process to send a settlement response command to the main MPU 72.

After that, if it is time to send the first gaming machine information notification (step S5917: YES), the first gaming machine information notification setting process is executed (step S5918). In this setting process, the first gaming machine information notification is set in the value number side transmission buffer 149. As already explained, the timing to send the first gaming machine information notification occurs in 60-second cycles. By setting the first gaming machine information notification in the value number side transmission buffer 149 in step S5918, transmission of the first gaming machine information notification to the card unit 130 begins.

If a negative judgment is made in step S5917, or if the processing of step S5918 is performed, the second gaming machine information notification setting process is executed (step S5920), provided that it is the timing to send the second gaming machine information notification (step S5919: YES). In this setting process, the second gaming machine information notification is set in the value number side transmission buffer 149. As already explained, the timing to send the second gaming machine information notification occurs in a 180-second cycle. By setting the second gaming machine information notification in the value number side transmission buffer 149 in step S5920, transmission of the second gaming machine information notification to the card unit 130 is initiated. However, if a message (specifically, a first gaming machine information notification) has been set in the value number side transmission buffer 149 before the second gaming machine information notification, transmission of the second gaming machine information notification is initiated based on the completion of transmission of that message.

If a negative judgment is made in step S5919 or if the processing of step S5920 is performed, a setting process for the third gaming machine information notification is executed (step S5922), provided that it is the timing to transmit the third gaming machine information notification (step S5921: YES). In this setting process, the third gaming machine information notification is set in the value number side transmission buffer 149. As already explained, the timing to transmit the third gaming machine information notification occurs at a cycle of 300 milliseconds. By setting the third gaming machine information notification in the value number side transmission buffer 149 in step S5922, transmission of the third gaming machine information notification to the card unit 130 is initiated. However, if there is a message (specifically, a first gaming machine information notification, or a first gaming machine information notification and a second gaming machine information notification) set in the value number side transmission buffer 149 prior to the third gaming machine information notification, transmission of the third gaming machine information notification is initiated based on the completion of transmission of that message.

In this way, if the transmission timing of the first to third gaming machine information notifications overlap, the first to third gaming machine information notifications are set in the value number side transmission buffer 149 in the following order: first gaming machine information notification → second gaming machine information notification → third gaming machine information notification. This allows the first to third gaming machine information notifications to be transmitted to the card unit 130 in the following order: first gaming machine information notification → second gaming machine information notification → third gaming machine information notification. Also, if the transmission timing of the first and third gaming machine information notifications overlap, the first and third gaming machine information notifications are set in the value number side transmission buffer 149 in the following order: first gaming machine information notification → third gaming machine information notification. This allows the first and third gaming machine information notifications to be transmitted to the card unit 130 in the following order: first gaming machine information notification → third gaming machine information notification.

If a negative judgment is made in step S5921, or if the processing of step S5922 is performed, an interrupt of the value number side timer interrupt processing (FIG. 111) described below is permitted (step S5923), and then the processing returns to step S5911 and the processing of steps S5911 to S5923 is repeatedly executed. The value number side MPU 142 is configured to periodically execute the value number side timer interrupt processing (FIG. 111), and there will be a remaining time between one value number side timer interrupt processing and the next value number side timer interrupt processing. This remaining time will vary depending on the processing completion time of the value number side timer interrupt processing, and this irregular time will be used to repeatedly execute the processing of steps S5911 to S5923.

Next, the value number side timer interrupt processing executed by the value number side MPU 142 will be explained with reference to the flowchart in Figure 111. Note that the value number side timer interrupt processing is initiated, for example, every 1 millisecond.

First, a power supply confirmation process is executed (step S6001). The power supply confirmation process determines whether a power outage has been identified, and if a power outage has been identified, a power outage information storage process is executed. The power outage information storage process calculates a checksum for each of the value number area 144a, security area 144b, and RAM clear target area 144c in the value number side RAM 144, stores the calculated checksums in the value number side RAM 144, and enters an infinite loop. The checksums stored in the value number side RAM 144 are used to determine whether an information anomaly has occurred in the value number area 144a, security area 144b, or RAM clear target area 144c after the supply of operating power to the value number side MPU 142 has started.

If the power supply confirmation process (step S6001) does not identify a power outage, a switch status reading process is executed (step S6002). In the switch status reading process, the status of the signals input to the value number side MPU 142 from the value number clear detection sensor 147a, RAM clear detection sensor 148a, and count detection sensor 127a is read, and information on the status of these signals is set in the value number side RAM 144.

After that, a timer update process is executed to update the values of various timer counters provided in the value number side RAM 144 (step S6003). The timer update process updates the timer counters that enable the value number side MPU 142 to determine the timing of transmission of the first gaming machine information notification, the timer counters that enable the value number side MPU 142 to determine the timing of transmission of the second gaming machine information notification, and the timer counters that enable the value number side MPU 142 to determine the timing of transmission of the third gaming machine information notification. Then, a fraud information setting process is executed (step S6004). The fraud information setting process sets data corresponding to the state of the award upper limit signal input from the main side MPU 72 to the value number side MPU 142, data corresponding to the state of the door open signal input from the main side MPU 72 to the value number side MPU 142, and data corresponding to the state of the detection signal of the value number clear detection sensor 147a in the value number side RAM 144.

Then, a segment data setting process is executed (step S6005). In the segment data setting process, display control is performed on the gaming value number display unit 123 so that the owned gaming value number stored in the owned number counter of the value number side RAM 144 is displayed. Then, a test machine signal process is executed (step S6006). In the test machine signal process, output processing is performed for the test machine signal used in the type test. Then, a value number side port output process is executed (step S6007). In the value number side port output process, display data is output to the value number display 146 so that the owned gaming value number stored in the owned number counter of the value number side RAM 144 is displayed.

<Configuration for outputting external signals>
Next, a configuration for outputting external signals from the card unit 130 will be described. The external signals output from the card unit 130 include an external game start signal and an external base AT signal. Furthermore, the external output signals output from the main MPU 72 to the value number side MPU 142 include a game start signal corresponding to the external game start signal and a base AT signal corresponding to the external base AT signal. As will be described in detail later, the state of the external signal output from the card unit 130 changes depending on the state of the external output signal output from the main MPU 72.

When a game starts, the main MPU 72 executes processing to schedule the rise of the game start signal from LOW level to HIGH level. 300.98 milliseconds after the game start signal rises, the main MPU 72 causes the game start signal to fall from HIGH level to LOW level. The main MPU 72 also prevents the game start signal from rising again until 300.98 milliseconds after the game start signal falls.

A HIGH level of the base AT signal corresponds to the base AT state ST4, while a LOW level of the base AT signal corresponds to a gaming state other than the base AT state ST4. If the gaming state at the end of the game is the base AT state ST4 and the base AT signal is at a LOW level, the main MPU 72 executes processing to reserve the raising of the base AT signal to a HIGH level. Furthermore, if the gaming state at the end of the game is the base AT state ST4 and the base AT signal is at a HIGH level, the HIGH level is maintained. Furthermore, if the gaming state at the end of the game is not the base AT state ST4 and the base AT signal is at a HIGH level, the main MPU 72 executes processing to reserve the lowering of the base AT signal to a LOW level. Furthermore, if the gaming state at the end of the game is not the base AT state ST4 and the base AT signal is at a LOW level, the LOW level is maintained.

As already explained, the timing for transmitting the third gaming machine information notification occurs at a cycle of 300 milliseconds. Also, as already explained, in the value number side main processing (FIG. 110(b)), a process (step S5922) is executed to set the third gaming machine information notification in the value number side transmission buffer 149, provided that it is the timing for transmitting the third gaming machine information notification. In the third gaming machine information notification, the external signal information is set to the game start signal information (data of "0" corresponding to a LOW level or "1" corresponding to a HIGH level) and the base AT signal information (data of "0" corresponding to a LOW level or "1" corresponding to a HIGH level) input to the value number side MPU 142 at the time the process for setting the third gaming machine information notification in the value number side transmission buffer 149 is executed. In this way, regardless of whether the transmission timing of the third gaming machine information notification overlaps with the transmission timing of the first gaming machine information notification, and whether the transmission timing of the third gaming machine information notification overlaps with the transmission timing of the second gaming machine information notification, the process of setting the third gaming machine information notification including external signal information in the value number side transmission buffer 149 is executed at a cycle of 300 milliseconds.

As shown in FIG. 104, the output side of the card unit 130 is connected to the amusement hall's management computer HC and data display device DH, which are located outside the slot machine 10. External signals (specifically, an external game start signal and an external base AT signal) output from the card unit 130 are input to the amusement hall's management computer HC and data display device DH. The data display device DH has a display screen that displays game information. The display screen of the data display device DH displays information corresponding to the game status of the slot machine 10 based on the external signals received from the card unit 130. Note that these external signals may be configured to be sent to only either the amusement hall's management computer or the data display device DH.

When the card unit 130 receives the third gaming machine information notification, if the external signal information set in the received third gaming machine information notification contains information corresponding to a LOW level ("0") as the game start signal information, it sets the state of the external game start signal to a LOW level, and if the game start signal contains information corresponding to a HIGH level ("1"), it sets the state of the external game start signal to a HIGH level. The gaming hall management computer HC and data display device DH can determine that a game has started on the slot machine 10 based on the detection of a rising edge of the external game start signal.

When the card unit 130 receives the third gaming machine information notification, if the external signal information set in the received third gaming machine information notification contains information corresponding to a LOW level ("0") as the base AT signal information, it sets the state of the external base AT signal to a LOW level, and if the base AT signal information contains information corresponding to a HIGH level ("1"), it sets the state of the external base AT signal to a HIGH level. The gaming hall's management computer HC and data display device DH can determine whether the gaming state of the slot machine 10 is in the base AT state ST4 based on the state of the external base AT signal. Furthermore, they can determine the number of times the slot machine 10 has transitioned to the base AT state ST4 based on the number of times a rising edge is detected in the external base AT signal.

Figure 112(a) is an explanatory diagram illustrating the configuration of the work area 96 for intra-area processing. As shown in Figure 112(a), the work area 96 for intra-area processing includes a current external signal area 96m, a reserved external signal area 96n, and a startup reservation flag 96o. The current external signal area 96m is a one-byte area that allows the main MPU 72 to grasp information about the currently set game start signal and base AT signal (either "0" corresponding to a low level or "1" corresponding to a high level). The reserved external signal area 96n is a one-byte area that allows the main MPU 72 to grasp information about the game start signal and base AT signal whose setting is reserved (either "0" corresponding to a low level or "1" corresponding to a high level). The startup reservation flag 96o is a flag that allows the main MPU 72 to grasp, when the game start signal is waiting to fall, that a startup after the fall of the game start signal is reserved. The start reservation flag 96o is set to "1" when the next game is started and the rising of the game start signal corresponding to one game is reserved while the falling of the game start signal corresponding to that game is being waited for.

Figure 112(b) is an explanatory diagram illustrating the configuration of the current external signal area 96m, and Figure 112(c) is an explanatory diagram illustrating the configuration of the reserved external signal area 96n. As shown in Figure 112(b), in the current external signal area 96m, setting data for the game start signal is set in bit 0, and setting data for the AT signal is set in bit 1. Furthermore, bits 2 to 7 in the current external signal area 96m are unused.

As shown in Figure 112 (c), in the reserved external signal area 96n, reservation data for the game start signal is set in bit 0, and reservation data for the base AT signal is set in bit 1. Bits 2 to 7 in the reserved external signal area 96n are unused. By providing the reserved external signal area 96n, it is possible to store reservation data for the game start signal and base AT signal in the work area 96 for in-area processing while maintaining the setting data stored in the current external signal area 96m.

As shown in FIG. 112(a), the work area 96 for intra-region processing is provided with a first interval setting counter 96p and a second interval setting counter 96q. The first interval setting counter 96p is a timer counter that allows the main MPU 72 to determine whether the game start signal fall prohibition period (300.98 milliseconds) set at the rising edge of the game start signal or the game start signal rise prohibition period (300.98 milliseconds) set at the falling edge of the game start signal has elapsed. The second interval setting counter 96q is a timer counter that allows the main MPU 72 to determine whether the base AT signal fall prohibition period (300.98 milliseconds) set at the rising edge of the base AT signal or the base AT signal rise prohibition period (300.98 milliseconds) set at the falling edge of the base AT signal has elapsed.

When the game start signal rises or falls, numerical information corresponding to 300.98 milliseconds (specifically, "202") is set in the first interval setting counter 96p, and when the AT signal rises or falls, numerical information corresponding to 300.98 milliseconds (specifically, "202") is set in the second interval setting counter 96q. In the timer subtraction process in step S5808 of the timer interrupt process (FIG. 109), the value of the first interval setting counter 96p is subtracted by 1, and if the value after the subtraction falls below "0," the value of the first interval setting counter 96p is cleared to "0." The value of the second interval setting counter 96q is subtracted by 1, and if the value after the subtraction falls below "0," the value of the second interval setting counter 96q is cleared to "0."

Next, before explaining the game start signal startup reservation process (steps S5706 to S5708) and the base AT signal reservation process (steps S5718 to S5722) in normal processing (Figure 108), we will explain the rotation period of reels 32L, 32M, and 32R.

The acceleration period for reels 32L, 32M, and 32R is set to 208.6 milliseconds, which is 140 times the interrupt cycle of the timer interrupt process. In each game, after reels 32L, 32M, and 32R begin to spin, the acceleration period for reels 32L, 32M, and 32R ends, and operation of stop buttons 42-44 becomes valid. During the acceleration period for reels 32L, 32M, and 32R, operation of stop buttons 42-44 is disabled, and operation of stop buttons 42-44 during this state will not cause reels 32L, 32M, and 32R to stop.

Stop control of reels 32L, 32M, and 32R is performed within 190 milliseconds after the stop buttons 42-44 are operated, stopping reels 32L, 32M, and 32R. In stop control in normal game state ST1, base AT state ST4, or ending AT state ST5, a slip count of "0" to "4" is selected, and in stop control in the CB state, a slip count of "0" to "1" is selected. The time required to stop reels 32L, 32M, and 32R is shortest when the selected slip count is "0" (specifically, 37.25 milliseconds, which is 25 times the interrupt period of the timer interrupt process).

If a stop operation is performed on another reel (the center reel 32M or right reel 32R) while one reel (for example, the left reel 32L) is being stopped, the stop operation on that other reel also becomes effective, and stop control on that other reel begins while stop control on that one reel is in progress. Therefore, depending on the operation of each stop button 42-44, stop control on the left reel 32L, stop control on the center reel 32M, and stop control on the right reel 32R may be executed in parallel. However, stop control on two or more reels 32L, 32M, and 32R will not be initiated during one timer interrupt process (Figure 109).

If a stop operation is performed by operating the three stop buttons 42-44 substantially simultaneously immediately after the end of the acceleration period for reels 32L, 32M, and 32R (e.g., if a second stop operation is detected within 1.49 milliseconds of the first stop operation, and a final stop operation is detected within 1.49 milliseconds of the second stop operation), the period from when reels 32L, 32M, and 32R start spinning until all reels 32L, 32M, and 32R have stopped spinning may be less than 300 milliseconds (the period during which the third gaming machine information notification is transmitted) (e.g., the shortest period of 250.32 milliseconds). Furthermore, if a game is started after the 4.1-second wait time set at the start of spinning of reels 32L, 32M, and 32R has elapsed, reels 32L, 32M, and 32R will start spinning when the timer interrupt process (Figure 109) is first executed after the game has started. Therefore, the period from when the game starts to when the game ends can be less than 300 milliseconds.

Since the operation of the stop buttons 42-44 to stop reels 32L, 32M, and 32R, the operation of the game value insertion button 126 to bet game value, and the operation of the start lever 41 to start a game are human actions (player actions), the period from the end of one game to the start of the next game of that game is generally longer than 300 milliseconds. However, if a replay win is achieved in one game, the next game can be started after the end of that game without operating the game value insertion button 126. For this reason, it is possible that the period from the end of one game to the start of the next game of that game will be less than 300 milliseconds. Furthermore, for example, in a special case where a player operates the start lever 41 with his left hand and the stop buttons 42-44 with his right hand, if a replay win is achieved in one game and the operation of the game value insertion button 126 becomes unnecessary, it is conceivable that the period from the start of one game to the start of the next game of that game will accidentally be less than 300 milliseconds, and it is also conceivable that the period from the end of one game to the end of the next game of that game will accidentally be less than 300 milliseconds.

Next, the game start signal activation reservation process executed in steps S5706 to S5708 of the normal processing (Figure 108) will be explained with reference to the flowchart in Figure 108.

In the game start signal startup reservation process, if the setting data for the game start signal stored in bit 0 of the current external signal area 96m is "0" (step S5706: YES), i.e., if the game start signal has already been turned off, the reservation data for the game start signal is set to "1" by setting bit 0 of the reserved external signal area 96n to "1" (step S5707). This means that the startup of the game start signal is reserved. Also, in the game start signal startup reservation process, if the setting data for the game start signal stored in bit 0 of the current external signal area 96m is "1" (step S5706: NO), i.e., if the game start signal corresponding to the previous game has not yet been turned off, the startup reservation flag 96o is set to "1" (step S5708). This means that the startup of the game start signal after the turn off is reserved.

Next, the base AT signal reservation processing executed in steps S5718 to S5722 of the normal processing (Figure 108) will be explained with reference to the flowchart in Figure 108.

In the base AT signal reservation process, it is first determined whether the system is in base AT state ST4 (step S5718). In step S5718, a positive determination is made if the base AT state flag in the various flags area 96i in the work area 96 for in-area processing is set to "1." If a positive determination is made in step S5718, it is then determined whether the base AT signal setting data stored in the first bit of the current external signal area 96m is "0" (step S5719).

If the game state at the end of the game is the base AT state ST4 and the setting data for the base AT signal is "0" (steps S5718 and S5719: YES), that is, if a transition to the base AT state ST4 occurs in the current game, the first bit of the reserved external signal area 96n is set to "1" to set the reservation data for the base AT signal to "1" (step S5720). This makes it so that the start-up of the base AT signal is reserved.

If the game state at the end of the game is the base AT state ST4 and the setting data for the base AT signal is "1" (step S5718: YES, step S5719: NO), that is, if the game is played in the base AT state ST4 and the base AT state ST4 does not end, proceed to step S5723 without executing processing to reserve a state change for the base AT signal. This causes the HI level of the base AT signal to be maintained.

If the game state at the end of the game is not the base AT state ST4 and the setting data for the base AT signal is "1" (step S5718: NO, step S5721: YES), that is, if the game is executed in the base AT state ST4 and a transition to the normal game state ST1 or the ending AT state ST5 occurs, the first bit of the reserved external signal area 96n is set to "0" to set the reservation data for the base AT signal to "0" (step S5722). This causes the falling of the base AT signal to be reserved.

If the gaming state at the end of the game is not the base AT state ST4 and the setting data for the base AT signal is "0" (step S5718: NO, step S5721: NO), that is, if the game is played in a gaming state other than the base AT state ST4 and no transition to the base AT state ST4 occurs, proceed to step S5723 without executing processing to reserve a state change for the base AT signal. This causes the base AT signal to remain at a LOW level.

Next, the external output processing executed by the main MPU 72 will be described with reference to the flowchart in Figure 113. As already explained, the external output processing is executed in step S5813 of the timer interrupt processing (Figure 109). Note that steps S6101 to S6123 in the external output processing are executed as in-area processing using the in-area processing program and in-area processing data.

If the reservation data for the game start signal stored in bit 0 of the reserved external signal area 96n is "1" (step S6101: YES), it is determined whether the setting data for the game start signal stored in bit 0 of the current external signal area 96m is "0" (step S6102). If the reservation data for the game start signal is "1" and the setting data is "0" (step S6101 and step S6102: YES), i.e., if the rising of the game start signal is reserved, it is determined whether the value of the first interval setting counter 96p is "0" (step S6103). If the value of the first interval setting counter 96p is "0" (step S6103: YES), i.e., if the rise prohibition period set at the falling edge of the game start signal (specifically, 300.98 milliseconds set in step S6106, described below) has elapsed, the game start signal is turned ON, thereby raising the game start signal output to the value number side MPU 142 from LOW to HIGH (step S6104).

Then, the reservation data for the game start signal ("1") is set to bit 0 of the current external signal area 96m, thereby updating the setting data for the game start signal to "1" (step S6105). This allows the main MPU 72 to determine that the game start signal is at a HI level based on the setting data for the game start signal. Furthermore, the reservation data and setting data for the game start signal are both "1", meaning that the falling edge of the game start signal is awaited.

Then, the numerical value "202", which corresponds to 300.98 milliseconds, is set in the first interval setting counter 96p (step S6106). This causes the first interval setting counter 96p to begin measuring the period during which the game start signal is prohibited from falling (300.98 milliseconds). In this way, when the game start signal is raised, the period during which the game start signal is prohibited from falling (300.98 milliseconds) is set.

If the value of the first interval setting counter 96p is not "0" (step S6103: NO), that is, if the startup prohibition period (300.98 milliseconds) set when the game start signal fell has not elapsed, the process proceeds to step S6113 without executing the processing of steps S6104 to S6106. This prevents the game start signal from being raised when the startup prohibition period (300.98 milliseconds) set when the game start signal rose has not elapsed. In this way, an interval equal to or greater than the occurrence period (300 milliseconds) of the transmission timing of the third gaming machine information notification is ensured between the falling and rising of the game start signal output to the value number side MPU 142.

Because the configuration allows the period from the start of a game until the end of that game and the start of the next game to be less than 300 milliseconds, the next game after that game can start before 300 milliseconds have elapsed since the game start signal corresponding to that game fell. In this configuration, where the next game after that game can start before 300 milliseconds have elapsed since the game start signal corresponding to that game fell, if the game start signal were raised at the start of the game regardless of the time elapsed since the game start signal fell, there is a risk that the game start signal would be raised to a high level after the game start signal fell to a low level but before the third gaming machine information notification setting process (step S5922) is executed. In other words, there is a risk that the third gaming machine information notification corresponding to the state in which the game start signal is at a low level will not be transmitted, even though the game start signal has fallen to a low level. If the third gaming machine information notification corresponding to the state in which the game start signal is at a low level is not transmitted, the external game start signal output from the card unit 130 to the gaming hall's management computer HC and data display device DH may not be turned off even when a game ends and the next game begins. In contrast, if the game start signal is turned off, the system is configured to wait for the turn-on prohibition period (300.98 milliseconds) set at the time of the turn-on to elapse, even when the game starts. This allows the duration of the low level game start signal to be set to 300 milliseconds or more, and the third gaming machine information notification setting process (step S5922) to be executed while the low level of the game start signal is maintained. This prevents the external game start signal output from the card unit 130 from not being turned off even when a game ends and the next game begins.

If the reservation data and setting data for the game start signal are "1" (step S6101: YES, step S6102: NO), i.e., if the game start signal is being raised and is waiting to fall, it is determined whether the value of the first interval setting counter 96p is "0" (step S6107). If the value of the first interval setting counter 96p is "0" (step S6107: YES), i.e., if the prohibition period for falling (300.98 milliseconds) set when the game start signal was raised has elapsed, the game start signal is turned OFF, thereby lowering the game start signal output to the value number side MPU 142 from HIGH to LOW (step S6108).

As already explained, this configuration allows the period from the start of a game to the end of the game to be less than 300 milliseconds. In this configuration, if the game start signal were to be deactivated at the end of a game regardless of the time elapsed since the game start signal was activated, there is a risk that the game start signal would be deactivated to a low level after the game start signal was activated to a high level and before the third gaming machine information notification setting process (step S5922) was executed. In other words, there is a risk that the third gaming machine information notification corresponding to the state in which the game start signal is at a high level would not be transmitted. Thus, if the game start signal is activated but the third gaming machine information notification corresponding to the state in which the game start signal is at a high level is not transmitted, the external game start signal output from the card unit 130 to the gaming hall's management computer HC and data display device DH would not be activated, even though a game had been played. In contrast, this configuration prevents the game start signal from deactivating until the deactivation prohibition period (300.98 milliseconds) set at the time the game start signal was activated has elapsed. This allows the duration of the HIGH level game start signal to be 300 milliseconds or more, and the third gaming machine information notification setting process (step S5922) to be executed while the HIGH level game start signal is maintained. This prevents situations where the external game start signal output from the card unit 130 is not raised even though a game has been played.

After the game start signal is raised, the game start signal is lowered based on the lapse of the prohibition period (300.98 milliseconds) set when the game start signal was raised, regardless of whether the game has ended. As a result, if the game execution period exceeds 300.98 milliseconds, the timing of the game start signal lowering in this configuration can be set to a timing earlier than the timing of the game start signal lowering in a configuration in which the game start signal is lowered when the game ends. By advancing the timing of the game start signal lowering, the timing of the prohibition period (300.98 milliseconds) set when the game start signal lowers can be advanced. As a result, if the game execution period exceeds 300.98 milliseconds, the possibility of a wait period for the game start signal to be raised when the next game starts can be reduced, and if a wait period for the game start signal to be raised occurs, this wait period can be shortened.

After the game start signal is turned OFF in step S6108, the 0th bit of the current external signal area 96m is cleared to "0" to update the setting data for the game start signal to "0" (step S6109). This allows the main MPU 72 to determine that the game start signal is at a LOW level based on the setting data for the game start signal.

After that, if the value of the start reservation flag 96o is "0" (step S6110: NO), that is, if the start after the fall of the game start signal is not reserved, the 0th bit of the reserved external signal area 96n is cleared to "0" to update the reservation data for the game start signal to "0" (step S6111). This results in a state where the reservation data and setting data for the game start signal are "0", that is, a state where the start of the game start signal is not reserved or the fall of the game start signal is not reserved.

If the start reservation flag 96o is set to "1" (step S6110: YES), that is, if the start after the fall of the game start signal is reserved, the 0th bit of the reserved external signal area 96n is set to "1" and the start reservation flag 96o is cleared to "0" (step S6112). This results in a state where the reservation data for the game start signal is "1" and the setting data is "0", that is, a state where the start of the game start signal is reserved.

In this way, if a game ends and the next game of that game starts during the prohibited fall period (300.98 milliseconds) set when the game start signal was raised, and the rise reservation flag 96o is set to "1," the rise of the game start signal will be reserved based on the fact that the prohibited fall period of the game start signal has elapsed and the game start signal has fallen. This means that even if a game ends and the next game of that game starts during the prohibited fall period set when the game start signal was raised, the game start signal can be raised in response to the start of the next game.

If the processing of step S6111 or step S6112 has been performed, the process proceeds to step S6106, which has already been explained, and the numerical information "202", which corresponds to 300.98 milliseconds, is set in the first interval setting counter 96p. This causes the first interval setting counter 96p to begin measuring the rise prohibition period (300.98 milliseconds) of the game start signal. In this way, when the game start signal falls, the rise prohibition period (300.98 milliseconds) of the game start signal is set, regardless of whether a rise after the fall of the game start signal was scheduled.

When the game start signal is turned OFF in step S6108, a startup prohibition period (300.98 milliseconds) is set even if a startup after a fall in the game start signal is scheduled. Therefore, when the processing of step S6112 is executed and a startup of the game start signal is scheduled, the startup of the game start signal will be put on hold until the startup prohibition period (300.98 milliseconds) set in step S6106 has elapsed.

In this way, the timer counter that sets the game start signal fall prohibition period (300.98 milliseconds) when the game start signal rises is the same timer counter (specifically, the first interval setting counter 96p) that sets the game start signal rise prohibition period (300.98 milliseconds) when the game start signal falls. This allows for a reduction in the number of timer counters in the main RAM 74 compared to a configuration in which a timer counter that sets the game start signal rise prohibition period is provided as a separate timer counter from the timer counter that sets the game start signal fall prohibition period.

The game start signal fall prohibition period that is set when the game start signal is raised is set to the same length (300.98 milliseconds) as the game start signal rise prohibition period that is set when the game start signal is lowered. This simplifies the processing configuration of the external output processing (Figure 113) by making the processing for setting the game start signal fall prohibition period the same processing (step S6106) as the processing for setting the game start signal rise prohibition period.

If the value of the first interval setting counter 96p is not "0" (step S6107: NO), that is, if the prohibition period (300.98 milliseconds) set when the game start signal was raised has not elapsed, the process proceeds to step S6113 without executing the processes of steps S6107 to S6112 and step S6106. This prevents the game start signal from being lowered when the prohibition period (300.98 milliseconds) set when the game start signal was raised has not elapsed. In this way, an interval equal to or greater than the occurrence period (300 milliseconds) of the transmission timing of the third gaming machine information notification is ensured between the rise and fall of the game start signal output to the value number side MPU 142.

If a negative judgment is made in step S6101, if a negative judgment is made in step S6103, if processing of step S6106 is performed, or if a negative judgment is made in step S6107, it is determined whether the reservation data of the base AT signal stored in the first bit of the reserved external signal area 96n is "1" (step S6113), and if the reservation data of the base AT signal is "1" (step S6113: YES), it is determined whether the setting data of the base AT signal stored in the first bit of the current external signal area 96m is "0" (step S6114).

If the reservation data of the base AT signal is "1" and the setting data is "0" (steps S6113 and S6114: YES), i.e., if the rise of the base AT signal is reserved, it is determined whether the value of the second interval setting counter 96q is "0" (step S6115). If the value of the second interval setting counter 96q is "0" (step S6115: YES), i.e., if the rise prohibition period set at the fall of the base AT signal (specifically, 300.98 milliseconds set in step S6118, described below) has elapsed, the base AT signal ON processing is executed to raise the base AT signal output to the value side MPU 142 to a HIGH level (step S6116).

If a winning entry to the base AT state ST4 occurs in the first game played after the condition for terminating the base AT state ST4 (the value of the AT difference counter 96e becoming "0") is met and the game enters the normal gaming state ST1, or if the value of the release game number counter 96g becomes "0," the gaming state at the end of that game will become the base AT state ST4. In this way, after a reservation for lowering the base AT signal is made at the end of one game, a reservation for raising the base AT signal may be made at the end of the next game. Also, as already explained, the period from the end of one game to the state in which all reels 32L, 32M, and 32R are stopped in the next game may be less than 300 milliseconds. In this configuration, if the base AT signal is raised or lowered when all reels 32L, 32M, and 32R are stopped, there is a risk that the base AT signal will be raised to the HIGH level after the base AT signal is lowered to the LOW level and before the third gaming machine information notification setting process (step S5922) is executed. In other words, even if the base AT signal is turned down to a LOW level, there is a risk that the third gaming machine information notification corresponding to the state in which the base AT signal is at a LOW level will not be transmitted. Furthermore, if the third gaming machine information notification corresponding to the state in which the base AT signal is at a LOW level is not transmitted, a situation may arise in which the external base AT signal output from the card unit 130 to the gaming hall's management computer HC and data display device DH is not turned down even if a new transition to the base AT state ST4 occurs after the base AT state ST4 ends. In contrast, when the base AT signal is turned down, the base AT signal is kept on standby until the turn-up prohibition period (300.98 milliseconds) set at the time of the turn-up of the base AT signal has elapsed, even if the game ends while the gaming state is in the base AT state ST4. This allows the duration of the LOW level state of the base AT signal to be set to 300 milliseconds or more, and the setting process for the third gaming machine information notification (step S5922) to be executed while the LOW level of the base AT signal is maintained. This prevents the external base AT signal being output from the card unit 130 from falling even though a transition to a new base AT state ST4 occurs after the base AT state ST4 has ended.

After the base AT signal is turned ON in step S6116, the base AT signal reservation data ("1") is set to the first bit of the current external signal area 96m, thereby updating the base AT signal setting data to "1" (step S6117). This allows the main MPU 72 to determine that the base AT signal is at a HI level based on the base AT signal setting data. Furthermore, the base AT signal reservation data and setting data are set to "1", i.e., no reservation has been made for the base AT signal to rise or fall.

Then, the numerical information "202", which corresponds to 300.98 milliseconds, is set in the second interval setting counter 96q (step S6118). This causes the second interval setting counter 96q to start measuring the base AT signal fall prohibition period (300.98 milliseconds). In this way, when the base AT signal is raised, the base AT signal fall prohibition period (300.98 milliseconds) is set.

If the value of the second interval setting counter 96q is not "0" (step S6115: NO), that is, if the startup prohibition period (300.98 milliseconds) set when the base AT signal fell has not elapsed, the process proceeds to step S6123 without executing the processing of steps S6116 to S6118. This prevents the base AT signal from being started when the startup prohibition period (300.98 milliseconds) set when the base AT signal fell has not elapsed. In this way, an interval equal to or greater than the occurrence period (300 milliseconds) of the transmission timing of the third gaming machine information notification is ensured between the falling and rising of the base AT signal output to the value number side MPU 142.

If the reservation data and setting data of the base AT signal are "1" (step S6113: YES, step S6114: NO), that is, if the base AT signal is not scheduled to fall after it has risen, proceed to step S6123 without performing any processing to change the state of the base AT signal. This maintains the HI level of the base AT signal.

If the reservation data of the base AT signal is "0" and the setting data is "1" (step S6113: NO, step S6119: YES), i.e., if the fall of the base AT signal is reserved, it is determined whether the value of the second interval setting counter 96q is "0" (step S6120). If the value of the second interval setting counter 96q is "0" (step S6120: YES), i.e., if the fall prohibition period (300.98 milliseconds) set when the base AT signal was raised has elapsed, the base AT signal is turned OFF, thereby lowering the base AT signal output to the value side MPU 142 to a LOW level (step S6121).

If the pre-ending condition (the condition that the value of the total winnings counter 96d is equal to or greater than "65321") is met in the first game played after transitioning to base AT state ST4, the game state at the end of that game will be a game state other than base AT state ST4 (specifically, ending AT state ST5). Thus, after the base AT signal is raised at the end of one game, the base AT signal may be lowered at the end of the next game. Furthermore, as already explained, this configuration allows the period from the end of one game to the end of the next game to be less than 300 milliseconds. In this configuration, if the base AT signal is raised or lowered at the end of a game, there is a risk that the base AT signal will be lowered to LOW after being raised to HIGH level and before the third gaming machine information notification setting process (step S5922) is executed. In other words, there is a risk that the third gaming machine information notification corresponding to the state in which the base AT signal is HIGH level will not be transmitted. In this way, if the base AT signal is raised but the third gaming machine information notification corresponding to the state in which the base AT signal is at a HIGH level is not transmitted, the external base AT signal output from the card unit 130 to the gaming hall's management computer HC and data display device DH will not be raised even if a gaming state other than the base AT state ST4 (ending AT state ST5) is reached after a transition to the base AT state ST4. In contrast, when the base AT signal is raised, the base AT signal is not lowered until the prohibition period (300.98 milliseconds) set at the time of raising the base AT signal has elapsed. This allows the duration of the base AT signal at a HIGH level to be set to 300 milliseconds or more, and the setting process for the third gaming machine information notification (step S5922) can be executed while the base AT signal is maintained at a HIGH level. This prevents a situation in which the external base AT signal output from the card unit 130 is not raised even if a gaming state other than the base AT state ST4 is reached after a transition to the base AT state ST4.

After the base AT signal is turned OFF in step S6121, the base AT signal reservation data ("0") is set to the first bit of the current external signal area 96m, thereby updating the base AT signal setting data to "0" (step S6122). This allows the main MPU 72 to determine that the base AT signal is at a LOW level based on the base AT signal setting data.

Then, the process proceeds to step S6118, which has already been described, and the numerical information "202", which corresponds to 300.98 milliseconds, is set in the second interval setting counter 96q. This causes the second interval setting counter 96q to begin measuring the base AT signal rise prohibition period (300.98 milliseconds). In this way, when the base AT signal is lowered, the base AT signal rise prohibition period (300.98 milliseconds) is set.

If the reservation data and setting data of the base AT signal are "0" (steps S6113 and S6119: NO), that is, if the rising of the base AT signal is not reserved after the falling of the base AT signal, proceed to step S6123 without performing any processing to change the state of the base AT signal. This maintains the LOW level of the base AT signal.

In this way, the timer counter that sets the base AT signal fall prohibition period (300.98 milliseconds) when the base AT signal rises is the same timer counter (specifically, the second interval setting counter 96q) that sets the base AT signal rise prohibition period (300.98 milliseconds) when the base AT signal falls. This allows for a reduction in the number of timer counters in the main RAM 74 compared to a configuration in which a timer counter that sets the base AT signal rise prohibition period is provided as a separate timer counter from the timer counter that sets the base AT signal fall prohibition period.

The base AT signal fall prohibition period set when the base AT signal is raised is set to the same length (300.98 milliseconds) as the base AT signal rise prohibition period set when the base AT signal is lowered. This simplifies the processing configuration of the external output processing (Figure 113) by making the processing for setting the base AT signal fall prohibition period the same processing (step S6118) as the processing for setting the base AT signal rise prohibition period.

If a negative judgment is made in step S6114, if a negative judgment is made in step S6115, if processing of step S6118 is performed, if a negative judgment is made in step S6119, or if a negative judgment is made in step S6120, the error information transmission processing described below is executed (step S6123).

Next, the changes in the state of the game start signal output from the main MPU 72 to the value number MPU 142 will be described with reference to the time chart in Figure 114. Figure 114(a) shows the state of the game start signal output to the value number MPU 142, Figure 114(b) shows the value of the reservation data for the game start signal stored in bit 0 of the reserved external signal area 96n, Figure 114(c) shows the value of the setting data for the game start signal stored in bit 0 of the current external signal area 96m, Figure 114(d) shows the period during which the game start signal is prohibited from falling, Figure 114(e) shows the period during which the game start signal is prohibited from rising, Figure 114(f) shows the period during which the game is being executed, and Figure 114(g) shows the period during which one or more reels 32L, 32M, 32R are spinning.

When the game (first game) starts at timing t1 as shown in Figure 114(f), provided that it is not during a period in which the game start signal is prohibited from falling, the 0th bit of the reserved external signal area 96n is set to "1" as shown in Figure 114(b), reserving the rising edge of the game start signal. Incidentally, as already explained, if the game starts during a period in which the game start signal is prohibited from falling, the 0th bit of the rise reservation flag 96o is set to "1", reserving the rising edge of the game start signal after it has fallen.

Then, at timing t2, when the first timer interrupt process (Figure 109) is executed after the start of the first game, an acceleration period (specifically, 208.6 milliseconds) for all reels 32L, 32M, and 32R begins, as shown in Figure 114(g), provided that the elapsed time since the previous spin of reels 32L, 32M, and 32R exceeds the 4.1-second wait time. Also at timing t2, the game start signal rises from low to high, as shown in Figure 114(a), and the "1" data set in bit 0 of the reserved external signal area 96n is set to bit 0 of the current external signal area 96m, as shown in Figure 114(c), thereby updating the setting data for the game start signal. Also at timing t2, the first interval setting counter 96p is set to "202." This initiates a period (300.98 milliseconds) during which the game start signal is prohibited from falling, as shown in Figure 114(d).

Then, at timing t3, all reels 32L, 32M, and 32R are stopped as shown in Figure 114(g), and the first game ends as shown in Figure 114(f). In this way, if the period from when the game start signal corresponding to the first game is raised to when the first game ends is less than 300.98 milliseconds, the first game may end before the fall prohibition period (300.98 milliseconds) set when the game start signal was raised has elapsed. If, at timing t3, 300.98 milliseconds have not yet elapsed since the game start signal was raised, the fall of the game start signal is postponed until the value of the first interval setting counter 96p reaches "0."

Then, at time t4, 300.98 milliseconds after time t2, the value of the first interval setting counter 96p becomes "0," thereby ending the fall prohibition period of the game start signal, as shown in FIG. 114(d). Then, based on the end of the fall prohibition period, the game start signal falls to a low level, as shown in FIG. 114(a). Also, at time t4, the first interval setting counter 96p is set to the value "202." This initiates the rise prohibition period (300.98 milliseconds) of the game start signal, as shown in FIG. 114(e). Furthermore, at time t4, bit 0 of the current external signal area 96m is cleared to "0," as shown in FIG. 114(c), thereby updating the setting data for the game start signal. Furthermore, provided that bit 0 of the launch reservation flag 96o is "0," bit 0 of the reserved external signal area 96n is cleared to "0," as shown in FIG. 114(b). This causes the setting data and reservation data for the game start signal to be set to "0." Incidentally, as already explained, if the value of bit 0 of the start reservation flag 96o is "1," meaning that the start of the game start signal after its fall is reserved, then bit 0 of the reserved external signal area 96n is set to "1," and the start of the game start signal is reserved.

After that, when the game following the first game (second game) starts at timing t5, which is the prohibition period for raising the game start signal, as shown in Figure 114(f), a "1" is set to bit 0 of the reserved external signal area 96n, as shown in Figure 114(b). This causes the raising of the game start signal to be reserved, but the raising of the game start signal is put on hold until the value of the first interval setting counter 96p reaches "0".

Then, at time t6, 300.98 milliseconds after time t4, the value of the first interval setting counter 96p becomes "0," thereby ending the rise prohibition period of the game start signal, as shown in FIG. 114(e). Then, based on the end of the rise prohibition period of the game start signal while the rise of the game start signal is reserved, the game start signal is raised to a high level, as shown in FIG. 114(a). Also, at time t6, the data "1" set in bit 0 of the reserved external signal area 96n is set to bit 0 of the current external signal area 96m, as shown in FIG. 114(c), thereby updating the setting data of the game start signal. Also, at time t6, the numerical information "202" is set in the first interval setting counter 96p. This begins the fall prohibition period (300.98 milliseconds) of the game start signal, as shown in FIG. 114(d).

Then, at time t7, 300.98 milliseconds after time t6, the value of the first interval setting counter 96p becomes "0," thereby ending the game start signal fall prohibition period, as shown in FIG. 114(d). Then, based on the end of the game start signal fall prohibition period, the game start signal falls to a low level, as shown in FIG. 114(a). Also, at time t7, the first interval setting counter 96p is set to the value "202." This initiates the game start signal rise prohibition period (300.98 milliseconds), as shown in FIG. 114(e). Furthermore, at time t7, bit 0 of the current external signal area 96m is cleared to "0," as shown in FIG. 114(c), thereby updating the game start signal setting data. Furthermore, provided that bit 0 of the launch reservation flag 96o is set to "0," bit 0 of the reserved external signal area 96n is cleared to "0," as shown in FIG. 114(b). This will result in the setting data and reservation data for the game start signal being set to "0".

Then, at time t8, 300.98 milliseconds after time t7, the value of the first interval setting counter 96p becomes "0," thereby ending the startup prohibition period that was set when the game start signal fell, as shown in Figure 114(e). Then, at time t9, 4.1 seconds after time t2, when the acceleration period for reels 32L, 32M, and 32R began in the first game, the acceleration period for reels 32L, 32M, and 32R in the second game begins, as shown in Figure 114(g).

In this way, the wait time from the start of the acceleration period for reels 32L, 32M, and 32R in a first game until the start of the acceleration period for reels 32L, 32M, and 32R in a second game following that first game is set to a period (4.1 seconds) longer than the total period (601.96 milliseconds) of the fall prohibition period (300.98 milliseconds) set at the rising edge of the game start signal and the rise prohibition period (300.98 milliseconds) set at the falling edge of the game start signal. Therefore, if a first game ends before the falling edge of the game start signal corresponding to that first game and a second game starts before the rise prohibition period set at the falling edge of the game start signal corresponding to the first game has elapsed, the rise prohibition period (300.98 milliseconds) set at the falling edge of the game start signal corresponding to the first game will end before the start of the acceleration period for reels 32L, 32M, and 32R in the second game following that first game (timing t9). Furthermore, although not shown in the figures, if a first game ends after the game start signal corresponding to the first game falls and a second game starts during the startup prohibition period established when the game start signal corresponding to the first game fell, the startup prohibition period (300.98 milliseconds) established when the game start signal corresponding to the first game fell will end before the acceleration period for reels 32L, 32M, and 32R begins in the second game following the first game. As a result, even if the startup of the game start signal corresponding to the second game is delayed until the startup prohibition period established when the game start signal corresponding to the first game fell has elapsed, the startup of the game start signal corresponding to the second game can be set to occur before the acceleration period for reels 32L, 32M, and 32R begins in the second game.

The wait time from when the acceleration period for reels 32L, 32M, and 32R begins in the first game until when the acceleration period for reels 32L, 32M, and 32R begins in the second game following that first game is longer (4.1 seconds) than the total period (1203.92 milliseconds) of the fall prohibition period (300.98 milliseconds) and rise prohibition period (300.98 milliseconds) of the game start signal corresponding to the first game and the fall prohibition period (300.98 milliseconds) and rise prohibition period (300.98 milliseconds) of the game start signal corresponding to the second game. As a result, the period from the time when the game start signal corresponding to the first game is raised (time t2) to the time when the second game following that first game is started (time t5) is shorter than the total period (601.96 milliseconds) of the game start signal fall prohibition period (300.98 milliseconds) and rise prohibition period (300.98 milliseconds). Even if a state occurs in which the rise of the game start signal is on hold after the start of the second game, the rise prohibition period set when the game start signal corresponding to the second game falls can end before the start of the acceleration period of reels 32L, 32M, and 32R in the second game.

In this way, by configuring the system so that the event of waiting for the game start signal corresponding to that game to be raised until the prohibition period for raising the game start signal has elapsed at the start of the game does not occur for two or more consecutive games, the waiting period from the start of the game to the time when the game start signal corresponding to that game is raised is prevented from cumulatively extending as the number of times the game is played increases.

Next, the changes in the state of the base AT signal output from the main side MPU 72 to the value number side MPU 142 will be explained with reference to the time chart in Figure 115. Figure 115(a) shows the state of the base AT signal, Figure 115(b) shows the value of the reservation data for the base AT signal stored in the first bit of the reserved external signal area 96n, Figure 115(c) shows the value of the setting data for the base AT signal stored in the first bit of the current external signal area 96m, Figure 115(d) shows the period during which the base AT signal is prohibited from falling, Figure 115(e) shows the period during which the base AT signal is prohibited from rising, Figure 115(f) shows the period during which the game is being executed, and Figure 115(g) shows the period during which one or more reels 32L, 32M, 32R are spinning.

First, we will explain the state change of the base AT signal when a transition to base AT state ST4 occurs in one game (first game), and a transition to ending AT state ST5 occurs in the game following that first game (second game).

At timing t1, all reels 32L, 32M, and 32R are stopped as shown in Figure 115(g), and the game (first game) ends as shown in Figure 115(f). If the game state at the end of the first game is base AT state ST4 and the base AT signal is at a LOW level, i.e., if the game in which the transition to base AT state ST4 occurred ends, then at timing t1, the first bit of the reserved external signal area 96n is set to "1" as shown in Figure 115(b), provided that the base AT signal is not in a prohibited period for falling. This results in a state where the reservation data for the base AT signal is "1" and the setting data is "0," i.e., the rising of the base AT signal is reserved.

Then, at timing t2 when the first timer interrupt process (FIG. 109) is executed after the base AT signal reservation process (steps S5718 to S5722) is executed, the base AT signal is raised to a HIGH level as shown in FIG. 115(a), and the numerical information "202" is set in the second interval setting counter 96q, thereby starting the base AT signal fall prohibition period (300.98 milliseconds) as shown in FIG. 115(d). Also, at timing t2, the base AT signal reservation data ("1") is set in the first bit of the current external signal area 96m as shown in FIG. 115(c), and the base AT signal setting data is updated to "1."

Then, at timing t3, which is the period during which the base AT signal is prohibited from falling, the game following the first game (second game) begins, as shown in Figure 115(f). Then, at timing t4, when the first timer interrupt process (Figure 109) is executed after the start of the second game, an acceleration period (specifically, 208.6 milliseconds) begins for all reels 32L, 32M, and 32R, as shown in Figure 115(g), provided that the elapsed time since the previous start of rotation of reels 32L, 32M, and 32R exceeds the wait time of 4.1 seconds.

After that, at timing t5, which is the period during which the base AT signal is prohibited from falling, all reels 32L, 32M, and 32R are stopped as shown in Figure 115(g), and the second game ends as shown in Figure 115(f). Also, if the game state at the end of the game is a game state other than base AT state ST4 (specifically, ending AT state ST5), then at timing t5, as shown in Figure 115(b), the first bit of the reserved external signal area 96n is set to "0". This results in a state where the reservation data of the base AT signal is "0" and the setting data is "1", i.e., the falling of the base AT signal is reserved.

Then, at time t6, 300.98 milliseconds after time t2, the value of the second interval setting counter 96q becomes "0," thereby ending the base AT signal fall prohibition period, as shown in FIG. 115(d). Then, based on the end of this fall prohibition period, the base AT signal falls to a low level, as shown in FIG. 115(a), and the second interval setting counter 96q is set to the value "202," thereby starting the base AT signal rise prohibition period (300.98 milliseconds), as shown in FIG. 115(e). Also, at time t6, the base AT signal reservation data ("0") is set in the first bit of the current external signal area 96m, as shown in FIG. 115(c), and the base AT signal setting data is updated to "0." This causes the base AT signal setting data and reservation data to be set to "0."

In this way, if a game ends during the prohibited fall period (300.98 milliseconds) set when the base AT signal is raised, and the gaming state at the end of the game is a gaming state other than base AT state ST4 (ending AT state ST5), the base AT signal will be put into a state of waiting for the prohibited fall period of the base AT signal to elapse. This makes it possible to set the duration of the state in which the base AT signal is raised to a HI level to a period of 300 milliseconds or more, and to transmit a third gaming machine information notification in which information corresponding to the HI level of the base AT signal is set.

Next, we will explain the state changes of the base AT signal when the conditions for terminating the base AT state ST4 are met in one game (first game), transitioning to the normal gaming state ST1, and when a win for transitioning to the base AT state ST4 occurs in the game (second game) following the first game, or when the value of the release game number counter 96g becomes "0", transitioning to the base AT state ST4, and when the conditions before the ending occur in the game (third game) following the second game, transitioning to the ending AT state ST5.

At timing t7, all reels 32L, 32M, and 32R are stopped as shown in Figure 115(g), and the game (first game) ends as shown in Figure 115(f). If the gaming state at the end of the first game is normal gaming state ST1 and the base AT signal is at HI level, i.e., if the game ends in which a transition from base AT state ST4 to normal gaming state ST1 has occurred, then at timing t7, as shown in Figure 115(b), the first bit of the reserved external signal area 96n is set to "0," provided that the base AT signal is not in a prohibited period for rising. This results in a state in which the reservation data for the base AT signal is "0" and the setting data is "1," i.e., a state in which the falling of the base AT signal is reserved.

Then, at timing t8 when the first timer interrupt process (FIG. 109) is executed after the base AT signal reservation process (steps S5718 to S5722) is executed, the base AT signal is pulled down to a LOW level as shown in FIG. 115(a), and the numerical information "202" is set in the second interval setting counter 96q, thereby starting the base AT signal rise prohibition period (300.98 milliseconds) as shown in FIG. 115(e). Also, at timing t8, the base AT signal reservation data ("0") is set in the first bit of the current external signal area 96m as shown in FIG. 115(c), and the base AT signal setting data is updated to "0."

Then, at timing t9, which is the period during which the base AT signal is prohibited from being raised, the game following the first game (second game) begins, as shown in Figure 115(f). Then, at timing t10, when the first timer interrupt process (Figure 109) is executed after the start of the second game, an acceleration period (specifically, 208.6 milliseconds) begins for all reels 32L, 32M, and 32R, as shown in Figure 115(g), provided that the elapsed time since the previous start of rotation of reels 32L, 32M, and 32R exceeds the wait time of 4.1 seconds.

After that, at timing t11, which is the period during which the base AT signal is prohibited from falling, all reels 32L, 32M, and 32R are stopped as shown in Figure 115(g), and the second game ends as shown in Figure 115(f). Also, if the game state at the end of the game is base AT state ST4, at timing t11, as shown in Figure 115(b), the first bit of the reserved external signal area 96n is set to "1". This results in a state where the reservation data of the base AT signal is "1" and the setting data is "0", i.e., the rising of the base AT signal is reserved.

Then, at time t12, 300.98 milliseconds after time t8, the value of the second interval setting counter 96q becomes "0," thereby ending the base AT signal rise inhibition period, as shown in FIG. 115(e). Then, based on the end of this rise inhibition period, the base AT signal rises to a HIGH level, as shown in FIG. 115(a), and the second interval setting counter 96q is set to the value "202," thereby starting the base AT signal fall inhibition period (300.98 milliseconds), as shown in FIG. 115(e). Also, at time t12, the base AT signal reservation data ("1") is set in the first bit of the current external signal area 96m, as shown in FIG. 115(c), and the base AT signal setting data is updated to "1." This causes the base AT signal setting data and reservation data to be set to "1."

In this way, if a game ends during the startup prohibition period (300.98 milliseconds) set when the base AT signal falls, and the gaming state at the end of the game is base AT state ST4, the base AT signal will be put into a state of waiting to be started until the base AT signal startup prohibition period has elapsed. This makes it possible to set the duration of the state in which the base AT signal is lowered to a LOW level to a period of 300 milliseconds or more, and to transmit a third gaming machine information notification containing information corresponding to the LOW level of the base AT signal.

Then, at timing t13, the game following the second game (third game) begins, as shown in Figure 115(f). If the 4.1 second wait time has not elapsed since the start of rotation of reels 32L, 32M, and 32R in the second game (timing t10), the game enters a state of waiting for the start of rotation of reels 32L, 32M, and 32R, as shown in Figure 115(g). Then, at timing t14, the value of second interval setting counter 96q becomes "0" as shown in Figure 115(d), and the base AT signal fall prohibition period ends.

Then, at time t15, 4.1 seconds after time t10, reels 32L, 32M, and 32R begin to rotate, as shown in Figure 115(g). Then, at time t16, all reels 32L, 32M, and 32R are stopped, as shown in Figure 115(g), and the third game ends, as shown in Figure 115(f). If the game state at the end of the third game is not the base AT state ST4 (ending AT state ST5), then at time t16, "0" is set to bit 0 of the reserved external signal area 96n, as shown in Figure 115(b). This results in a state where the reservation data of the base AT signal is "0" and the setting data is "1," i.e., a state in which the falling edge of the base AT signal is scheduled.

Then, at timing t17, when the timer interrupt process (Fig. 109) is executed for the first time after all reels 32L, 32M, and 32R have stopped, the base AT signal is pulled down to a LOW level as shown in Fig. 115(a), and a period during which the base AT signal is inhibited from rising is set as shown in Fig. 115(e). Furthermore, the reservation data ("0") for the base AT signal is set in the first bit of the current external signal area 96m, and the setting data for the base AT signal is updated to "0."

In this way, if the wait time (4.1 seconds) set when reels 32L, 32M, and 32R start spinning in one game (specifically, the second game) has not yet elapsed, the start of spinning of reels 32L, 32M, and 32R in the game following that game (specifically, the third game) is put on hold until that wait time has elapsed. Furthermore, the shortest period (272.67 milliseconds) from when reels 32L, 32M, and 32R start spinning until all reels 32L, 32M, and 32R are stopped is longer than half of 300.98 milliseconds. In this way, the third game will not end during the base AT signal rise prohibition period set when the first game ends. This prevents a situation in which the base AT signal rise and fall reservations are set at the same time.

As described above, when the rise of the game start signal is scheduled, the main MPU 72 raises the game start signal on the condition that 300.98 milliseconds have elapsed since the fall of the game start signal. This reduces the possibility that the period between the fall of the game start signal and its rise will be less than 300 milliseconds. Therefore, it reduces the possibility that the third gaming machine information notification setting process (step S5922) will not be executed even once during the period between the fall of the game start signal and its rise.

The main MPU 72 turns off the game start signal when 300.98 milliseconds have elapsed since the game start signal was turned on. This reduces the possibility that the period from when the game start signal is turned on to when it is turned off will be less than 300 milliseconds. This reduces the possibility that the third gaming machine information notification setting process (step S5922) will not be executed even once during the period from when the game start signal is turned on to when it is turned off.

When a game that has transitioned to base AT state ST4 ends, the main MPU 72 raises the base AT signal, provided that the prohibition period (300.98 milliseconds) set at the time the base AT signal falls has elapsed. This reduces the possibility that the period from the fall of the base AT signal to its rise will be less than 300 milliseconds. This reduces the possibility that the third gaming machine information notification setting process (step S5922) will not be executed even once during the period from the fall of the base AT signal to its rise.

When a game ends in which a transition from the base AT state ST4 to the normal gaming state ST1 or the ending AT state ST5 has occurred, the main MPU 72 will turn off the base AT signal, provided that the turn-off prohibition period (300.98 milliseconds) set when the base AT signal was turned on has elapsed. This reduces the possibility that the period from when the base AT signal is turned on to when it is turned off will be less than 300 milliseconds. This reduces the possibility that the third gaming machine information notification setting process (step S5922) will not be executed even once during the period from when the base AT signal is turned on to when it is turned off.

<Configuration for displaying an error>
Next, the configuration for displaying an error on the image display device 63 will be described. As shown in FIG. 112(a), the work area 96 for in-area processing is provided with a current error information counter 96r and a previous error information counter 96s. The current error information counter 96r is a counter in which error information corresponding to the occurrence of an error in the slot machine 10 is set. When the error information set in the current error information counter 96r is changed, the master MPU 72 transmits an error command set with the changed error information to the presentation MPU 92. The presentation MPU 92 controls the display of the image display device 63 so that an error display corresponding to the error information set in the error command received from the master MPU 72 is displayed. The previous error information counter 96s is a counter that allows the master MPU 72 to grasp the error information set in the error command sent to the presentation MPU 92.

Figure 116(a) is an explanatory diagram for explaining errors recognized by the main MPU 72 and the error information corresponding to those errors. As shown in Figure 116(a), the errors recognized by the main MPU 72 include "award limit reached" for which error information "1" is set, "unit connection abnormality" for which error information "2" is set, "owned gaming value full" for which error information "3" is set, "award abnormality" for which error information "4" is set, and "bet abnormality" for which error information "5" is set. Furthermore, error information "0" corresponds to an "error-cleared state" in which none of these five types of errors have occurred.

"Award limit reached" is an error that occurs when MY (the maximum difference in number of coins calculated after power-on) reaches "19,000." "Unit connection abnormality" is an error that occurs when the first connection confirmation signal received by the value counter side MPU 142 from the connection terminal board 128 is detected as being at a high level a predetermined number of times in succession (specifically, twice). When a "unit connection abnormality" occurs, the value counter side MPU 142 switches the connection confirmation signal being output to the main side MPU 72 from a low level to a high level. The main side MPU 72 determines that a "unit connection abnormality" has not occurred based on the fact that the connection confirmation signal input from the value counter side MPU 142 to the main side MPU 72 is at a low level, and determines that a "unit connection abnormality" has occurred based on the fact that the connection confirmation signal is at a high level.

"Owned gaming value number full" is an error that occurs when the number of owned gaming values stored in the value number RAM 144 exceeds the maximum value of "16,368." The main MPU 72 determines that "Owned gaming value number full" has not occurred based on the value number full signal input to the main MPU 72 from the value number RAM 142 being at a LOW level, and determines that "Owned gaming value number full" has occurred based on the value number full signal being at a HI level.

An "awarding error" is an error that occurs when the main MPU 72 sends a grant request command to the value number side MPU 142 and then receives a grant request response command from the value number side MPU 142 with a grant execution number different from the requested grant number set in the grant request command, or when the main MPU 72 fails to receive a grant request response command from the value number side MPU 142 within a specified period (specifically, within 300.98 milliseconds) after sending a grant request command to the value number side MPU 142. A "betting error" is an error that occurs when the main MPU 72 sends a betting request command to the value number side MPU 142 and then receives a betting request response command from the value number side MPU 142 with a betting execution number different from the requested betting number set in the betting request command, or when the main MPU 72 fails to receive a betting request response command from the value number side MPU 142 within a specified period (specifically, within 300.98 milliseconds) after sending a betting request command to the value number side MPU 142.

When at least one error corresponding to the error information "1" through "5" occurs, a game suspension state occurs in which a new game cannot be started. The game suspension state is released when no errors corresponding to the error information "1" through "5" occur. As already explained in the first embodiment above, in the main processing (FIG. 13), when the supply of operating power to the slot machine 10 is initiated after the setting key has been turned ON, if the reset button 56 was not pressed when the supply of operating power began, a partial area clear process (step S105) is executed. If the reset button 56 was pressed when the supply of operating power began, a full area clear process (step S106) is executed. When the partial area clear process (step S105) or the full area clear process (step S106) is executed in the main processing (FIG. 13), the values of the current error information counter 96r and the previous error information counter 96s are cleared to "0." However, if the "unit connection abnormality" has not been resolved, the error information ("2") corresponding to that "unit connection abnormality" will be set in the current error information counter 96r in the error information update process (FIG. 118) that is executed after the clearing process of step S105 or step S106 is executed.

As already explained in the first embodiment above, if the supply of operating power is started while the setting key is being turned ON, a partial clear process for within the area (step S105) or a full clear process for within the area (step S106) is executed in the main processing (Figure 13), and a second initialization process for outside the area (step S107) is executed, followed by a setting value update process (step S108). Errors such as "Owned play value full," "Awarding abnormality," or "Bet abnormality" are cleared after the supply of operating power to the slot machine 10 has been stopped, by starting the supply of operating power while the setting key is being turned ON, and executing a partial clear process for within the area (step S105) or a full clear process for within the area (step S106) in the main processing (Figure 13). Furthermore, the "award limit reached" error is cleared when the supply of operating power to the slot machine 10 is stopped, then the supply of operating power is started again while the setting key is turned ON, and the second initialization process for out-of-area use (step S107) is executed in the main process (FIG. 13).

As such, in order to cancel the "award limit reached" message, it is necessary to execute the second initialization process for outside the area (step S107), and after the "award limit reached" message occurs, the "award limit reached" message will not be canceled until the supply of operating power to the slot machine 10 is stopped.

The "unit connection abnormality" or "owned gaming value full" error is cleared when an error clearing operation is performed on the key cylinder 14 and the detection signal input from the error clearing sensor 14a to the main MPU 72 goes high, or when the reset button 56 is operated while the front door 12 is open and the detection signal input from the reset detection sensor to the main MPU 72 goes high. As already explained, a detection signal from the door open detection sensor 12a is input to the input side of the main MPU 72, and the main MPU 72 determines that the front door 12 is open based on the detection signal going low. The "unit connection abnormality" error is also cleared when the connection confirmation signal input from the value value MPU 142 to the main MPU 72 goes low.

The "Giving Abnormal" or "Bed Abnormal" error is cleared when the reset button 56 is operated while the front door 12 is open, causing the detection signal input from the reset detection sensor to the main MPU 72 to go to HI level.

Figure 116(b) is an explanatory diagram for explaining the error display corresponding to "Award limit reached", and Figure 116(c) is an explanatory diagram for explaining the error display corresponding to "Unit connection abnormality". When the error display corresponding to "Award limit reached" is displayed, a first error notification image G83 is displayed across the entire screen of the image display device 63, as shown in Figure 116(b). The first error notification image G83 is an image in which a black text image reading "Game stopped due to award limit reached" is set in the center of the screen, and the entire screen except for the text image is set in solid blue. When the error display corresponding to "Unit connection abnormality" is displayed, a second error notification image G84 is displayed across the entire screen of the image display device 63, as shown in Figure 116(c). The second error notification image G84 is an image in which a black text image reading "Game stopped due to unit connection abnormality" is set in the center of the screen, and the entire screen except for the text image is set in solid blue.

Although not shown, in the error display corresponding to "Owned gaming value full," a third error notification image is displayed across the entire screen of the image display device 63. The third error notification image is an image in which a black text image reading "Game stopped due to owned gaming value full" is set in the center of the screen, with the entire screen except for the text image being solid blue. In addition, in the error display corresponding to "Awarding abnormality," a fourth error notification image (not shown) is displayed across the entire screen of the image display device 63. The fourth error notification image is an image in which a black text image reading "Game stopped due to awarding abnormality" is set in the center of the screen, with the entire screen except for the text image being solid blue. Furthermore, in the error display corresponding to "Bet abnormality," a fifth error notification image (not shown) is displayed across the entire screen of the image display device 63. The fifth error notification image is an image in which a black text image reading "Game stopped due to betting abnormality" is set in the center of the screen, with the entire screen except for the text image being solid blue.

Error displays are displayed in such a way that the error notification image corresponding to that error display is placed at the front (closest to the player) on the screen of the image display device 63. The transparency of the error notification image is set to "0" (no transparency). Therefore, when any error display is being displayed, the in-game effect images corresponding to each game, which are placed further back on the screen (away from the player) than the error notification image on the image display device 63, and the background images corresponding to the game status, which are placed further back on the screen than the in-game effect images, are not displayed on the image display device 63.

The image display device 63 displays an error corresponding to one error. Even in a situation where multiple errors occur, two or more error displays will not be displayed in parallel. First, we will explain how error displays are switched when "award limit reached" has not occurred. When switching from one error display to another when "award limit reached" has not occurred, the other error display will begin after the first error display has ended. For example, if a "unit connection abnormality" occurs in a situation where "owned game value full" has occurred and an error display corresponding to "owned game value full" is being displayed on the image display device 63, that is, when both "owned game value full" and "unit connection abnormality" have occurred, the error display corresponding to "owned game value full" will end on the image display device 63, and then an error display corresponding to "unit connection abnormality" will begin. Subsequently, if only the "unit connection abnormality" out of the "number of owned game values full" and "unit connection abnormality" is resolved and "number of owned game values full" remains, the image display device 63 will end the error display corresponding to the "unit connection abnormality" and then begin displaying an error corresponding to "number of owned game values full." In this way, when switching from one error display to another in a situation where "award limit reached" has not occurred, a state in which neither error display is being displayed occurs between the end of the one error display and the start of the other error display. In a state in which neither error display is being displayed, a background image corresponding to the game status is displayed on the image display device 63, and if a game is being played, the image display device 63 will display an in-game effect corresponding to that game.

Next, we will explain how to switch from the error message corresponding to "Maximum Achieved" to the error message corresponding to "Unit Connection Error," and how to switch from the error message corresponding to "Unit Connection Error" to the error message corresponding to "Maximum Achieved."

As already explained, if any of the following occurs: "Award Limit Reached," "Unit Connection Error," "Owned Play Value Full," "Award Error," or "Bet Error," starting a new game will be prohibited until the error is resolved. For this reason, of the "Unit Connection Error," "Owned Play Value Full," "Award Error," and "Bet Error," the only error that can occur when "Award Limit Reached" occurs is "Unit Connection Error." If a "Unit Connection Error" occurs when "Award Limit Reached" has occurred, both "Award Limit Reached" and "Unit Connection Error" will occur, and if the "Unit Connection Error" is resolved in this situation, "Award Limit Reached" will return to the previous situation.

If a "unit connection abnormality" occurs when "maximum amount of granting has been reached," and an error display corresponding to "maximum amount of granting has been reached" is being displayed on the image display device 63, the error notification image displayed at the front of the screen of the image display device 63 is switched from the first error notification image G83 corresponding to "maximum amount of granting has been reached" to the second error notification image G84 corresponding to "unit connection abnormality," thereby initiating an error display corresponding to "unit connection abnormality." Furthermore, if the "unit connection abnormality" is resolved when both "maximum amount of granting has been reached" and a "unit connection abnormality" are occurring, and an error display corresponding to "maximum amount of granting has been reached" is being displayed on the image display device 63, the error notification image displayed at the front of the screen of the image display device 63 is switched from the second error notification image G84 to the first error notification image G83, thereby initiating an error display corresponding to "maximum amount of granting has been reached." This prevents a situation where no error display is being displayed when switching from the error display corresponding to "award limit reached" to the error display corresponding to "unit connection abnormality", i.e., a situation where no error notification image is displayed at the forefront on the screen of the image display device 63 and a background image corresponding to the in-game effect image or game status is displayed, and also prevents a situation where no error display is being displayed when switching from the error display corresponding to "unit connection abnormality" to the error display corresponding to "award limit reached".

When the supply of operating power to the slot machine 10 begins, the image display device 63 begins displaying an initial screen. Figure 116(d) is an explanatory diagram for explaining the initial screen display. In the initial screen display, as shown in Figure 116(d), an initial screen image G85 is displayed across the entire screen of the image display device 63. The initial screen image G85 is an image in which a black text image reading "Initial settings in progress" is set in the center of the screen, and the entire screen except for the text image is set in solid blue.

As in the first embodiment above, if the power is turned ON after the setting key has been turned ON, the main MPU 72 sends a setting change start command to the presentation MPU 92 at the timing when the setting value update process (step S108) begins. If the power is turned ON after the setting key has been turned ON, the presentation MPU 92 ends the initial screen display and begins displaying a background image corresponding to the normal game state ST1 based on the setting change start command received by the presentation MPU 92 from the main MPU 72, regardless of whether an error display was displayed before the power was cut off.

As in the first embodiment described above, if the power is turned on without the setting key being pressed to turn it on, the main MPU 72 sends a power restoration command to the presentation MPU 92 before returning to the address before the power was cut off. As will be described in more detail below, the power restoration command contains error information (any of "1" to "5") corresponding to the error that occurred before the power was cut off. If the supply of operating power to the slot machine 10 is stopped without any error display and the power is turned on without the setting key being pressed to turn it on, the presentation MPU 92 will end the initial screen display and begin displaying a background image corresponding to the game state before the power was cut off, based on the power restoration command it receives from the main MPU 72.

If the supply of operating power to the slot machine 10 is stopped while an error message corresponding to any of the error information "1" through "5" is being displayed, and the power is turned on without the setting key being turned on, i.e., the address before the power was cut off is returned to, the presentation-side MPU 92 receives a power restoration command from the main-side MPU 72, and the initial screen display is terminated and an error message corresponding to the error information set in the power restoration command is displayed. In this case, the display content of the image display device 63 switches from the initial screen display to the error message without displaying the background image corresponding to the game state before the power was cut off.

The "award limit reached" condition is not resolved until the partial clearing process for the area (step S105) or the full clearing process for the area (step S106) is performed. In this configuration, if an error display corresponding to "award limit reached" is initiated and neither the partial clearing process for the area (step S105) nor the full clearing process for the area (step S106) is performed but no error display is displayed on the image display device 63, this may mislead players and amusement hall managers into thinking that the "award limit reached" condition has been temporarily lifted. In contrast, if the "award limit reached" condition has occurred, the image display device 63 will display an error corresponding to "award limit reached" until the condition is resolved, except when the initial screen is displayed or an error display corresponding to "unit connection abnormality" is displayed. This allows for continued notification that the "award limit reached" condition has not been resolved and prevents the misunderstanding that the "award limit reached" condition has been temporarily lifted.

Next, the start wait processing executed by the main MPU 72 will be explained with reference to the flowchart in Figure 117. As already explained, the start wait processing is executed in step S5702 of the normal processing (Figure 108). Note that steps S6201 to S6204 in the start wait processing are executed as intra-area processing using intra-area processing programs and intra-area processing data.

First, replay processing is executed (step S6201). In replay processing, if any replay wins were achieved in the previous game, a bet setting equal to the previous bet number (specifically, "3") is set in the bet number setting counter 96a provided in the work area 96 for intra-area processing.

Then, it is determined whether the value of the current error information counter 96r is any of "1" to "5" (step S6202). If the error information set in the current error information counter 96r is any of "1" to "5," that is, if one or more errors corresponding to the error information "1" to "5" have occurred (step S6202: YES), the determination process of step S6202 is repeated until a negative determination is made in step S6202. As a result, if one or more errors corresponding to the error information "1" to "5" have occurred, the processing from step S5703 onwards in the normal processing (FIG. 108) will not be executed until no errors corresponding to the error information "1" to "5" have occurred, i.e., a game suspension state will be entered in which a new game cannot be started.

If a negative judgment is made in step S6202, a bet setting process is executed (step S6203). In the bet setting process, a process for setting the number of bets of game value is executed based on the operation of the game value insertion button 126. Thereafter, a settlement operation response process is executed (step S6204). In the settlement operation response process, provided that a replay win has not been achieved, a settlement command including the value of the bet number setting counter 96a (information on the current number of bets of game value) is sent to the value number side MPU 142. When the value number side MPU 142 receives a settlement command, it executes a process for subtracting the number of bets of game value set in the received settlement command from the number of owned game value stored in the owned number counter in the value number side RAM 144, and executes a process for sending a settlement response command to the main side MPU 72. Furthermore, in the settlement operation response process (step S6204), when a settlement response command is received from the value number side MPU 142, the bet number setting counter 96a is cleared to "0."

As already explained, in the value number control board communication processing executed in step S5809 of the timer interrupt processing (Figure 109), processing is executed to set the bet abnormality flag in the work area 96 for intra-area processing to "1" based on the occurrence of a "bet abnormality," and processing is executed to set the award abnormality flag in the work area 96 for intra-area processing to "1" based on the occurrence of an "award abnormality."

Next, the error information update process executed by the main MPU 72 will be described with reference to the flowchart in Figure 118. As already explained, the error information update process is executed in step S5810 of the timer interrupt process (Figure 109). Note that steps S6301 to S6321 in the error information update process are executed as in-area processing using the in-area processing program and in-area processing data.

In steps S6301 through S6311, processing is performed to clear the error based on the satisfaction of the error clearing conditions corresponding to error information "1" through "5." Specifically, if the error information set in the current error information counter 96r is "2" (step S6301: YES), it is determined whether the connection confirmation signal input from the value number side MPU 142 to the main side MPU 72 is at a LOW level (step S6302). If the connection confirmation signal is at a LOW level (step S6302: YES), that is, if communication between the value number side MPU 142 and the card unit 130 is normal, the value of the current error information counter 96r is cleared to "0" (step S6303). In this way, if a "unit connection abnormality" occurs and is then resolved, the error information of "0," corresponding to the error cleared state, is set in the current error information counter 96r.

If a negative determination is made in step S6301 or if a negative determination is made in step S6302, it is determined whether the error information set in the current error information counter 96r is one of "2" to "5" (step S6304). If the value of the current error information counter 96r is one of "2" to "5" (step S6304: YES), it is determined whether the front door 12 is open (step S6305). If the front door 12 is open (step S6305: YES), it is determined whether the reset button 56 has been operated (step S6306). If a positive determination is made in step S6306, the value of the current error information counter 96r is cleared to "0" (step S6307). Thus, if an error corresponding to error information "2" to "5" has occurred, and the front door 12 is opened and the reset button 56 is operated, error information of "0", which corresponds to the error-cleared state, is set in the current error information counter 96r.

Then, the award abnormality flag and bet abnormality flag in the work area 96 for in-region processing are cleared to "0" (step S6308). In this way, when the front door 12 is opened and the reset button 56 is operated, a state will be established in which no "award abnormality" or "bet abnormality" has occurred.

If a negative determination is made in step S6304, step S6305, or step S6306, it is determined whether the error information set in the current error information counter 96r is "2" or "3" (step S6309). If the value of the current error information counter 96r is "2" or "3" (step S6309: YES), it is determined whether an error reset operation has been performed on the key cylinder 14 (step S6310). In step S6310, a positive determination is made if the detection signal input from the error reset sensor 14a to the main MPU 72 is at a HI level. If a positive determination is made in step S6310, the value of the current error information counter 96r is cleared to "0" (step S6311). Thus, if an error corresponding to error information "2" or "3" has occurred and an error reset operation has been performed on the key cylinder 14, error information of "0," corresponding to the error-cleared state, is set in the current error information counter 96r.

If the processing of step S6303 has been performed, the processing of step S6308 has been performed, a negative determination has been made in step S6309, a negative determination has been made in step S6310, or the processing of step S6311 has been performed, processing is executed in steps S6312 to S6321 to set error information corresponding to the error that has occurred. Specifically, if the connection confirmation signal input from the value-side MPU 142 to the main-side MPU 72 is at a HI level (step S6312: YES), error information of "2", which corresponds to a "unit connection abnormality", is set in the current error information counter 96r (step S6313).

If a negative judgment is made in step S6312, it is determined whether the end flag 98c (Figure 12) provided in the work area 98 for out-of-area processing is set to "1" (step S6314). As already explained in the first embodiment above, the end flag 98c is a flag used by the main MPU 72 to identify a situation in which game play is forcibly terminated and further game play is not possible. The end flag 98c is set to "1" when the number of owned game values increases by "19,000" from the initial value of the end judgment counter 98b, i.e., when the "award limit has been reached." In addition, the end flag 98c is cleared to "0" when the second initialization process for out-of-area processing is executed in step S107 of the main processing (Figure 13). If the end flag 98c is set to "1" (step S6314: YES), that is, if the "upper limit of the amount of points awarded" has been reached, the error information "1" corresponding to the "upper limit of the amount of points awarded" is set in the current error information counter 96r (step S6315).

If a negative judgment is made in step S6314, it is determined whether the value number full signal input from the value number side MPU 142 to the main side MPU 72 is at a HI level (step S6316). If the value number full signal is at a HI level (step S6316: YES), i.e., if a "possessed gaming value number full" has occurred, error information of "3" corresponding to the "possessed gaming value number full" is set in the current error information counter 96r (step S6317).

If a negative judgment is made in step S6316, it is determined whether the assignment abnormality flag in the work area 96 for in-area processing is set to "1" (step S6318). If the assignment abnormality flag is set to "1" (step S6318: YES), i.e., if an "assignment abnormality" has occurred, error information of "4" corresponding to the "assignment abnormality" is set in the current error information counter 96r (step S6319).

If a negative judgment is made in step S6318, it is determined whether the bet abnormality flag in the work area 96 for intra-area processing is set to "1" (step S6320). If the bet abnormality flag is set to "1" (step S6320: YES), i.e., if a "bet abnormality" has occurred, error information of "5" corresponding to the "bet abnormality" is set in the current error information counter 96r (step S6321).

If step S6313 is performed, the error information update process (Figure 118) is terminated without executing step S6314 and subsequent steps. As a result, if a "unit connection abnormality" occurs, the error information "2" corresponding to that "unit connection abnormality" is set in the current error information counter 96r, regardless of whether or not an error corresponding to error information "1," "3," or "5" exists. Therefore, if a "unit connection abnormality" occurs in a situation where at least one error among "award limit reached," "owned gaming value full," "award abnormality," and "bet abnormality" has occurred, the error information "2" corresponding to that "unit connection abnormality" can be set in the current error information counter 96r. Furthermore, if the "unit connection abnormality" is resolved, a negative judgment is made in step S6312, and the process from step S6314 onwards is executed. As a result, if a "unit connection abnormality" occurs while an error corresponding to any of the error information "1", "3", "4", "5", or "6" is occurring, and the "unit connection abnormality" is resolved and the error corresponding to any of the error information "1", "3", "4", "5", or "6" continues, the error information "1", "3", "4", "5", or "6" will be set in the current error information counter 96r.

If step S6315 is performed, the error information update process (Figure 118) is terminated without executing step S6316 and subsequent steps. As a result, if a "unit connection abnormality" has not occurred and a "limit reached" has occurred, the error information "1" corresponding to the "limit reached" error will be set in the current error information counter 96r, regardless of whether or not there is an error corresponding to error information "3" to "5."

If step S6317 is performed, the error information update process (FIG. 118) is terminated without executing step S6318 and subsequent steps. As a result, if a "unit connection abnormality" or "award limit reached" has not occurred and a "number of owned game values full" has occurred, the error information "3" corresponding to the "number of owned game values full" will be set in the current error information counter 96r, regardless of whether an error corresponding to the error information "4" or "5" has occurred.

If step S6319 is performed, the error information update process (Figure 118) is terminated without executing step S6320 and subsequent processes. As a result, if a "unit connection abnormality," "award limit reached," or "owned gaming value full" has not occurred and an "award abnormality" has occurred, the error information "4" corresponding to the "award abnormality" will be set in the current error information counter 96r, regardless of whether or not an error corresponding to the error information "5" has occurred.

The processing of step S6321 is executed when a negative determination is made in step S6312, step S6314, step S6316, and step S6318, followed by a positive determination in step S6320. As a result, when an error corresponding to error information "1" to "4" has not occurred and a "bet abnormality" has occurred, the error information "5" corresponding to the "bet abnormality" is set in the current error information counter 96r.

As already explained in the first embodiment, in the main processing (FIG. 13), if the power is turned on after the setting key has been turned on and the reset button 56 has not been pressed when the power is turned on, a partial area clear process (step S105) is executed. Also, if the power is turned on after the setting key has been turned on and the reset button 56 has been pressed when the power is turned on, a full area clear process (step S106) is executed. As already explained, in the partial area clear process (step S105) or the full area clear process (step S106), the values of the current error information counter 96r and the previous error information counter 96s are cleared to "0." In this way, when the partial area clear process (step S105) or the full area clear process (step S106) is executed, the values of the current error information counter 96r and the previous error information counter 96s become equal, regardless of the error occurrence status before the power was shut off. However, if the value of the previous error information counter 96s was "2" corresponding to a "unit connection abnormality" before power was cut off, and the "unit connection abnormality" has not been resolved even after power is restored, the partial area clear process (step S105) or full area clear process (step S106) is executed to clear the value of the current error information counter 96r to "0", and then the current error information counter 96r is set to "2" in the error information update process (FIG. 118). As a result, the value of the current error information counter 96r is "2" and the value of the previous error information counter 96s is "0", i.e., the value of the current error information counter 96r and the value of the previous error information counter 96s do not match.

Next, before explaining the error information transmission process executed in step S6123 of the external output process (Figure 113) already explained, we will explain the data structure of the error command transmitted from the main MPU 72 to the production MPU 92. Figure 119 (a) is an explanatory diagram for explaining the data structure of the error command.

Commands sent from the master MPU 72 to the production MPU 92 contain a header section, a data section, and a footer section. As shown in FIG. 119(a), the header section of an error command contains error-handling header data that enables the production MPU 92 to identify the command as an error. In addition, the footer section of the error command contains common footer data that is set for all commands sent from the master MPU 72 to the production MPU 92.

When an error command corresponding to the value of the current error information counter 96r is sent, the error information set in the current error information counter 96r (specifically, any of "0" to "5") is set in the data section of the error command. Furthermore, the error information "0" is set in the data section of an error command (hereinafter also referred to as a "cancel error command" in this specification) for ending or changing the error display. A cancel error command is an error command in which the error information "0" is set in the data section. Based on the error information set in the data section of the error command received from the main MPU 72, the production side MPU 92 determines whether to display an error, the type of error display to be displayed, and whether to end the error display.

Next, the error information transmission process executed in step S6123 of the external output process (Fig. 113) will be described with reference to the flowchart in Fig. 119(b). Note that steps S6401 to S6407 in the error information transmission process are executed as in-area processing using the in-area processing program and in-area processing data.

The error information set in the current error information counter 96r is read (step S6401), and the error information set in the previous error information counter 96s is read (step S6402). It is then determined whether the error information read from the current error information counter 96r in step S6401 matches the error information read from the previous error information counter 96s in step S6402 (step S6403). If these two pieces of error information match (step S6403: YES), that is, if the data in the current error information counter 96r has not changed between the end of the previous round of the error information transmission process (Figure 119(b)) and the start of the current round of the process, the error information transmission process (Figure 119(b)) is terminated without executing step S6404 and subsequent steps.

If the error information read from the current error information counter 96r does not match the error information read from the previous error information counter 96s (step S6403: NO), that is, if the data in the current error information counter 96r has changed between the end of the previous round of the error information transmission process (FIG. 119(b)) and the start of the current round of processing, a cancellation error command transmission setting process is executed (step S6404). In the cancellation error command transmission setting process, an error command with error information set to "0" in the data section, i.e., a cancellation error command, is transmitted to the production side MPU 92.

Then, in step S6401, the error information read from the current error information counter 96r is set in the previous error information counter 96s, so that the same error information is set in the current error information counter 96r and the previous error information counter 96s (step S6405). As a result, in the next processing round of the error information transmission process (FIG. 119(b)), in step S6403, the value of the current error information counter 96r is compared with the value of the previous error information counter 96s, making it possible to determine whether the error information set in the current error information counter 96r has been changed.

Thereafter, if the error information read from the current error information counter 96r in step S6401 is any one of "1" to "5" (step S6406: YES), a transmission setting process for the error command corresponding to the value of the current error information counter 96r is executed (step S6407). In this transmission setting process, an error command including the error information (any one of "1" to "5") read from the current error information counter 96r in step S6401 is transmitted to the production-side MPU 92.

In this way, if the data in the current error information counter 96r has changed between the end of the previous processing round of the error information transmission process (FIG. 119(b)) and the start of the current processing round, and the error information set in the current error information counter 96r is "0," i.e., if the error that occurred has been resolved, a cancellation error command transmission setting process is executed in step S6404. In this case, the production side MPU 92 will receive one cancellation error command from the main side MPU 72. Furthermore, if the data in the current error information counter 96r has not changed between the end of the previous processing round of the error information transmission process (FIG. 119(b)) and the start of the current processing round, a positive determination is made in step S6403 and the processing from step S6404 onwards is not executed, so the production side MPU 92 does not receive an error command from the main side MPU 72.

If the data in the current error information counter 96r has changed between the end of the previous round of the error information transmission process (Figure 119 (b)) and the start of the current round, and the error information set in the current error information counter 96r is one of "1" to "5," then in step S6404, a process for setting up the transmission of a release error command is executed, and then in step S6407, a process for setting up the transmission of an error command corresponding to the value of the current error information counter 96r is executed. In this case, the production side MPU 92 will receive two error commands from the main side MPU 72 in the following order: an error command set to "0" (release error command) → an error command set with error information set to one of "1" to "5."

The error information (any of "1" to "5") set in the error command sent in step S6407 is set in the previous error information counter 96s in step S6405. This allows the master MPU 72 to grasp the error information (any of "1" to "5") set in the error command sent to the production MPU 92.

As already explained, when the partial area clear process (step S105) or the full area clear process (step S106) is executed, the values of the current error information counter 96r and the previous error information counter 96s are set to "0", i.e., the value of the current error information counter 96r matches the value of the previous error information counter 96s. Therefore, a positive determination is made in step S6403, and the error information transmission process (Figure 119 (b)) ends without sending an error command.

If the partial area clear process (step S105) or the full area clear process (step S106) was not executed when the supply of operating power to the slot machine 10 began, the values of the current error information counter 96r and the previous error information counter 96s are maintained, and the value of the current error information counter 96r matches the value of the previous error information counter 96s, so a positive determination is made in step S6403. Then, this error information transmission process (Figure 119 (b)) ends without transmitting an error command.

In this way, whether an error corresponding to any of the error information "1" to "5" has occurred or not, when the main MPU 72 sends an error command corresponding to any of the error information "1" to "5," it sends a release error command before sending the error command. This eliminates the need to determine whether any of the errors has occurred before sending the error command and release error command in the order of error command containing any of the error information "1" to "5" → release error command. This simplifies the processing configuration for sending error commands and release error commands.

Next, before explaining the error handling process (Figure 120(b)) executed by the production-side MPU 92, we will explain the configuration of the production-side RAM 94 used in this error handling process. Figure 120(a) is an explanatory diagram for explaining the configuration of the production-side RAM 94.

As shown in FIG. 120(a), the presentation-side RAM 94 is provided with an upper limit reached flag 94e and an error display counter 94f. The upper limit reached flag 94e is a flag that allows the presentation-side MPU 92 to recognize that it has received an error command with error information set to "1," corresponding to "award upper limit reached," or a power restoration command with error information set to "1." The error display counter 94f is set with the error information set in the error command or power restoration command received by the presentation-side MPU 92 from the main-side MPU 72. As with the first embodiment described above, backup power is not supplied to the presentation-side RAM 94 from the power-down power supply unit of the power supply device 54 when the supply of operating power from an external power source is cut off. Therefore, if the supply of operating power to the slot machine 10 is stopped, the data in the presentation-side RAM 94 will be lost.

Next, the error handling processing executed by the production-side MPU 92 will be explained with reference to the flowchart in Figure 120 (b). Note that the error handling processing is repeatedly executed at a relatively short interval (e.g., every 2 milliseconds) while the production-side normal processing is being executed in step S6612 of the production-side main processing (Figure 121), which will be described later.

When an error command is received from the main MPU 72 (step S6501: YES), it is determined whether the error information set in the received error command is "0" (step S6502). When the error information set in the received error command is any of "1" to "5" (step S6502: NO), the error information of any of "1" to "5" is set in the error display counter 94f (step S6503). This allows the production MPU 92 to grasp the error information of any of "1" to "5" set in the error command received from the main MPU 72. It then determines whether the upper limit reached flag 94e is set to "1" (step S6504).

If the upper limit reached flag 94e is not set to "1" (step S6504: NO), an error notification start process is executed (step S6505). In the error notification start process, the display of the image display device 63 is controlled so that an error display corresponding to the error information set in the error display counter 94f is initiated. In this manner, if an error command with error information set to any of "1" through "5" is received when the upper limit reached flag 94e is not set to "1," an error display corresponding to the error information is initiated on the image display device 63. In this error display, the error notification image corresponding to the value of the error display counter 94f (among the first error notification image G83, second error notification image G84, and third through fifth error notification images already described) is displayed on the entire screen of the image display device 63, and the background image and in-game effect image corresponding to the game status are not displayed on the image display device 63.

After that, if the value of the error display counter 94f is "1" (step S6506: YES), that is, if the currently received error command is an error command corresponding to "reach maximum award amount," the limit reached flag 94e is set to "1" (step S6507). As already explained, if a "unit connection abnormality" occurs while "reach maximum award amount" has occurred, both "reach maximum award amount" and "unit connection abnormality" will occur. In this case, by receiving an error command with error information set to "2" from the main MPU 72, the value of the error display counter 94f is updated from "1" to "2" in step S6503. By setting the limit reached flag 94e to "1" in step S6507, even if an error command corresponding to "unit connection abnormality" is received and the value of the error display counter 94f is rewritten to "2," the production MPU 92 can determine that "reach maximum award amount" has occurred based on the limit reached flag 94e being set to "1."

If a positive judgment is made in step S6502, that is, if the error command received this time is a release error command, error notification termination processing is executed (step S6509), provided that the upper limit reached flag 94e is not set to "1" (step S6508: NO). In the error notification termination processing, display control is performed on the image display device 63 so that the error display corresponding to any of the error information "2" to "5" is terminated and a background image corresponding to the game status is displayed. Thereafter, the value of the error display counter 94f is cleared to "0" (step S6510). This allows the presentation-side MPU 92 to understand that the error display corresponding to the error information "1" to "5" is not being displayed.

If the upper limit reached flag 94e is set to "1" (step S6508: YES), this error response process ends without executing the processes of steps S6509 and S6510. In this way, when an "award upper limit reached" occurs and the upper limit reached flag 94e is set to "1", the error notification termination process (step S6509) will not be executed even if the production side MPU 92 receives a release error command.

As already explained, if a "unit connection abnormality" occurs when "award limit reached" has occurred, a release error command is sent before the error command corresponding to the "unit connection abnormality." Furthermore, as already explained, if a "unit connection abnormality" is resolved when "award limit reached" and "unit connection abnormality" have occurred, a release error command is sent before the error command corresponding to "award limit reached." In these configurations, if the error notification termination process (step S6509) is executed based on the presentation side MPU 92 receiving a release error command even after "award limit reached" has occurred, a state in which both error displays are being displayed (a state in which a background image corresponding to the game state is being displayed) will occur when the error display executed on the image display device 63 is changed from "award limit reached" to "unit connection abnormality" and when the error display executed on the image display device 63 is changed from "award limit reached" to "unit connection abnormality" and from "unit connection abnormality" to "award limit reached." Furthermore, if the presentation side MPU 92 fails to receive the error command corresponding to "unit connection abnormality" that is scheduled to be received after the release error command, or if the presentation side MPU 92 fails to receive the error command corresponding to "award limit reached" that is scheduled to be received after the release error command, then even though "award limit reached" has not been resolved, the state in which either error display is still being displayed (the state in which the background image corresponding to the game status is being displayed) will continue for a long period of time (specifically, the period until the presentation side MPU 92 receives the next error command with error information set to one of "1" to "5").

In contrast, if the limit reached flag 94e is set to "1," the error notification termination process (step S6509) will not be executed even if the presentation MPU 92 receives a release error command. This allows the image display device 63 to display an error message corresponding to "limit reached" or "unit connection abnormality" when "limit reached" occurs, at least until the supply of operating power to the slot machine 10 is stopped, and prevents a state in which neither error message is displayed (a state in which a background image corresponding to the game state is displayed). This prevents players and amusement hall managers from misunderstanding that the "limit reached" message has been temporarily released based on the occurrence of a state in which neither error message is displayed (a state in which a background image corresponding to the game state is displayed) even though the "limit reached" message has not been resolved.

If a positive determination is made in step S6504, it is determined whether the value of the error display counter 94f is "2" (step S6511). If the value of the error display counter 94f is "2" (step S6511: YES), that is, if an error command corresponding to "unit connection abnormality" is received while the upper limit reached flag 94e is set to "1," error display switching processing corresponding to "unit connection abnormality" is executed (step S6512). In this error display switching processing, the second error notification image G84 corresponding to "unit connection abnormality" is placed at the forefront on the screen of the image display device 63, and an error display corresponding to "unit connection abnormality" is initiated on the image display device 63.

As already explained, if the limit reached flag 94e is set to "1", the error notification termination process (step S6509) will not be executed even if the production side MPU 92 receives a release error command. Therefore, if a "unit connection abnormality" occurs after the "award limit reached" occurs, the production side MPU 92 will receive an error command corresponding to the "unit connection abnormality" while the error display corresponding to the "award limit reached" is being displayed. When the limit reach flag 94e is set to "1" and an error display corresponding to "award limit reached" is being displayed, and an error command corresponding to "unit connection abnormality" is received and the error display switching process corresponding to "unit connection abnormality" (step S6512) is executed, the error notification image located at the forefront on the screen of the image display device 63 is switched from the first error notification image G83 corresponding to "award limit reached" to the second error notification image G84 corresponding to "unit connection abnormality", and the display content of the image display device 63 is switched from the error display corresponding to "award limit reached" to the error display corresponding to "unit connection abnormality" without creating a state where no error display is being displayed (a state where a background image corresponding to the game state is being displayed).

As already explained, if the limit reached flag 94e is set to "1," the error notification termination process (step S6509) will not be executed even if the production side MPU 92 receives a release error command. Therefore, if the connection between the value number side MPU 142 and the card unit 130 becomes unstable after the "award limit reached" occurs, and if a "unit connection abnormality" that occurred is resolved and then another "unit connection abnormality" occurs, and the production side MPU 92 fails to receive the error command corresponding to "award limit reached" that was sent from the main side MPU 72 when the "unit connection abnormality" that occurred was resolved, the production side MPU 92 will receive the error command corresponding to the "unit connection abnormality" while an error display corresponding to the "unit connection abnormality" is being displayed. After "award limit reached" occurs, if an error display corresponding to "unit connection abnormality" is being displayed and the presentation side MPU 92 receives an error command corresponding to "unit connection abnormality" and executes the error display switching process (step S6512) corresponding to "unit connection abnormality", the error notification image positioned at the forefront on the screen of the image display device 63 will remain the second error notification image G84 corresponding to "unit connection abnormality", and the display content of the image display device 63 will continue to display the error display corresponding to "unit connection abnormality" without creating a state in which no error display is being displayed (a state in which a background image corresponding to the game state is displayed).

If the value of the error display counter 94f is "1" (step S6511: NO, step S6513: YES), that is, if the limit reach flag 94e is set to "1" and an error command corresponding to "limit reach" is received, an error display switching process corresponding to "limit reach" is executed (step S6514). In this error display switching process, the first error notification image G83 corresponding to "limit reach" is placed at the front on the screen of the image display device 63, and an error display corresponding to "limit reach" is initiated on the image display device 63.

As already explained, if the limit reached flag 94e is set to "1", the error notification termination process (step S6509) will not be executed even if the production side MPU 92 receives a release error command. Therefore, if a "unit connection abnormality" that occurred once after the "award limit reached" occurred is resolved, the production side MPU 92 will receive an error command corresponding to "award limit reached" while an error display corresponding to "unit connection abnormality" is being displayed. When the limit reached flag 94e is set to "1" and an error display corresponding to "unit connection abnormality" is being displayed, and an error command corresponding to "award limit reached" is received and the error display switching process corresponding to "award limit reached" (step S6514) is executed, the error notification image located at the forefront on the screen of the image display device 63 is switched from the second error notification image G84 corresponding to "unit connection abnormality" to the first error notification image G83 corresponding to "award limit reached", and the display content of the image display device 63 can be switched from the error display corresponding to "unit connection abnormality" to the error display corresponding to "award limit reached" without creating a state where no error display is being displayed (a state where a background image corresponding to the game state is being displayed).

In this way, when an error message corresponding to "maximum amount of power awarded reached" is displayed and a "unit connection abnormality" occurs and the display on the image display device 63 switches from the error message corresponding to "maximum amount of power awarded reached" to the error message corresponding to "unit connection abnormality", if the "unit connection abnormality" is resolved and the state returns to one where only "maximum amount of power awarded reached" is occurring, the image display device 63 will display the error message corresponding to "maximum amount of power awarded reached", just as it was before the "unit connection abnormality" occurred.

As already explained, if the limit reached flag 94e is set to "1", the error notification termination process (step S6509) will not be executed even if the production side MPU 92 receives a release error command. Therefore, if a "unit connection abnormality" that occurred once after the "award limit reached" occurred is resolved, and the production side MPU 92 failed to receive the error command corresponding to the "unit connection abnormality" sent from the main side MPU 72 when the "unit connection abnormality" occurred, the production side MPU 92 will receive the error command corresponding to "award limit reached" when an error display corresponding to "award limit reached" is being displayed. After "award limit reached" occurs, if an error display corresponding to "award limit reached" is being displayed and the presentation side MPU92 receives an error command corresponding to "award limit reached" and executes the error display switching process corresponding to "award limit reached" (step S6514), the error notification image positioned at the forefront on the screen of the image display device 63 will remain the first error notification image G83 corresponding to "award limit reached", and the display content of the image display device 63 will continue to show the error display corresponding to "award limit reached" without creating a state where no error display is being displayed (a state where a background image corresponding to the game state is displayed).

If the value of the error display counter 94f is any of "3" to "5" (steps S6511 and S6513: NO), the error response process (Figure 120(b)) is terminated. As already explained, of the errors corresponding to error information "2" to "5," the only error that can occur after "award limit reached" occurs is "unit connection abnormality." Even if the production side MPU 92 receives an error command with error information "3" to "5" set when the limit reached flag 94e is set to "1," the display content on the image display device 63 (the error display corresponding to "award limit reached" or "unit connection abnormality") will not change. This prevents a situation where the image display device 63 does not display any of the error displays corresponding to "award limit reached," "unit connection abnormality," or the initial screen when "award limit reached" occurs, which could lead to the misunderstanding among players and amusement hall managers that the "award limit reached" state has been temporarily canceled.

As described above, when the limit reached flag 94e is set to "1," the error notification termination process (step S6509) will not be executed even if the production side MPU 92 receives a release error command. This prevents the error display corresponding to "award limit reached" from being interrupted until the display content on the image display device 63 switches from the error display corresponding to "award limit reached" to the error display corresponding to "unit connection abnormality" when a "unit connection abnormality" occurs after the occurrence of "award limit reached." Furthermore, when the "unit connection abnormality" that occurred once after the occurrence of "award limit reached" is resolved and the state returns to one where only "award limit reached" is occurring, the error display corresponding to "unit connection abnormality" from being interrupted until the display content on the image display device 63 switches from the error display corresponding to "unit connection abnormality" to the error display corresponding to "award limit reached."

Next, we will explain the commands that the production-side MPU 92 receives from the master MPU 72 during the production-side main processing (Figure 121) executed by the production-side MPU 92. As already explained in the first embodiment above, if the power is turned on while the setting key is turned on, the master MPU 72 executes the setting value update processing (step S108). If the power is turned on without turning on the setting key, the master MPU 72 returns to the address before the power was cut off. Also, as in the first embodiment above, when the setting value update processing (step S108) is executed by the master MPU 72, the production-side MPU 92 receives a setting change start command from the master MPU 72 at the start of the setting value update processing, and receives a setting change end command at the end of the setting value update processing. Also, if the master MPU 72 returns to the address before the power was cut off, the production-side MPU 92 receives a power recovery command from the master MPU 72. In this way, after the supply of operating power to the slot machine 10 begins, the first command that the presentation side MPU 92 receives from the main side MPU 72 is a power restoration command or a setting change start command.

The power restoration command contains data from the current error information counter 96r and the previous error information counter 96s in the work area 96 for in-area processing. Based on the information contained in the power restoration command, the production-side MPU 92 can determine the error occurrence status before the power was cut off.

Next, we will explain the production-side main processing executed by the production-side MPU 92 when the supply of operating power to the production-side MPU 92 begins, with reference to the flowchart in Figure 121.

First, the production-side initial setting process is executed (step S6601). In the production-side initial setting process, registers built into the production-side MPU 92 are cleared to "0" and initialized. After that, the initial screen display start process is executed (step S6602). In the initial screen display start process, display control is performed on the image display device 63 so that the above-mentioned initial screen display begins.

Then, it is determined whether a power restoration command has been received from the main MPU 72 (step S6603). If a power restoration command has not been received (step S6603: NO), it is determined whether a setting change start command has been received from the main MPU 72 (step S6604). If a negative determination is made in step S6604, the process returns to step S6603, and steps S6603 to S6604 are repeated until a power restoration command or setting change start command is received from the main MPU 72.

If a setting change start command is received from the main MPU 72 (step S6604: YES), display control processing during setting change is executed (step S6605). In the display control processing during setting change, first, display control of the image display device 63 is executed so that the initial screen display ends and the setting change in progress display begins. In the setting change in progress display, a setting change in progress notification image (not shown) is displayed across the entire screen of the image display device 63. The setting change in progress notification image is an image in which a black text image reading "Setting change in progress" is displayed in the center of the screen and the entire screen except for the text image is colored solid blue. The setting change in progress display continues until the presentation side MPU 92 receives a setting change end command from the main MPU 72. In the display control processing during setting change (step S6605), if a setting change end command is received, display control of the image display device 63 is executed so that the setting change in progress display ends and the background image corresponding to the normal gaming state ST1 begins to be displayed, and the display control processing during setting change (step S6605) ends.

In this way, if the power is turned ON while the setting key is turned ON, the initial screen display is executed on the image display device 63 until the production side MPU 92 receives a setting change start command. Then, based on the production side MPU 92 receiving the setting change start command, the display content on the image display device 63 is switched from the initial screen display to a setting change in progress display, and based on the production side MPU 92 receiving a setting change end command, the display content on the image display device 63 is switched from the setting change in progress display to a background image corresponding to the game status.

When a power recovery command is received from the main MPU 72 (step S6603: YES), a determination is made as to whether the value of the error information set in the current error information counter 96r is any of "1" to "5" based on the data in the current error information counter 96r included in the power recovery command (step S6606). If the value of the error information set in the current error information counter 96r is any of "1" to "5" (step S6606: YES), the error information is set in the error display counter 94f in the presentation RAM 94 (step S6607). This allows the presentation MPU 92 to grasp the error information set in the power recovery command received from the main MPU 72, which is any of "1" to "5."

Then, similar to step S6505 of the error handling process (Figure 120 (b)) already described, error notification start processing is executed (step S6608). In the error notification start processing, display control is performed on the image display device 63 so that an error display corresponding to the error information set in the error display counter 94f is started.

In this way, if the supply of operating power to the slot machine 10 is stopped while an error message corresponding to any of the error information "1" through "5" is being displayed, and then the supply of operating power is restarted without the setting key being turned ON, the initial screen display is executed on the image display device 63 until the presentation-side MPU 92 receives a power-restore command. Then, based on the presentation-side MPU 92 receiving the power-restore command, the display content on the image display device 63 is switched from the initial screen display to the error display corresponding to the error that occurred before the power was cut off, without creating a state in which no error message is being displayed (a state in which a background image corresponding to the game status is displayed). This prevents a situation in which the image display device 63 displays neither the error message corresponding to "award limit reached," nor the error message corresponding to "unit connection abnormality," nor the initial screen display, even when "award limit reached" has occurred, which could lead to the misunderstanding among players and amusement hall managers that the "award limit reached" message has been temporarily canceled.

As already explained, if the main MPU 72 returns to the address before the power was cut off after the supply of operating power to the slot machine 10 has started, the partial area clear process (step S105) or the full area clear process (step S106) is not executed, so the values of the current error information counter 96r and the previous error information counter 96s are maintained and no error command for cancellation is sent. This allows the error display corresponding to the error that occurred before the power was cut off to continue until the error is resolved, even after the main MPU 72 returns to the address before the power was cut off.

Then, it is determined whether the value of the error display counter 94f is "1" (step S6609). If the value of the error display counter 94f is not "1" (step S6609: NO), it is determined whether the value of the previous error information counter 96s set in the power recovery command is "1" (step S6610). If the supply of operating power to the slot machine 10 is stopped while the "award limit reached" condition has occurred and the power is turned on without the setting key being turned on, a positive determination is made in step S6609. Furthermore, if the supply of operating power to the slot machine 10 is stopped while the "award limit reached" condition and the "unit connection abnormality" condition have occurred and the power is turned on without the setting key being turned on, a positive determination is made in step S6610. In this way, if the "award limit reached" condition that occurred before the power was turned off has not been resolved, a positive determination is made in step S6609 or step S6610.

If a positive judgment is made in step S6609, or if a positive judgment is made in step S6610, the upper limit reached flag 94e is set to "1" (step S6611). This allows the production side MPU 92 to recognize that a "award upper limit reached" state has occurred.

If the processing of step S6605 is performed, if a negative judgment is made in step S6606, if a negative judgment is made in step S6610, or if the processing of step S6611 is performed, normal presentation processing is executed (step S6612). In normal presentation processing, processing is executed to update the value of a presentation random number counter provided in presentation RAM 94. The presentation random number counter is used when a lottery process is performed at the start of a game to determine the content of the in-game presentation corresponding to that game. Furthermore, as already explained, while normal presentation processing is being executed, error handling processing (Figure 120 (b)) is repeatedly executed at relatively short intervals (for example, every 2 milliseconds).

Next, the manner in which an error message corresponding to "award limit reached" is displayed will be described with reference to the time chart in FIG. 122. FIG. 122(a) shows the state in which the error message corresponding to "award limit reached" is displayed on the image display device 63, FIG. 122(b) shows the state in which the error message corresponding to "unit connection abnormality" is displayed on the image display device 63, FIG. 122(c) shows the timing when the presentation side MPU 92 receives a release error command, FIG. 122(d) shows the timing when the presentation side MPU 92 receives an error command corresponding to "award limit reached", FIG. 122(e) shows the timing when the presentation side MPU 92 receives an error command corresponding to "unit connection abnormality", FIG. 122(f) shows the state in which the image display device 63 displays "initialization in progress", FIG. 122(g) shows the period during which a "unit connection abnormality" occurs, FIG. 122(h) shows the timing when the presentation side MPU 92 receives a power restoration command from the main side MPU 72, and FIG. 122(i) shows the period during which operating power is supplied to the slot machine 10.

First, we'll explain how the error message corresponding to "award limit reached" ends.

At timing t1, the presentation-side MPU 92 receives a cancellation error command as shown in FIG. 122(c). Then, at timing t2, as shown in FIG. 122(d), the presentation-side MPU 92 receives an error command corresponding to "award limit reached" (an error command with error information "1" set), and an error display corresponding to "award limit reached" begins on the image display device 63 as shown in FIG. 122(a). Then, at timing t3, as shown in FIG. 122(i), the supply of operating power to the slot machine 10 is stopped, and no display is performed on the image display device 63, so the error display corresponding to "award limit reached" is not being displayed as shown in FIG. 122(a).

After that, at timing t4, the supply of operating power to the slot machine 10 is resumed as shown in FIG. 122(i) without the setting key being turned ON. After that, at timing t5, the initial screen display begins on the image display device 63 as shown in FIG. 122(h). After that, at timing t6, when the presentation-side MPU 92 receives a power restoration command as shown in FIG. 122(h), the display content on the image display device 63 is switched from the initial screen display to an error display corresponding to "award limit reached" as shown in FIGS. 122(a) and 122(f) without creating a state in which no error display is being executed (a state in which a background image corresponding to the game status is being displayed).

Next, we will explain how the error message corresponding to a "unit connection abnormality" starts to appear when the "award limit reached" occurs, and how the error message corresponding to the "unit connection abnormality" ends.

As shown in Figure 122(a), at time t7, the image display device 63 displays an error message corresponding to "Limited Amount Reached." Also, at time t7, the limit reached flag 94e is set to "1." At time t7, the first connection confirmation signal input from the connection terminal board 128 to the value element side MPU 142 is at a high level, and the value element side MPU 142 identifies the occurrence of a "unit connection abnormality." The connection confirmation signal input from the value element side MPU 142 to the main side MPU 72 is raised from a low level to a high level. The main side MPU 72 then sets the error information value "2" to the current error information counter 96r. This changes the value of the current error information counter 96r from "1" to "2."

After that, at timing t8, the production side MPU 92 receives a release error command, as shown in Figure 122 (c). Because the upper limit reached flag 94e is set to "1", the error notification termination process (step S6509) is not executed. Therefore, the error display corresponding to the "award limit reached" continues, as shown in Figure 122 (a). In this way, a release error command received when the upper limit reached flag 94e is set to "1" is invalidated.

After that, at timing t9, when the presentation side MPU 92 receives an error command corresponding to "unit connection abnormality" as shown in Figure 122 (e), the display on the image display device 63 switches from the error display corresponding to "award limit reached" to the error display corresponding to "unit connection abnormality" as shown in Figures 122 (a) and 122 (b) without creating a state in which no error display is being executed (a state in which a background image corresponding to the game state is displayed).

122(g), at timing t10, the value-value-side MPU 142 determines that the "unit connection abnormality" has been cleared based on the fact that the first connection confirmation signal input from the connection terminal board 128 to the value-value-side MPU 142 is at a LOW level, and the connection confirmation signal input from the value-value-side MPU 142 to the main-side MPU 72 falls from a HIGH level to a LOW level. In the error information update process (FIG. 118) executed by the main-side MPU 72, the value of the current error information counter 96r is cleared to "0" based on the fact that the connection confirmation signal input from the value-value-side MPU 142 to the main-side MPU 72 is at a LOW level. Then, the current error information counter 96r is set to "1" based on the fact that the end flag 98c of the work area 98 for out-of-area processing is set to "1." This changes the value of the current error information counter 96r from "2" to "1."

After that, at timing t11, the production side MPU 92 receives a release error command, as shown in Figure 122 (c). Because the upper limit reached flag 94e is set to "1", the error notification termination process (step S6509) is not executed. Therefore, the error display corresponding to the "unit connection abnormality" continues, as shown in Figure 122 (b). In this way, a release error command received when the upper limit reached flag 94e is set to "1" is invalidated.

After that, at timing t12, when the presentation side MPU 92 receives an error command corresponding to "award limit reached" as shown in Figure 122 (d), the display on the image display device 63 switches from the error display corresponding to "unit connection abnormality" to the error display corresponding to "award limit reached" as shown in Figures 122 (a) and 122 (b) without creating a state in which no error display is being executed (a state in which a background image corresponding to the game status is displayed).

As described above, when the presentation-side MPU 92 receives an error command corresponding to "award limit reached," the limit reached flag 94e is set to "1." With the limit reached flag 94e set to "1," the presentation-side MPU 92 will not execute the error notification termination process (step S6509) even if it receives a release error command. This prevents a situation in which, if a "unit connection abnormality" occurs after the "award limit reached" event and the main MPU 72 sends two error commands in the order of a release error command followed by an error command corresponding to the "unit connection abnormality," the presentation-side MPU 92 receives the release error command and then an error command corresponding to the "unit connection abnormality," resulting in the presentation-side MPU 92 not displaying any error information (a background image corresponding to the game status is displayed). Furthermore, if the presentation-side MPU 92 fails to receive the error command corresponding to the "unit connection abnormality," the error display corresponding to "award limit reached" can remain displayed. This prevents a situation in which no error display is being displayed (a background image corresponding to the game state is being displayed) even though the "award limit reached" condition has not been resolved. Furthermore, if the "unit connection error" is resolved after the "award limit reached" and "unit connection error" conditions have occurred, and the main MPU 72 sends two error commands in the order of a release error command followed by an error command corresponding to "award limit reached," this prevents a situation in which no error display is being displayed (a background image corresponding to the game state is being displayed) based on the presentation MPU 92 receiving the release error command. Furthermore, if the presentation MPU 92 fails to receive the error command corresponding to "award limit reached," the error display corresponding to "unit connection error" can be maintained. This prevents a situation in which no error display is being displayed (a background image corresponding to the game state is being displayed) even though the "award limit reached" condition has not been resolved.

<Alternative to the eleventh embodiment>
(1) In the eleventh embodiment, in a configuration in which multiple error displays are not basically executed in a redundant manner on the image display device 63, when a state in which "award limit reached" and "unit connection abnormality" occur, an error display corresponding to "award limit reached" and an error display corresponding to "unit connection abnormality" may be executed in a redundant manner on the image display device 63. Specifically, in the error display corresponding to "award limit reached", a text image saying "Game stopped due to award limit reached" is displayed in the upper area of the screen of the image display device 63, and in the error display corresponding to "unit connection abnormality", a text image saying "Game stopped due to unit connection abnormality" is displayed in the lower area of the screen of the image display device 63.

When the presentation-side MPU 92 receives an error command corresponding to "unit connection abnormality" while the limit reached flag 94e is set to "1," it causes the presentation-side MPU 92 to start displaying a text image reading "Game stopped due to unit connection abnormality" in the lower area of the screen while maintaining the display of a text image reading "Game stopped due to unit connection abnormality" in the upper area of the screen of the image display device 63. Furthermore, when the presentation-side MPU 92 receives an error command corresponding to "award limit reached" while the limit reached flag 94e is set to "1" and an error display corresponding to "award limit reached" and an error display corresponding to "unit connection abnormality" are being displayed, it causes the presentation-side MPU 92 to stop displaying the text image reading "Game stopped due to unit connection abnormality" in the lower area of the screen while maintaining the display of the text image reading "Award limit reached" in the upper area of the screen of the image display device 63. This prevents a situation in which neither error display is displayed due to the occurrence of a "unit connection abnormality" or the resolution of the "unit connection abnormality" when an error display corresponding to "award limit reached" is being displayed. This prevents players and arcade managers from misunderstanding that the "award limit reached" condition has been temporarily resolved.

(2) In the above-described eleventh embodiment, the presentation-side RAM 94 may be configured to receive backup power from the power interruption unit of the power supply device 54 when the supply of operating power from the external power source is interrupted. Specifically, the image display device 63 displays an initial screen from the time the supply of operating power to the slot machine 10 begins until the presentation-side MPU 92 receives a power restoration command or a setting change start command. When the presentation-side MPU 92 receives a setting change start command, it controls the display of the image display device 63 so that the display on the image display device 63 switches from the initial screen display to a setting change in progress display, regardless of the value of the error display counter 94f, and clears the upper limit reached flag 94e and the error display counter 94f to "0." Furthermore, when the presentation-side MPU 92 receives a setting change end command, it controls the display of the image display device 63 so that the display on the image display device 63 switches from the setting change in progress display to a background image corresponding to the normal gaming state ST1. If the presentation-side MPU 92 receives a power restoration command when the value of the error display counter 94f is "0," it controls the display of the image display device 63 so that the initial screen display ends and the background image corresponding to the gaming state before the power was cut off begins to be displayed. Furthermore, if the presentation-side MPU 92 receives a power restoration command when the value of the error display counter 94f is between "1" and "5," it controls the display of the image display device 63 so that the display of the image display device 63 switches from the initial screen display to an error display corresponding to the value of the error display counter 94f, without causing a state in which the background image corresponding to the gaming state is being displayed. This prevents a state in which the background image corresponding to the gaming state is being displayed even though the "award limit reached" that occurred before the power was cut off has not been resolved.

Twelfth Embodiment
In this embodiment, the type of external output signal output from the main MPU 72 to the value-value MPU 142 differs from that of the eleventh embodiment. The following describes the configuration that differs from the eleventh embodiment. Note that the description of the same configuration as the eleventh embodiment will basically be omitted.

As in the first embodiment above, when a transition to the base AT state ST4 occurs, the AT difference number counter 96e in the work area 96 for intra-area processing is set to "200" as the initial awarded number. Also, in the base AT state ST4, the value of the AT difference number counter 96e in the work area 96 for intra-area processing becomes "0," thereby satisfying the termination condition for the base AT state ST4 and transitioning to the normal gaming state ST1. The AT difference number counter 96e is a counter used by the main MPU 72 to determine the remaining awarded number of gaming values in the base AT state ST4. Even if the termination condition for the base AT state ST4 is satisfied, the second section SC2 is not terminated. When the base AT state ST4 is terminated based on the satisfaction of the termination condition for the base AT state ST4, the CZ state is initiated.

As in the first embodiment, in the second section SC2, if the value of the total winnings counter 96d in the work area 96 for in-area processing becomes "65521" or greater, i.e., if the total number of winnings in game value since the start of the second section SC2 becomes "2400" or greater, the ending condition for the second section SC2 is met, the first section SC1 is entered, and the normal game state ST1 is entered. The total winnings counter 96d is a counter used by the main MPU 72 to determine the total number of winnings in game value since the start of the second section SC2 when the second section SC2 is continued without the first section SC1 in between. If a win occurs with any index value IV in the game executed after the second section SC2 has ended based on the ending condition for the second section SC2 being met, the game transitions to the second section SC2 and the CZ state is initiated.

In addition to the external game start signal and external base AT signal in the 11th embodiment, external signals transmitted from the card unit 130 to the amusement hall's management computer HC and data display device DH also include an external AT first win signal. Note that these external signals may be transmitted to only one of the amusement hall's management computer HC and data display device DH.

As in the eleventh embodiment, the external output signals output from the main MPU 72 to the value number MPU 142 include a game start signal corresponding to the external game start signal and a base AT signal corresponding to the external base AT signal. In this embodiment, the external output signals output from the main MPU 72 to the value number MPU 142 include an AT first hit signal corresponding to the external AT first hit signal. When transitioning to the base AT state ST4 in a game state other than the CZ state set when the base AT state ST4 is terminated based on the establishment of the termination condition for the base AT state ST4, or the CZ state set when transitioning from the first section SC1 to the second section SC2 after the second section SC2 is terminated based on the establishment of the ending condition for the second section SC2, the main MPU 72 raises the AT first hit signal from a LOW level to a HIGH level and sets a period (300.98 milliseconds) during which the AT first hit signal is prohibited from falling. In addition, the main MPU 72 drops the AT first hit signal from HI level to LOW level based on the elapse of the fall prohibition period (300.98 milliseconds) set when the AT first hit signal rose.

As already explained in the eleventh embodiment above, the timing for transmitting the third gaming machine information notification occurs at a cycle of 300 milliseconds. When the timing for transmitting the third gaming machine information notification arrives, the value number side MPU 142 sets the information of the game start signal, base AT signal, and AT first hit signal input to the value number side MPU 142 at that transmission timing (data of "0" corresponding to LOW level or "1" corresponding to HI level) as external signal information in the third gaming machine information notification, and sets the third gaming machine information notification in the value number side transmission buffer 149.

The external signals output from the card unit 130 (specifically, the external game start signal, external base AT signal, and external AT first hit signal) are input to the amusement hall's management computer HC and data display device DH. When the card unit 130 receives the third gaming machine information notification, if the external signal information set in the received third gaming machine information notification contains information corresponding to a low level ("0") for the AT first hit signal, the card unit 130 sets the state of the external AT first hit signal output from the card unit 130 to the amusement hall's management computer HC and data display device DH to a low level. Furthermore, if the AT first hit signal contains information corresponding to a high level ("1") for the AT first hit signal, the card unit 130 sets the state of the external AT first hit signal to a high level. The amusement hall's management computer HC and data display device DH can determine that a first hit has occurred in the slot machine 10, transitioning to base AT state ST4, based on the detection of a rising edge in the external AT first hit signal.

The data display device DH counts the number of rising edges of the external base AT signal input to the data display device DH, thereby determining the number of times the transition to base AT state ST4 has occurred. The data display device DH also counts the number of rising edges of the external AT first hit signal input to the data display device DH.

The display screen of the data display device DH displays the number of AT first hits and the number of consecutive AT transitions. The number of AT first hits is the number of times the rising edge of the external AT first hit signal input to the data display device DH is detected. The number of consecutive AT transitions is the number of times a transition to base AT state ST4 occurs without an intervening rising edge of the external AT first hit signal. When the data display device DH detects a rising edge of the external AT first hit signal, the number of consecutive AT transitions becomes "1", regardless of the number of consecutive AT transitions at the time the rising edge was detected. Thereafter, the number of consecutive AT transitions is updated by incrementing it by 1 each time a transition to base AT state ST4 occurs without an intervening rising edge of the external AT first hit signal.

Based on the number of AT first hits displayed on the display screen of the data display device DH, players and amusement hall managers can ascertain the number of transitions to the base AT state ST4 (hereinafter referred to as "AT first hits" in the 12th embodiment) that occur in a gaming state that is neither a CZ state, which is established when the base AT state ST4 is terminated based on the fulfillment of the termination conditions for the base AT state ST4, nor a CZ state, which is established when the first section SC1 transitions to the second section SC2 after the second section SC2 is terminated based on the fulfillment of the ending conditions for the second section SC2. Furthermore, based on the number of consecutive AT transitions displayed on the display screen of the data display device DH, players and amusement hall managers can ascertain the number of transitions to the base AT state ST4 that occurred without an intervening AT first hit. The display content on the data display device DH is optional, and the data display device DH may be configured to display only either the number of AT first hits or the number of consecutive AT transitions. In addition, all or part of the display of the number of initial AT wins and the number of consecutive AT transitions may be performed by the gaming hall's management computer HC.

Figure 123(a) is an explanatory diagram for explaining the configuration of the work area 96 for intra-area processing. As already explained in the eleventh embodiment above, the work area 96 for intra-area processing includes a current external signal area 96m, a reserved external signal area 96n, a start reservation flag 96o, a first interval setting counter 96p, and a second interval setting counter 96q. Also, as shown in Figure 123(a), the work area 96 for intra-area processing includes a third interval setting counter 96t. The third interval setting counter 96t is a timer counter that allows the main MPU 72 to determine that 300.98 milliseconds have elapsed since the start of the AT first hit signal. The value of the third interval setting counter 96t is updated in the timer subtraction process (step S5808) of the timer interrupt process (Figure 109), similar to the update of the values of the first interval setting counter 96p and the second interval setting counter 96q. In the timer subtraction process (step S5808), the value of the third interval setting counter 96t is subtracted by 1, and if the value after subtraction of 1 falls below "0", the value of the third interval setting counter 96t is cleared to "0".

Figure 123(b) is an explanatory diagram illustrating the configuration of the current external signal area 96m, and Figure 123(c) is an explanatory diagram illustrating the configuration of the reserved external signal area 96n. As with the 11th embodiment above, in the current external signal area 96m, setting data for the game start signal is set in bit 0, and setting data for the base AT signal is set in bit 1. Also, as shown in Figure 123(b), in the current external signal area 96m, setting data for the AT first hit signal is set in bit 2. Bits 3 to 7 in the current external signal area 96m are unused.

As in the 11th embodiment, in the reserved external signal area 96n, reservation data for the game start signal is set in bit 0, and reservation data for the base AT signal is set in bit 1. Also, as shown in FIG. 123(c), in the reserved external signal area 96n, reservation data for the AT first hit signal is set in bit 2. Bits 3 to 7 in the reserved external signal area 96n are unused. By providing the reserved external signal area 96n, it is possible to store reservation data for external signals in the work area 96 for in-area processing while maintaining the setting data stored in the current external signal area 96m. As in the 11th embodiment, setting data and reservation data of "1" correspond to a HI level of the external output signal, and setting data and reservation data of "0" correspond to a LOW level of the external output signal.

As previously explained, when transitioning to the base AT state ST4 occurs in a game state other than the CZ state, which is established when the base AT state ST4 is terminated based on the fulfillment of the termination conditions for the base AT state ST4, and the CZ state, which is established when the transition from the first section SC1 to the second section SC2 occurs after the second section SC2 is terminated based on the fulfillment of the ending conditions for the second section SC2, the main MPU 72 raises the AT first hit signal from a LOW level to a HIGH level and sets a period during which the AT first hit signal is prohibited from falling (300.98 milliseconds). Also, as previously explained, when a transition to the base AT state ST4 occurs, the AT difference number counter 96e in the work area 96 for in-area processing is set to "200" as the initial award number. The value of the AT difference number counter 96e becomes "0" and the base AT state ST4 ends after the period during which the prohibition of falling (300.98 milliseconds) set when the AT first hit signal is raised has elapsed. Furthermore, if the pre-ending condition (the condition that the value of the total winnings counter 96d is equal to or greater than 65321) is met before the value of the AT difference counter 96e reaches "0" and a transition to the ending AT state ST5 occurs, the timing at which the ending AT state ST5 ends is after the decline prohibition period (300.98 milliseconds) set when the AT first hit signal rises. Thus, the timing at which the gaming state returns to the normal gaming state ST1 after a transition to the base AT state ST4 occurs is after the decline prohibition period (300.98 milliseconds) set when the AT first hit signal rises. Therefore, the gaming state will not return to the normal gaming state ST1 and transition to the base AT state ST4 will not occur before the decline prohibition period (specifically, 300.98 milliseconds) set when the AT first hit signal rises has elapsed. Therefore, a situation will not occur in which two AT first hit signal rise reservations are set in an overlapping manner.

As shown in FIG. 123(a), the work area 96 for intra-area processing includes a signal output avoidance flag 96u. The signal output avoidance flag 96u is a flag that allows the main MPU 72 to determine whether the rising of the AT initial win signal should be avoided when a transition to the base AT state ST4 occurs. The signal output avoidance flag 96u is set to "1" at the start of the CZ state, which is set when the base AT state ST4 is terminated based on the fulfillment of the termination condition for the base AT state ST4, or at the start of the CZ state, which is set when a transition from the first section SC1 to the second section SC2 occurs after the second section SC2 is terminated based on the fulfillment of the ending condition for the second section SC2. The value of the signal output avoidance flag 96u is cleared to "0" when these CZ states end without a win occurring to transition to the base AT state ST4. The value of the signal output avoidance flag 96u is also cleared to "0" when a transition to the base AT state ST4 occurs during these CZ states, preventing the rising of the AT initial win signal.

Next, the base AT processing executed by the main MPU 72 will be explained with reference to the flowchart in Figure 124. As already explained in the first embodiment above, the base AT processing is executed in step S705 of the corresponding processing at the end of play (Figure 23). Note that the processing of steps S6701 to S6707 in the base AT processing is executed as intra-area processing using the intra-area processing program and intra-area processing data.

If the value of the AT difference counter 96e in the work area 96 for intra-area processing is "0" (step S6701: YES), i.e., if the termination condition for the base AT state ST4 is met, the base AT state flag in the various flag area 96i in the work area 96 for intra-area processing is cleared to "0" (step S6702). This ends the situation in the second section SC2 and base AT state ST4, and the situation shifts to the second section SC2 and normal game state ST1. Then, a setting process for the release game number counter 96g is executed (step S6703). In this setting process, the release game number counter 96g in the work area 96 for specific control is set to "1000" as the ceiling game number.

Then, the signal output avoidance flag 96u in the work area 96 for intra-area processing is set to "1" (step S6704). Then, the CZ state flag in the various flag area 96i in the work area 96 for intra-area processing is set to "1", and the CZ state counter 96h in the work area 96 for intra-area processing is set to "3" (step S6705). By setting the CZ state flag to "1" in step S6705, the CZ state is initiated. Furthermore, by setting the CZ state counter 96h to "3", the number of games remaining until the CZ state ends is three games. In this way, when the base AT state ST4 ends and the CZ state begins based on the establishment of the end condition for the base AT state ST4, the signal output avoidance flag 96u is set to "1".

If the value of the AT difference counter 96e is not "0" (step S6701: NO), steps S6706 and S6707 execute the same processing as steps S1104 and S1105 of the base AT processing (FIG. 27) in the first embodiment. Specifically, it determines whether the value of the total winnings counter 96d in the work area 96 for intra-area processing is equal to or greater than "65321," which corresponds to the fulfillment of the pre-ending condition (step S6706). A positive determination in step S6706 indicates that the pre-ending condition has been fulfilled. In this case, the ending AT state flag in the various flags area 96i in the work area 96 for intra-area processing in the main RAM 74 is set to "1," and the base AT state flag in the various flags area 96i is cleared to "0" (step S6707). This transitions the game state from the base AT state ST4 to the ending AT state ST5.

When the total number of wins in the second section SC2 in the base AT state ST4 corresponds to the fulfillment of the conditions before the ending occurs, the state transitions to the ending AT state ST5 regardless of the value of the AT difference number counter 96e, i.e., the number of remaining gaming media awarded in the base AT state ST4. The ending AT state ST5 then continues until the ending conditions of the second section SC2 are fulfilled. This ensures that the ending conditions of the second section SC2 are fulfilled when the conditions before the ending occurs in the second section SC2 are fulfilled.

Next, we will explain the case where the second zone transition process (Figure 125) is executed by the main MPU 72. As already explained in the tenth embodiment above, game start process is executed in step S5512 of the role lottery process (Figure 100). In the game start process, processes similar to steps S5601 to S5603 and steps S5606 to S5613 of the game start process (Figure 101) in the tenth embodiment above are executed. As already explained in the tenth embodiment above, in the game start process, role lottery process (Figure 100) is executed in a game started in the first zone SC1, and if any index value IV is won in the role lottery process, the second zone transition process is executed in step S5603.

Next, prior to describing the second section transition process (FIG. 125), we will describe the configuration of the work area 96 for intra-area processing used in the second section transition process (FIG. 125). As with the tenth embodiment, the work area 96 for intra-area processing is provided with a CB internal start flag. As already explained in the tenth embodiment, the CB internal start flag is a flag that allows the main MPU 72 to determine whether or not a current game has started in the CB internal state when one game has been played.

As already explained in the eleventh embodiment, the lottery process for winning combinations is executed in step S5710 of the normal processing (Figure 108). In the lottery process for winning combinations, the same processes as steps S5501 to S5513 of the lottery process for winning combinations in the tenth embodiment (Figure 100) are executed. As already explained in the tenth embodiment, in the lottery process for winning combinations, on the condition that the state is the CB internal state (step S5501: YES), a process is executed (step S5502) to set the CB internal start flag provided in the work area 96 for in-area processing to "1". The CB internal start flag is cleared to "0" after the base AT signal reservation process (steps S5718 to S5722) is executed in the normal processing (Figure 108) and before the acceptance permission process (step S5723) is started. By setting the CB internal start flag to "1" in step S5502, the main MPU 72 can determine that the current game has started in the CB internal state.

Next, the second zone transition processing executed in step S5603 of the game start processing (Figure 101) will be explained with reference to the flowchart in Figure 125. Note that the processing of steps S6801 to S6808 in the second zone transition processing is executed as intra-zone processing using intra-zone processing programs and intra-zone processing data.

First, the second section flag in the various flags area 96i is set to "1" to transition the play section from the first section SC1 to the second section SC2 (step S6801). Then, the continued game number counter 96c in the work area 96 for in-area processing is cleared to "0" (step S6802), and the total wins counter 96d is set to "63121" as its initial value (step S6803).

Then, the release game number counter 96g in the work area 96 for in-area processing is set to "1000" as the ceiling game number (step S6804). Each time a game is played in the second section SC2 and normal gaming state ST1, the value of the release game number counter 96g is decremented by 1, and when the value of the release game number counter 96g after the decrement becomes "0", processing is executed to transition to the base AT state ST4. Note that if a game is played in the CB state, the value of the release game number counter 96g is not decremented. Then, processing to light up the section display unit 67 is executed, switching the section display unit 67 from an unlit state to an lit state (step S6805).

If the CB internal start flag provided in the work area 96 for intra-area processing is set to "1" (step S6806: YES), the signal output avoidance flag 96u provided in the work area 96 for intra-area processing is set to "1" (step S6807). Then, the CZ state flag in the various flags area 96i in the work area 96 for intra-area processing is set to "1", and the CZ state counter 96h in the work area 96 for intra-area processing is set to "3" (step S6808). Setting the CZ state flag to "1" in step S6808 starts the CZ state. Furthermore, setting the CZ state counter 96h to "3" means that the number of games remaining until the CZ state ends is 3.

In this way, if a transition to the second section SC2 occurs in a game that was started in the CB internal state, the signal output avoidance flag 96u is set to "1" and the CZ state is initiated. On the other hand, if a transition to the second section SC2 occurs in a game that was started in a state other than the CB internal state, the CZ state is not initiated and the value of the signal output avoidance flag 96u is set to "0."

As already explained in the tenth embodiment above, when the CB winning data is not stored in the main RAM 74 and the lottery process for a role is performed by referring to the role lottery table for a three-coin bet, the probability of winning the index value IV (specifically, "17") for which the CB winning data is set is approximately 1/3.3, and the game is played while avoiding the establishment of a CB win. Therefore, when the ending conditions are met and the ending AT state ST5 ends, and the first game is played after the end of the ending AT state ST5, the game state at the start of the first game is basically the CB internal state. Then, when a transition to the second section SC2 occurs in a game started in the CB internal state, the signal output avoidance flag 96u is set to "1" and the CZ state is initiated.

Since the CB winning data is cleared by executing the all-clear process for the area (step S106), when the first game is played after the all-clear process for the area (step S106) is executed, the game state at the start of that first game will be a non-CB internal state. If a transition to the second section SC2 occurs in a game started in that non-CB internal state, the CZ state will not be initiated, and the value of the signal output avoidance flag 96u will be set to "0."

Next, we will explain the normal start processing executed by the main MPU 72. As already explained in the 10th embodiment above, the normal start processing is executed in step S5609 of the game start processing (Figure 101).

During normal start processing, the value of the release game number counter 96g is first decremented by 1. As a result, if a game is played in the second section SC2 and normal gaming state ST1, the remaining ceiling game count is decremented by 1. After that, if the AT win flag provided in the various flags area 96i in the work area 96 for intra-area processing is not set to "1," i.e., if transition to the base AT state ST4 has not been confirmed, AT lottery processing is executed. During the AT lottery processing, an AT lottery table provided as data for intra-area processing in the main ROM 73 is read, and random number information at that time is read from a lottery counter provided in the work area 96 for intra-area processing and updated regularly, and this AT lottery table and random number information are used to determine whether or not a transition to the base AT state ST4 has been won.

As already explained in the first embodiment above, the AT lottery table contains a set of numerical information referenced when not in the CZ state and a set of numerical information referenced when in the CZ state. In this case, the set of numerical information referenced when in the CZ state is set to have a higher probability of winning a transition to the base AT state ST4 than the set of numerical information referenced when not in the CZ state. Furthermore, regardless of whether the set of numerical information referenced when in the CZ state or the set of numerical information referenced when not in the CZ state is used, a game that wins an index value IV with a relatively low winning probability in the role lottery process (Figure 100) is set to have a higher probability of winning a transition to the base AT state ST4 than a game that wins an index value IV with a relatively high winning probability in the role lottery process (Figure 100). The expected value of winning a transition to the base AT state ST4 when not in the CZ state is approximately 5%, and the expected value of winning a transition to the base AT state ST4 when in the CZ state is approximately 50%. If the AT lottery process results in a win to transition to the base AT state ST4, the AT win flag in the various flags area 96i is set to "1". This allows the main MPU 72 to determine that transition to the base AT state ST4 has been confirmed.

Next, the normal processing executed by the main MPU 72 will be described with reference to the flowchart in Figure 126. As already explained in the first embodiment above, the normal processing is executed in step S704 of the response processing at the end of play (Figure 23). Note that steps S6901 to S6911 in the normal processing are executed as intra-area processing using intra-area processing programs and intra-area processing data.

First, it is determined whether the value of the release game number counter 96g in the work area 96 for intra-area processing is "0" to determine whether the ceiling number of games has been played in the second section SC2 and normal gaming state ST1 (step S6901). If the value of the release game number counter 96g is not "0" (step S6901: NO), it is determined whether the AT win flag in the various flags area 96i in the work area 96 for intra-area processing is set to "1" (step S6902). If the AT win flag is not set to "1" (step S6902: NO), it is determined whether the CZ state is in place by determining whether the CZ state flag in the various flags area 96i in the work area 96 for intra-area processing is set to "1" (step S6903).

If the game is in the CZ state (step S6903: YES), the value of the CZ state counter 96h is decremented by 1 (step S6904). If the value of the CZ state counter 96h after decrementing by 1 is "0" (step S6905: YES), the CZ state is terminated by clearing the CZ state flag in the various flags area 96i to "0" (step S6906). When the CZ state flag is cleared to "0" and the CZ state is terminated, the AT lottery process executed in the normal start process (step S5609) described above references the numerical information group that is referenced when the game is not in the CZ state in the AT lottery table, so the likelihood of winning and transitioning to the base AT state ST4 is lower than when the game is in the CZ state.

Then, the signal output avoidance flag 96u is cleared to "0" (step S6907). This allows the main MPU 72 to determine that the situation in which the rise of the AT first hit signal should be avoided when transitioning to the base AT state ST4 has ended. In this way, if the CZ state ends without a winning entry to the base AT state ST4, the value of the signal output avoidance flag 96u is cleared to "0." This allows the AT first hit signal to be raised upon transition to the base AT state ST4 that occurs after the CZ state ends, even if the base AT state ST4 ends and the CZ state begins based on the fulfillment of the base AT state ST4 termination condition. Furthermore, if the ending AT state ST5 ends, the first section SC1 begins, and a transition to the second section SC2 occurs, resulting in a CZ state, and the CZ state ends without a winning entry to the base AT state ST4, the AT first hit signal can be raised upon transition to the base AT state ST4 that occurs after the CZ state ends.

When the ceiling number of games is exhausted and the value of the release game number counter 96g becomes "0" (step S6901: YES), or when a win occurs to transition to base AT state ST4 (step S6902: YES), processing to set to base AT state ST4 (steps S6908 and S6909) is executed. Specifically, the base AT state flag in the various flags area 96i in the work area 96 for in-area processing is set to "1", and the AT win flag, CZ state flag, and CZ state counter 96h are cleared to "0" (step S6908).

In this way, if a win occurs in the CZ state to transition to the base AT state ST4, the CZ state ends and transitions to the base AT state ST4, even if the three games set in the CZ state counter 96h at the start of the CZ state have not been played. Also, transitions to the base AT state ST4 occur when the value of the release game number counter 96g becomes "0".

Then, the AT difference number counter 96e in the work area 96 for intra-area processing is set to "200" as the initial award number (step S6909). Then, if the signal output avoidance flag 96u is not set to "1" (step S6910: NO), the AT initial hit signal start reservation process is executed (step S6911). In this start reservation process, the second bit of the reserved external signal area 96n is set to "1". This sets the start of the AT initial hit signal to a reserved state. On the other hand, if the signal output avoidance flag 96u is set to "1" (step S6910: YES), the AT initial hit signal start reservation process (step S6911) is not executed, and the process proceeds to step S6907 already described, where the signal output avoidance flag 96u is cleared to "0", and this normal process (FIG. 126) is terminated.

In this way, when a transition to the base AT state ST4 occurs when the signal output avoidance flag 96u is not set to "1," the second bit of the reserved external signal area 96n is set to "1." Also, when a transition to the base AT state ST4 occurs based on a win to transition to the base AT state ST4 occurring in the AT lottery process when the signal output avoidance flag 96u is set to "1," the second bit of the reserved external signal area 96n is not set to "1." This makes it possible to reserve the activation of the AT initial win signal when a transition to the base AT state ST4 occurs in a gaming state that is neither the CZ state set when the base AT state ST4 is terminated based on the establishment of the termination condition for the base AT state ST4, nor the CZ state set when a transition occurs from the first section SC1 to the second section SC2 after the second section SC2 is terminated based on the establishment of the ending condition for the second section SC2. Furthermore, in the CZ state that is set when the base AT state ST4 is terminated based on the completion of the termination condition of the base AT state ST4, or in the CZ state that is set when transitioning from the first section SC1 to the second section SC2 after the second section SC2 has ended based on the completion of the ending condition of the second section SC2, when transitioning to the base AT state ST4, the rise of the AT first hit signal can be set to a state where it is not reserved.

As already explained in the first embodiment above, the release game number counter 96g is a counter that allows the main MPU 72 to determine the maximum number of games required in the normal gaming state ST1 before the base AT state ST4 is initiated. The release game number counter 96g is set to "1000" when there is a transition from the first interval SC1 to the second interval SC2, or when the termination conditions for the base AT state ST4 are met and the normal gaming state ST1 is entered while the second interval SC2 is continuing. Therefore, when the signal output avoidance flag 96u is set to "1", a transition to the base AT state ST4 will not occur based on the value of the release game number counter 96g becoming "0".

Next, the external output processing executed by the main MPU 72 will be described with reference to the flowchart in Figure 127. As already explained in the 11th embodiment, the external output processing is executed in step S5813 of the timer interrupt processing (Figure 109). Note that steps S7001 to S7011 in the external output processing are executed as in-area processing using the in-area processing program and in-area processing data.

First, game start signal control processing is executed (step S7001). In the game start signal control processing, processing similar to steps S6101 to S6112 of the external output processing (FIG. 113) in the eleventh embodiment is executed. Then, base AT signal control processing is executed (step S7002). In the base AT signal control processing, processing similar to steps S6113 to S6122 of the external output processing (FIG. 113) in the eleventh embodiment is executed. The contents of the game start signal control processing (step S7001) and the contents of the base AT signal control processing (step S7002) are as already explained in the eleventh embodiment.

Then, if the reservation data for the AT first hit signal stored in the second bit of the reserved external signal area 96n is "1" (step S7003: YES), it is determined whether the setting data for the AT first hit signal stored in the second bit of the current external signal area 96m is "0" (step S7004).

If the reservation data for the AT first hit signal is "1" and the setting data is "0" (steps S7003 and S7004: YES), i.e., if the raising of the AT first hit signal is reserved, the AT first hit signal is turned ON, thereby raising the AT first hit signal output to the value number side MPU 142 from LOW level to HIGH level (step S7005).

Then, the setting data for the AT first hit signal is updated by setting the reservation data ("1") for the AT first hit signal to the second bit of the current external signal area 96m (step S7006). This allows the main MPU 72 to determine that the AT first hit signal is at a HI level based on the setting data for the AT first hit signal. Then, the numerical information "202", which corresponds to 300.98 milliseconds, is set in the third interval setting counter 96t (step S7007). This causes the third interval setting counter 96t to begin measuring the period during which the AT first hit signal is prohibited from falling (300.98 milliseconds).

If the reservation data and setting data for the AT first hit signal are "1" (step S7003: YES, step S7004: NO), i.e., if the AT first hit signal has been raised, it is determined whether the value of the third interval setting counter 96t is "0" (step S7008). If the value of the third interval setting counter 96t is "0" (step S7008: YES), i.e., if the lowering prohibition period (300.98 milliseconds) set when the AT first hit signal was raised has elapsed, the AT first hit signal is turned OFF, thereby lowering the AT first hit signal output to the value number side MPU 142 from HI level to LOW level (step S7009).

If the AT first hit signal is configured to fall to a low level before 300 milliseconds (the period during which the third gaming machine information notification is transmitted) have elapsed since the AT first hit signal was raised to a high level, there is a risk that the AT first hit signal will fall to a low level after the AT first hit signal is raised to a high level and before the third gaming machine information notification setting process (step S5922) is executed. In other words, there is a risk that the third gaming machine information notification corresponding to the state in which the AT first hit signal is at a high level will not be transmitted. Thus, if the AT first hit signal is raised but the third gaming machine information notification corresponding to the state in which the AT first hit signal is at a high level is not transmitted, the external AT first hit signal output from the card unit 130 to the gaming hall's management computer HC and data display device DH will not be raised even though an AT first hit has occurred. In contrast, when the AT first hit signal is raised, the AT first hit signal is configured to wait for the fall of the signal until the fall prohibition period (300.98 milliseconds) set when the AT first hit signal is raised has elapsed. This allows the AT first hit signal to remain at a HIGH level for a period of 300 milliseconds or more, and the third gaming machine information notification setting process (step S5922) to be executed while the AT first hit signal is maintained at a HIGH level. This prevents situations where the external AT first hit signal output from the card unit 130 is not raised even though an AT first hit has occurred.

After turning off the AT first hit signal in step S7009, the second bit of the current external signal area 96m and the second bit of the reserved external signal area 96n are set to "0" to clear the setting data and reservation data for the AT first hit signal to "0" (step S7010). By setting the value of the setting data for the AT first hit signal to "0", the main MPU 72 can determine that the AT first hit signal is at a LOW level. Furthermore, when the setting data and reservation data for the AT first hit signal are in a "0" state, no reservation for the rise or fall of the AT first hit signal has been made.

If the value of the third interval setting counter 96t is not "0" (step S7008: NO), that is, if the prohibition period (300.98 milliseconds) set when the AT first hit signal was raised has not elapsed, the process proceeds to step S7011 without executing the processing of steps S7009 to S7010. This prevents the AT first hit signal from being lowered when 300.98 milliseconds have not yet elapsed since the AT first hit signal was raised. In this way, an interval equal to or greater than the occurrence period (300 milliseconds) of the transmission timing of the third gaming machine information notification is ensured between the rise and fall of the AT first hit signal output to the value number side MPU 142.

If a negative determination is made in step S7003, if the processing of step S7007 is performed, if a negative determination is made in step S7008, or if the processing of step S7010 is performed, error information transmission processing is executed (step S7011), similar to step S6123 of the external output processing (FIG. 113) in the eleventh embodiment. The contents of the error information transmission processing are as already described in the eleventh embodiment.

Next, we will explain how the state of the AT initial hit signal changes, with reference to the time chart in Figure 128. Figure 128(a) shows the state of the AT initial hit signal, Figure 128(b) shows the state of the signal output avoidance flag 96u, Figure 128(c) shows the period in base AT state ST4, Figure 128(d) shows the period in ending AT state ST5, Figure 128(e) shows the state of the CZ state flag in the various flag areas 96i, Figure 128(f) shows the state of the second section flag in the various flag areas 96i, and Figure 128(g) shows the timing at which a win occurs that transitions to base AT state ST4.

First, let's explain how the AT first hit signal is activated.

The game starts in the second section SC2 and normal gaming state ST1, not in the CZ state and with the signal output avoidance flag 96u not set to "1." At time t1, if a win occurs in the AT lottery process to transition to base AT state ST4, as shown in FIG. 128(g), the game transitions to base AT state ST4, as shown in FIG. 128(c). Because the signal output avoidance flag 96u is not set to "1," the AT initial hit signal start reservation process (step S6911) is executed at time t1, and the AT initial hit signal start is reserved. Then, at time t2, when the external output process (FIG. 127) is executed, the AT initial hit signal output from the main MPU 72 to the value number MPU 142 is raised from LOW to HIGH, as shown in FIG. 128(a).

Next, we will explain how a transition to base AT state ST4 occurs during the CZ state, which is set when base AT state ST4 is terminated based on the fulfillment of the termination conditions for base AT state ST4, and how the rise of the AT first hit signal is avoided.

At timing t3, which is the base AT state ST4, the value of the AT difference counter 96e becomes "0" and the termination conditions for the base AT state ST4 are met. As shown in Figure 128(c), the base AT state ST4 ends and the normal gaming state ST1 is entered, and as shown in Figure 128(e), the CZ state flag is set to "1" and the CZ state is entered. As shown in Figure 128(f), the second section SC2 continues even after the base AT state ST4 ends. Also, at timing t3, the signal output avoidance flag 96u is set to "1" as shown in Figure 128(b).

Subsequently, at timing t4 in the CZ state, if a transition to base AT state ST4 is selected in the AT lottery process as shown in FIG. 128(g), the system transitions to base AT state ST4 as shown in FIG. 128(c). Because the signal output avoidance flag 96u is set to "1" as shown in FIG. 128(b), the AT initial win signal launch reservation process (step S6911) is not executed at timing t4. This prevents the launch of the AT initial win signal. Therefore, it is possible to prevent the third gaming machine information notification containing information ("1") corresponding to the HI level of the AT initial win signal from being sent from the value number side MPU 142 to the card unit 130. As shown in FIG. 128(b), the signal output avoidance flag 96u is cleared to "0" at timing t4.

Next, we will explain how a transition to the base AT state ST4 occurs during the CZ state, which is set when transitioning from the first section SC1 to the second section SC2 after the second section SC2 has ended based on the ending conditions of the second section SC2 being met, and how the activation of the AT first win signal is avoided. As already explained, when the ending conditions of the second section SC2 are met, the initialization process (step S1208) of the second section SC2 is executed in the game section control process (Figure 28).

When the initialization process for the second section SC2 (step S1208) is executed at timing t5, the ending AT state ST5 ends and the normal gaming state ST1 is entered, as shown in FIG. 128(d), and the second section flag is cleared to "0" and the first section SC1 is entered, as shown in FIG. 128(f). As already explained, even when the initialization process for the second section SC2 (step S1208) is executed, the CB internal state is maintained. After that, the game is executed after entering the first section SC1 and the normal gaming state ST1. If a win occurs with any index value IV, the second section flag is set to "1" at timing t6, as shown in FIGS. 128(e) and 128(f), and the system transitions to the second section SC2, and the CZ state flag is set to "1." Because the game was started in the CB internal state, the signal output avoidance flag 96u is set to "1" at timing t6, as shown in FIG. 128(b).

Subsequently, at timing t7, when the second section SC2 and the CZ state occur, if a transition to base AT state ST4 is selected in the AT lottery process as shown in FIG. 128(g), the game will transition to base AT state ST4 as shown in FIG. 128(c). Because the signal output avoidance flag 96u is set to "1" as shown in FIG. 128(b), the AT initial win signal launch reservation process (step S6911) is not executed. This prevents the launch of the AT initial win signal. Therefore, it is possible to prevent the third gaming machine information notification containing information ("1") corresponding to the HI level of the AT initial win signal from being sent from the value number side MPU 142 to the card unit 130. As shown in FIG. 128(b), the signal output avoidance flag 96u is cleared to "0" at timing t7.

As described above, when transitioning to the base AT state ST4 in the CZ state established when the base AT state ST4 is terminated based on the satisfaction of the termination condition of the base AT state ST4, or in the CZ state established when transitioning from the first section SC1 to the second section SC2 after the second section SC2 is terminated based on the satisfaction of the ending condition of the second section SC2, the raising of the AT first hit signal output from the main side MPU 72 to the value side MPU 142 is avoided. This allows the behavior of the AT first hit signal when transitioning to the base AT state ST4 in the CZ state established when transitioning from the first section SC1 to the second section SC2 after the second section SC2 is terminated based on the satisfaction of the ending condition of the second section SC2 to be the same as the behavior of the AT first hit signal when transitioning to the base AT state ST4 in the CZ state established when the base AT state ST4 is terminated based on the satisfaction of the termination condition of the base AT state ST4. Therefore, it is possible to prevent the player from knowing whether the second section SC2 has ended or not based on the display content corresponding to the state of the AT first hit signal on the data display device DH (specifically, the history display of the external AT first hit signal).

If the AT first hit signal is raised when the base AT state ST4 is entered in the CZ state, which is set when the first section SC1 transitions to the second section SC2 after the second section SC2 is completed based on the fulfillment of the ending conditions for the second section SC2, the number of consecutive AT transitions displayed on the display screen of the data display device DH will be set to "1" based on the detection of the rising edge of the external AT first hit signal in the data display device DH, causing the count of consecutive AT transitions to be interrupted. In contrast, the AT first hit signal is prevented from being raised when the base AT state ST4 is entered in the CZ state, which is set when the first section SC1 transitions to the second section SC2 after the second section SC2 is completed based on the fulfillment of the ending conditions for the second section SC2. This allows the number of consecutive AT transitions displayed on the display screen of the data display device DH to be updated by incrementing it by one. This prevents the count of consecutive AT transitions from being interrupted when the ending conditions for the second section SC2 are fulfilled, and improves the enjoyment of the game.

<Thirteenth embodiment>
In this embodiment, the processing configuration for changing the state of the external output signal output from the main side MPU 72 to the value side MPU 142 differs from that of the eleventh embodiment. The configurations that differ from the eleventh embodiment will be described below. Note that the description of the same configuration as the eleventh embodiment will basically be omitted.

As with the eleventh embodiment, an external base AT signal is sent from the card unit 130 to the amusement hall's management computer HC and data display device DH. In this embodiment, an external game-in-progress signal is also sent from the card unit 130 to the amusement hall's management computer HC and data display device DH. Note that these external signals may be sent to only one of the amusement hall's management computer HC and data display device DH.

External output signals output from the main MPU 72 to the value number MPU 142 include an in-game signal corresponding to the external in-game signal, and a base AT signal corresponding to the external base AT signal. A HIGH level of the in-game signal corresponds to a state in which a game is being executed, and a LOW level of the in-game signal corresponds to a state in which a game is not being executed. Furthermore, a HIGH level of the base AT signal corresponds to a state in which the gaming state is in base AT state ST4, and a LOW level of the base AT signal corresponds to a state in which the gaming state is not in base AT state ST4.

As already explained in the eleventh embodiment above, the value number side MPU 142 transmits the first to third gaming machine information notifications to the card unit 130. The timing for transmitting the third gaming machine information notification occurs at a cycle of 300 milliseconds. When the timing for transmitting the third gaming machine information notification arrives, the value number side MPU 142 sets the information of the in-game signal and base AT signal input to the value number side MPU 142 at that transmission timing (data of "0" corresponding to a LOW level or "1" corresponding to a HIGH level) as external signal information in the third gaming machine information notification, and sets the third gaming machine information notification in the value number side transmission buffer 149. The first to third gaming machine information notifications set in the value number side transmission buffer 149 are transmitted to the card unit 130 in the order in which they were set in the value number side transmission buffer 149.

The external signals output from the card unit 130 (specifically, the external game signal and external base AT signal) are input to the amusement hall's management computer HC and data display device DH. When the card unit 130 receives the third gaming machine information notification, if the external signal information set in the received third gaming machine information notification for the game signal is set to information corresponding to a LOW level ("0"), the card unit 130 sets the state of the external game signal to a LOW level, and if the information is set to information corresponding to a HIGH level ("1"), the card unit 130 sets the state of the external game signal to a HIGH level. The amusement hall's management computer HC and data display device DH can determine that one game has been played on the slot machine 10 based on the detection of a rising edge of the external game signal or a falling edge of the game signal.

The card unit 130 sets the external base AT signal state to LOW level if information corresponding to LOW level ("0") is set as the base AT signal information among the external signal information set in the received third gaming machine information notification, and sets the external base AT signal state to HI level if information corresponding to HI level ("1") is set. The gaming hall management computer HC and data display device DH can determine whether the gaming state of the slot machine 10 is in base AT state ST4 based on the state of the external base AT signal. In addition, they can determine the number of times the slot machine 10 has transitioned to base AT state ST4 based on the number of times a rising edge is detected in the external base AT signal.

Figure 129(a) is an explanatory diagram illustrating the configuration of the work area 96 for intra-area processing. As in the eleventh embodiment, the work area 96 for intra-area processing is provided with a current external signal area 96m and a reserved external signal area 96n. Also, as shown in Figure 129(a), the work area 96 for intra-area processing is provided with an interval setting counter 96v. In this embodiment, the current external signal area 96m is a one-byte area that allows the main MPU 72 to grasp information about the currently set in-game signal and base AT signal (either "0" corresponding to a low level or "1" corresponding to a high level). Also, the reserved external signal area 96n is a one-byte area that allows the main MPU 72 to grasp information about the in-game signal and base AT signal whose setting is reserved (either "0" corresponding to a low level or "1" corresponding to a high level).

Details will be provided below, but in the external output processing (Fig. 131) in step S5813 of the timer interrupt processing (Fig. 109), a fall prohibition period (300.98 milliseconds) of the in-game signal is set when the in-game signal is raised to a HI level, and a rise prohibition period (300.98 milliseconds) of the in-game signal is set when the in-game signal is lowered to a LOW level. A state in which the fall prohibition period and rise prohibition period of the in-game signal overlap will never occur. The interval setting counter 96v is set with numerical information ("202") corresponding to the fall prohibition period (300.98 milliseconds) of the in-game signal, and with numerical information ("202") corresponding to the rise prohibition period (300.98 milliseconds) of the in-game signal.

The interval setting counter 96v is updated by the timer decrement process in step S5808 of the timer interrupt process (Figure 109). In the timer decrement process (step S5808), the value of the interval setting counter 96v is decremented by 1, and if the value after decrementing by 1 falls below "0," the value of the interval setting counter 96v is cleared to "0."

This configuration measures the rise prohibition period of the in-game signal using an interval setting counter 96v for measuring the fall prohibition period of the in-game signal. This reduces the number of timer counters in the work area 96 for in-area processing compared to a configuration in which a timer counter different from the timer counter (interval setting counter 96v) for measuring the fall prohibition period of the in-game signal is provided as a timer counter for measuring the rise prohibition period of the in-game signal.

Figure 129(b) is an explanatory diagram illustrating the configuration of the current external signal area 96m, and Figure 129(c) is an explanatory diagram illustrating the configuration of the reserved external signal area 96n. As shown in Figure 129(b), in the current external signal area 96m, the setting data for the in-game signal is set in bit 0, and the setting data for the base AT signal is set in bit 1. Bits 2 to 7 in the current external signal area 96m are unused.

As shown in Figure 129 (c), in the reserved external signal area 96n, reservation data for in-game signals is set in bit 0, and reservation data for base AT signals is set in bit 1. Bits 2 to 7 in the reserved external signal area 96n are unused. By providing the reserved external signal area 96n, it is possible to store reservation data for external output signals in the work area 96 for in-area processing while maintaining the setting data stored in the current external signal area 96m. Setting data and reservation data of "1" correspond to a HI level for external output signals, and setting data and reservation data of "0" correspond to a LOW level for external output signals.

Next, normal processing executed by the main MPU 72 will be described with reference to the flowchart in Figure 130. Note that of the normal processing steps S7101 to S7123, all processing except for the completion monitoring processing called and executed in step S7112 is executed as in-area processing using a program for in-area processing and data for in-area processing, and the completion monitoring processing is executed as out-of-area processing using a program for out-of-area processing and data for out-of-area processing.

In steps S7101 to S7105, the same processing as steps S5701 to S5705 of the normal processing (Figure 108) in the eleventh embodiment is executed. Specifically, first the next timer interrupt is permitted (step S7101). Then, start waiting processing is executed (step S7102). The contents of the start waiting processing have already been explained in the eleventh embodiment. Then, it is determined whether the number of bets required to start a game (specifically, "3") has been set (step S7103), and if the number of game value bets is less than "3" (step S7103: NO), the process returns to step S7102.

If a positive judgment is made in step S7103, it is determined whether the start lever 41 has been operated (step S7104). In step S7104, a positive judgment is made if a HI level (signal level corresponding to the state in which the start lever 41 is being operated) of the detection signal input from the start detection sensor 41a to the main MPU 72 is detected in the sensor monitoring process (step S5807 of the timer interrupt process (Figure 109)) executed after the acceptance permission process (step S7123) described below is executed. In this way, the timer interrupt process (Figure 109) is executed at least once between the execution of the acceptance permission process in step S7123 and the positive judgment in step S7104. If the start lever 41 has not been operated (step S7104: NO), the process returns to step S7102. Note that a positive determination may be made in step S7104 if the HI level of the detection signal input from the start detection sensor 41a to the main MPU 72 is detected two or more times in succession during the sensor monitoring process (step S5807) executed after the acceptance process (step S7123) has been executed.

If it is determined in step S7104 that the start lever 41 has been operated, the main line ML is activated and then an acceptance prohibition process is executed (step S7105). Execution of the acceptance prohibition process disables operation of the gaming value insertion button 126. As already explained in the eleventh embodiment above, a state in which operation of the gaming value insertion button 126 is disabled means that even if the gaming value insertion button 126 is operated, no gaming value bet is made based on that operation. Then, a launch reservation process for the in-game signal is executed (step S7106). In this launch reservation process, "1" is set to the 0th bit of the reservation external signal area 96n.

After the in-game signal lowering reservation processing is executed in step S7117 (described below), the external output processing (FIG. 131) (described below) is executed in step S5813 of the timer interrupt processing (FIG. 109), causing the in-game signal to lower, and the in-game signal setting data stored in bit 0 of the current external signal area 96m and the in-game signal reservation data stored in bit 0 of the reserved external signal area 96n to become "0." Also, as described above, the timer interrupt processing (FIG. 109) is executed at least once between the execution of the acceptance processing in step S7123 and the affirmative judgment in step S7104. Therefore, the in-game signal raising reservation processing (step S7106) is executed when the in-game signal setting data and reservation data are "0." Execution of the in-game signal raising reservation processing (step S7106) causes the in-game signal setting data to become "0" and the reservation data to become "1," i.e., the in-game signal is reserved for raising. In the external output process (Figure 131), which will be described later, when the rise of the in-game signal is reserved, the in-game signal will be raised only if the in-game signal rise prohibition period (300.98 milliseconds) has elapsed.

After executing the in-game signal activation reservation process in step S7106, steps S7107 to S7115 execute the same processes as steps S5709 to S5717 of the normal processing (FIG. 108) in the eleventh embodiment described above. Specifically, step S7107 executes the start status storage process, step S7108 executes the winning combination lottery process, and step S7109 executes the reel control process. As already explained in the eleventh embodiment described above, in the reel control process, if the 4.1 second wait time set at the start of rotation of reels 32L, 32M, and 32R in the previous game has not elapsed, the start of rotation of reels 32L, 32M, and 32R is delayed until the wait time has elapsed. Thus, even after a positive determination is made in step S7104 and the game starts, if the 4.1 second wait time has not elapsed since the start of rotation of reels 32L, 32M, and 32R in the previous game, the start of rotation of reels 32L, 32M, and 32R will be delayed until that wait time has elapsed.

Then, in step S7110, the game value allocation process is executed, in step S7111, the response process at the end of the game is executed, in step S7112, the end monitoring process is executed, in step S7113, the end setting process is executed, in step S7114, the storage process at the end of the game is executed, and in step S7115, the game end command sending process is executed.

After executing the game end command transmission process in step S7115, it is determined whether the value of the interval setting counter 96v is "0" (step S7116). In step S7116, a positive determination is made if the value of the interval setting counter 96v is "0" after the prohibition period (300.98 milliseconds) set when the in-game signal was raised has elapsed.

As already explained, the interval setting counter 96v measures the fall prohibition period (300.98 milliseconds) set when the in-game signal rises, and also measures the rise prohibition period (300.98 milliseconds) set when the in-game signal falls. If the rise prohibition period (300.98 milliseconds) set when the in-game signal corresponding to one game falls has elapsed and the in-game signal rise reservation process (step S7106) for the next game of that game is executed, the in-game signal is raised and numerical information ("202") corresponding to the fall prohibition period (300.98 milliseconds) is set in the interval setting counter 96v in the external output process (Fig. 131) in step S5813 of the timer interrupt process (Fig. 109). Therefore, if the fall prohibition period of the in-game signal has elapsed, a positive determination is made in step S7116.

As with the eleventh embodiment, this configuration allows the time between the end of a game and the start of the next game of that game to be less than 300 milliseconds. If the next game of that game starts during the rise prohibition period (300.98 milliseconds) set when the in-game signal corresponding to that game falls, the in-game signal rise reservation process (step S7106) is executed while the interval setting counter 96v is measuring the rise prohibition period of the in-game signal. In this case, in the external output process (Fig. 131) in step S5813 of the timer interrupt process (Fig. 109), when the value of the interval setting counter 96v becomes "0" and the rise prohibition period of the in-game signal has elapsed, the in-game signal is raised and numerical information ("202") corresponding to the fall prohibition period (300.98 milliseconds) is set in the interval setting counter 96v. As already explained, the interval setting counter 96v is updated by the timer subtraction process in step S5808 of the timer interrupt process (Fig. 109). Furthermore, in the timer interrupt process (FIG. 109), the external output process (step S5813) is executed after the timer subtraction process (step S5808). Therefore, even if the next game is started during the period in which the in-game signal corresponding to that game is prohibited from rising, a positive determination will not be made in step S7116 based on the elapse of the period in which the in-game signal is prohibited from rising; a positive determination will be made in step S7116 only if the period in which the in-game signal is prohibited from falling has elapsed.

In this way, for each game, if the prohibition period for falling (300.98 milliseconds) set when the in-game signal corresponding to that game was raised has elapsed, a positive determination is made in step S7116. If the value of the interval setting counter 96v is not "0" (step S7116: NO), i.e., if the prohibition period for falling set when the in-game signal was raised has not elapsed, the determination process of step S7116 is repeated until the value of the interval setting counter 96v becomes "0." As a result, processing from step S7118 onwards is not executed until the prohibition period for falling of the in-game signal has elapsed, and the system is on standby for the end of the game. In this way, a period of at least 300.98 milliseconds is ensured as the period from the rise of the in-game signal to the end of the game. This 300.98 milliseconds is longer than the occurrence cycle (300 milliseconds) of the transmission timing of the third gaming machine information notification.

If a positive judgment is made in step S7116, a reservation process for lowering the in-game signal is executed (step S7117). In this reservation process, bit 0 of the reserved external signal area 96n is set to "0." This sets the reservation data for the in-game signal to "0." In the external output process (FIG. 131), described below, when the in-game signal is raised, the setting data for the in-game signal stored in bit 0 of the current external signal area 96m and the reservation data for the in-game signal stored in bit 0 of the reserved external signal area 96n are set to "1." In this state, the reservation process for lowering the in-game signal (step S7117) is executed, resulting in a state where the setting data for the in-game signal is "1" and the reservation data is "0," i.e., the lowering of the in-game signal is reserved. As described above, the reservation process for lowering the in-game signal (step S7117) is executed when the prohibition period for lowering (300.98 milliseconds) set when the in-game signal was raised has elapsed and a positive judgment is made in step S7116. When the in-game signal fall reservation process (step S7117) is executed and the in-game signal fall is reserved, the external output process (FIG. 131) is executed, causing the in-game signal to fall.

As with the eleventh embodiment, the period from the start of a game until all reels 32L, 32M, and 32R are stopped can be less than 300 milliseconds (the period during which the third gaming machine information notification transmission timing occurs). As already explained, the in-game signal start reservation process (step S7106) is executed upon the start of a game, and the in-game signal is reserved for start. In the external output process (FIG. 131) described below, the in-game signal is raised if the in-game signal start prohibition period has elapsed while the in-game signal is reserved for start. Therefore, all reels 32L, 32M, and 32R can be stopped before 300 milliseconds have elapsed since the in-game signal was raised, and the determination process of step S7116 can be executed. In contrast, by configuring step S7116 so that a positive determination is not made until the prohibition period for turning off the in-game signal (300.98 milliseconds) set when the in-game signal was raised has elapsed, the game is prevented from ending before 300.98 milliseconds have elapsed since the in-game signal was raised, and a reservation for turning off the in-game signal is prevented from being made before 300.98 milliseconds have elapsed since the in-game signal was raised.

After executing the in-game signal fall reservation process in step S7117, the base AT signal reservation process (steps S7118 to S7122) is executed. In the base AT signal reservation process, it is first determined whether or not the base AT state ST4 is in effect (step S7118). In step S7118, a positive determination is made if the base AT state flag in the various flags area 96i in the work area 96 for in-area processing is set to "1."

If the game is in base AT state ST4 and the setting data for the base AT signal stored in the first bit of the current external signal area 96m is "0" (steps S7118 and S7119: YES), i.e., if a transition to base AT state ST4 occurs in the current game, a base AT signal startup reservation process is executed (step S7120). In this startup reservation process, a "1" is set to the first bit of the reserved external signal area 96n. This results in a state where the setting data for the base AT signal is "0" and the reservation data is "1," i.e., the startup of the base AT signal is reserved. In this state, the external output process (Figure 131), described below, is executed, thereby starting the base AT signal.

If the base AT state ST4 is in and the setting data for the base AT signal is "1" (step S7118: YES, step S7119: NO), i.e., if a game is being played in base AT state ST4 and base AT state ST4 has not ended, the process proceeds to step S7123 without executing processing to reserve a state change for the base AT signal. This allows the HI level of the base AT signal to be maintained.

If the game state is not in base AT state ST4 and the setting data for the base AT signal is "1" (step S7118: NO, step S7121: YES), i.e., if base AT state ST4 has ended in the current game, a base AT signal lowering reservation process is executed (step S7122). In this lowering reservation process, the first bit of the reserved external signal area 96n is set to "0". This results in a state where the setting data for the base AT signal is "1" and the reservation data is "0", i.e., a state where the lowering of the base AT signal is reserved. In this state, the external output process (Figure 131), described below, is executed, causing the base AT signal to lower.

If the game state is not the base AT state ST4 and the setting data for the base AT signal is "0" (step S7118: NO, step S7121: NO), that is, if the game is being played in a game state other than the base AT state ST4 and no transition to the base AT state ST4 occurs, proceed to step S7123 without executing processing to reserve a state change for the base AT signal. This allows the LOW level of the base AT signal to be maintained.

If a negative judgment is made in step S7119, if the processing of step S7120 is performed, if a negative judgment is made in step S7121, or if the processing of step S7122 is performed, an acceptance permission process is executed (step S7123), similar to step S5723 in the normal processing (FIG. 108) in the eleventh embodiment described above. Execution of the acceptance permission process enables operation of the game value insertion button 126. However, if a game in which a replay win has been achieved has ended, if the number of game value bets already is "3", or if the number of owned game value is "0", no game value bet will be placed even if the game value insertion button 126 is operated. After executing the acceptance permission process (step S7123), the process proceeds to step S7101.

If the configuration were such that the in-game signal start reservation process (step S7106) corresponding to the game following that game could be executed when the in-game signal corresponding to that game's next game was scheduled to fall, it would be necessary to simultaneously store both the in-game signal fall reservation information and the in-game signal start reservation information. In contrast, this configuration makes it possible to start the next game after the game ends and the in-game signal corresponding to that game is fallen. This prevents a situation in which the in-game signal fall reservation corresponding to one game and the in-game signal start reservation corresponding to the game following that game are set at the same time. This simplifies the configuration of the main RAM 74 required to store the in-game signal start reservation information and the in-game signal fall reservation information. Furthermore, it simplifies the processing configuration for changing the state of the in-game signal based on whether the in-game signal start reservation information or the in-game signal fall reservation information has been set.

The interval setting counter 96v is used to wait for the end of the game until the prohibition period (300.98 milliseconds) set when the in-game signal is raised has elapsed. Furthermore, when the game ends, the base AT signal reservation process (steps S7118 to S7122) is executed based on the game status at the time of the end of the game. This ensures a period of at least 300.98 milliseconds between the execution of the base AT signal reservation process (steps S7118 to S7122) at the end of one game and the execution of the base AT signal reservation process (steps S7118 to S7122) at the end of the next game, without providing a timer counter separate from the interval setting counter 96v. This 300.98 milliseconds is longer than the occurrence period (300 milliseconds) of the timing for transmitting the third gaming machine information notification.

Next, the external output processing executed by the main MPU 72 will be described with reference to the flowchart in Figure 131. As already explained in the 11th embodiment, the external output processing is executed in step S5813 of the timer interrupt processing (Figure 109). Note that steps S7201 to S7217 in the external output processing are executed as in-area processing using the in-area processing program and in-area processing data.

If the reservation data for the in-game signal stored in bit 0 of the reserved external signal area 96n is "1" and the setting data for the in-game signal stored in bit 0 of the current external signal area 96m is "0" (step S7201 and step S7202: YES), i.e., if the rise of the in-game signal is reserved, it is determined whether the value of the interval setting counter 96v is "0" (step S7203). If the value of the interval setting counter 96v is "0" (step S7203: YES), i.e., if the rise prohibition period (300.98 milliseconds) set at the fall of the in-game signal has elapsed, the in-game signal being output to the value number side MPU 142 is raised from LOW level to HIGH level by executing ON processing for the in-game signal (step S7204).

As already explained, this configuration allows the period between the end of a game and the start of the next game to be less than 300 milliseconds. In this configuration, if the in-game signal is raised based on the start of a game, there is a risk that the in-game signal will be raised to a high level after the in-game signal is lowered to a low level and before the third gaming machine information notification setting process (step S5922) is executed. In other words, even if the in-game signal is lowered to a low level, there is a risk that the third gaming machine information notification corresponding to the state in which the in-game signal is at a low level will not be transmitted. Furthermore, if the third gaming machine information notification corresponding to the state in which the in-game signal is at a low level is not transmitted, the external in-game signal output from the card unit 130 to the gaming hall's management computer HC and data display device DH will not be lowered even after the game has ended and the next game has started. In contrast, this configuration allows the in-game signal to be raised after the rise prohibition period (300.98 milliseconds) set at the time the in-game signal is lowered has elapsed. This allows the duration of the in-game signal at a LOW level to be 300 milliseconds or more, and the third gaming machine information notification setting process (step S5922) to be executed while the in-game signal is maintained at a LOW level. This prevents the external game signal output from the card unit 130 from falling even when a game has ended and the next game has started.

After the in-game signal is turned ON in step S7204, the reservation data ("1") for the in-game signal is set to bit 0 of the current external signal area 96m, thereby updating the setting data for the in-game signal to "1" (step S7205). This allows the main MPU 72 to determine that the in-game signal is at a HI level. Furthermore, in the next processing iteration of the external output process (FIG. 131), a negative determination is made in step S7202. Thereafter, numerical information of "202", which corresponds to the in-game signal's prohibited fall period (300.98 milliseconds), is set in the interval setting counter 96v (step S7206). This causes the interval setting counter 96v to begin measuring this prohibited fall period (300.98 milliseconds).

In this way, in the external output process (Figure 131), if a rise in the in-game signal is scheduled, the in-game signal is raised and a fall prohibition period (300.98 milliseconds) is set, provided that the rise prohibition period (300.98 milliseconds) set at the time the in-game signal falls has elapsed.

If the reservation data and setting data for the in-game signal are "1" (step S7201: YES, step S7202: NO), that is, if the in-game signal has not been reserved for falling after it has been raised, the process proceeds to step S7210 without executing any processing to change the state of the in-game signal. This causes the HI level of the in-game signal to be maintained.

If the reservation data for the in-game signal is "0" and the setting data is "1" (step S7201: NO, step S7207: YES), i.e., if the fall of the in-game signal is reserved, the in-game signal being output to the value number side MPU 142 is lowered from HIGH to LOW by executing the in-game signal OFF process (step S7208).

Then, the in-game signal reservation data ("0") is set to bit 0 of the current external signal area 96m, thereby updating the in-game signal setting data to "0" (step S7209). This allows the main MPU 72 to determine that the in-game signal is at a LOW level. Furthermore, in the next processing iteration of the external output process (FIG. 131), a negative determination is made in step S7207. Then, proceeding to step S7206 described above, the numerical information "202", which corresponds to the in-game signal startup prohibition period (300.98 milliseconds), is set in the interval setting counter 96v. This causes the interval setting counter 96v to begin measuring this startup prohibition period (300.98 milliseconds).

In this way, in the external output process (Figure 131), if a fall of the in-game signal is scheduled, the in-game signal is fell and a rise prohibition period (300.98 milliseconds) is set. As already explained, this configuration allows the period from the start of the game to when all reels 32L, 32M, and 32R are stopped to be less than 300 milliseconds. In this configuration, if the in-game signal were to be fell based on all reels 32L, 32M, and 32R being stopped, there is a risk that the in-game signal would be fallen to a low level after the in-game signal is raised to a high level but before the third gaming machine information notification setting process (step S5922) is executed. In other words, there is a risk that the third gaming machine information notification corresponding to the state in which the in-game signal is at a high level would not be transmitted. Thus, if the in-game signal is raised but the third gaming machine information notification corresponding to the state in which the in-game signal is at a HIGH level is not transmitted, the external game signal output from the card unit 130 to the gaming hall's management computer HC and data display device DH will not be raised even though a game is being played. In contrast, as already explained, in the normal processing ( FIG. 130 ), the in-game signal lowering reservation processing (step S7122) is executed after the prohibited lowering period (300.98 milliseconds) set when the in-game signal was raised has elapsed. This ensures that at least 300.98 milliseconds is provided between the time the in-game signal is raised to a HIGH level and the time it is lowered to a LOW level. This allows the in-game signal to remain at a HIGH level for a period of 300 milliseconds or more, and the third gaming machine information notification setting processing (step S5922) is executed while the in-game signal is maintained at a HIGH level. This prevents the external game signal output from the card unit 130 from not being raised even though a game is being played.

The rise prohibition period set when the in-game signal falls has the same length (300.98 milliseconds) as the fall prohibition period set when the in-game signal rises. This allows the process for setting the rise prohibition period of the in-game signal to be the same process (step S7206) as the process for setting the fall prohibition period of the in-game signal. Therefore, the processing configuration of the external output process (Figure 131) is simplified compared to a configuration in which the process for setting the rise prohibition period of the in-game signal is different from the process for setting the fall prohibition period of the in-game signal.

As already explained, in the normal processing (FIG. 130), the in-game signal fall reservation processing (step S7117) is executed, and the in-game signal fall is reserved, and then the acceptance permission processing (step S7123) is executed. Also, as already explained, the external output processing (FIG. 131) is executed at least once between the time the acceptance permission processing (step S7123) is executed at the end of one game and the time it is determined in step S7104 at the start of the next game that operation of the start lever 41 has been detected. Then, by executing the external output processing (FIG. 131) while the in-game signal fall is reserved, the in-game signal is fallen and the setting data for the in-game signal is updated to "0." As a result, in each game, the in-game signal rise reservation processing (step S7106) can be executed while the in-game signal is fallen to a LOW level and the reservation data and setting data for the in-game signal are "0."

If the reservation data and setting data for the in-game signal are "0" (step S7201: NO, step S7207: NO), that is, if the in-game signal has not been reserved for rising after it has fallen, proceed to step S7210 without executing any processing to change the state of the in-game signal. This causes the in-game signal to remain at a LOW level.

If a negative determination is made in step S7202, if a negative determination is made in step S7203, if the processing of step S7206 is performed, or if a negative determination is made in step S7207, the base AT signal control processing (steps S7210 to S7216) is executed. In the base AT signal control processing, if the base AT signal reservation data stored in the first bit of the reserved external signal area 96n is "1" and the base AT signal setting data stored in the first bit of the current external signal area 96m is "0" (steps S7210 and S7211: YES), i.e., if the base AT signal is reserved for activation, the base AT signal output to the value-side MPU 142 is raised from a low level to a high level by executing the base AT signal ON processing (step S7212). The base AT signal setting data is then updated by setting the base AT signal reservation data ("1") in the first bit of the current external signal area 96m (step S7213). This allows the main MPU 72 to determine that the state of the base AT signal is at a HI level. Furthermore, in the next processing of the external output processing (FIG. 131), a negative determination is made in step S7211. In this way, in the external output processing (FIG. 131), if the rise of the base AT signal is scheduled, the base AT signal is raised.

If the reservation data and setting data for the base AT signal are "1" (step S7210: YES, step S7211: NO), that is, if a reservation for the base AT signal to fall has not been made after the base AT signal has risen, proceed to step S7217 without performing any processing to change the state of the base AT signal. This maintains the HI level of the base AT signal.

If the reservation data for the base AT signal is "0" and the setting data is "1" (step S7210: NO, step S7214: YES), i.e., if the falling of the base AT signal is reserved, the base AT signal output to the value-side MPU 142 is lowered from HI to LOW by executing base AT signal OFF processing (step S7215). The reservation data for the base AT signal ("0") is then set to the first bit of the current external signal area 96m, thereby updating the setting data for the base AT signal to "0" (step S7216). This allows the main-side MPU 72 to determine that the state of the base AT signal is LOW. Furthermore, in the next processing of the external output processing (FIG. 131), a negative determination is made in step S7207. In this way, in the external output processing (FIG. 131), if the falling of the base AT signal is reserved, the base AT signal is lowered.

If the reservation data and setting data for the base AT signal are "0" (step S7210: NO, step S7214: NO), that is, if no reservation has been made to raise the base AT signal after the base AT signal has fallen, proceed to step S7217 without performing any processing to change the state of the base AT signal. This maintains the LOW level of the base AT signal.

As already explained in the eleventh embodiment, if a win occurs in the first game played after the conditions for terminating the base AT state ST4 are met and the game enters the normal gaming state ST1, or if the value of the release game number counter 96g becomes "0," the gaming state at the end of that game will become the base AT state ST4. Thus, after the base AT signal falls at the end of one game, the base AT signal may rise at the end of the next game. Also, as already explained, this configuration allows the period from the end of a game to when all reels 32L, 32M, and 32R are stopped in the next game to be less than 300 milliseconds. In this configuration, if the base AT signal is raised or lowered when all reels 32L, 32M, and 32R are stopped, there is a risk that the base AT signal will rise to a high level after the base AT signal falls to a low level and before the third gaming machine information notification setting process (step S5922) is executed. In other words, even if the base AT signal is lowered to a LOW level, there is a risk that the third gaming machine information notification corresponding to the state in which the base AT signal is at a LOW level will not be transmitted. Furthermore, if the third gaming machine information notification corresponding to the state in which the base AT signal is at a LOW level is not transmitted, there will be cases in which the external base AT signal output from the card unit 130 to the gaming hall's management computer HC and data display device DH will not be lowered even if a new transition to the base AT state ST4 occurs after the base AT state ST4 ends. In contrast, as already explained, in normal processing ( FIG. 130 ), a period of at least 300.98 milliseconds is ensured between the execution of the base AT signal reservation process (steps S7118 to S7122) at the end of one game and the execution of the base AT signal reservation process (steps S7118 to S7122) at the end of the next game. This allows the duration of the base AT signal being at a LOW level to be 300 milliseconds or more, and the third gaming machine information notification setting process (step S5922) to be executed while the base AT signal is maintained at a LOW level. This prevents a situation in which the external base AT signal being output from the card unit 130 does not fall even though a transition to a new base AT state ST4 occurs after the base AT state ST4 has ended.

As already explained in the eleventh embodiment, if the pre-ending condition is satisfied in the first game executed after transitioning to the base AT state ST4, the game state at the end of that game will be a game state other than the base AT state ST4 (ending AT state ST5). In this way, after the base AT signal is raised at the end of one game, the base AT signal may be lowered at the end of the next game. Also, as already explained, this configuration allows the period from the end of one game to the state in which all reels 32L, 32M, and 32R are stopped in the next game to be less than 300 milliseconds. In this configuration, if the base AT signal is raised or lowered when all reels 32L, 32M, and 32R are stopped, there is a risk that the base AT signal will be lowered to a low level after the base AT signal is raised to a high level and before the third gaming machine information notification setting process (step S5922) is executed. In other words, there is a risk that the third gaming machine information notification corresponding to the state in which the base AT signal is at a high level will not be transmitted. Thus, if the base AT signal is raised but the third gaming machine information notification corresponding to the state in which the base AT signal is at a HIGH level is not transmitted, the external base AT signal output from the card unit 130 to the gaming hall's management computer HC and data display device DH will not be raised even if a transition to the base AT state ST4 occurs and the game enters a gaming state other than the base AT state ST4 (ending AT state ST5). In contrast, as already explained, in the normal processing (FIG. 130), a period of at least 300.98 milliseconds is ensured between the execution of the base AT signal reservation processing (steps S7118 to S7122) at the end of one game and the execution of the base AT signal reservation processing (steps S7118 to S7122) at the end of the next game. This allows the duration of the base AT signal being at a HIGH level to be set to 300 milliseconds or more, and the third gaming machine information notification setting processing (step S5922) to be executed while the base AT signal is maintained at a HIGH level. This prevents the external base AT signal output from the card unit 130 from being raised even though the game state is changed to a state other than the base AT state ST4 after a transition to the base AT state ST4 has occurred.

If a negative judgment is made in step S7211, if the processing of step S7213 is performed, if a negative judgment is made in step S7214, or if the processing of step S7216 is performed, error information transmission processing is executed (step S7217), similar to step S6123 of the external output processing (FIG. 113) in the eleventh embodiment. The contents of the error information transmission processing are as already described in the eleventh embodiment.

Next, the changes in the state of the in-game signal will be explained with reference to the time chart in Figure 132. Figure 132(a) shows the state of the in-game signal, Figure 132(b) shows the period during which the end of the game is awaited until the value of the interval setting counter 96v reaches "0", Figure 132(c) shows the value of the reservation data for the in-game signal stored in bit 0 of the reserved external signal area 96n, Figure 132(d) shows the value of the setting data for the in-game signal stored in bit 0 of the current external signal area 96m, Figure 132(e) shows the period during which the in-game signal is prohibited from falling, Figure 132(f) shows the period during which the in-game signal is prohibited from rising, Figure 132(g) shows the state in which one or more reels 32L, 32M, and 32R are spinning, Figure 132(h) shows the period during which the game is being played, and Figure 132(i) shows the timing when the start lever 41 is operated to start the game.

When the number of game value bets is "3," if the start lever 41 is operated at timing t1 as shown in Figure 132(i), the game will start as shown in Figure 132(h). At timing t1, the game signal start reservation process (step S7106) is executed as shown in Figure 132(c), and the game signal reservation data stored in bit 0 of the reserved external signal area 96n becomes "1."

Then, at timing t2, when the first timer interrupt process (Figure 109) is executed after the start of the game, the three reels 32L, 32M, and 32R begin to spin, as shown in Figure 132(g). Also, at timing t2, provided that the in-game signal rise prohibition period has elapsed, the in-game signal is raised from LOW level to HIGH level, as shown in Figure 132(a), and numerical information ("202") corresponding to the in-game signal fall prohibition period (300.98 milliseconds) is set in the interval setting counter 96v, as shown in Figure 132(e). Also, as shown in Figure 132(d), the in-game signal setting data stored in bit 0 of the current external signal area 96m is updated to "1."

After that, at timing t3, as shown in Figure 132(g), all reels 32L, 32M, and 32R stop spinning. If the prohibition period (300.98 milliseconds) for the in-game signal to fall has not elapsed at timing t3, as shown in Figure 132(e), the determination process of step S7116 in the normal processing (Figure 130) is repeatedly executed, as shown in Figure 132(b), and the system enters a state where it is waiting for the game to end. After that, even if the start lever 41 is operated at timing t4, when the system is waiting for the game to end, as shown in Figure 132(i), the next game will not start based on that operation, and that operation will be invalid.

Then, at time t5, 300.98 milliseconds after time t2 when the in-game signal was raised, the value of the interval setting counter 96v becomes "0" as shown in FIG. 132(e), and the period during which the in-game signal is prohibited from falling ends. As shown in FIG. 132(b), a positive judgment is made in step S7116 of the normal processing (FIG. 130), and the state of waiting for the end of the game ends. Also, at time t5, as shown in FIG. 132(d), the in-game signal fall reservation processing (step S7122) is executed, and the reservation data for the in-game signal becomes "0." This causes the in-game signal to be reserved for falling. Also, at time t5, the game ends as shown in FIG. 132(h). This makes it possible to set bets to start the next game.

Then, at timing t6 when the first timer interrupt process (Figure 109) is executed after the in-game signal fall prohibition period (300.98 milliseconds) has elapsed, the in-game signal falls to a LOW level as shown in Figure 132(a), and the in-game signal rise prohibition period (300.98 milliseconds) is set as shown in Figure 132(f). Also, at timing t6, the setting data for the in-game signal is updated to "0" as shown in Figure 132(d).

Subsequently, when the number of game value bets is "3," if the start lever 41 is operated at timing t7 as shown in Figure 132(i), the game will start as shown in Figure 132(h). Also, at timing t7, the in-game signal start reservation process (step S7106) is executed as shown in Figure 132(c), and the in-game signal reservation data becomes "1." This sets the in-game signal start reservation status. However, the in-game signal will not be started until the in-game signal start prohibition period has elapsed. If, at timing t7, 4.1 milliseconds have not yet elapsed since the start of rotation of reels 32L, 32M, and 32R in the previous game (timing t2), the start of rotation of reels 32L, 32M, and 32R will be awaited as shown in Figure 132(g).

After that, at timing t8, when the in-game signal rise prohibition period has elapsed as shown in Figure 132(f), the in-game signal rises to HI level as shown in Figure 132(a), and numerical information ("202") corresponding to the in-game signal fall prohibition period (300.98 milliseconds) is set in the interval setting counter 96v as shown in Figure 132(e). Also, at timing t8, the setting data for the in-game signal becomes "1" as shown in Figure 132(d).

After that, at timing t9, the in-game signal fall prohibition period elapses, as shown in Figure 132(e). After that, at timing t10, 4.1 milliseconds after timing t2, the three reels 32L, 32M, and 32R begin to rotate, as shown in Figure 132(g). After that, at timing t11, all reels 32L, 32M, and 32R are stopped. Furthermore, since the in-game signal fall prohibition period has elapsed and the value of the interval setting counter 96v is "0," the game ends at timing t11, as shown in Figure 132(h). Furthermore, at timing t11, the in-game signal fall reservation process (step S7117) is executed, as shown in Figure 132(c), and the in-game signal reservation data becomes "0." This causes the in-game signal fall to be reserved.

After that, at timing t12 when the first timer interrupt process (Figure 109) is executed after the game has ended, the in-game signal falls to LOW level as shown in Figure 132(a), and numerical information ("202") corresponding to the in-game signal rise prohibition period (300.98 milliseconds) is set in the interval setting counter 96v as shown in Figure 132(f). Also, at timing t12, the setting data for the in-game signal is updated to "1".

As described above, the end of the game is awaited until the prohibition period (300.98 milliseconds) set when the in-game signal is raised has elapsed, regardless of whether or not there is a waiting time before reels 32L, 32M, and 32R begin accelerating until the wait time (4.1 seconds) set when reels 32L, 32M, and 32R previously began accelerating has elapsed. Furthermore, when the prohibition period for raising the in-game signal has elapsed and the game ends, the reservation process for lowering the in-game signal (step S7117) is executed. Furthermore, the in-game signal is lowered between the execution of the reservation process for lowering the in-game signal corresponding to one game and the execution of the reservation process for raising the in-game signal corresponding to the game following that game (step S7106). This allows the reservation process for raising the in-game signal corresponding to the game following that game to be executed after the in-game signal corresponding to that game has been lowered, even if there is no waiting time before reels 32L, 32M, and 32R begin accelerating in one game until the wait time (4.1 seconds) has elapsed. This prevents situations where overlapping settings for the in-game signal's fall and rise are made.

<Fourteenth embodiment>
The content of the performance in this embodiment differs from that in the first embodiment. The following describes the configuration that differs from that in the first embodiment. Note that the description of the configuration that is the same as that in the first embodiment will basically be omitted.

As with the eleventh embodiment, the game states are the normal game state ST1, the CB state, the base AT state ST4, and the ending AT state ST5. In each game state, the game can be started by setting the number of gaming media bets to "3."

Prior to describing the reel stop processing (FIG. 133(b)) executed by the main MPU 72, the configuration of the work area 96 for intra-area processing used in the reel stop processing will be described. FIG. 133(a) is an explanatory diagram illustrating the configuration of the work area 96 for intra-area processing. As shown in FIG. 133(a), the work area 96 for intra-area processing includes a first stop information area 96w and a most recent stop information area 96x. The first stop information area 96w holds information (first stop information) corresponding to the first reel to stop among the left reel 32L, center reel 32M, and right reel 32R in a single game. If the left reel 32L stops first, a "1" is set in the first stop information area 96w. If the center reel 32M stops first, a "2" is set in the first stop information area 96w. If the right reel 32R stops first, a "3" is set in the first stop information area 96w.

In the most recent stop information area 96x, if a first stop occurs, information corresponding to which of the three reels 32L, 32M, 32R stopped at the first stop (first stop information) is set; if a second stop occurs, information corresponding to which of the three reels 32L, 32M, 32R stopped at the second stop (second stop information) is set; and if a third stop occurs, information corresponding to which of the three reels 32L, 32M, 32R stopped at the third stop (third stop information) is set.

When all reels 32L, 32M, and 32R are stopped in each game, the first stop information is set in the first stop information area 96w, and the third stop information is set in the most recent stop information area 96x. The main MPU 72 determines the stop order of reels 32L, 32M, and 32R for that game based on the combination of the first stop information set in the first stop information area 96w and the third stop information set in the most recent stop information area 96x. This reduces the data capacity of the main RAM 74 required to determine the stop order of reels 32L, 32M, and 32R compared to a configuration in which an area for setting first stop information, an area for setting second stop information, and an area for setting third stop information are provided.

Next, the reel stop processing executed by the main MPU 72 will be described with reference to the flowchart in Figure 133 (b). As already explained in the first embodiment above, the reel stop processing is executed in step S609 of the reel control processing (Figure 22) when the symbol number of the reaching symbol on reels 32L, 32M, and 32R that should be stopped this time is equal to the symbol number of the stopped symbol. Note that steps S7301 to S7304 in the reel stop processing are executed as intra-area processing using intra-area processing programs and intra-area processing data.

First, the target reel is stopped (step S7301). During this stop process, processing is performed to stop the reels 32L, 32M, and 32R that are to be stopped this time. Then, stop information corresponding to the stopped reels 32L, 32M, and 32R is set in the most recent stop information area 96x (step S7302). In step S7302, if the left reel 32L is stopped, a "1" is set in the most recent stop information area 96x; if the center reel 32M is stopped, a "2" is set in the most recent stop information area 96x; and if the right reel 32R is stopped, a "3" is set in the most recent stop information area 96x. As a result, if the current stop of reels 32L, 32M, and 32R is the first stop, the first stop information is set in the most recent stop information area 96x; if the current stop of reels 32L, 32M, and 32R is the second stop, the second stop information is set in the most recent stop information area 96x; and if the current stop of reels 32L, 32M, and 32R is the third stop, the third stop information is set in the most recent stop information area 96x.

Then, by determining whether the value in the first stop information area 96w is "0," it is determined whether the current stop of reels 32L, 32M, and 32R is the first stop (step S7303). In step S7303, if the value in the first stop information area 96w is "0," that is, if first stop information (any of "1" to "3") is not set in the first stop information area 96w, it is determined to be the first stop. If it is the first stop (step S7303: YES), the value in the most recent stop information area 96x is set in the first stop information area 96w (step S7304). This allows the main MPU 72 to grasp the first stop information.

If the current stop of reels 32L, 32M, and 32R is the first stop, the first stop information is set in the first stop information area 96w and the most recent stop information area 96x. In this state, the main MPU 72 can determine which reels 32L, 32M, and 32R stopped first based on the information set in the first stop information area 96w or the most recent stop information area 96x. If the current stop of reels 32L, 32M, and 32R is the second stop, the first stop information is set in the first stop information area 96w, and the second stop information is set in the most recent stop information area 96x. In this state, the main MPU 72 can determine which reels 32L, 32M, and 32R stopped first based on the information set in the first stop information area 96w, and can determine which reels 32L, 32M, and 32R stopped second based on the information set in the most recent stop information area 96x. Furthermore, if the current stop of reels 32L, 32M, and 32R is the third stop, the first stop information is set in the first stop information area 96w, and the third stop information is set in the most recent stop information area 96x. In this state, the main MPU 72 can determine the stop order of the three reels 32L, 32M, and 32R based on the combination of the information set in the first stop information area 96w and the information set in the most recent stop information area 96x.

Next, before explaining the response processing at the end of game play (Figure 134) executed by the main MPU 72, we will explain the configuration of the work area 96 for in-area processing used in the response processing at the end of game play (Figure 134).

As already explained in the first embodiment with reference to FIG. 12, the work area 96 for in-area processing has a start status area 96j. As in the first embodiment, in the start status storage process in step S306 of normal processing (FIG. 15), information is set in the start status area 96j that enables identification of the game status (normal game status ST1, CB state, base AT state ST4, ending AT state ST5, or CZ state) and game zone (first zone SC1 or second zone SC2) for the current game. By referencing the start status area 96j, the main MPU 72 can ascertain the game status and game zone at the start of the current game.

A penalty event is set when the stop button 43, 44 is operated to make the center reel 32M or the right reel 32R the first stop in a game started in normal game mode ST1. If a penalty event occurs in a game, the game following that game becomes a penalty game. There is one penalty game. Details will be explained later, but a game played as a penalty game is more disadvantageous to the player than if the game were played as a non-penalty game.

As described above, a penalty event occurs in the normal gaming state ST1. Furthermore, a game in which a penalty event occurs does not become a penalty-subject game; the game following the game in which the penalty event occurred becomes a penalty-subject game. Therefore, if a penalty event occurs in a game started in the normal gaming state ST1 and a transition to the CB state or base AT state ST4 occurs, the game started in the CB state or base AT state ST4 becomes a penalty-subject game. Games that can become penalty-subject games are games started in the normal gaming state ST1, CB state, or base AT state ST4.

As shown in FIG. 133(a), a penalty target flag 96y is provided in the work area 96 for intra-area processing. The penalty target flag 96y is a flag that allows the master MPU 72 to determine that the game is a penalty target game.

Next, the response processing at the end of game, which is executed by the main MPU 72, will be explained with reference to the flowchart in Figure 134. As already explained in the 11th embodiment above, the response processing at the end of game is executed in step S5713 of the normal processing (Figure 108). Note that the processing of steps S7401 to S7409 in the response processing at the end of game is executed as intra-area processing using the intra-area processing program and intra-area processing data.

In steps S7401 to S7406, the same processing as steps S701 to S706 of the game end response processing (Figure 23) in the first embodiment is executed. Specifically, CB processing is first executed to control the transition and progress of the CB state (step S7401). In the CB processing, if a CB win is achieved in the current game, the CB state flag provided in the various flag area 96i in the work area 96 for intra-area processing is set to "1," and the CB winning data stored in the work area 96 for intra-area processing is cleared. This changes the game state to the CB state. In the CB state, if a first bell win is achieved in the current game, the value of the total award counter provided in the work area 96 for intra-area processing is incremented by 1. The total award counter is a counter used by the main MPU 72 to determine the total number of game media awarded in the CB state, and is cleared to "0" when the CB state is initiated. If the value of the total grant counter after adding 1 reaches "30", which is the CB state termination reference number, the CB state flag corresponding to the current CB state is cleared to "0".

In the response process at the end of play, after executing CB processing in step S7401, if the game is not in CB state (step S7402: NO), the process jumps to the process corresponding to the current game state (step S7403). Specifically, if the game state is in normal game state ST1, normal processing is executed (step S7404), if the game state is in base AT state ST4, base AT processing is executed (step S7405), and if the game state is in ending AT state ST5, game section control processing is executed (step S7406). Also, if a positive judgment is made in step S7402 because the game is in CB state, if normal processing is executed in step S7404, or if base AT processing is executed in step S7405, the game section control processing is then executed (step S7406).

Then, it is determined whether a penalty event has occurred in the current game (step S7407). In step S7407, if the game state at the start of the current game, as determined by referring to the start status area 96j of the work area 96 for intra-area processing, is the normal game state ST1 and the value of the first stop information area 96w is not "1," that is, if the stop button 43, 44 is operated to make the center reel 32M or the right reel 32R the first stop in a game that started in the normal game state ST1, a positive determination is made.

If a positive judgment is made in step S7407, the penalty target flag 96y is set to "1" (step S7408). This allows the main MPU 72 to recognize that a penalty event has occurred and makes it possible to designate the next game as a penalty target game. On the other hand, if a negative judgment is made in step S7407, the penalty target flag 96y is cleared to "0" (step S7409). This allows the main MPU 72 to recognize that a penalty event has not occurred and makes it possible to prevent the next game from being a penalty target game.

In this way, if a penalty event occurs in the current game, the penalty target flag 96y is set to "1", and the game following the current game becomes the penalty target game. If a penalty event occurs in a penalty target game, the penalty target flag 96y is also set to "1", and the game following the penalty target game becomes the penalty target game. Furthermore, if no penalty event occurs in the current game, the game following the current game will not be a penalty target game, regardless of whether the current game is a penalty target game or not.

Next, the game start processing executed by the main MPU 72 will be explained with reference to the flowchart in Figure 135. As already explained in the first embodiment above, the game start processing is executed in step S410 of the role lottery processing (Figure 16). Note that the processing of steps S7501 to S7526 in the game start processing is executed as intra-area processing using intra-area processing programs and intra-area processing data.

First, a stop information clearing process is executed (step S7501). In the stop information clearing process, the first stop information area 96w and the most recent stop information area 96x are cleared to "0." This allows the values in the first stop information area 96w and the most recent stop information area 96x to be cleared to "0" before the reels 32L, 32M, and 32R start to spin in each game.

Then, it is determined whether or not it is the first section SC1 (step S7502). In step S7502, a positive determination is made if the second section flag provided in the various flags area 96i in the work area 96 for intra-area processing is not set to "1". If a positive determination is made in step S7502, i.e., if the current game started in the first section SC1, the second section transition process is executed (step S7504) on the condition that a win has been achieved with any index value IV in the role lottery process (Figure 16) (step S7503: YES).

In the second section transition process (step S7504), the second section flag in the various flag areas 96i is set to "1" to transition the game section from the first section SC1 to the second section SC2. The continued game counter 96c in the work area 96 for in-area processing is also cleared to "0," and the total win counter 96d is set to an initial value of "63121." In the second section transition process (step S7504), the release game counter 96g in the work area 96 for in-area processing in the main RAM 74 is also set to "1000" as the ceiling game number. When a game is executed in the second section SC2 and in the normal game state ST1, the value of the release game counter 96g is decremented by 1, provided that the game is not a penalty-subject game. If the value of the release game counter 96g after the decrement reaches "0," processing is executed to transition to the base AT state ST4. Additionally, in the second section transition process (step S7504), the section display unit 67 is switched from an off state to an on state.

If it is the second section SC2 (step S7502: NO), the value of the continued game number counter 96c is incremented by 1 (step S7506), provided that the penalty target flag 96y is not set to "1" (step S7505: NO). In this way, the value of the continued game number counter 96c is incremented by 1 each time a game that is not a penalty target game is started in the second section SC2. This prevents penalty target games from being counted as one game in the continued game number counter 96c.

If a positive determination is made in step S7505 or if the processing of step S7506 is performed, it is determined whether or not the game is in the CB state (step S7507). If the game is in a gaming state other than the CB state (step S7507: NO), it is determined whether or not the game is in the normal gaming state ST1 (step S7508). If the game is in the normal gaming state ST1 (step S7508: YES), it is determined whether or not the penalty target flag 96y is set to "1" (step S7509). If the penalty target flag 96y is set to "1" (step S7509: YES), the game start processing (FIG. 135) is terminated. On the other hand, if the penalty target flag 96y is not set to "1" (step S7509: NO), the value of the release game number counter 96g is decremented by 1 (step S7510).

In this way, when a game is played in the second section SC2 and normal gaming state ST1, the remaining ceiling game count is decremented by 1, provided that the game is not a penalty game. This prevents penalty games from being counted as one game in the release game count counter 96g.

Then, the AT lottery process is executed (step S7511). In the AT lottery process, the AT lottery table provided as data for intra-area processing in the main ROM 73 is read, and the current random number information is read from the lottery counter provided in the work area 96 for intra-area processing, which is updated periodically. Using this AT lottery table and random number information, it is determined whether or not a transition to the base AT state ST4 has been successful. The AT lottery table contains a non-CZ first numerical information group that is referenced when a win has not been achieved with an index value IV in which cherry winning data is set in a state other than the CZ state, a non-CZ second numerical information group that is referenced when a win has been achieved with an index value IV in which cherry winning data is set in a state other than the CZ state, a CZ first numerical information group that is referenced when a win has not been achieved with an index value IV in which cherry winning data is set in the CZ state, and a CZ second numerical information group that is referenced when a win has been achieved with an index value IV in which cherry winning data is set in the CZ state.

Regardless of the numerical information group, a game that wins an index value IV with a relatively low winning probability in the role lottery process (Figure 16) is set to have a higher probability of winning a transition to the base AT state ST4 than a game that wins an index value IV with a relatively high winning probability in the role lottery process (Figure 16). When the non-CZ first numerical information group is referenced, the expected value of winning a transition to the base AT state ST4 is approximately 5%, when the non-CZ second numerical information group is referenced, the expected value of winning a transition to the base AT state ST4 is approximately 20%, when the CZ first numerical information group is referenced, the expected value of winning a transition to the base AT state ST4 is approximately 30%, and when the non-CZ second numerical information group is referenced, the expected value of winning a transition to the base AT state ST4 is approximately 50%.

In this way, the numerical information groups referenced in the CZ state (CZ first numerical information group and CZ second numerical information group) are set to have a higher probability of winning the transition to the base AT state ST4 than the numerical information groups referenced when not in the CZ state (non-CZ first numerical information group and non-CZ second numerical information group). As a result, in the normal gaming state ST1, when in the CZ state, the player's anticipation of transitioning to the base AT state ST4 is heightened compared to when not in the CZ state.

In the CZ state, the numerical information group that is referenced when a win occurs with an index value IV in which cherry winning data is set is set to have a higher probability of resulting in a win to transition to the base AT state ST4 than the numerical information group that is referenced when a win does not occur with an index value IV in which cherry winning data is set. Furthermore, in a state that is not the CZ state, the numerical information group that is referenced when a win occurs with an index value IV in which cherry winning data is set is set to have a higher probability of resulting in a win to transition to the base AT state ST4 than the numerical information group that is referenced when a win does not occur with an index value IV in which cherry winning data is set. This allows the player to expect a win in the normal gaming state ST1 with an index value IV in which cherry winning data is set.

If the AT lottery process (step S7511) results in a win to transition to base AT state ST4 (step S7512: YES), the AT win flag in the various flags area 96i is set to "1" (step S7513). This allows the main MPU 72 to recognize that a win to transition to base AT state ST4 has occurred.

If the AT lottery process (step S7511) does not result in a win to transition to the base AT state ST4 (step S7512: NO), the CZ state is determined by determining whether the CZ state flag in the various flag areas 96i in the work area 96 for in-area processing is set to "1" (step S7514). If the CZ state is not reached (step S7514: NO), the CZ lottery process is executed (step S7515), similar to step S808 of the normal start processing (FIG. 24) in the first embodiment. The content of the CZ lottery process is as already described in the first embodiment. If the CZ lottery process (step S7515) results in a win to transition to the CZ state (step S7516: YES), the CZ win flag in the various flag areas 96i is set to "1" (step S7517). This allows the main MPU 72 to recognize that a win to transition to the CZ state has occurred.

If a negative judgment is made in step S7508, i.e., if the state is the base AT state ST4 or the ending AT state ST5, it is determined whether the penalty target flag 96y is set to "1" (step S7518). A game started in the base AT state ST4 is a penalty target game when a penalty event occurs in a game started in the normal game state ST1 and a transition to the base AT state ST4 occurs, and the first game after the transition is the current game. Incidentally, a game started in the ending AT state ST5 will never be a penalty target game.

If the game is not a penalty game (step S7518: NO), the stop order data setting process is executed (step S7520) on the condition that the lottery process for the current game (FIG. 16) has resulted in a winning combination with one of index values IV = 1 to 9 (step S7519: YES). In the stop order data setting process, if the lottery process for the current game (FIG. 16) has resulted in a winning combination with one of index values IV = 1 to 6, the win count display unit 125 displays the stop order of reels 32L, 32M, and 32R that will result in the first bell win. Furthermore, if the lottery process for the current game (FIG. 16) has resulted in an index value IV = 7 to 9, the win count display unit 125 displays the stop order of reels 32L, 32M, and 32R that will result in the second bell win.

If a positive judgment is made in step S7518, a negative judgment is made in step S7519, or processing of step S7520 is performed, it is determined whether the current game state is the base AT state ST4 (step S7521). If the current game state is the ending AT state ST5 (step S7521: NO), this game start processing (Figure 135) is terminated.

If the current game state is the base AT state ST4 (step S7521: YES), it is determined whether the penalty target flag 96y is set to "1" (step S7522). If it is not a penalty target game (step S7522: NO), an additional lottery process is executed (step S7523) in the same manner as step S1001 of the base AT start processing (FIG. 26) in the first embodiment. The contents of the additional lottery process are as already described in the first embodiment. If an additional win is made in the additional lottery process (step S7523) (step S7524: YES), the number of gaming media selected in the additional lottery process is added to the AT difference number counter 96e in the work area 96 for in-area processing (step S7525). If an additional win is made, the number of gaming media to be awarded is one of "20," "50," "80," "100," and "200."

If a positive judgment is made in step S7522, a negative judgment is made in step S7524, or the processing of step S7525 is performed, an update process of the AT difference number counter 96e in the work area 96 for in-area processing is executed (step S7526). In the update process of the AT difference number counter 96e, if the result of the role lottery process (Figure 16) for the current game is a losing result, "3" is added to the AT difference number counter 96e. If the result of the role lottery process (Figure 16) is a losing result, this means that the number of gaming media owned by the player has decreased by the number of bets (specifically, "3"), so "3" is added to the AT difference number counter 96e to add that amount to the number of remaining gaming media awarded in the base AT state ST4. Furthermore, in the update process for the AT difference number counter 96e (step S7526), if a winning combination is achieved with an index value IV of any of "1" to "13" in the winning combination lottery process (FIG. 16), i.e., if a winning combination is achieved with an index value IV for which winning data corresponding to the awarding of gaming media is set, the AT difference number counter 96e is decremented in the same manner as step S1007 of the base AT start process (FIG. 26) in the first embodiment, regardless of whether the winning data for that index value IV is achieved. The contents of the decrement process for the AT difference number counter 96e are as already explained in the first embodiment. If the value of the AT difference number counter 96e becomes "0" or less as a result of the decrement process for the AT difference number counter 96e, the AT difference number counter 96e is cleared to "0."

As described above, even if a game is started in the second section SC2, if the game is a penalty-subject game, the value of the continued game counter 96c is not incremented by 1. Furthermore, even if the base AT state ST4 is active and the lottery process for the current game (FIG. 16) results in an index value IV of 1 to 9, a stop order notification is not executed if the current game is a penalty-subject game. Furthermore, even if a game is executed in the second section SC2 and normal gaming state ST1, if the game is a penalty-subject game, the remaining ceiling game count is not decremented by 1. Furthermore, even if the game is in normal gaming state ST1, if the current game is a penalty-subject game, the AT lottery process (step S7511) and the CZ lottery process (step S7515) are not executed. As already explained, if a game in which a penalty event occurred transitions to the base AT state ST4, the first game executed in the base AT state ST4 becomes the penalty-subject game. Even if a game is started in the base AT state ST4, if the game is a penalty game, the bonus lottery process (step S7523) will not be executed.

In this way, when a game is executed as a penalty game, the game is executed under conditions that are less favorable to the player than when the game is executed as a non-penalty game. This reduces the possibility that the player will operate the stop buttons 42-44 in a manner that will cause a penalty event.

Next, the normal processing executed by the main MPU 72 will be explained with reference to the flowchart in Figure 136. As already explained, the normal processing is executed in step S7404 of the response processing at the end of play (Figure 134). Note that the processing in steps S7601 to S7610 in the normal processing is executed as intra-area processing using the intra-area processing program and intra-area processing data.

If the penalty target flag 96y is not set to "1" (step S7601: NO), it is determined whether the value of the release game number counter 96g in the work area 96 for intra-area processing is "0" to determine whether the ceiling number of games has been played in the second section SC2 and normal gaming state ST1 (step S7602). Incidentally, since the process of subtracting 1 from the value of the release game number counter 96g is not executed in a penalty target game, the value of the release game number counter 96g will never become "0" in a penalty target game. If the value of the release game number counter 96g is "0" (step S7602: YES), this means that the ceiling number of games has been played in the second section SC2 and normal gaming state ST1, and therefore processing is executed to set the base AT state ST4 (steps S7611 and S7612). This processing will be described later.

If the value of the release game number counter 96g is not "0" (step S7602: NO), it is determined whether the AT win flag in the various flags area 96i in the work area 96 for in-area processing is set to "1" (step S7603). If the AT win flag is not set to "1" (step S7603: NO), it is determined whether the CZ state flag in the various flags area 96i is set to "1" to determine whether or not the game is in the CZ state (step S7604).

If the game is in the CZ state (step S7604: YES), the value of the CZ state counter 96h is decremented by 1 (step S7605). If the value of the CZ state counter 96h after decrementing by 1 is "0" (step S7606: YES), the CZ state is terminated by clearing the CZ state flag in the various flags area 96i to "0" (step S7607). By clearing the CZ state flag to "0" and terminating the CZ state, the AT lottery process executed in step S7511 of the game start processing (FIG. 135) has a lower chance of winning a transition to the base AT state ST4 than if the game was in the CZ state.

If the game is not in the CZ state (step S7604: NO), it is determined whether the CZ win flag in the various flags area 96i in the work area 96 for intra-area processing is set to "1" (step S7608). If the CZ win flag is set to "1" (step S7608: YES), i.e., if a CZ win has occurred in this game, the CZ win flag is cleared to "0" (step S7609), the CZ state flag in the various flags area 96i is set to "1", and the CZ state counter 96h in the work area 96 for intra-area processing is set to "3" (step S7610). Setting the CZ state flag to "1" initiates the CZ state. Furthermore, setting the CZ state counter 96h to "3" means that the number of remaining games in the CZ state becomes "3".

If a positive determination is made in step S7602 or if a positive determination is made in step S7603, processing to set the base AT state ST4 (steps S7611 and S7612) is executed. Specifically, the base AT state flag in the various flag area 96i in the work area 96 for intra-area processing is set to "1," and the AT win flag, CZ win flag, CZ state flag, and CZ state counter 96h are cleared to "0" (step S7611). Clearing the CZ state flag to "0" ends the CZ state, if present. Then, AT state start setting processing is executed (step S7612). In the AT state start setting processing, the AT difference number counter 96e in the work area 96 for intra-area processing is set to "200" as the initial awarded number. As already explained in the first embodiment above, the AT difference number counter 96e is a counter used by the main MPU 72 to determine the remaining awarded number of gaming media in the base AT state ST4.

In this way, if the ceiling number of games is played while in the second section SC2 and normal gaming state ST1, or if a win to enter the base AT state ST4 occurs, the game will transition to the base AT state ST4.

If it is a penalty-subject game (step S7601: YES), this normal processing (Figure 136) is terminated without executing the processing of steps S7602 to S7612. Even if a game is executed in the CZ state, if the game is a penalty-subject game, the processing of decrementing the value of the CZ state counter 96h by 1 is not executed. This prevents the penalty-subject game from being counted as one game in the CZ state counter 96h.

As already explained, when a game is started in the CZ state, compared to when the game is started in a state other than the CZ state, there is an advantage for the player in that the expected value of winning the transition to the base AT state ST4 in the AT lottery process (step S7511) is higher. However, as already explained, if a game started in the CZ state becomes a penalty-target game, the AT lottery process (step S7511) is not executed, and the player cannot enjoy the advantage of being in the CZ state. If a penalty-target game were counted as one game in the CZ state counter 96h, if a player accidentally caused a penalty event, the opportunity to execute the AT lottery process (step S7511) in a CZ state situation would be reduced. In contrast, a penalty-target game is not counted as one game in the CZ state counter 96h. This prevents a reduction in the opportunity to execute the AT lottery process (step S7511) due to the execution of a penalty-target game during the CZ state.

Next, prior to explaining the presentation control processing (Figure 138) executed by the presentation-side MPU 92, we will explain the presentation executed by the image display device 63. Figure 137 (a) is an explanatory diagram for explaining the presentation executed by the image display device 63 in the normal game state ST1. The image display device 63 displays a background image corresponding to the game state. Specifically, as shown in Figure 137 (a), in the normal game state ST1, the image display device 63 displays a normal-corresponding background image G86. Also, although not shown, in the CB state, the image display device 63 displays a CB-corresponding background image, in the base AT state ST4, the image display device 63 displays a base AT-corresponding background image, and in the ending AT state ST5, the image display device 63 displays an ending AT-corresponding background image.

When a game that is not a penalty game is started, the image display device 63 executes in-game effects corresponding to the game state at the start of the game on the front side of the screen (closer to the player) than the background image. Specifically, as shown in FIG. 137(a), when a game that is not a penalty game is started in the normal game state ST1, normal game effects including the display of the normal corresponding character image G87 are executed on the image display device 63, upper lamp 61, and speaker 62. Also, although not shown in the figures, when a game that is not a penalty-subject game is started in the CB state, a CB game in-game effect including the display of a CB-compatible character image is executed by the image display device 63, upper lamp 61, and speaker 62; when a game that is not a penalty-subject game is started in the base AT state ST4, a base AT game in-game effect including the display of a base AT-compatible character image is executed by the image display device 63, upper lamp 61, and speaker 62; and when a game that is not a penalty-subject game is started in the ending AT state ST5, an ending AT game in-game effect including the display of an ending AT-compatible character image is executed by the image display device 63, upper lamp 61, and speaker 62.

The in-game effects are initiated when the effect-side MPU 92 receives rotation acceptance commands A and B. In addition, the display content of the in-game effects is updated when the effect-side MPU 92 receives the first stop start command, the second stop start command, or the all reel stop command.

If a win occurs with index value IV = 13, which has cherry win data set, in a game started in the second section SC2 and normal gaming state ST1, the color navigation effect will be executed on the image display device 63. Also, if a win occurs with index value IV = 16, which has normal replay win data set, in a game started in the second section SC2 and normal gaming state ST1, and the color navigation effect becomes eligible for execution in the color navigation lottery process described below, the color navigation effect will be executed on the image display device 63.

Figure 137(b) is an explanatory diagram for explaining the color navigation effect executed by the image display device 63. As shown in Figure 137(b), in the color navigation effect, a color navigation image G88 with a blue left half and a red right half is displayed in the lower right corner of the screen of the image display device 63. The blue of the color navigation image G88 is the color used for the "replay" symbol on reels 32L, 32M, and 32R, and the red of the color navigation image G88 is the color used for the "cherry" symbol on reels 32L, 32M, and 32R. Furthermore, as already explained, in both the AT lottery process executed in a state other than the CZ state and the AT lottery process executed in the CZ state, the numerical information group referenced when a win occurs with an index value IV in which cherry winning data is set is configured to have a higher probability of winning a transition to the base AT state ST4 than the numerical information group referenced when a win does not occur with an index value IV in which cherry winning data is set. By displaying the color navigation image G88, the player is informed that a win has occurred at an index value IV where cherry win data is set or an index value IV where normal replay win data is set, and the player can be made to hope that a win may occur at an index value IV where cherry win data is set in this game.

If the middle stop button 43 or right stop button 44 is operated as the first stop operation, resulting in a penalty event, the display mode of the image display device 63 switches from color to monochrome at the time the penalty event occurs. In this embodiment and the fifteenth to seventeenth embodiments described below, monochrome display on the image display device 63 refers to a display mode in which only shades and tones of black are present on the screen of the image display device 63, with no colors other than black. When the display mode of the image display device 63 is color display, the image displayed on the image display device 63 includes various colors in addition to white and black. Specifically, these colors can be specified based on a combination (RGB value) of an R value (any value between 0 and 255), a G value (any value between 0 and 255), and a B value (any value between 0 and 255), and include, for example, red, blue, yellow, and green. Furthermore, as already explained, the left half of the color navigation image G88 is blue and the right half is red.

Figure 137(c) is an explanatory diagram illustrating the state in which monochrome display is being performed on the image display device 63. As shown in Figure 137(c), in monochrome display, the display mode of the entire display surface of the image display device 63 is switched from color display to monochrome display. By switching the display mode of the image display device 63 to monochrome display, the colors of the background image (normal background image G86), in-game image, and color navigation image G88 displayed on the image display device 63 in color display state become indistinguishable to the human eye. This prevents players from imagining the "cherry" and "replay" symbols based on the color of the color navigation image G88, even when the color navigation image G88 is displayed. Furthermore, the monochrome display mode of the image display device 63 makes it easier for players and gaming hall managers to understand that a penalty event has occurred.

Even when a penalty game begins, processing to start the in-game effects corresponding to that penalty game is not executed. Therefore, while a penalty game is being played, the image display device 63 displays in monochrome the images that were displayed before the start of that penalty game (specifically, the background image, in-game image, and color navigation image G88).

The monochrome display continues until a non-penalty game begins. If no penalty event occurs in a penalty game, the monochrome display ends at the start of the game following that penalty game. Furthermore, if a penalty event occurs in a penalty game, the game following that penalty game also becomes a penalty game, so the monochrome display continues until the next non-penalty game begins. When the monochrome display ends, the display mode of the image display device 63 returns to color. Players and amusement hall managers can tell that the penalty game has ended and a non-penalty game is being played based on the display mode of the image display device 63 switching from monochrome to color.

When a game in which a penalty event occurs transitions to the base AT state ST4, the first game in that base AT state ST4 becomes the penalty target game, and that penalty target game is executed with monochrome display on the image display device 63. Also, as in the first embodiment described above, in the base AT state ST4, the image display device 63 displays a remaining number of awarded game media image G21 to indicate the remaining number of awarded game media in the base AT state ST4, a number of acquired game media image G22 to indicate the total number of acquired game media the player has acquired since transitioning to the current base AT state ST4, and a number of games played image G23 to indicate the total number of games played since transitioning to the current base AT state ST4. When the display mode of the image display device 63 is color display, these images G21-G23 are displayed in blue text. When the display mode of the image display device 63 is monochrome display, the entire display surface of the image display device 63 is subject to monochrome display, and therefore these images G21-G23 and the areas in which they are displayed on the display surface of the image display device 63 are also subject to monochrome display.

As such, when the display mode of the image display device 63 is monochrome, it is more difficult to see these images G21 to G23 than when the display mode is color. However, even when the display mode of the image display device 63 is monochrome, players and the amusement hall manager can still see the contents of these images G21 to G23.

Next, the configuration of the presentation side RAM 94 used in the presentation control process (Figure 138) will be described. Figure 137(d) is an explanatory diagram for explaining the configuration of the presentation side RAM 94. As shown in Figure 137(d), the presentation side RAM 94 is provided with a presentation side penalty event flag 94m and a presentation side penalty target flag 94n. The presentation side penalty event flag 94m is a flag that allows the presentation side MPU 92 to determine that a game has occurred in which a penalty event has occurred, and the presentation side penalty target flag 94n is a flag that allows the presentation side MPU 92 to determine that a game is a penalty target game.

Next, the presentation control processing executed by the presentation-side MPU 92 will be explained with reference to the flowchart in Figure 138. Note that the presentation control processing is repeatedly executed at relatively short intervals (e.g., every 2 milliseconds) in each game state.

When rotation acceptance commands A and B are received from the main MPU 72 (step S7701: YES), it is determined whether the presentation side penalty event flag 94m is set to "1" (step S7702). When the presentation side penalty event flag 94m is not set to "1" (step S7702: NO), i.e., when a penalty event did not occur in the previous game and the current game is not a penalty game, it is determined whether the presentation side penalty target flag 94n is set to "1" (step S7703). When the presentation side penalty target flag 94n is set to "1" (step S7703: YES), i.e., when the previous game was a penalty game, the presentation side penalty target flag 94n is cleared to "0" (step S7704). This allows the presentation side MPU 92 to determine that the current game is not a penalty game.

Then, monochrome termination processing is executed (step S7705). In the monochrome termination processing, display control of the image display device 63 is performed so that the monochrome display is switched to color display. In this way, if no penalty event occurs in a penalty game, the monochrome display is terminated based on the reception of rotation acceptance commands A and B in the game following the penalty game. This makes it possible to terminate the monochrome display at the timing when the penalty game ends and a non-penalty game begins. The player can tell that the current game is not a penalty game based on the fact that the monochrome display has ended at the start of the game.

If a negative judgment is made in step S7703 or if the processing of step S7705 is performed, it is determined whether or not the color navigation effect is in progress (step S7706). If the color navigation effect is in progress (step S7706: YES), the color navigation end processing is executed (step S7707). In the color navigation end processing, display control of the image display device 63 is performed so that the display of the color navigation image G88 is terminated. In a penalty game, the color navigation end processing (step S7707) is not executed. Therefore, if the color navigation effect was executed before the start of a penalty game, the color navigation image G88 will remain displayed during the penalty game. However, as already explained, the display mode of the image display device 63 in a penalty game is monochrome. This prevents the player from expecting that they may have won with the index value IV for which the cherry winning data is set based on the color of the color navigation image G88, even in a configuration in which the display of the color navigation image G88 continues after the start of a penalty game.

If a negative judgment is made in step S7706, or if the processing of step S7707 is performed, a game presentation start process is executed (step S7708). In the game presentation start process, a background image corresponding to the game status is displayed, and display control of the image display device 63 is performed so that an in-game presentation corresponding to the game status is started. In addition, in the game presentation start process (step S7708), sound output control of the speaker 62 is performed so that sound corresponding to the in-game presentation is performed, and light emission control of the upper lamp 61 is performed so that the upper lamp 61 emits light in a manner corresponding to the in-game presentation. The game presentation start process (step S7708) is not executed if the current game is a penalty game. This eliminates the need to store presentation data for executing presentations corresponding to penalty games in the presentation side ROM 93, thereby reducing the data capacity of the presentation side ROM 93.

By executing the game presentation start process (step S7708), the display content of the in-game presentation executed in the previous game is switched to the display content of the in-game presentation for the current game. In a penalty game, the game presentation start process (step S7708) is not executed. Therefore, the display content of the in-game presentation executed before the start of the penalty game will continue to be displayed without being updated.

Then, based on the information set in the rotation acceptance command A received from the main MPU 72, it is determined whether a win has occurred at index value IV = 13, for which cherry winning data is set (step S7709). If a win has not occurred at index value IV = 13 (step S7709: NO), it is determined whether a win has occurred at index value IV = 16, for which normal replay winning data is set (step S7710). If a win has occurred at index value IV = 16 (step S7710: YES), the color navigation lottery process is executed (step S7711).

In the color navigation lottery process (step S7711), the color navigation lottery table stored in the presentation-side ROM 93 is read, and a random number for the lottery (numerical information between "0" and "255") is read from the random number counter updated in the presentation-side RAM 94. The read color navigation lottery table is then referenced to determine whether the read random number for the lottery is numerical information that will be used to execute a color navigation effect. The color navigation lottery table contains 64 pieces of numerical information that will be used to execute a color navigation effect, and in the color navigation lottery process (step S7711), there is a 1/4 chance that the current game will be used to execute a color navigation effect.

If the cherry winning data is set to index value IV = 13 and a win occurs (step S7709: YES), or if the color navigation lottery process determines that the color navigation effect is to be executed (step S7712: YES), the color navigation start process is executed (step S7713). In the color navigation start process, display control is performed on the image display device 63 so that the display of the color navigation image G88 begins.

If a positive judgment is made in step S7702, the production side penalty event flag 94m is cleared to "0" and the production side penalty target flag 94n is set to "1" (step S7714). By setting the production side penalty target flag 94n to "1", the production side MPU 92 can determine that the current game is a penalty target game.

If a negative judgment is made in step S7701, it is determined whether a first stop start command has been received from the main MPU 72 (step S7715). If the first stop start command has been received (step S7715: YES), a first game effect update process is executed (step S7717) on the condition that the effect-side penalty target flag 94n is not set to "1" (step S7716: NO). In the first game effect update process, display control is performed on the image display device 63 so that the display content of the in-game effects is updated based on the reception of the first stop start command. Furthermore, in the first game effect update process (step S7717), illumination control of the upper lamp 61 and sound output control of the speaker 62 are performed so that illumination of the upper lamp 61 and sound output from the speaker 62 are performed in accordance with the progress of the in-game effects.

If a positive determination is made in step S7716 or if the processing of step S7717 is performed, a determination is made as to whether a penalty event has occurred (step S7718). In step S7718, a positive determination is made if a first stop start command is received in normal gaming state ST1 and the first stop is the center reel 32M or the right reel 32R. As already explained, a penalty event occurs when the stop buttons 43, 44 are operated to cause the center reel 32M or the right reel 32R to be the first stop in a game started in normal gaming state ST1. Furthermore, the timing at which the production-side MPU 92 executes the process to determine whether a penalty event has occurred is a timing before the timing at which the gaming state at the start of the game (normal gaming state ST1, CB state, base AT state ST4, or ending AT state ST5) changes (at the end of the game). This simplifies the processing configuration for determining whether a penalty event has occurred in the production-side MPU 92 compared to a configuration in which the production-side MPU 92 executes the process to determine whether a penalty event has occurred at the end of the game.

If a positive judgment is made in step S7718, monochrome switching processing is executed (step S7720) on the condition that the presentation-side penalty target flag 94n is not set to "1" (step S7719: NO), i.e., the display mode of the image display device 63 is color display. In the monochrome switching processing, display control is performed on the image display device 63 so that the display is switched from color to monochrome. This makes it possible to make the color of the color navigation image G88 indistinguishable when a color navigation presentation is being executed. If a penalty event occurs in a penalty-target game, the monochrome display already in effect will continue.

In this way, if a penalty event occurs in a game that is not a penalty game, the image display device 63 switches to monochrome display at the time the penalty event occurs. This allows the player to know that a penalty event has occurred before the penalty game begins.

As already explained, the main MPU 72 is configured to determine whether a penalty event has occurred after all reels 32L, 32M, and 32R have stopped. In this configuration, the performance MPU 92 determines whether a penalty event has occurred when the first reel 32L, 32M, and 32R stops. This allows the display on the image display device 63 to be switched to monochrome display at the end of the first stop.

If a positive judgment is made in step S7719, or if the processing of step S7720 is performed, the presentation side penalty event flag 94m is set to "1" (step S7721). This allows the presentation side MPU 92 to understand that a penalty event has occurred in the current game, regardless of whether the current game is a penalty-subject game or not.

If a negative determination is made in step S7715, it is determined whether a second stop start command or an all-reel stop command has been received from the main MPU 72 (step S7722). If a positive determination is made in step S7722, the second game effect update process is executed (step S7724), provided that the effect-side penalty target flag 94n is not set to "1" (step S7723: NO). In the second game effect update process, display control is performed on the image display device 63 so that the display content of the in-game effects is updated based on the reception of the second stop start command or the all-reel stop command. Furthermore, in the second game effect update process (step S7724), the illumination of the upper lamp 61 and the sound output of the speaker 62 are controlled so that the illumination of the upper lamp 61 and the sound output from the speaker 62 are performed in accordance with the progress of the in-game effects.

In this way, the first game effect update process (step S7717) and the second game effect update process (step S7724) are not executed in a penalty game. In a penalty game, the monochrome image display device 63 continues to display the in-game effect display content that was displayed before the start of the penalty game. On the other hand, if a penalty event occurs in a game that is not a penalty game, the first game effect update process (step S7717) and the second game effect update process (step S7724) are executed in that game. In that game, even after the monochrome display starts, the display content of the in-game effect is updated on the monochrome image display device 63 until the end of the game. This makes it easier for players and amusement hall managers to determine whether a game is a penalty game based on the display content of the monochrome image display device 63.

Next, the manner in which monochrome display is performed on the image display device 63 will be described with reference to the time chart in Figure 139. Figure 139(a) shows the period during which monochrome display is performed on the image display device 63, Figure 139(b) shows the period during which color navigation effects are performed on the image display device 63, Figure 139(c) shows the period during which normal game effects are performed on the image display device 63, Figure 139(d) shows the state of the penalty target flag 96y in the main RAM 74, Figure 139(e) shows the state of the effect-side penalty event flag 94m, Figure 139(f) shows the state of the effect-side penalty target flag 94n, Figure 139(g) shows the timing at which a penalty event occurs, and Figure 139(h) shows the game execution period.

When a game that is not a penalty game is started at timing t1 in normal gaming state ST1, as shown in Figure 139(h), the normal game in-game effect will begin as shown in Figure 139(c). Furthermore, if a win occurs with index value IV = 13, which has cherry win data set, or if a win occurs with index value IV = 16, which has normal replay win data set, and the color navigation effect is executed in the color navigation lottery process, the display of color navigation image G88 will begin on the image display device 63 at timing t1, as shown in Figure 139(b).

Then, at timing t2, the center reel 32M or the right reel 32R is stopped first, and when a penalty event occurs as shown in FIG. 139(g), the display mode of the image display device 63 switches from color to monochrome as shown in FIG. 139(a). Also, at timing t2, the effect-side penalty event flag 94m is set to "1" as shown in FIG. 139(e). Then, at timing t3, the penalty target flag 96y in the host RAM 74 is set to "1" as shown in FIG. 139(d), and the game ends as shown in FIG. 139(h). Also, at timing t3, the updating of the normal game effects ends as shown in FIG. 139(c). However, the display of the normal game effects continues without being updated until timing t6, when a game that is not a penalty target game starts.

After that, at timing t4, as shown in Figure 139(h), when the game following the game in which the penalty event occurred (the penalty game) begins, the value of the presentation-side penalty event flag 94m is cleared to "0," and the presentation-side penalty event flag 94n is set to "1," as shown in Figures 139(e) and 139(f). As shown in Figure 139(c), even when the penalty game begins, the normal game presentation corresponding to that penalty game does not begin. On the image display device 63 displaying in monochrome, the normal background image G86 that was displayed before the start of the penalty game, the display of the normal game presentation, and the color navigation image G88 continue to be displayed.

Then, at timing t5, the penalty target game ends as shown in Figure 139(h). Also, at timing t5, the penalty target flag 96y is cleared to "0" as shown in Figure 139(d), and the penalty target game ends as shown in Figure 139(h). As already explained, if no penalty event occurs in the penalty target game, the game following that penalty target game will not be a penalty target game.

After that, at timing t6, when the game following the penalty game begins as shown in Figure 139(h), the monochrome display on the image display device 63 ends and returns to color display as shown in Figure 139(a). Also, at timing t6, the display of the color navigation image G88 ends as shown in Figure 139(b), and the normal game in-game effect for the game following the penalty game begins as shown in Figure 139(c). Also, as shown in Figure 139(f), the effect-side penalty target flag 94n is cleared to "0."

The present embodiment described above provides the following excellent effects:

When a penalty event occurs based on a player's operation, the game following the game in which the penalty event occurred is set as a penalty game. This increases the likelihood that the player will operate the stop buttons 42-44 in a way that will prevent the penalty event from occurring. In addition, the game following the game in which the penalty event occurred can be set to be executed as a penalty game from the start of that game.

The main MPU 72 is configured to execute a process to determine whether a penalty event has occurred after all reels 32L, 32M, and 32R have stopped, and the performance MPU 92 is configured to determine whether a penalty event has occurred when it receives the first stop start command from the main MPU 72. As a result, if a penalty event occurs, the display on the image display device 63 can be switched from color to monochrome at the time the penalty event occurs.

The monochrome display continues until the penalty game ends and a non-penalty game begins. This allows players and the amusement hall manager to easily understand, based on the display mode of the image display device 63, that a penalty event has occurred.

This configuration does not execute effects corresponding to a penalty game even when that game is started. This reduces the data capacity of the effect-side ROM 93 compared to a configuration in which effect data for executing effects corresponding to a penalty game is stored in the effect-side ROM 93.

If the display mode of the image display device 63 is monochrome, even if the color navigation image G88 is displayed on the image display device 63, the player will not be able to distinguish the color of the color navigation image G88. This prevents the player from getting the hope that they may have won with the index value IV for which cherry win data is set, based on the continued display of the color navigation image G88, in a configuration in which the in-game effects corresponding to the penalty game are not started during the penalty game and the display of the color navigation image G88 that was displayed before the start of the penalty game continues.

<Fifteenth embodiment>
In this embodiment, the processing configuration in the production-side MPU 92 for responding to the occurrence of a penalty event differs from that of the fourteenth embodiment. The following describes the configuration that differs from the fourteenth embodiment. Note that the description of the same configuration as the fourteenth embodiment will be basically omitted.

As already explained in the fourteenth embodiment above, the game following the game in which a penalty event occurred becomes the penalty game. In this embodiment, when a game that is not a penalty game ends and a penalty game begins, the display mode of the image display device 63 is switched from color to monochrome at the start of the penalty game.

Figure 140 is a flowchart showing the presentation control processing executed by the presentation-side MPU 92 in this embodiment. Note that the presentation control processing is repeatedly executed at relatively short intervals (e.g., every 2 milliseconds) in each game state.

Steps S7801 through S7813 execute the same processing as steps S7701 through S7713 of the effect control processing (FIG. 138) in the fourteenth embodiment. Specifically, when rotation acceptance commands A and B are received from the main MPU 72 (step S7801: YES), and the effect penalty event flag 94m is not set to "1" (step S7802: NO), meaning that a penalty event did not occur in the previous game and the current game is not a penalty-subject game, the effect penalty target flag 94n is determined to be set to "1" (step S7803). When the effect penalty target flag 94n is set to "1" (step S7803: YES), meaning that the previous game was a penalty-subject game, the effect penalty target flag 94n is cleared to "0" (step S7804). This allows the effect MPU 92 to determine that the current game is not a penalty-subject game.

Then, monochrome termination processing is executed (step S7805). In the monochrome termination processing, display control of the image display device 63 is performed so that the monochrome display is switched to color display. In this way, if no penalty event occurs in the penalty target game, monochrome display is terminated based on the reception of rotation acceptance commands A and B in the game following the penalty game.

If a negative determination is made in step S7803 or if the processing of step S7805 is performed, it is determined whether or not the color navigation effect is in progress (step S7806). If the color navigation effect is in progress (step S7806: YES), color navigation end processing is executed (step S7807). In the color navigation end processing, display control of the image display device 63 is performed so that the display of the color navigation image G88 is terminated. If a negative determination is made in step S7806 or the processing of step S7807 is performed, game effect start processing is executed (step S7808). The contents of the game effect start processing are as already explained in the 14th embodiment above.

Then, based on the information set in the rotation acceptance command A received from the main MPU 72, it is determined whether a win has occurred at index value IV = 13, for which cherry winning data is set (step S7809). If a win has not occurred at index value IV = 13 (step S7809: NO), it is determined whether a win has occurred at index value IV = 16, for which normal replay winning data is set (step S7810). If a win has occurred at index value IV = 16 (step S7810: YES), the color navigation lottery process is executed (step S7811). The content of the color navigation lottery process is as already described in the 14th embodiment. If a win has occurred at index value IV = 13, for which cherry winning data is set (step S7809: YES), or if the color navigation lottery process determines that the color navigation effect is to be executed (step S7812: YES), the color navigation start process is executed (step S7813). The color navigation start process controls the display of the image display device 63 so that the display of the color navigation image G88 begins.

If the presentation-side penalty event flag 94m is set to "1" (step S7802: YES), i.e., a penalty event occurred in the previous game and the current game is a penalty-target game, then monochrome switching processing is executed (step S7815) on the condition that the presentation-side penalty target flag 94n is not set to "1" (step S7814: NO), i.e., the display mode of the image display device 63 is color display. In the monochrome switching processing, display control of the image display device 63 is performed to switch from color display to monochrome display, similar to the monochrome switching processing (step S7720) of the presentation control processing (FIG. 138) in the 14th embodiment described above. This makes it possible to make the color of the color navigation image G88 indistinguishable when the color navigation presentation is being executed.

In this way, if a penalty event occurs in a game that is not a penalty game, the display mode of the image display device 63 is switched from color to monochrome based on the production side MPU 92 receiving rotation acceptance commands A and B in the game following that game (penalty game). Players and the gaming hall manager can recognize that a penalty game has started based on the initiation of monochrome display on the image display device 63.

If the presentation-side penalty target flag 94n is set to "1" (step S7814: YES), that is, if the previous game was a penalty target game and a penalty event occurred in that penalty target game, causing the current game to also be a penalty target game, the process proceeds to step S7816 without executing the monochrome switching process (step S7815). This allows the monochrome display on the image display device 63 to continue.

If a positive judgment is made in step S7814, or if the processing of step S7815 is performed, the production side penalty event flag 94m is cleared to "0" and the production side penalty target flag 94n is set to "1" (step S7816). By setting the production side penalty target flag 94n to "1", the production side MPU 92 can determine that the current game is a penalty target game.

If rotation acceptance commands A and B have not been received from the main MPU 72 (step S7801: NO), steps S7817 to S7819 are executed in the same manner as steps S7715 to S7717 of the effect control processing (FIG. 138) in the above-described fourteenth embodiment. Specifically, if a first stop start command is received from the main MPU 72 (step S7817: YES), and provided that the effect penalty target flag 94n is not set to "1" (step S7818: NO), the first game effect update processing is executed (step S7819). The contents of the first game effect update processing are as already described in the above-described fourteenth embodiment.

If a positive determination is made in step S7818 or if the processing of step S7819 is performed, it is determined whether a penalty event has occurred (step S7820). In step S7820, if a first stop start command is received in normal gaming state ST1 and the first stop is the center reel 32M or the right reel 32R, a positive determination is made. If a positive determination is made in step S7820, a penalty notification start process is executed (step S7821). In the penalty notification start process, sound output control of the speaker 62 is performed to output a voice message saying "Please push from the left," and illumination control of the upper lamp 61 is performed so that the upper lamp 61 emits light in a manner that notifies that a penalty event has occurred. This encourages the player to stop the left reel 32L first.

In this way, if a penalty event occurs, the audio message "Push from the left" is output at the time the penalty event occurs. This allows the player to understand that a penalty event has occurred before the penalty game begins. As already explained in the fourteenth embodiment above, the main MPU 72 is configured to determine whether a penalty event has occurred when all reels 32L, 32M, and 32R have stopped. In this configuration, the presentation MPU 92 determines whether a penalty event has occurred when the first reel 32L, 32M, and 32R has stopped. This allows a penalty notification to be made at the end of the first stop, which is the time when the penalty event occurred.

After executing the penalty notification start process in step S7821, the presentation side penalty event flag 94m is set to "1" (step S7822). This allows the presentation side MPU 92 to know that a penalty event has occurred in the current game, regardless of whether the current game is a penalty-subject game or not.

If a negative judgment is made in step S7817, steps S7823 to S7825 execute the same processing as steps S7722 to S7724 of the effect control processing (FIG. 138) in the above-mentioned fourteenth embodiment. Specifically, if a second stop start command or an all-reel stop command is received from the main MPU 72 (step S7822: YES), and provided that the effect-side penalty target flag 94n is not set to "1" (step S7824: NO), second game effect update processing is executed (step S7825). The contents of the second game effect update processing are as already explained in the above-mentioned fourteenth embodiment.

Next, the manner in which monochrome display is performed on the image display device 63 will be described with reference to the time chart in Figure 141. Figure 141(a) shows the period during which monochrome display is performed on the image display device 63, Figure 141(b) shows the period during which color navigation effects are performed on the image display device 63, Figure 141(c) shows the period during which penalty notifications are performed by the upper lamp 61 and speaker 62, Figure 141(d) shows the period during which normal game effects are performed on the image display device 63, Figure 141(e) shows the state of the penalty target flag 96y in the main RAM 74, Figure 141(f) shows the state of the effect-side penalty event flag 94m, Figure 141(g) shows the state of the effect-side penalty target flag 94n, Figure 141(h) shows the timing at which a penalty event occurs, and Figure 141(i) shows the game execution period.

When a game that is not a penalty game starts at timing t1 in normal gaming state ST1, as shown in Figure 141(i), the normal game in-game effect starts as shown in Figure 141(d). Also, if a win occurs with index value IV = 13, which has cherry win data set, or if a win occurs with index value IV = 16, which has normal replay win data set, and the color navigation effect is executed in the color navigation lottery process, the display of color navigation image G88 starts on the image display device 63 at timing t1, as shown in Figure 141(b).

After that, at timing t2, the center reel 32M or right reel 32R is stopped first, and when a penalty event occurs as shown in Figure 141(h), the performance-side penalty event flag 94m is set to "1" as shown in Figure 141(f). Furthermore, over the period from timing t2 to timing t3, a penalty notification is made by the upper lamp 61 and speaker 62 as shown in Figure 141(c).

After that, at timing t4, the penalty target flag 96y in the master RAM 74 is set to "1" as shown in Figure 141(e), and the game ends as shown in Figure 141(i). Also at timing t4, the updating of the normal game effects ends as shown in Figure 141(d). However, the display of the normal game effects continues without being updated until timing t7, when a game that is not a penalty target game starts.

After that, at timing t5, as shown in FIG. 141(i), when the game following the game in which the penalty event occurred (the penalty game) begins, the display mode of the image display device 63 switches from color to monochrome as shown in FIG. 141(a). Also, at timing t5, as shown in FIG. 141(f) and FIG. 141(g), the value of the presentation-side penalty event flag 94m is cleared to "0," and the presentation-side penalty target flag 94n is set to "1." As shown in FIG. 141(d), even when the penalty game begins, the normal game presentation corresponding to the penalty game does not begin. On the image display device 63 in monochrome display, the normal background image G86 that was displayed before the start of the penalty game, the display of the normal game presentation, and the color navigation image G88 continue to be displayed.

After that, at timing t6, the penalty target flag 96y is cleared to "0" as shown in Figure 141(e), and the penalty target game ends as shown in Figure 141(i). As already explained in the 14th embodiment above, if no penalty event occurs in the penalty target game, the game following that penalty target game will be a non-penalty target game.

After that, at timing t7, when the game following the penalty game begins as shown in Figure 141(i), the monochrome display on the image display device 63 ends and returns to color display as shown in Figure 141(a). Also, at timing t7, the display of the color navigation image G88 ends as shown in Figure 141(b), and the normal game in-game effect for the game following the penalty game begins as shown in Figure 141(d). Also, as shown in Figure 141(g), the effect-side penalty target flag 94n is cleared to "0."

As described above, when a penalty game begins, the display mode of the image display device 63 is switched from color to monochrome. This allows players and the gaming hall manager to easily understand that a penalty game has started based on the display mode of the image display device 63.

The main MPU 72 is configured to execute a process to determine whether a penalty event has occurred after all reels 32L, 32M, and 32R have stopped, and the presentation MPU 92 is configured to determine whether a penalty event has occurred when it receives the first stop start command from the main MPU 72. This allows a penalty notification to be executed at the time a penalty event occurs, if one occurs. In a configuration in which the display mode of the image display device 63 is switched from color to monochrome at the start of the game following the game in which a penalty event occurred (the penalty-subject game), by issuing a penalty notification at the time a penalty event occurs, it is possible to make it easier for the player to understand that a penalty event has occurred due to the player's operation of the center stop button 43 or right stop button 44.

The monochrome display continues until the penalty game ends and a non-penalty game begins. This allows players and amusement hall managers to easily understand, based on the display mode of the image display device 63, that a penalty event has occurred.

<16th embodiment>
In this embodiment, the processing configuration for setting the penalty target games is different from that of the fourteenth embodiment. The configuration that differs from the fourteenth embodiment will be described below. Note that the description of the configuration that is the same as the fourteenth embodiment will basically be omitted.

Similar to the 14th embodiment described above, a penalty event is set in which the stop button 43, 44 is operated to bring the center reel 32M or the right reel 32R to the first stop in a game started in the normal gaming state ST1. If a penalty event occurs in a game, that game becomes a penalty target game. There is one penalty target game. In this way, a penalty event occurs in the normal gaming state ST1. Furthermore, a game in which a penalty event occurs becomes a penalty target game. Therefore, games that can become penalty target games are games started in the normal gaming state ST1.

As with the above-described 14th embodiment, even when a game is started in the second section SC2, if the game is a penalty game, the value of the continued game number counter 96c is not incremented by 1. Furthermore, even when a game is executed in the second section SC2 and in the normal gaming state ST1, if the game is a penalty game, the value of the release game number counter 96g (remaining ceiling game number) is not decremented by 1. Furthermore, even when in the normal gaming state ST1, if the current game is a penalty game, the AT lottery process (step S8204), first CZ lottery process (step S8209), and second CZ lottery process (step S8210), described below, are not executed.

In this way, when a game is executed as a penalty game, the game is executed under conditions that are less favorable to the player than when the game is executed as a non-penalty game. This reduces the possibility that the player will operate the stop buttons 42-44 in a manner that will cause a penalty event.

As with the 14th embodiment, the game states are the normal game state ST1, the CB state, the base AT state ST4, and the ending AT state ST5. In each game state, the game can be started by setting the number of gaming media bets to "3."

The non-CB internal role lottery table referenced in the role lottery process (Figure 16) executed in the non-CB internal state has index values IV set to "1" to "17", similar to the role lottery table (Figure 17) when three coins are bet in the first embodiment described above. Furthermore, the winning data set for index values IV = 1 to 16 in the non-CB internal role lottery table is the same as the winning data set for index values IV = 1 to 16 in the role lottery table (Figure 17) when three coins are bet in the first embodiment described above. In the non-CB internal lottery table, CB winning data is set for index value IV = 17, and "20931" is set as the point value PV corresponding to index value IV = 17. When the role lottery process (Figure 16) is executed with reference to the non-CB internal role lottery table, a win occurs with any of the index values IV.

Index values IV of "1" to "16" are set in the CB internal role lottery table referenced in the role lottery process (Figure 16) executed in the CB internal state. Furthermore, the winning data set for index values IV = 1 to 16 in the CB internal role lottery table is the same as the winning data set for index values IV = 1 to 16 in the role lottery table (Figure 17) when three coins are bet in the first embodiment above. In the CB internal lottery table, "29931" is set as the point value PV corresponding to index value IV = 16. When the role lottery process (Figure 16) is executed with reference to the CB internal role lottery table, any of the index values IV will result in a win.

In this way, whether the role selection process (Figure 16) is executed with reference to the non-CB internal role selection table, or the role selection process (Figure 16) is executed with reference to the CB internal role selection table, a win will occur with either index value IV.

As with the tenth embodiment described above, when the supply of operating power to the slot machine 10 is initiated while the setting key is turned ON, regardless of whether the reset button 56 is pressed when the supply of operating power is initiated, the main processing (FIG. 13) executes an all-clear process for within the area (step S106), followed by a second initialization process for outside the area in step S107, a setting value update process in step S108, and normal processing in step S109.

The game start processing executed by the main MPU 72 will be explained with reference to the flowchart in Figure 142. As already explained in the first embodiment above, the game start processing is executed in step S410 of the role lottery processing (Figure 16). Note that steps S7901 to S7912 in the game start processing are executed as intra-area processing using intra-area processing programs and intra-area processing data.

First, a stop information clearing process is executed (step S7901). In the stop information clearing process, the first stop information area 96w and the most recent stop information area 96x are cleared to "0." This allows the values in the first stop information area 96w and the most recent stop information area 96x to be cleared to "0" before the reels 32L, 32M, and 32R start to rotate in each game. Then, a determination is made as to whether or not the first interval SC1 is being reached (step S7902). In step S7902, a positive determination is made if the second interval flag provided in the various flags area 96i in the work area 96 for intra-area processing is not set to "1."

If a positive judgment is made in step S7902, i.e., if the current game started in the first section SC1, the second section transition process is executed (step S7904) on the condition that a win has been achieved with any index value IV in the role lottery process (Figure 16) (step S7903: YES). In the second section transition process, the second section flag in the various flags area 96i is set to "1," thereby transitioning the play section from the first section SC1 to the second section SC2. Furthermore, the continued game number counter 96c in the work area 96 for in-area processing is cleared to "0," and the total win number counter 96d is set to "63121" as its initial value. Furthermore, in the second section transition process (step S7904), the section display unit 67 is switched from an off state to an on state.

As already explained, the point value PV of the non-CB internal role lottery table is set so that the case where none of the index values IV = 1 to 17 is won in the role lottery process (Figure 16) does not occur, and the point value PV of the internal role lottery table is set so that the case where none of the index values IV = 1 to 16 is won in the role lottery process (Figure 16) does not occur. Therefore, in a game started in the first section SC1, if any of the index values IV is won in the role lottery process (Figure 16) (step S7903: YES), the second section transition process (step S7904) is executed and the game transitions to the second section SC2.

Then, a release game number lottery process is executed (step S7905). In the release game number lottery process, a release game number lottery table provided as data for intra-area processing in the main ROM 73 is read, and current random number information is read from a lottery counter provided in the work area 96 for intra-area processing and updated periodically. The release game number lottery table and random number information are used to determine the ceiling game number to be set in the release game number counter 96g. In the release game number lottery process (step S7905), "1000" is selected as the ceiling game number with a 5/8 probability, "800" is selected as the ceiling game number with a 1/4 probability, and "600" is selected as the ceiling game number with a 1/8 probability. Then, a setting process for the release game number counter 96g is executed (step S7906). In this setting process, the ceiling game number determined in the release game number lottery process (step S7905) is set in the release game number counter 96g.

Then, it is determined whether the system is in the CB internal state (step S7907). If the all-clear process for the area (step S106) is executed, the system is in a state where no CB winning data is set in the main RAM 74, i.e., a non-CB internal state. Therefore, if the system transitions to the second section SC2 after the all-clear process for the area (step S106) is executed, a negative determination is made in step S7907. On the other hand, even if the initialization process for the second section SC2 (step S1208 or step S8106) is executed, the CB winning data is not erased. Therefore, if the system transitions to the second section SC2 after the initialization process for the second section SC2 (step S1208 or step S8106) is executed based on the establishment of the termination condition for the base AT state ST4 or the ending condition for the second section SC2 in a CB internal state, a positive determination is made in step S7907. In this way, when transitioning to the second section SC2 after the initialization process for the second section SC2 (step S1208 or step S8106) is performed, a positive determination is generally made in step S7907.

If the state is CB internal (step S7907: YES), the CZ state flag in the various flags area 96i in the work area 96 for intra-area processing is set to "1", and the CZ state counter 96h in the work area 96 for intra-area processing is set to "3" (step S7908). Setting the CZ state flag to "1" in step S7908 initiates the CZ state. Setting the CZ state counter 96h to "3" also means that there are three games remaining until the CZ state ends. In this way, when transitioning to the second section SC2 after the initialization process for the second section SC2 (step S1208 or step S8106) has been executed, the CZ state is basically established.

If a negative determination is made in step S7902, i.e., if the current game started in the second section SC2, it is determined whether the game is in the CB state (step S7909). If the current game state is different from the CB state (step S7909: NO), it is determined whether the game is in the normal game state ST1 (step S7910). If a negative determination is made in step S7910, i.e., if the current game is in the base AT state ST4 or the ending AT state ST5, the stop order data setting process is executed (step S7912) on the condition that the index value IV = 1 to 9 is selected in the lottery process for the current game (Figure 16) (step S7911: YES). In the stop order data setting process, if the index value IV = 1 to 6 is selected in the lottery process for the current game (Figure 16), the winning number display unit 125 displays a display corresponding to the stop order of reels 32L, 32M, and 32R that allows the first bell win to be achieved. Additionally, if the winning combination results in an index value IV of 7 to 9 in the combination lottery process (Figure 16), the winning combination display unit 125 will display the order in which reels 32L, 32M, and 32R stop, which will result in the second bell winning combination.

Next, prior to describing the response processing at the end of game play executed by the main MPU 72 (FIG. 143), the configuration of the work area 96 for in-area processing used in the response processing at the end of game play will be described. As already explained with reference to FIG. 12 in the first embodiment above, the work area 96 for in-area processing includes a start status area 96j. As in the first embodiment above, in the start status storage process in step S306 of the normal processing (FIG. 15), information is set in the start status area 96j that enables identification of the game status (normal game status ST1, CB state, base AT state ST4, ending AT state ST5, or CZ state) and game zone (first zone SC1 or second zone SC2) for the current game. By referencing the start status area 96j, the main MPU 72 can determine the game status and game zone at the start of the current game.

Next, the response processing at the end of game, which is executed by the main MPU 72, will be explained with reference to the flowchart in Figure 143. As already explained in the first embodiment above, the response processing at the end of game is executed in step S310 of the normal processing (Figure 15). Note that the processing of steps S8001 to S8011 in the response processing at the end of game is executed as intra-area processing using the intra-area processing program and intra-area processing data.

First, it is determined whether a penalty event has occurred in the current game (step S8001). In step S8001, if the game is in normal gaming state ST1 and the value in the first stop information area 96w is not "1," that is, if the stop button 43, 44 is operated to cause the center reel 32M or the right reel 32R to make the first stop in a game that started in normal gaming state ST1, a positive determination is made.

If a penalty event has not occurred (step S8001: NO), the start status area 96j in the work area 96 for in-region processing in the main RAM 74 is referenced to determine whether the game started in the first section SC1 (step S8002). If a negative determination is made in step S8002, that is, if the current game started in the second section SC2, the value of the continued game number counter 96c is incremented by 1 (step S8003). On the other hand, if the current game started in the first section SC1 (step S8002: YES), the process proceeds to step S8005 without executing the process of step S8003.

In this way, the value of the continued game counter 96c is incremented by 1 when a game starts in the second section SC2 and ends without a penalty event occurring. This prevents penalty games from being counted as one game in the continued game counter 96c.

If a penalty event occurs (step S8001: YES), the penalty target flag 96y is set to "1" (step S8004). This allows the master MPU 72 to determine that the current game is a penalty target game. In this way, if a penalty event occurs in a game, that game becomes a penalty target game.

As described above, if a game is started in the second section SC2 and the game does not become a penalty game, the value of the continued games counter 96c is incremented by 1 when the game ends. If a game is started in the first section SC1, the value of the continued games counter 96c is not incremented by 1 based on the execution of the game. Furthermore, if a game is started in the second section SC2 and the game becomes a penalty game, the value of the continued games counter 96c is not incremented by 1 based on the execution of the game.

If a positive judgment is made in step S8002, if the processing of step S8003 is performed, or if the processing of step S8004 is performed, CB processing is executed to control the transition and progress of the CB state (step S8005). In the CB processing, if a CB win is achieved in the current game, the CB state flag provided in the various flag area 96i in the work area 96 for intra-area processing is set to "1," and the CB winning data stored in the work area 96 for intra-area processing is cleared. This changes the game state to CB state. In the CB state, if a first bell win is achieved in the current game, the value of the total award counter provided in the work area 96 for intra-area processing is incremented by 1. The total award counter is a counter used by the main MPU 72 to determine the total number of gaming media awarded in the CB state, and is cleared to "0" when the CB state begins. When the value of the total grant counter after adding 1 reaches "30", which is the CB state termination reference number, the CB state flag corresponding to the current CB state is cleared to "0".

After executing the CB processing in step S8005, provided that the game is not in the CB state (step S8006: NO), the process jumps to the processing corresponding to the current game state (step S8007). Specifically, if the game state is the normal game state ST1, the normal processing described below is executed (step S8008). If the game state is the base AT state ST4, the base AT processing described below is executed (step S8009). If the game state is the ending AT state ST5, the game section control processing is executed (step S8010). Also, if a positive judgment is made in step S8006 because the game is in the CB state, if normal processing is executed in step S8008, or if base AT processing is executed in step S8009, the game section control processing is then executed (step S8010).

After executing the game zone control process in step S8010, the penalty target flag 96y is cleared to "0" (step S8011). In this way, the value of the penalty target flag 96y is cleared to "0" when the game ends. This allows the master MPU 72 to know that the penalty target game has ended.

Next, the base AT response processing executed in step S8009 of the response processing at the end of game play (Figure 143) will be explained with reference to the flowchart in Figure 144. Note that the processing of steps S8101 to S8108 in the base AT response processing is executed as in-area processing using the in-area processing program and in-area processing data.

First, similar to step S1001 of the base AT start processing (FIG. 26) in the first embodiment, an additional lottery process is executed (step S8101). The contents of the additional lottery process have already been explained in the first embodiment. If an additional win is made in the additional lottery process (step S8102: YES), the number of gaming media selected in the additional lottery process is added to the AT difference number counter 96e in the work area 96 for in-area processing (step S8103). If an additional win is made, the number of gaming media to be awarded is one of "20", "50", "80", "100", and "200".

If a negative judgment is made in step S8102, or if the processing of step S8103 is performed, an update process for the AT difference number counter 96e is executed (step S8104). In the update process for the AT difference number counter 96e, the same processes as steps S1004 to S1009 of the base AT start processing (Figure 26) in the first embodiment are executed. Specifically, if the result of the role lottery processing (Figure 16) is a miss, the bet number, "3", is added to the AT difference number counter 96e. Also, in the update process for the AT difference number counter 96e (step S8104), if a win is achieved with the index value IV set with winning data corresponding to the awarding of gaming media, a subtraction process for the AT difference number counter 96e is executed regardless of whether the winning data of that index value IV was won. In the subtraction process of the AT difference number counter 96e, the number of gaming media awarded in the event that the winning data set in the winning index value IV that awards the largest number of gaming media is won is subtracted by "3", which is the number of bets placed on the current game, and the result is subtracted from the AT difference number counter 96e. This subtraction process is performed regardless of whether the winning data has won. In the update process of the AT difference number counter 96e (step S8104), if the value of the AT difference number counter 96e is "0" or less as a result of the subtraction process of the AT difference number counter 96e, the AT difference number counter 96e is cleared to "0".

After executing the update process for the AT difference number counter 96e in step S8104, if the value of the AT difference number counter 96e is "0" (step S8105: YES), i.e., if the termination condition for the base AT state ST4 is met, initialization process for the second section SC2 is executed (step S8106). Also, as already explained in the first embodiment above, if the ending condition for the second section SC2 is met, initialization process for the second section SC2 is executed in step S1208 of the game section control process (Figure 28). In the initialization process for the second section SC2 (step S8106 or step S1208), the second section flag, base AT state flag, and ending AT state flag in the various flag areas 96i in the work area 96 for intra-area processing are cleared to "0," and the AT difference number counter 96e in the work area 96 for intra-area processing is cleared to "0." This results in a situation in the first section SC1 and normal game state ST1. Furthermore, during the initialization process for the second section SC2 (step S8106 or step S1208), a second section initialization command is sent to the presentation-side MPU 92. When the presentation-side MPU 92 receives the second section initialization command, it determines that the conditions for ending the base AT state ST4 have been met, or that the ending conditions for the second section SC2 have been met, and clears the displayed game number counter 94p (described below) to "0." Furthermore, when the second section SC2 ends, the section display unit 67 changes from a lit state to an unlit state.

If the value of the AT difference counter 96e is not "0" (step S8105: NO), it is determined whether the value of the total winnings counter 96d in the work area 96 for intra-area processing is greater than or equal to "65321", which is the value corresponding to the fulfillment of the conditions before the ending occurrence (step S8107). If the value of the total winnings counter 96d is greater than or equal to "65321" (step S8107: YES), i.e., the conditions before the ending occurrence are fulfilled, the ending AT state flag in the various flag areas 96i is set to "1", and the base AT state flag in the various flag areas 96i is cleared to "0" (step S8108). This transitions the game state from the base AT state ST4 to the ending AT state ST5.

Next, the normal response processing executed in step S8008 of the response processing at the end of game play (Figure 143) will be explained with reference to the flowchart in Figure 145. Note that steps S8201 to S8213 in the normal response processing are executed as in-area processing using the in-area processing program and in-area processing data.

First, the start status area 96j of the work area 96 for intra-area processing is referenced to determine whether the play area at the start of the current game was the first section SC1 (step S8201). If the play area at the start of the current game was the second section SC2 (step S8201: NO), it is determined whether the penalty target flag 96y is set to "1" (step S8202). If a negative determination is made in step S8202, i.e., if the current game started in the second section SC2 and was not a penalty target game, the value of the release game number counter 96g is decremented by 1 (step S8203).

In this way, if a game is started in the second section SC2 and normal gaming state ST1, and no penalty event occurs in that game, the remaining ceiling game count will be decremented by one. This prevents penalty-subject games from being counted as one game in the cancellation game count counter 96g.

Then, similar to step S7511 of the normal start processing (FIG. 135) in the fourteenth embodiment, the AT lottery processing is executed (step S8204). The contents of the AT lottery processing have already been described in the fourteenth embodiment. In the AT lottery processing (step S7511), if a win does not occur at the index value IV where cherry winning data is set when not in the CZ state, the expected value of winning to transition to the base AT state ST4 is approximately 5%. If a win occurs at the index value IV where cherry winning data is set when not in the CZ state, the expected value of winning to transition to the base AT state ST4 is approximately 20%. If a win does not occur at the index value IV where cherry winning data is set when not in the CZ state, the expected value of winning to transition to the base AT state ST4 is approximately 30%. If a win occurs at the index value IV where cherry winning data is set when not in the CZ state, the expected value of winning to transition to the base AT state ST4 is approximately 50%.

If the AT lottery process (step S8204) results in a win to transition to base AT state ST4 (step S8205: YES), the AT win flag in the various flags area 96i in the work area 96 for in-area processing is set to "1" (step S8206). This allows the main MPU 72 to recognize that a win to transition to base AT state ST4 has occurred.

If a negative judgment is made in step S8205, it is determined whether the CZ status flag in the various flags area 96i is set to "1" (step S8207), and if the CZ status flag is not set to "1" (step S8207: NO), it is determined whether the value of the continued game number counter 96c is the target value for the second CZ lottery process (specifically, one of "500", "700", and "900") (step S8208).

As already explained, when transitioning to the second section SC2, the release game number counter 96g is set to one of "600," "800," or "1000" as the ceiling game number. Also, as already explained, the value of the release game number counter 96g is decremented by one when a game is started in the second section SC2 and normal gaming state ST1, and no penalty event occurs in that game. Therefore, after the release game number counter 96g is set to "1000" as the ceiling game number, the value of the release game number counter 96g becomes the target value for the second CZ lottery process when, after the state has entered the second section SC2 and normal gaming state ST1, the number of games played while that state is continuing becomes one of "100," "300," or "500." Furthermore, after the release game number counter 96g is set to "800" as the ceiling game number, the value of the release game number counter 96g becomes the target value for the second CZ lottery process when, after the second interval SC2 and the normal gaming state ST1 are reached, the number of games played while this state continues becomes either "100" or "300." Furthermore, after the release game number counter 96g is set to "600" as the ceiling game number, the value of the release game number counter 96g becomes the target value for the second CZ lottery process when, after the second interval SC2 and the normal gaming state ST1 are reached, the number of games played while this state continues becomes "100."

If the value of the continued game number counter 96c is not the target value for the second CZ lottery process (step S8208: NO), the first CZ lottery process is executed (step S8209). Also, if the value of the continued game number counter 96c is the target value for the second CZ lottery process (step S8208: YES), the second CZ lottery process is executed (step S8210).

In the first CZ lottery process (step S8209), the first CZ lottery table provided in the main ROM 73 as data for intra-area processing is read, and the current random number information is read from a lottery counter provided in the work area 96 for intra-area processing and updated regularly. The first CZ lottery table and random number information are used to determine whether or not a transition to the CZ state has been successful. The first CZ lottery table is set so that the probability of a transition to the CZ state is 1/20. In the second CZ lottery process (step S8210), the second CZ lottery table provided in the main ROM 73 as data for intra-area processing is read, and the current random number information is read from a lottery counter provided in the work area 96 for intra-area processing and updated regularly. The second CZ lottery table and random number information are used to determine whether or not a transition to the CZ state has been successful. The second CZ lottery table is set so that the probability of a transition to the CZ state is 1/2.

In this way, in the second CZ lottery process (step S8210), which is executed in a game in which the value of the release game count counter 96g is the target value for the second CZ lottery process, a winning entry to the CZ state occurs with a higher probability than in the first CZ lottery process (step S8209), which is executed in a game in which the value of the continued game count counter 96c is not the target value. This allows the player to expect that a winning entry to the CZ state will occur when a game in which the value of the continued game count counter 96c is the target value for the second CZ lottery process is played in the normal gaming state ST1 and not in the CZ state.

If the first CZ lottery process is performed in step S8209, or the second CZ lottery process is performed in step S8210, it is determined whether or not a transition to the CZ state has been won in these CZ lottery processes (step S8211), and if a transition to the CZ state has been won (step S8211: YES), the CZ win flag in the various flags area 96i is set to "1" (step S8212). This allows the main MPU 72 to know that a transition to the CZ state has been won.

If a positive judgment is made in step S8201, if processing of step S8206 is performed, if a positive judgment is made in step S8207, if a negative judgment is made in step S8211, or if processing of step S8212 is performed, normal processing is executed (step S8213), similar to step S7404 of the response processing at the end of game play in the above-mentioned 14th embodiment (FIG. 134). The contents of the normal processing are as already explained in the above-mentioned 14th embodiment with reference to the flowchart in FIG. 136.

As already explained in the 14th embodiment above with reference to the flowchart in Figure 136, if the game is a penalty game (step S7601: YES), the normal processing (Figure 136) is terminated without executing the processing of steps S7602 to S7612. Even if a game is executed in the CZ state, if the game is a penalty game, the processing of subtracting 1 from the value of the CZ state counter 96h is not executed. This prevents the penalty game from being counted as one game in the CZ state counter 96h.

As already explained, when a game is started in the CZ state, compared to when the game is started in a state other than the CZ state, there is an advantage for the player in that the expected value of winning the transition to the base AT state ST4 in the AT lottery process (step S8204) is higher. However, as already explained, if a game started in the CZ state becomes a penalty-target game, the AT lottery process (step S8204) is not executed, and the player is unable to enjoy the advantages of being in the CZ state. If a penalty-target game were counted as one game in the CZ state counter 96h, the opportunity to execute the AT lottery process (step S8204) in a CZ state situation would be reduced if a player accidentally triggered a penalty event. In contrast, a penalty-target game is not counted as one game in the CZ state counter 96h. This prevents a reduction in the opportunity to execute the AT lottery process (step S8204) in a CZ state situation due to the execution of a penalty-target game in the CZ state.

If the current game is a penalty-target game (step S8202: YES), this normal response process (Fig. 145) is terminated without executing the processes from step S8203 onwards. This prevents the process of subtracting 1 from the value of the release game number counter 96g (step S8203), the AT lottery process (step S8204), the first CZ lottery process (step S8209), and the second CZ lottery process (step S8210) from being executed in the penalty-target game.

If the process of subtracting 1 from the value of the release game counter 96g (step S8203) is executed in a penalty target game, when a game in which the value of the release game counter 96g is the target value for the second CZ lottery process (a game that started with the value of the release game counter 96g being one of "501," "701," or "901") becomes a penalty target game, one opportunity to execute the second CZ lottery process (step S8210) will be lost. In contrast, the process of subtracting 1 from the value of the release game counter 96g (step S8203) is not executed in a penalty target game. This prevents the player from accidentally triggering a penalty event and thereby losing one opportunity to execute the second CZ lottery process (step S8210).

Next, we will explain the display of the number of games to be played and the CZ expectation effect performed on the image display device 63. Figure 146 (a) is an explanatory diagram showing how the number of games to be played is displayed on the image display device 63.

As shown in Figure 146 (a), a game execution count image G89 is displayed on the lower left side of the image display device 63, which indicates the number of games executed since the supply of operating power to the slot machine 10 began, or the number of games executed after the initialization process for the second section SC2 (step S1208 or step S8106) was executed. As already explained, if the ending condition for the second section SC2 is met, the initialization process for the second section SC2 is executed in step S1208 of the game section control process (Figure 28), and if the termination condition for the base AT state ST4 is met, the initialization process for the second section SC2 is executed in step S8106 of the base AT process (Figure 144). If the number of games played since the start of the supply of operating power to the slot machine 10 is 10, or if the number of games played after the initialization process for the second section SC2 (step S1208 or step S8106) is performed is 10, a game play count image G89 with the words "10 games played" is generally displayed, as shown in FIG. 146(a).

Figure 146 (b) is an explanatory diagram illustrating the configuration of the presentation side RAM 94. As in the fourteenth embodiment, the presentation side RAM 94 is provided with a presentation side penalty target flag 94n. Also, as shown in Figure 146 (b), the presentation side RAM 94 is provided with a display game number counter 94p. The display game number counter 94p is a counter that allows the presentation side MPU 92 to grasp the number of games executed, which is displayed in the game execution count image G89. The game execution count image G89 is displayed on the lower left side of the image display device 63, provided that the CZ state is not in effect.

When the supply of operating power to the slot machine 10 begins, the value of the displayed game count counter 94p is cleared to "0" regardless of whether the all-clear process for the area (step S106) has been executed. The value of the displayed game count counter 94p is incremented by 1 each time a game is started. If a game becomes a penalty game after the value of the displayed game count counter 94p has been incremented by 1 when the game starts, the value of the displayed game count counter 94p may be decremented by 1 at the time the penalty event occurs (when the center reel 32M or right reel 32R is first stopped), or the value of the displayed game count counter 94p may not be decremented by 1.

First, we will explain what happens when a penalty event occurs in a game started in the first section SC1. As already explained, in a game started in the first section SC1, a winning combination is achieved with one of the index values IV in the role lottery process (Figure 16) (step S7903: YES), and the second section transition process (step S7904) is executed, resulting in a transition to the second section SC2. If a penalty event occurs in a game started in the first section SC1, the number of games played indicated by the game play count image G89 will not be decremented by 1 based on the occurrence of a penalty event in that game, regardless of whether the CB internal state was in effect at the start of the game. In such a case, the current penalty-subject game will be counted as one game in the displayed game count counter 94p. In this way, if the all-clear process for the area (step S106) or the initialization process for the second section SC2 (step S1208 or step S8106) is executed to enter the first section SC1 and the normal gaming state ST1, and then a game is started in this state, that game will be counted as one game in the displayed game number counter 94p, regardless of whether or not that game is a penalty game.

Next, we will explain what happens when a penalty event occurs in a game started in the second interval SC2. If a penalty event occurs in a game started in the second interval SC2 and that game is not the first game after the supply of operating power to the slot machine 10 has begun, the number of games played indicated by the game execution count image G89 is decremented by 1 at the time the penalty event occurs. In such a case, the current penalty target game will not be counted as one game in the displayed game count counter 94p. On the other hand, if a penalty event occurs in a game started in the second interval SC2 and that game is the first game after the supply of operating power to the slot machine 10 has begun, the number of games played indicated by the game execution count image G89 will not be decremented by 1 based on the occurrence of a penalty event in that game. In such a case, the current penalty target game will be counted as one game in the displayed game count counter 94p.

In this way, the first game played after the supply of operating power to the slot machine 10 begins is counted as one game in the displayed game counter 94p, regardless of whether the all-clear process for the area (step S106) was executed when the supply of operating power began, and regardless of whether the game is a penalty-subject game. This prevents a player from determining whether the all-clear process for the area (step S106) was executed based on the number of games executed indicated by the game execution count image G89 after the supply of operating power to the slot machine 10 began. This prevents a player from knowing whether the setting value update process (step S108) was executed by deliberately causing a penalty event in the first game after the amusement hall opens and checking the game execution count image G89.

As already explained, when transitioning to the second section SC2, the release game counter 96g is set to one of "600," "800," or "1000" as the ceiling game number. Hereinafter, in this specification, the difference between the ceiling game number ("600," "800," or "1000") set in the release game counter 96g and the current value of the release game counter 96g is referred to as the "number of games played based on the value of the release game counter 96g." The release game counter 96g is configured so that a game started in the first section SC1 is not counted as one game, regardless of whether the game is a penalty game. On the other hand, the display game counter 94p is configured so that a game started in the first section SC1 is counted as one game, regardless of whether the game is a penalty game. Therefore, when a game started in the first section SC1 is played, the value of the display game counter 94p becomes "1" greater than the number of games played based on the value of the release game counter 96g.

In a game started in the first section SC1, if the role lottery process (FIG. 16) is configured to result in no winning combination for any index value IV, i.e., if the number of games played in the first section SC1 is configured to be two or more and not fixed, the difference between the value of the display game count counter 94p and the number of games played based on the value of the release game count counter 96g will increase as the number of games played in the first section SC1 increases. In contrast, in a game started in the first section SC1, if the role lottery process (FIG. 16) results in a winning combination for any index value IV (step S7903: YES), the second section transition process (step S7904) is executed, and the game transitions to the second section SC2, i.e., the number of games played in the first section SC1 is configured to be a fixed number of "1." This allows the difference between the value of the display game count counter 94p resulting from the execution of a game started in the first section SC1 and the number of games played based on the value of the release game count counter 96g to be a fixed number of "1."

The release game number counter 96g and the display game number counter 94p count a game that started in the second interval SC2 but is not the first game after the supply of operating power has begun as one game if it does not become a penalty-subject game. Furthermore, the release game number counter 96g and the display game number counter 94p do not count a game that started in the second interval SC2 but is not the first game after the supply of operating power has begun as a penalty-subject game. In this way, the counting of games that started in the second interval SC2 but are not the first game after the supply of operating power has begun is the same for the release game number counter 96g in the main RAM 74 and the display game number counter 94p in the presentation RAM 94.

If the supply of operating power to the slot machine 10 is started without the setting key being turned ON, and a normal return to the address before the power was cut off is performed without executing the all-clear process for the area (step S106), the value of the release game number counter 96g before the power was cut off is maintained, while the value of the display game number counter 94p is cleared to "0." Therefore, when this normal return is performed, the difference between the value of the display game number counter 94p and the number of games played based on the value of the release game number counter 96g may be "2" or more until the initialization process for the second section SC2 (step S1208) is executed.

If the supply of operating power to the slot machine 10 is initiated without the setting key being turned ON, and the address before power was shut off is returned to without the all-clear process for the area (step S106) being executed, the first game after the supply of operating power begins may be a game started in the second interval SC2. In the release game number counter 96g, if a game started in the second interval SC2 and that is the first game after the supply of operating power begins becomes a penalty game, the game is not counted as one game. On the other hand, in the display game number counter 94p, if a game started in the second interval SC2 and that is not the first game after the supply of operating power begins becomes a penalty game, the game is counted as one game. Therefore, if a game started in the second interval SC2 and that is the first game after the supply of operating power begins becomes a penalty game, the difference between the value of the display game number counter 94p and the number of games played based on the value of the release game number counter 96g increases by one game.

In the release game number counter 96g and the display game number counter 94p, if a game that starts in the second section SC2 and is the first game after the supply of operating power begins does not become a penalty game, that game is counted as one game. In this way, whether or not a game that starts in the second section SC2 and is the first game after the supply of operating power begins and is not a penalty game is counted is the same for the release game number counter 96g in the main RAM 74 and the display game number counter 94p in the presentation RAM 94.

After the all-clear process for the area (step S106) or the initialization process for the second section (step S1208 or step S8106) is executed, if there is no interruption in the supply of operating power, the difference between the value of the displayed game count counter 94p and the number of games played based on the value of the release game count counter 96g will not be a value of "2" or more. This prevents the difference between the number of games played that the player understands based on the game count image G89 and the number of games played based on the value of the release game count counter 96g from becoming a value of "2" or more, reducing the possibility of the player feeling uncomfortable.

As already explained in the normal response processing (Figure 145), the probability of winning the transition to the CZ state in the second CZ lottery processing (step S8210) executed when the value of the release game number counter 96g is the target value for the second CZ lottery processing (any of "500", "700", and "900") is set to 10 times the probability of winning the transition to the CZ state in the first CZ lottery processing (step S8209) executed when the value of the release game number counter 96g is not the target value for the second CZ lottery processing (specifically, 1/20).

Figure 146(c) is an explanatory diagram illustrating how the CZ expectation effect is displayed on the image display device 63. As shown in Figure 146(c), on the image display device 63, a game is started in the second section SC2, normal gaming state ST1, and not in the CZ state. When the value of the display game number counter 94p, which is updated by adding 1 based on the start of the game, falls within the first target range ("97" to "101"), the second target range ("197" to "201"), or the third target range ("297" to "301") of the CZ expectation effect, the CZ expectation image G91 is displayed. When the value of the display game number counter 94p falls within the first target range ("97" to "101") of the CZ expectation effect, as shown in Figure 146(c), the wording of the CZ expectation image G91 reads, "High expectation of CZ transition on the 101st game." This allows the player to expect that a win to transition to the CZ state will occur in a game in which the number of games played, indicated by the game count image G89, reaches "101." Furthermore, although not shown, when the value of the displayed game count counter 94p is within the second target range ("197" to "201") of the CZ expectation effect, the wording of the CZ expectation image G91 reads "High expectation of CZ transition on the 201st game." This allows the player to expect that a win to transition to the CZ state will occur in a game in which the number of games played, indicated by the game count image G89, reaches "201." Furthermore, although not shown, when the value of the displayed game count counter 94p is within the third target range ("297" to "301") of the CZ expectation effect, the wording of the CZ expectation image G91 reads "High expectation of CZ transition on the 301st game." This allows the player to expect that a win to transition to the CZ state will occur in a game in which the number of games played, indicated by the game count image G89, reaches "301."

The CZ expectation image G91 is an image that suggests that there is a high possibility of a winning move to the CZ state occurring in the target game, but is not an image that notifies players that a winning move to the CZ state will occur in the target game. This prevents the player from feeling uncomfortable even when the CZ expectation image G91 is actually displayed for a game in which the first CZ lottery process (step S8209) is executed.

Next, the presentation control processing executed by the presentation-side MPU 92 will be explained with reference to the flowchart in Figure 147. Note that the presentation control processing is repeatedly executed at relatively short intervals (e.g., every 2 milliseconds) in each game state.

When rotation acceptance commands A and B are received from the master MPU 72 (step S8301: YES), it is determined whether the presentation-side penalty target flag 94n is set to "1" (step S8302). If the presentation-side penalty target flag 94n is set to "1" (step S8302: YES), i.e., if the previous game was a penalty target game, the presentation-side penalty target flag 94n is cleared to "0" (step S8303). Monochrome termination processing is then executed (step S8304). In the monochrome termination processing, display control is performed on the image display device 63 to switch from monochrome to color display. In this way, when a penalty target game is played, the monochrome display is terminated in the game following the penalty target game based on the presentation-side MPU 92's reception of rotation acceptance commands A and B.

If a negative judgment is made in step S8302, or if the processing of step S8304 is performed, steps S8305 to S8312 execute the same processing as steps S7706 to S7713 of the effect control processing (FIG. 138) in the above-described fourteenth embodiment. Specifically, if a color navigation effect is in progress (step S8305: YES), color navigation termination processing is executed (step S8306). In the color navigation termination processing, display control is performed on the image display device 63 so that the display of the color navigation image G88 is terminated. In this way, the color navigation effect is terminated in the game following the game in which the color navigation effect was executed, based on the fact that the presentation-side MPU 92 receives rotation acceptance commands A and B.

If a negative judgment is made in step S8305, or if the processing of step S8306 is performed, a game presentation start process is executed (step S8307). In the game presentation start process, a background image corresponding to the game status is displayed, and display control of the image display device 63 is performed so that an in-game presentation corresponding to the game status is started. The background image corresponding to the game status and the content of the in-game presentation corresponding to the game status are as already described in the 14th embodiment. In addition, in the game presentation start process (step S8307), sound output control of the speaker 62 is performed so that sound corresponding to the in-game presentation is performed, and light emission control of the upper lamp 61 is performed so that the upper lamp 61 emits light in a manner corresponding to the in-game presentation. Since the game presentation start process (step S8307) is executed before the presentation side MPU 92 receives the first stop start command, the game presentation start process (step S8307) is also executed in games that are subject to a penalty.

Then, based on the information set in the rotation acceptance command A received from the main MPU 72, it is determined whether a win has occurred at index value IV = 13, for which cherry winning data is set (step S8308). If a win has not occurred at index value IV = 13 (step S8308: NO), it is determined whether a win has occurred at index value IV = 16, for which normal replay winning data is set (step S8309). If a win has occurred at index value IV = 16 (step S8309: YES), a color navigation lottery process is executed (step S8310), similar to step S7711 of the effect control process (Figure 138) in the fourteenth embodiment. The content of the color navigation lottery process is as already described in the fourteenth embodiment. In the color navigation lottery process (step S8310), it is determined with a probability of 1/4 that the current game is eligible for the execution of a color navigation effect.

If the cherry winning data is set to index value IV = 13 and a win occurs (step S8308: YES), or if the color navigation lottery process determines that the color navigation effect is to be executed (step S8311: YES), the color navigation start process is executed (step S8312). In the color navigation start process, display control is performed on the image display device 63 so that the display of the color navigation image G88 begins.

If a negative judgment is made in step S8301, the MPU 92 determines whether a first stop start command has been received from the main MPU 72 (step S8313). If a first stop start command has been received (step S8313: YES), the MPU 92 determines whether a penalty event has occurred (step S8314). In step S8314, if a first stop start command is received in normal gaming state ST1 and the first stop is the center reel 32M or the right reel 32R, a positive judgment is made. As already explained, a penalty event occurs when the stop button 43, 44 is operated to set the center reel 32M or the right reel 32R as the first stop in a game started in normal gaming state ST1. Furthermore, the timing at which the production MPU 92 executes the process to determine whether a penalty event has occurred is before the timing at which the gaming state at the start of the game (normal gaming state ST1, CB state, base AT state ST4, or ending AT state ST5) changes (the end of the game). This simplifies the processing configuration for determining whether a penalty event has occurred in the production side MPU 92 compared to a configuration in which processing is executed in the production side MPU 92 at the end of the game to determine whether a penalty event has occurred.

If a penalty event has not occurred (step S8314: NO), i.e., if the current game is not a penalty-subject game, the first game effect update process is executed (step S8315). In the first game effect update process, display control is performed on the image display device 63 so that the display content of the in-game effects is updated based on the reception of the first stop start command. In addition, in the first game effect update process (step S8315), the illumination of the upper lamp 61 and the sound output of the speaker 62 are controlled so that illumination of the upper lamp 61 and sound output from the speaker 62 are performed in accordance with the progress of the in-game effects.

If a penalty event occurs (step S8314: YES), that is, if the current game has become a penalty game, monochrome switching processing is executed (step S8316). In the monochrome switching processing, display control of the image display device 63 is performed to switch from color display to monochrome display. This makes it possible to make the color of the color navigation image G88 indistinguishable when a color navigation effect is being executed. In this way, if a penalty event occurs, monochrome display is initiated at the time the penalty event occurs. This allows the player and the amusement hall manager to know that the current game has become a penalty game.

As already explained, the main MPU 72 is configured to determine whether a penalty event has occurred after all reels 32L, 32M, and 32R have stopped. In this configuration, the performance MPU 92 determines whether a penalty event has occurred when the first reel 32L, 32M, and 32R stops. This allows the display on the image display device 63 to be switched to monochrome display at the end of the first stop.

The production side penalty target flag 94n is then set to "1" (step S8317). This allows the production side MPU 92 to understand that the current game has become a penalty target game.

If a negative determination is made in step S8313, it is determined whether a second stop start command or an all-reel stop command has been received from the main MPU 72 (step S8318). If a positive determination is made in step S8318, the second game effect update process is executed (step S8320), provided that the effect-side penalty target flag 94n is not set to "1" (step S8319: NO). In the second game effect update process, display control is performed on the image display device 63 so that the display content of the in-game effects is updated based on the reception of the second stop start command or the all-reel stop command. Furthermore, in the second game effect update process (step S8320), the illumination of the upper lamp 61 and the sound output of the speaker 62 are controlled so that the illumination of the upper lamp 61 and the sound output from the speaker 62 are performed in accordance with the progress of the in-game effects.

In this way, the first game effect update process (step S8315) and the second game effect update process (step S8320) are not executed in a penalty game. In a game that has become a penalty game, the image display device 63 switches to a monochrome display when the first reel 32M, 32R stops, and the image display device 63 is placed in a state where in-game effects are not updated. This makes it easier for players and amusement hall managers to recognize that a game is a penalty game based on the display content of the image display device 63.

If a negative judgment is made in step S8318, the main MPU 72 determines whether a ceiling reach command has been received from the main MPU 72 (step S8319). When transitioning from the normal gaming state ST1 to the base AT state ST4 based on the value of the release game number counter 96g reaching "0," the main MPU 72 transmits a ceiling reach command to the presentation MPU 92. If a ceiling reach command has been received (step S8319: YES), the main MPU 72 executes a ceiling reach presentation start process (step S8320). In the ceiling reach presentation start process, after the second section SC2 and the normal gaming state ST1 are reached, the number of games played while the state continues reaches the ceiling number of games (either "600," "800," or "1000"), and the upper lamp 61 is illuminated, the speaker 62 is sound output, and the image display device 63 is displayed. This is to start a ceiling reach presentation that indicates a transition to the base AT state ST4.

As already explained, after the all-clear process for the area (step S106) or the initialization process for the second section (step S1208 or step S8106) is executed, if there is no interruption in the supply of operating power, the difference between the value of the displayed game count counter 94p and the number of games played based on the value of the release game count counter 96g will not be a value of "2" or more. This reduces the possibility that the number of games played that the player understands based on the game count image G89 displayed on the image display device 63 in a game in which the ceiling-reaching effect starts will be a number that is "2" or more away from the ceiling game number (either "600," "800," or "1000"), causing the player a sense of discomfort.

Next, prior to explaining the game count display process (Figure 148) executed by the presentation-side MPU 92, we will explain the commands that the presentation-side MPU 92 receives from the main MPU 72 after the supply of operating power to the slot machine 10 has begun. As already explained in the first embodiment above, if the power is turned on while the setting key has been turned on, the main MPU 72 executes the setting value update process (step S108). If the power is turned on without turning on the setting key, the main MPU 72 returns to the address before the power was cut off. Also, as in the first embodiment above, when the setting value update process (step S108) is executed by the main MPU 72, the presentation-side MPU 92 receives a setting change start command from the main MPU 72 at the start of the setting value update process and a setting change end command at the end of the setting value update process. Also, if the main MPU 72 returns to the address before the power was cut off, the presentation-side MPU 92 receives a power recovery command from the main MPU 72. In this way, after the supply of operating power to the slot machine 10 begins, the first command that the presentation side MPU 92 receives from the main side MPU 72 is a power restoration command or a setting change start command.

Next, the game count display processing executed by the presentation-side MPU 92 will be explained with reference to the flowchart in Figure 148. Note that the game count display processing is repeatedly executed at a relatively short cycle (for example, 2 milliseconds) in each game state. The presentation control processing (Figure 147) and the game count display processing (Figure 148) are executed at a cycle of 2 milliseconds. In each processing of the presentation control processing (Figure 147) and the game count display processing (Figure 148), which occur at a cycle of 2 milliseconds, the game count display processing (Figure 148) is executed after the presentation control processing (Figure 147) is executed.

If a power restoration command is received from the main MPU 72 (step S8401: YES), the normal return flag provided in the presentation RAM 94 is set to "1" (step S8402). The normal return flag is a flag that allows the presentation MPU 92 to determine that a normal return has occurred, in which the all-clear process for the area (step S106) is not executed, when the supply of operating power to the slot machine 10 begins. If a negative determination is made in step S8401, a determination is made as to whether a setting change start command or a second section initialization command has been received from the main MPU 72 (step S8403). The second section initialization command is sent from the main MPU 72 to the presentation MPU 92 when the initialization process for the second section SC2 (step S1208) is executed.

When the processing of step S8402 is performed, or when a positive judgment is made in step S8403, the display game number counter 94p is cleared to "0" (step S8404). In this way, when the supply of operating power to the slot machine 10 is started, the value of the display game number counter 94p is cleared to "0" regardless of whether the all-clear processing for the area (step S106) is executed. In addition, when the initialization processing for the second section SC2 (step S1208 or step S8106) is executed, the value of the display game number counter 94p is also cleared to "0".

If a negative judgment is made in step S8403, or if the processing of step S8404 is performed, it is determined whether rotation acceptance commands A and B have been received from the main MPU 72 (step S8405), and if rotation acceptance commands A and B have been received (step S8405: YES), the value of the displayed game number counter 94p is incremented by 1 (step S8406). In this way, when a game is executed, the value of the displayed game number counter 94p is incremented by 1 at the start of the game, regardless of whether the game is a penalty game or not.

Then, the CZ expectation effect processing described below is executed (step S8407). If a negative judgment is made in step S8405, or if the processing of step S8407 is performed, it is determined whether or not a first stop start command has been received from the main MPU 72 (step S8408), and if the first stop start command has been received (step S8408: YES), it is determined whether or not the current game is a game started in the first section SC1 (step S8409).

If the current game is a game started in the second section SC2 (step S8409: NO), it is determined whether the presentation-side penalty target flag 94n is set to "1" (step S8410). As described above, in each processing cycle that occurs at a 2-millisecond cycle, the game count display processing (FIG. 148) is executed after the presentation control processing (FIG. 147). Furthermore, if the presentation control processing (FIG. 147) receives the first stop start command and determines that a penalty event has occurred, the presentation-side penalty target flag 94n is set to "1". Therefore, in a game in which no penalty event occurred, a negative determination is made in step S8410 in each processing cycle of the game count display processing (FIG. 148). On the other hand, in a game in which a penalty event occurred, a positive determination is made in step S8410 in the first processing cycle of the game count display processing (FIG. 148) that is executed after the first stop start command is received.

If a positive judgment is made in step S8410, it is determined whether the normal return flag in the presentation-side RAM 94 is set to "1" (step S8411). If the normal return flag is not set to "1" (step S8411: NO), the value of the displayed game count counter 94p is decremented by 1 (step S8412). In this way, if a game started in the second section SC2 becomes a penalty-target game and the game is not the first game after the supply of operating power to the slot machine 10 has begun, the value of the displayed game count counter 94p is decremented by 1. This prevents the game from being counted as one game in the displayed game count counter 94p.

If a game is started in the first section SC1, a positive determination is made in step S8409, and the process proceeds to step S8413 without executing steps S8410 to S8412, and the process of decrementing the value of the displayed game number counter 94p by 1 (step S8412) is not executed. This allows a game started in the first section SC1 to be counted as one game in the displayed game number counter 94p, regardless of whether the game is a penalty game.

If the presentation-side penalty target flag 94n is set to "1" but the normal return flag is set to "1", the process of subtracting 1 from the value of the displayed game count counter 94p (step S8412) is not executed, and the process proceeds to step S8413. As a result, if the first game after the supply of operating power to the slot machine 10 begins is a penalty target game, the game will not be counted as one game in the displayed game count counter 94p, even if the game started in the second section SC2.

The timing at which the number of games executed indicated by the game execution count image G89 is decremented by 1 based on the occurrence of a penalty event is the same timing at which the monochrome switching process (step S8316) is executed based on the occurrence of a penalty event (specifically, the timing at which the presentation-side MPU 92 receives the first stop start command). This allows the number of games executed indicated by the game execution count image G89 to be decremented by 1 in an inconspicuous manner on the image display device 63.

If a positive judgment is made in step S8409, a negative judgment is made in step S8410, a positive judgment is made in step S8411, or the processing of step S8412 is performed, the normal return flag is cleared to "0" (step S8413). In this way, when a normal return is made and the normal return flag is set to "1", the value of the normal return flag is cleared to "0" based on the fact that the presentation side MPU 92 received the first stop start command in the first game after the normal return, regardless of whether the game became a penalty game.

If a negative judgment is made in step S8408, or if the processing of step S8413 is performed, it is determined whether or not the state is CZ (step S8414), and if the state is not CZ (step S8414: NO), a display game count update process is executed (step S8415). In the display game count update process, display control is performed on the image display device 63 so that a game execution count image G89 corresponding to the value of the display game count counter 94p is displayed. In this way, if the state is not CZ, a game execution count image G89 corresponding to the value of the display game count counter 94p is displayed on the image display device 63.

If the state is CZ (step S8414: YES), a process for setting the number of displayed games to not be displayed is executed (step S8416). In the process for setting the number of displayed games to not be displayed, if the number of games played image G89 is being displayed on the image display device 63, this display is terminated, and if the number of games played image G89 is not being displayed on the image display device 63, this state is continued. In this way, if the state is CZ, the number of games played image G89 is not displayed on the image display device 63.

As already explained, when the initialization process for the second interval SC2 (step S1208 or step S8106) is executed and the first interval SC1 is reached, the first game in the first interval SC1 transitions to the second interval SC2 and the CZ state. Furthermore, the CZ state counter 96h in the work area 96 for in-area processing is set to "3" as the number of games remaining in the CZ state. Furthermore, games started in the CZ state are games started in the second interval SC2. Furthermore, as already explained, if a game started in the second interval becomes a penalty game and is not the first game after the supply of operating power to the slot machine 10 begins, the game is not counted as one game in the displayed game number counter 94p. Therefore, if a game started in the CZ state becomes a penalty game and is not the first game after the supply of operating power to the slot machine 10 begins, the game is not counted as one game in the displayed game number counter 94p.

If the initialization process for the second section SC2 (step S1208 or step S8106) is executed to set the first section SC1, and the first game transitions to the second section SC2 and the CZ state, and the CZ state ends without a win to transition to the base AT state ST4 and without a stop in the supply of operating power, then a game execution count image G89 indicating that the number of games executed is "4" will be displayed at the time the CZ state ends, regardless of the number of penalty games executed in the CZ state.

When a transition to the CZ state occurs, players are interested in the number of games remaining to be played in that CZ state, and are therefore likely to be more interested in the value of the game execution count image G89 than when the player is not in the CZ state. If a penalty game is played in the CZ state and the value of the game execution count image G89 increases, the player may be misled into thinking that the number of games remaining to be played in the CZ state has increased by the number of penalty games played. Furthermore, if the value of the game execution count image G89 is decreased by 1 based on the occurrence of a penalty event while the player is paying attention to the value of the game execution count image G89, the player may notice that the value of the game execution count image G89 has decreased by 1. In contrast, if a penalty event occurs in the CZ state, a process of decrementing the value of the displayed game count counter 94p by 1 (step S8411) is executed, and the game execution count image G89 is not displayed during the CZ state. This reduces the likelihood that the player will notice that the value of the game execution count image G89 has decreased by 1.

Next, the CZ expectation presentation processing executed by the presentation side MPU 92 will be explained with reference to the flowchart in Figure 149. The CZ expectation presentation processing is executed in step S8407 when the presentation side MPU 92 receives rotation acceptance commands A and B during the game count display processing (Figure 148).

First, it determines whether the game state at the start of the current game is normal game state ST1 based on the information set in rotation acceptance command A received from the main MPU 72 (step S8501). If it is normal game state ST1 (step S8501: YES), it determines whether the game state is CZ state at the start of the current game based on the information set in rotation acceptance command B received from the main MPU 72 (step S8502).

If a negative judgment is made in step S8502, it is determined whether the value of the display game number counter 94p is within the first target range ("97" to "101"), the second target range ("197" to "201"), or the third target range ("297" to "301") of the CZ expectation effect (step S8503). If a positive judgment is made in step S8503, a CZ expectation effect execution process is executed (step S8504). In the CZ expectation effect execution process, display control is performed on the image display device 63 so that the CZ expectation image G91 is displayed. As already explained, if the value of the display game number counter 94p is within the first target range ("97" to "101") of the CZ expectation effect, the wording of the CZ expectation image G91 will read "High expectation of CZ transition on the 101st game." Furthermore, when the value of the display game number counter 94p is in the second target range of the CZ expectation effect ("197" to "201"), the wording of the CZ expectation image G91 will read "High expectation of CZ transition on the 201st game," and when the value of the display game number counter 94p is in the third target range of the CZ expectation effect ("297" to "301"), the wording of the CZ expectation image G91 will read "High expectation of CZ transition on the 301st game."

If a negative judgment is made in step S8501, a positive judgment is made in step S8502, or a negative judgment is made in step S8503, and the CZ expectation performance is currently being executed (step S8505: YES), CZ expectation performance end processing is executed (step S8506). In the CZ expectation performance end processing, display control is performed on the image display device 63 so that the display of the CZ expectation image G91 is ended.

Next, the updating of the value of the display game number counter 94p will be described with reference to the time chart in Figure 150. Figure 150(a) shows the timing when the value of the display game number counter 94p in the presentation-side RAM 94 is incremented by 1, Figure 150(b) shows the timing when the value of the display game number counter 94p is decremented by 1, Figure 150(c) shows the timing when the monochrome switching process (step S8316) is executed, Figure 150(d) shows the timing when a penalty event occurs, Figure 150(e) shows the period in the second section SC2, Figure 150(f) shows the period in the CB internal state, Figure 150(g) shows the period in the normal gaming state ST1, Figure 150(h) shows the period when operating power is being supplied to the slot machine 10, Figure 150(i) shows the timing when the all-clear process for the area (step S106) is executed, and Figure 150(j) shows the period when a game is being played.

First, we will explain how the displayed game number counter 94p is updated when a game started in the second section SC2 becomes a penalty game and the game is not the first game after the supply of operating power to the slot machine 10 begins.

When a game starts at timing t1 as shown in Figure 150(j), the value of the displayed game count counter 94p is incremented by 1 as shown in Figure 150(a). Then, when a penalty event occurs at timing t2 as shown in Figure 150(d), a monochrome switching process is executed as shown in Figure 150(c), the image display device 63 switches to monochrome display, and the value of the displayed game count counter 94p is decremented by 1 as shown in Figure 150(b). This allows the number of games played, indicated by the game count image G89, to be decremented by 1 in an unobtrusive manner.

Next, we will explain how the display game number counter 94p is updated when the first game after the initialization process for the second section SC2 (step S1208 or step S8106) is a penalty game.

At time t3 when the game ends, the second section SC2 ends and the first section SC1 begins, as shown in Figure 150(e), and the normal game state ST1 begins, as shown in Figure 150(g). As shown in Figure 150(f), the internal state of the CB is maintained even when the initialization process for the second section SC2 (step S1208) is executed. Then, at time t4, when the first game begins after the initialization process for the second section SC2 (step S1208 or step S8106) is executed, the system transitions to the second section SC2, as shown in Figure 150(e), based on whether any index value IV has been won. Also, at time t4, the value of the displayed game count counter 94p is incremented by 1, as shown in Figure 150(a).

After that, at timing t5, when a penalty event occurs as shown in Figure 150(d), monochrome switching processing is executed as shown in Figure 150(c), and the image display device 63 switches to monochrome display. Because the current game is a game that started in the first section SC1, the value of the displayed game number counter 94p is not decremented by 1 as shown in Figure 150(b). In this way, if the first game after the initialization processing for the second section SC2 (step S1208 or step S8106) is executed is a penalty target game, the penalty target game will be counted as one game in the displayed game number counter 94p.

Next, we will explain how the displayed game number counter 94p is updated when the first game after the all-clear process for the area (step S106) is executed is a penalty game.

At timing t6, the supply of operating power to the slot machine 10 begins, as shown in Figure 150(h). Thereafter, at timing t7, the all-clear process for the area (step S106) is executed, as shown in Figure 150(i), and the second section SC2 ends and the first section SC1 begins, as shown in Figure 150(e). Also, at timing t7, the CB internal state ends and the non-CB internal state begins, as shown in Figure 150(f) and Figure 150(g). Also, at timing t7, the value of the displayed game count counter 94p is cleared to "0."

Then, at timing t8, when the first game begins after the all-clear process for the area (step S106) is executed, as shown in Figure 150(j), the value of the displayed game number counter 94p is incremented by 1 as shown in Figure 150(a), and the process transitions to the second section SC2 as shown in Figure 150(e).

After that, at timing t9, when a penalty event occurs as shown in Figure 150(d), a monochrome switching process is executed as shown in Figure 150(c), and the image display device 63 switches to monochrome display. Because the current game is a game that started in the first section SC1, the value of the displayed game number counter 94p is not decremented by 1 as shown in Figure 150(b). In this way, if the first game after the all-clear process for the area (step S106) is executed is a penalty game, the penalty game will be counted as one game in the displayed game number counter 94p.

Next, we will explain how the displayed game number counter 94p is updated when a normal return occurs when the supply of operating power to the slot machine 10 begins and the first game after the normal return is a penalty game.

At time t10, the supply of operating power to the slot machine 10 begins, as shown in Figure 150(h), and a return to normal mode is performed. At time t10, the second section SC2 continues as shown in Figure 150(e), the CB internal state continues as shown in Figure 150(f), and the normal game state ST1 is maintained as shown in Figure 150(g). Thereafter, at time t11, when the first game after the return to normal mode begins, the value of the displayed game number counter 94p is incremented by 1 as shown in Figure 150(a).

After that, at timing t12, when a penalty event occurs as shown in Figure 150(d), a monochrome switching process is executed as shown in Figure 150(c), and the image display device 63 switches to monochrome display. Because the current game is the first game after the normal return, the value of the displayed game number counter 94p is not decremented by 1 as shown in Figure 150(b). In this way, if the first game after the normal return is executed is a penalty game, the penalty game will be counted as one game in the displayed game number counter 94p.

Next, the display of the game execution count image G89 on the image display device 63 will be described with reference to the time chart in Figure 151. Figure 151(a) shows the period during which the game execution count image G89 is displayed on the image display device 63, Figure 151(b) shows the timing when the value of the display game count counter 94p in the presentation side RAM 94 is incremented by 1, Figure 151(c) shows the timing when the value of the display game count counter 94p is decremented by 1, Figure 151(d) shows the timing when the value of the release game count counter 96g in the main side RAM 74 is decremented by 1, Figure 151(e) shows the timing when a penalty event occurs, Figure 151(f) shows the period in the second section SC2, Figure 151(g) shows the period in the CZ state, Figure 151(h) shows the period in the normal game state ST1, and Figure 151(i) shows the period during which a game is executed.

At timing t1, as shown in Figure 151(i), the game ends and the initialization process for the second section SC2 (step S1208 or step S8106) is executed, and as shown in Figure 151(f), the second section SC2 ends and the first section SC1 begins, and the game enters the normal game state ST1 as shown in Figure 151(h).

After that, at timing t2, as shown in FIG. 151(i), when the first game begins after the initialization process for the second section SC2 (step S1208 or step S8106) is executed, the second section SC2 is entered as shown in FIG. 151(f) based on either the index value IV and the result of a win. Also, at timing t2, the CZ state is entered as shown in FIG. 151(g). Furthermore, at timing t2, the value of the displayed game count counter 94p is incremented by 1 to become "1" as shown in FIG. 151(b). Also, at timing t2, the display of the game execution count image G89 ends as shown in FIG. 151(a), and the image display device 63 no longer displays the game execution count image G89.

Then, at timing t3, the game ends as shown in Figure 151(i). Because this game was started in the first section SC1, even when this game ends, the value of the release game number counter 96g is not decremented by 1 as shown in Figure 151(d). As a result, the value of the display game number counter 94p becomes "1" greater than the number of games played based on the value of the release game number counter 96g.

After that, when the game starts at timing t4 in the CZ state as shown in Figure 151(i), the value of the displayed game number counter 94p is incremented by 1 to become "2" as shown in Figure 151(b). After that, when a penalty event occurs at timing t5 as shown in Figure 151(e), the value of the displayed game number counter 94p is decremented by 1 as shown in Figure 151(c). As a result, the penalty target game is no longer counted as one game in the displayed game number counter 94p.

After that, at timing t6, when the final game in the CZ state begins as shown in Figure 151(i), the value of the displayed game count counter 94p is incremented by 1 to become "4" as shown in Figure 151(b). After that, at timing t7, when the game ends as shown in Figure 151(i), the value of the release game count counter 96g is decremented by 1 as shown in Figure 151(d). Also, at timing t7, when the CZ state ends as shown in Figure 151(g), the display of the game execution count image G89 begins on the image display device 63 as shown in Figure 151(a). The number of games executed displayed in the game execution count image G89 is "4".

The present embodiment described above provides the following excellent effects:

In a configuration in which the value of the display game number counter 94p is incremented by 1 upon the presentation side MPU 92 receiving rotation acceptance commands A and B, if a game started in the second section SC2 is a penalty game and the game is not the first game after the supply of operating power to the slot machine 10 has begun, a process is executed (step S8412) in which the value of the display game number counter 94p is decremented by 1 when the presentation side MPU 92 receives the first stop start command for that game. This allows the game to be counted as not one game in the display game number counter 94p.

When a game starts in the first section SC1, that game is counted as one game in the displayed game number counter 94p, regardless of whether that game is a penalty game. This ensures that the update mode of the displayed game number counter 94p does not change between when a penalty event occurs in a game started in the first section SC1 and when a penalty event does not occur in that game.

A game in which a penalty event occurs is set as a penalty game. This makes it easy for players to intuitively understand the correspondence between the occurrence of a penalty event and the setting of a penalty game. Furthermore, the game following the game in which a penalty event occurred is executed as a non-penalty game. This prevents the effects of a penalty event from continuing for a long period of time across multiple games if a player unintentionally causes a penalty event.

In normal gaming state ST1, the AT lottery process (step S8204) is executed after the first reel 32L, 32M, and 32R come to a stop, and the AT lottery process is not executed if a penalty event occurs. This simplifies the processing configuration for the process corresponding to a winning entry to the base AT state ST4, compared to a configuration in which processing is required to invalidate a winning entry to the base AT state ST4 based on the occurrence of a penalty event after a winning entry to the base AT state ST4 has occurred in the AT lottery process.

Seventeenth Embodiment
In this embodiment, the processing configuration for updating the number of times the game has been played, which is displayed on the image display device 63, differs from that of the sixteenth embodiment. The following describes the configuration that differs from the sixteenth embodiment. Note that a description of the configuration that is the same as that of the sixteenth embodiment will basically be omitted.

Figure 152(a) is an explanatory diagram illustrating the configuration of the presentation-side RAM 94 in this embodiment. As shown in Figure 152(a), the presentation-side RAM 94 is provided with an addition avoidance flag 94q. The addition avoidance flag 94q is a flag that allows the presentation-side MPU 92 to determine that the process of adding 1 to the value of the display game number counter 94p at the start of a game (step S8607, described below) should be avoided.

As already explained in the 16th embodiment above, when a penalty event occurs in a game, that game becomes a penalty target game. In this embodiment, if a penalty target game is not counted as one game in the display game number counter 94p, a process of incrementing the value of the display game number counter 94p by 1 is executed for that penalty target game (step S8607), and the increment avoidance flag 94q is set to "1". Then, at the start of the game following that penalty target game, the process of incrementing the value of the display game number counter 94p by 1 is avoided based on the increment avoidance flag 94q being set to "1". As a result, that penalty target game is not counted as one game in the display game number counter 94p.

Next, the game count display process executed by the presentation-side MPU 92 will be described with reference to the flowchart in Figure 152 (b). The game count display process is repeatedly executed at a relatively short cycle (e.g., 2 milliseconds) in each game state. As with the 16th embodiment above, in each processing iteration of the presentation control process (Figure 147) and the game count display process (Figure 152 (b)), which occur at a cycle of 2 milliseconds, the game count display process (Figure 152 (b)) is executed after the presentation control process (Figure 147) is executed.

In steps S8601 to S8604, the same processing as steps S8401 to S8404 of the game count display processing (FIG. 148) in the 16th embodiment is executed. Specifically, if a power restoration command is received from the main MPU 72 (step S8601: YES), the normal return flag provided in the presentation RAM 94 is set to "1" (step S8602). This allows the presentation MPU 92 to determine that a normal return has occurred without the in-area all clear processing (step S106) being executed when the supply of operating power to the slot machine 10 begins. If a negative determination is made in step S8601, it is determined whether a setting change start command or a second section initialization command has been received from the main MPU 72 (step S8603).

When step S8602 is performed, or when a positive judgment is made in step S8603, the display game number counter 94p is cleared to "0" (step S8604). In this way, when the supply of operating power to the slot machine 10 is started, the value of the display game number counter 94p is cleared to "0" regardless of whether the all-clear process for the area (step S106) is executed. In addition, when the initialization process for the second section SC2 (step S1208 or step S8106) is executed, the value of the display game number counter 94p is also cleared to "0."

If a negative judgment is made in step S8603, or if the processing of step S8604 is performed, it is determined whether rotation acceptance commands A and B have been received from the main MPU 72 (step S8605). If rotation acceptance commands A and B have been received (step S8605: YES), the value of the displayed game number counter 94p is incremented by 1 (step S8607), provided that the addition avoidance flag 94q is not set to "1" (step S8606: NO). In this way, when a game is executed, the value of the displayed game number counter 94p is incremented by 1 at the start of the game, regardless of whether the game is a penalty game, provided that the addition avoidance flag 94q is not set to "1".

If the addition avoidance flag 94q is set to "1" (step S8606: YES), the process of incrementing the value of the display game number counter 94p by 1 (step S8607) is not executed, and the addition avoidance flag 94q is cleared to "0" (step S8608). This prevents the process of incrementing the value of the display game number counter 94p by 1 (step S8607) from being executed in the game following the penalty target game, and the display game number counter 94p does not count the penalty target game as one game.

When step S8607 is processed or when step S8608 is processed, the CZ expectation presentation process is executed (step S8609), similar to step S8407 of the game count display process (Figure 148) in the 16th embodiment. The contents of the CZ expectation presentation process are as already explained in the 16th embodiment with reference to the flowchart in Figure 149.

If a negative judgment is made in step S8605 or if the processing of step S8609 is performed, it is determined whether or not a first stop start command has been received from the main MPU 72 (step S8610). If the first stop start command has been received (step S8610: YES), it is determined whether or not the current game started in the first section SC1 (step S8611). If the current game started in the second section SC2 (step S8611: NO), it is determined whether or not the presentation-side penalty target flag 94n is set to "1" (step S8612). As described above, in each processing cycle that occurs at a 2-millisecond cycle, the game count display processing (Figure 152(b)) is executed after the presentation control processing (Figure 147). Furthermore, if the presentation control processing (Figure 147) receives the first stop start command and determines that a penalty event has occurred, the presentation-side penalty target flag 94n is set to "1." Therefore, in a game in which no penalty event occurred, a negative judgment is made in step S8612 in each processing iteration of the game count display process (FIG. 152(b)). On the other hand, in a game in which a penalty event occurred, a positive judgment is made in step S8612 in the processing iteration of the game count display process (FIG. 152(b)) that is first executed after the first stop start command is received.

If a positive determination is made in step S8612, it is determined whether the normal return flag in the presentation-side RAM 94 is set to "1" (step S8613). If the normal return flag is not set to "1" (step S8613: NO), the addition avoidance flag 94q is set to "1" (step S8614). This avoids the process of adding 1 to the value of the displayed game number counter 94p at the start of the game to be played next after the current penalty game (step S8607), and prevents the current penalty game from being counted as one game in the displayed game number counter 94p.

By avoiding the process of incrementing the value of the display game number counter 94p by 1 at the start of the game following a penalty game (step S8607), the penalty game is not counted as one game in the display game number counter 94p. This allows the penalty game to be counted as one game in the game execution count image G89 in an inconspicuous manner on the image display device 63.

If a game started in the second section SC2 is a penalty game and the game is not the first game after the supply of operating power to the slot machine 10 begins, the addition avoidance flag 94q is set to "1." This prevents the game from being counted as one game in the displayed game number counter 94p.

If the play zone at the start of the game is the first zone (step S8611: NO), the process proceeds to step S8615 without executing steps S8612 to S8614. In this way, when a game starts in the first zone SC1, the addition avoidance flag 94q is not set to "1" regardless of whether the game is a penalty game. This allows a game started in the first zone SC1 to be counted as one game in the displayed game number counter 94p regardless of whether the game is a penalty game.

If the normal return flag is set to "1" (step S8613: YES), the process proceeds to step S8615 without executing step S8614. In this way, when the first game is played after a normal return, the addition avoidance flag 94q is not set to "1", regardless of whether that game is a penalty game. This allows the first game played after a normal return to be counted as one game in the displayed game number counter 94p, regardless of whether that game is a penalty game.

If a positive judgment is made in step S8611, a negative judgment is made in step S8612, a positive judgment is made in step S8613, or the processing of step S8614 is performed, the normal return flag is cleared to "0" (step S8615). In this way, when a normal return is made and the normal return flag is set to "1", the value of the normal return flag is cleared to "0" based on the fact that the presentation side MPU 92 received the first stop start command in the first game after the normal return, regardless of whether the game became a penalty game.

If a negative judgment is made in step S8610, or if the processing of step S8615 is performed, in steps S8616 to S8618, processing similar to steps S8414 to S8416 of the game count display processing (FIG. 148) in the 16th embodiment described above is executed. Specifically, if the CZ state is not established (step S8616: NO), a displayed game count update processing is executed (step S8617). In the displayed game count update processing, display control is performed on the image display device 63 so that a game execution count image G89 corresponding to the value of the displayed game count counter 94p is displayed. In this way, if the state is not established in the CZ state, a game execution count image G89 corresponding to the value of the displayed game count counter 94p is displayed on the image display device 63.

If the state is CZ (step S8616: YES), a process for setting the number of displayed games to not be displayed is executed (step S8618). In the process for setting the number of displayed games to not be displayed, if the number of games played image G89 is being displayed on the image display device 63, this display is terminated, and if the number of games played image G89 is not being displayed on the image display device 63, this state is continued. In this way, if the state is CZ, the number of games played image G89 is not displayed on the image display device 63.

As already explained, when the initialization process for the second section SC2 (step S1208 or step S8106) is executed to set the first section SC1, the first game in the first section SC1 transitions to the second section SC2 and the CZ state, and three games are played in the CZ state. Also, as already explained, if a penalty game is played in the CZ state, the penalty game is not counted as one game in the display game number counter 94p. Therefore, if the initialization process for the second section SC2 (step S1208 or step S8106) is executed to set the first section SC1, the first game transitions to the second section SC2 and the CZ state, and the CZ state ends without an interruption in the supply of operating power or without a win to transition to the base AT state ST4, the game execution count image G89 indicating that the number of games played is "4" is displayed at the time the CZ state ends, regardless of the number of penalty games played in the CZ state.

As described above, in a configuration in which the value of the display game number counter 94p is incremented by 1 upon the presentation side MPU 92 receiving rotation acceptance commands A and B, if a game started in the second section SC2 is a penalty-subject game and that game is not the first game after returning to normal, when the presentation side MPU 92 receives rotation acceptance commands A and B in the game following that game, the process of incrementing the value of the display game number counter 94p by 1 (step S8607) is avoided. This allows the game to be counted as not one game in the display game number counter 94p.

<Eighteenth embodiment>
An embodiment of a pachinko gaming machine (hereinafter referred to as "pachinko machine"), which is one type of gaming machine, will be described below with reference to the drawings. Figure 153 is a perspective view of a pachinko machine 160 and a management unit 170 provided on the side of the pachinko machine 160, and Figure 154 is a perspective view showing the main components of the pachinko machine 160 in an exploded form. For convenience, the components within the gaming area are omitted from Figure 154.

As shown in Figure 153, the pachinko machine 160 has an outer frame 161 that forms the outer shell of the pachinko machine 160, and a gaming machine main body 162 that is attached to the outer frame 161 so that it can rotate forward. The outer frame 161 is made up of wooden boards connected at all four sides, forming a rectangular frame. The pachinko machine 160 is installed in an amusement hall by attaching and fixing the outer frame 161 to the island equipment.

As shown in Figure 154, the gaming machine main body 162 comprises an inner frame 163, a front door frame 164 located in front of the inner frame 163, and a rear pack unit 165 located behind the inner frame 163. The inner frame 163 of the gaming machine main body 162 is rotatably supported relative to the outer frame 161. In detail, when viewed from the front, the inner frame 163 can be rotated forward with the left side as the base end of rotation and the right side as the tip end of rotation.

A front door frame 164 is rotatably supported on the inner frame 163, and can be rotated forward with the left side as the base end and the right side as the tip end when viewed from the front. A rear pack unit 165 is also rotatably supported on the inner frame 163, and can be rotated rearward with the left side as the base end and the right side as the tip end when viewed from the front.

The gaming machine main body 162 is equipped with a locking device at its pivot tip, which functions to lock the gaming machine main body 162 so that it cannot be opened relative to the outer frame 161, and also to lock the front door frame 164 so that it cannot be opened relative to the inner frame 163. Each of these locked states can be released by using an unlocking key to unlock the cylinder lock 167, which is exposed on the front of the pachinko machine 160.

Next, we will explain the configuration of the front side of the gaming machine main body 162.

The inner frame 163 is primarily composed of a resin base 181 whose outer shape is approximately the same as that of the outer frame 161. A roughly oval window hole 183 is formed in the center of the resin base 181. A game board 184 is detachably attached to the resin base 181. The game board 184 is made of plywood, and a play area PA formed on the front of the game board 184 is exposed to the front side of the inner frame 163 through the window hole 183 in the resin base 181.

The configuration of the game board 184 will be explained based on Figure 155. Figure 155 is a front view of the game board 184.

An inner rail portion 185 and an outer rail portion 186 are attached to the game board 184 so as to define part of the outer edge of the play area PA, and these inner rail portion 185 and outer rail portion 186 form a guide rail that serves as a guide means. Game balls launched from a game ball launching mechanism 187 (see Figure 154) attached below the window hole 183 in the resin base 181 are guided to the top of the play area PA by the guide rail.

The game ball launching mechanism 187 includes a launching rail 187a extending toward the guide rail, a ball feeding device 187b that supplies game balls stored in the upper tray 206a (described below) onto the launching rail 187a, and a solenoid 187c, which is an electric actuator that launches the game balls supplied onto the launching rail 187a toward the guide rail. The solenoid 187c is driven and controlled by rotating the launching operation device (or launch handle) 188 provided on the front door frame 164, and the game balls are launched.

The game board 184 has multiple large and small openings that penetrate in the front-to-rear direction. Each opening is equipped with a general winning opening 191, a special electric winning device 192, a first operating opening 193, a second operating opening 194, a through gate 195, a variable display unit 196, a special symbol unit 197, and a general symbol unit 198.

Even if a ball enters through gate 195, no game balls will be paid out. On the other hand, if a ball enters general prize opening 191, special electric prize opening 192, first operating opening 193, or second operating opening 194, a predetermined number of game balls will be paid out. Specifically, if a ball enters first operating opening 193 or second operating opening 194, three prize balls will be paid out; if a ball enters general prize opening 191, ten prize balls will be paid out; and if a ball enters special electric prize opening 192, fifteen prize balls will be paid out.

In addition, an outlet 184a is provided at the bottom of the game board 184, and game balls that do not enter the various winning holes are discharged from the game area PA through the outlet 184a. The game board 184 is also equipped with numerous nails 184b to appropriately distribute and adjust the direction in which the game balls fall, and various components such as windmills are also arranged.

Here, "entering" refers to a game ball passing through a specified opening, and includes not only the case where the game ball is discharged from the game area PA after passing through the opening, but also the case where the game ball continues to flow down the game area PA without being discharged after passing through the opening. However, in the following explanation, to clearly distinguish from game balls entering the outlet 184a, game balls entering the general winning opening 191, special electric winning device 192, first operating opening 193, second operating opening 194, and through gate 195 will also be referred to as "winning."

The first actuation port 193 and the second actuation port 194 are unitized as an actuation port device and installed on the game board 184. Both the first actuation port 193 and the second actuation port 194 open upward. Furthermore, both actuation ports 193, 194 are aligned vertically with the first actuation port 193 facing upward.

A stage section 196b is provided in the lower frame section 196a, which is the portion below the symbol display device 199 of the variable display unit 196, extending horizontally above the first operating port 193. A warp passage entrance section 196d is formed in the left frame section 196c, which is the portion to the left of the symbol display device 199 of the variable display unit 196, allowing game balls flowing down the left area of the variable display unit 196 to be guided to the stage section 196b. The horizontal center section of the stage section 196b is located vertically above the first operating port 193, and a lead-out section 196e is formed in this center section to lead game balls under their own weight to below the stage section 196b. In this case, game balls that are guided to the stage portion 196b and guided below the stage portion 196b from areas other than the lead-out portion 196e are unlikely to enter the first operating port 193, but game balls that are guided below the stage portion 196b from the lead-out portion 196e have a high probability of entering the first operating port 193.

The first actuation opening 193 is open facing upward, and is not provided with any opening or closing members to prevent game balls from entering the first actuation opening 193. Furthermore, when game balls are launched in the same manner, the probability of winning at the first actuation opening 193 is constant regardless of the game status. In other words, the first actuation opening 193 is always capable of receiving game balls that flow down the game area PA toward the first actuation opening 193.

The second operating port 194 is provided with a normal power device 194a, which acts as a guide piece consisting of a pair of movable pieces on the left and right. When the normal power device 194a is in a closed state, the game ball cannot enter the second operating port 194, but when the normal power device 194a is in an open state, the game ball can enter the second operating port 194.

A through gate 195 is provided upstream of the second operating port 194 in the direction in which the game ball flows down. The through gate 195 has a through hole (not shown) that runs vertically, and game balls that enter the through gate 195 flow down the game area PA after winning. This makes it possible for game balls that enter the through gate 195 to enter the second operating port 194.

Based on a win at the through gate 195, the normal power device 194a of the second operating port 194 is switched from a closed state to an open state. Specifically, a win at the through gate 195 triggers a normal power win/loss determination process, and a changing image is displayed on the normal power display section 198a of the normal power unit 198, which is located in the lower right corner of the play area PA, an area where the game ball does not pass through. Then, if the result of the normal power win/loss determination process is a win for the electric power release, the stop result corresponding to that result is displayed, and the changing display on the normal power display section 198a ends, the system transitions to the normal power release state. In the normal power release state, the normal power device 194a is opened in a predetermined manner. The normal power display section 198a is composed of a segment display device consisting of multiple segment light-emitting elements arranged in a predetermined manner.

In the normal map unit 198, a normal map reserve display section 198b is provided adjacent to the normal map display section 198a. Up to four game balls that enter the through gate 195 are reserved, and the number of reserved balls is displayed by lighting up the normal map reserve display section 198b.

A winning/losing determination process is triggered by a winning entry into the first actuation port 193 or the second actuation port 194. The results of the winning/losing determination process are then clearly displayed through the display effects on the special symbol unit 197 and the symbol display device 199 of the variable display unit 196.

The special symbol unit 197 is provided with a first special symbol display section 197a and a second special symbol display section 197b. In the first special symbol display section 197a, a win/loss determination process is performed in response to a winning/loss determination triggered by a winning/loss win in the first operating port 193, thereby displaying a changing image. A stop result corresponding to the result of the win/loss determination process is then displayed. In this case, the results of the win/loss determination process include a jackpot result, a time-saving result, and a loss result, which will be described later. However, the content of the stop result in the first special symbol display section 197a differs for each of the jackpot result, time-saving result, and loss result. The display of the stop result in the first special symbol display section 197a is maintained until the next game round begins and a new changing image display is started in the first special symbol display section 197a. In addition, in the second special symbol display section 197b, a win/loss determination process is performed in response to a winning/loss win in the second operating port 194, thereby displaying a changing image. A stop result corresponding to the result of the win/loss determination process is then displayed. In this case, the results of the win/loss determination process include a jackpot result, a time-saving result, and a loss result, which will be described later, but the contents of the stop results on the second special symbol display unit 197b are different for each of the jackpot result, time-saving result, and loss result. The display of the stop results on the second special symbol display unit 197b is maintained until the next game round begins and the second special symbol display unit 197b begins displaying a new pattern. Note that the first special symbol display unit 197a and the second special symbol display unit 197b are configured as segment displays consisting of multiple segment light-emitting elements arranged in a predetermined pattern.

In the special symbol unit 197, a first special symbol reserve display unit 197c and a second special symbol reserve display unit 197d are provided adjacent to the first special symbol display unit 197a and the second special symbol display unit 197b. A maximum of four game balls that enter the first operating port 193 can be reserved, and the number of reserved balls is displayed by lighting up the first special symbol reserve display unit 197c. Furthermore, a maximum of four game balls that enter the second operating port 194 can be reserved, and the number of reserved balls is displayed by lighting up the second special symbol reserve display unit 197d.

The pattern display device 199 is configured as a liquid crystal display device equipped with a liquid crystal display. When a pattern change is displayed in the first special pattern display unit 197a based on a win in the first operating port 193, the pattern display device 199 displays a pattern change accordingly. When a pattern change is displayed in the second special pattern display unit 197b based on a win in the second operating port 194, the pattern display device 199 displays a pattern change accordingly. In addition to display effects triggered by a win in the first operating port 193 or the second operating port 194, the pattern display device 199 also displays effects during the opening and closing execution mode, described below, which is entered after a jackpot result is achieved.

Based on a win in either of the operating ports 193, 194, a display is initiated on either of the special symbol display units 197a, 197b and the symbol display device 199, and a stop result corresponding to the result of the win/loss determination process is displayed, ending when the special symbol determination process in the main control device 211, described below, is completed, which corresponds to one game session.

In this pachinko machine 160, a win/loss determination process is executed based on whether a ball has entered the actuation ports 193, 194, and if the result of the win/loss determination process indicates a jackpot, the machine transitions to the open/close execution mode. In the open/close execution mode, the opening and closing control of the special electric winning device 192 is executed, and if a ball enters the open special electric winning device 192, a payout of game balls is executed. Specifically, in the open/close execution mode, a predetermined number of rounds of play are executed. A round of play is a game that continues until one of the following conditions is met: a predetermined open duration has elapsed, or a predetermined maximum number of game balls have entered the special electric winning device 192. The maximum number of rounds of play varies depending on the type of jackpot result that triggered the transition.

The win/loss lottery mode for the win/loss determination process includes a high-probability mode and a low-probability mode, so that the probability of a jackpot result that triggers a transition to the open/close execution mode is relatively high or low. Furthermore, this pachinko machine 160 is configured with multiple support modes that differ in the manner in which the normal power feature 194a of the second operating port 194 opens. Specifically, the support modes include a high-frequency support mode and a low-frequency support mode, so that the frequency with which the normal power feature 194a opens per unit time is relatively high or low when compared with a situation in which game balls are continuously launched into the game area PA in the same manner. The game state outside the open/close execution mode differs depending on the combination of the win/loss lottery mode and the support mode. The game states include a normal game state that is a low-probability mode and low-frequency support mode, a high-probability state that is a high-probability mode and high-frequency support mode, and a time-saving state that is a low-probability mode and high-frequency support mode. In the high probability and time-saving modes, the average time required to play one round is shorter than in the normal mode.

The first actuation port 193 and the second actuation port 194 are both located in the lower area PAU, which is the area below the variable display unit 196 in the game area PA. The first actuation port 193 and the second actuation port 194 are unitized as an actuation port device, arranged vertically side by side with the first actuation port 193 at the top and the second actuation port 194 at the bottom. The normal electric device 194a of the second actuation port 194 can be controlled to an open state upon winning through the through gate 195, which is located in the left area PAL, which is the area to the left of the variable display unit 196 in the game area PA. Game balls flowing down the left area PAL are guided to the lower area PAU, and game balls guided to the lower area PAU can be guided to the area where the first actuation port 193 and the second actuation port 194 are located. Therefore, when a firing operation is performed with the aim of winning the first actuation port 193, not only is a winning opportunity possible for the first actuation port 193, but a winning opportunity possible for the second actuation port 194, and when a firing operation is performed with the aim of winning the second actuation port 194, not only is a winning opportunity possible for the second actuation port 194, but a winning opportunity possible for the first actuation port 193.

When the game is in the normal game state, the support mode becomes the low frequency support mode as described above, making it less likely that a win will occur in the second actuation port 194, and more likely that a win will occur in the first actuation port 193 than in the second actuation port 194. Therefore, in the normal game state, the target for execution of a game turn is basically the first special symbol display unit 197a, and if a win accidentally occurs in the second actuation port 194, the target for execution of a game turn will be the second special symbol display unit 197b.

On the other hand, when the game state is a high probability state or a time-saving state, the support mode becomes high-frequency support mode as described above, making it easier for a ball to land in the second actuation port 194. In this case, a ball is more likely to land in the second actuation port 194 than in the first actuation port 193. However, as already explained, if a firing operation is performed with the aim of landing in the second actuation port 194, a ball may land in the first actuation port 193, and since a game ball guided to the outlet portion 196e of the stage portion 196b has a high probability of landing in the first actuation port 193, even in the high-frequency support mode, a ball will land in the first actuation port 193 with the same frequency as in the low-frequency support mode.

The pattern display device 199 executes a game round performance in a manner that corresponds to the pattern of the special symbol display units 197a and 197b that are the target of the game round. When a game round is executed, the pattern display device 199 uses most of its display surface to display changing symbols.

The pending information acquired in response to a winning entry into the first operating port 193 (hereinafter referred to as the first pending information) triggers the execution of a game round in the first special symbol display unit 197a, and the pending information acquired in response to a winning entry into the second operating port 194 (hereinafter referred to as the second pending information) triggers the execution of a game round in the second special symbol display unit 197b. The pending information is information that triggers the execution of the win/loss determination process in the main control unit 211, and is information that triggers the execution of a game round. A maximum of four first pending information items can be stored and reserved, and a maximum of four second pending information items can also be stored and reserved.

Returning to the explanation of the game board 184 (see Figure 155), if the result of the hit/miss determination process is a jackpot result, the system will transition to the open/close execution mode as already explained. In the open/close execution mode, the opening and closing control of the special electric winning device 192 is executed. The special electric winning device 192 is equipped with a large winning opening (not shown) that leads to the back side of the game board 184, as well as an opening/closing door 192a that opens and closes the large winning opening. The opening/closing door 192a is positioned in either a closed state or an open state. Specifically, the opening/closing door 192a is normally in a closed state that prevents game balls from winning, and is configured to switch to an open state that allows game balls to win if a jackpot result is selected in the hit/miss determination process. Note that while a win is not impossible in the closed state, it may also be configured to make it more difficult for a win to occur than in the open state. Furthermore, in the open/close execution mode, a display effect corresponding to the open/close execution mode is executed by the pattern display device 199.

A front door frame 164 is provided to cover the entire front side of the inner frame 163, which is formed by attaching the game board 184 configured as described above to the resin base 181. As shown in Figure 153, the front door frame 164 has a window portion 201 formed therein, which allows almost the entire playing area PA to be viewed from the front. The window portion 201 is approximately oval in shape, and has a window panel 202 fitted into it. The window panel 202 is made of colorless, transparent glass.

A display light-emitting unit 204 is provided above the window 201. A pair of left and right speakers 205 are also provided, which output sound effects according to the game status. An upper bulge 206 and a lower bulge 207, which bulge toward the front, are arranged side by side below the window 201. An upper tray 206a with an upward opening is provided inside the upper bulge 206, and a lower tray 207a with a similar upward opening is provided inside the lower bulge 207. The upper tray 206a temporarily stores game balls dispensed from the payout device 216 (see Figure 156), which will be described later, and guides them in a row toward the game ball launching mechanism 187. The lower tray 207a also stores surplus game balls in the upper tray 206a.

Next, we will explain the configuration on the back side of the gaming machine main body 162.

As shown in Figure 154, a main control device 211, which is responsible for the main control of the game, is mounted on the back of the inner frame 163 (specifically, the game board 184). The main control device 211 consists of a main control board 221 (see Figure 156) housed in a board box.

The rear pack unit 165 is installed to cover the rear side of the inner frame 163, including the main control device 211. The rear pack unit 165 is equipped with a rear pack 212 made of transparent synthetic resin, to which a dispensing mechanism 213 and a control device assembly unit 214 are attached.

The payout mechanism 213 includes a tank 215 to which game balls are continuously replenished from the island equipment in the gaming hall, and a payout device 216 for paying out the game balls stored in the tank 215. The game balls paid out from the payout device 216 are discharged into the upper tray 206a or the lower tray 207a through a payout passage provided downstream of the payout device 216. The payout mechanism 213 is supplied with a main power supply of, for example, 24 volts AC, and is equipped with a back pack board having a power switch for turning the power on and off.

The control device aggregate unit 214 is equipped with a payout control device 217 that has the function of controlling the payout device 216, and a power supply/launch control device 218 that generates and outputs the specified power required by various control devices, etc., and controls the launch of game balls in response to the player's operation of the launch operation device 188. The payout control device 217 and power supply/launch control device 218 are stacked one behind the other, with the payout control device 217 located at the rear of the pachinko machine 160.

As shown in Figure 153, the management unit 170 is provided on the side of the outer frame 161 of the pachinko machine 160. A cash insertion slot 171, through which banknotes are inserted as cash, is provided at approximately the center in the vertical direction on the front of the management unit 170, and a media insertion/ejection slot 172, through which storage media M are inserted and ejected, is provided below the cash insertion slot 171. Also provided below the media insertion/ejection slot 172 are a ball loan button 173, which is operated to receive loaned game balls, and a media return button 174, which is operated to eject the storage media M from the media insertion/ejection slot 172. When banknotes are inserted into the cash insertion slot 171, the management unit 170 writes balance information corresponding to the amount of the inserted banknote into the storage media M. A balance display unit 175 is provided on the upper front of the management unit 170. The balance display unit 175 is composed of three 7-segment LEDs that display the balance information of the storage media M read by the management unit 170. The balance display section 175 displays, for example, the hundredths and higher digits of the balance information stored on the storage medium M inserted into the medium insertion/ejection slot 172.

By inserting storage medium M into the medium insertion/ejection port 172 and manually operating the ball loan button 173 as appropriate, a player can receive loaned game balls in a number corresponding to some or all of the remaining balance information stored on storage medium M. In addition to the remaining balance information described above, storage medium M also stores information on the number of game balls loaned to the player and the number of game balls owned by the player.

<Electrical configuration of pachinko machine 160>
FIG. 156 is a block diagram showing the electrical configuration of a pachinko machine 160.

The main control device 211 is equipped with a main control board 221 that is responsible for the main control of the game. The main control board 221 is equipped with an MPU 222. The MPU 222 has a built-in ROM 223 that stores various control programs and fixed value data executed by the MPU 222, and a RAM 224 that is memory for temporarily storing various data when the control programs stored in the ROM 223 are executed. Note that it is not essential that the ROM 223 and RAM 224 be integrated into a single chip for the MPU 222; they may each be integrated into individual chips. This also applies to the MPUs of control devices other than the main control device 211. Hereinafter, in this specification, the MPU 222, ROM 223, and RAM 224 of the main control device 211 will be referred to as the main MPU 222, main ROM 223, and main RAM 224.

The main MPU 222 has an input port and an output port. The input side of the main MPU 222 is connected to a power outage monitoring board 225 provided in the main control unit 211, as well as to a dispensing control unit 217. The power outage monitoring board 225 is connected to a power supply/launch control unit 218, which has the function of supplying operating power, and power is supplied to the main MPU 222 via the power outage monitoring board 225.

Various sensors, such as winning detection sensors 226a-226e, are connected to the input side of the main MPU 222. The winning detection sensors 226a-226e include the detection sensor 226a provided in the general winning opening 191, the detection sensor 226b provided in the special winning device 192, the detection sensor 226c provided in the first operating opening 193, the detection sensor 226d provided in the second operating opening 194, and the detection sensor 226e provided in the through gate 195. Based on the detection results of these winning detection sensors 226a-226e, the main MPU 222 determines whether a ball has been won in each winning entry section. The main MPU 222 also conducts various lotteries based on the winning of the ball in the first operating opening 193 or the second operating opening 194.

The output side of the main MPU 222 is connected to the power outage monitoring board 225, payout control device 217, and audio/light emitting control device 231. For example, a prize ball command is output to the payout control device 217 based on the result of the winning determination for the winning ball entry section. Various commands, such as a variation command, a type command, and an opening command, are output to the audio/light emitting control device 231.

Connected to the output side of the main MPU 222 are the special power drive unit 192b, which opens and closes the opening/closing door 192a of the special power winning device 192, the normal power drive unit 194b, which opens and closes the normal power device 194a of the second operating port 194, the special chart unit 197, and the normal chart unit 198. Incidentally, the special chart unit 197 is provided with a first special chart display unit 197a, a second special chart display unit 197b, a first special chart reserve display unit 197c, and a second special chart reserve display unit 197d, all of which are connected to the output side of the main MPU 222. Similarly, the normal chart unit 198 is provided with a normal chart display unit 198a and a normal chart reserve display unit 198b, all of which are connected to the output side of the main MPU 222. The main control board 221 is provided with various driver circuits, and the main MPU 222 controls the drive of the various drive units through these driver circuits.

In other words, in the opening/closing execution mode, the main MPU 222 controls the drive of the special power drive unit 192b so that the special power winning device 192 opens and closes. Furthermore, if the normal power feature 194a is selected for opening, the main MPU 222 controls the drive of the normal power drive unit 194b so that the normal power feature 194a opens and closes. Furthermore, during each game, the main MPU 222 controls the display of the special chart unit 197. Furthermore, when the result of the lottery as to whether or not the normal power feature 194a will be in the open state, in which the normal power feature 194a is in the open state, is to be clearly displayed, the main MPU 222 controls the display of the normal chart unit 198.

The power outage monitoring board 225 is a board that relays between the main control board 221 and the power supply/launch control device 218. Furthermore, as will be described in detail later, the power outage monitoring board 225 monitors the voltage of the power supplied to the power outage monitoring board 225. The payout control device 217 controls the payout of prize balls and loan balls by the payout device 216 based on the prize ball command input from the main MPU 222.

The power supply/launch control device 218 is connected to a commercial power source (external power source) at, for example, an amusement hall. Based on the external power supplied from the commercial power source, it generates the operating power required for the main control device 211, payout control device 217, etc., and supplies the generated operating power to them.

Specifically, the power supply/launch control device 218 is provided with a power-on power supply unit 218a and a power-off power supply unit 218b. The power-on power supply unit 218a is connected to a commercial power source, for example, at an amusement hall, and has the function of generating and supplying operating power when external power is being supplied from the commercial power source. The power-off power supply unit 218b is composed of a capacitor, and is charged with power supplied from the power-on power supply unit 218a when the power to the pachinko machine 160 is ON (when power is being supplied from an external power source). Furthermore, when the power to the pachinko machine 160 is OFF or in a power-off state (when power supply from the external power source is cut off), such as during a commercial power outage, power is discharged from the power-off power supply unit 218b, and backup power is supplied to the main RAM 224 and the RAM of the payout control device 217 (payout RAM 264 (Figure 157)), which will be described later. Therefore, even if the power is cut off, the information stored in the main RAM 224 and the dispensing RAM 264 is retained and not erased as long as backup power is supplied from the power supply unit 218b for use during power outages.

Here, the main RAM 224 of the main control device 211 temporarily stores information on the current game status and game progress, and the payout RAM 264 temporarily stores information on the number of unpaid prize balls. In this case, by supplying backup power to these RAMs (main RAM 224 and payout RAM 264) from the power-off power supply unit 218b as described above, it becomes possible to store and retain the current game status, game progress, and unpaid prize ball information for a predetermined period of time even when there is no power supply from the power-on power supply unit 218a. On the other hand, the audio and light-emitting control device 231 and the display control device 241 do not receive backup power from the power-off power supply unit 218b. Therefore, the information stored in the RAM 235 of the audio and light-emitting control device 231 and the RAM 245 of the display control device 241 is not backed up and is destroyed or erased if the power supply from the power-on power supply unit 218a is stopped.

The power supply unit 218b for use during power outage has a relatively large capacity, and information stored in the main RAM 224 and dispensing RAM 264 before the power is cut off is retained for a predetermined period of time (for example, one or two days). The power supply unit 218b for use during power outage is not limited to a capacitor, and may also be a battery or non-rechargeable battery. Details of the configuration for supplying power to the main control unit 211 and dispensing control unit 217 will be described later.

The power supply and launch control device 218 is provided with various power supply units 218a and 218b as well as a launch control unit 218c. The launch control unit 218c is electrically connected to the launch operation device 188. When predetermined conditions for launching game balls are met, the launch control unit 218c sends a condition fulfillment signal of a predetermined signal type (specifically, HI level) to the main MPU 222. When the main MPU 222 receives a HI level condition fulfillment signal and is in a state where the launch of game balls can be permitted, it continues to send a HI level launch permission signal (a signal corresponding to launch permission) to the launch control unit 218c.

When the game ball launching mechanism 187 is electrically connected and a HI level launch permission signal is received from the main MPU 222, the launch control unit 218c periodically drives and controls the game ball launching mechanism 187. In this case, if game balls are continuously supplied to the game ball launching mechanism 187, one game ball is launched into the game area PA at a specific launch cycle (specifically, 0.6 seconds). Furthermore, during this launch, the launch strength is adjusted based on a signal received from a variable resistor provided in the launch operation device 188, so that the game ball is launched with a strength that corresponds to the amount of rotation of the operating handle.

In the main control device 211 configured as described above, the main control board 221 is provided with first to fourth alarm display devices 246-249. The first to fourth alarm display devices 246-249 are mounted on the element mounting surface of the main control board 221. The first to fourth alarm display devices 246-249 are all segment displays with an arrangement of eight LED display segments, but are not limited to this and may also be liquid crystal displays or organic EL displays.

As described above, the main control board 221 is housed in a board box. The first to fourth alarm display devices 246-249 are all installed so that their display surfaces face the same direction as the element mounting surface of the main control board 221, and are covered by the opposing wall of the board box. In this case, because the board box is made transparent, the display surfaces of the first to fourth alarm display devices 246-249 housed within the board box can be seen from outside the board box. Additionally, the main control device 211 is mounted on the back surface of the resin base 181 so that the opposing wall portion of the board box that faces the element mounting surface of the main control board 221 faces the rear of the pachinko machine 160. Therefore, when the gaming machine main body 162 is opened toward the front of the pachinko machine 160 relative to the outer frame 161 and the rear surface of the resin base 181 is exposed toward the front of the pachinko machine 160, the display surfaces of the first to fourth notification display devices 246-249 can be seen through the opposing wall portion. As will be described in more detail below, the first to fourth notification display devices 246-249 display the results of game history management.

The audio/light emitting control device 231 includes an audio/light emitting control board 232 on which an MPU 233 is mounted. The MPU 233 contains a ROM 234 that stores various control programs and fixed value data executed by the audio/light side MPU 233, a RAM 235 that is memory for temporarily storing various data when executing the control programs stored in the ROM 234, an interrupt circuit, a timer circuit, a data input/output circuit, etc. Based on commands received from the main control device 211, the MPU 233 drives and controls the display light emitting unit 204 and speaker unit 205, and sends commands to the display control device 241.

The display control device 241 includes a display control board 242 on which an MPU 243 is mounted. The MPU 243 includes a ROM 244 that stores various control programs and fixed value data executed by the MPU 243, a RAM 245 that temporarily stores various data when executing the control programs stored in the ROM 244, an interrupt circuit, a timer circuit, a data input/output circuit, and other built-in components. The MPU 243 controls the symbol display device 199 based on commands received from the audio/light emitting control device 231. Hereinafter, in this specification, the MPU 233, ROM 234, and RAM 235 of the audio/light emitting control device 231 will be referred to as the audio/light emitting side MPU 233, audio/light emitting side ROM 234, and audio/light emitting side RAM 235, and the MPU 243, ROM 244, and RAM 245 of the display control device 241 will be referred to as the display side MPU 243, display side ROM 244, and display side RAM 245.

Figure 157 is an explanatory diagram illustrating the detailed configuration of the main control unit 211 and the dispensing control unit 217.

As shown in FIG. 157, the payout control device 217 is connected to both the input and output sides of the main MPU 222. The main MPU 222 is capable of sending data to the payout control device 217 and receiving data from it. The payout control device 217 is equipped with a payout control board 259 that controls the use of game balls, the dispensing of game balls, and communication with the management unit 170, and the payout control board 259 is equipped with a payout MPU 261. The payout MPU 261 has a payout CPU 262, a payout ROM 263, and a payout RAM 264 built in.

The dispensing CPU 262 is a central processing unit that executes various commands. The dispensing ROM 263 is configured to use memory that does not require an external power supply to maintain its memory, such as NOR flash memory or NAND flash memory (i.e., non-volatile storage means), as read-only memory. The dispensing ROM 263 stores various control programs and fixed value data executed by the dispensing MPU 261. The dispensing RAM 264 is configured to use memory that requires an external power supply to maintain its memory, such as SRAM or DRAM (i.e., volatile storage means), as read/write memory. It is randomly accessible and has a faster read time than the dispensing ROM 263 when compared for the same data capacity. The dispensing RAM 264 temporarily stores various data, etc., when executing the control programs stored in the dispensing ROM 263. In addition to the above elements, the dispensing MPU 261 is also equipped with an interrupt circuit, a timer circuit, a data input/output circuit, etc.

The payout side MPU 261 is provided with an input port and an output port. The payout device 216 is connected to both the input and output sides of the payout side MPU 261. The payout device 216 is provided with a payout motor 216a that drives a ball stopper, such as a rotor, that switches between a state in which game balls supplied to the payout device 216 from the tank 215 (see Figure 153) are prevented from passing downstream and a state in which the game balls are sent downstream, and a payout detection sensor 216b that individually detects game balls sent downstream. The payout motor 216a is electrically connected to the output side of the payout side MPU 261 via electrical wiring, and the payout detection sensor 216b is electrically connected to the input side of the payout side MPU 261 via electrical wiring. The payout side MPU 261 executes the payout of game balls by supplying a drive signal to the payout motor 216a through a driver circuit provided on the payout control board 259, and determines the number of game balls that have been paid out based on the detection results of the payout detection sensor 216b.

As shown in Figure 157, the management unit 170 is connected to both the input and output sides of the payout side MPU 261 via the connection terminal board 255. The payout control device 217 is capable of sending data to the management unit 170 and receiving data from the management unit 170. The management unit 170 is connected to the amusement hall's management computer HC. The management unit 170 is capable of sending data to the management computer HC and receiving data from the management unit 170.

The management unit 170 performs processes such as identifying banknotes inserted through the cash insertion slot 171 and outputting that information to the pachinko machine 160, identifying the storage medium M inserted through the medium insertion/ejection slot 172 and outputting that information to the pachinko machine 160, writing information on the number of gaming balls to the storage medium M in response to a write instruction from the pachinko machine 160, ejecting the storage medium M from the medium insertion/ejection slot 172 based on the operation of the medium return button 174, and transmitting gaming machine information (described below) received from the payout control device 217 to the management computer HC. Details of the content of data exchanged between the main control device 211 and the payout control device 217, and the content of data exchanged between the payout control device 217 and the management unit 170 will be described later.

Next, the configuration of the main MPU 222 will be described in detail. As shown in FIG. 157, the main MPU 222 is provided with a main CPU 251, which is a central processing unit that executes various commands. The main ROM 223 and main RAM 224 described above are provided outside the main CPU 251 in the main MPU 222. In the main MPU 222, various processes are performed by the main CPU 251 executing commands set in programs stored in the main ROM 223. The main RAM 224 temporarily stores various data, etc. when the programs are executed.

In the main MPU 222, external to the main CPU 251, there are built-in components such as a main power supply control unit 253, a reset circuit 254 for resetting the main MPU 222, a setting register group 256, a monitoring and control register group 257, an interrupt control circuit 258, a timer circuit (not shown), a data input/output circuit, and various counter circuits as random number generators. Also, as in the first embodiment, the main MPU 222 is provided with input and output ports.

The setting register group 256 includes registers for setting input port usage and registers for setting interrupt processing (timer interrupt processing (Figure 167) described below). The monitoring and control register group 257 includes registers for monitoring and controlling input ports, registers for controlling output ports, registers for controlling the main RAM 224, and registers used for controlling interrupt processing. Details of the registers in the setting register group 256 and the monitoring and control register group 257 will be provided later.

The main MPU 222 is provided with an internal bus NB (see Figure 166 (a)), and the main CPU 251 is connected via the internal bus NB to a reset circuit 254, a setting register group 256, a monitoring and control register group 257, an interrupt control circuit 258, a timer circuit, a data input/output circuit, and various counter circuits such as a random number generator. In addition, the main power supply control unit 253 is connected to the reset circuit 254, as will be described in more detail below.

The processing of the main MPU 222 can be broadly divided into main processing, which is activated when the power is turned on, and timer interrupt processing, which is activated periodically (every 4 msec in this embodiment). Furthermore, the various controls executed using programs in the main MPU 222 are distinguished as specific control and non-specific control. Specifically, non-specific control includes control related to the management of game history, fraud monitoring, management of total win counts, and initialization of the register group (second register group 266 described below) used for non-specific control. Specific control includes control other than non-specific control, including control for progressing the game based on the player's game operations. Specifically, all control by the main processing, except for the initial setting process and base value calculation setting process for non-specific control described below, is included in specific control, and the initial setting process and base value calculation setting process for non-specific control are included in non-specific control. Furthermore, with regard to control by timer interrupt processing, all processing other than the second stack pointer storage processing, fraud detection processing, and second management processing described below is included in specific control, while the second stack pointer storage processing, fraud detection processing, and second management processing are included in non-specific control.

Figure 158 is an explanatory diagram illustrating the configuration of the main CPU 251, and Figure 159(a) is an explanatory diagram illustrating the memory area used by the main MPU 222. In response to the distinction between specific control and non-specific control in the control executed by the main MPU 222, as shown in Figure 158, the main CPU 251 is provided with a first register group 265 used to execute specific control processing and a second register group 266 used to execute non-specific control processing. Furthermore, in accordance with the distinction between specific control and non-specific control executed by the main MPU 222, as shown in FIG. 159(a), in the main ROM 223, the addresses of the areas storing data and programs for specific control and data and programs for non-specific control are clearly distinguished, and in the main RAM 224, the address range of the work area 281 for specific control, the address range of the stack area 282 for specific control, the address range of the work area 283 for non-specific control, and the address range of the stack area 284 for non-specific control are clearly distinguished. In the main ROM 223, main RAM 224, setting register group 256, and monitoring control register group 257, each address is set with a 1-byte area (hereinafter also referred to as a 1-byte area).

As shown in FIG. 158, the main CPU 251 is provided with a usage register group switching circuit 252 that switches the register group to be used between the first register group 265 and the second register group 266. When the main MPU 222, described below, is reset, the usage register group switching circuit 252 selects the first register group 265 as the register group to be used. The register group selected for use by the usage register group switching circuit 252 is switched from the first register group 265 to the second register group 266 upon execution of a CALLA instruction, which is used to call a non-specific control process, and is switched from the second register group 266 to the first register group 265 upon execution of a RETA instruction, which is used to terminate a non-specific control process. In this way, the usage register group switching circuit 252 is configured so that only one of the first register group 265 and the second register group 266 is selected as the register group to be used; a state in which both the first register group 265 and the second register group 266 are selected as the register group to be used does not occur. Details of the CALLA and RETA commands will be explained later.

As shown in FIG. 158, the first register group 265 includes the following general-purpose registers: A register 271a, F register 271b, B register 272a, C register 272b, D register 273a, E register 273b, H register 274a, and L register 274b. Each of these eight general-purpose registers is a one-byte register. These general-purpose registers can also be used as two-byte pair registers by combining corresponding two registers. Specifically, the A register 271a and the F register 271b can be combined and used as the AF register 271; the B register 272a and the C register 272b can be combined and used as the BC register 272; the D register 273a and the E register 273b can be combined and used as the DE register 273; and the H register 274a and the L register 274b can be combined and used as the HL register 274.

The first register group 265 includes one-byte auxiliary registers corresponding to each of the eight general-purpose registers (main registers) mentioned above. The A' register 291a serves as the auxiliary register for the A register 271a, the F' register 291b serves as the auxiliary register for the F register 271b, the B' register 292a serves as the auxiliary register for the B register 272a, the C' register 292b serves as the auxiliary register for the C register 272b, the D' register 293a serves as the auxiliary register for the D register 273a, the E' register 293b serves as the auxiliary register for the E register 273b, the H' register 294a serves as the auxiliary register for the H register 274a, and the L' register 294b serves as the auxiliary register for the L register 274b. The pair of the A' register 291a and the F' register 291b corresponding to the AF register 271 is referred to as the "AF' register 291." Similarly, the pair of B' register 292a and C' register 292b is referred to as the "BC' register 292", the pair of D' register 293a and E' register 293b is referred to as the "DE' register 293", and the pair of H' register 294a and L' register 294b is referred to as the "HL' register 294".

The first register group 265 is provided with an IX register 275, an IY register 276, a K register 277, and a V register 278 as registers for specifying addresses. Each of the IX register 275 and the IY register 276 is a two-byte register. The first register group 265 also has two-byte auxiliary registers corresponding to the IX register 275 and the IY register 276 (main registers). Specifically, an IX' register 295 is provided as an auxiliary register for the IX register 275, and an IY' register 296 is provided as an auxiliary register for the IY register 276.

The K register 277 and V register 278 are each a one-byte register. The first register group 265 also includes a one-byte K' register 297 as an auxiliary register corresponding to the K register 277 (main register). The first register group 265 also includes a two-byte stack pointer 279. There are no auxiliary registers corresponding to the V register 278 or stack pointer 279.

The second register group 266 includes the following general-purpose registers: A register 301a, F register 301b, B register 302a, C register 302b, D register 303a, E register 303b, H register 304a, and L register 304b. Each of these eight general-purpose registers is a one-byte register. These general-purpose registers can also be used as two-byte pair registers by combining corresponding two registers. Specifically, the A register 301a and the F register 301b can be combined and used as the AF register 301; the B register 302a and the C register 302b can be combined and used as the BC register 302; the D register 303a and the E register 303b can be combined and used as the DE register 303; and the H register 304a and the L register 304b can be combined and used as the HL register 304.

The second register group 266 includes one-byte auxiliary registers corresponding to each of the eight general-purpose registers mentioned above. The A' register 311a serves as the auxiliary register for the A register 301a, the F' register 311b serves as the auxiliary register for the F register 301b, the B' register 312a serves as the auxiliary register for the B register 302a, the C' register 312b serves as the auxiliary register for the C register 302b, the D' register 313a serves as the auxiliary register for the D register 303a, the E' register 313b serves as the auxiliary register for the E register 303b, the H' register 314a serves as the auxiliary register for the H register 304a, and the L' register 314b serves as the auxiliary register for the L register 304b. The pair of the A' register 311a and the F' register 311b corresponding to the AF register 301 is referred to as the "AF' register 311." Similarly, the pair of B' register 312a and C' register 312b is referred to as the "BC' register 312", the pair of D' register 313a and E' register 313b is referred to as the "DE' register 313", and the pair of H' register 314a and L' register 314b is referred to as the "HL' register 314".

The second register group 266 is provided with an IX register 305, an IY register 306, a K register 307, and a V register 308 as registers for specifying addresses. Each of the IX register 305 and the IY register 306 is a two-byte register. The second register group 266 also has two-byte auxiliary registers corresponding to the IX register 305 and the IY register 306 (main registers). Specifically, the IX' register 315 is provided as an auxiliary register for the IX register 305, and the IY' register 316 is provided as an auxiliary register for the IY register 306.

The K register 307 is a 1-byte register. The second register group 266 is provided with a 1-byte K' register 317 as an auxiliary register corresponding to the K register 307 (main register). The second register group 266 also has a 2-byte stack pointer 309. No auxiliary registers are provided corresponding to the V register 308 or stack pointer 309.

The A registers 271a and 301a are used to temporarily store information used in calculations, information read from the main ROM 223, information read from the main RAM 224, information to be set in the main RAM 224, information obtained from the input port, and information to be output from the output port. The A registers 271a and 301a also store 8-bit calculation result data. Specifically, when an addition instruction is executed to add 8-bit numerical information to 8-bit numerical information, the calculation result data (numeric information after the addition) is stored in the A registers 271a and 301a. When a subtraction instruction is executed to subtract 8-bit numerical information from 8-bit numerical information, the calculation result data (numeric information after the subtraction) is stored in the A registers 271a and 301a.

F registers 271b and 301b are flag registers. They contain a carry flag, a zero flag, a P/V flag, a sign flag, and a half carry flag, among other flags. The information in F registers 271b and 301b changes depending on the execution results of arithmetic instructions, rotate instructions, and input/output instructions. However, the information in F registers 271b and 301b does not change before or after the execution of an exchange instruction (EX instruction or EXX instruction), which will be described later. By providing auxiliary registers (AF' registers 291 and 311) corresponding to AF registers 271 and 301, the calculation result data (data in A registers 271a and 301a) and the flag register data corresponding to that calculation result (data in F registers 271b and 301b) can be saved without using the main RAM 224. This prevents the calculation result data and the flag register data corresponding to that calculation result from being lost, while making the next calculation executable.

The B registers 272a, 302a, C registers 272b, 302b, D registers 273a, 303a, E registers 273b, 303b, H registers 274a, 304a, and L registers 274b, 304b are used to temporarily store various information, such as information used in calculations, information read from the main ROM 223, information read from the main RAM 224, information to be set in the main RAM 224, address information for specifying the source area in a transfer command (e.g., the LD command or the LDK command described below), and address information for specifying the destination area in a transfer command (e.g., the LD command or the LDK command described below). In addition to storing the various information described above, the HL registers 274, 304 also store 16-bit calculation result data. Specifically, when an add instruction is executed to add 16-bit numerical information to 16-bit numerical information, the calculation result data (numerical information after the addition) is stored in the HL registers 274, 304. When a subtract instruction is executed to subtract 16-bit numerical information from 16-bit numerical information, the calculation result data (numerical information after the subtraction) is stored in the HL registers 274, 304. Because auxiliary registers (BC' registers 292, 312, DE' registers 293, 313, and HL' registers 294, 314) corresponding to the BC registers 272, 302, DE registers 273, 303, and HL registers 274, 304 are provided, when there are insufficient registers for storing information, the data in the BC registers 272, 302, DE registers 273, 303, and HL registers 274, 304 can be saved to the auxiliary registers without using the primary RAM 224. This allows new information to be stored in the BC registers 272, 302, DE registers 273, 303, and HL registers 274, 304.

IX registers 275, 305 and IY registers 276, 306 are used to address areas in the main ROM 223 or main RAM 224. The IX registers 275, 305 are used to specify an address obtained by adding a predetermined value (specifically, one byte of numerical information set to specify an area in the LD instruction, which is a transfer instruction, an add instruction for adding one to the value of the target area, or a subtract instruction for subtracting one from the value of the target area) to a base address set in the IX register 275, 305 (for example, the first or third base address for identification described below, or the first or third base address for non-identification described below). The IY registers 276, 306 are used to specify an address obtained by adding a predetermined value (specifically, one byte of numerical information set to specify an area in the LD instruction, add instruction, or subtract instruction described above) to a base address set in the IY register 276, 306 (for example, the second or fourth base address for identification described below, or the second or fourth base address for non-identification described below).

When using IX registers 275, 305 to address an area (source area or destination area for an LD instruction, or target area for an add or subtract instruction) with an LD instruction, add instruction, or subtract instruction, the information set in these instructions to specify the address is one byte of information that specifies the difference between the address of the area (two bytes) and the base address set in IX registers 275, 305. Therefore, when using IX registers 275, 305 to address an area with an LD instruction, add instruction, or subtract instruction, the data size of the information set in these instructions to specify the address of the area can be reduced by one byte compared to when addressing is performed by setting the address of the area (two bytes) in these instructions without using IX registers 275, 305. So far, we have explained the effects of using the IX registers 275, 305 to specify the address of an area with an LD instruction, an add instruction, or a subtract instruction, but the same effects can be obtained when using the IY registers 276, 306 to specify the address of an area (the source area or destination area for an LD instruction, or the target area for an add instruction or a subtract instruction) with an LD instruction, an add instruction, or a subtract instruction.

By providing auxiliary registers (IX' registers 295, 315) corresponding to the IX registers 275, 305, it is possible to switch the base address used between two types of base addresses (for example, the first and third base addresses for identification, described below, or the first and third base addresses for non-identification, described below). Furthermore, by providing auxiliary registers (IY' registers 296, 316) corresponding to the IY registers 276, 306, it is possible to switch the base address used between two types of base addresses (for example, the second and fourth base addresses for identification, described below, or the second and fourth base addresses for non-identification, described below).

K registers 277, 307 are used to specify the address of a target area in the primary ROM 223 or primary RAM 224. K registers 277, 307 are used to specify an address obtained by combining the upper 1-byte of base address information set in the K register 277, 307 (e.g., the upper first base address information for identification, the upper second base address information for identification, or the upper non-identification base address information described below) with a specified lower 1-byte of address information (specifically, 1-byte numerical information set in the LDK instruction to specify the source area or destination area). When specifying the address of a target area (source area or destination area) with an LDK instruction that uses K registers 277, 307, the information set in these instructions to specify the address is the lower 1-byte of the address (2 bytes) of the target area. Therefore, when addressing a target area with an LDK instruction that uses the K registers 277 and 307, the data size of the information set in the transfer instruction for addressing the target area can be reduced by one byte compared to when addressing the target area by setting the address (2 bytes) of the target area in the LD instruction without using the K registers 277 and 307. Furthermore, by providing auxiliary registers (K' registers 297 and 317) corresponding to the K registers 277 and 307, it is possible to switch the upper base address information used between two types of base address information (for example, two types of base address information among the upper first base address information for identification, the upper second base address information for identification, and the upper non-identification upper base address information, which will be described later).

As already explained, the main MPU 222 has a first register group 265 and a second register group 266 inside the main CPU 251, and a setting register group 256 and a monitoring and control register group 257 outside the main CPU 251. Also, as shown in FIG. 158, the main MPU 222 has an I register 267, an R register 268, and a program counter 269 (described below) inside the main CPU 251. Registers inside the main CPU 251 (specifically, the registers included in the first register group 265, the registers included in the second register group 266, the I register 267, the R register 268, and the program counter 269) allow information to be read from and written to by register name in a program, eliminating the need for address specification to identify the register. This allows information to be read from and written to the register at high speed, while also reducing the number of bytes required for instructions that use the register.

A two-byte address is set for each of the registers provided externally to the main CPU 251 (specifically, the registers included in the setting register group 256 and the registers included in the monitoring and control register group 257). An IN command or a transfer command (e.g., an LD command) can be used to read information from these registers, and an OUT command or a transfer command (e.g., an LD command) can be used to write information to these registers.

The data stored in the V registers 278 and 308 is used to specify the address of the target register in the setting register group 256 or the monitoring and control register group 257. When specifying an address using the V registers 278 and 308, a register is specified corresponding to the address obtained by combining the upper 1-byte of base address information set in the V registers 278 and 308 (e.g., the upper first base address information for registers or the upper second base address for registers described below) with a predetermined lower 1-byte of address information (1-byte numerical information set in an IN instruction or an OUT instruction). When using the LD instruction to read information from a register external to the main CPU 251, the LD instruction must be set with a 2-byte address corresponding to the register. In contrast, when using the IN instruction to read information from the register, the data stored in the V registers 278 and 308 becomes the upper 1-byte of address information for the register, and the IN instruction is set with the lower 1 byte of the address (2 bytes) corresponding to the register. In this way, by using the IN instruction, the number of bytes of the instruction set in the program to read information from the register can be reduced by one byte compared to when using the LD instruction. Furthermore, when using the LD instruction to write information to a register external to the main CPU 251, the LD instruction must be set with a two-byte address corresponding to the register. In contrast, when using the OUT instruction to write information to the register, the data stored in the V register 278, 308 becomes the upper one byte of address information in the address specification of the register, so the OUT instruction is set with the lower one byte of the address (two bytes) corresponding to the register. In this way, by using the OUT instruction, the number of bytes of the instruction set in the program to write information to the register can be reduced by one byte compared to when using the LD instruction.

The data capacity of an auxiliary register (e.g., AF' register 291) is the same as the data capacity of the main register (e.g., AF register 271) corresponding to that auxiliary register. The main CPU 251 can execute an exchange instruction (specifically, an EX instruction or an EXX instruction) to exchange data stored in a main register with data stored in an auxiliary register corresponding to that main register. When an exchange instruction is executed and the data stored in the main register is exchanged with the data stored in the auxiliary register, the data in the main register before the exchange is written to the auxiliary register, and the data in the auxiliary register before the exchange is written to the main register. By executing an exchange instruction to exchange the data in the main register with the data in the auxiliary register, the data stored in the main register can be saved to the auxiliary register, and the data saved in the auxiliary register can be restored to the main register.

Although the storage destination of the data in the main register and the auxiliary register before the exchange is changed when the exchange command is executed, the data is not lost when the exchange command is executed. This eliminates the need to back up the data in the main register and the auxiliary register before the exchange command to the main RAM 224 or the like before executing the exchange command. Incidentally, when a transfer command such as the LD command or LDK command is executed and data stored in the source area is transferred to the destination area, the data in the source area before the transfer command is executed is maintained, and the data in the source area before the transfer command is executed is written to the destination area. Execution of a transfer command causes the data in the destination area before the transfer command is executed to be lost, so if the data is needed, it is necessary to back up the data in the destination area before the transfer command is executed to the main RAM 224 or the like in advance.

When the first register group 265 is being used, the main CPU 251 can exchange the data in the AF register 271 in the first register group 265 with the data in the auxiliary register (specifically, the data in the AF' register 291) by executing the exchange command "EX AF, AF'". Furthermore, when the second register group 266 is being used, the main CPU 251 can exchange the data in the AF register 301 in the second register group 266 with the data in the auxiliary register (specifically, the data in the AF' register 311) by executing the exchange command "EX AF, AF'". In this way, the existence of an exchange instruction for exchanging the data in the AF registers 271, 301 with the data in the auxiliary registers makes it possible to save the data in the A registers 271a, 301a, which store the 8-bit calculation results, and the data in the F registers 271b, 301b, whose information changes depending on the execution result of calculation instructions, to the auxiliary registers (specifically, the AF' registers 291, 311) with a single instruction, and to make it possible to execute a new calculation using the A registers 271a, 301a and the F registers 271b, 301b. Furthermore, by exchanging the data in the AF registers 271, 301 with a single instruction, it is possible to prevent the data in the F registers 271b, 301b from not corresponding to the data in the A registers 271a, 301a, as a result of only one of the data in the A registers 271a, 301a and the data in the F registers 271b, 301b being exchanged with the data in the auxiliary registers. As described above, the data in the F registers 271b and 301b does not change before and after the execution of the swap command. This allows the data in the F registers 271b and 301b to be saved to the auxiliary register without changing the data in the F registers 271b and 301b, and the saved data to be restored to the F registers 271b and 301b.

When the first register group 265 is in use, the main CPU 251 can execute the exchange command "EXX" to exchange the data in the BC register 272, DE register 273, and HL register 274 in the first register group 265 with the data in the auxiliary registers (specifically, the data in the BC' register 292, DE' register 293, and HL' register 294) with a single command. When the second register group 266 is in use, the main CPU 251 can execute the exchange command "EXX" to exchange the data in the BC register 302, DE register 303, and HL register 304 in the second register group 266 with the data in the auxiliary registers (specifically, the data in the BC' register 312, DE' register 313, and HL' register 314) with a single command. In this way, because there are exchange instructions for exchanging data in the BC registers 272, 302, DE registers 273, 303, and HL registers 274, 304 with data in the auxiliary registers, by executing the EXX instruction when there are not enough registers to store data, the data in the BC registers 272, 302, DE registers 273, 303, and HL registers 274, 304 can be saved to the auxiliary registers, and new data can be stored in the exchanged BC registers 272, 302, DE registers 273, 303, and HL registers 274, 304. Furthermore, by executing the EXX instruction, it is possible to restore the data saved in the auxiliary registers (specifically, the data in the BC' registers 292, 312, DE' registers 293, 313, and HL' registers 294, 314) to the BC registers 272, 302, DE registers 273, 303, and HL registers 274, 304 with a single instruction.

In comparison to a configuration that requires three instructions to exchange data in BC registers 272, 302, DE registers 273, 303, and HL registers 274, 304 with data in an auxiliary register - an instruction to exchange data in BC registers 272, 302 with data in BC' register 292, an instruction to exchange data in DE registers 273, 303 with data in DE' register 293, and an instruction to exchange data in HL registers 274, 304 with data in HL' register 294 - this configuration allows data in BC registers 272, 302, DE registers 273, 303, and HL registers 274, 304 to be exchanged with data in an auxiliary register with a single instruction, thereby reducing the number of exchange instructions that need to be set in a program to secure new registers that can store data when there are not enough registers to store data.

When the first register group 265 is being used, the main CPU 251 can exchange the data in the IX register 275 in the first register group 265 with the data in the auxiliary register (specifically, the data in the IX' register 295) by executing the exchange command "EX IX, IX'". Furthermore, when the second register group 266 is being used, the main CPU 251 can exchange the data in the IX register 305 in the second register group 266 with the data in the auxiliary register (specifically, the data in the IX' register 315) by executing the exchange command "EX IX, IX'". In this way, because there is an exchange instruction that exchanges the data in the IX registers 275, 305 with the data in the IX' registers 295, 315, it is possible to store a base address different from the base address stored in the IX registers 275, 305 in the IX' registers 295, 315, and then use the exchange instruction to exchange the base address stored in the IX registers 275, 305 with the base address stored in the IX' registers 295, 315, thereby switching between these two types of base addresses to be used.

When the first register group 265 is in use, the main CPU 251 can exchange the data in the IY register 276 in the first register group 265 with the data in the auxiliary register (specifically, the data in the IY' register 296) by executing the exchange command "EX IY, IY'". Furthermore, when the second register group 266 is in use, the main CPU 251 can exchange the data in the IY register 306 in the second register group 266 with the data in the auxiliary register (specifically, the data in the IY' register 316) by executing the exchange command "EX IY, IY'". In this way, because there is an exchange instruction that exchanges the data in the IY registers 276, 306 with the data in the IY' registers 296, 316, it is possible to store a base address in the IY' registers 296, 316 that is different from the base address stored in the IY registers 276, 306, and then use the exchange instruction to exchange the base address stored in the IY registers 276, 306 with the base address stored in the IY' registers 296, 316, thereby switching between these two types of base addresses to be used.

When the first register group 265 is in use, the main CPU 251 can exchange the data in the K register 277 in the first register group 265 with the data in the auxiliary register (specifically, the data in the K' register 297) by executing the exchange command "EX K,K'". Furthermore, when the second register group 266 is in use, the main CPU 251 can exchange the data in the K register 307 in the second register group 266 with the data in the auxiliary register (specifically, the data in the K' register 317) by executing the exchange command "EX K,K'". In this way, because there is an exchange instruction that exchanges the data in the K registers 277, 307 with the data in the K' registers 297, 317, it is possible to store a base address in the K' registers 297, 317 that is different from the base address stored in the K registers 277, 307, and then use the exchange instruction to exchange the base address stored in the K registers 277, 307 with the base address stored in the K' registers 297, 317, thereby switching between these two types of base addresses to be used.

By executing the instruction "EX IX, IX'", the base address data set in the IX registers 275, 305 can be exchanged with the base address data set in the IX' registers 295, 315 without changing the base address set in the IY registers 276, 306 or the upper base address information set in the K registers 277, 307. Furthermore, by executing the instruction "EX IY, IY'", the base address data set in the IY registers 276, 306 can be exchanged with the base address data set in the IY' registers 296, 316 without changing the base address set in the IX registers 275, 305 or the upper base address information set in the K registers 277, 307. Furthermore, by executing the instruction "EX K,K'", the upper base address information set in the K registers 277, 307 can be exchanged with the upper base address information set in the K' registers 297, 317 without changing the base addresses set in the IX registers 275, 305 and the IY registers 276, 306.

The above-mentioned exchange instruction "EX AF, AF'" is a one-byte instruction. This makes it possible to exchange data in the AF register 271 with data in the auxiliary register while minimizing the increase in the number of bytes of instructions set in the program. The exchange instruction "EXX" is also a one-byte instruction. This makes it possible to exchange data in the BC register 272, DE register 273, and HL register 274 with data in the auxiliary register while minimizing the increase in the number of bytes of instructions set in the program. Furthermore, the exchange instruction "EX IX, IX'", the exchange instruction "EX IY, IY'", and the exchange instruction "EX K, K'" are all one-byte instructions. This makes it possible to exchange data in the IX registers 275, 305 with data in the auxiliary register, exchange data in the IY registers 276, 306 with data in the auxiliary register, and exchange data in the K registers 277, 307 with data in the auxiliary register while minimizing the increase in the number of bytes of instructions set in the program.

As already explained, the main CPU 251 is provided with a usage register group switching circuit 252 that sets either the first register group 265 or the second register group 266 as the register group to be used. When an instruction that uses a register included in the first register group 265 or the second register group 266 is executed, the register used by that instruction is the register included in the register group selected by the usage register group switching circuit 252 as the register group to be used from the first register group 265 or the second register group 266. In this way, the register to be used is identified based on the combination of the register group selected as the register group to be used by the usage register group switching circuit 252 and the type of register specified in the instruction to be executed. An instruction (e.g., an EX instruction) set in the program is configured to include information specifying the type of register to be used (e.g., "AF" and "AF'"), but not information specifying the register group to be used (specifically, the first register group 265 or the second register group 266). This allows the instructions set in the program to execute processing on the registers included in the first register set 265 to be the same instructions (e.g., "EX AF, AF'") as the instructions set in the program to execute similar processing on the registers included in the second register set 266. Therefore, the number of instructions required is reduced compared to a configuration in which the instructions set in the program to execute processing on the registers included in the first register set 265 are different from the instructions set in the program to execute similar processing on the registers included in the second register set 266.

When specific control processing is being executed, the first register group 265 is the target of use and the second register group 266 is not the target of use. Furthermore, when non-specific control processing is being executed, the second register group 266 is the target of use and the first register group 265 is not the target of use. This prevents the information stored in each register of the second register group 266 used in non-specific control processing from being overwritten when specific control processing is executed, and also prevents the information stored in each register of the first register group 265 used in specific control processing from being overwritten when non-specific control processing is executed.

As shown in FIG. 159(a), the address range of "0000H" to "3FFFH" is assigned to the main ROM 223, the address range of "4000H" to "9FFFH" is unused, the address range of "A000H" to "A4FFH" is assigned to the main RAM 224, the address range of "A500H" to "A9FFH" is unused, the address range of "AA00H" to "AAFCH" is assigned to the setting register group 256, the address range of "AAFDH" to "AAFFH" is unused, and the address range of "AB00H" to "ABCFH" is assigned to the monitoring and control register group 257. Note that in the 18th to 23rd embodiments, an "H" suffixed to a number indicates that the number is expressed in hexadecimal.

As described above, the addresses of the areas in the main ROM 223 where specific control data and programs are stored are clearly distinguished from those where non-specific control data and programs are stored. Specifically, specific control programs are collectively stored in consecutive addresses in the address range of "0000H" to "0FFCH." The address range of "0FFDH" to "0FFFH" adjacent to this address range is an unused area where no data is stored, followed by consecutive addresses in the address range of "1000H" to "1FFCH." The address range of "1FFDH" to "1FFFH" adjacent to this address range is an unused area where no data is stored, followed by consecutive addresses in the address range of "2000H" to "2FFCH." Non-specific control programs are collectively stored in consecutive addresses. Furthermore, the address range "2FFDH" to "2FFFH" that is adjacent to this address range is an unused area where no data is stored, and the consecutive addresses in the address range "3000H" to "3FFFH" that follows contain aggregated data for non-specific control. The relationship between the programs and data and addresses described above is set both in physical addresses in the main ROM 223 and in logical addresses on the memory map recognized by the main MPU 222.

As described above, programs and data for specific control and programs and data for non-specific control are stored in different address ranges, regardless of the execution order of the processes for executing the corresponding controls. This makes it possible to efficiently check programs and data for specific control and non-specific control separately. This also makes it possible to efficiently correct programs and data for specific control and non-specific control separately.

As described above, in the main RAM 224, the address range of the work area 281 for specific control, the address range of the stack area 282 for specific control, the address range of the work area 283 for non-specific control, and the address range of the stack area 284 for non-specific control are clearly distinguished. Specifically, the area of each consecutive address in the address range of "A000H" to "A1FCH" is set as the work area 281 for specific control. Within this address range, the address range of "A000H" to "A0FFH", which has the same upper byte of "A0H", is the first address range of the work area 281 for specific control, and the address range of "A100H" to "A1FCH", which has the same upper byte of "A1H", is the second address range of the work area 281 for specific control.

The addresses "A1FDH" to "A1FFH" that follow the address range "A000H" to "A1FCH" are unused addresses, and the area of each consecutive address in the address range "A200H" to "A2FCH" that follows is set as a stack area 282 for specific control. The address range "A2FDH" to "A2FFH" that follows the address range "A200H" to "A2FCH" is unused addresses, and the area of each consecutive address in the address range "A300H" to "A3FCH" that follows is set as a work area 283 for non-specific control. Additionally, the address range of "A3FDH" to "A3FFH", which is contiguous with the address range of "A300H" to "A3FCH", is an unused area, and the areas of each successive address in the address range of "A400H" to "A4FFH" are set as the non-specific control stack area 284. The relationship between each area and address as described above is set both in terms of physical addresses in the primary RAM 224 and logical addresses on the memory map recognized by the primary MPU 222.

As described above, by separately setting the work area 281 for specific control and the work area 283 for non-specific control, different areas of the main RAM 224 are used when performing various calculations, etc., when the main MPU 222 executes specific control and when it executes non-specific control. This makes it less likely that information in the main RAM 224 needed for specific control or non-specific control will be erased when the other control is executed.

By separately defining the stack area 282 for specific control and the stack area 284 for non-specific control, different areas of the main RAM 224 are used when saving information stored in the main MPU 222's registers and when storing program return address information, depending on whether the main MPU 222 is executing specific control or non-specific control. This makes it less likely that information used in the other control will be erased when saving information stored in the main MPU 222's registers or storing program return address information while one of the two controls is being executed. Incidentally, the main MPU 222 issues a push command (the PUSH command described below) to write information to each stack area 282, 284, and the main MPU 222 issues a pop command (the POP command described below) to read information from each stack area 282, 284. Furthermore, when reading information from each stack area 282, 284, the information written to the stack area 282, 284 later is read first.

Here, when the main MPU 222 executes processing corresponding to specific control, the main MPU 222 can write information to the work area 281 for specific control and the stack area 282 for specific control, and can read information from the work area 281 for specific control and the stack area 282 for specific control. On the other hand, when the main MPU 222 executes processing corresponding to specific control, the main MPU 222 can read information from the work area 283 for non-specific control and the stack area 284 for non-specific control, but cannot write information to the work area 283 for non-specific control and the stack area 284 for non-specific control. This makes it possible to prevent information used in processing corresponding to non-specific control from being accidentally erased when processing corresponding to specific control is being executed.

Furthermore, when the main MPU 222 executes processing corresponding to non-specific control, the main MPU 222 can write information to the non-specific control work area 283 and the non-specific control stack area 284, and can read information from the non-specific control work area 283 and the non-specific control stack area 284. On the other hand, when the main MPU 222 executes processing corresponding to non-specific control, the main MPU 222 can read information from the specific control work area 281 and the specific control stack area 282, but cannot write information to the specific control work area 281 and the specific control stack area 282. This makes it possible to prevent information used in processing corresponding to specific control from being accidentally erased when processing corresponding to non-specific control is being executed.

Backup power is supplied to the main RAM 224 even after power to the pachinko machine 160 is cut off, and this backup power is supplied to all of the specific control work area 281, the specific control stack area 282, the non-specific control work area 283, and the non-specific control stack area 284. As a result, the information stored in the specific control work area 281, the specific control stack area 282, the non-specific control work area 283, and the non-specific control stack area 284 is retained as long as backup power is supplied, even after power to the pachinko machine 160 is cut off. On the other hand, in a power-off state, backup power is not supplied to the setting register group 256, the monitoring and control register group 257, the first register group 265, the second register group 266, the I register 267, the R register 268, and the program counter 269. When the supply of operating power to the pachinko machine 160 begins, the setting register group 256, monitoring and control register group 257, first register group 265, second register group 266, I register 267, R register 268, and program counter 269 are initialized. The contents of these initial settings will be described later.

The stack pointer 279 of the first register group 265 is an area where address information is set, allowing the main CPU 251 to identify the storage area in the specific control stack area 282 to which information is to be written in response to a push command. Each time a push command is executed, the information in the stack pointer 279 is updated to the address information of the storage area to be written next, and each time a pop command is executed, the information in the stack pointer 279 is updated to the address information of the storage area to be written previous. When the specific control stack area 282 is used, the information to be stored is stored starting from the storage area with the last address in the specific control stack area 282, and each time new information to be stored is added, the storage area to be stored is changed toward the first address in the specific control stack area 282. Note that an alternative configuration is also possible in which the information to be stored is stored starting from the storage area with the first address in the specific control stack area 282, and each time new information to be stored is added, the storage area to be stored is changed toward the last address in the specific control stack area 282.

The only stack pointer associated with the specific control stack area 282 is stack pointer 279 of the first register group 265, and no auxiliary register is associated with stack pointer 279 in the first register group 265. If multiple stack pointers (specifically, stack pointer 279 and the auxiliary register associated with stack pointer 279) were associated with a single stack area, the specific control stack area 282, processing would be required to coordinate updates of the storage areas to be written to in the specific control stack area 282 among the multiple stack pointers, complicating the processing configuration for using the specific control stack area 282. In contrast, by having only stack pointer 279 of the first register group 265 as the only stack pointer associated with the specific control stack area 282, the processing configuration for using the specific control stack area 282 is simplified.

The stack pointer 309 of the second register group 266 is an area where address information is set, allowing the main CPU 251 to identify the storage area in the non-specific control stack area 284 to which information is to be written in response to a push command. Each time a push command is executed, the information in the stack pointer 309 is updated to the address information of the storage area to be written next, and each time a pop command is executed, the information in the stack pointer 309 is updated to the address information of the storage area to be written previous. When the non-specific control stack area 284 is used, the information to be stored is stored starting from the storage area with the last address in the non-specific control stack area 284, and each time new information to be stored is added, the storage area to be stored is changed toward the first address in the non-specific control stack area 284. Note that an alternative configuration is also possible in which the information to be stored is stored starting from the storage area with the first address in the non-specific control stack area 284, and each time new information to be stored is added, the storage area to be stored is changed toward the last address in the non-specific control stack area 284.

The only stack pointer associated with the non-specific control stack area 284 is stack pointer 309 of the second register group 266, and no auxiliary register is associated with stack pointer 309 in the second register group 266. If multiple stack pointers (specifically, stack pointer 309 and the auxiliary register associated with stack pointer 309) were associated with a single stack area, the non-specific control stack area 284, processing would be required to coordinate updates to the storage areas to be written to in the non-specific control stack area 284 among the multiple stack pointers, complicating the processing configuration for using the non-specific control stack area 284. In contrast, by having stack pointer 309 of the second register group 266 as the only stack pointer associated with the non-specific control stack area 284, the processing configuration for using the non-specific control stack area 284 is simplified.

As described above, a stack pointer 279 corresponding to the specific control stack area 282 used in specific control processing is provided in the first register group 265, and a stack pointer 309 corresponding to the non-specific control stack area 284 used in non-specific control processing is provided in the second register group 266. As a result, when transitioning from a situation in which specific control processing is being executed to a situation in which non-specific control processing is being executed, the register group to be used is switched from the first register group 265 to the second register group 266, thereby eliminating the need to perform additional processing to switch the stack pointers 279, 309 to be used, and allowing the stack pointer 309 in the second register group 266 corresponding to the non-specific control stack area 284 used in the non-specific control processing to become the target of use. Furthermore, when transitioning from a situation in which non-specific control processing is being executed to a situation in which specific control processing is being executed, the register group to be used is switched from the second register group 266 to the first register group 265, thereby eliminating the need to perform additional processing to switch the stack pointers 279, 309 to be used, and making it possible to use the stack pointer 279 of the first register group 265 corresponding to the specific control stack area 282 used in the specific control processing. Furthermore, it is possible to prevent a mismatch from occurring between the stack areas 282, 284 to be used and the stack pointers 279, 309 to be used.

Figure 159(b) is an explanatory diagram illustrating the initial values of the IX registers 275, 305, the IX' registers 295, 315, the IY registers 276, 306, and the IY' registers 296, 316. As shown in Figure 159(b), in the first register group 265, the IX register 275 is set to an initial value of "1000H" (first reference address for identification), the IY register 276 is set to an initial value of "1100H" (second reference address for identification), the IX' register 295 is set to an initial value of "1200H" (third reference address for identification), and the IY' register 296 is set to an initial value of "1300H" (fourth reference address for identification).

When using the first reference address for identification ("1000H"), an address range of "1000H" to "10FFH" can be specified by setting 1 byte of difference information ("00H" to "FFH") in the command, and when using the second reference address for identification ("1100H"), an address range of "1100H" to "11FFH" can be specified by setting 1 byte of difference information ("00H" to "FFH") in the command. Furthermore, when using the third reference address for identification ("1200H"), the address range of "1200H" to "12FFH" can be specified by setting one byte of difference information ("00H" to "FFH") in the command, and when using the fourth reference address for identification ("1300H"), the address range of "1300H" to "13FFH" can be specified by setting one byte of difference information ("00H" to "FFH") in the command.

When addressing using the first identification reference address ("1000H") during specific control processing is switched to addressing using the third identification reference address ("1200H"), the exchange command (1-byte command) "EX IX, IX'" is executed to save the information about the first identification reference address stored in the IX register 275 to the IX' register 295, and to read the information about the third identification reference address stored in the IX' register 295 into the IX register 275. Then, with the information about the third identification reference address stored in the IX register 275, it becomes possible to perform addressing using the third identification reference address. Furthermore, when switching from a situation in which addressing is performed using the third base address for identification to a situation in which addressing is performed using the first base address for identification, by executing an exchange instruction (one-byte instruction) such as "EX IX, IX'," the information on the third base address for identification stored in the IX register 275 can be saved to the IX' register 295, and the information on the first base address for identification stored in the IX' register 295 can be read into the IX register 275. Then, with the information on the first base address for identification stored in the IX register 275, addressing using the first base address for identification becomes possible. In this way, by using an exchange instruction to switch the base address available in the IX register 275, the number of instructions and the data size of the instructions to be set in the program for enabling addressing using the base address after the switch can be reduced, compared to a configuration in which an instruction to save the base address that was to be used before the switch and an instruction to set the base address that will be used after the switch in the IX register 275 are executed. So far, we have explained the effects of a configuration that switches between the usable first and third base addresses for identification using the IX register 275 and IX' register 295 of the first register group 265, but the same effects can be achieved with a configuration that switches between the usable second and fourth base addresses for identification using the IY register 276 and IY' register 296 of the first register group 265.

In this way, by specifying an address using the reference address stored in the IX register 275 or IY register 276, it is possible to reduce the data volume of the information set in the command to specify an address included in the address range of "1000H" to "13FFH", which is part of the address range ("1000H" to "1FFCH") in which specific control data is set in the main ROM 223.

As shown in FIG. 159(b), in the second register group 266, the IX register 305 is set to an initial value of "3000H" (first non-specific reference address), the IY register 306 is set to an initial value of "3100H" (second non-specific reference address), the IX' register 315 is set to an initial value of "3200H" (third non-specific reference address), and the IY' register 316 is set to an initial value of "3300H" (fourth non-specific reference address).

When using the first non-specific reference address ("3000H"), the address range of "3000H" to "30FFH" can be specified by setting 1 byte of difference information ("00H" to "FFH") in the command, and when using the second non-specific reference address ("3100H"), the address range of "3100H" to "31FFH" can be specified by setting 1 byte of difference information ("00H" to "FFH") in the command. Furthermore, when using the third non-specific reference address ("3200H"), the address range of "3200H" to "32FFH" can be specified by setting one byte of difference information ("00H" to "FFH") in the command, and when using the fourth non-specific reference address ("3300H"), the address range of "3300H" to "33FFH" can be specified by setting one byte of difference information ("00H" to "FFH") in the command.

When addressing using the non-specific control process switches from using the non-specific first base address ("3000H") to using the non-specific third base address ("3200H"), the information for the non-specific first base address stored in the IX register 305 can be saved to the IX' register 315 by executing the exchange command "EX IX, IX'" (one-byte command), and the information for the non-specific third base address stored in the IX' register 315 can be read into the IX register 305. Then, with the information for the non-specific third base address stored in the IX register 305, it becomes possible to perform addressing using the non-specific third base address. Furthermore, when switching from a situation in which addressing is performed using the non-identification third base address to a situation in which addressing is performed using the non-identification first base address, by executing an exchange instruction (one-byte instruction) such as "EX IX, IX'," the information on the non-identification third base address stored in the IX register 305 can be saved to the IX' register 315, and the information on the non-identification first base address stored in the IX' register 315 can be read into the IX register 305. Then, with the information on the non-identification first base address stored in the IX register 305, addressing using the non-identification first base address becomes possible. In this way, by using an exchange instruction to switch the base address available in the IX register 305, the number of instructions and the data size of the instructions to be set in the program for enabling addressing using the base address after the switch can be reduced, compared to a configuration in which an instruction to save the base address that was to be used before the switch and an instruction to set the base address that will be used after the switch in the IX register 305 are executed. So far, we have explained the effects of a configuration that switches between the usable first non-specific base address and the usable third non-specific base address using the IX register 305 and IX' register 315 of the second register group 266, but the same effects can be achieved with a configuration that switches between the usable second non-specific base address and the usable fourth non-specific base address using the IY register 306 and IY' register 316 of the second register group 266.

In this way, by specifying an address using the reference address stored in the IX register 305 or IY register 306, it is possible to reduce the data volume of the information set in the command to specify an address included in the address range of "3000H" to "33FFH", which is part of the address range ("3000H" to "3FFCH") in which non-specific control data is set in the main ROM 223.

Incidentally, the main MPU 222 can change the address range that can be specified using the IX registers 275, 305 or IY registers 276, 306 by changing the values of the IX registers 275, 305 or IY registers 276, 306 from their initial values.

Figure 159(c) is an explanatory diagram illustrating the initial values of the K registers 277, 307, the K' registers 297, 317, and the V registers 278, 308. As shown in Figure 159(c), when the supply of operating power to the main MPU 222 is started and the first register group 265 is initialized, the K register 277 in the first register group 265 is set to "A0H" (first upper reference address information for identification), which is the most significant byte of the first address range in the work area 281 for specific control, and the K' register 297 is set to "A1H" (second upper reference address information for identification), which is the most significant byte of the second address range in the work area 281 for specific control.

When using the upper first reference address information for identification ("A0H"), the address range of "A000H" to "A0FFH" can be specified by setting the lower 1 byte of information ("00H" to "FFH") in the instruction, and when using the upper second reference address information for identification ("A1H"), the address range of "A100H" to "A1FFH" can be specified by setting the lower 1 byte of information ("00H" to "FFH") in the instruction.

When processing specific control, if addressing is switched from using the specific upper first base address information ("A0H") to using the specific upper second base address information ("A1H"), the "EX K,K'" exchange command (1-byte command) can be executed to save the specific upper first base address information stored in the K register 277 to the K' register 297, and read the specific upper second base address information stored in the K' register 297 into the K register 277. Then, with the specific upper second base address information stored in the K register 277, it becomes possible to perform addressing using the specific upper second base address information. Furthermore, when switching from addressing using the second upper reference address information for identification to addressing using the first upper reference address information for identification, executing the exchange instruction (1-byte instruction) "EX K,K'" can save the second upper reference address information for identification stored in the K register 277 to the K' register 297 and read the first upper reference address information for identification stored in the K' register 297 into the K register 277. Then, with the first upper reference address information for identification stored in the K register 277, addressing using the first upper reference address information for identification becomes possible. In this way, by switching the base address information available in the K register 277 using an exchange instruction, the number of instructions and the data size of the instructions required to set up a program that enables addressing using the base address information after the switch can be reduced compared to a configuration that executes an instruction to save the base address information that was being used before the switch and an instruction to set the base address information that will be used after the switch in the K register 277.

As shown in Figure 159 (c), when the supply of operating power to the main MPU 222 is started and the second register group 266 is initialized, the K register 307 in the second register group 266 is set to "A3H" (unspecified upper base address information), which is the most significant byte of the work area 283 for unspecified control, and the K' register 317 is set to "A1H" (specified upper second base address information), which is the most significant byte of the second address range in the work area 281 for unspecified control. When using the unspecified upper base address information ("A3H"), the address range of "A300H" to "A3FFH" can be specified by setting the 1-byte difference information ("00H" to "FFH") in the instruction. Furthermore, as already explained, when using the upper second reference address information for identification ("A1H"), the address range of "A100H" to "A1FFH" can be specified by setting the lower 1 byte of information ("00H" to "FFH") in the command.

When switching from addressing using non-specific upper base address information ("A3H") to addressing using specific upper second base address information ("A1H") during non-specific control processing, by executing the exchange instruction (1-byte instruction) "EX K,K'", the non-specific upper base address information stored in the K register 307 can be saved to the K' register 317, and the specific upper second base address information stored in the K' register 317 can be read into the K register 307. Then, with the specific upper second base address information stored in the K register 307, it becomes possible to perform addressing using the specific upper second base address information. Furthermore, when switching from addressing using the upper second base address information for identification to addressing using the upper non-identification base address information, executing the exchange instruction (1-byte instruction) "EX K,K'" can save the upper second base address information for identification stored in the K register 307 to the K' register 317 and read the upper non-identification base address information stored in the K' register 317 into the K register 307. Then, with the upper non-identification base address information stored in the K register 307, addressing using the upper non-identification base address information becomes possible. In this way, by switching the base address information available in the K register 307 using an exchange instruction, the number of instructions and the data size of the instructions required to set up a program capable of addressing using the base address information after the switch can be reduced compared to a configuration that executes an instruction to save the base address information to be used before the switch and an instruction to set the base address information to be used after the switch in the K register 307.

The upper byte of the address range ("A300H" to "A3FCH") in which the work area 283 for non-specific control is set is only "A3H". Also, as already explained, during non-specific control processing, the information in the work area 281 for specific control cannot be rewritten, but the information in the work area 281 for specific control can be read. By setting the K' register 317 of the second register group 266 used during non-specific control processing to the upper second reference address information for specific control ("A1H") as the initial value, it is possible to easily use the LDK instruction when reading information from the second address range in the work area 281 for specific control during non-specific control processing.

As already explained, registers included in the setting register group 256 are set in the area of each consecutive address in the address range of "AA00H" to "AAFCH," and registers included in the monitoring and control register group 257 are set in the area of each consecutive address in the address range of "AB00H" to "ABCFH." Also, as already explained, the V register 278 is used to specify the address of the register to which data is to be set in an instruction (specifically, an OUT instruction) for setting data in a register included in the setting register group 256 or the monitoring and control register group 257, and is also used to specify the address of the register from which data is to be read in an instruction (specifically, an IN instruction) for reading data from a register included in the setting register group 256 or the monitoring and control register group 257.

Specific control processing involves setting data in the setting register group 256, setting data in the monitoring and control register group 257, and reading data from the monitoring and control register group 257. The most significant byte of the address range of the setting register group 256 accessed in specific control processing is "AAH" (first upper reference address information for registers), and the most significant byte of the address range of the monitoring and control register group 257 is "ABH" (second upper reference address information for registers). The processing for setting data in the setting register group 256 is processing that is executed only during initial configuration, which is performed based on the start of the supply of operating power to the pachinko machine 160 (register setting processing in step S8702 or step S8711, described below). The data set in the setting register group 256 during this initial configuration must not be changed after this initial configuration. For this reason, the upper byte of address information set in the V register 278 of the first register group 265 after this initial setting is fixed at "ABH", and there is no need to save this upper byte of address information "ABH" during specific control processing. For this reason, no auxiliary register corresponding to the V register 278 is provided in the first register group 265.

In non-specific control processing, data is set in the monitoring and control register group 257, and data is read from the monitoring and control register group 257. The most significant byte of the address range of the monitoring and control register group 257 accessed in non-specific control processing is "ABH". The most significant byte of address information set in the V register 308 of the second register group 266 is fixed to "ABH", and there is no need to save the most significant byte of address information "ABH" in non-specific control processing. For this reason, no auxiliary register corresponding to the V register 308 is provided in the second register group 266.

As shown in FIG. 159(c), the V register 278 of the first register group 265 is initially set to "AAH" (first upper reference address information for registers), which is the most significant byte of the setting register group 256. By using the V register 278 in specific control processing, the data size of the information set in an instruction (specifically, an OUT instruction) to specify the address of a register included in the setting register group 256 can be reduced. Furthermore, the V register 308 of the second register group 266 is initially set to "ABH" (second upper reference address information for registers), which is the most significant byte of the monitoring and control register group 257. By using the V register 308 in non-specific control processing, the data size of the information set in an instruction (specifically, an IN instruction or an OUT instruction) to specify the address of a register included in the monitoring and control register group 257 can be reduced.

As mentioned above, the main CPU 251 is provided with an I register 267, an R register 268, and a program counter 269 (Figure 158). The I register 267 is a register used to specify the start address of the program for the interrupt process (specifically, timer interrupt process) corresponding to the interrupt cause when that interrupt cause occurs. The I register 267 stores 8-bit data used to specify the start address of the program corresponding to the interrupt process that is started when an interrupt cause occurs. One I register 267 is provided for the main CPU 251. Details of the configuration for specifying the start address of the program for the interrupt process corresponding to the interrupt cause that occurred will be described later.

The R register 268 stores 8-bit numerical information. The value of the R register 268 is updated by adding 1 each time the main CPU 251 reads an instruction stored in the main ROM 223 to execute it. The maximum value of the R register 268 is 255, and if the R register 268 is updated while the maximum value is stored in the R register 268, the value of the R register 268 becomes 0. In this embodiment, when reserved information on the normal map is obtained based on the occurrence of a win at the through gate 195, the numerical information updated in the R register 268 is stored in the normal map reserved area 224c as a random number to be used in the normal map hit/fail determination process. The numerical information obtained from the R register 268 is then used to execute the normal map hit/fail determination process. The program counter 269 stores address information for the program in which the next instruction to be executed is stored.

One R register 268 is provided for the main CPU 251. The main CPU 251 can obtain and use the value of the R register 268 in both situations where specific control processing is being executed and where non-specific control processing is being executed. In this embodiment, the numerical information updated in the R register 268 is obtained as a random number value for the lottery and is used in the general win/loss determination processing. The numerical information stored in the R register 268 is updated in both situations where the main CPU 251 is executing an instruction corresponding to specific control processing and where the main CPU 251 is executing an instruction corresponding to non-specific control processing. If the numerical information stored in R register 268 were configured to be updated only in one of the situations where the main CPU 251 is executing an instruction corresponding to specific control processing, or where the main CPU 251 is executing an instruction corresponding to non-specific control processing, the value of R register 268 would not be updated in the other of these two situations, and when the value of R register 268 is used as a random number for a lottery, bias would be likely to occur in the random number. In contrast, by configuring the value of R register 268 to be updated regardless of whether the processing being executed by the main CPU 251 is specific control processing or non-specific control processing, bias is likely to occur in the random number when the value of R register 268 is used as a random number for a lottery, preventing bias from occurring when the value of R register 268 is used as a random number for a lottery.

The program contains a single instruction execution unit. Specific control processing and non-specific control processing are not performed in parallel. Non-specific control processing is not performed when specific control processing is being performed, and specific control processing is not performed when non-specific control processing is being performed. In such a configuration, if a program counter used for non-specific control processing is provided as a program counter separate from the program counter used for specific control processing, specific control processing can only switch from specific control to non-specific control, and when the switch occurs, non-specific control processing begins from the address stored in the program counter for non-specific control. In contrast, by using a common program counter 269 for specific control processing and non-specific control processing, when non-specific control processing is read during specific control processing, it is possible to specify the processing to be executed first during that non-specific control.

As described above, the main CPU 251 has only one I register 267, one R register 268, and one program counter 269, and these registers 267-269 are used in common when specific control processing is executed and when non-specific control processing is executed. This simplifies the configuration of the main CPU 251 compared to a configuration in which the I register, R register, or program counter used in non-specific control processing is provided as a separate register from the I register 267, R register 268, or program counter 269 used in specific control processing.

<Electrical configuration for performing various lotteries in the main MPU 222>
Next, the electrical configuration for performing various lotteries in the main MPU 222 will be explained using Figure 160.

During play, the main MPU 222 uses various counter information to perform the winning lottery, set the display of the special symbol display units 197a and 197b, and set the symbol display on the symbol display unit 199. Specifically, as shown in FIG. 160, it uses a winning random number counter C1 used to perform the winning lottery, a type random number counter C2 used to determine the type of jackpot result and the type of time-saving result, a reach random number counter C3 used to perform the reach lottery when the symbol display unit 199 misses and changes, a random number initial value counter CINI used to set the initial value of the winning random number counter C1, and a change type counter CS that determines the change display period on the special symbol display units 197a and 197b and the symbol display unit 199. The above counters C1 to C3, CINI, and CS are provided in the various counter area 224b of the main RAM 224. Details will be described later, but the lottery for determining whether or not the normal power feature 194a of the second operating port 194 will be set to the normal power release state uses numerical information obtained from the R register 268, described later, which is provided in the main CPU 251. As a result, the number of timer counters in the main RAM 224 is reduced compared to a configuration in which the timer counters used for the lottery for determining whether or not the normal power feature 194a of the second operating port 194 will be set to the normal power release state are provided in the main RAM 224.

Each counter provided in the various counter area 224b (specifically, the hit random number counter C1, type random number counter C2, reach random number counter C3, random number initial value counter CINI, and variable type counter CS) is a loop counter that adds 1 to the previous value each time it is updated and returns to "0" after reaching its maximum value. Each counter is updated at short intervals. Information corresponding to the hit random number counter C1, type random number counter C2, and reach random number counter C3 is stored in the special chart reserve area 224a provided in the main RAM 224 when a win occurs in the first actuation port 193 or second actuation port 194. The special chart reserve area 224a comprises a first special chart reserve area 321, a second special chart reserve area 322, and an execution area 323 for special charts.

The first special symbol reserve area 321 comprises a first area 321a, a second area 321b, a third area 321c, and a fourth area 321d. The numerical information for the hit random number counter C1, the type random number counter C2, and the reach random number counter C3 is stored in one of the areas 321a-321d as first reserved information in accordance with the winning history of the first actuation port 193. In this case, if multiple consecutive wins into the first actuation port 193 occur, the numerical information is stored in the first area 321a-4th area 321d in chronological order: first area 321a → second area 321b → third area 321c → fourth area 321d. By providing four areas 321a-321d in this way, up to four winning ball entries into the first actuation port 193 can be reserved and stored.

The second special symbol reserve area 322 comprises a first area 322a, a second area 322b, a third area 322c, and a fourth area 322d. Numerical information for the hit random number counter C1, the type random number counter C2, and the reach random number counter C3 is stored in one of the areas 322a-322d as second reserved information in accordance with the winning history of the second actuation port 194. In this case, if multiple consecutive wins into the second actuation port 194 occur, the numerical information is stored in the first area 322a-4 areas 322d in chronological order: first area 322a → second area 322b → third area 322c → fourth area 322d. By providing four areas 322a-322d in this way, up to four winning history records of game balls entering the second actuation port 194 can be reserved and stored.

The execution area 323 for special symbols is an area where reserved information for targets for which hit/miss judgments and allocation judgments are made is stored when variable display is started on either of the special symbol display units 197a, 197b. Specifically, when variable display on the first special symbol display unit 197a is started, the reserved information stored in the first area 321a of the first special symbol reserve area 321 is moved to the execution area 323 for special symbols. On the other hand, when variable display on the second special symbol display unit 197b is started, the reserved information stored in the first area 322a of the second special symbol reserve area 322 is moved to the execution area 323 for special symbols.

Information corresponding to the R register 268 (Figure 158) is stored in the normal ball reserve area 224c when a winning ball enters the through gate 195. The normal ball reserve area 224c comprises a first area 324a, a second area 324b, a third area 324c, and a fourth area 324d. Numerical information obtained from the R register 268 is stored in one of the areas 324a-324d as reserved information on the normal ball side according to the winning history of the through gate 195. In this case, when multiple consecutive winning balls enter the through gate 195, the numerical information is stored in the first area 324a-4 area 324d in chronological order: first area 324a → second area 324b → third area 324c → fourth area 324d. By providing four areas 324a-324d in this way, up to four winning ball records for the through gate 195 can be reserved and stored.

The regular map reserve area 224c has an execution area 325 for regular maps. The execution area 325 for regular maps is an area where reserved information for which regular map accuracy determination processing is performed is stored when the regular map display unit 198a starts displaying changes. Specifically, when the regular map display unit 198a starts displaying changes, the reserved information stored in the first area 324a of the regular map reserve area 224c is moved to the execution area 325 for regular maps.

First, let us explain the R register 268. The R register 268 is configured to increment by one within the range of "0" to "255", and return to "0" after reaching its maximum value. The value of the R register 268 is stored in the normal map holding area 224c when the game ball enters the through gate 195. Then, at a predetermined timing, a normal map hit/miss determination process is performed to determine whether or not to control the normal power device 194a to an open state based on the stored value of the R register 268.

As already explained, this pachinko machine 160 has multiple support modes set so that the support provided by the normal power device 194a differs from one another. The support modes are set to a high-frequency support mode and a low-frequency support mode so that the frequency per unit time at which the normal power device 194a of the second operating port 194 opens is relatively high or low when compared under conditions in which game balls are continuously being released into the game area PA in the same manner. In addition, a first high-frequency support mode and a second high-frequency support mode are set as high-frequency support modes.

When the normal play win/loss determination process is executed to determine by lottery whether the normal play device 194a will be in the open normal play state, there are two determination modes: a normal play high probability mode and a normal play low probability mode, so that the probability of winning the electric play win is relatively high. In the normal play low probability mode, the probability of winning the electric play win in one normal play win/loss determination process is 1/2, while in the normal play high probability mode, the probability of winning the electric play win in one normal play win/loss determination process is 4/5.

When the normal map pass/fail determination process is executed, the normal map display unit 198a will begin displaying changing patterns. In this case, the normal map change period, which is the duration of the change display during which the normal map display unit 198a executes the changing display of the pattern, is divided into long and short periods so that the period is relatively long and short. The long period is 10 seconds, while the short period is 1 second.

When the normal map display unit 198a's variable display cycle ends, the normal map display unit 198a displays a stop result corresponding to the judgment result of the normal map pass/fail judgment process that triggered the execution of that variable display cycle. In this case, if the judgment result of the normal map pass/fail judgment process is a miss, the normal map display unit 198a displays a stop result corresponding to the miss result, and no transition to the normal power release state occurs. If normal map hold information is stored in the normal map hold area 224c, a new normal map pass/fail judgment process is executed on the hold information on the normal map side, and a new variable display cycle begins on the normal map display unit 198a. On the other hand, if the judgment result of the normal map pass/fail judgment process is a result corresponding to a win in the electric game release, the normal map display unit 198a displays a stop result corresponding to the win result, and a transition to the normal power release state occurs.

The normal power release state has two execution modes: a high expectation mode and a low expectation mode, so that the likelihood of game balls entering the normal power device 194a is relatively high or low. In the low expectation mode, a short opening of the normal power device 194a occurs once. The short opening lasts for 0.7 seconds. As already explained, the ball launch cycle is 0.6 seconds, so when a short opening of the normal power device 194a occurs once, game balls will not generally enter the second operating port 194, and even if they do, the number of balls that do enter will be approximately one. The normal power release state also ends when the number of game balls that enter the second operating port 194 reaches 10, which is the upper limit on the normal power side. However, when a short opening occurs once, as mentioned above, even if a game ball enters the second operating port 194, it will only be approximately one, so the upper limit on the normal power side for game balls will not enter the second operating port 194.

In the high expectation mode, the normal power feature 194a will open three times. The long opening lasts for two seconds. As explained above, the ball launch cycle is 0.6 seconds, so when the normal power feature 194a opens once, approximately three balls can enter the second operating port 194. In the normal power opening state of the high expectation mode, three long openings occur, separated by an interval period (specifically, one second) on the normal power side during which the second operating port 194 is closed. Therefore, when the normal power opening state of the high expectation mode occurs, approximately nine balls can enter. As mentioned above, the normal power opening state ends when the number of balls entering the second operating port 194 reaches the upper limit on the normal power side, which is 10. Therefore, when the normal power opening state of the high expectation mode occurs, the normal power opening state may end when the upper limit on the normal power side, that is, the number of balls entering the second operating port 194, is reached.

In a configuration in which the judgment mode for the normal map correctness determination process, the normal map fluctuation period in the normal map display unit 198a, and the execution mode for the normal power release state are set as described above, in low-frequency support mode, the judgment mode for the normal map correctness determination process is a low-probability mode for the normal map, the normal map fluctuation period is long, and the execution mode for the normal power release state is a low-expectation mode in which one short release occurs. Also, in the first high-frequency support mode, the judgment mode for the normal map correctness determination process is a high-probability mode for the normal map, the normal map fluctuation period is short, and the execution mode for the normal power release state is a high-expectation mode in which three long releases occur. Also, in the second high-frequency support mode, the judgment mode for the normal map correctness determination process is a low-probability mode for the normal map, the normal map fluctuation period is short, and the execution mode for the normal power release state is a high-expectation mode in which three long releases occur. Therefore, if game balls are continuously fired in the same manner so that a winning ball enters the through gate 195, the expected rate at which the normal power feature 194a of the second operating port 194 is in an open state per unit time is highest in the first high-frequency support mode, next highest in the second high-frequency support mode, and lowest in the low-frequency support mode. Furthermore, in the low-frequency support mode, the execution mode for the normal power open state is a low-expectation mode, so in the low-frequency support mode, game balls rarely enter the second operating port 194. However, in the first and second high-frequency support modes, the execution mode for the normal power open state is a high-expectation mode, so in the first or second high-frequency support mode, it can be expected that game balls will enter the second operating port 194 in numbers greater than the upper limit of the second reserved information in the second special symbol reserved area 322.

The configuration for differentiating the expected rate at which the normal power feature 194a of the second operating port 194 is in the open state per unit time between the first high-frequency support mode and the second high-frequency support mode is not limited to the above. For example, the first high-frequency support mode may select a short period as the normal map fluctuation period, while the second high-frequency support mode may select a medium period between the short and long periods. Alternatively, the first high-frequency support mode may select three long openings as the execution mode for the normal power open state, while the second high-frequency support mode may select two long openings. Furthermore, although the determination mode for the normal map pass/fail determination process is the same in the first and second high-frequency support modes (the high-probability mode for the normal map), the first high-frequency support mode may be configured to have a higher expected rate at which the normal power feature 194a of the second operating port 194 is in the open state per unit time than the second high-frequency support mode, depending on the normal map fluctuation period or the execution mode for the normal power open state.

Next, we will explain in detail the winning random number counter C1, type random number counter C2, reach random number counter C3, random number initial value counter CINI, and variation type counter CS.

First, we will explain the winning random number counter C1. The winning random number counter C1 is configured to increment by one within the range of 0 to 9999, and return to "0" after reaching its maximum value. In particular, when the winning random number counter C1 completes one cycle, the value of the random number initial value counter CINI at that time is read as the initial value of the winning random number counter C1. Note that the random number initial value counter CINI is a loop counter similar to the winning random number counter C1 (value = 0 to 9999). The winning random number counter C1 is periodically updated, and is stored in the first special symbol holding area 321 when the gaming ball enters the first operating port 193, and in the second special symbol holding area 322 when the gaming ball enters the second operating port 194. The win/loss determination process is then performed using the numerical information of this stored winning random number counter C1.

The random number value that will result in a win during the hit/miss determination process is stored as a hit/miss table in the main ROM 223. This pachinko machine 160 has a high probability mode and a low probability mode as hit/miss lottery modes for the hit/miss determination process, in which the probability of a jackpot result is relatively high and low. In the low probability mode, the hit/miss tables referenced in the hit/miss determination process include a first hit/miss table at low probability that is referenced when the hit/miss determination process is performed on the first pending information, and a second hit/miss table at low probability that is referenced when the hit/miss determination process is performed on the second pending information. In addition, a high probability hit/miss table is provided as the hit/miss table referenced in the hit/miss determination process in the high probability mode.

The results of the hit/miss determination process include a jackpot result, a time-saving result, and a miss result. A jackpot result is a hit/miss result that triggers a transition to open/close execution mode, in which multiple rounds of play are played, and can also trigger a transition to hit/miss lottery mode and support mode. A time-saving result is a hit/miss result that does not trigger a transition to open/close execution mode or hit/miss lottery mode, but can trigger a transition to support mode. A miss result is a hit/miss result that does not trigger a transition to open/close execution mode, and does not trigger a transition to hit/miss lottery mode or support mode.

Specifically, in the first win/lose table for low probability, 54 is set as the number of numerical information pieces from the win random number counter C1 that will result in a jackpot result, 100 is set as the number of numerical information pieces from the win random number counter C1 that will result in a time-saving result, and 9846 is set as the number of numerical information pieces from the win random number counter C1 that will result in a miss result. In this way, in low probability mode, the probability of a time-saving result is higher than the probability of a jackpot result.

In addition, the second win/loss table for low probability has 54 numerical values set as the number of numerical values in the win random number counter C1 that result in a jackpot, 120 numerical values set as the number of numerical values in the win random number counter C1 that result in a time-saving result, and 9,826 numerical values set as the number of numerical values in the win random number counter C1 that result in a miss. In other words, the probability of a jackpot result is the same for the first win/loss table for low probability and the second win/loss table for low probability. In contrast, the probability that the time-saving result will be selected in the win/loss determination process is higher for the second win/loss table for low probability than for the first win/loss table for low probability. Therefore, when the win/loss lottery mode is the low-probability mode, the probability that the time-saving result will be selected is higher when the win/loss determination process is performed on the second pending information than when the win/loss determination process is performed on the first pending information.

The high probability hit/miss table has 540 numerical values set for the hit random number counter C1 that result in a jackpot, 100 numerical values set for the hit random number counter C1 that result in a time-saving result, and 9,360 numerical values set for the hit random number counter C1 that result in a miss. The high probability hit/miss table is referenced in high probability mode when the hit/miss determination process is performed on the first pending information and when the hit/miss determination process is performed on the second pending information. This makes it possible to reduce the storage capacity of the main ROM 223 required to store the hit/miss table compared to a configuration in which a hit/miss table is provided for each of the cases in which the hit/miss determination process is performed on the first pending information in high probability mode and the case in which the hit/miss determination process is performed on the second pending information in high probability mode.

The probability of a jackpot result is approximately 1/185 in low probability mode, and 10 times that, or approximately 1/18.5, in high probability mode. Thus, the probability of a jackpot result is 10 times higher in high probability mode than in low probability mode. On the other hand, the probability of a time-saving result is 1/100 in the first win/loss table for low probability and the win/loss table for high probability, and approximately 1/83 in the second win/loss table for low probability.

As mentioned above, the open/close execution mode is the period during which the number of balls a player holds increases most per unit time, and by varying the probability of a jackpot result that triggers the transition to the open/close execution mode according to the set value, it is possible to increase the player's attention to the set value.

The type random number counter C2 is configured to increment by one within the range of 0 to 29, and return to "0" after reaching its maximum value. The type random number counter C2 is updated periodically, and is stored in the first special symbol holding area 321 when a gaming ball enters the first operating port 193, and in the second special symbol holding area 322 when a gaming ball enters the second operating port 194.

In this pachinko machine 160, multiple jackpot results are set by providing differences in three conditions: the number of rounds played in the opening/closing execution mode, the win/lose lottery mode after the opening/closing execution mode ends, and the support mode after the opening/closing execution mode ends. A jackpot allocation table for the first special symbol is provided as a jackpot allocation table referenced in the jackpot allocation determination process when a jackpot result is selected in the win/lose determination process for the first reserved information. In addition, a jackpot allocation table for the second special symbol is provided as a jackpot allocation table referenced in the jackpot allocation determination process when a jackpot result is selected in the win/lose determination process for the second reserved information.

The jackpot allocation table for the first special symbol and the jackpot allocation table for the second special symbol have three types of jackpot results set: a 5R low probability result, a 5R high probability result, and a 10R high probability result. As already explained, a 5R low probability result occurs when the win/loss determination process determines a jackpot result and the result is selected in the jackpot allocation determination process. A 5R low probability result is a jackpot result in which the number of rounds played in the opening and closing execution mode is five, the win/loss lottery mode after the opening and closing execution mode ends becomes the low probability mode, and the support mode after the opening and closing execution mode ends becomes the first high frequency support mode. In this case, the low probability mode continues at least until the next opening and closing execution mode occurs. Furthermore, the first high frequency support mode ends when 100 play times have been played without a new opening and closing execution mode occurring. When 100 play times have been played, the support mode becomes the low frequency support mode.

As already explained, a 5R high probability result occurs when the hit/miss determination process results in a jackpot result and the result is selected in the jackpot allocation determination process. A 5R high probability result is a jackpot result in which the number of rounds played in the open/close execution mode is 5, the hit/miss lottery mode after the open/close execution mode ends becomes high probability mode, and the support mode after the open/close execution mode ends becomes first high frequency support mode. In this case, the high probability mode and first high frequency support mode end when 100 play times have been played without a new open/close execution mode occurring. When 100 play times have been played, the hit/miss lottery mode becomes low probability mode, and the support mode becomes low frequency support mode.

As already explained, a 10R high probability result occurs when the hit/miss determination process results in a jackpot result and the result is selected in the jackpot allocation determination process. A 10R high probability result is a jackpot result in which the number of rounds of play in the opening and closing execution mode is 10, the hit/miss lottery mode after the opening and closing execution mode ends becomes high probability mode, and the support mode after the opening and closing execution mode ends becomes first high frequency support mode. In this case, the high probability mode and first high frequency support mode end when 100 play times have been played without a new opening and closing execution mode occurring. When 100 play times have been played, the hit/miss lottery mode becomes low probability mode, and the support mode becomes low frequency support mode.

Not only are there multiple types of jackpot results set, but there are also multiple types of time-saving results set. When a time-saving result is selected in the hit/miss determination process, the type of time-saving result is determined by lottery using the type random number counter C2 used to determine the type of jackpot result by lottery. A time-saving allocation table for the first special symbol is provided as a time-saving allocation table referenced in the time-saving allocation determination process when a time-saving result is selected in the hit/miss determination process for the first pending information. Furthermore, a time-saving allocation table for the second special symbol is provided as a time-saving allocation table referenced in the time-saving allocation determination process when a time-saving result is selected in the hit/miss determination process for the second pending information. In each time-saving allocation table, a first time-saving result and a second time-saving result are set as the type of time-saving result.

As already explained, the first time-saving result occurs when it is determined as a time-saving result in the win/lose determination process and is selected in the time-saving allocation determination process. The first time-saving result does not trigger a transition to the open/close execution mode, nor does it trigger a transition to the win/lose lottery mode, but is a time-saving result that sets the support mode to the second high-frequency support mode. In this case, the second high-frequency support mode ends when 100 play times have been played without a new open/close execution mode occurring. When 100 play times have been played, the support mode becomes the low-frequency support mode.

As already explained, the second time-saving result occurs when it is determined as a time-saving result in the win/lose determination process and is selected in the time-saving allocation determination process. The second time-saving result does not trigger a transition to the open/close execution mode, nor does it trigger a transition to the win/lose lottery mode, but rather sets the support mode to the second high-frequency support mode. In this case, the second high-frequency support mode ends when 150 play times have been played without a new open/close execution mode occurring. When 150 play times have been played, the support mode becomes the low-frequency support mode. In other words, the second time-saving result results in a greater number of play times during which the second high-frequency support mode continues than the first time-saving result. Therefore, the second time-saving result is more advantageous to the player than the first time-saving result.

Next, the reach random number counter C3 will be explained. The reach random number counter C3 is configured to increment by one within a range of, for example, 0 to 238, and return to "0" after reaching its maximum value. The reach display is executed regardless of the value of the reach random number counter C3 in a game in which the same symbol combination is ultimately displayed. Furthermore, in a game in which a time-saving result is achieved, the reach display is not executed regardless of the value of the reach random number counter C3. Furthermore, in a game in which a miss result is achieved, the reach display is executed by referencing the reach table stored in the main ROM 223 and if the reach random number counter C3 corresponds to the occurrence of the reach display.

Next, we will explain the change type counter CS. The change type counter CS is configured to increment by one in sequence within a range of, for example, 0 to 198, and return to "0" after reaching its maximum value. The change type counter CS is used by the main MPU 222 to determine the change display period in the special chart display units 197a, 197b and the change display period of the pattern in the pattern display device 199. The change type counter CS is repeatedly updated, and is obtained when determining the change pattern at the start of the change display in the special chart display units 197a, 197b and when the pattern display device 199 starts changing the pattern.

<Regarding various processes executed by the main MPU 222>
Next, we will explain the various processes executed to progress the game by the main MPU 222. The processes of the main MPU 222 can be broadly divided into main processes that are started when the power is turned on, and timer interrupt processes that are started periodically (every 4 msec in this embodiment).

<Main processing>
Next, the main processing executed by the main MPU 222 will be described with reference to the flowchart of FIG. 161. After the supply of operating power to the pachinko machine 160 is initiated, the main MPU 222, which will be described later, is reset, thereby prohibiting execution of the timer interrupt processing (FIG. 167). The main processing is initiated in a state in which execution of the timer interrupt processing (FIG. 167) is prohibited. Note that, among the processes in steps S8701 to S8716 in the main processing, all processes other than the initial setting processing for non-specific control called and executed in step S8713 and the base value calculation setting processing called and executed in step S8716 are executed using a program and data for specific control, and the initial setting processing for non-specific control and the base value calculation setting processing are executed using a program and data for non-specific control.

First, the power-on initialization process is executed (step S8701). In the power-on initialization process, for example, the main process is started and then waits until a predetermined waiting time (specifically, 1.2 seconds) has elapsed before proceeding to the next process. During this predetermined waiting period, the operation start and initial setting of the symbol display device 199 is completed, and the operation start and initial setting of the payout control device 217 is also completed. Then, the register setting process is executed (step S8702). In the register setting process, the first register group 265, I register 267, R register 268, setting register group 256, and monitoring control register group 257 are initialized. Details of the register setting process (step S8702) will be described later.

Then, it is determined whether the power outage flag provided in the work area 281 for specific control is set to "1" (step S8703). The power outage flag is set to "1" when power outage processing is executed in the power outage monitoring processing (step S9203) of the timer interrupt processing (Figure 167) described below. The power outage flag is a flag that allows the main MPU 222 to determine whether power outage processing was performed appropriately the previous time the power was shut off.

If the power outage flag is set to "1" (step S8703: YES), it is determined whether the checksum is normal (step S8704). Specifically, the checksum is first calculated for the specific control work area 281 and the specific control stack area 282. The checksums for the specific control work area 281 and the specific control stack area 282, which were calculated and saved in the specific control work area 281 during the power outage processing executed immediately before the supply of operating power to the main MPU 222 was stopped, are then read, and the read checksum is compared with the checksum calculated as described above during the current main processing. It is then determined whether the checksums match.

If the checksum is normal (step S8704: YES), it is determined whether the reset button 326 (see FIG. 156) on the main control board 221 has been pressed (step S8705). If the power to the pachinko machine 160 is turned on and the supply of operating power to the main MPU 222 begins while the reset button 326 is being pressed, a positive determination is made in step S8705.

If the reset button 326 is not pressed (step S8705: NO), it is determined whether the game stop flag provided in the specific control work area 281 is set to "1" (step S8706). The game stop flag is set to "1" when a magnetic abnormality is identified during the fraud response processing in step S9213 of the timer interrupt processing (FIG. 167) described below, or when an abnormality is identified in the communication path used to pay out game balls based on the prize ball command during the payout output processing in step S9220. If the game stop flag is not set to "1" (step S8706: NO), the power outage flag is cleared to "0" (step S8707), and a normal return command is sent to the sound/light side MPU 233 (step S8708). By receiving the normal return command, the acousto-optical side MPU 233 determines that the processing at the start of the supply of operating power (steps S8701 to S8713) in the main side MPU 222 has ended, and also determines that the RAM clear processing (steps S8709 to S8710) described below has not been executed during the processing at the start of the current supply of operating power (steps S8701 to S8713).

If the power outage flag is not set to "1" (step S8703: NO), the checksums do not match (step S8704: NO), the reset button 326 has been pressed (step S8705: YES), or the game stop flag is set to "1" (step S8706: YES), RAM clear processing is executed in steps S8709 and S8710. In the RAM clear processing, initialization processing of the specific control work area 281 is first executed (step S8709). In the initialization processing of the specific control work area 281, the specific control work area 281 is cleared to "0" and initial settings are executed. As a result, the area indicating whether the win/loss lottery mode is the high probability mode is cleared to "0," so the win/loss lottery mode becomes the low probability mode regardless of the win/loss lottery mode immediately before the supply of operating power to the pachinko machine 160 was stopped. Furthermore, a state in which no game rounds are being played and the open/close execution mode are not being executed is entered. Furthermore, the normal map display unit 198a is not displaying any changes, and the normal power device 194a is closed. The special map reserve areas 224a and 224c in the specific control work area 281 are also cleared to "0," clearing the reserve information for the first special map display unit 197a and the second special map display unit 197b, as well as the reserve information for the normal map display unit 198a. The initialization process for the specific control work area 281 (step S8709) clears the game stop flag in the specific control work area 281 to "0." The initialization process for the specific control work area 281 (step S8709) also initializes the first stack pointer area in the specific control work area 281. The first stack pointer area is an area for storing the data of the stack pointer 279 in the first register group 265 before power is shut off. When initially setting the first stack pointer area, the last address in the specific control stack area 282 is set in the first stack pointer area. As a result, the storage destination for the information to be stored in the specific control stack area 282 becomes the storage area of the last address in the specific control stack area 282.

Then, an initialization process for the specific control stack area 282 is executed (step S8710). In the initialization process for the specific control stack area 282, the specific control stack area 282 is cleared to "0". Then, similar to step S8702, the register setting process described below is executed (step S8711). In this way, when the RAM clear process (steps S8709 to S8710) is executed, the first register group 265, I register 267, R register 268, setting register group 256, and monitoring control register group 257 are initialized. This reduces the possibility of malfunction of the main MPU 222 even if power outage processing was not executed normally before the power was cut off, if the checksums do not match, or if a magnetic abnormality is detected and the game stop flag is set to "1".

In the RAM clearing process (steps S8709 to S8710), the process for clearing the non-specific control work area 283 and the non-specific control stack area 284 to "0" and the process for initializing the settings are not executed. This prevents the information used to calculate the winning ratio from being erased. Furthermore, if the power outage flag is set to "1" (step S8703: YES), the checksum is normal (step S8704: YES), the reset button 326 has not been pressed (step S8705: NO), and the game stop flag is not set to "1" (step S8706: NO), the RAM clearing process (steps S8709 to S8710) is not executed, and game play can be resumed from the state before the supply of operating power to the main MPU 222 was stopped.

After executing the register setting process in step S8711, a clear recovery command is sent to the acousto-optical side MPU 233 (step S8712). By receiving the clear recovery command, the acousto-optical side MPU 233 determines that the processing at the start of the supply of operating power (steps S8701 to S8713) in the main side MPU 222 has ended, and also determines that the RAM clear processing (steps S8709 to S8710) was executed during the current processing at the start of the supply of operating power (steps S8701 to S8713).

When the processing of step S8708 or step S8712 is executed, the CALLA instruction is used to execute the initial setting process for non-specific control (step S8713), which is a non-specific control process. Details will be described later, but when the CALLA instruction is used to start the initial setting process for non-specific control, the timer interrupt process (Fig. 167) remains disabled. Furthermore, when the initial setting process for non-specific control is terminated, the RETA instruction (described later) is executed, which enables the timer interrupt process (Fig. 167). The initial setting process for non-specific control (step S8713) will be described in detail later.

Then, a random number initial value update process is executed to update the random number initial value counter CINI provided in the work area 281 for specific control (step S8714), and a fluctuation counter update process is executed to update the fluctuation type counter CS provided in the work area 281 for specific control (step S8715). Details of the random number initial value update process (step S8714) and the fluctuation counter update process (step S8715) will be described later. Then, a base value calculation and setting process, which is a non-specific control process, is executed by a CALLA instruction (step S8716). Details will be described later, but when the base value calculation and setting process is started by a CALLA instruction, execution of the timer interrupt process (Figure 167) is prohibited. Furthermore, when the base value calculation and setting process is terminated, execution of the timer interrupt process (Figure 167) is permitted by executing the RETA instruction described later. Details of the base value calculation and setting process will be described later. After performing step S8716, the process returns to step S8714 and repeats steps S8714 to S8716.

The main MPU 222 is configured to periodically execute timer interrupt processing (Figure 167), but there will be residual time between one timer interrupt processing and the next. This residual time will vary depending on the completion time of the timer interrupt processing, but this irregular time will be used to repeatedly execute the residual processing of steps S8714 to S8716. In this respect, the residual processing can be said to be non-periodic processing that is executed irregularly.

<Composition regarding the awards>
Next, the configuration regarding winning will be described. Figure 162 is an explanatory diagram for explaining the configuration regarding the discharge of game balls that have flowed down the game area PA.

A game ball that enters any of the general winning opening 191, special electric winning device 192, first operating opening 193, second operating opening 194, and outlet 184a is discharged from the game area PA. In other words, a game ball that is launched from the game ball launching mechanism 187 and enters the game area PA is discharged from the game area PA by entering any of the general winning opening 191, special electric winning device 192, first operating opening 193, second operating opening 194, and outlet 184a. A game ball that enters any of the general winning opening 191, special electric winning device 192, first operating opening 193, second operating opening 194, and outlet 184a is guided to the back side of the game board 184.

On the back of the gaming board 184, discharge passages 331-337 are formed corresponding to the general winning opening 191, the special electric winning device 192, the first operating opening 193, the second operating opening 194, and the outlet 184a, respectively. Gaming balls that flow into the discharge passages 331-337 flow down the discharge passages 331-337 and are guided to the lower end of the gaming board 184 on the back side of the gaming board 184, where they are collected by a discharge ball collection section (not shown). The gaming balls collected by the discharge ball collection section are then discharged to a ball circulation device in the island equipment where the pachinko machine 160 is installed in the gaming hall.

Each discharge passage section 331-337 is equipped with various detection sensors 331a-337a for detecting game balls. These discharge passage sections 331-337 and detection sensors 331a-337a are described below. Because there are three general winning openings 191, there are discharge passage sections 331-333 corresponding to each of the three. The first winning opening detection sensor 331a is installed so that its detection range is located midway through the first discharge passage section 331 corresponding to the leftmost general winning opening 191. The second winning opening detection sensor 332a is installed so that its detection range is located midway through the second discharge passage section 332 corresponding to the general winning opening 191 to the right. The third winning opening detection sensor 333a is installed so that its detection range is located midway through the third discharge passage section 333 corresponding to the rightmost general winning opening 191.

A fourth discharge passage section 334 exists in correspondence with the special electric winning device 192. A special electric detection sensor 334a is provided so that a detection range exists midway through the fourth discharge passage section 334, and a gaming ball that enters the special electric winning device 192 is detected by the special electric detection sensor 334a as it passes through the fourth discharge passage section 334. A fifth discharge passage section 335 exists in correspondence with the first operating port 193. A first operating port detection sensor 335a is provided so that a detection range exists midway through the fifth discharge passage section 335, and a gaming ball that enters the first operating port 193 is detected by the first operating port detection sensor 335a as it passes through the fifth discharge passage section 335. A sixth discharge passage section 336 exists in correspondence with the second operating port 194. A second actuation port detection sensor 336a is provided so that its detection range is located midway through the sixth discharge passage section 336, and a gaming ball that enters the second actuation port 194 is detected by the second actuation port detection sensor 336a as it passes through the sixth discharge passage section 336. A seventh discharge passage section 337 exists in correspondence with the outlet 184a. An outlet detection sensor 337a is provided so that its detection range is located midway through the seventh discharge passage section 337, and a gaming ball that enters the outlet 184a is detected by the outlet detection sensor 337a as it passes through the seventh discharge passage section 337.

A gaming ball that is detected by one of the various detection sensors 331a-337a will not be detected by the other detection sensors 331a-337a. A gate detection sensor 338a is also provided for the through gate 195, and a gaming ball that passes through the through gate 195 on its way down the play area PA is detected by the gate detection sensor 338a.

The various detection sensors 331a-338a are all electromagnetic induction proximity sensors, but any sensor can be used as long as it can detect game balls individually. The various detection sensors 331a-338a are electrically connected to the main MPU 222, and the detection results of the various detection sensors 331a-338a are output to the main MPU 222. Specifically, the various detection sensors 331a-338a output a LOW level signal when they are not detecting a game ball, and output a HI level signal when they are detecting a game ball. However, this is not limited to this, and the HI and LOW relationship may be reversed.

Next, prior to explaining the register setting process (Fig. 163(b)) executed in steps S8702 and S8711 of the main process (Fig. 161), we will explain the registers provided in the setting register group 256 and the monitoring and control register group 257, and the data set in each register of the setting register group 256 and the monitoring and control register group 257 during the register setting process (Fig. 163(b)).

First, we will explain the registers related to the input port. The input port of the main MPU 222 has a total of nine input terminals, numbered input terminal 0 through input terminal 8. As already explained, the back of the game board 184 is provided with a first winning opening detection sensor 331a, a second winning opening detection sensor 332a, a third winning opening detection sensor 333a, a special power detection sensor 334a, a first operating opening detection sensor 335a, a second operating opening detection sensor 336a, an outlet detection sensor 337a, and a gate detection sensor 338a. A game ball that enters the general winning opening 191 is detected by either the first winning opening detection sensor 331a, the second winning opening detection sensor 332a, or the third winning opening detection sensor 333a. In addition, a gaming ball that enters the special electric winning device 192 is detected by the special electric detection sensor 334a, a gaming ball that enters the first operating port 193 is detected by the first operating port detection sensor 335a, a gaming ball that enters the second operating port 194 is detected by the second operating port detection sensor 336a, a gaming ball that enters the outlet 184a is detected by the outlet detection sensor 337a, and a gaming ball that passes through the through gate 195 is detected by the gate detection sensor 338a. In addition, a magnetic detection sensor (not shown) is provided on the back of the gaming board 184.

The detection signal from the first winning slot detection sensor 331a is input to the 0th input terminal, the detection signal from the second winning slot detection sensor 332a is input to the 1st input terminal, the detection signal from the third winning slot detection sensor 333a is input to the 2nd input terminal, the detection signal from the special electric detection sensor 334a is input to the 3rd input terminal, the detection signal from the first operating slot detection sensor 335a is input to the 4th input terminal, the detection signal from the second operating slot detection sensor 336a is input to the 5th input terminal, the detection signal from the outlet detection sensor 337a is input to the 6th input terminal, and the detection signal from the gate detection sensor 338a is input to the 7th input terminal. In addition, the detection signal from the magnetic detection sensor is input to the 8th input terminal.

The monitoring and control register group 257 includes a first input status monitor register and a second input status monitor register. The nth bit (n is any value between "0" and "7") of the first input status monitor register corresponds to the nth input terminal. The 0th bit of the second input status monitor register corresponds to the 8th input terminal, and the 1st through 7th bits are unused. The nth bit of the first input status monitor register is set with information corresponding to the state of the input signal at the nth input terminal corresponding to the nth bit (either "0" corresponding to a low level input signal or "1" corresponding to a high level input signal). The 0th bit of the second input status monitor register is set with information corresponding to the state of the input signal at the 8th input terminal corresponding to the 0th bit (either "0" corresponding to a low level input signal or "1" corresponding to a high level input signal). When the supply of operating power to the pachinko machine 160 is initiated and the main MPU 222 is reset, the first input status monitor register and the second input status monitor register are cleared to "0." During the register setting process (Figure 163 (b)), the first input status monitor register and second input status monitor register are not set.

The monitoring control register group 257 has a total of eight edge measurement registers, numbered 0th to 7th edge measurement registers. The nth edge measurement register (n is any value from 0 to 7) has a one-to-one correspondence with the nth input terminal. The nth edge measurement register counts the number of times the edge combination (specifically, rising edge → falling edge of the input signal) set as the detection target in the input terminal control register (described later) is detected for the signal input to the nth input terminal corresponding to the nth edge measurement register. During the register setting process (Figure 163 (b)), the 0th to 7th edge measurement registers are cleared to "0".

The setting register group 256 has a total of eight input terminal control registers, numbered 0 through 7, and a total of eight edge measurement maximum value registers, numbered 0 through 7. The nth input terminal control register (n is any number from 0 through 7) corresponds one-to-one with the nth input terminal, and the nth edge measurement maximum value register (n is any number from 0 through 7) corresponds one-to-one with the nth input terminal.

The 0th to 7th input terminal control registers are registers in which information specifying the type of edge combination to be detected at the 0th to 7th input terminals is set. Bits 0 to 1 of the nth input terminal control register (n is any value between "0" and "7") are set to information ("1") for setting the rising-to-falling edge of the input signal as the edge combination to be detected at the nth input terminal, or information ("2") for setting the falling-to-rising edge of the input signal as the edge combination to be detected at the nth input terminal. Bits 2 to 7 of the nth input terminal control register are unused. During the register setting process (Figure 163(b)), the 0th to 7th input control registers are set to information ("1"). This sets the nth edge measurement counter corresponding to the nth input terminal to increment by 1 when a rising edge is detected in the signal input to the nth input terminal followed by a falling edge is detected. This operation is performed by an internal circuit in the main MPU 222 that is provided outside the main CPU 251, and is different from the operation of the main CPU 251 executing commands set in a program stored in the main ROM 223.

In this way, by setting "1" to the 0th to 7th input control registers in the register setting process (Figure 163 (b)), the value of the edge measurement counter (one of the 0th to 7th edge measurement registers) corresponding to the ball entry section (any of the general entry ports 191, special electric entry device 192, first actuation port 193, second actuation port 194, outlet port 184a or through gate 195) is incremented by 1 based on the game ball passing through that entry section.

The nth edge measurement maximum value register (n is any value between "0" and "7") is a register in which the maximum value of the nth edge measurement register (any value between "1" and "255") is set. As previously explained, when the nth input terminal detects an edge combination (specifically, a rising edge followed by a falling edge) set as the detection target, the value of the nth edge measurement register corresponding to that nth terminal is incremented by one. When data from the nth edge measurement register is read (operation of the main CPU 251), the value of the nth edge measurement register is cleared to "0" by an internal circuit external to the main CPU 251 in the main MPU 222. Furthermore, data from the 0th to 7th edge measurement registers is read during the ball entry detection process (Figure 172), which will be described later. The ball entry detection process (Figure 172) is executed during the timer interrupt process (Figure 167), which executes every 4 milliseconds. During the ball entry detection process (FIG. 172), from the time the data in the edge measurement register is read until the data in that edge measurement register is read during the next round of the ball entry detection process (FIG. 172), the number of game balls detected by the detection sensors 331a-338a corresponding to each ball entry area is either "0" or "1." During the register setting process (FIG. 163(b)), the nth edge measurement maximum value register (n is any value from "0" to "7") is set to "1" as the maximum value of the nth edge measurement register. As a result, if the edge combination of the input signal set as the detection target (rising edge → falling edge of the input signal) is detected when the value of the nth edge measurement register is at its maximum value ("1"), "1" is not added to the value of the nth edge measurement register, and the value of the nth edge measurement register ("1") is maintained. This prevents the value of the nth edge measurement register from becoming 2 or more within 4 milliseconds due to noise.

Next, we will explain the registers related to the output ports. The output ports of the main MPU 222 are provided with a total of 13 output terminals, numbered 0 through 12. The monitoring and control register group 257 also includes a first output data register, a second output data register, and an output destination selection register. Bits 0 through 7 of the first output data register are set with information corresponding to the state of the signals output from the 0th through 7th output terminals (either "0" corresponding to a low level or "1" corresponding to a high level), while bits 0 through 1 of the second output data register are set with information corresponding to the state of the signals output from the 8th through 9th output terminals (either "0" corresponding to a low level or "1" corresponding to a high level). Bits 0 through 2 of the output destination selection register are set with information corresponding to the state of the signals output from the 10th through 12th output terminals (either "0" corresponding to a low level or "1" corresponding to a high level). Bits 2 through 7 of the second output data register and bits 3 through 7 of the output destination selection register are unused.

Bits 0 through 7 of the first output data register are set with display data to be output to the first special chart display unit 197a, the second special chart display unit 197b, the first special chart reserved display unit 197c, the second special chart reserved display unit 197d, the regular chart display unit 198a, or the regular chart reserved display unit 198b. Bits 0 through 2 of the output destination selection register are set with one of the following: "1" to specify that the output destination of the display data output from output terminals 0 through 7 is the first special chart display unit 197a; "2" to specify that the output destination is the second special chart display unit 197b; "3" to specify that the output destination is the first special chart reserved display unit 197c; "4" to specify that the output destination is the second special chart reserved display unit 197d; "5" to specify that the output destination is the regular chart display unit 198a; or "6" to specify that the output destination is the regular chart reserved display unit 198b. Additionally, in the second output data register, the 0th bit is set to information to be output to the special power driver 192b, and the 1st bit is set to information to be output to the regular power driver 194b.

When the supply of operating power to the pachinko machine 160 begins and the main MPU 222 is reset, the first output data register, second output data register, and output destination selection register are cleared to "0." This causes the first special symbol display unit 197a, second special symbol display unit 197b, first special symbol reserve display unit 197c, second special symbol reserve display unit 197d, normal symbol display unit 198a, and normal symbol reserve display unit 198b to be hidden. In addition, the special electric winning device 192 is closed, and the normal electric device 194a of the second operating port 194 is closed. In the register setting process (Figure 163 (b)), the first output data register, second output data register, and output destination selection register are not set.

Next, the registers related to the main RAM 224 will be described. The monitoring control register group 257 includes an access control register. The access control register is a register for permitting or prohibiting access to the main RAM 224. A state in which the value of bit 0 of the access control register is "0" corresponds to a state in which access to the main RAM 224 is prohibited, and a state in which the value of bit 0 of the access control register is "1" corresponds to a state in which access to the main RAM 224 is permitted. Bits 1 to 7 of the access control register are unused. A state in which access to the main RAM 224 is prohibited means that reading information from the main RAM 224 and writing information to the main RAM 224 are prohibited, and a state in which access to the main RAM 224 is permitted means that reading information from the main RAM 224 and writing information to the main RAM 224 are permitted. By prohibiting access to the main RAM 224, it is possible to prevent data in the main RAM 224 from being destroyed due to abnormal access to the main RAM 224 or noise.

When the supply of operating power to the pachinko machine 160 begins and the main MPU 222 is reset, the value of bit 0 in the access control register is set to "0", meaning that access to the main RAM 224 is prohibited. In the register setting process (Figure 163 (b)), bit 0 of the access control register is set to "1". This allows access to the main RAM 224.

Next, we will explain the registers related to interrupt processing. In this embodiment, timer interrupt processing (Figure 167) is performed as an interrupt processing executed by the main MPU 222. The monitoring and control register group 257 includes an interrupt period measurement register and an interrupt request register 258a (see Figure 166(a)). The interrupt period measurement register is used to generate interrupt requests for the timer interrupt processing (Figure 167) at a period of 4 milliseconds. The interrupt period measurement register is updated by subtracting the stored numerical information from "255" to "0." A timeout occurs when the value of the interrupt period measurement register becomes "0." After the timeout occurs, the value of the interrupt period measurement register returns to "255," and the subtraction formula from "255" to "0" resumes. The update period of the numerical information in the interrupt period measurement register is set in the update period setting register (described later) so that a timeout occurs in the interrupt period measurement register every 4 milliseconds. The value of the interrupt period measurement register is updated independently of the main CPU 251's operation to execute commands stored in the main ROM 223. In the register setting process (FIG. 163(b)), after the update period setting register is set, an initial value of "255" is set in the interrupt period measurement register. Then, by setting this initial value in the interrupt period measurement register, an update (subtractive update) is initiated in the interrupt period measurement register to generate an interrupt request for the timer interrupt process (FIG. 167).

The interrupt request register 258a is a register in which information corresponding to an interrupt request that has occurred is set. In this embodiment, the interrupt request is an interrupt request for the timer interrupt process (Figure 167). If 4 milliseconds have elapsed since numerical information corresponding to the interrupt period (4 milliseconds) of the timer interrupt process (Figure 167) was set in the interrupt period measurement register, the value of the interrupt period measurement register becomes "0" and a timeout occurs. The interrupt control circuit 258 sets bit 0 of the interrupt request register 258a to "1" upon the occurrence of the timeout. This causes an interrupt request for the timer interrupt process (Figure 167) to occur. Bits 1 through 7 of the interrupt request register 258a are unused. When the supply of operating power to the pachinko machine 160 is started and the main MPU 222 is reset, the interrupt period measurement register and the interrupt request register 258a are cleared to "0." In the register setting process (Figure 163 (b)), the initial value data ("255") is set in the interrupt period measurement register. This starts updating the numerical information in the interrupt period measurement register. Details of the interrupt request register 258a will be provided later.

After executing an instruction set in a program, the main MPU 222 performs interrupt recognition to recognize the occurrence of an interrupt request before reading the next instruction from the main ROM 223. During interrupt recognition, timer interrupt processing (specifically, timer interrupt processing (FIG. 167)) is activated when execution of the interrupt processing is permitted (the value of bit 0 of the interrupt control register 258b, described below, is "0") and bit 0 of the interrupt request register 258a is set to "1," i.e., an interrupt request for timer interrupt processing (FIG. 167) has occurred. The value of bit 0 of the interrupt request register 258a is cleared to "0" when the main CPU 251 accepts the interrupt processing (timer interrupt processing (FIG. 167)) corresponding to the interrupt request. The configuration for jumping to the start address of the program corresponding to the timer interrupt processing (FIG. 167) will be described later.

The setting register group 256 includes an update period setting register and an interrupt control register 258b (see Figure 166(a)). The update period setting register is set with information that specifies the update period for the numerical information in the interrupt period measurement register. In the register setting process (Figure 163(b)), information corresponding to the update period for causing the interrupt period measurement register to time out at a 4 millisecond cycle is set in the update period setting register.

The 0th bit of the interrupt control register 258b is set to either "1" (permitting) or "0" (prohibiting) the execution of the timer interrupt process (Fig. 167). When the supply of operating power to the pachinko machine 160 is started and the main MPU 222 is reset, the value of the 0th bit of the interrupt control register 258b is set to "0", i.e., the execution of the timer interrupt process (Fig. 167) is prohibited. During the register setting process (Fig. 163(b)), the 0th bit of the interrupt control register 258b remains set to "0". The execution of the timer interrupt process (Fig. 167) is permitted when the RETA command is executed at the end of the initial setting process for non-specific control called by the CALLA command in step S8713 of the main process (Fig. 161), setting the 0th bit of the interrupt control register 258b to "1". Note that the configuration may be such that when bit 0 of the interrupt control register 258b is set to "1", execution of the timer interrupt process (FIG. 167) is prohibited, and when bit 0 of the interrupt control register 258b is set to "0", execution of the timer interrupt process (FIG. 167) is permitted. Details of the interrupt control register 258b will be described later.

Next, the configuration of the main ROM 223 used in the register setting process (Figure 163(b)) executed by the main MPU 222 will be described. Figure 163(a) is an explanatory diagram for explaining the configuration of the main ROM 223. As shown in Figure 163(a), the main ROM 223 has a setting initial value table 298 used to set initial values in the registers included in the setting register group 256. The setting initial value table 298 stores the initial value data for the registers in the setting register group 256 in the order corresponding to their addresses (the order "AA00H" → "AA01H" → ... → "AAFCH"). In the register setting process (Figure 163(b)), the initial value data set in the setting initial value table 298 is set in the corresponding register in the setting register group 256, thereby initializing the registers included in the setting register group 256.

Next, the register setting process executed by the main MPU 222 will be described with reference to the flowchart in Figure 163 (b). As already explained, the register setting process is executed in steps S8702 and S8711 of the main processing (Figure 161). Note that steps S8801 to S8822 in the register setting process are executed using a program and data for specific control.

In steps S8801 to S8807, the auxiliary registers (A' register 291a, F' register 291b, B' register 292a, C' register 292b, D' register 293a, E' register 293b, H' register 294a, L' register 294b, IX' register 295, IY' register 296, and K' register 297) in the first register group 265 are cleared to "0" and initialized. Specifically, a CALL instruction is first used to call a subroutine program corresponding to the clearing process of the first register group 265, and the clearing process of the first register group 265 is executed (step S8801). The subroutine program corresponding to the clearing process of the first register group 265 is also called in step S8808, which will be described later.

In the process of clearing the first register group 265 (step S8801), the A register 271a, F register 271b, B register 272a, C register 272b, D register 273a, E register 273b, H register 274a, L register 274b, IX register 275, IY register 276, K register 277, V register 278, and stack pointer 279 are cleared to "0".

Then, the auxiliary register setting process for the first register group 265 is executed (step S8802). In the auxiliary register setting process for the first register group 265, the third base address for identification of "1200H" is set in the IX register 275, the fourth base address for identification of "1300H" is set in the IY register 276, and the upper second base address information for identification of "A1H" is set in the K register 277.

Then, the instruction "EX AF, AF'" is executed to exchange the data in the AF register 271 with the data in the auxiliary register (step S8803), the instruction "EXX" is executed to exchange the data in the BC register 272, DE register 273, and HL register 274 with the data in the auxiliary register (step S8804), the instruction "EX IX, IX'" is executed to exchange the data in the IX register 275 with the data in the auxiliary register (step S8805), the instruction "EX IY, IY'" is executed to exchange the data in the IY register 276 with the data in the auxiliary register (step S8806), and the instruction "EX K, K'" is executed to exchange the data in the K register 277 with the data in the auxiliary register (step S8807). This clears the auxiliary registers in the first register group 265 to "0" and initializes them.

Then, similar to step S8801 described above, a CALL instruction is used to call a subroutine program corresponding to the clearing process of the first register group 265, and the clearing process of the first register group 265 is executed (step S8808). In the clearing process of the first register group 265, the A register 271a, F register 271b, B register 272a, C register 272b, D register 273a, E register 273b, H register 274a, L register 274b, IX register 275, IY register 276, K register 277, V register 278, and stack pointer 279 are cleared to "0."

The clearing process of the first register group 265 executed in step S8801 corresponds to the auxiliary register of the first register group 265, and the clearing process of the first register group 265 executed in step S8808 corresponds to the main register of the first register group 265. The clearing of the V register 278 and stack pointer 279 to "0," which do not have auxiliary registers in the first register group 265, is executed redundantly in steps S8801 and S8808. However, because steps S8801 and S8808 call the same subroutine program (the subroutine program corresponding to the clearing process of the first register group 265), the data size of the program set in the main ROM 223 for clearing the main and auxiliary registers of the first register group 265 to "0" is reduced compared to a configuration in which a program for clearing the main register is provided as a separate program from a program for clearing the auxiliary register.

Then, main register setting processing for the first register group 265 is executed (step S8809). In the main register setting processing for the first register group 265, a first base address for identification of "1000H" is set in the IX register 275, a second base address for identification of "1100H" is set in the IY register 276, upper first base address information for identification of "A0H" is set in the K register 277, and upper first base address information for registers of "AAH" is set in the V register 278. As a result, the main registers in the first register group 265 (A register 271a, F register 271b, B register 272a, C register 272b, D register 273a, E register 273b, H register 274a, L register 274b, IX register 275, IY register 276, and K register 277) are cleared to "0" and initialized.

Then, in steps S8810 to S8814, an initial setting process for the setting register group 256 is executed, in which the setting initial value table 298 stored in the main ROM 223 is used to set initial value data in the registers included in the setting register group 256. The starting address of the setting initial value table 298 is "1000H," and the main register setting process for the first register group 265 (step S8809) is executed, causing this starting address to be set in the IX register 275. In other words, the area corresponding to the starting address in the setting initial value table 298 is set as the reference area. Furthermore, the lowest byte of the address corresponding to the first register in the setting register group 256 is "00H," and the clear process for the first register group 265 (step S8808) is executed, causing this lowest byte to be set in the C register 272b. Furthermore, by executing the main register setting process (step S8809) for the first register group 265, the upper first base address information for registers ("AAH"), which is the upper byte of the address corresponding to the register included in the setting register group 256, is set in the V register 278.

The initial setting process for the setting register group 256 begins by executing the command "LD A, (IX)" (step S8810). "LD A, (IX)" is a transfer command that transfers data from the area corresponding to the base address stored in the IX register 275 to the A register 271a. Execution of the command "LD A, (IX)" causes the initial value data set in the area designated as the reference area in the setting initial value table 298 to be read into the A register 271a.

Then, the instruction "OUT (C), A" is executed (step S8811). "OUT (C), A" is an instruction to set the data in the A register 271a to the register in the setting register group 256 or the monitoring and control register group 257 corresponding to the address obtained by combining the most significant byte stored in the V register 278 and the least significant byte stored in the C register 272b. Since the processing of step S8811 is executed when "AAH" is set in the V register 278, the execution of the instruction "OUT (C), A" in step S8811 sets the initial value data read into the A register 271a in step S8810 to the register in the setting register group 256 having an address corresponding to the value in the C register 272b.

Then, it is determined whether the lowest byte ("FCH") of the address corresponding to the final area of the setting register group 256 is set in the C register 272b (step S8812). If the value of the C register 272b is not "FCH" (step S8812: NO), that is, if the initial setting of the registers included in the setting register group 256 has not been completed, the reference destination in the setting initial value table 298 of the setting register group 256 is updated by adding 1 to the value of the IX register 275 (step S8813), and the setting destination register in the setting register group 256 is updated by adding 1 to the value of the C register 272b (step S8814).

Then, the process returns to step S8810, and steps S8810 to S8814 are repeatedly executed until a positive determination is made in step S8812. As a result, the initial value data set in the setting initial value table 298 is set in each register of the setting register group 256.

If a positive determination is made in step S8812, i.e., if the initialization of the setting register group 256 is completed, the second reference address information for registers, "ABH," which is the uppermost byte of the address range in which the monitoring and control register group 257 is located, is set in the V register 278 (step S8815). As previously explained, in an IN instruction, the address of the register from which information is read is specified by the address (2 bytes) obtained by combining the uppermost byte of address information set in the V register 278 with the lowermost byte of address information set in the IN instruction. In an OUT instruction, the address of the register from which information is read is specified by the address (2 bytes) obtained by combining the uppermost byte of address information set in the V register 278 with the lowermost byte of address information set in the OUT instruction. By setting "ABH" in the V register 278 in step S8815, it becomes possible to address the registers included in the monitoring and control register group 257 using an IN instruction or an OUT instruction. Furthermore, by setting "ABH" in the V register 278 in step S8815, it becomes impossible to address a register included in the setting register group 256 using an IN instruction or an OUT instruction unless the data in the V register 278 is rewritten. This reduces the possibility that the data in a register included in the setting register group 256 will be changed after the initial setting process for the setting register group 256 (steps S8810 to S8814) has been executed.

Then, the access control register in the monitoring control register group 257 is initialized (step S8816). In the access control register initialization, the C register 272b is set with the lowest byte of the address (2 bytes) corresponding to the access control register, and the A register 271a is set with the initial value data ("01H") to be set in the access control register. Then, as in step S8811 described above, the instruction "OUT (C), A" is executed. As a result, the initial value data ("01H") set in the A register 271a before the execution of this instruction is set in the register (access control register) corresponding to the address obtained by combining the data ("ABH") set in the V register 278 in step S8815 with the data set in the C register 272b before the execution of this instruction. As explained above, setting "1" in the access control register enables access to the primary RAM 224.

Then, the CPU 100 executes initialization processing for the interrupt period measurement register in the monitoring and control register group 257 (step S8817). In the initialization processing for the interrupt period measurement register, the CPU 100 sets the lower byte of the address (2 bytes) corresponding to the interrupt period measurement register in the C register 272b, and sets the initial value data ("FFH") to be set in the interrupt period measurement register in the A register 271a. Then, as in step S8811 described above, the CPU 100 executes the instruction "OUT (C), A." As a result, the initial value data ("FFH") set in the A register 271a before the execution of this instruction is set in the register (interrupt period measurement register) corresponding to the address obtained by combining the data ("ABH") set in the V register 278 in step S8815 and the data set in the C register 272b before the execution of this instruction. As previously explained, setting the initial value data ("255") in the interrupt period measurement register initiates updating of the numerical information in the interrupt period measurement register.

In this way, when "ABH" is set in the V register 278, the OUT instruction is used to set initial value data in a register in the monitoring and control register group 257, so the information set in the C register 272b to specify the address of that register can be the lowest byte of the address corresponding to that register. This reduces the data size of the instructions set in the program to set initial value data in that register, compared to a configuration in which the address (2 bytes) of a register in the monitoring and control register group 257 is set in the HL register 274 to specify the address of that register.

Then, the values of the A register 271a and the C register 272b are cleared to "0" (step S8818), and the first reference address for identification, "1000H," is set in the IX register 275 (step S8819). Then, the first stack pointer setting process is executed (step S8820). In the first stack pointer setting process, the data in the first stack pointer area provided in the work area 281 for identification control is set to the stack pointer 279 in the first register group 265. As already explained, the first stack pointer area is an area for storing the data of the stack pointer 279 in the first register group 265 before power is cut off. When power outage processing is executed in the power outage monitoring process (step S9203) of the timer interrupt process (FIG. 167) described below, the data of the stack pointer 279 in the first register group 265 is stored in the first stack pointer area. In this way, the first stack pointer setting process (step S8820) is executed after the access control register initial setting process (step S8816) is executed and access to the primary RAM 224 is permitted.

When register setting processing (FIG. 163(b)) is executed in step S8702 of the main processing (FIG. 161), first stack pointer setting processing (step S8820) is executed, thereby restoring the data stored in the first stack pointer area before power was cut off to the stack pointer 279 of the first register group 265. Also, as already explained, when initialization processing of the work area 281 for specific control is executed in step S8709 of the main processing (FIG. 161), an address corresponding to the final area of the stack area 282 for specific control is set in the first stack pointer area. Therefore, when register setting processing (FIG. 163(b)) is executed in step S8711 of the main processing (FIG. 161), first stack pointer setting processing (step S8820) is executed, thereby setting the address corresponding to the final area of the stack area 282 for specific control to the stack pointer 279 of the first register group 265.

After the first stack pointer setting process is executed in step S8820, the I register 267 is initialized (step S8821). In the I register 267 initialization process, the I register 267 is cleared to "0" and then the upper address information "01H", which is the upper byte of the start address pointer ("0100H") output by the interrupt control circuit 258 to specify the start address (specifically, "1000H") of the program corresponding to the timer interrupt process (Fig. 167), is set in the I register 267. This allows the timer interrupt process (Fig. 167) to be started based on the occurrence of an interrupt request for the timer interrupt process (Fig. 167) when execution of the timer interrupt process (Fig. 167) is permitted. The configuration for jumping to the start address of the program corresponding to the timer interrupt process (Fig. 167) will be described later.

As already explained, in the main processing (Figure 161), steps S8701 to S8712 are executed while the timer interrupt processing (Figure 167) is prohibited, and then the RETA instruction is executed at the end of the initial setting processing for non-specific control called in step S8713, thereby enabling the timer interrupt processing (Figure 167). The initial setting processing for I register 267 (step S8821) is executed before the initial setting processing for non-specific control (step S8713) is executed, thereby preventing the start condition for timer interrupt processing (Figure 167) from being met when "01H" is not set in I register 267.

After executing the initial setting process for the I register 267 in step S8821, the initial setting process for the R register 268 is executed (step S8822), and this register setting process (Figure 163 (b)) is terminated. In the initial setting process for the R register 268 (step S8822), the R register 268 is cleared to "0" and a state is created in which the numerical information in the R register 268 can be updated.

Next, the processing of step S8713 of the main processing (Figure 161) will be described. As already explained, in step S8713, the CALLA instruction is used to execute the initial setting processing for non-specific control. The initial setting processing for non-specific control is included in the processing for non-specific control. In other words, when the main processing changes from a situation in which specific control processing is being executed to a situation in which initial setting processing for non-specific control, which is non-specific control processing, is executed, the initial setting processing for non-specific control is called using the CALLA instruction. In this way, the CALLA instruction is an instruction used to call the processing for non-specific control when the situation changes from a situation in which specific control processing is being executed to a situation in which non-specific control processing (initial setting processing for non-specific control, second stack pointer storage processing described below, fraud detection processing, base value calculation setting processing, or second management processing) is executed.

When non-specific control processing (initialization processing for non-specific control in step S8713) is executed by the CALLA instruction, the timer interrupt processing (Fig. 167) is prohibited from interrupting. This makes it possible to prevent the timer interrupt processing, which is specific control processing, from interrupting and starting while non-specific control processing is being executed. In step S8713 of the main processing (Fig. 161), the CALLA instruction calls the initial setting processing for non-specific control while timer interrupt processing is prohibited, and the initial setting processing for non-specific control is executed while timer interrupt processing is prohibited.

When non-specific control processing (initialization processing for non-specific control in step S8713) is executed by the CALLA instruction, execution of the timer interrupt processing is prohibited, and then the register group switching circuit 252 switches from a state in which the first register group 265 is the target of use to a state in which the second register group 266 is the target of use. This causes the second register group 266 to be used in the initial setting processing of the second register group 266, which is non-specific control processing, and prevents the data in each register included in the first register group 265 from being overwritten.

In this way, by configuring the CALLA instruction to execute non-specific control processing (non-specific control initial setting processing, second stack pointer storage processing described below, fraud detection processing, base value calculation and setting processing, or second management processing), a single instruction ("CALLA") prohibits timer interrupt processing and switches the register group from the first register group 265 to the second register group 266. The program corresponding to the non-specific control processing can then be started. Therefore, compared to a case where an instruction to prohibit timer interrupt processing, an instruction to switch the register group from the first register group 265 to the second register group 266, and an instruction to start the program for the non-specific control processing are separately provided, the number of instructions set in the program for executing the non-specific control processing can be reduced. This reduces the data capacity required in the main ROM 223 to store the program.

Figure 164 is a flowchart showing the initial setting process for non-specific control executed in step S8713 of the main processing ( Figure 161 ). Note that steps S8901 to S8913 in the initial setting process for non-specific control are executed using the program and data for non-specific control.

In the initial setting process for non-specific control, the second register group 266 is first initialized (steps S8901 to S8910). In the initial setting process for the second register group 266, steps S8901 to S8907 clear the auxiliary registers (A' register 311a, F' register 311b, B' register 312a, C' register 312b, D' register 313a, E' register 313b, H' register 314a, L' register 314b, IX' register 315, IY' register 316, and K' register 317) in the second register group 266 to "0" and initialize them. Specifically, a CALL instruction is first used to call a subroutine program corresponding to the clearing process for the second register group 266, and the clearing process for the second register group 266 is executed (step S8901). The subroutine program corresponding to the process of clearing the second register group 266 is also called in step S8908, which will be described later.

In the initial setting process for the second register group 266 (step S8901), the A register 301a, F register 301b, B register 302a, C register 302b, D register 303a, E register 303b, H register 304a, L register 304b, IX register 305, IY register 306, K register 307, V register 308, and stack pointer 279 are cleared to "0".

Then, the auxiliary register setting process for the second register group 266 is executed (step S8902). In the auxiliary register setting process for the second register group 266, the non-specific third base address "3200H" is set in the IX register 305, the non-specific fourth base address "3300H" is set in the IY register 306, and the specific upper second base address information "A1H" is set in the K register 307.

Then, the instruction "EX AF, AF'" is executed to exchange the data in the AF register 301 with the data in the auxiliary register (step S8903), the instruction "EXX" is executed to exchange the data in the BC register 302, DE register 303, and HL register 304 with the data in the auxiliary register (step S8904), the instruction "EX IX, IX'" is executed to exchange the data in the IX register 305 with the data in the auxiliary register (step S8905), the instruction "EX IY, IY'" is executed to exchange the data in the IY register 306 with the data in the auxiliary register (step S8906), and the instruction "EX K, K'" is executed to exchange the data in the K register 307 with the data in the auxiliary register (step S8907). This clears the auxiliary registers in the second register group 266 to "0" and initializes them.

Then, similar to step S8901 described above, a CALL instruction is used to call a subroutine program corresponding to the clearing process of the second register group 266, and the clearing process of the second register group 266 is executed (step S8908). In the clearing process of the second register group 266, the A register 301a, F register 301b, B register 302a, C register 302b, D register 303a, E register 303b, H register 304a, L register 304b, IX register 305, IY register 306, K register 307, V register 308, and stack pointer 279 are cleared to "0."

The clearing process of the second register group 266 executed in step S8901 corresponds to the auxiliary register of the second register group 266, and the clearing process of the second register group 266 executed in step S8908 corresponds to the main register of the second register group 266. The clearing of the V register 308 and stack pointer 279 to "0," which do not have auxiliary registers in the second register group 266, is executed redundantly in steps S8901 and S8908. However, because steps S8901 and S8908 call the same subroutine program (the subroutine program corresponding to the clearing process of the second register group 266), the data size of the program set in the main ROM 223 for clearing the main and auxiliary registers of the second register group 266 to "0" is reduced compared to a configuration in which a program for clearing the main register is provided as a separate program from a program for clearing the auxiliary register.

Then, main register setting processing for the second register group 266 is executed (step S8909). In the main register setting processing for the second register group 266, a non-specific first base address of "3000H" is set in the IX register 305, a non-specific second base address of "3100H" is set in the IY register 306, non-specific upper base address information of "A3H" is set in the K register 307, and register upper second base address information of "ABH" is set in the V register 308. As a result, the main registers in the second register group 266 (A register 301a, F register 301b, B register 302a, C register 302b, D register 303a, E register 303b, H register 304a, L register 304b, IX register 305, IY register 306, K register 307, and V register 308) are cleared to "0" and initialized.

Then, a second stack pointer setting process is executed (step S8910). In the second stack pointer setting process, the data in the second stack pointer area provided in the non-specific control work area 283 is set to the stack pointer 309 of the second register group 266. The second stack pointer area is an area for storing the data of the stack pointer 309 in the second register group 266 before power is cut off. When power outage processing is executed in the power outage monitoring process (step S9203) of the timer interrupt process (Figure 167) described below, the data of the stack pointer 309 in the second register group 266 is stored in the second stack pointer area. The second stack pointer setting process (step S8910) is executed after the access control register initial setting process (step S8816) is executed in the register setting process (Figure 163(b)) described above, and access to the primary RAM 224 is permitted.

After the second register group 266 initialization process (steps S8901 to S8910) is executed, the first management process (steps S8911 to S8913) is executed. The details of the first management process will be described later. Thereafter, the "RETA" instruction is used to terminate the non-specific control initialization process (FIG. 164). When the RETA instruction is used to terminate the non-specific control initialization process (FIG. 164), the register group to be used by the register group switching circuit 252 is switched from the second register group 266 to the first register group 265. After the timer interrupt process (FIG. 167) is permitted to be executed, the non-specific control initialization process (FIG. 164) is terminated. By switching the register group to be used from the second register group 266 to the first register group 265, the first register group 265 is used in the specific control process, preventing the data in each register included in the second register group 266 from being overwritten.

In this way, by configuring the RETA instruction to terminate non-specific control processing (non-specific control initial setting processing, second stack pointer storage processing described below, fraud detection processing, base value calculation and setting processing, or second management processing), a single instruction ("RETA") switches the register group to be used from the second register group 266 to the first register group 265 and enables timer interrupt processing. The program corresponding to the non-specific control processing can then be terminated. Therefore, compared to a case where separate instructions are provided for switching the register group to be used from the second register group 266 to the first register group 265, enabling timer interrupt processing, and terminating the program for non-specific control processing, the number of instructions set in the program to terminate non-specific control processing can be reduced. This reduces the data capacity required in the main ROM 223 to store the program.

As already explained, the register setting process in steps S8702 and S8711 of the main processing (Figure 161) is configured to initialize the first register group 265, I register 267, R register 268, setting register group 256, and monitoring control register group 257. Also, as already explained, the RETA instruction is executed at the end of non-specific control processing, thereby permitting execution of timer interrupt processing (Figure 167). If the register setting process in step S8702 were configured to execute the initial setting process for the second register group 266, the RETA instruction would need to be executed at the end of the initial setting process, and therefore the timer interrupt processing (Figure 167) would be permitted to be executed at a timing earlier than the timing at which it is determined in step S8704 whether the checksum is normal. If the determination process of step S8704 is performed after the timer interrupt process (FIG. 167) is executed and the data stored in the work area 281 for specific control and the stack area 282 for specific control are changed, there is a risk that the checksum will be determined to be abnormal in step S8704 even if it was normal when the supply of operating power to the pachinko machine 160 began. In contrast, the main process (FIG. 161) is configured to execute the determination process of step S8704 before executing the non-specific control process (specifically, the initial setting process for non-specific control). This prevents the checksum from being determined to be abnormal in step S8704 even if it was normal when the supply of operating power to the pachinko machine 160 began.

Next, the random number initial value update process executed in step S8714 of the main processing (Figure 161) will be described with reference to the flowchart in Figure 165. The random number initial value update process starts with "A0H" (specific upper first reference address information), which is the upper byte of the first address range in the specific control work area 281, stored in the K register 277. Note that steps S9001 to S9007 in the random number initial value update process are executed using the specific control program and specific control data.

First, the instruction "LDK BC, (RSSHKTC_L)" is executed (step S9001). "LDK" is the LDK instruction, and "BC" specifies BC register 272 as the transfer destination. Furthermore, "RSSHKTC_L" is the lowest byte of the address (2 bytes) corresponding to the lowest byte of the random number initial value counter CINI, which is a 2-byte counter. This address is included in the first address range of the specific control work area 281. By executing the instruction "LDK BC, (RSSHKTC_L)", the 2 bytes of numerical information stored in the random number initial value counter CINI are transferred to BC register 272.

When using the LD instruction (specifically, "LD BC, (RSSHKTC)") to read the value of the random number initial value counter CINI into the BC register 272, the LD instruction must be set with an address (2 bytes) corresponding to the lowest byte of the random number initial value counter CINI. In contrast, when using the LDK instruction to read the value of the random number initial value counter CINI into the BC register 272, the data stored in the K register 277 ("A0H") is used as the highest byte of the transfer source, and therefore only the lowest byte of that address is set in the LDK instruction. In this way, by using the LDK instruction to read the value of the random number initial value counter CINI into the BC register 272, the data size of the transfer instructions set in the program can be reduced compared to a configuration using the LD instruction.

Then, the value of the BC register 272 is incremented by 1 (step S9002). As a result, the value read from the random number initial value counter CINI in step S9001 plus "1" is stored in the BC register 272. Then, numerical information (specifically, "270FH") corresponding to the maximum value of the random number initial value counter CINI, "9999", is set in the HL register 274 (step S9003).

Then, an operation is performed to subtract the value of the BC register 272 ("value read from the random number initial value counter CINI + 1") from the value of the HL register 274 ("9999") (step S9004). The result of this operation is stored in the HL register 274. If the value of the BC register 272 exceeds the maximum value of the random number initial value counter CINI, a borrow occurs in the subtraction in step S9004, and the carry flag of the F register 271b is set to "1". If the value of the BC register 272 does not exceed the maximum value of the random number initial value counter CINI, no borrow occurs in the subtraction in step S9004, and the carry flag is not set to "1".

After that, if the carry flag in the F register 271b is set to "1" (step S9005: YES), the value of the BC register 272 is cleared to "0" (step S9006). In this way, if the value read from the random number initial value counter CINI plus "1" exceeds the maximum value, the BC register 272 will be set to "0".

If a negative determination is made in step S9005, or if the processing of step S9006 is performed, the instruction "LDK (RSSHKTC_L), BC" is executed (step S9007). "LDK" is the LDK instruction, "RSSHKTC_L" is the lower byte of the address (2 bytes) that specifies the area corresponding to the lower byte of the random number initial value counter CINI, and "BC" specifies the BC register 272 as the transfer source. By executing the instruction "LDK (RSSHKTC_L), BC", the data stored in the BC register 272 is transferred to the random number initial value counter CINI.

In this way, in the random number initial value update process (Figure 165), the value of the random number initial value counter CINI is updated to the value obtained by adding 1 if the value obtained by adding 1 to the value of the random number initial value counter CINI does not exceed the maximum value, and is updated to "0" if the value obtained by adding 1 exceeds the maximum value.

When using the LD instruction (specifically, "LD (RSSHKTC), BC") to set the data in the BC register 272 to the random number initial value counter CINI, the LD instruction must be set with an address (2 bytes) corresponding to the lowest byte of the random number initial value counter CINI. In contrast, when using the LDK instruction to set the data in the BC register 272 to the random number initial value counter CINI, the data stored in the K register 277 ("A0H") is used as the highest byte of the address specifying the transfer destination, and therefore only the lowest byte of that address is set in the LDK instruction. In this way, by using the LDK instruction to set the data in the BC register 272 to the random number initial value counter CINI, the data size of the transfer instructions set in the program can be reduced compared to a configuration using the LD instruction.

As already explained, in the main processing (Figure 161), after the random number initial value update processing (Figure 165) is executed in step S8714, the fluctuation counter update processing is executed in step S8715. In the fluctuation counter update processing (step S8715), the data of the fluctuation type counter CS provided in the specific control work area 281 is read into the C register 272b of the first register group 265, and the value of the C register 272b is incremented by 1. After that, it is determined whether the value of the C register 272b after incrementing by 1 exceeds the maximum value of "198", and if the value of the C register 272b does not exceed the maximum value, the value of the C register 272b is set in the fluctuation type counter CS. Furthermore, if the value of the C register 272b exceeds the maximum value, the C register 272b is cleared to "0", and the value of the C register 272b ("0") is then set in the fluctuation type counter CS. As a result, in the fluctuation counter update process (step S8715), the value of the fluctuation type counter CS is incremented by 1, and if the value after incrementing by 1 exceeds the maximum value, the fluctuation type counter CS is cleared to "0," thereby updating the fluctuation type counter CS.

As described above, in the random number initial value update process (step S8714) in step S8714 of the main processing (Figure 161), the LDK instruction is executed in the process of reading the data of the random number initial value counter CINI into the BC register 272 and setting the updated data in the random number initial value counter CINI. Similarly, in the fluctuation counter update process (step S8715) in step S8715 of the main processing (Figure 161), the LDK instruction is executed in the process of reading the data of the fluctuation type counter CS into the C register 272b and setting the updated data in the fluctuation type counter CS. Compared to a configuration in which LD instructions are set instead of the four LDK instructions in the random number initial value update process (step S8714) and the fluctuation counter update process (step S8715), the data volume of the transfer instructions set in the program for executing the remaining processing can be reduced.

Next, we will explain the configuration for jumping to the start address of the program corresponding to the timer interrupt processing (Figure 167) when that timer interrupt processing is started. Figure 166(a) is an explanatory diagram for explaining the configuration of the main MPU 222 used to start the timer interrupt processing.

As already explained, the main MPU 222 is provided with an interrupt control circuit 258. As shown in FIG. 166(a), the interrupt control circuit 258 is provided with the interrupt request register 258a, the interrupt control register 258b, and the interrupt vector circuit 258c. As already explained, the interrupt request register 258a and the interrupt control register 258b are included in the monitoring and control register group 257. Also, as already explained, if a timeout occurs in the interrupt period measurement register included in the monitoring and control register group 257, the 0th bit of the interrupt request register 258a is set to "1," and an interrupt request for the timer interrupt process (FIG. 167) is generated. The interrupt request for the timer interrupt process (FIG. 167) is generated when the interrupt period, 4 milliseconds, has elapsed after the interrupt period measurement register in the monitoring and control register group 257 was set or after the previous timer interrupt process (FIG. 167) was started.

As already explained, the timeout in the interrupt period measurement register provided in the monitoring control register group 257 occurs at a period of 4 milliseconds. Also, as already explained, a state in which the value of the 0th bit of the interrupt control register 258b is "0" corresponds to a state in which execution of the timer interrupt process (Figure 167) is prohibited, and a state in which the value of the 0th bit of the interrupt control register 258b is "1" corresponds to a state in which execution of the timer interrupt process (Figure 167) is permitted.

The interrupt vector circuit 258c is a non-volatile memory circuit that stores the lower 8 bits of data in the start address pointer for timer interrupt processing (Figure 167). The interrupt vector circuit 258c has eight memory elements that store 1 bit of information, and these eight memory elements store the lower 8 bits of data in the start address pointer.

The input and output sides of the main CPU 251 are connected to an internal bus NB provided in the main MPU 222. The main CPU 251 can output 8-bit data to the internal bus NB and can also retrieve 8-bit data from the internal bus NB. The input and output sides of the interrupt control circuit 258 are connected to the internal bus NB. The interrupt control circuit 258 can output 8-bit data to the internal bus NB and can also retrieve 8-bit data from the internal bus NB.

As shown in FIG. 166(a), the interrupt control circuit 258 is provided with a timer interrupt request circuit 318. The timer interrupt request circuit 318 is an AND circuit having two input terminals 318a and 318b and one output terminal 318c. A signal of a level corresponding to the value of the 0th bit of the interrupt request register 258a is input to one input terminal 318a of the timer interrupt request circuit 318, and a signal of a level corresponding to the value of the 0th bit of the interrupt control register 258b is input to the other input terminal 318b. In addition, an interrupt request signal is output from the output terminal 318c of the timer interrupt request circuit 318. The interrupt request signal is a signal of a level corresponding to the combination of the levels of the signals input to the two input terminals 318a and 318b of the timer interrupt request circuit 318.

When at least one of the value of bit 0 of the interrupt request register 258a and the value of bit 0 of the interrupt control register 258b is "0," the interrupt request signal output from the output terminal 318c of the timer interrupt request circuit 318 to the primary CPU 251 is at a low level. Also, when the value of bit 0 of the interrupt request register 258a and the value of bit 0 of the interrupt control register 258b are "1," the interrupt request signal output from the output terminal 318c of the timer interrupt request circuit 318 to the primary CPU 251 is at a high level. In this way, the interrupt request signal is at a high level when execution of the timer interrupt process (Figure 167) is permitted and an interrupt request for that timer interrupt process has occurred.

The main CPU 251 is provided with an interrupt input terminal 319 to which an interrupt request signal output from the output terminal 318c of the timer interrupt request circuit 318 is input. As previously explained, the main MPU 222 performs interrupt recognition to recognize the occurrence of an interrupt request after executing a program instruction and before reading the next instruction from the main ROM 223. During this interrupt recognition, the main MPU 222 determines, based on the timer interrupt request signal input to the interrupt input terminal 319 being at a HI level, that an interrupt request for the timer interrupt process (Figure 167) has occurred while execution of the timer interrupt process is permitted. If the main MPU 222 determines, during the interrupt recognition process, that an interrupt request for the timer interrupt process has occurred while execution of the timer interrupt process is permitted, it saves the data of the program counter 269 in an area of the specific control stack area 282 corresponding to the value of the stack pointer 279 in the first register group 265 and updates the value of the stack pointer 279 to a value corresponding to the next area. As a result, the return address after the timer interrupt process (FIG. 167) ends is stored in the specific control stack area 282. The main MPU 222 then executes the interrupt start process (FIG. 166(d)), described below, to start the timer interrupt process (FIG. 167).

As shown in FIG. 166(a), the main MPU 222 is provided with a first signal line SG1 that connects the output side of the main CPU 251 and the input side of the interrupt control circuit 258. The first signal line SG1 is used to transmit an interrupt acceptance signal from the main CPU 251 to the interrupt control circuit 258. When the main MPU 222 accepts an interrupt request for timer interrupt processing and starts the timer interrupt processing, it raises the interrupt acceptance signal from a LOW level to a HIGH level. When the interrupt control circuit 258 detects the rising edge of the interrupt acceptance signal, it outputs the lower 8 bits of the start address pointer of the timer interrupt processing (FIG. 167) stored in the interrupt vector circuit 258c to the internal bus NB. When the main MPU 222 receives the lower 8 bits of the start address pointer from the internal bus NB, it lowers the interrupt acceptance signal to a LOW level. When the interrupt control circuit 258 detects the falling edge of the interrupt acceptance signal, it stops outputting the lower 8 bits of the start address pointer and clears bit 0 of the interrupt request register 258a to "0." This causes an interrupt request for the timer interrupt process (FIG. 167) to be generated, and the interrupt request signal input to the interrupt input terminal 319 of the main CPU 251 falls to a LOW level.

Figure 166(b) is an explanatory diagram illustrating the interrupt processing start address table 299 provided in the main ROM 223, and Figure 166(c) is an explanatory diagram illustrating the data structure of the start address pointer. As shown in Figure 166(b), the interrupt processing start address table 299 is provided in the address range of "0100H" to "0101H" in the main ROM 223. The start address table 299 contains the start address ("1000H") of the program corresponding to the timer interrupt processing (Figure 167).

As shown in Figure 166 (c), the start address pointer (2 bytes) is determined by combining the 8-bit data (the upper 8 bits of the start address pointer) stored in the I register 267 and the 8-bit data (the upper 8 bits of the start address pointer) received from the interrupt vector circuit 258c via the internal bus NB. Then, in the interrupt processing start address table 299, the start address ("1000H") set in the area specified by the start address pointer (the area corresponding to the address "0100H") and the area next to that area (the area corresponding to the address "0101H" next to "0100H") is set in the program counter 269 of the main CPU 251, thereby starting the timer interrupt processing (Figure 167) corresponding to the interrupt cause that 4 milliseconds have elapsed.

Next, the interrupt start processing executed by the main MPU 222 will be explained with reference to the flowchart in Figure 166 (d). Note that steps S9101 to S9105 in the interrupt start processing are executed using a specific control program and specific control data.

First, the interrupt acceptance signal is raised (step S9101). In this raising process, the interrupt acceptance signal output from the main CPU 251 to the interrupt control circuit 258 is raised from LOW level to HIGH level. Then, it is determined whether the main CPU 251 has received the lower 8 bits of data in the start address pointer output from the interrupt vector circuit 258c to the internal bus NB (step S9102). The determination process in step S9102 is repeated until a positive determination is made in step S9102.

If the primary CPU 251 receives the lower 8 bits of data in the start address pointer (step S9102: YES), it executes a process to lower the interrupt acceptance signal (step S9103). In this process, it lowers the interrupt acceptance signal from HI to LOW. It then obtains the upper 8 bits of data in the start address pointer stored in the I register 267 (step S9104).

Then, a start address pointer (2 bytes) is identified based on the upper byte of data acquired in step S9104 and the lower byte of data acquired in step S9102, and a jump is made to the start address of the timer interrupt processing (Figure 167) stored in the area corresponding to the identified start address pointer in the interrupt processing start address table 299 stored in the main ROM 223. This starts the timer interrupt processing (Figure 167).

If the start address pointer (2 bytes) were to be determined using only the data output from the interrupt vector circuit 258c to the internal bus NB, the data output from the interrupt vector circuit 258c to the internal bus NB would need to be 16 bits, and the interrupt vector circuit 258c would need to be provided with 16 memory elements for storing 1 bit of information. In contrast, this configuration uses the data stored in the I register 267 to determine the upper 8 bits of the start address pointer for timer interrupt processing. This allows the data output from the interrupt vector circuit 258c to be the lower 8 bits of the start address pointer, and the number of memory elements provided in the interrupt vector circuit 258c can be reduced to 8. This simplifies the configuration of the interrupt vector circuit 258c.

In this pachinko machine 160, the only interrupt processing configured is timer interrupt processing, and there is only one type of start address pointer for the interrupt processing identified using the data stored in the I register 267, and there is only one type of upper byte of the start address pointer to be stored in the I register 267. For this reason, the main CPU 251 is configured without an auxiliary register for the I register 267.

When non-specific control processing is being executed, timer interrupt processing (Figure 167) is prohibited from being executed, and so timer interrupt processing (Figure 167) is activated when specific control processing is being executed. Furthermore, the upper 8 bits of data set in the I register 267 are only "01H," and there is no need to temporarily save this data. Therefore, in a configuration in which the primary CPU 251 is provided with a first register group 265 and a second register group 266, one I register 267 is provided for the primary CPU 251.

As already explained, in the main CPU 251, the I register 267 is not included in either the first register group 265 or the second register group 266. The main MPU 222 can set data in the I register 267 and read out the data set in the I register 267 both when the main MPU 222 is executing processing corresponding to specific control and when the main MPU 222 is executing processing corresponding to non-specific control. Because the main CPU 251 is configured with one I register 267, the number of registers in the main CPU 251 is reduced compared to a configuration in which an I register is provided in each of the first register group 265 and the second register group 266.

As already explained, execution of the timer interrupt process (Fig. 167) is prohibited during execution of the base value calculation and setting process (step S8716). Therefore, it is not necessary to store the data stored in the AF register 301, BC register 302, DE register 303, and HL register 304 of the second register group 266 during the base value calculation and setting process (step S8716) in the auxiliary registers (AF' register 311, BC' register 312, DE' register 313, and HL' register 314) during execution of the timer interrupt process (Fig. 167). This eliminates the need to save the data in the AF register 301, BC register 302, DE register 303, and HL register 304 in the second register group 266 to the auxiliary registers at the start of the timer interrupt process (FIG. 167), and eliminates the need to restore the data saved in the auxiliary registers to the AF register 301, BC register 302, DE register 303, and HL register 304 at the end of the timer interrupt process (FIG. 167). Furthermore, in the non-specific control processes (fraud detection process and second management process described below) executed in the timer interrupt process, in addition to the AF register 301, BC register 302, DE register 303, and HL register 304 in the second register group 266, the auxiliary registers corresponding to these main registers (AF' register 311, BC' register 312, DE' register 313, and HL' register 314) can be used.

As already explained, in the remaining processing of the main processing (Figure 161), execution of the timer interrupt processing (Figure 167) is prohibited when the base value calculation and setting processing is started by the CALLA instruction, and execution of the timer interrupt processing (Figure 167) is permitted when the base value calculation and setting processing is ended by the RETA instruction. Then, steps S8714 to S8715 are executed while execution of the timer interrupt processing (Figure 167) is permitted. In this manner, the timer interrupt processing (Figure 167) can be started while the random number initial value update processing of step S8714 or the fluctuation counter update processing of step S8715 is being executed. This shortens the maximum period from when an interrupt request for the timer interrupt processing (Figure 167) is generated until the interrupt request is accepted and the timer interrupt processing (Figure 167) is started, compared to a configuration in which steps S8714 to S8716 are executed while execution of the timer interrupt processing (Figure 167) is prohibited.

Next, the timer interrupt processing executed by the main MPU 222 will be described with reference to the flowchart in Figure 167. Of the processing in steps S9201 to S9224 in the timer interrupt processing, processing other than some of the processing in the power outage monitoring processing in step S9203 (the second stack pointer storage processing described below), the fraud detection processing called and executed in step S9211, and the second management processing called and executed in step S9222, is executed using a program and data for specific control, while the second stack pointer storage processing, the fraud detection processing, and the second management processing are executed using a program and data for non-specific control.

First, the instruction "EX AF, AF'" is executed (step S9201). Execution of this instruction exchanges the data in the AF register 271 with the data in the auxiliary register (data in the AF' register 291). This saves the data in the AF register 271 used in steps S8714 and S8715 of the main processing (Figure 161) to the AF' register 291, preventing the data from being overwritten during execution of the timer interrupt processing. Furthermore, the data saved in the AF' register 291 in step S9224 (described later) during the previous timer interrupt processing (Figure 167) can be restored to the AF register 271.

Then, the instruction "EXX" is executed (step S9202). Execution of this instruction swaps the data stored in BC register 272, DE register 273, and HL register 274 with the data in the auxiliary registers (data stored in BC' register 292, DE' register 293, and HL' register 294). This causes the data in BC register 272, DE register 273, and HL register 274 used in steps S8714 and S8715 of the main processing (Figure 161) to be saved to BC' register 292, DE' register 293, and HL' register 294, preventing the data from being overwritten during execution of the timer interrupt processing. In addition, the data saved to the BC' register 292, DE' register 293, and HL' register 294 in step S9223 (described later) during the previous timer interrupt processing (Figure 167) can be restored to the BC register 272, DE register 273, and HL register 274.

Then, power outage monitoring processing is executed (step S9203). In the power outage monitoring processing, it monitors whether a falling edge from HI level to LOW level has been detected in the power outage signal input from the power outage monitoring board 225 to the main CPU 251. If a falling edge in the power outage signal is detected, i.e., if a power outage has been identified, power outage processing is executed and then an infinite loop is entered. Details of the power outage monitoring processing will be described later.

If the power outage monitoring process (step S9203) does not identify the occurrence of a power outage, a lottery random number update process is executed (step S9204). The lottery random number update process updates the winning random number counter C1, type random number counter C2, and reach random number counter C3 in the specific control work area 281. Specifically, the current numerical information is read sequentially from the winning random number counter C1, type random number counter C2, and reach random number counter C3, and the read numerical information is incremented by 1, after which it is overwritten onto the counter from which it was read. In this case, when the counter value exceeds the maximum value, it is cleared to "0".

As already explained, the random numbers used in the normal draw pass/fail determination process are obtained from the R register 268. The lottery random number update process (step S9204) does not include any processing for updating the random numbers used in the normal draw pass/fail determination process. This reduces the number of instructions set in the program to update the random numbers.

Then, similar to step S8714 of the main processing (Figure 161), random number initial value update processing is executed (step S9205). The contents of the random number initial value update processing have already been explained with reference to the flowchart in Figure 165. Then, similar to step S8715 of the main processing (Figure 161), variation counter update processing is executed (step S9206). The contents of the variation counter update processing have already been explained in step S8715 of the main processing (Figure 161).

Then, it is determined whether the game stop flag provided in the specific control work area 281 is set to "1" (step S9207). If the game stop flag is set to "1" (step S9207: YES), the process proceeds to step S9222, where game history management is performed, without executing steps S9208 to S9221. As a result, when the game stop flag is set to "1," it is possible to perform power outage monitoring, random number updates, and game history management using timer interrupt processing, while not executing the processes for progressing the game in steps S9208 to S9221.

If the game stop flag is not set to "1" (step S9207: NO), processing to progress the game is executed in steps S9208 to S9221. Specifically, port output processing is first executed (step S9208). In the port output processing, if output information was set in the previous timer interrupt processing, processing is executed to provide output corresponding to that output information to the various drive units 192b, 194b. For example, if information to switch the special power winning device 192 to an open state is set, output of a drive signal to the special power drive unit 192b is initiated, and if information to switch to a closed state is set, output of the drive signal is stopped. Furthermore, if information to switch the normal power device 194a of the second operating port 194 to an open state is set, output of a drive signal to the normal power drive unit 194b is initiated, and if information to switch to a closed state is set, output of the drive signal is stopped.

Then, a read process is executed (step S9209). In the read process, signals other than the power outage signal and the winning signal are read, and the read information is stored for use in future processes. Then, a ball-entry detection process, which will be described later, is executed (step S9210). Then, a fraud detection process, which is a non-specific control process, is executed using the CALLA command (step S9211). The fraud detection process will be explained in detail later.

Then, a specific control timer update process is executed to collectively update the numerical information of multiple types of timer counters provided in the specific control work area 281 (step S9212). In this case, the timer counters whose stored numerical information is updated by subtraction are handled in a consolidated manner, but it is also possible to configure the system to collectively update both subtractive timer counters and additive timer counters.

Then, a fraud response process is executed to respond to the occurrence of an abnormality in the ball entry detection or magnetic detection (step S9213). During the fraud response process, if a magnetic abnormality is identified, the game stop flag is set to "1." As a result, when a magnetic abnormality is identified, processes for power outage monitoring, updating various counters, and managing game history are executed, but processes for progressing the game are not executed. Furthermore, during the fraud response process (step S9213), control is performed to send a pulsed security signal to the game hall's management computer HC based on the value of the first security counter 281b provided in the specific control work area 281 and the value of the second security counter 283k provided in the non-specific control work area 283. Specifically, if the value of the second security counter 283k has increased since the previous fraud response process (step S9213), the increase is added to the value of the first security counter 281b. Thereafter, if the value of the first security counter 281b is 1 or greater, control is executed to transmit a pulsed security signal from the main MPU 222 to the amusement hall management computer HC. Furthermore, in the fraud response process (step S9213), when transmission of a pulsed security signal begins, the value of the first security counter 281b is decremented by 1. This allows a pulsed security signal to be transmitted to the amusement hall management computer HC the number of times the process of incrementing the value of the first security counter 281b or the second security counter 283k by 1 is executed. Alternatively, the pulsed security signal may be transmitted from the main MPU 222 to the management unit 170, and information on the number of times the pulsed security signal has been received by the management unit 170 may be transmitted from the management unit 170 to the amusement hall management computer HC. The first security counter 281b and the second security counter 283k will be described in more detail below.

Then, a launch control process is executed to control the launch of gaming balls (step S9214). While the launch operation continues on the launch operation device 188, one gaming ball is launched every 0.6 seconds to achieve the specified launch cycle. Then, as an input status monitoring process, the opening of the gaming machine main body 162 and front door frame 164 is confirmed based on the information read in the reading process of step S9209 (step S9215).

Then, a special power control process for special charts is executed to control the execution of the game round and the open/close execution mode (step S9216). Then, a normal power control process for normal charts is executed to control the display of the normal chart display unit 198a and the execution of the normal power open state (step S9217). The special power control process for special charts (step S9216) and the normal power control process for normal charts (step S9217) will be described later.

Then, display control processing is executed (step S9218). In the display control processing, based on the processing results of the immediately preceding steps S9216 and S9217, output information is set to reflect the increase or decrease in the number of first reserved information items in the first special chart reserved display unit 197c, output information is set to reflect the increase or decrease in the number of second reserved information items in the second special chart reserved display unit 197d, and output information is set to reflect the increase or decrease in the number of reserved information items on the regular chart side in the regular chart reserved display unit 198b. Also, in the display control processing (step S9218), based on the processing results of the immediately preceding steps S9216 and S9217, output information is set to update the display content of the first special chart display unit 197a and the second special chart display unit 197b, and output information is set to update the display content of the regular chart display unit 198a.

Then, the contents of the command and signal received from the payout control device 217 are confirmed, and a payout status reception process is executed to perform processing corresponding to the confirmation results (step S9219). Then, a payout output process is executed (step S9220). In the payout output process, a process is executed to set the prize ball command as the output target. Furthermore, in the payout output process (step S9220), a process is executed to set the gaming machine information as the output target based on the timing for outputting the gaming machine information, which will be described later. Furthermore, in the payout output process (step S9220), a process is executed to respond to an abnormality in the communication path between the main MPU 222 and the payout MPU 261. Details of the payout output process (step S9220) will be described later. Then, an external information setting process is executed to control the start and end of the output of external signals according to the results of the various processes executed in this timer interrupt process (step S9221).

If a positive determination is made in step S9207, or if the processing of step S9221 is executed, a second management process, which is a non-specific control process, is executed using a CALLA command (step S9222). The second management process will be described in detail later.

Then, similar to step S9202 already described, the instruction "EXX" is executed (step S9223). Execution of this instruction swaps the data stored in the BC register 272, DE register 273, and HL register 274 with the data in the auxiliary register (the data stored in the BC' register 292, DE' register 293, and HL' register 294). This allows the data saved to the BC' register 292, DE' register 293, and HL' register 294 in step S9202 to be restored to the BC register 272, DE register 273, and HL register 274. Furthermore, the data in the BC register 272, DE register 273, and HL register 274 can be saved to the auxiliary register, making it available for reading in step S9202 of the next timer interrupt process (Figure 167).

Then, as in step S9201 already described, the instruction "EX AF, AF'" is executed (step S9224), and this timer interrupt processing (Figure 167) is terminated. Executing the instruction "EX AF, AF'" exchanges the data in the AF register 271 with the data in the auxiliary register (data in the AF' register 291). This allows the data saved in the AF' register 291 in step S9201 to be restored to the AF register 271. In addition, the data in the AF register 271 can be saved to the auxiliary register, making it possible to read it out in step S9201 of the next timer interrupt processing (Figure 167).

By executing the processing of steps S9223 and S9224, the processing of step S8714 or step S8715 can be resumed with the data used in the processing of step S8714 or step S8715 of the main processing (Figure 161) that was executed before the timer interrupt processing (Figure 167) was started restored to the AF register 271, BC register 272, DE register 273, and HL register 274.

As described above, the port output process (step S9208) and display control process (step S9218) involve setting the information to be output from the output port. As already explained, the registers into which the information to be output from the output port is set are provided in the monitoring and control register group 257. When setting data in a register included in the monitoring and control register group 257, an OUT instruction is executed that sets the information in the lowest byte of the address corresponding to that register when the register's upper second address information ("ABH") is set in the V register 278 of the first register group 265. This reduces the data volume of the instruction set in the program to set information in that register compared to a configuration in which an LD instruction is executed that sets the address (2 bytes) corresponding to that register.

In the read process (step S9209) and the payout status receiving process (step S9219), information input to the input port is read. As already explained, the register in which the information input to the input port is set is provided in the monitoring and control register group 257. When reading data from a register included in the monitoring and control register group 257, an IN instruction is executed that sets the information in the lowest byte of the address corresponding to that register when the upper second address information for register ("ABH") is set in the V register 278 of the first register group 265. This reduces the data size of the instruction set in the program to set information in that register compared to a configuration in which an LD instruction is executed that sets the address (2 bytes) corresponding to that register.

<General purpose power control processing>
Next, the normal power control processing executed in step S9217 of the timer interrupt processing (Figure 167) will be explained with reference to the flowchart of Figure 168.

If a win has occurred in the through gate 195 (step S9301: YES), and the number of reserved information for the regular map side stored in the first area 324a to the fourth area 324d of the regular map reserve area 224c is less than the upper limit of four (step S9302: NO), a storage process is executed in the regular map reserve area 224c (step S9303). In this storage process, the numerical information in the R register 268 is stored as reserved information for the regular map side in the area first area 324a to the fourth area 324d of the regular map reserve area 224c that does not store reserved information for the regular map side and that is earlier in the consumption order. Note that when reserved information for the regular map side is acquired, data settings are made to update the display content of the regular map reserve display unit 198b to reflect the current increase in the number of reserved information for the regular map side.

If a negative judgment is made in step S9301, if a positive judgment is made in step S9302, or if the processing of step S9303 is executed, the normal map/normal power address table stored in the main ROM 223 is read (step S9304). The normal map/normal power address table contains the start address of a program for executing processing corresponding to the numerical information of the normal map/normal power counter. The normal map/normal power counter is a counter used by the main MPU 222 to identify the processing content to be executed in the normal map/normal power control processing.

The normal map/normal power counter can take a value between "0" and "3," and each value between "0" and "3" corresponds to a specific process (steps S9307 to S9310). Specifically, if the value of the normal map/normal power counter is "0," the normal map change start process (step S9307) is executed, which starts the change display cycle in the normal map display unit 198a. If the value of the normal map/normal power counter is "1," the normal map change in progress process (step S9308) is executed, which advances the change display cycle in the normal map display unit 198a. If the value of the normal map/normal power counter is "2," the normal map confirmation process (step S9309) is executed, which ends the change display cycle in the normal map display unit 198a. If the value of the normal map/normal power counter is "3," the normal power control process (step S9310) is executed, which controls the normal power release state of the normal power device 194a in the second operating port 194.

In the normal map normal power control process, after reading the normal map normal power address table (step S9304), the start address corresponding to the information in the normal map normal power counter is obtained from the normal map normal power address table (step S9305), and the process jumps to the process indicated by the obtained start address (step S9306). Each process in steps S9307 to S9310 is explained individually below.

First, we will explain the general map change start process in step S9307.

The normal map change start process executes a data setting process, provided that reserved information on the normal map side is stored in the normal map reservation area 224c. In the data setting process, the data stored in the first area 324a of the normal map reservation area 224c is moved to the execution area 325 for normal maps. Then, a process is executed to shift the data stored in the memory area of the normal map reservation area 224c. This data shift process shifts the data stored in the first through fourth areas 324a through 324d sequentially to the lower areas. Specifically, the data in each area is shifted from the second area 324b to the first area 324a, the third area 324c to the second area 324b, and the fourth area 324d to the third area 324c. Then, the fourth area 324d is cleared to "0." Additionally, the data setting process performs data setting to update the display content of the normal map reservation display unit 198b in accordance with the current decrease in the number of reserved information items on the normal map side.

If the current mode is not the opening/closing execution mode, the control section 224 determines whether the first high-frequency flag stored in the main RAM 224 is set to "1." The first high-frequency flag is a flag used by the main MPU 222 to determine whether the support mode is the first high-frequency support mode. When a transition to the first high-frequency support mode occurs, the first high-frequency flag is set to "1," and when the first high-frequency support mode ends, the first high-frequency flag is cleared to "0."

When in the open/close execution mode, the low probability table for the normal side is read from the main ROM 223 to the main RAM 224. Also, when the first high frequency flag is not set to "1" even though the open/close execution mode is not active, i.e., when the support mode is the low frequency support mode or the second high frequency support mode, the low probability table for the normal side is read from the main ROM 223 to the main RAM 224. On the other hand, when the first high frequency flag is set to "1" and the open/close execution mode is not active, i.e., when the support mode is the first high frequency support mode, the high probability table for the normal side is read from the main ROM 223 to the main RAM 224. The low probability table for the normal side and the high probability table for the normal side each have a value in the R register 268 that results in a win for the electric role release. In this case, the high probability table for the normal side has a higher number of values in the R register 268 that result in a win for the electric role release than the low probability table for the normal side. This results in a higher probability of a win for the electric role release when the high probability table for the normal side is referenced than when the low probability table for the normal side is referenced. In other words, there is a high probability mode on the normal side and a low probability mode on the normal side so that the probability of winning the electric role release is relatively high or low as a judgment mode for the normal role win/loss judgment process described below. The low probability table on the normal side is set so that the probability of winning the electric role release is 1/2, and the high probability table on the normal side is set so that the probability of winning the electric role release is 4/5, but as long as the high probability mode on the normal side has a higher probability of winning the electric role release than the low probability mode on the normal side, these probabilities of winning the electric role release are arbitrary.

When the low probability table for the normal side is read out, or when the high probability table for the normal side is read out, a normal side hit/miss determination process is executed. In the normal side hit/miss determination process, the read table is compared with the pending information for the normal side that is the target of this normal side hit/miss determination process (numerical information obtained from R register 268). If the result of the normal side hit/miss determination process is a win for the electric role release, a stop result setting process for the normal side hit result is executed. Specifically, information on the stop pattern of the pattern for the normal side hit result that will be finally displayed in the current variable display on the normal side display unit 198a is read from the main ROM 223 to the main RAM 224. On the other hand, if the result of the normal side hit/miss determination process is not a win for the electric role release, a stop result setting process for the normal side miss result is executed. Specifically, information on the stop pattern of the pattern for the normal side miss result that will finally be displayed in the current continuous display on the normal side display unit 198a is read from the main ROM 223 to the main RAM 224. The information on the pattern selected in this case is different from the information on the pattern stopping pattern for the regular winning result.

When the stop result setting process for a normal winning result or the stop result setting process for a normal losing result is executed, it is determined whether the current mode is the opening/closing execution mode, and if the current mode is not the opening/closing execution mode, it is determined whether either the first high frequency flag or the second high frequency flag stored in the main RAM 224 is set to "1." As already explained, the first high frequency flag is a flag used by the main MPU 222 to determine whether the support mode is the first high frequency support mode. When a transition to the first high frequency support mode occurs, the first high frequency flag is set to "1," and when the first high frequency support mode ends, the first high frequency flag is cleared to "0." The second high frequency flag is a flag used by the main MPU 222 to determine whether the support mode is the second high frequency support mode. When a transition to the second high frequency support mode occurs, the second high frequency flag is set to "1," and when the second high frequency support mode ends, the second high frequency flag is cleared to "0."

When in opening/closing execution mode, information corresponding to 10 seconds, which is a long period of time for the current display of changes in the map display unit 198a, is set in the map side timer counter provided in the main RAM 224. Also, when both the first high frequency flag and the second high frequency flag are not set to "1", that is, when the support mode is low frequency support mode, information corresponding to 10 seconds, which is a long period of time for the current display of changes in the map display unit 198a, is set in the map side timer counter provided in the main RAM 224. The numerical information set in the map side timer counter is updated by the specific control timer update process in step S9212 of the timer interrupt process (Figure 167). As a result, when in opening/closing execution mode or when the support mode is low frequency support mode, the display of changes in the map display unit 198a is performed for a relatively long period of time.

If the first high frequency flag or second high frequency flag is set to "1" instead of the opening/closing execution mode, that is, if the support mode is the first high frequency support mode or the second high frequency support mode, information corresponding to 1 second, which is a short period of time as the duration of the current variable display in the general map display unit 198a, is set in the general map timer counter in the main RAM 224. As a result, when the support mode is the first high frequency support mode or the second high frequency support mode, the variable display in the general map display unit 198a will be performed for a relatively short period of time.

Then, the display of changing patterns in the normal map display unit 198a begins. A change display table for normal maps is pre-stored in the main ROM 223 as a table referenced by the main MPU 222 when displaying changing patterns in the normal map display unit 198a. When displaying changing patterns in the normal map display unit 198a, the same change display table is used regardless of the result of the normal map pass/fail determination process. When displaying changing patterns in the normal map display unit 198a, the display of changing patterns according to a predetermined pattern is repeated, and the change display table for normal maps contains control data for one cycle of changing patterns according to that predetermined pattern. Therefore, when displaying changing patterns in the normal map display unit 198a, the change display table for normal maps is repeatedly used until just before the final display is made. Then, the value of the normal map/normal power counter is incremented by 1. As a result, the value of the normal map/normal power counter becomes "1", which corresponds to the normal map change processing (step S9308).

Next, we will explain the normal map change processing in step S9308 of the normal map normal power control processing (Figure 168).

The normal map change processing determines whether the image change display in the normal map display unit 198a is in progress and whether it is time before the final display. Specifically, it is determined that it is time before the final display when the value of the normal map timer counter, which measures the duration of the current change display, is 0.4 seconds remaining. If it is time before the final display, processing is executed to regularly change the display mode of the image in the normal map display unit 198a. Furthermore, when it is time to display the final display, the display mode of the image in the normal map display unit 198a is set to a stopped mode corresponding to the result of the current normal map pass/fail judgment processing. Then, the value of the normal map normal counter is incremented by 1, updating the value of the counter to one corresponding to the normal map confirmation processing.

Next, we will explain the process during normal map confirmation in step S9309 of the normal map normal power control process (Figure 168).

If the confirmation display period for this variation display (specifically, 0.4 seconds) has passed, it is determined whether the result of the normal map win/loss determination process for this variation display is a win for electric role release. If the electric role release is not a win, the value of the normal map normal power counter is cleared to "0", and then this normal map confirmation process is terminated. This causes the value of the normal map normal power counter to correspond to the normal map variation start process. On the other hand, if the electric role release is a win, it is determined whether the current mode is open/close execution mode, and if not, it is determined whether either the first high frequency flag or the second high frequency flag in the main RAM 224 is set to "1". If it is open/close execution mode, it executes the short release setting process. Furthermore, if it is not open/close execution mode but both the first high frequency flag and the second high frequency flag are not set to "1", that is, if the support mode is low frequency support mode, it executes the short release setting process.

In the short release setting process, the normal power release counter provided in the main RAM 224 is set to "1", and the normal power winning counter provided in the main RAM 224 is set to "10". In addition, information corresponding to 0.7 seconds, which is the duration of the short release on the normal power side, is set in the normal power side timer counter in the main RAM 224. The normal power release counter is a counter that allows the main MPU 222 to determine the number of times the normal power feature 194a of the second operating port 194 is opened in the current normal power release state. The normal power winning counter is a counter that allows the main MPU 222 to determine whether the number of game balls that have entered the second operating port 194 in the current normal power release state has reached the upper limit of 10 on the normal power side.

By executing the short opening setting process, the execution mode of the normal power opening state that occurs in the low frequency support mode becomes the low expectation mode. In other words, in the normal power opening state in the low expectation mode, a short opening of the normal power device 194a occurs once. As already explained, since the game ball launch cycle is 0.6 seconds, when a short opening of the normal power device 194a occurs once, game balls will not generally enter the second operating port 194, and even if they do, the number of balls that enter will be around one.

If the first high frequency flag or second high frequency flag is set to "1" instead of the open/close execution mode, that is, if the support mode is the first high frequency support mode or the second high frequency support mode, the long release setting process is executed. In the long release setting process, the normal power release counter in the main RAM 224 is set to "3" and the normal power winning counter in the main RAM 224 is set to "10". In addition, information corresponding to 2 seconds, which is the duration of the long release on the normal power side, is set in the normal power timer counter in the main RAM 224. By executing the long release setting process, the execution mode of the normal power release state that occurs in the first high frequency support mode or the second high frequency support mode becomes the high expectation mode. In other words, in the normal power release state in the high expectation mode, the long release of the normal power device 194a occurs three times. As already explained, the ball launch cycle is 0.6 seconds, so when a long opening of the normal power device 194a occurs once, approximately three game balls can enter the second operating port 194. In the normal power opening state of the high expectation mode, three long openings occur, separated by an interval period on the normal power side during which the second operating port 194 is closed. Therefore, when the normal power opening state of the high expectation mode occurs, approximately nine game balls can enter. Note that the normal power opening state ends when the number of game balls entering the second operating port 194 reaches 10, which is the upper limit on the normal power side. Therefore, when the normal power opening state of the high expectation mode occurs, an event may occur in which the normal power opening state ends when the upper limit number of game balls on the normal power side enters the second operating port 194.

When the short-open setting process or long-open setting process is executed, the normal power function 194a of the second operating port 194 is set to the open state by starting to output a drive signal to the normal power drive unit 194b. The value of the normal power counter is then incremented by 1, updating the counter value to correspond to the normal power control process.

Next, we will explain the normal power control process of step S9310 in the normal power control process (Figure 167).

In the normal power control process, if a win has occurred in the second operating port 194, a value corresponding to the number of wins is subtracted from the value of the normal power winning counter in the main RAM 224. If the value of the normal power winning counter is "0", the value of the normal power open counter in the main RAM 224 is cleared to "0", and the output of the drive signal to the normal power drive unit 194b is stopped, thereby closing the second operating port 194. The value of the normal map normal power counter is then cleared to "0". As a result, the process to be executed in the next processing round of the normal map normal power control process becomes the normal map fluctuation start process (step S9307).

If no winning has occurred in the second operating port 194 or the value of the normal power winning counter is not "0," the system determines whether the value of the normal power timer counter in the main RAM 224 is "0." If the value of the normal power timer counter is "0," the system stops outputting the drive signal to the normal power drive unit 194b, thereby closing the second operating port 194. The system then subtracts one from the value of the normal power release counter in the main RAM 224 and determines whether the value of the normal power release counter after the subtraction is "0." If the value of the normal power release counter after the subtraction is one or greater, the system maintains the second operating port 194 in a closed state for the normal power interval period (specifically, one second), and then again outputs a drive signal to the normal power drive unit 194b, thereby opening the second operating port 194. The system also sets information in the normal power timer counter in the main RAM 224 corresponding to two seconds, which is the duration of the long open state on the normal power side. This causes the second operating port 194 to open again, and the duration of this open state is set to 2 seconds, which is the duration of the long open state on the normal power side. If the value of the normal power open counter after subtracting 1 is "0", the value of the normal power counter is cleared to "0". As a result, the process to be executed in the next normal power control process becomes the normal power fluctuation start process (step S9307).

<Special diagram special power control processing>
Next, the special picture special power control processing executed in step S9216 of the timer interrupt processing (Figure 167) will be explained with reference to the flowchart of Figure 169.

First, the pending information acquisition process is executed (step S9401). In the pending information acquisition process, if a win has occurred in the first actuation port 193 and the number of first pending information stored in the first special symbol reserve area 321 is less than the upper limit of storage capacity, the first pending information acquisition process is executed. In the first pending information acquisition process, the values of the win random number counter C1, type random number counter C2, and reach random number counter C3 are stored in the storage area of the first special symbol reserve area 321 corresponding to the number of pending information stored. Also, in the pending information acquisition process (step S9401), the second pending information acquisition process is executed if a win has occurred in the second actuation port 194 and the number of second pending information stored in the second special symbol reserve area 322 is less than the upper limit of storage capacity. In the second pending information acquisition process, the values of the win random number counter C1, type random number counter C2, and reach random number counter C3 are stored in the storage area of the second special symbol reserve area 322 corresponding to the number of pending information stored.

After executing the pending information acquisition process in step S9401, the numerical information of the special chart special power counter stored in the main RAM 224 is read (step S9402), and the special chart special power address table stored in the main ROM 223 is read (step S9403). Then, a start address corresponding to the numerical information of the special chart special power counter is obtained from the special chart special power address table (step S9404), and the process jumps to the process indicated by the obtained start address (step S9405).

The special chart special power counter is a counter that allows the main MPU 222 to determine which of the processes in steps S9406 to S9412 in the special chart special power control processing should be executed, and the special chart special power address table has a starting address set in the program for executing each of the processes in steps S9406 to S9412 corresponding to the numerical information of the special chart special power counter. If the value of the special chart special power counter is "0", the process jumps to special chart change start processing in step S9406; if the value of the special chart special power counter is "1", the process jumps to special chart change in progress processing in step S9407; if the value of the special chart special power counter is "2", the process jumps to special chart confirmation processing in step S9408; if the value of the special chart special power counter is "3", the process jumps to special power start processing in step S9409; if the value of the special chart special power counter is "4", the process jumps to special power open processing in step S9410; if the value of the special chart special power counter is "5", the process jumps to special power closed processing in step S9411; and if the value of the special chart special power counter is "6", the process jumps to special power end processing in step S9412. Each process in steps S9406 to S9412 is explained individually below.

First, we will explain the special chart change start process in step S9406. Note that the special chart change start process is not executed when a game has already been played or when the open/close execution mode is being executed.

In the special symbol change start process, if the second reserved information is not stored in the second special symbol reserve area 322 but the first reserved information is stored in the first special symbol reserve area 321, the first data setting process is executed. In the first data setting process, the data stored in the first area 321a of the first special symbol reserve area 321 is moved to the execution area 323 for the special symbol. Then, a process is executed to shift the data stored in the memory area of the first special symbol reserve area 321. This data shift process shifts the data stored in the first to fourth areas 321a to 321d sequentially toward the lower areas. Specifically, the data in each area is shifted from the second area 321b to the first area 321a, the third area 321c to the second area 321b, and the fourth area 321d to the third area 321c. Then, the fourth area 321d is cleared to "0." Then, the value of the first special symbol reserve counter in the main RAM 224 is decremented by one. As a result, the display content of the first special chart pending display section 197c in the special chart unit 197 is changed to one with one less first pending information item.

On the other hand, if second reserved information is stored in the second special symbol reserve area 322, the second data setting process is executed even if first reserved information acquired before the second reserved information is stored in the first special symbol reserve area 321. In the second data setting process, the data stored in the first area 322a of the second special symbol reserve area 322 is moved to the execution area 323 for the special symbol. Then, a process is executed to shift the data stored in the memory area of the second special symbol reserve area 322. This data shift process shifts the data stored in the first through fourth areas 322a through 322d sequentially toward the lower-order areas. Specifically, the data in each area is shifted from the second area 322b to the first area 322a, the third area 322c to the second area 322b, and the fourth area 322d to the third area 322c. Then, the fourth area 322d is cleared to "0." Then, the value of the second special symbol reserve counter in the main RAM 224 is decremented by one. As a result, the display content of the second special chart pending display section 197d in the special chart unit 197 is changed to one with one second pending information item removed.

When second reserved information is stored as described above, even if first reserved information obtained before the second reserved information is stored, the second reserved information will be subject to shifting to the special symbol execution area 323. As a result, the second reserved information will be consumed before the first reserved information as the target for starting a game round.

When the first data setting process or the second data setting process is executed, a win/loss determination process is executed. In the win/loss determination process, if the win/loss lottery mode is low probability mode and the start target of the game round is first reserved information, the first win/loss table for low probability is read from main ROM 223 to main RAM 224; if the win/loss lottery mode is low probability mode and the start target of the game round is second reserved information, the second win/loss table for low probability is read from main ROM 223 to main RAM 224; and if the win/loss lottery mode is high probability mode, the win/loss table for high probability is read from main ROM 223 to main RAM 224 regardless of whether the start target of the game round is first reserved information or second reserved information. After reading the win/loss table, the information for determining whether or not a win is made, i.e., the numerical information obtained from the win random number counter C1, is read from the reserved information stored in the execution area 323 for the special chart, and a determination is made as to whether the read numerical information matches any of the numerical information set as a jackpot result in the data group corresponding to the currently used setting value in the read win/loss table. Furthermore, if the read numerical information does not match any of the numerical information set as a jackpot result, a determination is made as to whether the information for determining whether or not a win is made matches any of the numerical information set as a time-saving result in the data group corresponding to the currently used setting value in the read win/loss table.

If the result of the hit/miss determination process is a jackpot result, a jackpot allocation determination process is executed. In the jackpot allocation determination process, if the start target of a game round is the first reserved information, the jackpot allocation table for the first special symbol is read from the main ROM 223 to the main RAM 224, and if the start target of a game round is the second reserved information, the jackpot allocation table for the second special symbol is read from the main ROM 223 to the main RAM 224. After the jackpot allocation table is read, allocation determination information, i.e., the numerical information obtained from the type random number counter C2, is read from the reserved information stored in the special symbol execution area 323, and the jackpot allocation table is referenced to determine which type of jackpot result the read numerical information corresponds to.

After executing the jackpot distribution determination process, the flag in the main RAM 224 corresponding to the type of jackpot result identified in the jackpot distribution determination process is set to "1". Then, the stop result setting process for the jackpot result is executed. Specifically, information on the stop pattern of the pattern that will ultimately be displayed on the special symbol display units 197a, 197b that are the starting target for this game round is identified from a stop result table for jackpot results that is pre-stored in the main ROM 223, and the identified information is stored in the main RAM 224.

If the result of the hit/miss determination process is not a jackpot result but a time-saving result, a time-saving allocation determination process is executed. In the time-saving allocation determination process, if the start target of the game round is the first reserved information, the time-saving allocation table for the first special symbol is read from the main ROM 223 to the main RAM 224, and if the start target of the game round is the second reserved information, the time-saving allocation table for the second special symbol is read from the main ROM 223 to the main RAM 224. After the time-saving allocation table is read, allocation determination information, i.e., the numerical information obtained from the type random number counter C2, is read from the reserved information stored in the execution area 323 for the special symbol, and the time-saving allocation table is referenced to determine which type of time-saving result the read numerical information corresponds to.

After the time-saving allocation determination process is executed, the flag in the main RAM 224 corresponding to the type of time-saving result identified in the time-saving allocation determination process is set to "1". Then, the stop result setting process for the time-saving result is executed. Specifically, information on the stop mode of the pattern that will ultimately be displayed on the special symbol display units 197a, 197b that are the starting target for the current game round is identified from a stop result table for the time-saving result that is pre-stored in the main ROM 223, and the identified information is stored in the main RAM 224.

If the result of the hit/miss determination process is neither a jackpot result nor a time-saving result, a stop result setting process for a miss result is executed. Specifically, information on the type of pattern to be ultimately displayed on the first special symbol display unit 197a or the second special symbol display unit 197b in this game round is identified from a stop result table for miss results that is pre-stored in the main ROM 223, and the identified information is stored in the main RAM 224.

When the stop result setting process for a jackpot result, the stop result setting process for a time-saving result, or the stop result setting process for a miss result is executed, a process for specifying the variable display period is executed. In the process for specifying the variable display period, a period corresponding to the lottery mode, support mode, and game result is specified as the variable display period for the images on the special chart display units 197a and 197b.

Then, a variation command and a type command corresponding to the game turn to be started this time are sent to the sound/light side MPU 233. The variation command includes information on the variable display period identified in the variable display period identification process, as well as information indicating whether the game turn to be started this time corresponds to the first special symbol display area 197a or the second special symbol display area 197b. The type command also includes information on whether the game turn to be started this time corresponds to a jackpot result, and if so, information indicating what type of jackpot result it is. The type command also includes information on whether the game turn to be started this time corresponds to a time-saving result, and if so, information indicating what type of time-saving result it is.

Then, the display of the changing image begins on either the first special symbol display unit 197a or the second special symbol display unit 197b, whichever display unit is the target for starting the current game round. Then, the value of the special symbol special electricity counter is incremented by 1. As a result, the value of the special symbol special electricity counter becomes "1", which corresponds to the special symbol changing processing (step S9407).

When the sound/light side MPU 233 receives a variation command and a type command, it executes processing to determine the execution content of the game round presentation corresponding to those commands. It then executes light emission control of the display light-emitting unit 204 and sound output control of the speaker unit 205 according to the table corresponding to the processing results. As a result, the light emission presentation of the display light-emitting unit 204 and the sound output presentation of the speaker unit 205 are executed throughout the variable display period of the current game round. Furthermore, the sound/light side MPU 233 sends a command corresponding to the execution content of the game round presentation determined this time to the display side MPU 243. Upon receiving the command, the display side MPU 243 executes display control of the pattern display device 199 according to the table corresponding to that command. As a result, the display presentation of the pattern display device 199 is executed throughout the variable display period of the current game round.

Next, we will explain the special chart change processing executed in step S9407 of the special chart special power control processing (Figure 169).

If the value of the special symbol timer counter is 1 or greater, the variable display period for the current game has not yet elapsed, and it is time to update the display content of the special symbol display unit 197a, 197b that is the target of execution for the current game, data is set to update the display content of the special symbol display unit 197a, 197b. This updates the display content of the image on the controlled special symbol display unit 197a, 197b to the display content of the next pattern in the order.

On the other hand, if the value of the special symbol timer counter is "0", i.e., if the variable display period has elapsed, a final stop command is sent to the sound/light side MPU 233. Then, information on the stop mode of the images on the special symbol display units 197a, 197b stored in the main side RAM 224 at the start of a game round is read out. This stops the variable display of the images on the controlled special symbol display units 197a, 197b, with the image corresponding to the game result of the current game round displayed. Then, information on the final stop period (specifically, 0.5 seconds) is set in the special symbol timer counter. This starts measuring the final stop period. Then, the value of the special symbol special electric counter is incremented by 1. This sets the value of the special symbol special electric counter to "2", which corresponds to the special symbol confirmation process (step S9408).

When the sound/light side MPU 233 receives a final stop command, it sends a corresponding command to the display side MPU 243. When the display side MPU 243 receives this command, it causes the symbol combination corresponding to the stop result of the current game round to be displayed on the symbol display device 199 for the final stop period.

Next, we will explain the special chart confirmation process executed in step S9408 of the special chart special power control process (Figure 169).

If the value of the special symbol side timer counter is "0" and the final stop period has elapsed, and the result of this game is a jackpot, information corresponding to the opening period (specifically, 5 seconds) is set in the special symbol side timer counter and an opening command is sent to the sound/light side MPU 233. When the sound/light side MPU 233 receives the opening command, it causes the effect corresponding to the opening period to be performed by the symbol display device 199, display light-emitting unit 204, and speaker unit 205. After that, it increments the value of the special symbol special power counter by 1. As a result, the value of the special symbol special power counter becomes "3", which corresponds to the special power start processing (step S9409). Furthermore, if the result of this game is not a jackpot, it clears the special symbol special power counter to "0". As a result, the value of the special symbol special power counter becomes "0", which corresponds to the special symbol variation start processing (step S9406).

Next, we will explain the special call start processing executed in step S9409 of the special call control processing (Figure 169).

The process for setting the number of opening and closing times is executed on the condition that the value of the special symbol timer counter is "0," i.e., the opening period has elapsed. In this case, if the current game result is a 5R low-probability result or a 5R high-probability result, the round counter in the main RAM 224 is set to "5." If the current game result is a 10R high-probability result, the round counter in the main RAM 224 is set to "10." The round counter is a counter used by the main MPU 222 to determine the number of remaining rounds in the opening and closing execution mode. Information on the duration of the round game (specifically, 29 seconds) is also set in the special symbol timer counter. The prize counter in the main RAM 224 is also set to "10." The prize counter is a counter used by the main MPU 222 to determine the remaining number of prizes below the maximum number of prizes. The special electric prize winning device 192 is set to the open state by outputting a drive signal to the special electric drive unit 192b. After that, the value of the special diagram special line counter is incremented by 1. As a result, the value of the special diagram special line counter becomes "4", which corresponds to the special line open processing (step S9410).

Next, we will explain the special call open processing executed in step S9410 of the special call control processing (Figure 169).

If the value of the special symbol side timer counter is "0," i.e., if the open duration has elapsed, the value of the round counter in the main side RAM 224 is decremented by 1 and the output of the drive signal to the special symbol drive unit 192b is stopped, thereby placing the special symbol winning device 192 in a closed state. Furthermore, if a game ball has entered the special symbol winning device 192, the value of the winning counter is decremented by 1. If the value of the winning counter after the decrement is "0," the value of the round counter in the main side RAM 224 is decremented by 1 and the output of the drive signal to the special symbol drive unit 192b is stopped, placing the special symbol winning device 192 in a closed state. Furthermore, if the round counter value is decremented by 1, and the value of the round counter after the decrement is 1 or greater, the interval period information (specifically, 3 seconds) is set in the special symbol side timer counter, and then the value of the special symbol special symbol counter is incremented by 1. As a result, the value of the special symbol special symbol counter becomes "5," which corresponds to the special symbol closed processing (step S9411). On the other hand, if the value of the round counter after subtracting 1 is "0", the ending period information (specifically, 5 seconds) is set in the special pattern side timer counter, and after sending an ending command to the sound/light side MPU 233, the value of the special pattern special signal counter is incremented by 2. As a result, the value of the special pattern special signal counter becomes "6", which corresponds to the special signal termination process (step S9412). When the sound/light side MPU 233 receives the ending command, it causes the pattern display device 199, display light-emitting unit 204, and speaker unit 205 to perform a performance corresponding to the ending period.

Next, we will explain the special line closed processing executed in step S9411 of the special line control processing (Figure 169).

If the value of the special chart timer counter is "0", i.e., if the interval period has elapsed, information on the duration of the round of play being open (specifically, 29 seconds) is set in the special chart timer counter. In addition, the winning counter in the main RAM 224 is set to "10". In addition, a drive signal is output to the special power drive unit 192b, thereby putting the special power winning device 192 into an open state. After that, the value of the special chart special power counter is decremented by 1. As a result, the value of the special chart special power counter becomes "4", which corresponds to the special power open processing (step S9410).

Next, we will explain the special call termination process executed in step S9412 of the special call control process (Figure 169).

If the value of the special chart timer counter is "0", i.e., the ending period has passed, and the game result that triggered this opening/closing execution mode was a 5R high probability result or a 10R high probability result, the high probability flag in the main RAM 224 is set to "1". As already explained, the high probability flag is a flag used by the main MPU 222 to determine whether the win/loss lottery mode is in the high probability mode. Setting the high probability flag to "1" causes the win/loss lottery mode to become the high probability mode.

Then, the first high frequency flag in the main RAM 224 is set to "1" and the second high frequency flag in the main RAM 224 is cleared to "0." As already explained, the first high frequency flag is a flag used by the main MPU 222 to determine whether the support mode is the first high frequency support mode, and the second high frequency flag is a flag used by the main MPU 222 to determine whether the support mode is the second high frequency support mode, as already explained. By setting the first high frequency flag to "1" and clearing the second high frequency flag to "0," the support mode becomes the first high frequency support mode. Then, the special chart special power counter is cleared to "0." As a result, the value of the special chart special power counter becomes "0," which corresponds to the special chart variation start processing (step S9406).

On the other hand, if the game result that triggered this opening/closing execution mode was a 5R low probability result, the high probability flag in the main RAM 224 is cleared to "0." Clearing the high probability flag to "0" changes the win/lose lottery mode to low probability mode. After that, the first high frequency flag in the main RAM 224 is set to "1," and the second high frequency flag in the main RAM 224 is cleared to "0." Setting the first high frequency flag to "1" and clearing the second high frequency flag to "0" changes the support mode to first high frequency support mode. After that, the special chart special power counter is cleared to "0." As a result, the value of the special chart special power counter becomes "0," which corresponds to the special chart variation start processing (step S9406).

Next, the power outage monitoring process executed by the main MPU 222 will be described with reference to the flowchart in Figure 170. As already explained, the power outage monitoring process is executed in step S9203 of the timer interrupt process (Figure 167). Note that of the processes in steps S9501 to S9507 in the power outage monitoring process, all processes except the second stack pointer storage process called and executed in step S9503 are executed using a program and data for specific control, and the second stack pointer storage process is executed using a program and data for non-specific control.

First, it is determined whether a power outage has occurred (step S9501). In step S9501, a positive determination is made if a fall from HI to LOW is detected in the power outage signal input from the power outage monitoring board 225 to the main CPU 251. Details of the power outage signal will be described later.

If a power outage is identified (step S9501: YES), a first stack pointer storage process is executed (step S9502). In the first stack pointer storage process, the data of the stack pointer 279 in the first register group 265 is set to the first stack pointer area in the specific control work area 281. This makes it possible to restore the data set in the first stack pointer area before the power was cut off to the stack pointer 279 in the first register group 265 after the supply of operating power to the pachinko machine 160 begins.

Then, a subroutine program corresponding to the second stack pointer storage process, which is a non-specific control process, is called by a CALLA instruction, and the second stack pointer storage process is executed (step S9503). When the second stack pointer storage process is executed by a CALLA instruction, execution of the timer interrupt process is prohibited. This prevents the timer interrupt process, which is a specific control process, from interrupting and starting while the second stack pointer storage process, which is a non-specific control process, is being executed. The register group usage switching circuit 252 then switches from a state in which the first register group 265 is being used to a state in which the second register group 266 is being used. This causes the second register group 266 to be used in the second stack pointer storage process, which is a non-specific control process, preventing the data in each register included in the first register group 265 from being overwritten.

In the second stack pointer storage process (step S9503), the data of the stack pointer 309 in the second register group 266 is set to the second stack pointer area in the work area 283 for non-specific control. This makes it possible to restore the data set in the second stack pointer area before power is cut off to the stack pointer 309 in the second register group 266 after the supply of operating power to the pachinko machine 160 begins. Thereafter, the second stack pointer storage process (step S9503) is terminated by the instruction "RETA." When the second stack pointer storage process is terminated by the instruction RETA, the register group to be used is switched from the second register group 266 to the first register group 265, and the execution of the timer interrupt process (Fig. 167) is permitted, after which the second stack pointer storage process is terminated. By switching the register group to be used from the second register group 266 to the first register group 265, the first register group 265 is used in specific control processing, preventing the data in each register included in the second register group 266 from being overwritten.

After executing the second stack pointer storage process in step S9503, the power outage flag in the specific control work area 281 is set to "1" (step S9504), and a checksum calculation process is executed (step S9505). In the checksum calculation process, checksums are calculated for the specific control work area 281 and the specific control stack area 282, and the calculated checksums are stored in the specific control work area 281. Note that in the specific control work area 281, the areas in which the checksums for the specific control work area 281 and the specific control stack area 282 are stored are excluded from the areas targeted for checksum calculation. This prevents the checksum value for the specific control work area 281 from changing due to the checksums being stored.

Then, access prohibition processing is executed (step S9506). In the access prohibition processing, the access control register of the monitoring and control register group 257 is set to "0" to clear the access control register to "0". This makes it possible to prohibit access to the main RAM 224 and prevent data in the main RAM 224 from being destroyed due to abnormal access to the main RAM 224 or noise. Then, output port clear processing is executed (step S9507). In the output port clear processing, the first output data register and second output data register of the monitoring and control register group 257 are set to "0" to clear the first output data register and second output data register to "0". Then, by sequentially updating the value of the output destination selection register in the monitoring and control register group 257 from "1" to "6," the display data output to the first special chart display unit 197a, the second special chart display unit 197b, the first special chart reserved display unit 197c, the second special chart reserved display unit 197d, the normal chart display unit 198a, and the normal chart reserved display unit 198b is cleared to "0," and then the output destination selection register is cleared to "0." Execution of the output port clear process (step S9507) clears all output ports of the main MPU 222. Processing then waits until the supply of operating power to the main MPU 222 is stopped before proceeding.

In this way, the access prohibition process (step S9506) and the output port clear process (step S9507) involve setting the registers included in the monitoring and control register group 257. As already explained, when the V register 278 of the first register group 265 has the upper second address information for registers ("ABH") set, an OUT instruction is executed that sets the information in the lowest byte of the address corresponding to that register. This reduces the data size of the instruction set in the program to set information in that register, compared to a configuration in which an LD instruction is executed that sets the address (2 bytes) corresponding to that register.

Next, before explaining the ball-winning detection process (Figure 172) executed in step S9210 of the timer interrupt process (Figure 167), we will explain the configuration related to winning.

As already explained, the monitoring and control register group 257 is provided with edge measurement registers 0 to 7. Also, as already explained, the value of the edge measurement register 0 becomes "1" when the first winning opening detection sensor 331a detects the passage of one game ball, the value of the first edge measurement register becomes "1" when the second winning opening detection sensor 332a detects the passage of one game ball, the value of the second edge measurement register becomes "1" when the third winning opening detection sensor 333a detects the passage of one game ball, and the value of the third edge measurement register becomes "1" when the special electric detection sensor 334a detects the passage of one game ball. The value of the fourth edge measurement register becomes "1" when the first actuation port detection sensor 335a detects the passage of one game ball, the value of the fifth edge measurement register becomes "1" when the second actuation port detection sensor 336a detects the passage of one game ball, the value of the sixth edge measurement register becomes "1" when the outlet detection sensor 337a detects the passage of one game ball, and the value of the seventh edge measurement register becomes "1" when the gate detection sensor 338a detects the passage of one game ball.

The 0th to 7th edge measurement registers are located in the continuous address range of "AB50H" to "AB57H." The most significant byte of this address range is the same, "ABH," stored in the V register 278. During the ball entry detection process (Figure 172), the least significant byte (specifically, "50H") of the address corresponding to the 0th edge measurement register is first set in the C register 272b. This makes it possible to specify the address of the 0th edge measurement register using the address ("AB50H") obtained by combining the data in the V register 278 ("ABH") and the data in the C register 272b ("50H"). Thereafter, each time the value of the C register 272b is updated by adding 1, the register specified by the address obtained by combining the data in the V register 278 and the data in the C register 272b is updated in the following order: 1st edge measurement register → 2nd edge measurement register → ... → 7th edge measurement register.

Figure 171 is an explanatory diagram illustrating the various storage areas provided in the work area 281 for specific control and the various storage areas provided in the work area 283 for non-specific control.

As shown in FIG. 171, a confirmation flag group 281a is provided in the work area 281 for specific control. The confirmation flag group 281a includes a first winning confirmation flag, a second winning confirmation flag, a third winning confirmation flag, a special telephone winning flag, a first activation winning confirmation flag, a second activation winning confirmation flag, an out confirmation flag, and a gate winning confirmation flag. The first winning confirmation flag is a flag for the main MPU 222 to identify that one game ball has been detected by the first winning port detection sensor 331a, the second winning confirmation flag is a flag for the main MPU 222 to identify that one game ball has been detected by the second winning port detection sensor 332a, the third winning confirmation flag is a flag for the main MPU 222 to identify that one game ball has been detected by the third winning port detection sensor 333a, and the special electric winning flag is a flag for the main MPU 222 to identify that one game ball has entered the special electric winning device 192. The first activation winning confirmation flag is a flag that allows the main MPU 222 to identify that one game ball has entered the first activation port 193, the second activation winning confirmation flag is a flag that allows the main MPU 222 to identify that one game ball has entered the second activation port 194, the out confirmation flag is a flag that allows the main MPU 222 to identify that one game ball has been detected by the out port detection sensor 337a, and the gate winning confirmation flag is a flag that allows the main MPU 222 to identify that one game ball has entered the through gate 195.

Next, the ball-entry detection process executed by the main MPU 222 will be explained with reference to the flowchart in Figure 172. As already explained, the ball-entry detection process is executed in step S9210 of the timer interrupt process (Figure 167). Note that steps S9601 to S9609 in the ball-entry detection process are executed using a program and data for specific control.

First, the instruction "EX K,K'" is executed (step S9601). Execution of this instruction swaps the data in K register 277 ("A0H") with the data in K' register 297 ("A1H"). As a result, "A1H," the most significant byte of the second address range in specific control work area 281, is set in K register 277. Because the one-byte exchange instruction "EX K,K'" is set as the instruction for setting "A1H" in K register 277, the data size of the instruction set in the program for setting "A1H" in K register 277 is reduced compared to a configuration in which a transfer instruction (specifically, a two-byte LD instruction "LD K,A1H") for setting the information "A1H" in K register 277 is set.

Then, various flags are cleared (step S9602). In the various flags clearing process, the first winning confirmation flag, second winning confirmation flag, third winning confirmation flag, special line winning flag, first activation winning confirmation flag, second activation winning confirmation flag, out confirmation flag, and gate winning confirmation flag, which are set in the confirmation flag group 281a of the work area 281 for specific control, are cleared to "0."

Then, the lowest byte ("50H") of the address ("AB50H") corresponding to the 0th edge measurement register of the monitoring control register group 257 is set in the C register 272b (step S9603). This makes it possible to specify the address of the 0th edge measurement register using the address obtained by combining the data in the V register 278 and the data in the C register 272b.

Then, a 10-prize-ball processing operation is executed (step S9604) to process balls entering a ball entry section where the number of prize balls is set to 10 (specifically, the general prize entry opening 191 corresponding to the first prize entry opening detection sensor 331a, the general prize entry opening 191 corresponding to the second prize entry opening detection sensor 332a, or the general prize entry opening 191 corresponding to the third prize entry opening detection sensor 333a). Figure 173 is a flowchart showing the 10-prize-ball processing operation. Note that steps S9701 to S9716 in the 10-prize-ball processing operation are executed using a specific control program and specific control data.

First, the command "LDK A, (10KSHKYC_L)" is executed (step S9701). "10KSHKYC_L" is the lowest byte of a two-byte address corresponding to the 10 prize ball counter provided in the work area 281 for specific control. This address is included in the second address range of the work area 281 for specific control. The 10 prize ball counter is a counter used by the main MPU 222 to determine the number of times 10 game balls should be paid out. In the command "LDK A, (10KSHKYC_L)," the 10 prize ball counter is identified as the source area using an address obtained by combining "10KSHKYC_L" with the upper second reference address information for identification, "A1H," stored in the K register 277. By executing the command "LDK A, (10KSHKYC_L)", the data of the 10-ball counter is read into the A register 271a.

In this way, the command "LDK A, (10KSHKYC_L)" (2 bytes), which includes the lowest byte of the address corresponding to the 10 prize ball counter, is set as the command for reading the data from the 10 prize ball counter into A register 271a. This reduces the data capacity of the transfer command set in the program to read the data from the 10 prize ball counter into A register 271a, compared to a configuration in which the command "LD A, (10KSHKYC)" (3 bytes), which includes the address (2 bytes) corresponding to the 10 prize ball counter, is set.

Then, the instruction "IN B, (C)" is executed (step S9702). The instruction "IN B, (C)" is also executed in steps S9707 and S9712, described below. "IN" is an input instruction that specifies an address using data in the V registers 278 and 308. "B" specifies that the B register 272a is the destination for reading information, while "(C)" specifies that the data in the C register 272b is used as the lowest byte of the address specification for the register from which information is read. The instruction "IN B, (C)" identifies the 0th edge measurement register as the source of information read using the address ("AB50H") obtained by combining the data stored in the V register 278 (the upper second reference address information for registers called "ABH") and the data stored in the C register 272b ("50H"). Execution of the instruction "IN B, (C)" reads the data (8 bits) of the 0th measurement register into the B register 272a.

In this way, by using an IN instruction that uses data from the V register 278 to read data from the 0th edge measurement register, the data size of the instruction set in the program to read data from the 0th edge measurement register to the B register 272a is reduced compared to a configuration in which data is read from the 0th edge measurement register using an LD instruction (specifically, a configuration in which the HL register 274 is set to "AB50H" with the instruction "LD HL, AB50H" and the data from the 0th edge measurement register is read to the B register 272a with the instruction "LD B, (HL)").

After that, if the value of the 0th edge measurement register read into register B 272a in step S9702 is "1" (step S9703: YES), i.e., if the passage of one game ball is detected by the first winning hole detection sensor 331a, the first winning confirmation flag in the work area 281 for specific control is set to "1" (step S9704).

Then, the value of A register 271a is incremented by 1 (step S9705). As already explained in step S9701, A register 271a stores the data read from the 10 prize ball counter. In this way, after the value of the 10 prize ball counter is read into A register 271a, it is incremented by 1 on the condition that the passage of one game ball is detected by the first prize opening detection sensor 331a.

If a negative determination is made in step S9703, or if the processing of step S9705 is performed, the value of C register 272b is incremented by 1 (step S9706). As a result, the lowest byte ("51H") of the address corresponding to the first edge measurement register in the monitoring control register group 257 is set in C register 272b.

Then, similar to step S9702 described above, the instruction "IN B, (C)" is executed (step S9707). In the instruction "IN B, (C)", the first edge measurement register is identified as the source of information read by the address ("AB51H") obtained by combining the data ("ABH") stored in the V register 278 and the data ("51H") stored in the C register 272b. By executing the instruction "IN B, (C)", the data (8 bits) of the first measurement register is read into the B register 272a.

Thereafter, if the value of the first edge measurement register read into register B 272a in step S9707 is "1" (step S9708: YES), i.e., if the passage of one game ball is detected by the second winning opening detection sensor 332a, the second winning confirmation flag in the work area 281 for specific control is set to "1" (step S9709).

Then, the value of A register 271a is incremented by 1 (step S9710). As already explained, A register 271a stores the data read from the 10 prize ball counter. In this way, after the value of the 10 prize ball counter is read into A register 271a, it is incremented by 1 on the condition that the passage of one game ball is detected by the second prize opening detection sensor 332a.

If a negative determination is made in step S9708, or if the processing of step S9710 is performed, the value of C register 272b is incremented by 1 (step S9711). As a result, the lowest byte ("52H") of the address corresponding to the second edge measurement register in the monitoring control register group 257 is set in C register 272b.

Then, similar to steps S9702 and S9707 described above, the instruction "IN B, (C)" is executed (step S9712). The instruction "IN B, (C)" identifies the second edge measurement register as the source of information readout by the address ("AB52H") obtained by combining the data ("ABH") stored in the V register 278 and the data ("52H") stored in the C register 272b. Execution of the instruction "IN B, (C)" causes the data (8 bits) of the second measurement register to be read out to the B register 272a.

Thereafter, if the value of the first edge measurement register read into register B 272a in step S9712 is "1" (step S9713: YES), i.e., if the passage of one game ball is detected by the third winning opening detection sensor 333a, the third winning confirmation flag in the specific control work area 281 is set to "1" (step S9714).

Then, the value of A register 271a is incremented by 1 (step S9715). As already explained, A register 271a stores the data read from the 10 prize ball counter. In this way, after the value of the 10 prize ball counter is read into A register 271a, it is incremented by 1 on the condition that the passage of one game ball is detected by the third prize opening detection sensor 333a.

If a negative judgment is made in step S9713, or if the processing of step S9715 is performed, the command "LDK (10KSHKYC_L), A" is executed (step S9716). By executing the command "LDK (10KSHKYC_L), A", the data in A register 271a (data that has been updated or not updated after being read from the 10 prize ball counter to A register 271a) is set in the 10 prize ball counter provided in the work area 281 for specific control. As already explained, after the value of the 10 prize ball counter is read into A register 271a, it is incremented by one when the first prize opening detection sensor 331a detects the passage of one game ball, by one when the second prize opening detection sensor 332a detects the passage of one game ball, and by one when the third prize opening detection sensor 333a detects the passage of one game ball. Therefore, by executing the processing of step S9713, the value of the 10 prize ball counter can be updated based on the detection results of the game balls at the first through third prize opening detection sensors 331a through 333a.

In this way, the two-byte LDK instruction "LDK (10KSHKYC_L), A" is set as the instruction for setting the data in A register 271a to the 10-ball counter. This reduces the data capacity of the transfer instruction set in the program to set the data in A register 271a to the 10-ball counter, compared to a configuration in which the three-byte LD instruction "LD (10KSHKYC), A" is set.

Returning to the explanation of the ball entry detection process (Figure 172), after executing the 10 prize ball corresponding process in step S9604, the 15 prize ball corresponding process is executed (step S9605), which performs processing in response to balls entering the ball entry section (specifically, the special electric prize entry device 192), which is set to have 15 prize balls. In the 15 prize ball corresponding process, the command "LDK A, (15KSHKYC_L)" is first executed. "15KSHKYC_L" is the lowest byte of the 2-byte address corresponding to the 15 prize ball counter provided in the work area 281 for specific control. This address is included in the second address range of the work area 281 for specific control. The 15 prize ball counter is a counter that allows the main MPU 222 to determine the number of times 15 game balls should be paid out. When the command "LDK A, (15KSHKYC_L)" is executed, the data of the 15 prize ball counter is read into the A register 271a. Thereafter, if the value of the third edge measurement register of the monitoring and control register group 257 is "1", that is, if the special electric detection sensor 334a detects the passage of one game ball, the special electric winning confirmation flag is set to "1" and the value of the A register 271a is incremented by 1. In this way, after the value of the 15 prize ball counter is read into the A register 271a, it is incremented by 1 on the condition that the special electric detection sensor 334a detects the passage of one game ball.

In the 15-prize ball processing (step S9605), if the value of the third edge measurement register is determined to be "0" or if the value of A register 271a is incremented by 1, the instruction "LDK (15KSHKYC_L), A" is executed. By executing the instruction "LDK (15KSHKYC_L), A", the data in A register 271a (data that has been updated or not updated after being read from the 15-prize ball counter to A register 271a) is set to the 15-prize ball counter in the specific control work area 281. This allows the value of the 15-prize ball counter to be updated based on the detection results of the game balls in the special line winning device 192.

In this way, because the two-byte LDK instruction "LDK A, (15KSHKYC_L)" is set as the instruction for reading data from the 15 prize ball counter into A register 271a, the data size of the transfer instruction set in the program for reading data from the 15 prize ball counter into A register 271a is reduced compared to a configuration in which the three-byte LD instruction "LD A, (15KSHKYC)" is set. Also, because the two-byte LDK instruction "LDK (15KSHKYC_L), A" is set as the instruction for setting data in A register 271a to the 15 prize ball counter, the data size of the transfer instruction set in the program for setting data in A register 271a to the 15 prize ball counter is reduced compared to a configuration in which the three-byte LD instruction "LD (15KSHKYC), A" is set.

In the ball entry detection response process (Fig. 172), after executing the 15 prize ball response process in step S9605, the single prize ball process is executed (step S9606), which processes a ball that has entered the ball entry section (specifically, the first actuation port 193 and the second actuation port 194) where the number of prize balls is set to one. In the single prize ball process, the command "LDK A, (1KSHKYC_L)" is first executed. "1KSHKYC_L" is the lowest byte of a two-byte address corresponding to the single prize ball counter provided in the work area 281 for specific control. This address is included in the second address range of the work area 281 for specific control. The single prize ball counter is a counter that allows the main MPU 222 to determine the number of times one game ball should be paid out. When the command "LDK A, (1KSHKYC_L)" is executed, the data of the single prize ball counter is read into the A register 271a. Thereafter, if the value of the fourth edge measurement register in the monitoring and control register group 257 is "1", that is, if the first actuation port detection sensor 335a detects the passage of one game ball, the first actuation winning confirmation flag is set to "1" and the value of the A register 271a is incremented by 1. In this way, after the value of the single prize ball counter is read into the A register 271a, it is incremented by 1 on the condition that the passage of one game ball is detected by the first actuation port detection sensor 335a.

In the single prize ball processing (step S9606), if the value of the fourth edge measurement register is determined to be "0" or if the process of incrementing the value of A register 271a is performed, the process determines whether the value of the fifth edge measurement register in the monitoring and control register group 257 is "1." If the value of the fifth edge measurement register is "1," that is, if the second actuation port detection sensor 336a detects the passage of one game ball, the second actuation winning confirmation flag is set to "1" and the value of A register 271a is incremented by 1. In this way, after the value of the single prize ball counter is read out to A register 271a, it is incremented by 1 on the condition that the passage of one game ball is detected by the second actuation port detection sensor 336a.

In the single prize ball processing (step S9606), if the value of the fifth edge measurement register is determined to be "0," or if the value of A register 271a is incremented by 1 based on the occurrence of a ball entering second actuation port 194, the command "LDK (1KSHKYC_L), A" is executed. By executing the command "LDK (1KSHKYC_L), A," the data in A register 271a (data that has been updated or not updated after being read from the single prize ball counter to A register 271a) is set to the single prize ball counter in the specific control work area 281. This allows the value of the single prize ball counter to be updated based on the detection results of game balls at first actuation port 193 and second actuation port 194.

In this way, because the two-byte LDK instruction "LDK A, (1KSHKYC_L)" is set as the instruction for reading data from the one prize ball counter into A register 271a, the data size of the transfer instruction set in the program for reading data from the one prize ball counter into A register 271a is reduced compared to a configuration in which the three-byte LD instruction "LD A, (1KSHKYC)" is set. Also, because the two-byte LDK instruction "LDK (1KSHKYC_L), A" is set as the instruction for setting data in A register 271a to the one prize ball counter, the data size of the transfer instruction set in the program for setting data in A register 271a to the one prize ball counter is reduced compared to a configuration in which the three-byte LD instruction "LD (1KSHKYC), A" is set.

In the ball entry detection response process (Figure 172), after executing the one-ball response process in step S9606, the out confirmation flag setting process is executed (step S9607). In the out confirmation flag setting process, the out confirmation flag is set to "1" on the condition that the value of the sixth edge measurement register in the monitoring control register group 257 is "1", i.e., the passage of one gaming ball is detected by the out port detection sensor 337a. Then, the gate winning confirmation flag setting process is executed (step S9608). In the gate winning confirmation flag setting process, the gate winning confirmation flag is set to "1" on the condition that the value of the seventh edge measurement register in the monitoring control register group 257 is "1", i.e., the passage of one gaming ball is detected by the gate detection sensor 338a.

Then, similar to step S9601 already described, the instruction "EX K,K'" is executed (step S9609). Execution of this instruction swaps the data ("A1H") in K register 277 with the data ("A0H") in K' register 297. This causes "A0H" to be set in K register 277, i.e., the upper byte of the first address range in specific control work area 281 becomes available for use by the LDK instruction. Because the one-byte exchange instruction "EX K,K'" is set as the instruction for setting "A0H" in K register 277, the data size of the instruction set in the program for setting "A0H" in K register 277 is reduced compared to a configuration in which a transfer instruction (specifically, a two-byte LD instruction "LD K,A0H") for setting the information "A0H" in K register 277 is set.

As described above, by using the LDK instruction, which sets the lower byte of a two-byte address instead of the LD instruction, which sets a two-byte address, the number of bytes in the transfer instruction can be reduced by one. Furthermore, the instruction to switch the upper base address information stored in K register 277 from "A0H" to "A1H" and the instruction to switch the upper base address information stored in K register 277 from "A1H" to "A0H" are each one-byte instructions. The ball entry detection process (FIG. 172) is configured to exchange the upper base address information stored in K register 277, execute three or more (specifically, six) LDK instructions using the exchanged upper base address information, and then return the upper base address information. This reduces the data size of the program corresponding to the ball entry detection process (FIG. 172) compared to executing three or more LD instructions without exchanging the upper base address information.

Next, prior to explaining the fraud detection processing in step S9211 of the timer interrupt processing (Figure 167), we will explain the configuration of the work area 281 for specific control and the configuration of the work area 283 for non-specific control used in the fraud detection processing. As already explained, the work area 281 for specific control is provided with a confirmation flag group 281a. Also, as shown in Figure 171, the work area 281 for specific control is provided with a first security counter 281b, a special power monitoring delay timer counter 281c, and a regular power monitoring delay timer counter 281d. Additionally, the non-specific control work area 283 is provided with first to eighth winning monitoring timer counters 283a to 283h, a magnetic detection counter 283i, a magnetic monitoring delay timer counter 283j, a second security counter 283k, first to third general winning abnormality flags 283l to 283n, a special line winning abnormality flag 283o, a first operational winning abnormality flag 283p, a second operational winning abnormality flag 283q, an out abnormality flag 283r, a gate winning abnormality flag 283s, and a magnetic abnormality flag 283t.

The first security counter 281b in the work area 281 for specific control and the second security counter 283k in the work area 283 for non-specific control are both counters used by the main MPU 222 to determine whether or not a pulsed security signal needs to be output externally from the main MPU 222 to the amusement hall's management computer HC, and, if an external output is required, are counters used by the main MPU 222 to determine the number of times the pulsed security signal should be output externally. Events that trigger the external output of a pulsed security signal include the execution of a clear process on the main RAM 224, the detection of a winning anomaly, and the detection of a magnetic anomaly.

The special power monitoring delay timer counter 281c in the work area 281 for specific control is a counter used by the main MPU 222 to determine the period during which the detection of a game ball by the special power detection sensor 334a provided in the special power winning device 192 is treated as valid even after the special power winning device 192, which was in an open state, becomes closed. The normal power monitoring delay timer counter 281d in the work area 281 for specific control is a counter used by the main MPU 222 to determine the period during which the detection of a game ball by the second operating port detection sensor 336a provided in the second operating port 194 is treated as valid even after the second operating port 194, which was in an open state, becomes closed.

The first to third winning monitoring timer counters 283a to 283c in the non-specific control work area 283 correspond one-to-one to the three general winning openings 191. The first to third winning monitoring timer counters 283a to 283c are counters used by the main MPU 222 to determine the period from the detection of one game ball by the winning opening detection sensors 331a to 333a installed in the corresponding general winning openings 191 until the detection of the next game ball is treated as invalid.

The fourth winning monitoring timer counter 283d in the work area 283 for non-specific control is a counter used by the main MPU 222 to determine the period from when a game ball is detected by the special electric detection sensor 334a of the special electric winning device 192 to when the detection of the next game ball is treated as invalid. The fifth winning monitoring timer counter 283e in the work area 283 for non-specific control is a counter used by the main MPU 222 to determine the period from when a game ball is detected by the first actuation port detection sensor 335a provided in the first actuation port 193 to when the detection of the next game ball is treated as invalid. The sixth winning monitoring timer counter 283f in the work area 283 for non-specific control is a counter used by the main MPU 222 to determine the period from when a game ball is detected by the second actuation port detection sensor 336a of the second actuation port 194 to when the detection of the next game ball is treated as invalid. The seventh winning monitoring timer counter 283g in the work area 283 for non-specific control is a counter used by the main MPU 222 to determine the period from when one game ball is detected by the outlet detection sensor 337a provided in the outlet 184a until the detection of the next game ball is treated as invalid. The eighth winning monitoring timer counter 283h in the work area 283 for non-specific control is a counter used by the main MPU 222 to determine the period from when one game ball is detected by the gate detection sensor 338a provided in the through gate 195 until the detection of the next game ball is treated as invalid.

The process of monitoring whether game balls are entering the three general winning openings 191, the special electric winning device 192, the first operating opening 193, the second operating opening 194, the through gate 195, and the outlet 184a properly is included in non-specific control. In this case, of the various timer counters 281c, 281d, and 283a-283h provided to monitor whether game balls are entering the three general winning openings 191, the special electric winning device 192, the first operating opening 193, the second operating opening 194, the through gate 195, and the outlet 184a properly, the special electric monitoring delay timer counter 281c and the general electric monitoring delay timer counter 281d are provided in the work area 281 for specific control, while the first through eighth winning monitoring timer counters 283a-283h are provided in the work area 283 for non-specific control.

The first through third general winning abnormality flags 283l through 283n in the non-specific control work area 283 are provided in one-to-one correspondence with the three general winning slots 191. If the non-specific control process determines that an abnormal game ball has been detected as a result of monitoring using the first through third winning monitoring timer counters 283a through 283c, the corresponding flag among the first through third general winning abnormality flags 283l through 283n is set to "1" in the non-specific control process. The special electric winning abnormality flag 283o in the non-specific control work area 283 is provided in correspondence with the special electric winning device 192. If the non-specific control process determines that an abnormal game ball has been detected as a result of monitoring using the special electric monitoring delay timer counter 281c or the fourth winning monitoring timer counter 283d, the non-specific control process sets the special electric winning abnormality flag 283o to "1."

The first activation winning error flag 283p in the work area 283 for non-specific control is provided in correspondence with the first activation port 193, and if the non-specific control processing determines that an abnormal game ball has been detected as a result of the monitoring processing using the fifth winning monitoring timer counter 283e, the first activation winning error flag 283p is set to "1" in the non-specific control processing. The second activation winning error flag 283q in the work area 283 for non-specific control is provided in correspondence with the second activation port 194, and if the non-specific control processing determines that an abnormal game ball has been detected as a result of the monitoring processing using the normal power monitoring delay timer counter 281d or the sixth winning monitoring timer counter 283f, the second activation winning error flag 283q is set to "1" in the non-specific control processing.

The out abnormality flag 283r in the work area 283 for non-specific control is provided in correspondence with the out port 184a, and if the non-specific control processing determines that an abnormal game ball has been detected as a result of the monitoring processing using the seventh winning monitoring timer counter 283g, the out abnormality flag 283r is set to "1" in the non-specific control processing. The gate winning abnormality flag 283s in the work area 283 for specific control is provided in correspondence with the through gate 195, and if the non-specific control processing determines that an abnormal game ball has been detected as a result of the monitoring processing using the eighth winning monitoring timer counter 283h, the gate winning abnormality flag 283s is set to "1" in the non-specific control processing.

The magnetic detection counter 283i in the work area 283 for non-specific control is a counter that allows the main MPU 222 to determine the number of times that a magnetic abnormality has been identified. As mentioned above, a magnetic detection sensor (not shown) is provided on the back of the game board 184. The detection results of the magnetic detection sensor are input to the main MPU 222. If the magnetic detection sensor does not detect magnetism, it outputs a LOW level magnetic detection signal to the main MPU 222, and if it detects magnetism, it outputs a HI level magnetic detection signal to the main MPU 222. The magnetic monitoring delay timer counter 283j in the work area 283 for non-specific control is a counter that allows the main MPU 222 to determine the period during which magnetic abnormalities are not monitored. The magnetic anomaly flag 283t in the non-specific control work area 283 is set to "1" during non-specific control processing when the non-specific control processing determines that the number of magnetic anomalies measured by the magnetic detection counter 283i has reached the anomaly reference number (specifically, "3") when the magnetic monitoring delay timer counter 283j is not measuring a period during which magnetic anomalies are not monitored.

Next, we will explain the processing of step S9211 of the timer interrupt processing (Figure 167). As already explained, in step S9211, fraud detection processing is executed using the CALLA instruction. The fraud detection processing is included in the non-specific control processing. In other words, when the timer interrupt processing changes from a situation in which specific control processing is being executed to a situation in which non-specific control processing is being executed, the non-specific control processing is called using the CALLA instruction.

When fraud detection processing is executed using the CALLA instruction, execution of timer interrupt processing is prohibited. This prevents timer interrupt processing, which is specific control processing, from starting during execution of fraud detection processing, which is non-specific control processing. The register group switching circuit 252 then switches from a state in which the first register group 265 is being used to a state in which the second register group 266 is being used. This causes the second register group 266 to be used in fraud detection processing, which is non-specific control processing, preventing the data in each register included in the first register group 265 from being overwritten.

Figure 174 is a flowchart showing the fraud detection process executed by the main MPU 222. Note that steps S9801 to S9811 in the fraud detection process are executed using a non-specific control program and non-specific control data.

The fraud detection process first executes an information clearing process (step S9801). The information clearing process executes processing to clear the following to "0" in each storage area of the non-specific control work area 283: the first general winning abnormality flag 283l, the second general winning abnormality flag 283m, the third general winning abnormality flag 283n, the special line winning abnormality flag 283o, the first operational winning abnormality flag 283p, the second operational winning abnormality flag 283q, the out abnormality flag 283r, the gate winning abnormality flag 283s, and the magnetic abnormality flag 283t.

Then, the test firing process is executed (step S9802). In the test firing process, test firing information is generated and stored in the work area 283 for non-specific control. Then, the timer update process for non-specific control is executed (step S9803). In the timer update process for non-specific control, the numerical information of multiple types of timer counters provided in the work area 283 for non-specific control is collectively updated. These timer counters include the first through eighth winning monitoring timer counters 283a through 283h and the magnetic monitoring delay timer counter 283j. Each time the process of step S9803 is executed, one is subtracted from each of these timer counters 283a through 283h, 283j. Any timer counters whose carry flags in the F register 301b have been set to "1" due to a subtraction of one when they were already set to "0" are cleared to "0."

Then, the external output setting process is executed (step S9804). Figure 175 is a flowchart showing the external output setting process. Note that steps S9901 to S9920 in the external output setting process are executed using a non-specific control program and non-specific control data.

First, the instruction "EX K,K'" is executed (step S9901). Execution of this instruction exchanges the data in K register 307 ("A3H") with the data in K' register 317 ("A1H"). As a result, "A1H," the most significant byte of the second address range in the specific control work area 281, is set in K register 307.

In this way, by executing the one-byte exchange instruction "EX K,K'", the upper byte (specifically, "A1H") of the second address range in the specific control work area 281 is set to the K register 307. This reduces the data size of the transfer instruction set in the program to set the upper byte ("A1H") to the K register 307, compared to a configuration in which the upper byte ("A1H") is set to the K register 307 by executing a transfer instruction (specifically, a two-byte LD instruction "LD K,A1H") to set "A1H" to the K register 307.

Then, the command "LDK A, (SDNYSHKNFL2_L)" is executed (step S9902). "LDK" is the LDK command, and "A" specifies the A register 301a as the transfer destination. Furthermore, "SDNYSHKNFL2_L" is the lowest byte of the address (2 bytes) corresponding to the 1-byte area containing the second activation winning confirmation flag included in the confirmation flag group 281a of the work area 281 for specific control. The second activation winning confirmation flag is located in the least significant bit (bit 0) of the 1-byte area, and bits 1 through 7 of the 1-byte area are unused. Furthermore, the address of the 1-byte area is included in the second address range of the work area 281 for specific control. By executing the command "LDK A, (SDNYSHKNFL2_L)," the data in the 1-byte area containing the second activation winning confirmation flag is set in the A register 301a.

When using the LD instruction (specifically, "LD A, (SDNYSHKNFL2)") to read data from a 1-byte area containing a second activation winning confirmation flag into the A register 301a, the LD instruction must be set with the address (2 bytes) corresponding to that 1-byte area. In contrast, when using the LDK instruction to read data from a 1-byte area containing a second activation winning confirmation flag into the A register 301a, the data stored in the K register 307 ("A1H") is used as the upper 1 byte of the transfer source, so only the lower 1 byte of that address is set in the LDK instruction. In this way, by using the 2-byte LDK instruction to read data from a 1-byte area containing a second activation winning confirmation flag into the A register 301a, the data size of the transfer instructions set in the program can be reduced compared to a configuration using a 3-byte LD instruction.

Then, it is determined whether the value of the second activation winning confirmation flag read into A register 301a in step S9902 is "0" (step S9903). In step S9903, the command "OR A,A" is first executed. Note that the command "OR A,A" is also executed in the determination processes in steps S9905, S9907, S9912, S9914, and S9916, which will be described later. By executing the command "OR A,A", the logical sum of the value of A register 301a and the value of A register 301a is stored in A register 301a. If the value of A register 301a is "0", the zero flag provided in F register 301b is set to "1", and if the value of A register 301a is 1 or greater, the value of the zero flag becomes "0". In step S9903, after executing the command "OR A, A", a positive determination is made if the zero flag is set to "1".

If the value of the second operation winning confirmation flag read into A register 301a in step S9902 is "1" (step S9903: NO), the command "LDK A, (FDKHJTFL_L)" is executed (step S9904). "FDKHJTFL_L" is the lower byte of the address (2 bytes) of a 1-byte area in which the normal power open status flag is set in the work area 281 for specific control. The normal power open status flag is set in the least significant bit (bit 0) of the 1-byte area, and bits 1 through 7 of the 1-byte area are unused. Furthermore, the address of the 1-byte area is included in the second address range of the work area 281 for specific control. By executing the command "LDK A, (FDKHJTFL_L)," the data in the 1-byte area is set in A register 301a. In this way, by using a two-byte LDK instruction to read data from a one-byte area where the normal power release status flag is set into the A register 301a, the data size of the transfer instruction set in the program to read the data from that one-byte area into the A register 301a can be reduced compared to a configuration that uses a three-byte LD instruction (specifically, "LD A, (FDKHJTFL)") that includes the address (two bytes) of that one-byte area.

Then, in step S9904, it is determined whether the value of the normal power release status flag read into A register 301a is "0" (step S9905). In step S9905, the above-mentioned "OR A, A" command is first executed. As a result, if the value of A register 301a is "0", the zero flag provided in F register 301b is set to "1", and if the value of A register 301a is 1 or greater, the value of the zero flag becomes "0". In step S9905, after executing the "OR A, A" command, a positive determination is made if the zero flag is set to "1".

If the value of the normal power release status flag read into the A register 301a in step S9904 is "0" (step S9905: YES), the instruction "LDK A, (FDYKSCHNTMC_L)" is executed (step S9906). "FDYKSCHNTMC_L" is the lower byte of the address (2 bytes) corresponding to the normal power monitoring delay timer counter 281d provided in the work area 281 for specific control. This address is included in the second address range of the work area 281 for specific control. By executing the instruction "LDK A, (FDYKSCHNTMC_L)", the data of the normal power monitoring delay timer counter 281d is set in the A register 301a. In this way, by using a two-byte LDK instruction to read the data of the normal power monitoring delay timer counter 281d into the A register 301a, the data size of the transfer instruction set in the program to read the data of the normal power monitoring delay timer counter 281d into the A register 301a can be reduced compared to a configuration that uses a three-byte LD instruction (specifically, "LDK A, (FDYKSCHNTMC)") that includes the address (two bytes) of the normal power monitoring delay timer counter 281d.

Then, in step S9906, it is determined whether the value of the normal power monitoring delay timer counter 281d read into the A register 301a is "0" (step S9907). In step S9907, the above-mentioned "OR A, A" command is first executed. As a result, if the value of the A register 301a is "0," the zero flag in the F register 301b is set to "1," and if the value of the A register 301a is 1 or greater, the value of the zero flag is set to "0." In step S9907, after the "OR A, A" command is executed, a positive determination is made if the zero flag is set to "1." If the value of the normal power monitoring delay timer counter 281d read into the A register 301a in step S9906 is "0" (step S9907: YES), the second operation winning abnormality flag 283q in the non-specific control work area 283 is set to "1" (step S9908).

Then, the normal power winning abnormality command transmission process is executed (step S9909). In the normal power winning abnormality command transmission process, the normal power winning abnormality command is sent to the sound/light side MPU 233. Upon receiving the normal power winning abnormality command, the sound/light side MPU 233 causes the display light-emitting unit 204, speaker unit 205, and pattern display device 199 to issue an alert indicating that an abnormality has occurred regarding the winning of the second operating port 194. Then, the value of the second security counter 283k in the work area 283 for non-specific control is incremented by 1 (step S9910).

If a positive judgment is made in step S9903, a negative judgment is made in step S9905, a negative judgment is made in step S9907, or the processing of step S9910 is performed, the command "LDK A, (TDNYKNFL_L)" is executed (step S9911). "TDNYKNFL_L" is the lowest byte of the address (2 bytes) of a 1-byte area in which the special call winning confirmation flag is set in the work area 281 for specific control. The special call winning confirmation flag is set in the least significant bit (bit 0) of the 1-byte area, and bits 1 to 7 of the 1-byte area are unused. Furthermore, the address of the 1-byte area is included in the second address range of the work area 281 for specific control. By executing the command "LDK A, (TDNYKNFL_L)," the data in the 1-byte area is set in the A register 301a. In this way, by using a two-byte LDK instruction to read data from a one-byte area where the special winning confirmation flag is set into A register 301a, the data size of the transfer instruction set in the program to read the data from that one-byte area into A register 301a can be reduced compared to a configuration that uses a three-byte LD instruction (specifically, "LD A, (TDNYKNFL)") that includes the address (two bytes) corresponding to that one-byte area.

Then, in step S9911, it is determined whether the value of the special winning confirmation flag read into A register 301a is "0" (step S9912). In step S9912, the above-mentioned "OR A, A" command is first executed. As a result, if the value of A register 301a is "0", the zero flag provided in F register 301b is set to "1", and if the value of A register 301a is 1 or greater, the value of the zero flag becomes "0". In step S9912, after executing the "OR A, A" command, a positive determination is made if the zero flag is set to "1".

If the value of the special line winning confirmation flag read into A register 301a in step S9911 is "1" (step S9912: NO), the command "LDK A, (TDKHJTFR_L)" is executed (step S9913). "TDKHJTFR_L" is the lower byte of the address (2 bytes) corresponding to the 1-byte area in which the special line open status flag is set in the work area 281 for specific control. The special line open status flag is set in the least significant bit (bit 0) of the 1-byte area, and bits 1 through 7 of the 1-byte area are unused. Furthermore, the address of the 1-byte area is included in the second address range of the work area 281 for specific control. By executing the command "LDK A, (TDKHJTFR_L)," the data in the 1-byte area is set in A register 301a. In this way, by using a two-byte LDK instruction to read data from a one-byte area where a special line release status flag is set into the A register 301a, the data size of the transfer instruction set to read the data from that one-byte area into the A register 301a can be reduced compared to a configuration that uses a three-byte LD instruction (specifically, "LD A, (TDKHJTFR)") that includes an address (two bytes) corresponding to that one-byte area.

Then, in step S9913, it is determined whether the value of the special line release status flag read into A register 301a is "0" (step S9914). In step S9914, the above-mentioned "OR A, A" command is first executed. As a result, if the value of A register 301a is "0", the zero flag provided in F register 301b is set to "1", and if the value of A register 301a is 1 or greater, the value of the zero flag becomes "0". In step S9914, after executing the "OR A, A" command, a positive determination is made if the zero flag is set to "1".

If the value of the special line open status flag read into A register 301a in step S9913 is "0" (step S9914: YES), the command "LDK A, (TDYKSCHNTMC_L)" is executed (step S9915). "TDYKSCHNTMC_L" is the lowest byte of the address (2 bytes) of the special line monitoring delay timer counter 281c provided in the specific control work area 281. This address is included in the second address range in the specific control work area 281. By executing the command "LDK A, (TDYKSCHNTMC_L)", the data of the special line monitoring delay timer counter 281c is set in A register 301a. In this way, by using a two-byte LDK instruction to read the data of the special power monitoring delay timer counter 281c into the A register 301a, the data size of the transfer instruction set to read the data of the special power monitoring delay timer counter 281c into the A register 301a can be reduced compared to a configuration that uses a three-byte LD instruction (specifically, "LD A, (TDYKSCHNTMC)") that includes an address (two bytes) corresponding to the special power monitoring delay timer counter 281c.

Then, in step S9915, it is determined whether the value of the special line monitoring delay timer counter 281c read into the A register 301a is "0" (step S9916). In step S9916, the above-mentioned "OR A, A" command is first executed. As a result, if the value of the A register 301a is "0," the zero flag in the F register 301b is set to "1," and if the value of the A register 301a is 1 or greater, the value of the zero flag is set to "0." In step S9916, after executing the "OR A, A" command, a positive determination is made if the zero flag is set to "1." If the value of the special line monitoring delay timer counter 281c read into the A register 301a in step S9914 is "0" (step S9916: YES), the special line winning abnormality flag 283o in the non-specific control work area 283 is set to "1" (step S9917).

Then, the special line winning abnormality command transmission process is executed (step S9918). In the special line winning abnormality command transmission process, the special line winning abnormality command is transmitted to the sound/light side MPU 233. Upon receiving the special line winning abnormality command, the sound/light side MPU 233 causes the display light-emitting unit 204, speaker unit 205, and pattern display device 199 to issue a notification indicating that an abnormality has occurred regarding the winning of the special line winning device 192. Then, the value of the second security counter 283k in the work area 283 for non-specific control is incremented by 1 (step S9919).

If a positive determination is made in step S9912, a negative determination is made in step S9914, a negative determination is made in step S9916, or the processing of step S9919 is performed, the instruction "EX K,K'" is executed (step S9920). Execution of this instruction exchanges the data ("A1H") in the K register 307 with the data ("A3H") in the K' register 317. This allows "A1H" to be saved to the K' register 317. Furthermore, "A3H" can be read into the K register 307, making the upper byte (specifically, "A3H") of the non-specific control work area 283 stored in the K register 307 available for use in the LDK instruction.

In this way, the upper byte (specifically, "A3H") of the non-specific control work area 283 is set to the K register 307 by executing the one-byte exchange command "EX K,K'". This reduces the data size of the transfer command set in the program to set "A3H" to the K register 307, compared to a configuration in which "A3H" is set to the K register 307 by executing a transfer command (specifically, a two-byte LD command "LD K,A2H") to set "A3H" to the K register 307.

As described above, by using an LDK instruction that sets the lower byte of a two-byte address instead of an LD instruction that sets a two-byte address, the number of bytes in the transfer instruction can be reduced by one. Furthermore, the instruction to switch the upper base address information stored in K register 307 from "A3H" to "A1H" and the instruction to switch the upper base address information stored in K register 277 from "A1H" to "A3H" are each one-byte instructions. The external output setting process (FIG. 175) is configured to exchange the upper base address information stored in K register 307, execute three or more (specifically, six) LDK instructions using the exchanged upper base address information ("A1H"), and then return the upper base address information to "A3H." This reduces the data size of the program corresponding to the external output setting process (FIG. 175) compared to executing three or more LD instructions without exchanging the upper base address information.

Returning to the explanation of the fraud detection process (Figure 174), after executing the external output setting process in step S9804, it is determined whether the confirmation flag corresponding to the value of the monitored counter provided in the work area 283 for non-specific control is set to "1" among the first winning confirmation flag, second winning confirmation flag, third winning confirmation flag, special line winning confirmation flag, first activation winning confirmation flag, second activation winning confirmation flag, out confirmation flag, and gate winning confirmation flag in the confirmation flag group 281a in the work area 281 for specific control (step S9805).

The monitored counter is a counter used by the main MPU 222 to identify the type of confirmation flag that is the target of the monitoring process in steps S9806 to S9808. When the fraud detection process (FIG. 174) begins, the value of the monitored counter is "0." The types of confirmation flags that are the target of the monitoring process in steps S9806 to S9808 are as follows: a monitored counter value of "0" indicates a first winning confirmation flag; a monitored counter value of "1" indicates a second winning confirmation flag; a monitored counter value of "2" indicates a third winning confirmation flag; a monitored counter value of "3" indicates a special line winning confirmation flag; a monitored counter value of "4" indicates a first activation winning confirmation flag; a monitored counter value of "5" indicates a second activation winning confirmation flag; a monitored counter value of "6" indicates an out confirmation flag; and a monitored counter value of "7" indicates a gate winning confirmation flag.

If the confirmation flag corresponding to the current value of the monitored counter is set to "1" (step S9805: YES), it is determined whether the value of the winning monitoring timer counter 283a-283h in the work area 283 for non-specific control that corresponds to the value of the monitored counter in the work area 283 for non-specific control is 1 or greater (step S9806). If the value of the monitored counter is "0", the first winning monitoring timer counter 283a is the target of confirmation. If the value of the monitored counter is "1", the second winning monitoring timer counter 283b is the target of confirmation. If the value of the monitored counter is "2", the third winning monitoring timer counter 283c is the target of confirmation. If the value of the monitored counter is "3", the fourth winning monitoring timer counter 283d is the target of confirmation. If the value of the monitored counter is "4", the fifth winning monitoring timer counter 283e is the target of confirmation. If the value of the monitored counter is "5", the sixth winning monitoring timer counter 283f will be checked. If the value of the monitored counter is "6", the seventh winning monitoring timer counter 283g will be checked. If the value of the monitored counter is "7", the eighth winning monitoring timer counter 283h will be checked.

If the value of the winning monitoring timer counter 283a-283h corresponding to the value of the monitored counter is 1 or greater (step S9806: YES), this means that the detection result of the detection sensor 331a-338a corresponding to the value of the monitored counter became the detection result of a single game ball, and before the detection invalid period (e.g., 0.1 seconds) has elapsed, the detection result of that detection sensor 331a-338a became the detection result of a new game ball. For example, such a situation may occur when game ball chattering occurs within the detection range of that detection sensor 331a-338a, causing the detection result of that detection sensor 331a-338a to become the detection result corresponding to the passage of multiple game balls in response to the passage of a single game ball. The detection invalid period is set as a period during which no new game balls are detected if game balls pass normally without chattering occurring.

A positive judgment in step S9806 means that a game ball was detected by the detection sensor 331a-338a corresponding to the value of the monitored counter before the detection invalid period elapsed. In this case, among the first general winning abnormality flag 283l, the second general winning abnormality flag 283m, the third general winning abnormality flag 283n, the special line winning abnormality flag 283o, the first activation winning abnormality flag 283p, the second activation winning abnormality flag 283q, the out abnormality flag 283r, and the gate winning abnormality flag 283s in the non-specific control work area 283, the abnormality flags 213l-213s corresponding to the value of the monitored counter are set to "1" (step S9807). If the value of the monitored counter is "0," the first general winning abnormality flag 283l is set to "1." If the value of the monitored counter is "1," the second general winning abnormality flag 283m is set to "1." If the value of the monitored counter is "2", the third general winning error flag 283n is set to "1". If the value of the monitored counter is "3", the special line winning error flag 283o is set to "1". If the value of the monitored counter is "4", the first activation winning error flag 283p is set to "1". If the value of the monitored counter is "5", the second activation winning error flag 283q is set to "1". If the value of the monitored counter is "6", the out error flag 283r is set to "1". If the value of the monitored counter is "7", the gate winning error flag 283s is set to "1". As a result, if a game ball is detected by the detection sensor 331a to 338a corresponding to the value of the monitored counter before the detection invalid period has elapsed, the corresponding error flag 213l to 213s is set to "1".

If a negative judgment is made in step S9806, or if the processing of step S9807 is executed, a detection invalid period is set in the winning monitoring timer counter 283a-283h corresponding to the value of the monitored counter (step S9808). As a result, a detection invalid period is set in the winning monitoring timer counter 283a-283h corresponding to the monitored counter, regardless of whether a gaming ball is detected before the detection invalid period has elapsed in the detection sensor 331a-338a corresponding to the monitored counter, or whether a gaming ball is detected after the detection invalid period has elapsed.

Then, it is determined whether the value of the monitored counter is the maximum value of "7" (step S9809). If the value of the monitored counter is less than the maximum value (step S9809: NO), the value of the monitored counter is incremented by 1 (step S9810) and the process returns to step S9805. As a result, the monitoring process of steps S9805 to S9809 is executed for the next target detection sensor 331a to 338a. In this way, by executing the processes of steps S9805 to S9810, it is determined whether or not a gaming ball has been detected during the detection invalid period for each of the detection sensors 331a to 338a.

If the value of the monitored counter is at its maximum value (step S9809: YES), magnetic monitoring processing is executed (step S9811). Figure 176 is a flowchart showing magnetic monitoring processing. Magnetic monitoring processing (Figure 176) is initiated when the most significant byte (specifically, "A3H") of the non-specific control work area 283 is set in the K register 307 of the second register group 266. Note that steps SA101 to SA115 in the magnetic monitoring processing are executed using the non-specific control program and non-specific control data.

First, the instruction "LDK A, (JKKSTTMRC_L)" is executed (step SA101). "JKKSTTMRC_L" is the lowest byte of the address (2 bytes) corresponding to magnetic monitoring delay timer counter 283j, which is provided in non-specific control work area 283. Executing the instruction "LDK A, (JKKSTTMRC_L)" sets the data of magnetic monitoring delay timer counter 283j to A register 301a. In this way, by using the 2-byte LDK instruction to read the data of magnetic monitoring delay timer counter 283j to A register 301a, the data size of the transfer instruction set in the program to read the data of magnetic monitoring delay timer counter 283j to A register 301a can be reduced by one byte compared to a configuration using a 3-byte LD instruction (specifically, "LD A, (JKKSTTMRC)") that includes the address (2 bytes) corresponding to magnetic monitoring delay timer counter 283j.

Then, it is determined whether the value of the magnetic monitoring delay timer counter 283j read into the A register 301a in step SA101 is "0" (step SA102). If the value of the magnetic monitoring delay timer counter 283j is 1 or greater (step SA102: NO), that is, if a period during which no monitoring of magnetic anomalies is being performed is being measured, the magnetic monitoring process (Figure 176) is terminated without executing the processes from step SA103 onwards.

If the value of the magnetic monitoring delay timer counter 283j read into the A register 301a in step SA101 is "0" (step SA102: YES), i.e., if no measurement of the period during which magnetic anomalies are not monitored is being performed, the instruction "IN A, (D2NYJTMR_L)" is executed (step SA103). As previously explained, "IN" is an input instruction that specifies an address using data from the V registers 278 and 308. Furthermore, "D2NYJTMR_L" is the lower byte of the address (2 bytes) corresponding to the second input status monitor register provided in the monitoring control register group 257. As previously explained, bit 0 of the second input status monitor register is set with information corresponding to the state of the detection signal from the magnetic detection sensor (either "1" corresponding to a high level or "0" corresponding to a low level). Furthermore, as previously explained, bits 1 through 7 of the second input status monitor register are unused. Furthermore, V register 308 of second register group 266 contains "ABH," the most significant byte of the address corresponding to the register included in monitoring and control register group 257. The "IN A, (D2NYJTMR_L)" instruction identifies the second input status monitor register as the source of information by the address obtained by combining the data ("ABH") in V register 308 with "D2NYJTMR_L." By executing the "IN A, (D2NYJTMR_L)" instruction in step SA103, the data (8 bits) of the second input status monitor register is read into A register 301a. If the detection signal from the magnetic sensor is HIGH, the value of A register 301a becomes "1," and if the detection signal from the magnetic sensor is LOW, the value of A register 301a becomes "0."

In this way, by using an IN instruction that uses data from the V register 308 to read data from the second input status monitor register into the A register 301a, the data size of the instructions set in the program to read data from the second input status monitor register into the A register 301a is reduced compared to a configuration in which data from the second input status monitor register is read using an LD instruction (specifically, a configuration in which the instruction "LD HL, AB50H" sets "AB50H" in the HL register 274 and the instruction "LD B, (HL)" reads data from the second input status monitor register into the A register 301a).

If the value of A register 301a is "0" (step SA104: NO), the instruction "LDK (JKKNTC_L), A" is executed (step SA105), and the magnetic monitoring process (Figure 176) is terminated. "JKKNTC_L" is the lower byte of the address (2 bytes) corresponding to magnetic detection counter 283i in work area 283 for non-specific control. The value of A register 301a, which is the transfer source, is "0." By executing the instruction "LDK (JKKNTC_L), A" in step SA105, the value of magnetic detection counter 283i is cleared to "0." This allows the value of magnetic detection counter 283i to be cleared to "0" when it is confirmed that the detection signal of the magnetic detection sensor is at a LOW level, i.e., no magnetic abnormality is detected, in a situation where no measurement is being performed during a period when magnetic abnormalities are not being monitored.

In this way, by using a two-byte LDK command to clear the value of the magnetic detection counter 283i to "0," the data size of the transfer command set to clear the value of the magnetic detection counter 283i to "0" can be reduced by one byte compared to a configuration that uses a three-byte LD command (specifically, "LD (JKKNTC), A") that includes the address (two bytes) corresponding to the magnetic detection counter 283i.

If step SA104 determines that the value of A register 301a is "1," i.e., if the detection signal from the magnetic detection sensor is at a HIGH level, the instruction "LDK A, (JKKNTC_L)" is executed (step SA106). As described above, "JKKNTC_L" is the lowest byte of the address (2 bytes) corresponding to magnetic detection counter 283i. By executing the instruction "LDK A, (JKKNTC_L)," the data of magnetic detection counter 283i is set in A register 301a. By using the 2-byte LDK instruction to read the data of magnetic detection counter 283i into A register 301a, the data size of the transfer instruction set to read the data of magnetic detection counter 283i into A register 301a can be reduced by one byte compared to a configuration using a 3-byte LD instruction (specifically, "LD A, (JKKNTC)") that includes the address (2 bytes) corresponding to magnetic detection counter 283i.

Then, the value read from the magnetic detection counter 283i into the A register 301a is incremented by 1 (step SA107), and the instruction "LDK (JKKNTC_L), A" is executed (step SA108). By executing this instruction, the value of the A register 301a after incrementing by 1 is set in the magnetic detection counter 283i, and the value of the magnetic detection counter 283i is updated to the incremented value. In this way, by using the two-byte LDK instruction to set the data in the A register 301a to the magnetic detection counter 283i, the data size of the transfer instruction set to set the data in the A register 301a to the magnetic detection counter 283i can be reduced by one byte compared to a configuration using a three-byte LD instruction (specifically, "LDK (JKKNTC_L), A") that includes the address (two bytes) corresponding to the magnetic detection counter 283i.

If the value of A register 301a is greater than or equal to "3" (step SA109: YES), i.e., if the updated value of magnetic detection counter 283i is greater than or equal to the abnormality reference count, A register 301a is set to "1" (step SA110), and the instruction "LDK (JKERRFL_L), A" is executed (step SA111). "JKERRFL_L" is the lower byte of the address (2 bytes) corresponding to the 1-byte area in which magnetic abnormality flag 283t is located in work area 283 for non-specific control. Also, "1" was set to A register 301a of the transfer source in step SA110. By executing the instruction "LDK (JKERRFL_L), A" in step SA111, magnetic abnormality flag 283t is set to "1." This allows the magnetic anomaly flag 283t to be set to "1" if it is confirmed three or more times in succession that the detection signal from the magnetic detection sensor is at a HI level, i.e., that a magnetic anomaly has been detected, when no measurement is being performed during a period when magnetic anomalies are not being monitored.

In this way, by using a two-byte LDK command to set the magnetic abnormality flag 283t to "1," the data size of the transfer command set to set the magnetic abnormality flag 283t to "1" can be reduced by one byte compared to a configuration that uses a three-byte LD command (specifically, "LD (JKERRFL), A") that includes an address (two bytes) corresponding to the one-byte area in which the magnetic abnormality flag 283t is located.

Then, a magnetic anomaly command transmission process is executed (step SA112). In the magnetic anomaly command transmission process, a magnetic anomaly command is transmitted to the sound/light side MPU 233. Upon receiving the magnetic anomaly command, the sound/light side MPU 233 causes the display light-emitting unit 204, speaker unit 205, and pattern display device 199 to issue a notification indicating that a magnetic anomaly has occurred. Then, the value of the second security counter 283k is incremented by 1 (step SA113).

If a negative judgment is made in step SA109, or if the processing of step SA113 is performed, numerical information ("25") corresponding to the magnetic monitoring delay period (specifically, 0.1 seconds) is set in the A register 301a (step SA114), the instruction "LDK (JKKSTTMRC_L), A" is executed (step SA115), and this magnetic monitoring processing (Figure 176) is terminated. As described above, "JKKSTTMRC_L" is the lower byte of the address (2 bytes) corresponding to the magnetic monitoring delay timer counter 283j. Furthermore, "25" was set in the A register 301a of the transfer source in step SA114. By executing the instruction "LDK (JKKSTTMRC_L), A" in step SA115, numerical information ("25") corresponding to the magnetic monitoring delay period (0.1 seconds) is set in the magnetic monitoring delay timer counter 283j. In this way, by using a two-byte LDK command to set the magnetic monitoring delay period in the magnetic monitoring delay timer counter 283j, the data size of the transfer command set in the program to set the magnetic monitoring delay period in the magnetic monitoring delay timer counter 283j can be reduced by one byte compared to a configuration that uses a three-byte LD command (specifically, "LD (JKKSTTMRC), A") that includes an address (two bytes) corresponding to the magnetic monitoring delay timer counter 283j.

As described above, by using the LDK instruction (2 bytes) that sets the lowest byte of a 2-byte address instead of the LD instruction (3 bytes) that sets a 2-byte address, the number of bytes in the transfer command can be reduced by one byte. The magnetic monitoring process (Figure 176) is configured to execute LDK instructions (specifically, six LDK instructions) using the non-specific upper base address information "A3H" stored in the K register 307. This makes it possible to reduce the data size of the program corresponding to the magnetic monitoring process (Figure 176).

Returning to the explanation of the fraud detection process (Figure 174), after the magnetic monitoring process is executed in step S9811, the fraud detection process is terminated by the instruction "RETA." When the fraud detection process is terminated by the RETA instruction, the register group to be used in the register group switching circuit 252 is switched from the second register group 266 to the first register group 265, and the execution of the timer interrupt process (Figure 167) is permitted, after which the fraud detection process is terminated. By switching the register group to be used from the second register group 266 to the first register group 265, the first register group 265 is used in the specific control process, preventing the data in each register included in the second register group 266 from being overwritten.

Next, before explaining the first management process executed in steps S8911 to S8913 of the initial setting process for non-specific control (Figure 164), we will explain the configuration of the work area 283 for non-specific control used in the first management process.

As shown in Figure 171, a total winning number counter 347 is provided in the work area 283 for non-specific control. The total winning number counter 347 is a counter for measuring a predetermined difference in the number of balls until a predetermined ending trigger occurs. The predetermined difference in balls is the total number of winning balls (total number of winning balls paid out to players due to balls entering the general winning opening 191, the special electric winning device 192, the first operating opening 193, or the second operating opening 194) until the predetermined termination trigger occurs minus the total number of winning balls supplied to the game area PA until the predetermined termination trigger occurs (total number of winning balls entering the outlet 184a, the general winning opening 191, the special electric winning device 192, the first operating opening 193, or the second operating opening 194 and then being discharged from the game area PA). The minimum difference in balls until the predetermined termination trigger is set as a specific reference value, and the difference in balls is the increase in the difference in balls from the specific reference value until the predetermined termination trigger occurs. In this embodiment, the predetermined termination trigger occurs when the predetermined difference in balls measured by the total winning number counter 347 reaches or exceeds the termination reference number of 19,000. When a specified termination trigger occurs, the game enters a non-playable state where it cannot be played. When the supply of operating power to the main MPU 222 begins, the value of the total winning number counter 347 is cleared to "0." The value of the total winning number counter 347 is also cleared to "0" if the value of the total winning number counter 347 becomes negative. The process for measuring the specified difference in ball count using the total winning number counter 347 and the process for clearing the value of the total winning number counter 347 to "0" are executed by non-specific control processing using a non-specific control program and non-specific control data.

As shown in FIG. 171, a play-disabled flag 351 is provided in the work area 283 for non-specific control. The play-disabled flag 351 is a flag that allows the main MPU 222 to recognize that a play-disabled state has occurred. The play-disabled flag 351 is set to "1" when the above-mentioned specified termination trigger occurs.

Next, the first management process executed in steps S8911 to S8913 of the initial setting process for non-specific control will be described with reference to the flowchart in Figure 164.

The first management process begins with an initial setup process (step S8911). This initial setup process executes processing to initialize the various storage areas of the non-specific control work area 283, including the first through eighth winning monitoring timer counters 283a through 283h, magnetic detection counter 283i, magnetic monitoring delay timer counter 283j, second security counter 283k, first through third general winning abnormality flags 283l through 283n, special line winning abnormality flag 283o, first operational winning abnormality flag 283p, second operational winning abnormality flag 283q, out abnormality flag 283r, gate winning abnormality flag 283s, and magnetic abnormality flag 283t.

Then, the value of the total winning number counter 347 provided in the work area 283 for non-specific control is cleared to "0" (step S8912). This resets the predetermined difference in the number of balls to its initial value of 0. Then, the non-playable flag 351 provided in the work area 283 for non-specific control is cleared to "0" (step S8913).

In this way, when the supply of operating power begins, the total win counter 347 and the game unplayable flag 351 are cleared to "0" regardless of whether the RAM clear process (steps S8709 to S8710) is executed. Therefore, if the game unplayable flag 351 is set to "1" and game play is not possible, the state can be resolved by stopping the supply of operating power to the pachinko machine 160 and then resuming the supply of operating power. Furthermore, if an amusement hall operates by stopping the supply of operating power to the pachinko machine 160 after business hours have ended and starting the supply of operating power before business hours begin, the amusement hall can begin business with the values of the total win counter 347 and the game unplayable flag 351 cleared to "0."

Next, before explaining the second management process executed in step S9222 of the timer interrupt process (Figure 167), we will explain the configuration related to game history management.

As shown in FIG. 171, the work area 283 for non-specific control has a normal counter area 341. The normal counter area 341 also has a normal winning counter 341a, a special electric winning counter 341b, a first operation counter 341c, a second operation counter 341d, and an out counter 341e. The normal winning counter 341a is a counter for counting the number of game balls that have entered the normal winning port 191 since a predetermined measurement start trigger. The special electric winning counter 341b is a counter for counting the number of game balls that have entered the special electric winning device 192 since a predetermined measurement start trigger. The first operation counter 341c is a counter for counting the number of game balls that have entered the first operation port 193 since a predetermined measurement start trigger. The second operation counter 341d is a counter for counting the number of game balls that have entered the second operation port 194 since a predetermined measurement start trigger. Out counter 341e is a counter used to count the number of game balls that enter outlet 184a from a specified measurement start trigger. Each counter 341a-341e in the normal counter area 341 is used to count the number of game balls that enter the target ball entry sections 184a, 191-194 when the front door frame 164 is closed and the machine is not in either the open/close execution mode or the high-frequency support mode.

The non-specific control work area 283 includes a calculation result storage area 342. The calculation result storage area 342 is an area for storing information on the game history management results calculated using the normal counter area 341. The game history management result information stored in the calculation result storage area 342 is retained until newly calculated game history management result information is overwritten by the newly calculated information. The calculation result storage area 342 stores base value information calculated by the main MPU 222. As already explained in the fourth embodiment above, the base value is the ratio of the total number of game balls paid out to the total number of game balls discharged from the game area PA (i.e., the total number of game balls supplied to the game area PA) in a situation that is neither the open/close execution mode due to a jackpot result nor the high-frequency support mode.

In a situation where the mode is neither the opening/closing execution mode based on a jackpot result nor the high-frequency support mode, when one game ball enters the general winning port 191, the value of the general winning counter 341a is incremented by 1, when one game ball enters the special winning device 192, the value of the special winning counter 341b is incremented by 1, when one game ball enters the first operating port 193, the value of the first operating counter 341c is incremented by 1, when one game ball enters the second operating port 194, the value of the second operating counter 341d is incremented by 1, and when one game ball enters the outlet port 184a, the value of the outlet counter 341e is incremented by 1. Then, when the values of the various counters 341a to 341e in the normal counter area 341 in a situation where the mode is neither the opening/closing execution mode based on a jackpot result nor the high-frequency support mode are K11 to K15, the base values are as follows.
- Base value: Total number of game balls paid out (K11 x "number of prize balls for winning at the general winning port 191" + K12 x "number of prize balls for winning at the special electric winning device 192" + K13 x "number of prize balls for winning at the first operating port 193" + K14 x "number of prize balls for winning at the second operating port 194") / ratio of total number of game balls discharged from the game area PA (K11 + K12 + K13 + K14 + K15).

As shown in FIG. 171, the work area 283 for non-specific control has a total payout number counter 352 and a total ejection number counter 353. The total payout number counter 352 is a 3-byte counter. The total payout number counter 352 stores data on the total number of game balls ejected (K11 x "number of prize balls for winning at the general winning port 191" + K12 x "number of prize balls for winning at the special electric winning device 192" + K13 x "number of prize balls for winning at the first operating port 193" + K14 x "number of prize balls for winning at the second operating port 194"). The total ejection number counter 353 is a 2-byte counter. The total ejection number counter 353 stores data on the total number of game balls ejected from the game area PA (K11 + K12 + K13 + K14 + K15). The values of the total dispensed number counter 352 and the total ejected number counter 353 are updated in the quantity information update process in step SA207 of the second management process (FIG. 177) described below. Also, in the base value calculation setting process (FIG. 179) in step S8716 of the main process (FIG. 161), a process is executed to calculate a base value using the values of the total dispensed number counter 352 and the total ejected number counter 353.

The non-specific control work area 283 is provided with a management start flag. The management start flag is set to "0" when the supply of operating power to the pachinko machine 160 is initiated for the first time after the pachinko machine 160 is manufactured. The management start flag also becomes "0" when the non-specific control work area 283, including the management start flag, is initialized by being cleared to "0." When the management start flag is set to "0" and the mode is neither the open/close execution mode due to a jackpot result nor the high-frequency support mode, the management start flag is set to "1" when the total number of game balls discharged from the play area PA (i.e., the total number of game balls supplied to the play area PA) reaches the management start reference number (specifically, 300). When the management start flag is set to "1," the values of the various counters 341a to 341e in the normal counter area 341 are cleared to "0," and a new calculation period begins.

The values of the various counters 341a-341e in the normal counter area 341 are cleared to "0" when the total number of game balls discharged from the play area PA (i.e., the total number of game balls supplied to the play area PA) reaches the management start reference number (300) when the management start flag provided in the non-specific control work area 283 is not set to "1" and the mode is neither the open/close execution mode based on a jackpot result nor the high-frequency support mode; and when the management start flag is set to "1" and the mode is neither the open/close execution mode based on a jackpot result nor the high-frequency support mode, the values are cleared to "0" when the total number of game balls discharged from the play area PA (i.e., the total number of game balls supplied to the play area PA) reaches the shift reference number (specifically, 60,000).

As shown in FIG. 171, the calculation result memory area 342 has a current status area 343, a first history area 344, a second history area 345, and a third history area 346 as memory areas for storing information about the base value. The current status area 343 stores the most recent base value. The first history area 344 stores the final base value for the calculation period one period before, the second history area 345 stores the final base value for the calculation period two periods before, and the third history area 346 stores the final base value for the calculation period three periods before. In this embodiment, the base value data includes one byte of integer part calculation result data, which is the data for the integer part of the base value, and one byte of decimal part calculation result data, which is the data for the part after the decimal point of the base value. The current status area 343 and the first to third history areas 344 to 346 are each 2-byte areas, with the upper byte of each of these areas 343 to 346 storing integer calculation result data, and the lower byte of each of these areas 343 to 346 storing decimal calculation result data.

The base values stored in the current status area 343, first history area 344, second history area 345, and third history area 346 are sequentially reported by the first to fourth notification display devices 246-249. Specifically, each time the display duration (specifically, 5 seconds) elapses, the base value to be reported is switched in a predetermined order: current status area 343 → first history area 344 → second history area 345 → third history area 346, and this switching of the base values to be reported in this predetermined order is repeated.

Next, we will explain the processing of step S9222 of the timer interrupt processing (Figure 167). In step S9222, as already explained, the second management processing is executed using the CALLA command. The second management processing is included in the non-specific control processing. In other words, when the timer interrupt processing changes from a situation in which specific control processing is being executed to a situation in which non-specific control processing is being executed, the non-specific control processing is called using the CALLA command.

When the second management process is executed by the CALLA instruction, execution of the timer interrupt process is prohibited, and the register group switching circuit 252 switches from the state in which the first register group 265 is to be used to the state in which the second register group 266 is to be used, after which the program corresponding to the second management process is started. By switching the register group to be used from the first register group 265 to the second register group 266, the second management process, which is a non-specific control process, uses the second register group 266, preventing the data in each register included in the first register group 265 from being overwritten.

Figure 177 is a flowchart showing the second management process executed by the main MPU 222. Note that steps SA201 to SA208 in the second management process are executed using a non-specific control program and non-specific control data.

First, an information abnormality monitoring process is executed (step SA201). In the information abnormality monitoring process, monitoring of the work area 283 for non-specific control is executed. This monitoring process determines whether the value of the pointer indicating the processing position of the process being executed in the program for non-specific control is outside the normal numerical range, and if it is outside the normal numerical range, an abnormality is detected. It also determines whether the information stored in the normal counter area 341 in the work area 283 for non-specific control is clearly abnormal. For example, if the value of the out counter 341e in the normal counter area 341 is "0" but the value of the general winning counter 341a is 1000 or greater, an abnormality is detected. If an abnormality is detected during the monitoring process of the work area 283 for non-specific control, a clear process is executed on the work area 283 for non-specific control. This makes it possible to deal with the information abnormality.

Subsequently, if the front door frame 164 is not in the open state (step SA202: NO), the opening/closing execution mode is not being used (step SA203: NO), and the high-frequency support mode is not being used (step SA204: NO), the normal winning management process (step SA205) is executed. In the normal winning management process, if the first winning confirmation flag in the confirmation flag group 281a in the work area 281 for specific control is set to "1," the value of the general winning counter 341a in the normal counter area 341 in the work area 283 for non-specific control is incremented by one. Furthermore, if the second winning confirmation flag in the confirmation flag group 281a in the work area 281 for specific control is set to "1," the value of the general winning counter 341a in the normal counter area 341 in the work area 283 for non-specific control is incremented by one. In addition, if the third winning confirmation flag in the confirmation flag group 281a in the work area 281 for specific control is set to "1", the value of the general winning counter 341a in the normal counter area 341 in the work area 283 for non-specific control is incremented by 1.

In the normal winning management process (step SA205), if the special winning confirmation flag in the confirmation flag group 281a in the work area 281 for specific control is set to "1," the value of the special winning counter 341b in the normal counter area 341 in the work area 283 for non-specific control is incremented by 1. If the first activation winning confirmation flag in the confirmation flag group 281a is set to "1," the value of the first activation counter 341c in the normal counter area 341 in the work area 283 for non-specific control is incremented by 1. If the second activation winning confirmation flag in the confirmation flag group 281a is set to "1," the value of the second activation counter 341d in the normal counter area 341 in the work area 283 for non-specific control is incremented by 1. If the out confirmation flag in the confirmation flag group 281a is set to "1," the value of the out counter 341e in the normal counter area 341 in the work area 283 for non-specific control is incremented by 1.

If a positive determination is made in step SA203, if a positive determination is made in step SA204, or if the processing of step SA205 is performed, the total number of acquisitions is managed (step SA206). The total number of acquisitions management processing will be described in detail later.

If a positive judgment is made in step SA202, or if the processing of step SA206 is performed, a quantity information update process is executed (step SA207). In the quantity information update process, the values (K11 to K14) of the general winning counter 341a, the special winning counter 341b, the first operation counter 341c, and the second operation counter 341d are used to derive data on the total number of game balls paid out, and the data of the total payout counter 352 is updated by setting the derived total payout data in the total payout counter 352. Furthermore, in the number information update process (step SA207), the values (K11-K15) of the general winning counter 341a, special winning counter 341b, first operation counter 341c, second operation counter 341d, and out counter 341e are used to derive data on the total number of game balls dispensed from the game area PA, and the data on the total dispensed number counter 353 is updated by setting the derived total number data in the total dispensed number counter 353.

Then, display processing is executed (step SA208). In the display processing, processing is executed to cause the base values stored in the current status area 343, first history area 344, second history area 345, and third history area 346 to be sequentially reported on the first to fourth notification display devices 246-249. As already explained, each time the display duration period (specifically, 5 seconds) elapses, the base value to be reported is switched in a predetermined order: current status area 343 → first history area 344 → second history area 345 → third history area 346, and this switching of the base values to be reported in this predetermined order is repeated.

Then, the second management process is terminated by the instruction "RETA." When the second management process is terminated by the instruction RETA, the register group to be used in the register group switching circuit 252 is switched from the second register group 266 to the first register group 265, and the execution of the timer interrupt process (Figure 167) is permitted, after which the second management process is terminated. By switching the register group to be used from the second register group 266 to the first register group 265, the first register group 265 is used in the specific control process, preventing the data in each register included in the second register group 266 from being overwritten.

Next, the total acquisition count management process executed in step SA206 of the second management process (Figure 177) will be explained with reference to the flowchart in Figure 178. Note that steps SA301 to SA312 in the total acquisition count management process are executed using a non-specific control program and non-specific control data.

First, it is determined whether the non-playable flag 351 in the work area 283 for non-specific control is set to "1" (step SA301). The process of setting the non-playable flag 351 to "1" is executed in step SA309, described below, when the value of the total acquisition counter 347 in the work area 283 for non-specific control reaches or exceeds the termination reference number (specifically, 19,000). If the non-playable flag 351 is set to "1" (step SA301: YES), an infinite loop is entered. In this way, when the non-playable flag 351 is set to "1," steps S9201 to S9221 of the timer interrupt process (FIG. 167) are then executed, and after a command is sent, etc., play becomes unavailable.

If the non-playable flag 351 is not set to "1" (step SA301: NO), it is determined whether any of the first winning confirmation flag, second winning confirmation flag, third winning confirmation flag, special line winning confirmation flag, first activation winning confirmation flag, and second activation winning confirmation flag in the confirmation flag group 281a in the specific control work area 281 are set to "1" (step SA302).

If a positive judgment is made in step SA302, an increment process of the total winning number counter 347 is executed (step SA303). In the increment process of the total winning number counter 347, if the first winning confirmation flag is set to "1", the total winning number counter 347 is incremented by "9", which is the result of subtracting 1, the number of game balls that entered the general winning port 191 as the trigger for the prize ball, from 10, the number of prize balls that would be awarded if one game ball entered the general winning port 191. Also, if the second winning confirmation flag is set to "1", the total winning number counter 347 is incremented by "9", which is the result of subtracting 1, the number of game balls that entered the general winning port 191 as the trigger for the prize ball, from 10, the number of prize balls that would be awarded if one game ball entered the general winning port 191. Furthermore, when the third winning confirmation flag is set to "1," the total winning number counter 347 is added with "9," which is the result of subtracting 1, the number of game balls that entered the general winning port 191 as the trigger for the prize ball, from 10, the number of prize balls that would be awarded if one game ball entered the general winning port 191. When the special electric winning confirmation flag is set to "1," the total winning number counter 347 is added with "14," which is the result of subtracting 1, the number of game balls that entered the special electric winning device 192 as the trigger for the prize ball, from 15, the number of prize balls that would be awarded if one game ball entered the special electric winning device 192. In this embodiment, the number of prize balls when one game ball enters the first operating port 193 or the second operating port 194 is 1. When one game ball enters the first actuation port 193 or the second actuation port 194, the number of game balls paid out is one, resulting in an increase or decrease of zero, so even if the first actuation winning confirmation flag or the second actuation winning confirmation flag is set to "1", the value of the total winning number counter 347 is not updated.

If a negative judgment is made in step SA302, or if the processing of step SA303 is executed, it is determined whether the out confirmation flag of the confirmation flag group 281a in the work area 281 for specific control is set to "1" (step SA304). If the out confirmation flag is set to "1," this means that a game ball has entered the out port 184a and one game ball has been successfully detected by the out port detection sensor 337a. If the out confirmation flag is set to "1" (step SA304: YES), the value of the total win number counter 347 is decremented by 1 (step SA305). Then, if the value of the total win number counter 347 after the decrement is below "0" (step SA306: NO), the value of the total win number counter 347 is cleared to "0" (step SA307). As a result, if the value of the total acquisition counter 347 falls below "0" after subtraction, the value of the total acquisition counter 347 will be cleared to "0" and maintained at "0."

If a negative judgment is made in step SA304, a positive judgment is made in step SA306, or the processing of step SA307 is executed, it is determined whether the predetermined difference in the number of balls measured by the total winning number counter 347 has reached or exceeded the termination reference number of 19,000 (step SA308). If the predetermined difference in the number of balls has reached or exceeded the termination reference number (step SA308: YES), the game-unavailable flag 351 in the non-specific control work area 283 is set to "1" (step SA309). As a result, after the currently executing timer interrupt processing (Fig. 167) is completed, the next timer interrupt processing (Fig. 167) is initiated, and a positive judgment is made in step SA301 of the total winning number management processing (Fig. 178), resulting in an infinite loop and no game being played.

Then, a game disable command indicating that play will no longer be possible is sent to the sound/light side MPU 233 (step SA310). When the sound/light side MPU 233 receives the game disable command, it controls the symbol display device 199, the display light-emitting unit 204, and the speaker unit 205 to issue a notification indicating that play will no longer be possible.

If a negative judgment is made in step SA308, it is determined whether the predetermined difference in the number of balls measured by the total winning number counter 347 has reached or exceeded the notification reference number of 17,000, which is less than the termination reference number of 19,000 (step SA311). If the predetermined difference in the number of balls has reached or exceeded the notification reference number (step SA311: YES), a pre-unplayable transition command indicating that the predetermined difference in the number of balls may reach the termination reference number is sent to the sound/light side MPU 233 (step SA312). When the sound/light side MPU 233 receives the pre-unplayable transition command, it controls the pattern display device 199, display light-emitting unit 204, and speaker unit 205 so that a pre-unplayable transition notification is issued indicating that the predetermined difference in the number of balls may reach the termination reference number.

In this way, the process of managing the predetermined difference in the number of balls and the process of preventing play from being played when the predetermined difference in the number of balls reaches the termination reference number are executed using a non-specific control program and non-specific control data. This makes it possible to execute the process of managing the predetermined difference in the number of balls and the process of preventing play from being played when the predetermined difference in the number of balls reaches the termination reference number, while preventing the data volume of the specific control program and specific control data from increasing.

Next, the command executed in step S8716 of the main processing (Figure 161) will be described. As already explained, in step S8716, the base value calculation and setting process is executed using the CALLA command. The base value calculation and setting process is included in the non-specific control processing. In other words, when the remaining processing of the main processing (Figure 161) changes from a situation where specific control processing is being executed to a situation where non-specific control processing is being executed, the non-specific control processing is called using the CALLA command.

When the base value calculation and setting process is executed by the CALLA instruction, execution of the timer interrupt process is prohibited, and the register group switching circuit 252 switches from a state in which the first register group 265 is being used to a state in which the second register group 266 is being used, after which the program corresponding to the base value calculation and setting process is started. By switching the register group to be used from the first register group 265 to the second register group 266, the second register group 266 is used in the base value calculation and setting process, which is a non-specific control process, and it is possible to prevent the data in each register included in the first register group 265 from being overwritten.

As already explained, the values of the total dispensed number counter 352 and the total ejected number counter 353 in the non-specific control work area 283 are updated in the quantity information update process in step SA207 of the second management process (FIG. 177). The base value calculation and setting process (FIG. 179) in step S8716 of the main process (FIG. 161) calculates the base value using the values of the total dispensed number counter 352 and the total ejected number counter 353. Also, as already explained, the base value data includes one byte of integer part calculation result data, which is the integer part of the base value, and one byte of decimal part calculation result data, which is the part of the base value after the decimal point. The integer part calculation result data is stored in the most significant byte of the current status area 343 and the first to third history areas 344 to 346, and the decimal part calculation result data is stored in the least significant byte.

Figure 179 is a flowchart showing the base value calculation and setting process executed in step S8716 of the main processing ( Figure 161 ). Note that steps SA401 to SA422 in the base value calculation and setting process are executed using a program and data for non-specific control.

In steps SA401 to SA420, the quotient obtained by dividing the value of the total dispensed number counter 352 by the value of the total discharged number counter 353 is calculated, and the data of the calculated quotient (1 byte) is set in the upper 1-byte area of the current state area 343 as the integer part calculation result data of the base value. The quotient obtained by dividing the value of the total dispensed number counter 352 by the value of the total discharged number counter 353 is calculated by counting the number of times the value of the total dispensed number counter 352 is subtracted from the value of the total dispensed number counter 353 in register A 301a.

Specifically, first, the most significant byte of data in the total payout counter 352 in the non-specific control work area 283 is read into the D register 303a (step SA401). Hereinafter, in this embodiment, the data read from the total payout counter 352 to the D register 303a in step SA401, or the data updated after being read from the total payout counter 352 to the D register 303a in step SA401, is referred to as the most significant byte of data in the total payout counter 352.

Then, the "EXX" command is executed (step SA402). As already explained, when the second register group 266 is the target of use, "EXX" is an exchange command that exchanges the data stored in the BC register 302, DE register 303, and HL register 304 with the data stored in the BC' register 312, DE' register 313, and HL' register 314. By executing the "EXX" command, the data in the D register 303a (the data corresponding to the most significant byte of the total dispensed number counter 352) can be saved to the D' register 313a.

Then, the value of A register 301a is cleared to "0" (step SA403). As described above, A register 301a is used to count the number of times the value of total dispensed number counter 352 is subtracted from the value of total dispensed number counter 352, and to derive the integer division result data. By clearing the value of A register 301a to "0" in step SA403, the integer division result data of "0" is stored in A register 301a.

Then, the data in the lowest two bytes of the total dispensed number counter 352 is read into the DE register 303 (step SA404). Hereinafter, in this embodiment, the data read from the total dispensed number counter 352 to the DE register 303 in step SA404, or the data read from the total dispensed number counter 352 to the DE register 303 in step SA404 and then updated, is referred to as the data corresponding to the lowest two bytes of the total dispensed number counter 352. Then, the value of the total dispensed number counter 353 is read into the BC register 302 (step SA405).

In this way, the processing proceeds to step SA406 with the data corresponding to the most significant byte of the total dispensed number counter 352 stored in the D' register 313a, the data corresponding to the least significant 2 bytes of the total dispensed number counter 352 stored in the DE register 303, the data of the total dispensed number counter 353 stored in the BC register 302, and the value of the integer division result data stored in the A register 301a being "0".

In step SA406, the value of A register 301a is incremented by 1. This increments the value of the integer division result data stored in A register 301a by 1. In this way, the value of A register 301a is incremented by 1 before the process (step SA408) of subtracting the value of total dispensed number counter 353 from the data corresponding to the lowest 2 bytes of total dispensed number counter 352 is executed. If the result of this subtraction process (step SA408) is a negative value, the value of A register 301a is decremented by 1 in step SA419 (described later), thereby restoring the value of A register 301a to the value before the increment (the value before the process of step SA406 was executed). As a result, the process of step SA408 when the calculation result is a negative value is excluded from the count, and the number of times the process (step SA408) of subtracting the value of total dispensed number counter 353 from the data corresponding to the lowest 2 bytes of total dispensed number counter 352 is executed in A register 301a is counted.

Then, the data in DE register 303 (data corresponding to the lowest 2 bytes of total dispensed number counter 352) is transferred to HL register 304 (step SA407). The data in DE register 303 is maintained after the transfer. Then, an operation is performed to subtract the value of BC register 302 (value of total dispensed number counter 353) from the value of HL register 304 (data corresponding to the lowest 2 bytes of total dispensed number counter 352) (step SA408). The result of this operation is stored in HL register 304. As a result, the operation result of subtracting the value of total dispensed number counter 353 from the data corresponding to the lowest 2 bytes of total dispensed number counter 352 is stored in HL register 304. Furthermore, if the value of the data corresponding to the lowest 2 bytes of the total dispensed number counter 352 before the current calculation was equal to or greater than the value of the total discharged number counter 353, no borrow will occur in the current calculation, and the value of the carry flag in F register 301b will be "0". If the value of the data corresponding to the lowest 2 bytes of the total dispensed number counter 352 before the current calculation was less than the value of the total discharged number counter 353, a borrow will occur in the current calculation, and the carry flag will be set to "1".

If the value of the carry flag is "0" (step SA409: NO), i.e., if the result of this calculation is a positive value, the data in the HL register 304 is set in the DE register 303 (step SA410). As a result, the data corresponding to the lowest two bytes of the total dispensed number counter 352 stored in the DE register 303 is updated to the value after the calculation in step SA408.

Then, the process returns to step SA406, and steps SA406 to SA410 are repeated until a positive determination is made in step SA409. This allows the process (step SA408) of subtracting the value of the total dispensed number counter 353 from the value of the lowest 2 bytes of the data of the total dispensed number counter 352 until the value of the data corresponding to the lowest 2 bytes of the total dispensed number counter 352 becomes less than the value of the total dispensed number counter 353, and the number of times the process (step SA408) of subtracting the value of the total dispensed number counter 353 from the value of the lowest 2 bytes of the data of the total dispensed number counter 352 is executed can be counted in register A 301a.

If a positive determination is made in step SA409, the "EXX" command is executed (step SA411). Executing the "EXX" command swaps the data stored in BC register 302, DE register 303, and HL register 304 with the data stored in BC' register 312, DE' register 313, and HL' register 314. This allows the data in BC register 302 (data in total dispensed number counter 353), the data in DE register 303 (data corresponding to the lower two bytes of total dispensed number counter 352 before being updated to the data after the calculation in step SA408, which resulted in a negative value), and the data in HL register 304 (data resulting from the calculation in step SA408) to be saved to the corresponding auxiliary registers, and the data saved in D' register 313a (data corresponding to the upper byte of total dispensed number counter 352) to be restored to D register 303a.

If the value of D register 303a is 1 or greater (step SA412: NO), i.e., if the value of the most significant byte of the total payout counter 352's data is 1 or greater and borrowing from the most significant byte to the least significant byte of the total payout counter 352's data is possible, steps SA413 to SA418 are executed to process the borrow. Specifically, the value of D register 303a is first decremented by 1 (step SA413). This updates the value of the most significant byte of the total payout counter 352's data stored in D register 303a to the value after the borrow. Then, the "EXX" command is executed (step SA414). Execution of the "EXX" command swaps the data stored in BC register 302, DE register 303, and HL register 304 with the data stored in BC' register 312, DE' register 313, and HL' register 314. This allows the data corresponding to the most significant byte of the total dispensed number counter 352 stored in the D register 303a to be saved to the D' register 313a, and the data saved in the BC' register 312 (data of the total dispensed number counter 353), the data saved in the DE' register 313 (data corresponding to the least significant 2 bytes of the total dispensed number counter 352 before it was updated to the data after the calculation in step SA408, which resulted in a negative calculation value), and the data saved in the HL' register 314 (data resulting from the calculation in step SA408) to be restored to the BC register 302, DE register 303, and HL register 304.

Then, in steps SA415 to SA417, a process is performed to calculate ("the lower 2 byte corresponding data of the total dispensed number counter 352 before the execution of the processing of step SA408 stored in DE register 303" + "the value increased by borrowing (65536)" - "the value of the total dispensed number counter 353 stored in BC register 302"). However, since the data capacity of the BC register 302, DE register 303, and HL register 304 used in the calculation is 2 bytes, in step SA415, the calculation is performed to calculate ("a value (65535) that is 1 less than the value increased by borrowing)" - "the data of the total discharged number counter 353 stored in the BC register 302"), in step SA416, "1" is added to the calculation result of step SA415, and in step SA417, the processing is performed to add "the lower 2 byte corresponding data stored in the DE register 303 before the processing of step SA408 is executed" to the calculation result of step SA416.

In step SA415, an operation is performed to subtract the value of BC register 302 (the value of total discharge number counter 353) from "65535" ("FFFFH"), which is the maximum value of the 2-byte numerical information. The result of this operation is stored in HL register 304. Then, the value of HL register 304 is incremented by 1 (step SA416). Then, an operation is performed to add the value of DE register 303 to the value of HL register 304 (step SA417). The result of this operation is stored in HL register 304. As a result, the result of the operation described above ("the lower 2 byte data before execution of the processing of step SA408 stored in DE register 303" + "the value increased by borrowing (65536)" - "the value of total discharge number counter 353 stored in BC register 302") is stored in HL register 304. Then, the data in HL register 304 is transferred to DE register 303 (step SA418). As a result, the result of the calculation to subtract the value of the total dispensed number counter 353 from the value of the lower 2 byte data of the total dispensed number counter 352 after borrowing from the upper 1 byte corresponding data to the lower 2 byte data of the total dispensed number counter 352 is stored in the DE register 303, and the lower 2 byte data of the total dispensed number counter 352 stored in the DE register 303 is updated.

Then, the process returns to step SA406, and steps SA406 to SA418 are repeated until a positive determination is made in step SA412. This allows the process (step SA408) to subtract the value of the total dispensed number counter 353 from the value of the lower 2-byte data of the total dispensed number counter 352 until the value of the upper 1-byte data of the total dispensed number counter 352 becomes "0" and a borrow from the upper 1-byte data to the lower 2-byte data cannot be generated, and the number of times this subtraction process (step SA408) is performed can be counted in register A 301a.

If a positive determination is made in step SA412, the value of A register 301a is decremented by 1 (step SA419). This restores the value of the integer part calculation result data stored in A register 301a to the value before "1" was added in step SA406. This resets the A register 301a to a state where a borrow cannot occur from the upper 1 byte of the total dispensed number counter 352 to the lower 2 byte of the data, and where the value of the lower 2 byte of the total dispensed number counter 352 is less than the value of the total dispensed number counter 353. This means that the A register 301a is not counting the calculation of step SA408, i.e., the integer part calculation result data is stored in A register 301a. The value of A register 301a (the integer part calculation result data) is then set to the upper 1 byte of the current area 343 (step SA420).

Then, the decimal point calculation process is executed (step SA421). In the decimal point calculation process, the "EXX" command is first executed to restore the data saved in the BC' register 312 in step SA411 (data from the total dispensed number counter 353), the data saved in the DE' register 313 (data corresponding to the lower two bytes of the total dispensed number counter 352), and the data saved in the HL' register 314 (data resulting from the calculation in step SA408) to the BC register 302, DE register 303, and HL register 304. In the decimal part calculation process (step SA421), the data of the total dispensed number counter 353 restored to the BC register 302 by the "EXX" command and the lower 2 byte corresponding data of the total dispensed number counter 352 restored to the DE register 303 are used to derive the decimal part calculation result data of the base value, and the derived decimal part calculation result data is set in the lower 1 byte area of the current status area 343. As a result, the current status area 343 now contains the most recent base value information (specifically, the integer part calculation result data and decimal part calculation result data).

After executing the decimal point calculation process in step SA421, the data shift process is executed (step SA422). In the data shift process, if the value of the total discharged number counter 353 is equal to or greater than the shift reference number (specifically, 60,000), the data shift process is executed, followed by a process to clear various counters. In the data shift process, the information stored in the current status area 343, first history area 344, second history area 345, and third history area 346 in the calculation result storage area 342 is shifted in the following order: second history area 345 → third history area 346, first history area 344 → second history area 345, current status area 343 → first history area 344. As a result, the final base value for the calculation period two periods ago is stored in the third history area 346 as the final base value for the calculation period three periods ago, the final base value for the calculation period one period ago is stored in the second history area 345 as the final base value for the calculation period two periods ago, and the base value last calculated for the current calculation period is stored in the first history area 344 as the final base value for the calculation period one period ago. In addition, in the process of clearing various counters, all counters 341a to 341e in the normal counter area 341 are cleared to "0".

Then, the base value calculation and setting process (Figure 179) is terminated by executing the instruction "RETA." When the base value calculation and setting process is terminated by the RETA instruction, the register group to be used in the register group switching circuit 252 is switched from the second register group 266 to the first register group 265, and the execution of the timer interrupt process (Figure 167) is permitted, after which the base value calculation and setting process is terminated. By switching the register group to be used from the second register group 266 to the first register group 265, the first register group 265 is used in the specific control process, preventing the data in each register included in the second register group 266 from being overwritten.

As already explained, in the second register group 266, the IX register 305 is used to store the non-specific first base address ("3000H"), the IY register 306 is used to store the non-specific second base address ("3100H"), the K register 307 is used to store the non-specific upper base address information ("A3H"), and the V register 308 is used to store the register upper second base address information ("ABH"). In addition, the stack pointer 309 is used to store address information that allows the main CPU 251 to identify the memory area in the non-specific control stack area 284 where information is to be written in response to a push command. As already explained, the second register group 266 includes, in addition to the registers used for addressing (IX register 305, IY register 306, K register 307, and V register 308) and stack pointer 309, the main registers A register 301a, F register 301b, B register 302a, C register 302b, D register 303a, E register 303b, H register 304a, and L register 304b. As mentioned above, in the base value calculation setting process (FIG. 179), A register 301a is used to store the integer division result data, BC register 302 is used to store the data of the total dispensed number counter 353, DE register 303 is used to store the data corresponding to the lower two bytes of the total dispensed number counter 352, and HL register 304 is used to perform the calculation of step SA408. In addition, F register 301b, which is a flag register, is also used in the calculation of step SA408. In this way, during the base value calculation and setting process (Figure 179), a situation occurs in which the AF register 301, BC register 302, DE register 303, and HL register 304 in the second register group 266 are all in use.

If the second register group 266 does not include a register capable of storing the most significant byte of the total payout counter 352 data when data is stored in the AF register 301, BC register 302, DE register 303, and HL register 304, then when reading the most significant byte of the total payout counter 352 data into the second register group 266, processing is required to save the data stored in the destination register (A register 301a, B register 302a, C register 302b, D register 303a, E register 303b, H register 304a, or L register 304b) to the main RAM 224. In contrast, the second register group 266 includes an auxiliary register (D' register 313a) corresponding to the D register 303a, and is capable of storing the most significant byte of the total payout counter 352 data in this auxiliary register. As a result, in addition to the integer division result data, the data of the total dispensed number counter 353, the data corresponding to the lower 2 bytes of the total dispensed number counter 352, and the calculation result data of step SA408, the data corresponding to the upper 1 byte of the total dispensed number counter 352 can be stored in the second register group 266. Therefore, when the upper 1 byte data of the total dispensed number counter 352 is read into the second register group 266, it is possible to eliminate the need to save the data stored in any of the A register 301a, B register 302a, C register 302b, D register 303a, E register 303b, H register 304a, and L register 304b to the main RAM 224.

The second register group 266 includes an auxiliary register (DE' register 313) for the DE register 303. Furthermore, by executing the EXX instruction, the data stored in the BC register 302, DE register 303, and HL register 304 is exchanged with the data stored in the auxiliary registers of these main registers. Therefore, the EXX instruction can be used to exchange the data stored in the DE register 303 with the data stored in the auxiliary register (DE' register 313). This allows the data corresponding to the lower two bytes of the total payout counter 352 to be stored in the DE register 303, and the data corresponding to the upper byte of the total payout counter 352 to be stored in the D' register 313a, and then the data corresponding to the upper byte and the data corresponding to the lower 2 bytes stored in the DE register 303 can be switched using the EXX instruction.

If an auxiliary register corresponding to DE register 303 is not provided, and the AF register 301, BC register 302, DE register 303, and HL register 304 are all in use and the data corresponding to the lower two bytes of total payout counter 352 is stored in DE register 303, reading the data corresponding to the upper byte of total payout counter 352 into D register 303a requires an instruction (specifically, a 4-byte LD instruction) to save the data corresponding to the lower two bytes of total payout counter 352 to main RAM 224, and an instruction (a 3-byte LD instruction) to read the data corresponding to the upper byte of total payout counter 352 into D register 303a. In contrast, this system is provided with an auxiliary register corresponding to D register 303a, and the data stored in D register 303a can be exchanged with the data stored in the auxiliary register (D' register 313a) using an exchange instruction (a 1-byte EXX instruction). This allows the data corresponding to the lower 2 bytes of the total payout counter 352 to be stored in the DE register 303 and the data corresponding to the upper 1 byte of the total payout counter 352 to be stored in the D' register 313a, and then, at the time when the necessary data from the upper 1 byte corresponding data and the lower 2 byte corresponding data switches from the lower 2 byte corresponding data to the upper 1 byte corresponding data, the lower 2 byte corresponding data can be saved to the DE' register 313 by executing the EXX instruction, and the upper 1 byte corresponding data can be read out to the D register 303a and made available for use. Therefore, compared to a configuration in which, without using the DE' register 313, an instruction to save the lower 2 byte data to the main RAM 224 and an instruction to read the upper 1 byte data into the D register 303a are executed at the timing when the required data switches from the lower 2 byte data of the total payout number counter 352 to the upper 1 byte data of the total payout number counter 352, the number of instructions and data capacity set in the program can be reduced because the upper 1 byte data can be read into the D register 303a and made available for use.

After the upper byte of data from the total payout counter 352 is stored in the D register 303a and the lower 2 bytes of data from the total payout counter 352 is stored in the DE' register 313, by executing an exchange command (a 1-byte EXX command) at the time when the necessary data from the upper byte of data and the lower 2 bytes of data switches from the upper byte of data to the lower 2 bytes of data, the upper byte of data can be saved to the D' register 313a and the lower 2 bytes of data can be read into the DE register 303 and made available for use. This allows the number of instructions and data capacity set in the program to be reduced, without using the DE' register 313, compared to a configuration in which, when the required data switches from the most significant byte of the total dispensed number counter 352 data to the least significant 2 bytes of the total dispensed number counter 352 data, an instruction (a 3-byte LD instruction) is executed to save the most significant byte of data to the main RAM 224 and an instruction (a 4-byte LD instruction) to read the least significant 2 bytes of data into the DE register 303.

Steps SA401 to SA418 are executed regardless of whether the management start flag in the non-specific control work area 283 is set to "1." This allows the base value to be calculated and stored in the current status area 343 whether the management start flag is set to "0" or "1."

<Configuration for resetting the main MPU 222>
Next, we will explain the configuration for resetting the main MPU 222. As already explained, a power outage monitoring board 225 is connected to the input and output sides of the main MPU 222 (see FIG. 157). A power supply and launch control device 218 having the function of supplying operating power is connected to the power outage monitoring board 225, and power is supplied to the main MPU 222 via the power outage monitoring board 225. Also, as already explained, the main MPU 222 is provided with a main power supply control unit 253.

The power supply/launch control device 218 takes in power supplied from an external 24V AC power supply, generates various power sources including a +24V DC stabilized power supply, a +5.0V DC normal operating power supply, and a +5.0V DC backup power supply, and supplies the necessary power to the main control device 211, the payout control device 217, etc. Hereinafter, in this embodiment and the 19th to 23rd embodiments described below, the power supplied from the +24V DC stabilized power supply will be referred to as first normal operating power, and the power supplied from the +5.0V normal operating power supply will be referred to as second normal operating power. Furthermore, the power supplied from the +5.0V backup power supply will be referred to as backup power.

As shown in FIG. 157, the electrical wiring for supplying operating power from the power supply/launch control device 218 to the power outage monitoring board 225 includes a first electrical wiring EL1 for supplying a first normal operating power of +24 V and a second electrical wiring EL2 for supplying a second normal operating power of +5.0 V. A third electrical wiring EL3 is also provided for supplying a second normal operating power of +5.0 V from the power outage monitoring board 225 to the main power supply control unit 253 of the main MPU 222. A fourth electrical wiring EL4 is also provided for supplying backup power of +5.0 V from the power supply/launch control device 218 to the main power supply control unit 253. The main power supply control unit 253 is provided with a voltage monitoring circuit 354 that monitors the voltage of the second normal operating power supplied to the main power supply control unit 253.

As already explained, the power supply/launch control device 218 is provided with a power-on power supply unit 218a and a power-off power supply unit 218b. When power is being supplied to the power supply/launch control device 218 from an external 24V AC power source, the power-on power supply unit 218a supplies first normal operating power and second normal operating power to the power failure monitoring board 225, and supplies second normal operating power to the voltage monitoring circuit 354. When power is being supplied to the power supply/launch control device 218 from an external 24V AC power source, the power-off power supply unit 218b charges a capacitor with the power supplied from the power-on power supply unit 218a. When power supply to the power supply/launch control device 218 from the external 24V AC power source is stopped, the power-off power supply unit 218b supplies backup power from the capacitor to the main power supply control unit 253.

When the power supply from the external 24V AC power source to the power supply/launch control device 218 is stopped, the maximum voltage (+24V) of the first normal operating power supplied to the power outage monitoring board 225 is first not detected by the power outage monitoring board 225, and then the voltage of the second normal operating power supplied to the power outage monitoring board 225 and the voltage monitoring circuit 354 begins to drop from +5.0V.

Figure 180(a) is an explanatory diagram explaining the power monitored by the power outage monitoring board 225 and voltage monitoring circuit 354, and Figure 180(b) is an explanatory diagram explaining various voltages. As shown in Figure 180(a), the power outage monitoring board 225 monitors the voltage of the first normal operating power and the voltage of the second normal operating power supplied to the power outage monitoring board 225. In addition, the voltage monitoring circuit 354 monitors the voltage of the second normal operating power supplied to the main power supply control unit 253.

As shown in Figure 180(b), for the second normal operating power, the voltage range in which normal operation of the main MPU 222 is guaranteed is +4.0 to +5.5 V, and the voltage of the second normal operating power and backup power supplied from the power supply/launch control device 218 to the main power supply control unit 253 via the power outage monitoring board 225 is +5.0 V. In addition, the operating voltage of the main CPU 251 and the operating voltage of the various circuits provided in the main MPU 222 is +2.1 V.

The main CPU 251 and various circuits in the main MPU 222 that are external to the main CPU 251 can operate when the voltage of the second normal operating power supplied is +2.1V or higher. The HI level of various signals used in the main MPU 222 is set to +5.0V to prevent malfunctions due to noise. When the voltage of the second normal operating power supplied to the main power supply control unit 253 drops from +5.0V, the voltages corresponding to the HI level of various signals used in the main MPU 222 also drop. When the voltage of the second normal operating power supplied to the main power supply control unit 253 is in the range of +4.0V to +5.5V, the various signals used in the main MPU 222 are less susceptible to noise. On the other hand, when the voltage of the second normal operating power supplied to the main power supply control unit 253 is less than +4.0 V, the various signals used in the main MPU 222 are more likely to fall from HIGH to LOW due to the influence of noise, compared to when the voltage of the second normal operating power is +4.0 V or higher.

The power outage monitoring board 225 determines that a rise in the voltage of the second normal operating power monitored by the power outage monitoring board 225 has been detected based on the voltage of the second normal operating power being above +4.4V, and determines that a fall in the voltage of the second normal operating power has been detected based on the voltage of the second normal operating power being below +4.0V. Furthermore, the voltage monitoring circuit 354 determines that a rise in the voltage of the second normal operating power has been detected based on the voltage of the second normal operating power being above +3.1V, and determines that a fall in the voltage of the second normal operating power has been detected based on the voltage of the second normal operating power being below +2.7V.

As shown in FIG. 157, the main control unit 211 is provided with a second signal line SG2 for outputting a first reset signal from the power outage monitoring board 225 to the reset circuit 254, a third signal line SG3 for outputting a second reset signal from the voltage monitoring circuit 354 to the reset circuit 254, and a fourth signal line SG4 for outputting a power outage signal from the power outage monitoring board 225 to the main CPU 251. In the main CPU 251, power outage processing is executed in the power outage monitoring process (step S9203) of the timer interrupt process (FIG. 167) based on the detection of a fall from HI level to LOW level in the power outage signal output from the power outage monitoring board 225 and input to the main CPU 251. Note that the relationship between the LOW level and the HI level in the power outage signal may be reversed.

The reset circuit 254 receives a first reset signal from the power outage monitoring board 225 and a second reset signal from the voltage monitoring circuit 354. When the voltage of the second normal operating power supplied to the main power supply control unit 253 is +2.1 V or higher and at least one of the first reset signal and second reset signal input to the reset circuit 254 is low, the reset circuit 254 resets the main MPU 222. Therefore, when the first reset signal input to the reset circuit 254 falls, the main MPU 222 is reset even if the second reset signal is high. When the second reset signal input to the reset circuit 254 falls, the main MPU 222 is reset even if the first reset signal is high. The relationship between the low and high levels of the first reset signal may be reversed, and the relationship between the low and high levels of the second reset signal may be reversed.

As shown in FIG. 157, a noise filter 356 is provided on the input side of the reset circuit 254 in the main MPU 222 to prevent the detection of a temporary falling edge of the first reset signal due to noise. Specifically, when the voltage of the first reset signal input to the reset circuit 254 remains at a low level for a period of six or more clocks (specifically, approximately 0.4 microseconds) of the internal system clock (specifically, 16 MHz), the reset circuit 254 determines that the first reset signal input to the reset circuit 254 is at a low level.

Figure 180(c) is an explanatory diagram illustrating the conditions for raising the power failure signal, first reset signal, and second reset signal, and Figure 180(d) is an explanatory diagram illustrating the conditions for lowering the power failure signal, first reset signal, and second reset signal. As shown in Figure 180(c), after the supply of operating power to the pachinko machine 160 begins, the power failure monitoring board 225 raises the power failure signal from a low level to a high level when the voltage of the monitored second normal operating power (maximum +5.0V) reaches +3.6V or higher, and raises the first reset signal from a low level to a high level when the voltage of the monitored second normal operating power reaches +4.4V or higher. Furthermore, the voltage monitoring circuit 354 raises the second reset signal from a low level to a high level when the voltage of the monitored second normal operating power reaches +3.1V or higher.

As shown in Figure 180 (d), if the state in which the maximum voltage (+24 V) is not detected in the monitored first normal operating power continues for a power outage reference period (e.g., 4 milliseconds), the power outage monitoring board 225 drops the power outage signal being output to the main CPU 251 from HI level to LOW level. By setting the power outage reference period for the fall of the power outage signal, the possibility of the power outage monitoring board 225 causing the power outage signal to fall due to noise is reduced.

When the power outage monitoring board 225 falls the power outage signal, it falls the first reset signal it is outputting to the reset circuit 254 from HI level to LOW level based on the fact that a reset delay period (specifically, 6 milliseconds) has elapsed since the power outage signal fell. Furthermore, when the voltage of the second normal operating power it is monitoring falls below the first reset reference voltage (specifically, +4.0 V or less), the power outage monitoring board 225 falls the first reset signal from HI level to LOW level regardless of whether the power outage signal fell.

The voltage monitoring circuit 354 monitors the voltage of the second normal operating power (+5.0 V DC power supply) supplied from the power supply and launch control device 218 to the main power supply control unit 253, and drops the second reset signal from HI level to LOW level when the voltage of the second normal operating power falls below the second reset reference voltage (specifically, +2.7 V or less).

The voltage monitoring circuit 354's fall detection voltage (+2.7 V) for the second normal operating power is set to a value higher than the operating voltage (+2.1 V) of the main CPU 251. This prevents the voltage of the second normal operating power supplied to the main CPU 251 from falling below the operating voltage of the main CPU 251 in a situation where the main MPU 222 is reset based on the voltage monitoring circuit 354 detecting a fall in the second normal operating power and the second reset signal falling. Therefore, even when the main MPU 222 is reset based on the second reset signal falling, the reset can be performed normally.

Figure 181(a) is a functional block diagram illustrating the configuration for controlling the power outage signal and first reset signal in the power outage monitoring board 225. As shown in Figure 181(a), the power outage monitoring board 225 is provided with a first voltage monitoring circuit 225a, a second voltage monitoring circuit 225b, a power outage signal control circuit 225c, a first reset signal control circuit 225d, and a power outage signal delay circuit 225e. The first voltage monitoring circuit 225a monitors the voltage of the first normal operating power, and the second voltage monitoring circuit 225b monitors the voltage of the second normal operating power.

If the first voltage monitoring circuit 225a does not detect the maximum voltage (+24 V) of the first normal operating power it is monitoring for the power outage reference period (4 milliseconds), it drops the first detection signal it outputs to the power outage signal control circuit 225c from HI level to LOW level. If the first detection signal input to the power outage signal control circuit 225c drops to LOW level, the power outage signal output from the power outage signal control circuit 225c to the main CPU 251 drops from HI level to LOW level.

The power failure signal is also input to the power failure signal delay circuit 225e. After the power failure signal input to the power failure signal delay circuit 225e falls to a low level, when the reset delay period (6 milliseconds) has elapsed since the falling edge of the power failure signal, the power failure delay signal output from the power failure signal delay circuit 225e to the first reset signal control circuit 225d falls from a high level to a low level. Furthermore, when the voltage of the second normal operating power that the second voltage monitoring circuit 225b monitors falls below +4.0 V, the second detection signal that it outputs to the first reset signal control circuit 225d falls from a high level to a low level.

When at least one of the power failure delay signal and the second detection signal input to the first reset signal control circuit 225d falls to a low level, the first reset signal output from the first reset signal control circuit 225d to the reset circuit 254 falls from a high level to a low level.

Figure 181(b) is a functional block diagram illustrating the configuration for resetting the main MPU 222. As shown in Figure 181(b), the reset circuit 254 is provided with a reset execution signal control circuit 254a, and the main CPU 251 is provided with an internal register initialization circuit 251a. The main power supply control unit 253 is also provided with a supply switching circuit 253a. Furthermore, in the main MPU 222, an external register initialization circuit 355 is provided outside the main CPU 251.

First, we will explain the case where the main MPU 222 is reset. When the voltage of the second normal operating power supplied to the main power supply control unit 253 is +2.1 V or higher and at least one of the first reset signal and second reset signal input to the reset execution signal control circuit 254a is at a LOW level, the reset execution signal output from the reset execution signal control circuit 254a to the main CPU 251, external register initialization circuit 355, and supply switching circuit 253a of the main power supply control unit 253 is set to a LOW level. In this way, when the reset execution signal output from the reset execution signal control circuit 254a is set to a LOW level, the main MPU 222 is reset.

When the reset execution signal input to the main CPU 251 is at a LOW level, the internal register initialization circuit 251a operates to initialize the registers provided inside the main CPU 251. Furthermore, when the reset execution signal input to the external register initialization circuit 355 is at a LOW level, the registers provided outside the main CPU 251 in the main MPU 222 are initialized.

As already explained, the main power supply control unit 253 is supplied with second normal operating power and backup power. When the reset execution signal input to the supply switching circuit 253a is at a LOW level, the power supplied to the main RAM 224 is switched from the second normal operating power to backup power.

Next, we will explain the case where the reset of the main MPU 222 is released. When the voltage of the second normal operating power supplied to the main power supply control unit 253 is +2.1 V or higher and both the first reset signal and the second reset signal input to the reset execution signal control circuit 254a are at HI level, the reset execution signal output from the reset execution signal control circuit 254a to the main CPU 251, external register initialization circuit 355, and supply switching circuit 253a is set to HI level. This releases the reset of the main MPU 222. When the reset execution signal input to the supply switching circuit 253a is at HI level, the power supplied to the main RAM 224 is switched from backup power to second normal operating power.

Figure 182(a) is an explanatory diagram illustrating the relationship between the first reset signal and second reset signal input to the reset circuit 254 and the state of the main MPU 222. As shown in Figure 182(a), after the supply of operating power to the pachinko machine 160 has started, if the voltage of the second normal operating power supplied to the main power supply control unit 253 is +2.1 V or higher and at least one of the first reset signal and second reset signal input to the reset circuit 254 is at a LOW level, the main MPU 222 is reset. Then, when both the first reset signal and the second reset signal input to the reset circuit 254 become a HIGH level, the reset of the main MPU 222 is released.

A reset of the main MPU 222 refers to a state in which the power supplied to the main RAM 224 is switched from the second normal operating power to the backup power, the registers in the main MPU 222 (internal registers of the main CPU 251 and external registers of the main CPU 251) are initialized, the circuits in the main MPU 222 are initialized, the input and output ports of the main MPU 222 are cleared, and no processing is being executed in the main MPU 222. When the reset of the main MPU 222 is released, the main MPU 222 executes the main reset release processing described below, and then starts the main processing (Figure 161) already described.

The timing at which the first reset signal input to the reset circuit 254 rises to HI level and the timing at which the second reset signal input to the reset circuit 254 rises to HI level occur after the voltage of the second normal operating power supplied to the main power supply control unit 253 reaches +2.1 V or higher. This allows the main MPU 222 to be released from reset after the main MPU 222 has been reset. Even if the first reset signal and the second reset signal input to the reset circuit 254 rise to HI level at the same time, the main MPU 222 will be released from reset while the main MPU 222 is in reset mode.

When the supply of operating power to the pachinko machine 160 is stopped, at least one of the first reset signal and the second reset signal input to the reset circuit 254 falls from HIGH to LOW, causing the main MPU 222 to be reset. The main MPU 222 is also reset when the first reset signal and the second reset signal input to the reset circuit 254 are simultaneously fallen to LOW. When the main MPU 222 is reset, no processing is being executed in the main MPU 222, i.e., the operation of the main MPU 222 is stopped.

Next, the reset release process executed by the main MPU 222 will be explained with reference to the flowchart in Figure 182 (b). As already explained, the main reset release process is executed when the reset of the main MPU 222 is released. Note that the processes of steps SA501 to SA504 in the main reset release process are executed using a specific control program and specific control data.

First, a status check process is executed (step SA501). The status check process is executed to confirm that no abnormalities have occurred in the programs set in the main ROM 223 and to confirm that no abnormalities have been detected in the circuits built into the main MPU 222. If no abnormality is identified in the status check process (step SA501) (step SA502: NO), a jump is made to the start address of the main process (step SA503). This causes the main process (Figure 161) to be started in the main MPU 222.

If an abnormality is detected during the status confirmation process (step SA502: YES), execution stop processing is executed (step SA503). The execution stop processing executes processing to put the main MPU 222 in a state where no processing is being executed. This prevents the main processing (Figure 161) from being executed without resolving the state in which the abnormality occurred if an abnormality is detected when the main MPU 222 is released from reset.

In this way, when the reset of the main MPU 222 is released, the main reset release process (Figure 182 (b)) is executed in the main MPU 222, and the main process (Figure 161) is started, provided that no abnormalities are confirmed in the status confirmation process (step SA501).

Next, the resetting of the main MPU 222 after the supply of operating power to the pachinko machine 160 has begun will be explained with reference to the time chart in Figure 183. Figure 183(a) shows the state in which the main MPU 222 is being reset, Figure 183(b) shows the state of the first reset signal input to the reset circuit 254, Figure 183(c) shows the state of the second reset signal input to the reset circuit 254, Figure 183(d) shows the voltage of the second normal operating power monitored by the voltage monitoring circuit 354, and Figure 183(e) shows the voltage of the second normal operating power monitored by the power outage monitoring board 225.

When the supply of operating power to the pachinko machine 160 begins at time t1, the voltage of the second normal operating power monitored by the voltage monitoring circuit 354 begins to rise as shown in FIG. 183(d), and the voltage of the second normal operating power monitored by the power outage monitoring board 225 begins to rise as shown in FIG. 183(e). Thereafter, at time t2, the voltage of the second normal operating power monitored by the voltage monitoring circuit 354 becomes +2.1 V or higher as shown in FIG. 183(d). As shown in FIGS. 183(b) and 183(c), at time t2, the first reset signal and second reset signal input to the reset circuit 254 are at a LOW level. At time t2, the main MPU 222 is reset as shown in FIG. 183(a).

When the main MPU 222 is reset, an initialization operation is performed on the main MPU 222, which initializes all registers in the main MPU 222 (internal registers of the main CPU 251 and external registers of the main CPU 251) and all circuits in the main MPU 222. The input and output ports of the main MPU 222 are also cleared. This reduces the possibility of malfunction of peripheral devices connected to the output side of the main MPU 222 (specifically, the first special chart display unit 197a, the second special chart display unit 197b, the first special chart hold display unit 197c, the second special chart hold display unit 197d, the normal chart display unit 198a, the normal chart hold display unit 198b, the special power winning device 192, and the normal power device 194a of the second operating port 194) when the voltage of the second normal operating power supplied to the main power supply control unit 253 increases.

After that, at timing t3, as shown in FIG. 183(d), the voltage of the second normal operating power monitored by the voltage monitoring circuit 354 becomes equal to or higher than the rising detection voltage (+3.1V). In response to this state, the main power supply control unit 253 raises the second reset signal from low to high. As a result, as shown in FIG. 183(c), the second reset signal input to the reset circuit 254 rises from low to high. At timing t3, as shown in FIG. 183(b), the first reset signal input to the reset circuit 254 is low, and therefore the reset of the main MPU 222 is not released, as shown in FIG. 183(a).

After that, at timing t4, as shown in Figure 183(e), the voltage of the second normal operating power monitored by the power outage monitoring board 225 becomes +4.4V or higher. Based on this state, the power outage monitoring board 225 raises the first reset signal from LOW level to HI level. As a result, at timing t4, as shown in Figures 183(b) and 183(c), both the first reset signal and the second reset signal input to the reset circuit 254 rise to HI level. Then, at timing t4, the reset of the main MPU 222 is released. As a result, the power supplied to the main RAM 224 is switched from backup power to second normal operating power. As already explained, when the reset of the main MPU 222 is released, the main reset release process (Figure 182 (b)) is started in the main MPU 222, and the main process (Figure 161) is started, provided that no abnormalities are confirmed in the status confirmation process (step SA501).

When the supply of operating power to the main MPU 222 begins, the reset of the main MPU 222 is released when both of the following conditions are met: the first reset signal input from the power outage monitoring board 225 to the reset circuit 254 is at a high level, and the second reset signal input from the voltage monitoring circuit 354 to the reset circuit 254 is at a high level. As already explained, when the voltage of the second normal operating power supplied to the main power supply control unit 253 is +2.1 V or higher, the main MPU 222 is reset when at least one of the first reset signal and second reset signal input to the reset circuit 254 is at a low level. In these configurations, the voltage (+4.4V) at which the power outage monitoring board 225 raises the first reset signal is set to a higher voltage than the voltage (+4.0V) at which the first reset signal falls, and the voltage (+3.1V) at which the voltage monitoring circuit 354 raises the second reset signal is set to a higher voltage than the voltage (+2.7V) at which the second reset signal falls. This reduces the possibility of the main MPU 222 being reset immediately after the reset of the main MPU 222 is released.

When the voltage of the second normal operating power being monitored by the power outage monitoring board 225 reaches +4.4V or higher, the power outage monitoring board 225 determines that a rise in the second normal operating power has been detected and raises the first reset signal from LOW to HIGH. This allows the main MPU 222 to start main processing (Figure 161) when the second normal operating power being monitored by the power outage monitoring board 225 reaches or exceeds the guaranteed operating voltage (+4.0V) of the main MPU 222. Furthermore, by configuring the main processing (Figure 161) not to start until the voltage of the second normal operating power being monitored by the voltage monitoring circuit 354 reaches or exceeds +3.1V, it is possible to prevent the main CPU 251 from starting operation when the second normal operating power supplied to the voltage monitoring circuit 354 is below the operating voltage (+2.1V) of the main CPU 251.

Next, the resetting of the main MPU 222 based on the first reset signal or second reset signal input to the reset circuit 254 going LOW will be described with reference to the time chart in Figure 184. Figure 184(a) shows the state in which the main MPU 222 is being reset, Figure 184(b) shows the period during which power outage processing is executed by the main MPU 222, Figure 184(c) shows the timing at which a voltage drop in the first normal operating power monitored by the power outage monitoring board 225 is detected, Figure 184(d) shows the voltage of the second normal operating power monitored by the voltage monitoring circuit 354, Figure 184(e) shows the state of the power outage signal input to the main CPU 251, Figure 184(f) shows the state of the first reset signal input to the reset circuit 254, and Figure 184(g) shows the state of the second reset signal input to the reset circuit 254.

First, we will explain how the main MPU 222 is reset when the first reset signal input to the reset circuit 254 goes low.

At timing t1, as shown in Figures 184(f) and 184(g), a HIGH-level first reset signal and a HIGH-level second reset signal are input to the reset circuit 254. At timing t1, if the state in which the maximum voltage (+24 V) is not detected in the voltage of the first normal operating power monitored by the power outage monitoring board 225 reaches the power outage reference period (4 milliseconds) as shown in Figure 184(c), i.e., if a voltage drop in the first normal operating power monitored by the power outage monitoring board 225 is detected, then the power outage signal input to the main CPU 251 falls from HIGH to LOW as shown in Figure 184(e).

After that, at timing t2, power outage processing is initiated in the main MPU 222 as shown in Figure 184(b). After that, at timing t3, the voltage of the second normal operating power monitored by the power outage monitoring board 225 begins to drop from +5.0 V as shown in Figure 184(d). After that, at timing t4, when the reset delay period (6 milliseconds) has elapsed since timing t1, the power outage monitoring board 225 switches the first reset signal from HI level to LOW level. This causes the first reset signal input to the reset circuit 254 to fall as shown in Figure 184(f), and the main MPU 222 enters a reset state as shown in Figure 184(a).

After that, as shown in FIG. 184(d), at timing t5 when the voltage of the second normal operating power monitored by the voltage monitoring circuit 354 falls below the falling detection voltage (specifically, +2.7 V), the voltage monitoring circuit 354 drops the second reset signal from HI level to LOW level. As a result, as shown in FIG. 184(g), the second reset signal input to the reset circuit 254 falls from HI level to LOW level.

In this way, when the first reset signal, of the first and second reset signals input to the reset circuit 254, goes low, the main MPU 222 is reset, even if the second reset signal is maintained at high. The timing (t4) at which the power outage monitoring board 225 drops the first reset signal occurs before the timing (t5) at which the voltage monitoring circuit 354 drops the second reset signal. Therefore, if no circuit abnormality occurs, the main MPU 222 can be reset based on the detection of the falling edge of the first reset signal input to the reset circuit 254.

Next, we will explain how the main MPU 222 is reset when the second reset signal input to the reset circuit 254 goes low.

At timing t6, as shown in Figures 184(f) and 184(g), a HIGH level first reset signal and a HIGH level second reset signal are input to the reset circuit 254. At timing t6, if the state in which the maximum voltage (+24V) is not detected in the voltage of the first normal operating power monitored by the power outage monitoring board 225 reaches the power outage reference period as shown in Figure 184(c), i.e., if a voltage drop in the first normal operating power monitored by the power outage monitoring board 225 is detected, then the power outage signal input to the main CPU 251 is lowered from HIGH level to LOW level as shown in Figure 184(e).

After that, at timing t7, the main MPU 222 executes power outage processing as shown in Figure 184(b). After that, at timing t8, the voltage of the second normal operating power monitored by the voltage monitoring circuit 354 begins to drop as shown in Figure 184(d). After that, when the reset delay period (6 milliseconds) has elapsed from timing t6, the power outage monitoring board 225 switches the first reset signal from HI level to LOW level. However, if a circuit abnormality occurs, a delay period occurs between the time the power outage monitoring board 225 lowers the first reset signal and the time the first reset signal input to the reset circuit 254 falls.

After that, as shown in FIG. 184(d), at timing t9 when the voltage of the second normal operating power monitored by the voltage monitoring circuit 354 falls below the falling detection voltage (specifically, +2.7 V), the voltage monitoring circuit 354 drops the second reset signal from HI level to LOW level. As a result, as shown in FIG. 184(g), the second reset signal input to the reset circuit 254 goes LOW level, and the main MPU 222 enters a reset state as shown in FIG. 184(a).

In this way, if a circuit abnormality occurs after the power outage monitoring board 225 has performed the operation of lowering the first reset signal, the falling edge of the first reset signal input to the reset circuit 254 may be delayed. In contrast, by configuring the voltage monitoring circuit 354 to lower the second reset signal, a reset of the main MPU 222 can be generated based on the falling edge of the second reset signal input to the reset circuit 254, even if there is a delay in the falling edge of the first reset signal input to the reset circuit 254.

As described above, the timing at which the power outage monitoring board 225 performs the operation to lower the first reset signal (the timing after the reset delay period has elapsed from timing t6) is earlier than the timing at which the voltage monitoring circuit 354 performs the operation to lower the second reset signal (timing t9), whether the voltage drop is due to a voltage drop in the first normal operating power monitored by the power outage monitoring board 225 or a voltage drop in the second normal operating power monitored by the power outage monitoring board 225. However, if a circuit abnormality occurs that delays the falling edge of the first reset signal input to the reset circuit 254, the timing at which the falling edge of the second reset signal is detected (timing t9) is earlier than the timing at which the falling edge of the first reset signal is detected by the reset circuit 254.

In either case, when the reset circuit 254 resets the main MPU 222 based on the first reset signal going low, or when the reset circuit 254 resets the main MPU 222 based on the second reset signal going low, the main MPU 222 is reset while the voltage of the second normal operating power supplied to the main power supply control unit 253 does not fall below the operating voltage (+2.1 V) of the main CPU 251. This allows the operation of the main CPU 251 to be stopped normally, regardless of whether or not the above-mentioned circuit abnormality occurs.

When the supply of operating power to the pachinko machine 160 is stopped, the power outage monitoring board 225 first detects that the maximum voltage (+24V) of the monitored first normal operating power has not been detected for the power outage reference period, and then the power outage signal is turned off. There is a predetermined time lag (e.g., 10 milliseconds) between the time this state is reached and the time the voltage of the monitored second normal operating power falls below the first reset reference voltage (+4.0V). If no circuit abnormalities or the like occur after the power outage monitoring board 225 turns off the power outage signal, the main MPU 222 executes power outage processing before the predetermined time lag has elapsed. As a result, if no circuit abnormalities or the like occur, the main MPU 222 can execute power outage processing while the second normal operating power supplied to the main power supply control unit 253 is equal to or higher than the guaranteed operating voltage (+4.0V) of the main MPU 222.

In the power outage monitoring board 225, the reset delay period from when the power outage signal falls until when the first reset signal falls is set to a period shorter than the specified time lag described above. As a result, if no circuit abnormality occurs, the power outage monitoring board 225 can ensure that the first reset signal falls before the second normal operating power it is monitoring falls below the guaranteed operating voltage (+4.0 V) of the main MPU 222.

As already explained, power outage processing involves clearing to "0" the registers in which data output from the output ports of the main MPU 222 is set (the first output data register, second output data register, and output destination selection register of the monitoring and control register group 257). Furthermore, when the main MPU 222 is reset based on at least one of the first reset signal and second reset signal input to the reset circuit 254 going LOW, an initialization operation of the main MPU 222 is performed and the output ports of the main MPU 222 are cleared. This reduces the possibility of malfunctioning of peripheral devices connected to the output side of the main MPU 222, even if the operation of the main MPU 222 stops without executing either the power outage processing or the reset of the main MPU 222.

<Configuration of dispensing control device 217>
Next, the configuration of the dispensing control device 217 will be described. As already explained with reference to FIG. 157, the dispensing control device 217 is provided with a dispensing control board 259, on which a dispensing control board 259 is mounted. The dispensing MPU 261 is provided with a dispensing CPU 262, and a dispensing ROM 263 and a dispensing RAM 264 are provided externally to the dispensing CPU 262 in the dispensing MPU 261. The dispensing MPU 261 is provided with a dispensing internal bus (not shown), and the dispensing CPU 262 is connected to the dispensing ROM 263 and the dispensing RAM 264 via the dispensing internal bus. The dispensing ROM 263 stores programs corresponding to the processing executed by the dispensing MPU 261, and the dispensing CPU 262 reads and executes commands set in the programs, thereby executing the processing in the dispensing MPU 261.

Figure 185 is an explanatory diagram illustrating the electrical configuration of the dispensing control board 259. As shown in Figure 185, the dispensing side MPU 261 is provided with a first receiving terminal 361 and a second receiving terminal 362 used for asynchronous serial communication, as well as a dispensing side receiving buffer 363 in which data received at these receiving terminals 361 and 362 is stored. In addition, the dispensing control board 259 is provided with a first receiving corresponding terminal 364 corresponding to the first receiving terminal 361 and a second receiving corresponding terminal 365 corresponding to the second receiving terminal 362.

In the following, in this embodiment and the 19th to 23rd embodiments described below, asynchronous serial communication refers to a communication method in which synchronization is achieved using a start bit and a stop bit set in the data being transmitted and received, without using a clock signal for synchronization. Note that asynchronous serial communication may also be configured to achieve synchronization using only one of the start bit and stop bit set in the data being transmitted and received.

The first receiving terminal 361 is connected to the main MPU 222 via the first receiving terminal 364, and receives various information from the main MPU 222. The second receiving terminal 362 is connected to the management unit 170 via the second receiving terminal 365 and the connection terminal board 255, and receives ball loan information (described below) from the management unit 170. The payout side receiving buffer 363 can store a maximum of 24 bytes of data.

Figure 186(a) is an explanatory diagram illustrating the data that the payout side MPU 261 receives from the main side MPU 222 and the data that the payout side MPU 261 receives from the management unit 170 via asynchronous serial communication. As shown in Figure 186(a), the payout side MPU 261 receives a 1 prize ball command, a 10 prize ball command, a 15 prize ball command, a connection confirmation command for 1 prize ball, a connection confirmation command for 10 prize balls, a connection confirmation command for 15 prize balls, and gaming machine information from the main side MPU 222 at the first receiving terminal 361.

As already explained, in the timer interrupt processing (Figure 167) executed by the main MPU 222, the payout output processing is executed in step S9220. In the payout output processing, if the value of the 1 prize ball counter is 1 or greater, a 1 prize ball command is output to the payout side MPU 261; if the value of the 10 prize ball counter is 1 or greater, a 10 prize ball command is output to the payout side MPU 261; and if the value of the 15 prize ball counter is 1 or greater, a 15 prize ball command is output to the payout side MPU 261.

The signals output from the payout side MPU 261 to the main side MPU 222 include a 1 prize ball corresponding signal, a 10 prize ball corresponding signal, and a 15 prize ball corresponding signal. When the payout side MPU 261 receives an n prize ball command (n is either "1", "10", or "15") from the main side MPU 222, the n prize ball corresponding signal rises from a LOW level to a HIGH level, remains at the HIGH level for 4 milliseconds, and then falls to a LOW level.

In the payout output process (step S9220) executed by the main MPU 222, if the rising edge of the n prize ball corresponding signal is not detected within a specified period (specifically, within 8 milliseconds) after sending the n prize ball command, the payout MPU 261 sends a connection confirmation command for n prize balls. When the payout MPU 261 receives the connection confirmation command for n prize balls, the n prize ball corresponding signal rises from a LOW level to a HIGH level, and after the HIGH level continues for 4 milliseconds, it falls to a LOW level.

In the payout output process (step S9220), if a rising edge of the n-prize-ball-compatible signal is detected within a predetermined period (specifically, within 8 milliseconds) after sending a connection confirmation command for n prize balls, the n-prize-ball command is sent. This allows the n-prize-ball command to be resent if the payout-side MPU 261 confirms that communication between the main-side MPU 222 and the payout-side MPU 261 is normally possible after failing to receive the n-prize-ball command. Furthermore, in the payout output process (step S9220), if a rising edge of the n-prize-ball-compatible signal is not detected within a predetermined period (specifically, within 8 milliseconds) after sending a connection confirmation command for n prize balls, the game stop flag provided in the specific control work area 281 is set to "1," and an abnormality notification command is sent to the sound/light-side MPU 233. Setting the game stop flag to "1" prevents game play from continuing when an abnormality has occurred in the communication path used to pay out n game balls based on the n prize ball command. The abnormality notification command contains information indicating that an abnormality has occurred in the communication path used to pay out n game balls based on the n prize ball command. When the sound/light side MPU 233 receives an abnormality notification command, it controls the display of the pattern display device 199, the light emission of the display light-emitting unit 204, and the sound output of the speaker unit 205 so that an abnormality notification corresponding to the information set in the abnormality notification command is issued.

In the payout output process (step S9220), if it is time to send gaming machine information, the gaming machine information is sent to the payout side MPU 261. The timing for sending gaming machine information occurs at a predetermined cycle (for example, every 300 milliseconds). The gaming machine information includes gaming machine installation information and gaming machine performance information. The gaming machine installation information is stored in the main ROM 223. The gaming machine installation information includes information indicating the type of gaming machine (information indicating that the pachinko machine 160 is a pachinko machine and not a slot machine) and information indicating the unique chip ID assigned to the main MPU 222. In addition, the gaming machine performance information includes base value information stored in the current status area 343, as already explained.

The payout side MPU 261 stores the gaming machine information received from the main side MPU 222 in the payout side RAM 264. Furthermore, when it is time to send a gaming machine information notification, the payout side MPU 261 sends the gaming machine information notification to the management unit 170. The timing for sending the gaming machine information notification occurs at a predetermined cycle (for example, every 300 milliseconds). The gaming machine information notification sent to the management unit 170 is then transmitted from the management unit 170 to the management computer HC (Figure 185). In this way, the gaming machine information notification is transmitted from the payout side MPU 261 via the management unit 170 to the gaming hall's management computer HC (Figure 185). This allows the management computer HC to determine whether or not an illegal board has been used on the pachinko machine 160, and also allows the management computer HC to determine the current base value of the pachinko machine 160.

As shown in Figure 186 (a), the payout side MPU 261 receives ball lending information from the management unit 170 via the second receiving terminal 362. The ball lending information is information indicating that the ball lending button 173 (Figure 153) has been operated. The ball lending information contains information about the number of game balls lent out. When the payout side MPU 261 receives ball lending information, it sends ball lending response information to the management unit 170. If the management unit 170 does not receive ball lending response information within a predetermined period of time (specifically, 150 milliseconds) after sending the ball lending information, it sends ball lending information for connection confirmation to the payout side MPU 261, in which the number of game balls lent out information is set to "0". The payout side MPU 261 also sends ball lending response information to the management unit 170 when it receives the ball lending information for connection confirmation.

If the payout side MPU 261 receives ball loan response information within a predetermined period (150 milliseconds) after sending the ball loan information for connection confirmation, it transmits ball loan information (ball loan information in which numerical information of 1 or more is set as information on the number of loaned game balls) corresponding to the operation of the ball loan button 173 again to the payout side MPU 261. This allows the ball loan information to be resent if the payout side MPU 261 confirms that communication between the management unit 170 and the payout side MPU 261 can be performed normally after failing to receive the ball loan information. If the payout side MPU 261 does not receive ball loan response information within a predetermined period (150 milliseconds) after sending the ball loan information for connection confirmation, it transmits communication error information to the amusement hall's management computer HC. This makes it possible for the amusement hall's management computer HC to identify that an abnormality has occurred in the communication path between the management unit 170 and the payout side MPU 261.

The 1 prize ball command, 10 prize ball command, 15 prize ball command, connection check command for 1 prize ball, connection check command for 10 prize balls, connection check command for 15 prize balls, gaming machine information, and ball lending information each contain one start bit, one stop bit, and multiple data bits. The start bit and stop bit are used for synchronization. The 1 prize ball command, 10 prize ball command, 15 prize ball command, connection check command for 1 prize ball, connection check command for 10 prize balls, and connection check command for 15 prize balls each contain 8 data bits, the ball lending information contains 16 data bits, and the gaming machine information contains 56 data bits.

When a start bit is detected, the first receiving terminal 361 or the second receiving terminal 362 begins receiving data, and the received data is stored in the dispensing-side receiving buffer 363. In asynchronous serial communication, the transmitting side (specifically, the main-side MPU 222 or the management unit 170) transmits information regardless of whether the received information has been read by the receiving side (specifically, the dispensing-side MPU 261). Asynchronous serial communication is performed using a data signal line through which the transmitting side transmits information to the receiving side. No clock signal line is provided for the transmitting side to transmit a clock signal to the receiving side. This reduces the number of signal lines required for communication compared to configurations that use communication methods that require a clock signal line (e.g., synchronous serial communication).

Next, the payout side main processing executed by the payout side MPU 261 will be explained with reference to the flowchart in Figure 186 (b). The payout side MPU 261 is executed when processing to jump to the start address of the payout side main processing is executed in step SA708 of the payout side reset release processing (Figure 187) described below.

First, the dispensing side initial setting process is executed (step SA601). In the dispensing side initial setting process, the registers provided in the dispensing side MPU 261 are initialized. Then, the dispensing side interrupt prohibition process is executed (step SA602). This prohibits the start of the dispensing side timer interrupt process. In the dispensing side main process (Fig. 186 (b)), steps SA603 to SA624 are executed while the start of the dispensing side timer interrupt process is prohibited, and then the start of the dispensing side timer interrupt process is permitted in step SA625. The dispensing side timer interrupt process is repeatedly executed at a relatively short interval (for example, every 4 milliseconds).

After executing the payout-side interrupt prohibition process in step SA602, if a single prize ball command received from the main MPU 222 is stored in the payout-side receive buffer 363 (step SA603: YES), the payout start process for single prize ball is executed (step SA604). In the payout start process for single prize ball, the payout device 216 is controlled to start the payout of one game ball, and the single prize ball command is erased from the payout-side receive buffer 363. Then, the single prize ball corresponding signal is started (step SA605). In this start-up process, the single prize ball corresponding signal output to the main MPU 222 is raised to a HI level. In the payout-side timer interrupt process, the single prize ball corresponding signal is lowered to a LOW level based on the elapsed time of 4 milliseconds since the single prize ball corresponding signal was raised to a HI level.

If a negative judgment is made in step SA603, or if step SA605 is processed, it is determined whether the 10 prize ball command received from the main MPU 222 is stored in the payout side receive buffer 363 (step SA606). If the 10 prize ball command is stored (step SA606: YES), a payout start process for 10 prize balls is executed (step SA607). In the payout start process for 10 prize balls, the payout device 216 is controlled to start the payout of 10 game balls, and the 10 prize ball command is erased from the payout side receive buffer 363. Then, a process to start the 10 prize ball corresponding signal is executed (step SA608). In this start-up process, the 10 prize ball corresponding signal output to the main MPU 222 is raised to a HI level. In the payout timer interrupt process, the 10 prize ball corresponding signal is lowered to a LOW level after 4 milliseconds have passed since the signal was raised to a HIGH level.

If a negative judgment is made in step SA606, or if step SA608 is processed, it is determined whether the 15 prize ball command received from the main MPU 222 is stored in the payout side receive buffer 363 (step SA609). If the 15 prize ball command is stored (step SA609: YES), a payout start process for 15 prize balls is executed (step SA610). In the payout start process for 15 prize balls, the payout device 216 is controlled to start the payout of 15 game balls, and the 15 prize ball command is erased from the payout side receive buffer 363. Then, a process to start the 15 prize ball corresponding signal is executed (step SA611). In this start-up process, the 15 prize ball corresponding signal output to the main MPU 222 is raised to a HI level. In the payout timer interrupt process, the 15-ball prize signal is lowered to a LOW level after 4 milliseconds have passed since the 15-ball prize signal was raised to a HIGH level.

If a negative judgment is made in step SA609 or if the processing of step SA612 is performed, it is determined whether any of the connection confirmation commands for 1 prize ball, 10 prize balls, and 15 prize balls received from the main MPU 222 is stored in the payout side receive buffer 363 (step SA612). If any of the connection confirmation commands is stored in the payout side receive buffer 363 (step SA612: YES), a prize ball corresponding signal setting process is executed (step SA613). In this setting process, if a connection confirmation command for n prize balls (n is one of "1," "10," and "15") is received, the n prize ball corresponding signal output to the main MPU 222 is raised to the HI level, and the connection confirmation command for n prize balls is erased from the payout side receive buffer 363. In the payout timer interrupt process, when 4 milliseconds have passed since the n-ball prize signal was raised to HI level, the process of lowering the n-ball prize signal to LOW level is executed.

If a negative determination is made in step SA612, or if step SA613 is processed, it is determined whether the gaming machine information received from the main MPU 222 is stored in the payout side receive buffer 363 (step SA614), and if the gaming machine information is stored in the payout side receive buffer 363 (step SA614: YES), a gaming machine information setting process is executed (step SA615). In the gaming machine information setting process, the gaming machine information is stored in the payout side RAM 264, and the gaming machine information stored in the payout side receive buffer 363 is erased.

If the gaming machine information is not stored in the payout side receiving buffer 363 (step SA614: NO), it is determined whether the state in which gaming machine information has not been received from the main MPU 222 has continued for three seconds or more (step SA616). If a positive determination is made in step SA616, gaming machine information reception abnormality information is set in the gaming machine information notification to be sent to the management unit 170 (step SA617).

If step SA615 is processed, if a negative determination is made in step SA616, or if step SA617 is processed, it is determined whether it is time to send a gaming machine information notification (step SA618). As already explained, the timing to send a gaming machine information notification occurs at a cycle of 300 milliseconds. If it is time to send a gaming machine information notification (step SA618: YES), a gaming machine information notification sending process is executed (step SA619). In this sending process, a gaming machine information notification including the gaming machine information stored in the payout side RAM 264 is sent to the management unit 170.

If a negative judgment is made in step SA618 or if step SA619 is processed, it is determined whether the ball loan information received from the management unit 170 is stored in the payout side receive buffer 363 (step SA620). If the ball loan information is stored in the payout side receive buffer 363 (step SA620: YES), a ball loan response process is executed (step SA621). In the ball loan response process, the ball loan response information is sent to the management unit 170. Then, if the loaned number information for game balls set in the received ball loan information is 1 or greater (step SA622: YES), a ball loan start process is executed (step SA623). In the ball loan start process, the payout device 216 is controlled to start lending the number of game balls set in the ball loan information. If a negative judgment is made in step SA622 or if step SA623 is processed, the ball loan information stored in the payout side receive buffer 363 is erased (step SA624).

If a negative determination is made in step SA620, or if step SA624 is performed, the payout side interrupt permission process is executed (step SA625). This allows the payout side timer interrupt process to be started. Then, the process proceeds to step SA602, and steps SA602 to SA625 are repeated.

In this way, when data received from the main MPU 222 or management unit 170 is stored in the dispensing side receiving buffer 363, the dispensing side MPU 261 executes the processing corresponding to the data and then erases the data from the dispensing side receiving buffer 363. This prevents the data volume stored in the dispensing side receiving buffer 363 from reaching the dispensing abnormality standard amount (20 bytes) described below.

Next, we will explain the configuration for generating a reset of the dispensing side MPU 261.

As shown in FIG. 185, the dispensing control device 217 is provided with a dispensing-side power outage monitoring board 366. The dispensing-side power outage monitoring board 366 relays between the dispensing control board 259 and the power supply/launching control device 218. A fifth electrical wiring EL5 is provided for supplying a second normal operating power of +5.0 V from the power supply/launching control device 218 to the dispensing-side power outage monitoring board 366, and a sixth electrical wiring EL6 is provided for supplying the second normal operating power from the dispensing-side power outage monitoring board 366 to the dispensing control device 217. The second normal operating power is supplied from the power supply/launching control device 218 to the dispensing control device 217 via the dispensing-side power outage monitoring board 366 when power is being supplied to the power supply/launching control device 218 from an external 24 V AC power source. In addition, a seventh electrical wiring EL7 is provided for supplying +5.0 V backup power from the power supply/launching control device 218 to the dispensing control device 217. Backup power is supplied from the power supply/launch control device 218 to the dispensing control device 217 in a situation where the power supply from the external 24V AC power source to the power supply/launch control device 218 is stopped.

The dispensing control device 217 is provided with a fifth signal line SG5 for outputting a dispensing side reset signal from the dispensing side power failure monitoring board 366 to the dispensing side MPU 261. The dispensing side power failure monitoring board 366 is connected to the input side of the dispensing side MPU 261, and the dispensing side reset signal output from the dispensing side power failure monitoring board 366 is input to the dispensing side MPU 261. The dispensing side power failure monitoring board 366 monitors the voltage of the second normal operating power (+5.0 V) supplied from the power supply/launch control device 218, and lowers the dispensing side reset signal from HI level to LOW level when the voltage of the second normal operating power falls below the dispensing side reset falling detection voltage (specifically, +4.0 V). When the dispensing side MPU 261 detects a falling edge of the dispensing side reset signal input to the dispensing side MPU 261, the dispensing side MPU 261 is reset.

As shown in FIG. 185, the dispensing side MPU 261 is provided with a dispensing side out-of-area travel prohibition circuit 367. The dispensing side out-of-area travel prohibition circuit 367 is a circuit that resets the dispensing side MPU 261 when the address of the program being executed by the program counter of the dispensing side MPU 261 is outside the address range specified in the design stage of the dispensing side ROM 263 (the address range in which the program corresponding to the processing executed by the dispensing side MPU 261 is set), i.e., when travel outside the designated area occurs in the dispensing side MPU 261.

As such, in addition to the reset factor of the dispensing side MPU 261 being caused by the detection of a falling edge of the dispensing side reset signal input to the dispensing side MPU 261, there is also a reset factor caused by the dispensing side MPU 261 traveling outside the designated area.

When the dispensing side MPU 261 is reset based on the occurrence of driving outside the designated area in the dispensing side MPU 261, the program counter of the dispensing side MPU 261 is initialized, thereby resolving the state in which driving outside the designated area has occurred. In addition, in this case, the voltage of the dispensing side reset signal input to the dispensing side MPU 261 is maintained at a HI level. Therefore, when the dispensing side MPU 261 is reset, the reset factor no longer exists, and the reset release condition of no reset factor occurring is met.

When the dispensing side MPU 261 is reset based on the detection of a falling edge of the dispensing side reset signal, the data stored in the dispensing side receive buffer 363 is erased. This prevents processing corresponding to data received from the main side MPU 222 or management unit 170 and stored in the dispensing side receive buffer 363 before the falling edge of the dispensing side reset signal is detected from being executed after the reset is released.

When the dispensing side MPU 261 is reset because the dispensing side MPU 261 has detected a state in which the vehicle has traveled outside the designated area, the data stored in the dispensing side receive buffer 363 is maintained. This allows the processing corresponding to the data received from the main side MPU 222 or management unit 170 and stored in the dispensing side receive buffer 363 before the dispensing side MPU 261 detected a state in which the vehicle has traveled outside the designated area to be executed after the reset is released.

Next, the dispensing side reset release process executed by the dispensing side MPU 261 when the dispensing side MPU 261 is released from reset will be explained with reference to the flowchart in Figure 187. By resetting the dispensing side MPU 261, even if a rising or falling edge occurs in the signal input to the first receiving terminal 361 or the second receiving terminal 362, data is not stored in the dispensing side receiving buffer 363, i.e., data reception at the first receiving terminal 361 and the second receiving terminal 362 is prohibited. The dispensing side reset release process is started in a state in which data reception at the first receiving terminal 361 and the second receiving terminal 362 is prohibited.

First, the dispensing status confirmation process is executed (step SA701). The dispensing status confirmation process includes processing to confirm that no abnormalities have occurred in the programs set in the dispensing side ROM 263 and processing to confirm that no abnormalities have been detected in the circuitry built into the dispensing side MPU 261.

If no abnormality is identified in the dispensing status confirmation process (step SA701) (step SA702: NO), the dispensing reception permission process is executed to store data received at the first receiving terminal 361 or the second receiving terminal 362 from the time the start bit is detected until the stop bit is detected in the dispensing side receiving buffer 363, i.e., data can be received at the first receiving terminal 361 or the second receiving terminal 362 (step SA703). However, because the dispensing control board 259 is equipped with a reception restriction circuit 371 (described below), data received from the main side MPU 222 or management unit 170 will not be stored in the dispensing side receiving buffer 363 until the reset response signal is activated in step SA707.

If a circuit abnormality occurs near the first receiving terminal 361 or the second receiving terminal 362, causing the signal input to the first receiving terminal 361 or the second receiving terminal 362 to repeatedly rise and fall, step SA703 is executed, making the first receiving terminal 361 or the second receiving terminal 362 able to receive data, thereby increasing the amount of data stored in the payout receiving buffer 363. Details of circuit abnormalities occurring near the first receiving terminal 361 or the second receiving terminal 362 will be discussed later.

Then, a dispensing side release waiting period (specifically, one second) is set in a timer circuit (not shown) provided in the dispensing side MPU 261 (step SA704), and it is determined whether the dispensing side release waiting period has elapsed (step SA705). If the dispensing side release waiting period has not elapsed (step SA705: NO), the determination process of step SA705 is repeated until the dispensing side release waiting period has elapsed.

If the payout-side release waiting period has elapsed (step SA705: YES), it is determined whether the data volume of the information stored in the payout-side receiving buffer 363 is equal to or greater than the payout-side abnormality reference amount (specifically, 20 bytes) (step SA706). If a circuit abnormality has occurred near the first receiving terminal 361 or the second receiving terminal 362, the data volume of the data stored in the payout-side receiving buffer 363 may increase during the payout-side release waiting period (1 second), and the data volume may exceed the payout-side abnormality reference amount. In this case, a positive determination is made in step SA706.

As already explained, when the dispensing side MPU 261 is reset based on the occurrence of driving outside the designated area in the dispensing side MPU 261, the dispensing side reset release process (Figure 187) is executed with the data received before the driving outside the designated area occurred stored in the dispensing side receive buffer 363. Also, as already explained, when the dispensing side main process (Figure 186 (b)) is being executed, the data volume stored in the dispensing side receive buffer 363 does not reach the dispensing side abnormality standard amount (20 bytes). Furthermore, as already explained, even after the process of step SA703 is executed and the first receive terminal 361 or the second receive terminal 362 is ready to receive data, data received from the main side MPU 222 or management unit 170 will not be stored in the dispensing side receive buffer 363 until the process of starting the reset response signal is executed in step SA707. This prevents the data volume of the information stored in the dispensing side receiving buffer 363 from being determined to be equal to or greater than the dispensing side abnormality reference amount (specifically, 20 bytes) in step SA706, even if no circuit abnormality has occurred near the first receiving terminal 361 or the second receiving terminal 362.

If the data volume of the information stored in the dispensing side receiving buffer 363 is less than the dispensing side abnormality reference amount (step SA706: NO), the reset response signal raising process is executed, raising the reset response signal output from the reset response output terminal 368 (Fig. 185) provided on the dispensing side MPU 261 from LOW level to HIGH level (step SA707). This enables the first receiving terminal 361 to receive information output from the main side MPU 222, and the second receiving terminal 362 to receive information output from the management unit 170. Details of the reset response output terminal 368 and the reset response signal will be provided later.

Then, a jump is made to the start address of the payout side main processing (step SA708). This starts the payout side main processing (Figure 186 (b)). The contents of the payout side main processing have already been explained with reference to the flowchart in Figure 186 (b).

If an abnormality is detected during the dispensing side status confirmation process (step SA702: YES), or if the data volume of information stored in the dispensing side receiving buffer 363 is equal to or greater than the dispensing side abnormality reference amount (step SA706: YES), dispensing side execution stop processing is executed (step SA709). The dispensing side execution stop processing executes processing to stop the operation of the dispensing side MPU 261. This prevents the dispensing side main processing from being executed without resolving the abnormality if an abnormality is detected when the dispensing side MPU 261 is released from reset.

If a circuit abnormality occurs near the first receiving terminal 361 or the second receiving terminal 362, causing the signal input to the first receiving terminal 361 or the second receiving terminal 362 to repeatedly rise and fall, data that has not been output from the main MPU 222 and the management unit 170 will be written to the dispensing side receiving buffer 363. In contrast, if the data volume of information stored in the dispensing side receiving buffer 363 reaches or exceeds the dispensing side abnormality threshold before the determination process of step SA706 is executed, a dispensing side execution stop process (step SA709) is executed, and the dispensing side main process will not be executed even if the reset release condition of the dispensing side MPU 261 is met. This prevents the dispensing side main process from being started before the abnormal condition is resolved when an abnormal condition occurs in which abnormal data is stored in the dispensing side receiving buffer 363 due to a circuit abnormality. This prevents an abnormal number of gaming balls from being paid out, an abnormal number of gaming balls from being loaned out, and abnormal gaming machine information from being sent to the management unit 170.

By providing a dispensing-side release waiting period (1 second), the likelihood of a positive determination being made in step SA706 is increased if a circuit abnormality occurs near the first receiving terminal 361 or the second receiving terminal 362. This reduces the likelihood that the dispensing-side main process (Figure 186 (b)) will be started when a circuit abnormality occurs near the first receiving terminal 361 or the second receiving terminal 362.

Next, we will explain the configuration for preventing data sent from the main MPU 222 or management unit 170 from being stored in the dispensing side receive buffer 363 during the dispensing side release standby period. As already explained, the dispensing side release standby period is a one-second period that is set after the dispensing side receive permission process (step SA703) is executed and the first receive terminal 361 or second receive terminal 362 becomes capable of receiving data.

When the payout side reset release process (Fig. 187) is executed after the supply of operating power to the pachinko machine 160 has started, the data volume stored in the payout side receive buffer 363 in step SA706 will not be determined to be equal to or greater than the payout side abnormality standard amount due to data received from the main side MPU 222 or management unit 170 being stored in the payout side receive buffer 363.

As already explained, the transmitting side in asynchronous serial communication (specifically, the main MPU 222 or management unit 170) transmits information regardless of whether the received information has been read by the receiving side (specifically, the payout MPU 261). Therefore, if the payout MPU 261 is reset based on the occurrence of driving outside the designated area in the payout MPU 261 and then the payout reset release process (Fig. 187) is executed, there is a possibility that data will be transmitted from the main MPU 222 or management unit 170 to the payout MPU 261 via asynchronous serial communication. For example, if three sets of gaming machine information (58 bits) transmitted from the main MPU 222 at 300 millisecond intervals are stored in the payout receive buffer 363, the data volume stored in the payout receive buffer 363 will exceed the payout abnormality standard amount even if the payout reset release process (Fig. 187) is initiated with no data stored in the payout receive buffer 363. If the data volume stored in the dispensing side receive buffer 363 at the end of the dispensing side release standby period exceeds the dispensing side abnormality reference amount, the dispensing side main process (FIG. 186(b)) will not be executed, and the dispensing side execution stop process (step SA709) will be executed. In contrast, in this embodiment, a receive restriction circuit 371 (FIG. 185) is provided in the dispensing control board 259 to prevent data sent from the main side MPU 222 or management unit 170 from being stored in the dispensing side receive buffer 363 during the dispensing side release standby period.

As shown in FIG. 185, the dispensing side MPU 261 is provided with a reset response output terminal 368 for outputting a reset response signal. The reset response signal output from the reset response output terminal 368 goes LOW when the dispensing side MPU 261 is reset. The LOW level of the reset response signal is maintained until the reset response signal is raised to HIGH level when the reset response signal raising process is executed in step SA707 of the dispensing side reset release process (FIG. 187). Furthermore, the HIGH level of the reset response signal is maintained until the dispensing side MPU 261 is reset after the reset response signal raising process (step SA707) is executed.

The receiving restriction circuit 371 includes a logic IC 372 mounted on the dispensing control board 259. The logic IC 372 is an electronic component incorporating a first logic circuit 373 and a second logic circuit 374. The first logic circuit 373 and the second logic circuit 374 are equivalent circuits of a NAND circuit. The first logic circuit 373 includes a 21st input terminal 373a, a 22nd input terminal 373b, and a 21st output terminal 373c, and the second logic circuit 374 includes a 31st input terminal 374a, a 32nd input terminal 374b, and a 31st output terminal 374c. When a high-level signal (a signal corresponding to "1") is input to both of the two input terminals 373a, 373b, 374a, 374b, the logic circuits 373, 374 output a low-level signal (a signal corresponding to "0") from the output terminals 373c, 374c, and when a low-level signal is input to at least one of the two input terminals 373a, 373b, 374a, 374b, the logic circuits 373, 374 output a high-level signal from the output terminals 373c, 374c. Note that the first logic circuit 373 and the second logic circuit 374 may also be configured as NAND circuits.

When logic circuits 373 and 374 recognize that a LOW level signal is being input to input terminals 373a, 373b, 374a, and 374b of the logic circuits 373 and 374, and the voltage of the signal being input to input terminals 373a, 373b, 374a, and 374b exceeds a first reference voltage (specifically, +1.8V), the logic circuits 373 and 374 recognize that the signal being input to input terminals 373a, 373b, 374a, and 374b has changed to a HIGH level. Furthermore, when the logic circuits 373 and 374 recognize that a HIGH level signal is being input to the input terminals 373a, 373b, 374a, and 374b, and the voltage of the signal being input to the input terminals 373a, 373b, 374a, and 374b falls below the second reference voltage (specifically, +0.9 V), the logic circuits 373 and 374 recognize that the signal being input to the input terminals 373a, 373b, 374a, and 374b has changed to a LOW level. Since the first reference voltage is set to a voltage higher than the second reference voltage, the possibility that the logic circuits 373 and 374 will mistakenly recognize that a LOW level signal is being input to the input terminals 373a, 373b, 374a, and 374b due to the influence of noise is reduced when a HIGH level signal is being input to the input terminals 373a, 373b, 374a, and 374b of the logic circuits 373 and 374. Furthermore, by setting the second reference voltage to a voltage lower than the first reference voltage, when a low-level signal is input to the input terminals 373a, 373b, 374a, and 374b of the logic circuits 373 and 374, the possibility of the logic circuits 373 and 374 being affected by noise and mistakenly determining that a high-level signal is being input to the input terminals 373a, 373b, 374a, and 374b is being input is reduced.

As shown in FIG. 185, the 21st input terminal 373a of the first logic circuit 373 is electrically connected to the first receive-corresponding terminal 364, and the 22nd input terminal 373b is electrically connected to the reset-corresponding output terminal 368. In addition, the 21st output terminal 373c of the first logic circuit 373 is electrically connected to the first receive terminal 361 of the dispensing side MPU 261.

As described above, the reset response signal output from the reset response output terminal 368 becomes HIGH after the reset response signal raising process (step SA707) is executed. Therefore, when the dispensing side MPU 261 has not been reset, the state of the signal output from the first logic circuit 373 to the first receiving terminal 361 can be made to change depending on the state of the signal input from the first receiving response terminal 364 to the first logic circuit 373. Specifically, when the signal input from the first receiving response terminal 364 to the first logic circuit 373 becomes HIGH, the signal output from the first logic circuit 373 to the first receiving terminal 361 becomes LOW, and when the signal input from the first receiving response terminal 364 to the first logic circuit 373 becomes LOW, the signal output from the first logic circuit 373 to the first receiving terminal 361 becomes HI.

In this way, when the signal input from the reset-compatible output terminal 368 to the first logic circuit 373 is fixed at a HI level, a signal in a state inverted from the signal input from the first receive-compatible terminal 364 to the first logic circuit 373 is output from the first logic circuit 373 to the first receive terminal 361.

As described above, the reset response signal is at a LOW level during the dispensing-side release standby period. Therefore, during the dispensing-side release standby period, the signal output from the first logic circuit 373 to the first receiving terminal 361 can be fixed at a LOW level, regardless of the state of the signal input from the first receiving response terminal 364 to the first logic circuit 373. This prevents the level of the signal input to the first receiving terminal 361 from changing during the dispensing-side release standby period.

As shown in FIG. 185, the 31st input terminal 374a of the second logic circuit 374 is electrically connected to the second receive-corresponding terminal 365, and the 32nd input terminal 374b is electrically connected to the reset-corresponding output terminal 368. In addition, the 31st output terminal 374c of the second logic circuit 374 is electrically connected to the second receive terminal 362 of the dispensing side MPU 261.

As described above, the reset response signal output from the reset response output terminal 368 becomes HIGH after the reset response signal raising process (step SA707) is executed. Therefore, when the dispensing side MPU 261 has not been reset, the state of the signal output from the second logic circuit 374 to the second receiving terminal 362 can be changed depending on the state of the signal input from the second receiving response terminal 365 to the second logic circuit 374. Specifically, when the signal input from the second receiving response terminal 365 to the second logic circuit 374 becomes HIGH, the signal output from the second logic circuit 374 to the second receiving terminal 362 becomes LOW, and when the signal input from the second receiving response terminal 365 to the second logic circuit 374 becomes LOW, the signal output from the second logic circuit 374 to the second receiving terminal 362 becomes HIGH.

In this way, when the signal input from the reset-compatible output terminal 368 to the second logic circuit 374 is fixed at a HI level, a signal in a state inverted from the signal input from the second receive-compatible terminal 365 to the second logic circuit 374 is output from the second logic circuit 374 to the second receive terminal 362.

As described above, the reset response signal is at a LOW level during the dispensing-side release standby period. Therefore, during the dispensing-side release standby period, the signal output from the second logic circuit 374 to the second receiving terminal 362 can be fixed at a LOW level, regardless of the state of the signal input from the second receiving response terminal 365 to the second logic circuit 374. This prevents the level of the signal input to the second receiving terminal 362 from changing during the dispensing-side release standby period.

As shown in FIG. 185, the dispensing control board 259 is provided with a dispensing side first signal wiring SG11 that connects the reset-compatible output terminal 368 with the 22nd input terminal 373b of the first logic circuit 373 and the 32nd input terminal 374b of the second logic circuit 374, and the dispensing side first signal wiring SG11 is pulled up to +5.0 V via the first electrical resistor 375. Therefore, when the level of the signal output from the reset-compatible output terminal 368 is HI level, the voltage of the signal input to the 22nd input terminal 373b of the first logic circuit 373 and the 32nd input terminal 374b of the second logic circuit 374 that are connected to the reset-compatible output terminal 368 becomes +5.0 V (HI level). Incidentally, when the level of the signal output from the reset-compatible output terminal 368 is LOW, the level of the signal input to the 22nd input terminal 373b of the first logic circuit 373 and the 32nd input terminal 374b of the second logic circuit 374, which are connected to the reset-compatible output terminal 368, will be LOW (+0.4V or less).

The dispensing control board 259 is provided with a dispensing-side second signal wiring SG12 that connects the 21st output terminal 373c of the first logic circuit 373 to the first receiving terminal 361, and a dispensing-side third signal wiring SG13 that connects the 31st output terminal 374c of the second logic circuit 374 to the second receiving terminal 362. Because the dispensing-side second signal wiring SG12 is pulled up to +5.0 V via the second electrical resistor 376, when the signal output from the 21st output terminal 373c of the first logic circuit 373 is HIGH, the voltage of the signal input to the first receiving terminal 361 is +5.0 V (HIGH). Incidentally, when the signal output from the 21st output terminal 373c of the first logic circuit 373 is LOW, the signal input to the first receiving terminal 361 is LOW (+0.4 V or less). Furthermore, because the dispensing-side third signal wiring SG13 is pulled up to +5.0 V via the third electrical resistor 377, when the signal output from the 31st output terminal 374c of the second logic circuit 374 is at a high level, the voltage of the signal input to the second receiving terminal 362 is +5.0 V (high level). Incidentally, when the signal output from the 31st output terminal 374c of the second logic circuit 374 is at a low level, the level of the signal input to the second receiving terminal 362 is at a low level (+0.4 V or less).

Next, we will explain a state in which a circuit abnormality occurs near the first receiving terminal 361 or the second receiving terminal 362. If a poor contact occurs in the 21st output terminal 373c of the first logic circuit 373, there is a risk that rising and falling edges will occur in the signal input from the 21st output terminal 373c to the first receiving terminal 361, even if the state of the signal input to the input terminals 373a and 373b of the first logic circuit 373 does not change. Furthermore, if a poor contact occurs in the 31st output terminal 374c of the second logic circuit 374, there is a risk that rising and falling edges will occur in the signal input from the 31st output terminal 374c to the second receiving terminal 362, even if the state of the signal input to the input terminals 374a and 374b of the second logic circuit 374 does not change.

As such, if a circuit abnormality occurs near the first receiving terminal 361 or the second receiving terminal 362, there is a risk that data not transmitted from the main MPU 222 or management unit 170 will be stored in the payout side receiving buffer 363. In response to this, the payout side reset release process (FIG. 187) is configured to execute the payout side execution stop process (step SA709) if the data volume stored in the payout side receiving buffer 363 at the end of the payout side release waiting period is equal to or greater than the payout side abnormality standard amount. This prevents an abnormal number of game balls from being paid out, an abnormal number of game balls from being loaned out, and abnormal game machine information from being transmitted to the management unit 170 based on data not transmitted from the main MPU 222 or management unit 170.

If the n-prize-ball command (n is one of "1," "10," or "15") sent from the main MPU 222 during the payout-side release waiting period is not stored in the payout-side receiving buffer 363, the main MPU 222 will not detect the rising edge of the n-prize-ball compatible signal. In this case, after the payout-side release waiting period ends, the main MPU 222 will send a connection confirmation command for n prize balls, and this connection confirmation command for n prize balls will be stored in the payout-side receiving buffer 363. The payout-side MPU 261 can then cause the main MPU 222 to resend the n-prize-ball command by raising the n-prize-ball compatible signal. This prevents a situation in which game balls are not paid out based on the n-prize-ball command due to the failure to receive the n-prize-ball command during the payout-side release waiting period.

If the ball loan information sent from the management unit 170 during the payout side release waiting period is not stored in the payout side receive buffer 363, the ball loan response information will not be received by the management unit 170. In this case, after the payout side release waiting period ends, the management unit 170 will send ball loan information for connection confirmation, and the ball loan information for connection confirmation will be stored in the payout side receive buffer 363. The payout side MPU 261 then sends ball loan response information to the management unit 170, which allows the management unit 170 to resend ball loan information with a numerical value of 1 or more set as the number of loaned game balls information. This prevents a situation where game balls are not loaned out based on the operation of the ball loan button 173 due to the failure to receive ball loan information during the payout side release waiting period.

Even if gaming machine information sent from the main MPU 222 during the payout side release waiting period is not stored in the payout side receiving buffer 363, unless a state in which gaming machine information is not received from the main MPU 222 continues for three seconds or more while the payout side main process (Figure 186 (b)) is being executed, gaming machine information reception abnormality information will not be set in the gaming machine information notification. This prevents gaming machine information reception abnormality information from being set in the gaming machine information notification due to a failure to receive gaming machine information during the payout side release waiting period.

Next, we will explain, with reference to the time chart in Figure 188, how the payout side MPU 261 enters a stopped state after the reset release condition of the payout side MPU 261 is met, and how reception of gaming machine information transmitted from the main side MPU 222 during the payout side release waiting period is avoided. FIG. 188(a) shows the state of the signal input to the first receiving terminal 361, FIG. 188(b) shows the state of the signal output from the first logic circuit 373 to the first receiving terminal 361, FIG. 188(c) shows the state of the signal input from the first reception-compatible terminal 364 to the first logic circuit 373, FIG. 188(d) shows the state of the signal input from the reset-compatible output terminal 368 to the first logic circuit 373, FIG. 188(e) shows the period during which gaming machine information is transmitted from the main MPU 222, FIG. 188(f) shows a state in which the data volume of the data stored in the payout side receiving buffer 363 is equal to or greater than the payout side abnormality reference amount (20 bytes), FIG. 188(g) shows the period during which the payout side MPU 261 is in an operationally suspended state after the reset release condition of the payout side MPU 261 is met, and FIG. 188(h) shows the payout side release standby period.

First, we will explain how the dispensing side MPU 261 enters a stopped state after the reset release conditions for the dispensing side MPU 261 are met.

As previously explained, if a circuit abnormality occurs near the first receiving terminal 361, rising and falling edges of the signal input to the first receiving circuit may occur. After the dispensing side MPU 261 is reset, if the signal input to the first receiving terminal 361 repeatedly rises and falls multiple times from time t1 to time t4, which is the dispensing side release standby period, as shown in FIG. 188(a), the data volume stored in the dispensing side receiving buffer 363 at time t4 exceeds the dispensing side abnormality reference amount (20 bytes or more), as shown in FIG. 188(f). After that, when the dispensing side release standby period elapses at time t5, as shown in FIG. 188(h), the operation of the dispensing side MPU 261 is stopped, as shown in FIG. 188(g). This prevents the dispensing side main process from starting with abnormal data written to the dispensing side receiving buffer 363.

Next, we will explain how, after the payout side MPU 261 is reset based on the occurrence of driving outside the designated area in the payout side MPU 261, reception of gaming machine information transmitted from the main side MPU 222 during the payout side release waiting period is avoided.

After the payout side reception permission process (step SA703) is executed, at timing t6, a payout side release waiting period (1 second) is set, as shown in Figure 188 (h). As shown in Figure 188 (d), the reset response signal input from the reset response output terminal 368 to the first logic circuit 373 is fixed at a LOW level.

After that, as shown in Figure 188 (c), the signal input from the first reception-compatible terminal 364 to the first logic circuit 373 rises from LOW level to HIGH level at timing t7, falls to LOW level at timing t8, and rises to HIGH level at timing t9. However, because the signal input from the reset-compatible output terminal 368 to the first logic circuit 373 is LOW level, the level of the signal output from the first logic circuit 373 to the first reception terminal 361 remains fixed at HIGH level, as shown in Figure 188 (b).

After that, at timing t10, when the payout side release waiting period ends as shown in Figure 188 (h), the reset corresponding signal input from the reset corresponding output terminal 368 to the first logic circuit 373 rises from LOW level to HIGH level as shown in Figure 188 (d). This makes it possible to receive gaming machine information output from the main MPU 222 at the first receiving terminal 361.

In this way, by providing the reception restriction circuit 371, when gaming machine information is sent from the main MPU 222 during the payout side release waiting period, the gaming machine information is prevented from being stored in the payout side receive buffer 363. This prevents the operation of the payout side MPU 261 from being stopped after the reset release condition of the payout side MPU 261 is met, even if no circuit abnormality has occurred.

As described above, gaming machine information (58 bits) is transmitted from the main MPU 222 to the payout MPU 261 at 300 millisecond intervals. Therefore, if the payout MPU 261 is reset based on the occurrence of a game outside the designated area in the payout MPU 261, there is a risk that the amount of information stored in the payout receive buffer 363 during the payout release standby period (1 second) will exceed the payout abnormality standard amount (20 bytes). To address this issue, the payout control board 259 is provided with a reception restriction circuit 371, which prevents information received from the main MPU 222 or management unit 170 from being stored in the payout receive buffer 363 during the payout release standby period. This reduces the possibility that the operation of the payout MPU 261 will be stopped after the reset release condition of the payout MPU 261 is met, even though no circuit abnormality has occurred.

The embodiment described above provides the following excellent effects:

The main MPU 222 is provided with a first register group 265 that is used during specific control processing but not during non-specific control processing, and a second register group 266 that is used during non-specific control processing but not during specific control processing. By using the registers included in the first register group 265 and not using the registers included in the second register group 266 when specific control processing is being executed, it is possible to prevent information used during non-specific control processing from being overwritten when specific control processing is being executed. Furthermore, it is not necessary to save data from the first register group 265 that was used during specific control processing when transitioning from a state in which specific control processing is being executed to a state in which non-specific control processing is being executed, and to restore the saved data to the first register group 265 when returning to a state in which specific control processing is being executed, thereby reducing the data size of the program. By configuring the system to use registers included in the second register group 266 and not use registers included in the first register group 265 when non-specific control processing is being executed, it is possible to prevent information used for specific control processing from being overwritten when non-specific control processing is being executed. Furthermore, it is not necessary to save the data in the second register group 266 used in the non-specific control processing when transitioning from a state in which non-specific control processing is being executed to a state in which specific control processing is being executed, and to restore the saved data to the second register group 266 when returning to a state in which non-specific control processing is being executed, thereby reducing the data size of the program.

The I register 267 is set with the upper 8 bits of data ("01H") used to identify the start address of the program corresponding to the interrupt processing (specifically, timer interrupt processing) corresponding to the interrupt cause that occurred. In a configuration in which the primary CPU 251 is provided with the first register group 265 and the second register group 266, the data in the I register 267 is used to identify the start address of the program corresponding to the interrupt processing corresponding to the interrupt cause that occurred, both in situations in which specific control processing is being executed and situations in which non-specific control processing is being executed, and one I register 267 is provided for the primary CPU 251. This makes it possible to prevent an increase in the number of registers used to execute interrupt processing corresponding to the interrupt cause that occurred.

The data stored in the I register 267 is used to identify the start address of the program for the interrupt processing (specifically, timer interrupt processing) corresponding to the interrupt cause that occurred, simplifying the configuration for starting the interrupt processing corresponding to the interrupt cause that occurred.

The value of R register 268 is updated by adding 1 each time the main CPU 251 reads an instruction to execute an instruction stored in the main ROM 223. In the normal win/loss determination process, which is a specific control process, the numerical information obtained from R register 268 is used as a random number value to determine whether or not the random number value corresponds to an electric role release win. This eliminates the need for processing to update the random number value used in the normal win/loss determination process in the specific control process, thereby reducing the data size of the program.

In a configuration in which the primary CPU 251 is provided with a first register group 265 and a second register group 266, the data in the R register 268 can be used in both situations in which specific control processing is being executed and situations in which non-specific control processing is being executed, and one R register 268 is provided for the primary CPU 251. This makes it possible to suppress an increase in the number of registers, while making it possible to make available information that is updated by adding 1 each time the primary CPU 251 reads an instruction to execute an instruction stored in the primary ROM 223, in both specific control processing and non-specific control processing.

The first register group 265 of the master MPU 222 includes a B register 272a and a B' register 292a, which serves as an auxiliary register corresponding to the B register 272a and is used to save data from the B register 272a and restore saved data to the B register 272a. The data that can be written to the B' register 292a is limited to the data stored in the B register 272a, and data stored in the B' register 292a can only be read from the B register 272a. This prevents data stored in registers other than the B register 272a from being written to the B' register 292a, and prevents data from the B' register 292a from being read from anywhere other than the B register 272a. The master MPU 222 also includes V registers 278 and 308, an I register 267, and an R register 268, but does not include auxiliary registers corresponding to the V registers 278 and 308, the I register 267, and the R register 268. This prevents an increase in the number of registers.

The states of the zero flag and carry flag in F registers 271b and 301b do not change before and after the execution of an exchange instruction (specifically, the instruction "EX AF,AF'," "EXX," "EX IX,IX'," "EX IY,IY'," or "EX K,K'"). This allows the process of executing an exchange instruction to be placed between the process of executing an arithmetic instruction and the process of using the state of the zero flag or carry flag that has changed in response to the result of the arithmetic instruction. This eliminates the need for the process of saving the state information of the zero flag or carry flag that has changed in response to the result of the arithmetic instruction in a memory area separate from the zero flag or carry flag after the process of executing the arithmetic instruction but before the process of executing the exchange instruction, and the process of reading the saved state information after the process of executing the exchange instruction. This reduces the number of instructions and data size set in a program, while increasing the flexibility of program design.

The power outage monitoring board 225 lowers the first reset signal output to the reset circuit 254 from HIGH to LOW upon the occurrence of a predetermined event (the reset delay period having elapsed since the power outage signal fell, or the voltage of the second normal operating power monitored by the power outage monitoring board 225 falling below the first reset reference voltage (+4.0 V)), and the main power supply control unit 253 lowers the second reset signal output to the reset circuit 254 from HIGH to LOW upon the occurrence of a specific event (the voltage of the second normal operating power monitored by the voltage monitoring circuit 354 falling below the falling detection voltage). Because the first reset signal is lowered upon the occurrence of a predetermined event, the main MPU 222 can be reset even if the specific event does not occur. Furthermore, because the second reset signal is lowered upon the occurrence of a specific event, the main MPU 222 can be reset even if the specific event does not occur. This prevents the input/output ports of the main MPU 222 from becoming unstable when the supply of operating power to the pachinko machine 160 is stopped without the main MPU 222 being reset.

When the supply of operating power to the pachinko machine 160 is stopped, the timing of the occurrence of a specific trigger (the voltage of the second normal operating power monitored by the voltage monitoring circuit 354 falling below the falling detection voltage) is later than the timing of the occurrence of a predetermined trigger (the reset delay period elapses from the falling edge of the power outage signal, or the voltage of the second normal operating power monitored by the power outage monitoring board 225 falling below the first reset reference voltage (+4.0V)) based on the voltage of the second normal operating power monitored by the power outage monitoring board 225. This allows the main MPU 222 to be reset based on the falling edge of the first reset signal input from the power outage monitoring board 225 to the reset circuit 254, but if a circuit abnormality occurs and the main MPU 222 is not reset based on the falling edge of the first reset signal, the main MPU 222 can be reset based on the falling edge of the second reset signal input from the main power supply control unit 253 to the reset circuit 254.

The reset circuit 254 is provided with a noise filter 356 that enables the reset circuit 254 to recognize the falling edge of the first reset signal when the voltage of the first reset signal input to the reset circuit 254 from the power outage monitoring board 225 remains low for a period of six system clocks (specifically, approximately 0.4 microseconds). This eliminates the need for the main MPU 222 to set aside a period to confirm that the change in the first reset signal from high to low is not due to noise, allowing the main MPU 222 to be reset quickly.

The dispensing side MPU 261 provided on the dispensing control board 259 has a first receiving terminal 361, a dispensing side receiving buffer 363 in which data received at the first receiving terminal 361 is stored, and a reset-compatible output terminal 368. The dispensing control board 259 also has a receiving restriction circuit 371, which includes a logic IC 372 incorporating a first logic circuit 373. The 21st input terminal 373a of the first logic circuit 373 is connected to the main side MPU 222, and the 22nd input terminal 373b is connected to the reset-compatible output terminal 368. The 21st output terminal 373c of the first logic circuit 373 is connected to the first receiving terminal 361. The first logic circuit 373 outputs a HIGH level signal from the 21st output terminal 373c when a LOW level signal is input to at least one of the two input terminals 373a, 373b, and outputs a LOW level signal from the 21st output terminal 373c when a HIGH level signal is input to both of the two input terminals 373a, 373b. During the payout-side release waiting period, the signal output from the reset-compatible output terminal 368 is LOW, and when the payout-side release waiting period ends and the payout-side main process is being performed, the signal output from the reset-compatible output terminal 368 is HIGH. With this configuration, when the payout-side main process is being performed, a HIGH level signal is input to the 22nd input terminal 373b of the first logic circuit 373, so that the state of the signal output from the 21st output terminal 373c can be varied depending on the state of the signal input to the 21st input terminal 373a. This allows data received from the main MPU 222 to be stored in the dispensing side receive buffer 363 while the dispensing side main process is being performed. Furthermore, during the dispensing side release standby period, a LOW level signal is input to the 22nd input terminal 373b of the first logic circuit 373, so that even if the state of the signal input to the 21st input terminal 373a changes, the state of the signal output from the 21st output terminal 373c does not change. This reduces the possibility of data being written to the dispensing side receive buffer 363 during the dispensing side release standby period.

The dispensing side MPU 261 receives data from the main side MPU 222 at the first receiving terminal 361 without using a synchronization clock signal. In this way, in a configuration where a large amount of data may be received and stored in the dispensing side receiving buffer 363 when the dispensing side release waiting period (1 second) is set, the provision of the receiving restriction circuit 371 reduces the possibility of data being written to the dispensing side receiving buffer 363 during the dispensing side release waiting period.

The first receiving terminal 361 is configured to receive gaming machine information from the main MPU 222 every 300 milliseconds. In this configuration, where there is a high probability of receiving gaming machine information from the main MPU 222 when the payout side release waiting period (1 second) is set, the provision of the reception restriction circuit 371 reduces the possibility of gaming machine information being stored in the payout side receiving buffer 363 during the payout side release waiting period.

<Nineteenth embodiment>
In this embodiment, the content of the specific control process differs from that of the 18th embodiment. The following describes the configuration that differs from the 18th embodiment. Note that the description of the same configuration as the 18th embodiment will basically be omitted.

Figure 189 is a flowchart showing the main processing of the main MPU 222 in this embodiment. Note that of the processing in steps SA801 to SA817 in the main processing, all processing except the initial setting processing for non-specific control called and executed in step SA813 and the base value calculation setting processing called and executed in step SA817 is executed using a program and data for specific control, and the initial setting processing and base value calculation setting processing for non-specific control are executed using a program and data for non-specific control.

Steps SA801 to SA813 execute the same processing as steps S8701 to S8713 of the main processing (Figure 161) in the 18th embodiment. The processing content of steps SA801 to SA813 has already been explained in the 18th embodiment. In step SA813, initial setting processing for non-specific control, which is processing for non-specific control, is executed. When the initial setting processing for non-specific control (step SA813) ends, the RETA command is executed, thereby enabling execution of timer interrupt processing.

Then, execution of timer interrupt processing is prohibited (step SA814). Then, in steps SA815 to SA817, processing similar to steps S8714 to S8716 of the main processing (FIG. 161) in the above-described 18th embodiment is executed. Specifically, in step SA815, random number initial value update processing is executed, in step SA816, fluctuation counter update processing is executed, and in step SA817, a program corresponding to the base value calculation and setting processing, which is a non-specific control processing, is called by the CALLA instruction and the base value calculation and setting processing is executed. The processing contents of the random number initial value update processing (step SA815), fluctuation counter update processing (step SA816), and base value calculation and setting processing (step SA817) have already been described in the above-described 18th embodiment. When the base value calculation and setting processing (step SA817) is completed, processing returns to step SA814, and the processing of steps SA814 to SA817 is repeated.

In this way, in the main processing (Figure 189), after steps SA801 to SA813 are executed, the remaining processing is executed, which repeats steps SA814 to SA817. In the remaining processing, execution of timer interrupt processing is prohibited in step SA814. Then, with execution of timer interrupt processing prohibited, steps SA815 to SA817 are executed, and when the base value calculation setting processing called in step SA817 is completed, the RETA instruction is executed, allowing execution of timer interrupt processing.

Timer interrupt processing is executed on the condition that an interrupt request for timer interrupt processing is generated after step SA817 is completed and execution of timer interrupt processing is permitted, but before execution of timer interrupt processing is prohibited in step SA814. Because steps SA815 to SA817 are executed while execution of timer interrupt processing is prohibited, timer interrupt processing is prevented from starting while steps SA815 to SA817 are being executed.

Next, the timer interrupt processing executed by the main MPU 222 will be described. The timer interrupt processing in this embodiment executes the same processing as steps S9203 to S9222 of the timer interrupt processing (FIG. 167) in the 18th embodiment described above. The processing (steps S9201 to S9202) for saving the data in the AF register 271, BC register 272, DE register 273, and HL register 274 that was being used in the remaining processing at the start of the timer interrupt processing (FIG. 167) to the corresponding auxiliary registers (specifically, the AF' register 291, BC' register 292, DE' register 293, and HL' register 294), and the processing (steps S9223 to S9224) for restoring the saved data to the AF register 271, BC register 272, DE register 273, and HL register 274 at the end of the timer interrupt processing, are not executed.

As described above, in the remaining processing, timer interrupt processing is not initiated while the processing of steps SA815 to SA817 is being executed. Because timer interrupt processing is prevented from being executed while the random number initial value update processing (step SA815) or the variation counter update processing (step SA816) is being executed, it is not necessary to store the data stored in the AF register 271, BC register 272, DE register 273, and HL register 274 during the random number initial value update processing (step SA815) or the variation counter update processing (step SA816) in the auxiliary registers (AF' register 291, BC' register 292, DE' register 293, and HL' register 294) while the timer interrupt processing is being executed. This eliminates the need to save the data stored in AF register 271, BC register 272, DE register 273, and HL register 274 to auxiliary registers (AF' register 291, BC' register 292, DE' register 293, and HL' register 294) during the random number initial value update process (step SA815) or the variation counter update process (step SA816) at the start of the timer interrupt process, and also eliminates the need to restore the data that was saved in the auxiliary registers to AF register 271, BC register 272, DE register 273, and HL register 274 at the end of the timer interrupt process. Furthermore, in timer interrupt processing, in addition to the AF register 271, BC register 272, DE register 273, and HL register 274 of the first register group 265, the auxiliary registers corresponding to these main registers (AF' register 291, BC' register 292, DE' register 293, and HL' register 294) can be used.

As in the 18th embodiment, execution of timer interrupt processing is prevented during execution of the base value calculation and setting processing (step SA817). This eliminates the need to store the data stored in the AF register 301, BC register 302, DE register 303, and HL register 304 during the base value calculation and setting processing (step SA817) in the auxiliary registers (AF' register 311, BC' register 312, DE' register 313, and HL' register 314) during execution of the timer interrupt processing. This eliminates the need to save the data in the AF register 301, BC register 302, DE register 303, and HL register 304 to the auxiliary registers at the start of the timer interrupt processing, and also eliminates the need to restore the data saved in the auxiliary registers to the AF register 301, BC register 302, DE register 303, and HL register 304 at the end of the timer interrupt processing. Furthermore, in the non-specific control processing executed in the timer interrupt processing (the fraud detection processing in step S9211, the second management processing in step S9222, and the second stack pointer storage processing in step S9503), in addition to the AF register 301, BC register 302, DE register 303, and HL register 304 of the second register group 266, the auxiliary registers corresponding to these main registers (AF' register 311, BC' register 312, DE' register 313, and HL' register 314) can be used.

Next, the special chart variation start processing executed by the main MPU 222 will be explained with reference to the flowchart in Figure 190. As already explained in the 18th embodiment above, the special chart special voltage control processing is executed in step S9216 of the timer interrupt processing (Figure 167), and the special chart variation start processing is executed in step S9406 of the special chart special voltage control processing (Figure 169). Note that the processing of steps SA901 to SA913 in the special chart variation start processing is executed using a program for specific control and data for specific control.

First, a register clear process is executed (step SA901). In the register clear process, the BC register 272, DE register 273, and HL register 274 are cleared to "0", and then the AF register 271 is cleared to "0". Then, the instruction "EXX" is executed to exchange the data in the BC register 272, DE register 273, and HL register 274 with the data in the BC' register 292, DE' register 293, and HL' register 294, and the instruction "EX AF, AF'" is executed to exchange the data in the AF register 271 with the data in the AF' register 291. Then, the BC register 272, DE register 273, and HL register 274 are cleared to "0", and then the AF register 271 is cleared to "0". This allows the AF register 271, BC register 272, DE register 273, and HL register 274 in the first register group 265, as well as the auxiliary registers corresponding to these main registers, to be cleared to "0."

If the second reserved information is not stored in the second special symbol reserved area 322 provided in the specific control work area 281 but the first reserved information is stored in the first special symbol reserved area 321 (step SA902: YES, step SA903: NO), a first data setting process is executed (step SA904). In the first data setting process, the data stored in the first area 321a of the first special symbol reserved area 321 is moved to the execution area 323 for the special symbol. Then, a process is executed to shift the data stored in the memory area of the first special symbol reserved area 321. This data shift process shifts the data stored in the first through fourth areas 321a through 321d sequentially toward the lower areas. Specifically, the data in each area is shifted from the second area 321b to the first area 321a, the third area 321c to the second area 321b, and the fourth area 321d to the third area 321c. Then, the fourth area 321d is cleared to "0". After that, the value of the first special symbol pending counter in the main RAM 224 is decremented by 1. As a result, the display content of the first special symbol pending display section 197c in the special symbol unit 197 is changed to one where the first pending information has been decremented by one.

Then, the second special symbol flag provided in the specific control work area 281 is cleared to "0" (step SA905). The second special symbol flag is a flag that enables the main MPU 222 to determine that the target of the game round is the second special symbol display unit 197b. A state in which the second special symbol flag is set to "1" corresponds to a state in which the target of the game round is the second special symbol display unit 197b, and a state in which the value of the second special symbol flag is "0" corresponds to a state in which the target of the game round is the first special symbol display unit 197a. By clearing the value of the second special symbol flag to "0" in step SA905, the main MPU 222 can determine that the target of the game round is the first special symbol display unit 197a.

If second reserved information is stored in the second special symbol reserved area 322 (step SA903: YES), a second data setting process is executed (step SA906). In the second data setting process, the data stored in the first area 322a of the second special symbol reserved area 322 is moved to the execution area 323 for the special symbol. Then, a process is executed to shift the data stored in the memory area of the second special symbol reserved area 322. This data shift process shifts the data stored in the first through fourth areas 322a-322d sequentially toward the lower areas. Specifically, the data in each area is shifted from the second area 322b to the first area 322a, the third area 322c to the second area 322b, and the fourth area 322d to the third area 322c. Then, the fourth area 322d is cleared to "0." Then, the value of the second special symbol reserved counter in the main RAM 224 is decremented by one. As a result, the display content of the second special chart pending display section 197d in the special chart unit 197 is changed to one with one second pending information item removed.

Then, the second special symbol flag in the specific control work area 281 is set to "1" (step SA907). This allows the main MPU 222 to determine that the target of the game round is the second special symbol display unit 197b.

If the processing of step SA905 or step SA907 has been executed, a win/loss determination process is executed (step SA908). The win/loss determination process determines whether or not a jackpot result has been won, and if a jackpot result has not been won, determines whether or not a time-saving result has been won. Details of the win/loss determination process (step SA908) will be described later.

Then, the stop result setting process is executed (step SA909). In the stop result setting process, if the game result of the current game is a jackpot result, the stop result setting process for the jackpot result is executed. Also, if the game result of the current game is a time-saving result, the stop result setting process for the time-saving result is executed. Also, if the game result of the current game is a loss result, the stop result setting process for the loss result is executed.

In the stop result setting process for a jackpot result, information on the stop pattern of the symbol to be ultimately displayed on the special symbol display unit 197a, 197b that is the starting target for the current game round is identified from a stop result table for a jackpot result pre-stored in the main ROM 223, and the identified information is stored in the main RAM 224. In this stop result table for a jackpot result, the types of stop patterns of the symbols to be displayed on the first special symbol display unit 197a or the second special symbol display unit 197b are set differently for each type of jackpot result. In the stop result setting process for a jackpot result, information on the stop pattern of the symbols corresponding to the type of jackpot result identified in step SA908 is stored in the main RAM 224. Note that symbol stop patterns may be set in a one-to-one correspondence with each jackpot result, or multiple types of symbol stop patterns may be set for at least some of the jackpot results. The method for selecting the stop result for a jackpot result in which multiple types of stop patterns of pictures are set is arbitrary, but for example, the stop result may be selected based on the value of the type random number counter C2.

In the stop result setting process for the time-saving result, information on the stop mode of the symbol to be ultimately displayed on the special symbol display unit 197a, 197b that is the starting target for the current game round is identified from a stop result table for the time-saving result pre-stored in the main ROM 223, and the identified information is stored in the main RAM 224. In this stop result table for the time-saving result, the types of stop modes of the symbol to be displayed on the first special symbol display unit 197a or the second special symbol display unit 197b are set differently for each type of time-saving result. In the stop result setting process for the time-saving result, information on the stop mode of the symbol corresponding to the type of time-saving result identified in step SA908 is stored in the main RAM 224. Note that the stop mode of the symbol may be set in one-to-one correspondence with each time-saving result, or multiple types of stop modes of the symbol may be set for at least some of the time-saving results. The method for selecting the stop result for a time-saving result in which multiple types of stop patterns are set is arbitrary, but for example, the stop result may be selected based on the value of the type random number counter C2. The information on the pattern pattern selected in the stop result setting process for a time-saving result is different from the information on the pattern pattern selected in the case of a jackpot result.

In the process of setting the stop result for a losing result, information on the pattern type to be finally displayed on the first special symbol display unit 197a or the second special symbol display unit 197b in the current game round is identified from a stop result table for losing results pre-stored in the main ROM 223, and the identified information is stored in the main RAM 224. The pattern type information selected in this case is different from the pattern type information selected in the case of a jackpot result and the pattern type information selected in the case of a time-saving result, and is a single type common to both the first special symbol display unit 197a and the second special symbol display unit 197b.

After executing the stop result setting process in step SA909, the variable display period specification process is executed (step SA910). The details of the variable display period specification process have already been explained in the 18th embodiment. Then, in step SA911, a variable command and a type command corresponding to the game turn to be started this time are sent to the sound/light side MPU 233. As already explained in the 18th embodiment, the variable command includes information on the variable display period specified in the variable display period specification process, as well as information indicating whether the game turn to be started corresponds to the first special symbol display unit 197a or the second special symbol display unit 197b. The type command also includes information on whether the game turn to be started this time corresponds to a jackpot result, and if so, information indicating the type of jackpot result. The type command also includes information on whether the game turn to be started this time corresponds to a time-saving result, and if so, information indicating the type of time-saving result.

Then, in step SA912, the display of the changing image begins on either the first special symbol display unit 197a or the second special symbol display unit 197b, whichever display unit is the target for starting the current game round. Then, in step SA913, the value of the special symbol special electricity counter is incremented by 1. As a result, the value of the special symbol special electricity counter becomes "1", which corresponds to the special symbol changing processing (step S9407).

Next, before explaining the win/loss determination process (Figure 192) executed in step SA908 of the special chart change start process (Figure 190), we will explain the win/loss table used in the win/loss determination process.

Main ROM 223 stores a low-probability first win/loss table, a low-probability second win/loss table, and a high-probability win/loss table. The low-probability first win/loss table is a win/loss table selected when the low-probability mode is selected and the target of the game round is the first special symbol display unit 197a. The low-probability second win/loss table is a win/loss table selected when the low-probability mode is selected and the target of the game round is the second special symbol display unit 197b. The high-probability win/loss table is a win/loss table selected when the high-probability mode is selected. The low-probability first win/loss table has 54 numerical information items corresponding to the jackpot result and 100 numerical information items corresponding to the time-saving result. The low-probability second win/loss table has 54 numerical information items corresponding to the jackpot result and 120 numerical information items corresponding to the time-saving result. The high-probability win/loss table has 540 numerical information items corresponding to the jackpot result and 100 numerical information items corresponding to the time-saving result.

The win/loss determination process (Fig. 192) compares the numerical information (specifically, any of "0" to "9999") obtained from the win random number counter C1 from the numerical information contained in the first or second pending information that is the target of the game round with the numerical information set in the read win/loss table to determine whether or not a jackpot result has been won, and, if a jackpot result has not been won, to determine whether or not a time-saving result has been won.

The main ROM 223, which stores the win/loss table, has multiple 1-byte areas (1-byte areas), each with a 2-byte address that identifies that 1-byte area. The data structure of the win/loss table will be explained using the low-probability first win/loss table as an example. Figure 191(a) is an explanatory diagram for explaining the data structure of the low-probability first win/loss table. As shown in Figure 191(a), the address range from "1601H" to "166CH" contains 54 2-byte pieces of numerical information corresponding to the jackpot result, and the address range from "166DH" to "166EH" following that address range contains data for ending the jackpot determination (specifically, "FFFEH"). The win/loss table has a data structure in which one piece of numerical information (2 bytes) corresponding to the jackpot result is set in two 1-byte areas, and two 1-byte areas contain data for ending the jackpot determination (2 bytes). The low probability first hit/miss table, low probability second hit/miss table, and high probability hit/miss table all have the same jackpot determination end data set as "FFFEH."

In the win/loss determination process (Figure 192), the numerical information corresponding to the jackpot result set in the win/loss table is read in order from the start address side (from "1601H" to "1602H"). The numerical information obtained from the win random number counter C1 is then compared with the numerical information corresponding to the jackpot result read from the win/loss table, and if these two pieces of numerical information match, it is determined that a jackpot result has occurred. Furthermore, if the data read from the win/loss table is data for ending the jackpot determination, it means that there is no numerical information corresponding to the jackpot result to be determined, and it is determined that a jackpot result has not occurred.

As shown in Figure 191 (a), in the low-probability first win/loss table, the address range of "166FH" to "1736H" following the address range of "166DH" to "166EH" has 100 2-byte numerical information corresponding to the time-saving results set, and the address range of "1737H" to "1738H" following that address range has time-saving judgment end data (specifically, "FFFFH") set. The win/loss table has a data structure in which one piece of numerical information (2 bytes) corresponding to the time-saving result is set in two 1-byte areas, and time-saving judgment end data (2 bytes) is set in two 1-byte areas. The low-probability first win/loss table, low-probability second win/loss table, and high-probability win/loss table all have a common time-saving judgment end data of "FFFFH".

In the win/loss determination process (Fig. 192), if a jackpot result does not occur, the numerical information corresponding to the time-saving result set in the win/loss table is read out in order from the start address side (from "166FH" to "1670H"). The numerical information obtained from the win random number counter C1 is then compared with the numerical information corresponding to the time-saving result read out from the win/loss table, and if these two pieces of numerical information match, it is determined that a time-saving result has occurred. Furthermore, if the data read out from the win/loss table is data for ending the time-saving determination, it means that there is no numerical information corresponding to the time-saving result to be determined, and it is determined that a time-saving result has not occurred.

Next, the win/loss determination process executed in step SA908 of the special chart change start process (Figure 190) will be explained with reference to the flowchart in Figure 192. Note that the processes in steps SB101 to SB125 in the win/loss determination process are executed using a specific control program and specific control data.

First, the winning random number setting process is executed (step SB101). In the winning random number setting process, the numerical information obtained from the winning random number counter C1 from the numerical information contained in the first reserved information or second reserved information that is the target of the game round is set in the BC register 272.

Then, a process for setting the start address of the win/loss table is executed (step SB102). In the process for setting the start address of the win/loss table, a process is executed to set in HL register 274 the start address of the win/loss table corresponding to the special chart display units 197a, 197b that are the target of the win/loss lottery mode and game round, from among the low-probability first win/loss table, low-probability second win/loss table, and high-probability win/loss table stored in main ROM 223. Specifically, if the high-probability flag in work area 281 for specific control is set to "1", the start address of the high-probability win/loss table is set in HL register 274. Also, if the value of the high-probability flag is "0" and the value of the second special chart flag in work area 281 for specific control is "0", the start address of the low-probability first win/loss table is set in HL register 274. Additionally, if the value of the high probability flag is "0" and the second special chart flag is set to "1", the start address of the low probability second win/loss table is set in HL register 274. This selects the win/loss table to be used in the current win/loss determination process (Figure 192), and the address of the reference area in the selected win/loss table (specifically, the start address of the selected win/loss table) is set in HL register 274.

Then, in steps SB103 to SB123, the numerical information obtained from the winning random number counter C1 is compared with the numerical information corresponding to the jackpot result or the time-saving result set in the win/loss table selected in step SB102, and processing is performed to proceed to the allocation determination process (step SB124) based on the identification of the occurrence of a jackpot result or a time-saving result.

In step SB103, the value of A register 271a is cleared to "0." In steps SB103 to SB123, information corresponding to the object of judgment is set in A register 271a. A state in which the value of A register 271a is "0" corresponds to a state in which the object of judgment is a jackpot result, and a state in which the value of A register 271a is "1" corresponds to a state in which the object of judgment is a time-saving result. In the processing of steps SB104 to SB120, which is executed when the value of A register 271a is "0," a hit/miss judgment is made on the jackpot result corresponding to the numerical information set in the hit/miss table selected in step SB102. In addition, in the processing of steps SB104 to SB120, which is executed when the value of A register 271a is "1," a hit/miss judgment is made on the time-saving result corresponding to the numerical information set in the hit/miss table selected in step SB102. By clearing A register 271a to "0" in step SB103, the main MPU 222 can determine that the result being judged is a jackpot.

Then, the data read process for the referenced area is executed (step SB104). The data read process for the referenced area is executed while the address of the referenced area in the win/loss table selected in step SB102 (high probability win/loss table, first low probability win/loss table, or second low probability win/loss table) is stored in HL register 274. In the data read process for the referenced area (step SB104), the data for the area corresponding to the address stored in HL register 274 and the address next to that address is read into DE register 273. This sets the numerical information (2 bytes) corresponding to the jackpot result or time-saving result set in the win/loss table selected in step SB102 to DE register 273. In addition, in the data read process for the referenced area (step SB104), after the numerical information corresponding to the jackpot result or time-saving result is read into DE register 273, the value of HL register 274 is incremented by 2, thereby updating the referenced area in the current win/loss table.

Then, the command "PUSH DE" is executed (step SB105). Execution of this command causes the data in DE register 273 (specifically, the numerical information corresponding to the jackpot result or time-saving result set in DE register 273 in step SB104) to be written to the area targeted for writing in specific control stack area 282, and the area targeted for writing is updated. This makes it possible to read the numerical information corresponding to the jackpot result or time-saving result set in DE register 273 in step SB104 from specific control stack area 282 after the command "EXX" is executed in step SB107, which will be described later. The data in DE register 273 is maintained even when the PUSH command is executed in step SB105.

Then, the command "PUSH BC" is executed (step SB106). As already explained, the winning random number setting process was executed in step SB101, and the numerical information obtained from the winning random number counter C1 is set in the BC register 272. By executing the command "PUSH BC" in step SB106, the data in the BC register 272 (the numerical information obtained from the winning random number counter C1) is written to the area targeted for writing in the specific control stack area 282, and the area targeted for writing is updated. This makes it possible to read the numerical information obtained from the winning random number counter C1 from the specific control stack area 282 after the command "EXX" is executed in step SB107, which will be described later. The data in the BC register 272 is maintained even when the PUSH command is executed in step SB106.

Then, the "EXX" command is executed (step SB107). Execution of this command swaps the data stored in the BC register 272, DE register 273, and HL register 274 with the data stored in the auxiliary registers (BC' register 292, DE' register 293, and HL' register 294). This allows the numerical information obtained from the winning random number counter C1 stored in the BC register 272 to be saved to the BC' register 292, and the address corresponding to the reference area of the winning/losing table stored in the HL register 274 to be saved to the HL' register 294. In step SB110, described below, a subtraction process is performed using the HL register 274. By executing the "EXX" command before executing this subtraction process (step SB110), the HL register 274 can be made available for use in step SB110 while preventing the loss of the numerical information obtained from the winning random number counter C1 and the address corresponding to the reference area of the winning/losing table. The data saved in step SB107 is restored to the BC register 272, DE register 273, and HL register 274 by executing the "EXX" command in step SB111.

Then, the command "POP BC" is executed (step SB108). Execution of this command restores the data saved from the BC register 272 to the specific control stack area 282 in step SB106 (specifically, the numerical information obtained from the winning random number counter C1) to the BC register 272. Then, the command "POP HL" is executed (step SB109). Execution of this command allows the data saved from the DE register 273 to the specific control stack area 282 in step SB105 (specifically, the numerical information corresponding to the jackpot result or time-saving result) to be read into the HL register 274.

Then, in steps SB110 to SB112, an operation is performed to subtract the value of BC register 272 (numerical information obtained from the hit random number counter C1) from the value of HL register 274 (numerical information corresponding to the jackpot result or time-saving result). If the result of this operation is "0," i.e., if the numerical information corresponding to the jackpot result or time-saving result stored in HL register 274 matches the numerical information obtained from the hit random number counter C1 stored in BC register 272, a process is performed to determine that a win has occurred for that jackpot result or time-saving result. Specifically, first, an operation is performed to subtract the value of BC register 272 (numerical information obtained from the hit random number counter C1) from the value of HL register 274 (numerical information corresponding to the jackpot result or time-saving result) (step SB110). The result of this operation is stored in HL register 274. If the calculation result of step SB110 is "0", the zero flag of F register 271b is set to "1", and if the calculation result of step SB110 is anything other than "0", the value of the zero flag of F register 271b is set to "0".

Then, the instruction "EXX" is executed (step SB111). Execution of this instruction swaps the data stored in the BC register 272, DE register 273, and HL register 274 with the data in the auxiliary register. This allows the data saved in the BC' register 292 in step SB107 (numerical information obtained from the win random number counter C1) to be restored to the BC register 272, and the data saved in the HL' register 294 (the address corresponding to the reference area of the win/loss table) to be restored to the HL register 274. Even when the instruction "EXX" is executed in step SB111, the value of the zero flag in the F register 271b does not change.

Then, it is determined whether the value of the zero flag in F register 271b is "1" (step SB112). Because the value of the zero flag does not change when the EXX instruction is executed, it is possible to determine whether the zero flag has been set to "1" in the calculation result of step SB110 after the EXX instruction is executed in step SB111. Because the EXX instruction (step SB111) is executed before the determination process of step SB112, the processing configuration of the pass/fail determination process (Figure 192) is simplified compared to a configuration in which the EXX instruction is executed after a positive determination is made and after a negative determination is made in the determination process of step SB112.

If the value of the zero flag is "0" (step SB112: NO), i.e., if the calculation result in step SB110 is a value other than "0" and no win has occurred for the jackpot result or time-saving result being judged, the command "PUSH HL" is executed (step SB113). By executing this command, the data in HL register 274 (the address corresponding to the referenced area in the win/loss table) is written to the area to be written in specific control stack area 282, and the area to be written is updated. As a result, after the command "EXX" is executed in step SB114 (described below), the information at the address corresponding to the referenced area in the win/loss table can be read from specific control stack area 282. Even if the PUSH command is executed in step SB113, the data in HL register 274 is maintained.

Then, the "EXX" command is executed (step SB114). Execution of this command swaps the data stored in the BC register 272, DE register 273, and HL register 274 with the data in the auxiliary register. This allows the numerical information obtained from the winning random number counter C1 stored in the BC register 272 to be saved to the BC' register 292, and the address corresponding to the reference area of the winning/losing table stored in the HL register 274 to be saved to the HL' register 294. In step SB117 or step SB121, described below, a subtraction process is performed using the HL register 274. By executing the "EXX" command before executing this subtraction process (step SB117 or step SB121), the HL register 274 can be made available for use in step SB117 or step SB121 while preventing the loss of the numerical information obtained from the winning random number counter C1 and the address corresponding to the reference area of the winning/losing table. The data saved in step SB114 is restored to the BC register 272, DE register 273, and HL register 274 by executing the "EXX" command in step SB118 or step SB122.

Then, the command "POP HL" is executed (step SB115). Execution of this command restores the data (address corresponding to the reference area in the win/lose table) saved in the specific control stack area 282 in step SB113 to the HL register 274.

Then, it is determined whether the value of A register 271a is "0" (step SB116). If the value of A register 271a is "0" (step SB116: YES), i.e., if the current determination target is a jackpot result, a jackpot determination termination process is executed (step SB117). In the jackpot determination termination process, the numerical information set in the referenced area and the area next to the referenced area in the win/lose table is read into HL register 274, and then a subtraction command is executed to subtract jackpot determination termination data (specifically, "FFFEH") from the value in HL register 274. The result of the subtraction command is stored in HL register 274. If the data in HL register 274 before the subtraction command was executed was jackpot determination termination data, the result of the operation is "0." Therefore, the execution of the subtraction command sets the value of the zero flag in F register 271b to "1." Furthermore, if the data in the HL register 274 before the execution of the subtraction command was not the data for ending the jackpot determination, the calculation result would not be "0", and therefore the value of the zero flag would become "0" when the subtraction command is executed.

Then, the instruction "EXX" is executed (step SB118). Execution of this instruction swaps the data stored in the BC register 272, DE register 273, and HL register 274 with the data stored in the auxiliary registers. This allows the data saved in the BC' register 292 in step SB114 (numerical information obtained from the win random number counter C1) to be restored to the BC register 272, and the data saved in the HL' register 294 (an address corresponding to the reference area of the win/lose table) to be restored to the HL register 274. Execution of the instruction "EXX" in step SB118 does not change the value of the zero flag in the F register 271b.

It is then determined whether the value of the zero flag in F register 271b is "1" (step SB119). Because the value of the zero flag does not change when the EXX instruction is executed, it is possible to determine whether the zero flag was set to "1" in the calculation result of step SB117 after the EXX instruction is executed in step SB118. Because the EXX instruction (step SB118) is executed before the determination process of step SB119, the processing configuration of the pass/fail determination process (Figure 192) is simplified compared to a configuration in which the EXX instruction is executed after a positive determination is made and after a negative determination is made in the determination process of step SB119.

If the value of the zero flag is "0" (step SB119: NO), that is, if there is numerical information corresponding to a jackpot result that has not yet been determined in the current win/loss table, the process returns to step SB104 with the value of A register 271a remaining at "0" without changing the value of A register 271a. The process then repeats steps SB104 through SB120 until either a jackpot result is identified and a positive determination is made in step SB112, or there is no numerical information corresponding to a jackpot result that has not yet been determined in the current win/loss table and a positive determination is made in step SB119.

If the zero flag in F register 271b is set to "1" (step SB119: YES), that is, if the hit/miss determination for all numerical information corresponding to the jackpot results set in the hit/miss table selected in step SB102 has been completed and the area where the jackpot determination end data ("FFFEH") is set is the reference area, the value of A register 271a ("0") is incremented by 1 (step SB120). This sets the value of A register 271a to "1," allowing the main MPU 222 to determine that a hit/miss determination is being made for the numerical information corresponding to the time-saving result. The process then returns to step SB104 with the value of A register 271a still set to "1." The process then repeats steps SB104 through SB120 until a time-saving result is identified and a positive determination is made in step SB112, or until a state exists in which there is no numerical information corresponding to the time-saving result that has not yet been determined in the current hit/miss table and a negative determination is made in step SB116.

If a negative judgment is made in step SB116, i.e., if the numerical information corresponding to the time-saving result being judged does not match the numerical information obtained from the winning random number counter C1, a process for terminating the time-saving judgment is executed (step SB121). In the process for terminating the time-saving judgment, the numerical information set in the referenced area and the area next to the referenced area in the current winning/losing table is read into HL register 274, and then a subtraction command is executed to subtract time-saving judgment termination data (specifically, "FFFFH") from the value in HL register 274. The calculation result of the subtraction command is stored in HL register 274. If the data in HL register 274 before the execution of the subtraction command was time-saving judgment termination data, the calculation result will be "0," and therefore the value of the zero flag provided in F register 271b will be set to "1" when the subtraction command is executed. Furthermore, if the data in HL register 274 before the execution of the subtraction command was not time-saving determination end data, the calculation result would not be "0," and therefore the value of the zero flag would become "0" when the subtraction command is executed.

Then, the instruction "EXX" is executed (step SB122). Execution of this instruction swaps the data stored in the BC register 272, DE register 273, and HL register 274 with the data stored in the auxiliary registers. This allows the data saved in the BC' register 292 in step SB114 (numerical information obtained from the win random number counter C1) to be restored to the BC register 272, and the data saved in the HL' register 294 (address corresponding to the reference area of the win/loss table) to be restored to the HL register 274. Execution of the instruction "EXX" in step SB122 does not change the value of the zero flag in the F register 271b.

After that, if the value of the zero flag in F register 271b is "0" (step SB123: NO), that is, if there is numerical information corresponding to a time-saving result that has not yet been judged in the current win/loss table, the process returns to step SB104. The process then repeats steps SB104 to SB123 until either the occurrence of a time-saving result is identified and a positive judgment is made in step SB112, or a state in which there is no numerical information corresponding to a time-saving result that has not yet been judged in the current win/loss table (i.e., a state in which the game result is a loss result) occurs and a positive judgment is made in step SB123.

If the zero flag of F register 271b is set to "1" (step SB123: YES), that is, if the win/loss determination for all numerical information corresponding to the time-saving results set in the win/loss table selected in step SB102 has been completed and the area where the time-saving determination end data ("FFFFH") is set is the reference area, and the game result for this round is a loss, the true/fail determination process (Figure 192) is terminated. As already explained, after the win/fail determination process is executed in step SA908 of the special chart change start process (Figure 190), the stop result setting process is executed in step SA909.

If a positive judgment is made in step SB112, i.e., if the occurrence of a jackpot result or a time-saving result is identified, an allocation determination process is executed (step SB124). In the allocation determination process, the first jackpot allocation table, second jackpot allocation table, first time-saving allocation table, and second time-saving allocation table stored in main ROM 223 are read out, which correspond to the result of the win/loss determination process and to the special chart display units 197a, 197b that will be used to execute the game round. Specifically, if the game result of the current game round is a jackpot result and the execution target is the first pending information, the first jackpot allocation table is read out, and if the game result of the current game round is a jackpot result and the execution target is the second pending information, the second jackpot allocation table is read out. Furthermore, if the game result of the current game is a time-saving result and the execution target is the first reserved information, the first time-saving allocation table is read out, and if the game result of the current game is a time-saving result and the execution target is the second reserved information, the second time-saving allocation table is read out.

The jackpot allocation table has multiple point values (1-byte numerical information) set corresponding to jackpot results. The point values are used to determine which of the multiple jackpot results set in the jackpot allocation table has been won. Specifically, the first jackpot allocation table has point values set corresponding to a 5R low-probability result, a 5R high-probability result, and a 10R high-probability result. The second jackpot allocation table has point values set corresponding to a 5R low-probability result and a 10R high-probability result.

The time-saving allocation table has multiple point values (1-byte numerical information) set corresponding to the time-saving results. The point values are used to determine which of the multiple time-saving results set in the time-saving allocation table has been selected. Specifically, the first time-saving allocation table has point values set corresponding to the first time-saving result and the second time-saving result. Furthermore, the second time-saving allocation table has point values set corresponding to the first time-saving result and the second time-saving result.

The data structure of the allocation table will be explained using the first jackpot allocation table as an example. Figure 191(b) is an explanatory diagram for explaining the data structure of the first jackpot allocation table. As shown in Figure 191(b), the first jackpot allocation table is set in the address range of "1B01H" to "1B03H" in the main ROM 223. The one-byte area corresponding to the address "1B01H" contains a point value of "0FH" ("15") corresponding to a 5R low-probability result, the one-byte area corresponding to the address "1B02H" following that address contains a point value of "08H" ("8") corresponding to a 5R high-probability result, and the one-byte area corresponding to the address "1B03H" following that address contains a point value of "07H" ("7") corresponding to a 10R high-probability result.

In the allocation determination process (step SB124), the point values set in the allocation table are read sequentially from the start address side (the "1B01H" side in the case of the first jackpot allocation table). Then, the read point values are sequentially subtracted from the numerical information obtained from the type random number counter C2, and the result corresponding to the point value where the subtraction results in a negative value (the jackpot result in the jackpot allocation table, or the time-saving result in the time-saving allocation table) is determined to be a win. The total point values set in the allocation table are set to "30." Therefore, when the allocation determination process is performed with reference to a jackpot allocation table, the jackpot result is allocated to one of the jackpot results set in that jackpot allocation table. Furthermore, when the allocation determination process is performed with reference to a time-saving allocation table, the time-saving result is allocated to one of the time-saving results set in that time-saving allocation table.

As already explained in the 18th embodiment, in the first register group 265, the IX register 275 is used to store the first base address for identification ("1000H"), the IY register 276 is used to store the second base address for identification ("1100H"), the K register 277 is used to store the upper first base address information for identification ("A0H"), and the V register 278 is used to store the upper second base address information for registers ("ABH"). In addition, the stack pointer 279 is used to store address information for the main CPU 251 to identify the memory area in the stack area 282 for specific control to which information is to be written in response to a push command. As already explained, in addition to the registers used for addressing (IX register 275, IY register 276, K register 277, and V register 278) and stack pointer 279, the first register group 265 also includes the main registers A register 271a, F register 271b, B register 272a, C register 272b, D register 273a, E register 273b, H register 274a, and L register 274b.

As already explained, in the win/loss determination process (Figure 192), the A register 271a is used to store information corresponding to the object of determination, the BC register 272 is used to store numerical information obtained from the win random number counter C1, and the DE register 273 is used to store numerical information corresponding to the jackpot result or time-saving result. Furthermore, the F register 271b, which is a flag register, is used in the calculation processes of steps SB110, SB117, and SB121. Therefore, when attempting to store the address of the reference area in the win/loss table in the main register of the first register group 265, it is stored in the HL register 274.

In the pass/fail determination process (Figure 192), steps SB110, SB117, and SB121 perform an operation to subtract 16-bit numerical information from 16-bit numerical information. Furthermore, in the operation to subtract 16-bit numerical information from 16-bit numerical information, the HL register 274 is used to store the minuend (the number to be subtracted) and also to store the result data of the subtraction. Therefore, before executing the operation process of step SB110, step SB117, or step SB121, the data in the HL register 274 (the address of the reference area in the pass/fail table) must be saved. The first register group 265 is provided with an auxiliary register (HL' register 294) for the HL register 274. This makes it possible to save the data in HL register 274 (the address of the reference area in the win/lose table) to HL' register 294 using an exchange command (1-byte EXX command) before executing the calculation process of step SB110, step SB117, or step SB121, and also makes it possible to restore the data saved in HL' register 294 to HL register 274 using an exchange command (1-byte EXX command) after executing the calculation process of step SB110, step SB117, or step SB121.

Next, the allocation determination process in step SB124 of the pass/fail determination process (Figure 192) will be explained with reference to the flowchart in Figure 193. Note that steps SB201 to SB214 in the allocation determination process are executed using a specific control program and specific control data.

If the value of A register 271a is "0" (step SB201: YES), i.e., if the result of the current game is a jackpot, the start address setting process for the jackpot allocation table is executed (step SB202). In the start address setting process for the jackpot allocation table, if the value of the second special symbol flag in the specific control work area 281 is "0," i.e., if the result of the current game is a jackpot and the execution target of the game is the first reserved information, the start address of the first jackpot allocation table is set in the HL register 274. Also, in the start address setting process for the jackpot allocation table (step SB202), if the value of the second special symbol flag in the specific control work area 281 is set to "1," i.e., if the result of the current game is a jackpot and the execution target of the game is the second reserved information, the start address of the second jackpot allocation table is set in the HL register 274. This causes the current jackpot allocation table to be selected, and the address of the reference area in the selected jackpot allocation table (specifically, the start address of the selected jackpot allocation table) to be set in the HL register 274.

If the value of A register 271a is "1" (step SB201: NO), i.e., if the game result of the current game round is a time-shortened result, the start address setting process for the time-shortened allocation table is executed (step SB203). In the start address setting process for the time-shortened allocation table, if the value of the second special symbol flag in the work area 281 for specific control is "0," i.e., if the game result of the current game round is a time-shortened result and the execution target of the game round is the first reserved information, the start address of the first time-shortened allocation table is set in the HL register 274. Also, in the start address setting process for the time-shortened allocation table (step SB203), if the second special symbol flag in the work area 281 for specific control is set to "1," i.e., if the game result of the current game round is a time-shortened result and the execution target of the game round is the second reserved information, the start address of the second time-shortened allocation table is set in the HL register 274. This causes the current time-saving allocation table to be selected, and the address of the reference area in the selected time-saving allocation table (specifically, the start address of the selected time-saving allocation table) to be set in the HL register 274.

When step SB202 is processed or step SB203 is processed, the command "EX AF, AF'" is executed (step SB204). By executing this command, the data in AF register 271 is exchanged with the data in AF' register 291. This allows the information corresponding to the jackpot result ("0") or the time-saving result ("1") stored in A register 271a to be saved in A' register 291a. As already explained, since the value of AF' register 291 was cleared to "0" in step SA901 of the special chart variation start processing (Fig. 190), the command "EX AF, AF'" is executed in step SB204, resulting in the AF register 271 being cleared to "0." In step SB209, described below, a subtraction process is performed using A register 271a. By executing the command "EX AF, AF'" before performing the subtraction process (step SB209), the A register 271a can be made available for use in step SB209 while preventing the loss of information corresponding to the jackpot result ("0") or the time-saving result ("1"). The data saved in step SB204 is restored to the AF register 271 by executing the command "EX AF, AF'" in step SB214, described below.

Then, the value of D register 273a is cleared to "0" (step SB205). In this allocation determination process (FIG. 193), D register 273a is used to set numerical information corresponding to the type of jackpot result or time-saving result. Specifically, when the first jackpot allocation table is read, a value of "0" in D register 273a corresponds to a 5R low-probability result, a value of "1" corresponds to a 5R high-probability result, and a value of "2" corresponds to a 10R high-probability result. Furthermore, when the second jackpot allocation table is read, a value of "0" in D register 273a corresponds to a 5R low-probability result, and a value of "1" corresponds to a 10R high-probability result. Furthermore, when the first time-saving allocation table or second time-saving allocation table is read, a value of "0" in D register 273a corresponds to a first time-saving result, and a value of "1" corresponds to a second time-saving result.

Then, the type random number setting process is executed (step SB206). In the type random number setting process, the numerical information obtained from the type random number counter C2 from among the numerical information contained in the first reserved information or second reserved information that is the target of the execution of the game round is set in the B register 272a. In the allocation determination process (FIG. 193), the B register 272a is used to store the numerical information obtained from the type random number counter C2 from among the numerical information contained in the first reserved information or second reserved information that is the target of the execution of the game round, or the numerical information updated by performing an operation to subtract the point value set in the allocation table from the numerical information (hereinafter, in this embodiment, also referred to as "type random number corresponding data").

Then, a point value read process is executed (step SB207). In the point value read process, data (point value) from the area corresponding to the address stored in the HL register 274 (the reference area of the jackpot allocation table selected in step SB202 or the time-saving allocation table selected in step SB203) is read into the C register 272b. Then, the data in the B register 272a (data corresponding to the type random number) is transferred to the A register 271a (step SB208). The data in the B register 272a is maintained even after the transfer.

Then, an operation is performed to subtract the value of C register 272b (the point value obtained from the allocation table) from the value of A register 271a (type random number corresponding data) (step SB209). The result of this operation is stored in A register 271a. If the type random number corresponding data before the operation is executed is equal to or greater than the point value obtained from the current allocation table, no borrow occurs in the operation of step SB209, and the value of the carry flag set in F register 271b is set to "0". On the other hand, if the type random number corresponding data before the operation is executed is smaller than the point value read from the current allocation table, a borrow occurs in the operation of step SB209, and the carry flag is set to "1".

Then, it is determined whether the carry flag in F register 271b is set to "1" (step SB210). If the carry flag is not set to "1" (step SB210: NO), that is, if the type of the winning jackpot result or time-saving result has not yet been identified, the data in A register 271a (the data resulting from the calculation in step SB209) is set in B register 272a (step SB211). This updates the type random number corresponding data stored in B register 272a to the value after the calculation in step SB209 is performed.

Then, the value of D register 273a is incremented by 1 (step SB212). This updates the numerical information corresponding to the type of jackpot result or time-saving result. The value of HL register 274 is then incremented by 1 (step SB213). As already explained, the HL register 274 contains the data of the reference area in the current allocation table. By incrementing the value of HL register 274 by 1, the reference area in the allocation table is updated, and the point value to be read is also updated. The process then returns to step SB207, and steps SB207 to SB213 are repeated until the type of the current jackpot result or time-saving result is identified and a positive determination is made in step SB210.

If the carry flag is set to "1" (step SB210: YES), i.e., the calculation in step SB209 results in a negative value and it is determined that the jackpot result or time-saving result corresponding to the point value subtracted in the calculation has been won, the command "EX AF, AF'" is executed (step SB214), and this allocation determination process (FIG. 193) is terminated. By executing the command "EX AF, AF'" in step SB214, the data in the AF register 271 is exchanged with the data in the AF' register 291. This allows the data saved in the A' register 291a in step SB204 (the information "0" corresponding to the jackpot result or the information "1" corresponding to the time-saving result) to be restored to the A register 271a.

Returning to the explanation of the win/loss determination process (FIG. 192), after the allocation determination process is executed in step SB124, the flag setting process is executed (step SB125). The flag setting process (step SB125) is executed when information corresponding to a jackpot result ("0") or information corresponding to a time-saving result ("1") is set in A register 271a, and information corresponding to the type of jackpot result or time-saving result is set in D register 273a. The flag setting process (step SB125) identifies the game result of the current game (specifically, a 5R low-probability result, a 5R high-probability result, a 10R high-probability result, a first time-saving result, or a second time-saving result) based on the value of A register 271a, the value of D register 273a, and the value of the second special symbol flag in the specific control work area 281, and executes processing to set the flag corresponding to that game result to "1."

After the flag setting process is executed in step SB125, the true/false determination process (Fig. 192) is terminated. As already explained, after the true/false determination process is executed in step SA908 of the special chart change start process (Fig. 190), the stop result setting process is executed in step SA909.

As described above, in the remaining processing of the main processing (Figure 189), execution of timer interrupt processing is prohibited in step SA814, and processing of steps SA815 to SA817 is executed in this state. This prevents timer interrupt processing from being activated during execution of processing of steps SA815 to SA816, and also makes it unnecessary to store the data in the AF register 271, BC register 272, DE register 273, and HL register 274 of the first register group 265 used in processing of steps SA815 to SA816 in auxiliary registers during execution of timer interrupt processing. Therefore, in timer interrupt processing, in addition to the AF register 271, BC register 272, DE register 273, and HL register 274 in the first register group 265, the auxiliary registers corresponding to these main registers (AF' register 291, BC' register 292, DE' register 293, and HL' register 294) can be used.

When timer interrupt processing is being executed, an exchange instruction is executed to exchange the data in the AF register 271 in the first register group 265 with the data in the auxiliary register (AF' register 291), and an exchange instruction is executed to exchange the data in the BC register 272, DE register 273, and HL register 274 in the first register group 265 with the data in the auxiliary registers (BC' register 292, DE' register 293, and HL' register 294). This allows a greater number of registers to be secured for temporarily storing data used in calculations during timer interrupt processing compared to a configuration in which these exchange instructions are not executed when timer interrupt processing is being executed.

<Twentieth embodiment>
This embodiment differs from the 18th embodiment in the configuration for releasing the reset of the main MPU 222. The following describes the configuration that differs from the 18th embodiment. Note that the description of the same configuration as the 18th embodiment will basically be omitted.

Figure 194(a) is an explanatory diagram for explaining the reset of the main MPU 222 in this embodiment. There are two types of reset for the main MPU 222: a full reset and a partial reset. A full reset of the main MPU 222 initializes the first register group 265, the second register group 266, the I register 267, the R register 268, and the program counter 269 provided inside the main CPU 251, as well as the setting register group 256 and the monitoring and control register group 257 provided outside the main CPU 251. As shown in Figure 194(a), a full reset of the main MPU 222 is executed when at least one of the first reset signal and the second reset signal input to the reset circuit 254 is at a LOW level. Note that the relationship between the LOW level and the HIGH level in the first reset signal may be reversed, and the relationship between the LOW level and the HIGH level in the second reset signal may be reversed.

When the main MPU 222 is partially reset, the first register group 265, second register group 266, I register 267, R register 268, and program counter 269 provided inside the main CPU 251 are initialized. When the main MPU 222 is partially reset, the setting register group 256 and monitoring and control register group 257 provided outside the main CPU 251 are not initialized. As shown in FIG. 194(a), the main MPU 222 is partially reset when the main MPU 222 is in a state where it is traveling outside a designated area, as described below, or when a timeout occurs in the watchdog timer 382, as described below.

Figure 194(b) is an explanatory diagram illustrating the configuration of the main MPU 222. As shown in Figure 194(b), the main MPU 222 is provided with a main area outside travel prohibition circuit 381, a watchdog timer 382, and a main receive buffer 383.

The main ROM 223 stores programs corresponding to the processing executed by the main MPU 222, and the main CPU 251 reads and executes the instructions set in these programs to execute processing in the main MPU 222. The main out-of-area travel prohibition circuit 381 is a circuit that performs a partial reset of the main MPU 222 when the address of the program being executed by the program counter 269 of the main CPU 251 is outside the address range specified in the design stage of the main ROM 223 (the address range in which the program corresponding to the processing executed by the main MPU 222 is set), i.e., when the main MPU 222 experiences travel outside the designated area.

The watchdog timer 382 is a timer circuit that monitors whether the main MPU 222 is operating normally. The watchdog timer 382 measures the monitoring period (specifically, 16 milliseconds) set in the watchdog timer 382. If the monitoring period set in the watchdog timer 382 elapses and a timeout occurs, a partial reset of the main MPU 222 is performed. The watchdog timer 382 begins measuring the monitoring period after the processing at the start of the supply of operating power (steps S8701 to S8713) has ended in the main processing (Figure 161).

The main MPU 222 executes a process to set a monitoring period of 16 milliseconds for the watchdog timer 382 during timer interrupt processing (Figure 167), regardless of the state of the game stop flag and the state of the game disabled flag 351. This prevents the watchdog timer 382 from timing out when the timer interrupt processing (Figure 167) is executed at a cycle of 4 milliseconds. The watchdog timer 382 times out when the timer interrupt processing (Figure 167) is not executed for 16 milliseconds.

The main receiving buffer 383 stores the prize ball response command received from the payout side MPU 261. The prize ball response command contains the number of game balls paid out based on the prize ball command received from the main MPU 222. The main MPU 222 compares the number of game balls requested for payout set in the prize ball command with the number of game balls paid out that were received from the payout side MPU 261 to determine whether the payout of game balls was performed successfully.

Next, the configuration for resetting the main MPU 222 will be described with reference to the functional block diagram shown in Figure 195. As already explained in the 18th embodiment, the main CPU 251 is provided with an internal register initialization circuit 251a, and the main power supply control unit 253 is provided with a supply switching circuit 253a. In addition, an external register initialization circuit 355 is provided outside the main CPU 251 in the main MPU 222. As shown in Figure 195, the reset circuit 254 is provided with a reset control circuit 254b, a first reset execution signal control circuit 254c, and a second reset execution signal control circuit 254d.

As shown in FIG. 195, the reset control circuit 254b receives as input the first reset signal output from the power outage monitoring board 225, the second reset signal output from the voltage monitoring circuit 354, and the partial reset signal output from the main CPU 251. When the main MPU 222 detects travel outside the designated area or the watchdog timer 382 times out, the main MPU 222 raises the partial reset signal output from the main CPU 251 from LOW level to HIGH level. The partial reset signal falls to LOW level when a partial reset of the main MPU 222 is performed.

When the voltage of the second normal operating power supplied to the main power supply control unit 253 is +2.1V or higher, if at least one of the first reset signal and second reset signal input to the reset control circuit 254b is at a low level, the first reset instruction signal output from the reset control circuit 254b to the first reset execution signal control circuit 254c is set to a high level, and the second reset instruction signal output from the reset control circuit 254b to the second reset execution signal control circuit 254d is set to a high level, regardless of the state of the partial reset signal.

When the first reset instruction signal input to the first reset execution signal control circuit 254c is at a high level, the first reset execution signal output from the first reset execution signal control circuit 254c to the main CPU 251 is set to a low level. Furthermore, when the second reset instruction signal input to the second reset execution signal control circuit 254d is at a high level, the second reset execution signal output from the second reset execution signal control circuit 254d to the external register initialization circuit 355 and the supply switching circuit 253a of the main power supply control unit 253 is set to a low level. This results in a full reset of the main MPU 222.

When the first reset execution signal input to the main CPU 251 is at a LOW level, the internal register initialization circuit 251a operates to initialize the registers provided inside the main CPU 251. Furthermore, when the second reset execution signal input to the external register initialization circuit 355 is at a LOW level, the registers provided outside the main CPU 251 in the main MPU 222 are initialized. Furthermore, when the second reset execution signal input to the supply switching circuit 253a is at a LOW level, the power supplied to the main RAM 224 is switched from the second normal operating power to backup power.

When the voltage of the second normal operating power supplied to the main power supply control unit 253 is +2.1 V or higher, and both the first reset signal and the second reset signal input to the reset execution signal control circuit 254a are at HI level and some reset signals are at LOW level, the first reset execution signal output from the first reset execution signal control circuit 254c and the second reset execution signal output from the second reset execution signal control circuit 254d are set to HI level. This releases the reset of the main MPU 222.

When the voltage of the second normal operating power supplied to the main power supply control unit 253 is +2.1V or higher, if both the first reset signal and the second reset signal input to the reset execution signal control circuit 254a are at a high level and the partial reset signal is at a high level, the first reset execution signal output from the first reset execution signal control circuit 254c is set to a low level and the second reset execution signal output from the second reset execution signal control circuit 254d is set to a high level. This results in a partial reset of the main MPU 222. As already explained, when the first reset execution signal input to the internal register initialization circuit 251a is at a low level, the registers provided inside the main CPU 251 are initialized.

The monitoring and control register group 257 includes a reset cause register in which information corresponding to the cause of a partial reset in the main MPU 222 is set. If a partial reset of the main MPU 222 is performed based on the main MPU 222 traveling outside a designated area, the reset cause register is set to "1." If a partial reset of the main MPU 222 is performed based on the watchdog timer 382 timing out, the reset cause register is set to "2."

After a full or partial reset of the main MPU 222 is performed, the main MPU 222 executes a main reset release process based on both the first reset signal and the second reset signal input to the reset circuit 254 going HIGH. If a partial reset of the main MPU 222 is performed based on the main MPU 222 traveling outside the designated area, the main reset release process is executed with the reset cause register set to "1." If a partial reset of the main MPU 222 is performed based on the watchdog timer 382 timing out, the main reset release process is executed with the reset cause register set to "2." If a full clear process of the main MPU 222 is performed based on at least one of the first reset signal and the second reset signal input to the reset circuit 254 being LOW, the main reset release process is executed with the reset cause register set to "0."

Figure 196 is a flowchart showing the main side reset release process. Note that steps SB301 to SB309 in the main side reset release process are executed using a specific control program and specific control data.

First, it is determined whether the value of the reset cause register in the monitoring and control register group 257 is "1" or "2" (step SB301). If the value of the reset cause register is "0" (step SB301: NO), i.e., if a full reset of the main MPU 222 has been performed, a status confirmation process is executed (step SB302). The status confirmation process includes processes to confirm that no abnormalities have occurred in the programs set in the main ROM 223 and to confirm that no abnormalities have been detected in the circuits built into the main MPU 222.

If no abnormality is identified in the status confirmation process (step SB302) (step SB303: NO), the reception permission process is executed, causing the data received from the dispensing side MPU 261 to be stored in the main side reception buffer 383 (step SB304).

Then, a reset release wait period (specifically, 1 second) for the main MPU 222 is set in a timer circuit (not shown) provided in the main MPU 222 (step SB305), and it is determined whether the reset release wait period has elapsed (step SB306). If the reset release wait period has not elapsed (step SB306: NO), the determination process of step SB306 is repeated until the reset release wait period has elapsed. If the reset release wait period has elapsed (step SB306: YES), it is determined whether the data volume of the information stored in the main receive buffer 383 is equal to or greater than the abnormality reference amount (specifically, 20 bytes) (step SB307).

If a positive determination is made in step SB301, or a negative determination is made in step SB307, a jump is made to the start address of the main processing (step SB308). This causes the main processing (Figure 161) to start in the main MPU 222.

If an abnormality is detected during the status confirmation process (step SB303: YES), or if the data volume of information stored in the main receive buffer 383 is equal to or greater than the abnormality reference amount (step SB307: YES), execution stop processing is executed (step SB309). The execution stop processing executes processing to stop the operation of the main MPU 222. This prevents the main processing (Figure 161) from being executed without resolving the abnormality if an abnormality is detected when the main MPU 222 is released from reset.

As described above, when the main reset release process is executed after a full reset of the main MPU 222, a positive determination is made in step SB301 and the process from step SB302 onwards is executed. The main process (Figure 161) is then initiated on the condition that no abnormality is detected in the status confirmation process and the data volume of the information stored in the main receive buffer 383 is not equal to or greater than the abnormality reference amount (steps SB303 and SB307: NO). This prevents the main process (Figure 161) from being initiated before the abnormality has been resolved if an abnormal condition in the main MPU 222 is detected after a full reset of the main MPU 222 (step SB303 or step SB307: YES).

When the main reset release process is executed after a partial reset of the main MPU 222 has been performed, the main process (Fig. 161) is started without executing the processes of steps SB302 to SB307 and step SB309. This shortens the period from when the main MPU 222 is partially reset to when the main process (Fig. 161) is started. Furthermore, after a partial reset of the main MPU 222 has been performed based on the occurrence of driving outside the designated area in the main MPU 222 or the occurrence of a timeout in the watchdog timer 382, it is possible to prevent the operation of the main MPU 222 from being stopped due to the receipt of data sent from the dispensing MPU 261 before the main process (Fig. 161) is started.

The main MPU 222 is released from reset after a full reset has been performed when the supply of operating power to the pachinko machine 160 begins. In this case, the main reset release process is executed when the supply of operating power to the pachinko machine 160 begins and before the sound/light MPU 233 and payout MPU 261 begin executing processing, and when the voltage of the second normal operating power supplied to the main power supply control unit 253 is rising. In the main reset release process (Fig. 196) executed in this situation, a negative determination is made in step SB301 and steps SB302 to SB309 are executed. This prevents the main process (Fig. 161) from being started while an abnormality is occurring.

The main MPU 222 is released from reset after a partial reset has been performed if the main MPU 222 travels outside the designated area or if the watchdog timer 382 times out. In these cases, the main reset release process is executed when processing is being performed in the audio/video MPU 233 and the dispensing MPU 261, and the voltage of the second normal operating power supplied to the main power supply control unit 253 is stable. In the main reset release process (Fig. 196) executed in this situation, a positive judgment is made in step SB301, and the main process (Fig. 161) is initiated without executing the processes of steps SB302 to SB307 and SB309. This allows the main MPU 222 to quickly return to a state in which the main process (Fig. 161) and timer interrupt process (Fig. 167) are being executed after the reset cause is resolved. This reduces the possibility that the main MPU 222 will fail to receive data sent from the dispensing MPU 261.

<Twenty-first embodiment>
This embodiment differs from the 18th embodiment in that the process for releasing the reset of the main MPU 222 is initiated when the first reset signal of the first and second reset signals becomes HIGH. The following describes the configurations that differ from the 18th embodiment. Note that the description of the same configurations as the 18th embodiment will be omitted.

After the supply of operating power to the main MPU 222 begins, the first reset signal input from the power outage monitoring board 225 to the reset circuit 254 becomes HIGH, and the main reset release process is initiated to release the reset of the main MPU 222. The main reset release process is as already explained in the 20th embodiment with reference to Figure 196.

The reset release conditions for the main MPU 222 do not include the state of the second reset signal input from the main power supply control unit 253 to the reset circuit 254. Furthermore, when the supply of operating power to the main MPU 222 is stopped, the main MPU 222 is reset based on the occurrence of a fall to a low level in at least one of the first reset signal and the second reset signal input to the reset circuit 254. Note that the relationship between the low level and high level in the first reset signal may be reversed, and the relationship between the low level and high level in the second reset signal may be reversed.

Next, the configuration for controlling the first reset execution signal and second reset execution signal output from the reset circuit 254 will be explained with reference to the functional block diagram in Figure 197.

As already explained in the twentieth embodiment above, the reset circuit 254 is provided with a reset control circuit 254b, a first reset execution signal control circuit 254c, and a second reset execution signal control circuit 254d. Furthermore, as shown in FIG. 197, the reset control circuit 254b is provided with a start-time reset control circuit 384 and a stop-time reset control circuit 385.

As already explained in the 20th embodiment above, the reset control circuit 254b receives the first reset signal output from the power outage monitoring board 225, the second reset signal output from the voltage monitoring circuit 354, and the partial reset signal output from the main CPU 251. As shown in FIG. 197, the first reset signal is input to the start-up reset control circuit 384 and the stop-up reset control circuit 385. The second reset signal is input to the stop-up reset control circuit 385, but is not input to the start-up reset control circuit 384.

As already explained in the 20th embodiment above, when the main MPU 222 detects travel outside the designated area or the watchdog timer 382 times out, the main MPU 222 raises the partial reset signal output from the main CPU 251 from LOW to HIGH. The partial reset signal falls to LOW when a partial reset of the main MPU 222 is performed.

First, we will explain what happens when a full reset of the main MPU 222 is performed.

When the voltage of the second normal operating power supplied to the main power supply control unit 253 is +2.1 V or higher, if both the first reset signal and the second reset signal input to the reset control circuit 254b are at a LOW level, the first reset instruction signal output from the reset control circuit 254b to the first reset execution signal control circuit 254c and the second reset instruction signal output from the reset control circuit 254b to the second reset execution signal control circuit 254d are set to a HI level, regardless of the state of some of the reset signals. Furthermore, when the voltage of the second normal operating power supplied to the main power supply control unit 253 is +2.1 V or higher, if a falling edge of the first reset signal input to the stop reset control circuit 385 is detected, the first reset instruction signal output from the reset control circuit 254b to the first reset execution signal control circuit 254c and the second reset instruction signal output from the reset control circuit 254b to the second reset execution signal control circuit 254d are set to HI level, regardless of the states of the second reset signal and the partial reset signal. Furthermore, when the voltage of the second normal operating power supplied to the main power supply control unit 253 is +2.1 V or higher and a falling edge of the second reset signal input to the shutdown reset control circuit 385 is detected, the first reset instruction signal output from the reset control circuit 254b to the first reset execution signal control circuit 254c and the second reset instruction signal output from the reset control circuit 254b to the second reset execution signal control circuit 254d are set to HI level, regardless of the states of the first reset signal and partial reset signal.

When the first reset instruction signal input to the first reset execution signal control circuit 254c is at a high level, the first reset execution signal output from the first reset execution signal control circuit 254c to the main CPU 251 is set to a low level. Furthermore, when the second reset instruction signal input to the second reset execution signal control circuit 254d is at a high level, the second reset execution signal output from the second reset execution signal control circuit 254d to the external register initialization circuit 355 and the supply switching circuit 253a of the main power supply control unit 253 is set to a low level. In this way, when the first reset execution signal output from the first reset execution signal control circuit 254c and the second reset execution signal output from the second reset execution signal control circuit 254d are both set to a low level, a full reset of the main MPU 222 is performed.

When the first reset execution signal input to the main CPU 251 is at a low level, the internal register initialization circuit 251a operates to initialize the registers provided inside the main CPU 251. Furthermore, when the second reset execution signal input to the external register initialization circuit 355 is at a low level, the registers provided outside the main CPU 251 in the main MPU 222 are initialized. Furthermore, when the second reset execution signal input to the supply switching circuit 253a is at a low level, the power supplied to the main RAM 224 is switched from the second normal operating power to backup power.

Next, we will explain the case where the reset of the main MPU 222 is released. When the voltage of the second normal operating power supplied to the main power supply control unit 253 is +2.1 V or higher and a rising edge of the first reset signal input to the start-up reset control circuit 384 is detected, the first reset execution signal output from the first reset execution signal control circuit 254c and the second reset execution signal output from the second reset execution signal control circuit 254d are set to a HIGH level, regardless of the states of the second reset signal and partial reset signal input to the reset control circuit 254b. In this way, when the first reset execution signal and the second reset execution signal are set to a HIGH level, the reset of the main MPU 222 is released. When the second reset execution signal input to the supply switching circuit 253a is at a HIGH level, the power supplied to the main RAM 224 is switched from backup power to second normal operating power.

Next, we will explain the case where a partial reset of the main MPU 222 is performed. When the voltage of the second normal operating power supplied to the main power supply control unit 253 is +2.1 V or higher, if both the first reset signal and the second reset signal input to the reset control circuit 254b are at a high level and the partial reset signal is at a high level, the first reset execution signal output from the first reset execution signal control circuit 254c is set to a low level and the second reset execution signal output from the second reset execution signal control circuit 254d is set to a high level. In this way, when the first reset execution signal is set to a low level and the second reset execution signal is set to a high level, a partial reset of the main MPU 222 is performed. As already explained, when the first reset execution signal input to the internal register initialization circuit 251a is at a low level, the registers provided inside the main CPU 251 are initialized.

Next, the manner in which the reset of the main MPU 222 is released after the supply of operating power to the main MPU 222 has begun will be described with reference to the time chart in Figure 198. Figure 198(a) shows the state in which the main MPU 222 is being reset, Figure 198(b) shows the period in which the main reset release process is executed by the main MPU 222, Figure 198(c) shows the period in which the main process is executed by the main MPU 222, Figure 198(d) shows the state of the first reset signal input to the reset circuit 254, Figure 198(e) shows the state of the second reset signal input to the reset circuit 254, and Figure 198(f) shows the timing at which the supply of operating power to the main MPU 222 begins.

First, we will explain the case where the second reset signal rises first out of the first and second reset signals input to the reset circuit 254.

At timing t1, as shown in FIG. 198(f), when the supply of operating power to the main MPU 222 begins, the voltage of the first normal operating power and the voltage of the second normal operating power monitored by the power outage monitoring board 225 begin to rise, and the voltage of the second normal operating power monitored by the voltage monitoring circuit 354 of the main power supply control unit 253 also begins to rise. Then, at timing t2, when the voltage of the second normal operating power supplied to the main power supply control unit 253 becomes equal to or higher than the operating voltage (+2.1 V) of the main CPU 251, the main MPU 222 is reset, as shown in FIG. 198(a).

After that, at timing t3, when the voltage of the second normal operating power monitored by the voltage monitoring circuit 354 reaches or exceeds +3.1 V (the rising detection voltage in the voltage monitoring circuit 354), the main power supply control unit 253 raises the second reset signal from LOW to HIGH. Then, at timing t3, the second reset signal input to the reset circuit 254 rises as shown in FIG. 198(e).

After that, at timing t4, when the voltage of the second normal operating power monitored by the power outage monitoring board 225 reaches or exceeds +4.0 V (the rising detection voltage on the power outage monitoring board 225), the power outage monitoring board 225 raises the first reset signal from LOW to HIGH. Then, at timing t4, the first reset signal input to the reset circuit 254 rises as shown in FIG. 198(d). This releases the reset of the main MPU 222 as shown in FIG. 198(a). Also, at timing t4, the main reset release process (FIG. 196) is initiated in the main MPU 222 as shown in FIG. 198(b). After that, at timing t5, when the main reset release process (FIG. 196) is completed as shown in FIG. 198(b), the main MPU 222 starts main processing (FIG. 161) as shown in FIG. 198(c).

In this way, in the reset circuit 254, if the second reset signal of the first and second reset signals input to the reset circuit 254 becomes HIGH level first, the first reset signal then becomes HIGH level, and the main side reset release process (Figure 196) is initiated in a state where both the first reset signal and the second reset signal input to the reset circuit 254 are HIGH level.

Next, we will explain the case where the first reset signal rises first out of the first and second reset signals input to the reset circuit 254.

At timing t6, as shown in FIG. 198(f), when the supply of operating power to the main MPU 222 begins, the voltage of the first normal operating power and the voltage of the second normal operating power monitored by the power outage monitoring board 225 begin to rise, and the voltage of the second normal operating power monitored by the voltage monitoring circuit 354 of the main power supply control unit 253 also begins to rise. Then, at timing t7, when the voltage of the second normal operating power supplied to the main power supply control unit 253 becomes equal to or higher than the operating voltage (+2.1V) of the main CPU 251, the main MPU 222 is reset, as shown in FIG. 198(a).

After that, at timing t8, when the voltage of the second normal operating power monitored by the power outage monitoring board 225 reaches or exceeds +4.0 V (the rising detection voltage on the power outage monitoring board 225), the first reset signal input to the reset circuit 254 rises from LOW to HIGH, as shown in FIG. 198(d). This releases the reset of the main MPU 222, as shown in FIG. 198(a). Also, at timing t8, the main reset release process (FIG. 196) is initiated in the main MPU 222, as shown in FIG. 198(b).

After that, at timing t9, the second reset signal input to the reset circuit 254 rises from LOW level to HIGH level, as shown in FIG. 198(e). As a result, both the first reset signal and the second reset signal input to the reset circuit 254 become HIGH level. After that, at timing t10, when the main side reset release processing (FIG. 196) ends as shown in FIG. 198(b), main processing is started by the main side MPU 222 as shown in FIG. 198(c).

As described above, even if the reset circuit 254 is late in detecting the rising edge of the second reset signal, both the first reset signal and the second reset signal input to the reset circuit 254 will be at HI level by the time the main reset release process (Figure 196) is completed. This prevents an extension of the period from when the supply of operating power to the pachinko machine 160 begins to when the main process (Figure 161) is initiated by the main MPU 222, even if the reset circuit 254 is late in detecting the rising edge of the second reset signal.

<Twenty-second embodiment>
This embodiment differs from the 18th embodiment in that the process for releasing the reset of the main MPU 222 is initiated when the second reset signal, of the first and second reset signals, becomes HIGH. The following describes the configurations that differ from the 18th embodiment. Note that the description of the same configurations as the 18th embodiment will be omitted.

After the supply of operating power to the main MPU 222 begins, the second reset signal input from the main power supply control unit 253 to the reset circuit 254 becomes HIGH, and a main reset release process is initiated to release the reset of the main MPU 222. The main reset release process is as already explained in the 20th embodiment above with reference to the flowchart in Figure 196.

The reset release conditions for the main MPU 222 do not include the state of the first reset signal input to the reset circuit 254 from the power outage monitoring board 225. On the other hand, when the supply of operating power to the main MPU 222 is stopped, the main MPU 222 is reset based on the occurrence of a fall to a low level in at least one of the first reset signal and the second reset signal input to the reset circuit 254. Note that the relationship between the low level and high level in the first reset signal may be reversed, and the relationship between the low level and high level in the second reset signal may be reversed.

Next, the configuration for controlling the first reset execution signal and second reset execution signal output from the reset circuit 254 will be explained with reference to the functional block diagram in Figure 199.

As already explained in the twentieth embodiment, the reset circuit 254 is provided with a reset control circuit 254b, a first reset execution signal control circuit 254c, and a second reset execution signal control circuit 254d. Furthermore, as shown in FIG. 199, the reset control circuit 254b is provided with a start-time reset control circuit 384 and a stop-time reset control circuit 385.

As already explained in the 20th embodiment above, the reset control circuit 254b receives the first reset signal output from the power outage monitoring board 225, the second reset signal output from the voltage monitoring circuit 354, and the partial reset signal output from the main CPU 251. As shown in FIG. 199, the first reset signal is input to the stop reset control circuit 385, but is not input to the start reset control circuit 384. The second reset signal is input to the start reset control circuit 384 and the stop reset control circuit 385.

As already explained in the 20th embodiment above, when the main MPU 222 detects travel outside the designated area or the watchdog timer 382 times out, the main MPU 222 raises the partial reset signal output from the main CPU 251 from LOW to HIGH. The partial reset signal falls to LOW when a partial reset of the main MPU 222 is performed.

First, we will explain what happens when a full reset of the main MPU 222 is performed.

When the voltage of the second normal operating power supplied to the main power supply control unit 253 is +2.1 V or higher, if both the first reset signal and the second reset signal input to the reset control circuit 254b are at a LOW level, the first reset instruction signal output from the reset control circuit 254b to the first reset execution signal control circuit 254c is set to a HIGH level, and the second reset instruction signal output from the reset control circuit 254b to the second reset execution signal control circuit 254d is set to a HIGH level, regardless of the state of some of the reset signals. Furthermore, when the voltage of the second normal operating power supplied to the main power supply control unit 253 is +2.1 V or higher and a falling edge of the first reset signal input to the stop reset control circuit 385 is detected, the first reset instruction signal output from the reset control circuit 254b to the first reset execution signal control circuit 254c is set to a HI level, and the second reset instruction signal output from the reset control circuit 254b to the second reset execution signal control circuit 254d is set to a HI level, regardless of the states of the second reset signal and the partial reset signal. Furthermore, when the voltage of the second normal operating power supplied to the main power supply control unit 253 is +2.1 V or higher and a falling edge of the second reset signal input to the shutdown reset control circuit 385 is detected, the first reset instruction signal output from the reset control circuit 254b to the first reset execution signal control circuit 254c is set to HI level, and the second reset instruction signal output from the reset control circuit 254b to the second reset execution signal control circuit 254d is set to HI level, regardless of the states of the first reset signal and partial reset signal.

When the first reset instruction signal input to the first reset execution signal control circuit 254c is at a high level, the first reset execution signal output from the first reset execution signal control circuit 254c to the internal register initialization circuit 251a of the main CPU 251 is set to a low level. Furthermore, when the second reset instruction signal input to the second reset execution signal control circuit 254d is at a high level, the second reset execution signal output from the second reset execution signal control circuit 254d to the external register initialization circuit 355 and the supply switching circuit 253a of the main power supply control unit 253 is set to a low level. In this way, when the first reset execution signal output from the first reset execution signal control circuit 254c and the second reset execution signal output from the second reset execution signal control circuit 254d are both set to a low level, a full reset of the main MPU 222 is performed.

When the first reset execution signal input to the main CPU 251 is at a low level, the internal register initialization circuit 251a operates to initialize the registers provided inside the main CPU 251. Furthermore, when the second reset execution signal input to the external register initialization circuit 355 is at a low level, the registers provided outside the main CPU 251 in the main MPU 222 are initialized. Furthermore, when the second reset execution signal input to the supply switching circuit 253a is at a low level, the power supplied to the main RAM 224 is switched from the second normal operating power to backup power.

Next, we will explain the case where the reset of the main MPU 222 is released. When the voltage of the second normal operating power supplied to the main power supply control unit 253 is +2.1 V or higher and a rising edge of the second reset signal input to the start-up reset control circuit 384 is detected, the first reset execution signal output from the first reset execution signal control circuit 254c and the second reset execution signal output from the second reset execution signal control circuit 254d are set to a HIGH level, regardless of the states of the first reset signal and partial reset signal input to the reset control circuit 254b. In this way, when the first reset execution signal and the second reset execution signal are set to a HIGH level, the reset of the main MPU 222 is released. When the second reset execution signal input to the supply switching circuit 253a is at a HIGH level, the power supplied to the main RAM 224 is switched from backup power to second normal operating power.

Next, we will explain the case where a partial reset of the main MPU 222 is performed. When the voltage of the second normal operating power supplied to the main power supply control unit 253 is +2.1 V or higher, if both the first reset signal and the second reset signal input to the reset control circuit 254b are at a high level and the partial reset signal is at a high level, the first reset execution signal output from the first reset execution signal control circuit 254c is set to a low level and the second reset execution signal output from the second reset execution signal control circuit 254d is set to a high level. In this way, when the first reset execution signal is set to a low level and the second reset execution signal is set to a high level, a partial reset of the main MPU 222 is performed. As already explained, when the first reset execution signal input to the internal register initialization circuit 251a is at a low level, the registers provided inside the main CPU 251 are initialized.

Next, the manner in which the reset of the main MPU 222 is released after the supply of operating power to the main MPU 222 has begun will be described with reference to the time chart in Figure 200. Figure 200(a) shows the state in which the main MPU 222 is being reset, Figure 200(b) shows the period in which the main reset release process (Figure 196) is executed by the main MPU 222, Figure 200(c) shows the period in which the main process is executed by the main MPU 222, Figure 200(d) shows the state of the first reset signal input to the reset circuit 254, Figure 200(e) shows the state of the second reset signal input to the reset circuit 254, and Figure 200(f) shows the timing at which the supply of operating power to the main MPU 222 begins.

At timing t1, as shown in Figure 200(f), when the supply of operating power to the main MPU 222 begins, the voltage of the first normal operating power and the voltage of the second normal operating power monitored by the power outage monitoring board 225 begin to rise, and the voltage of the second normal operating power monitored by the voltage monitoring circuit 354 of the main power supply control unit 253 also begins to rise. Then, at timing t2, when the voltage of the second normal operating power supplied to the main power supply control unit 253 becomes equal to or higher than the operating voltage (+2.1V) of the main CPU 251, the main MPU 222 is reset as shown in Figure 200(a).

After that, at timing t3, when the voltage of the second normal operating power monitored by the voltage monitoring circuit 354 reaches or exceeds +3.1 V (the rising detection voltage in the voltage monitoring circuit 354), the main power supply control unit 253 raises the second reset signal from LOW to HIGH. Then, at timing t3, the second reset signal input to the reset circuit 254 rises to HIGH, as shown in Figure 200(e). This releases the reset of the main MPU 222, as shown in Figure 200(a). Also, at timing t3, the main reset release process (Figure 196) is initiated in the main MPU 222, as shown in Figure 200(b).

After that, at timing t4, when the voltage of the first normal operating power monitored by the power outage monitoring board 225 reaches or exceeds +4.0 V (the rising detection voltage on the power outage monitoring board 225), the power outage monitoring board 225 raises the first reset signal from LOW to HI. Then, at timing t4, the first reset signal input to the reset circuit 254 rises to HI, as shown in Figure 200(d). As a result, both the first reset signal and the second reset signal input to the reset circuit 254 are at HI. After that, at timing t5, when the main side reset release process (Figure 194) ends as shown in Figure 200(b), main processing is started in the main side MPU 222 as shown in Figure 200(c).

In this way, after the supply of operating power to the pachinko machine 160 has started, the second reset signal input to the reset circuit 254 has gone high, and the main reset release process (Fig. 196) is initiated even if the first reset signal has not risen to high. This shortens the period from when the supply of operating power to the pachinko machine 160 starts until main processing is initiated by the main MPU 222.

<Twenty-third embodiment>
In this embodiment, the contents of the dispensing side reset release process executed by the dispensing side MPU 261 differ from those of the 18th embodiment. The following describes the configuration that differs from the 18th embodiment. Note that the description of the same configuration as the 18th embodiment will be omitted.

The dispensing-side MPU 261 has a register inside the dispensing-side CPU 262, as well as a register outside the dispensing-side CPU 262. The register inside the dispensing-side CPU 262 is a register in which data required for executing processing in the dispensing-side MPU 261 is temporarily stored. In addition, the register outside the dispensing-side CPU 262 is a register in which data is set to use peripheral functions such as input and output ports of the dispensing-side MPU 261.

The dispensing-side MPU 261 can be reset either completely or partially. As already explained in the 18th embodiment, the dispensing-side MPU 261 can be reset either when a low level dispensing-side reset signal is detected or when the dispensing-side MPU 261 detects travel outside the designated area. If the reset is caused by the detection of a low level dispensing-side reset signal, a full reset of the dispensing-side MPU 261 is performed. If the reset is caused by travel outside the designated area, a partial reset of the dispensing-side MPU 261 is performed. If a full reset of the dispensing-side MPU 261 is performed, the registers provided within the dispensing-side CPU 262 and the registers provided external to the dispensing-side CPU 262 are initialized in the dispensing-side MPU 261. Furthermore, when a partial reset of the dispensing side MPU 261 is performed, the dispensing side MPU 261 initializes the registers provided inside the dispensing side CPU 262, but does not initialize the registers provided outside the dispensing side CPU 262.

Figure 201 is a flowchart showing the dispensing side reset release process executed by the dispensing side MPU 261 in this embodiment. As already explained in the 18th embodiment above, the dispensing side reset release process is executed when the dispensing side MPU 261 is released from reset. Furthermore, the dispensing side reset release process is initiated in a state where data reception at the first receiving terminal 361 and the second receiving terminal 362 is prohibited.

First, it is determined whether the cause of this reset was the detection of driving outside the designated area by the dispensing side MPU 261 (step SB401). As already explained, there are two causes for a reset of the dispensing side MPU 261: the detection of a LOW level in the dispensing side reset signal, and the detection of driving outside the designated area by the dispensing side MPU 261. If the cause of this reset was the detection of driving outside the designated area by the dispensing side MPU 261, the process proceeds to step SB408 without executing the processing of steps SB402 to SB407 and step SB410.

If the cause of this reset was the detection of a LOW level in the dispensing side reset signal (step SB401: NO), steps SB402 to SB407 execute the same processing as steps SA701 to SA706 of the dispensing side reset release processing (FIG. 187) in the 18th embodiment. Specifically, dispensing side status confirmation processing is first executed (step SB402). In the dispensing side status confirmation processing, processing is performed to confirm that no abnormalities have occurred in the programs set in the dispensing side ROM 263 and that no abnormalities have been detected in the circuitry built into the dispensing side MPU 261.

If no abnormality is identified in the dispensing side status confirmation process (step SB402) (step SB403: NO), the dispensing side reception permission process is executed, causing data received at the first receiving terminal 361 or the second receiving terminal 362 to be stored in the dispensing side receiving buffer 363 (step SB404).

Then, a dispensing side release waiting period (specifically, 1 second) is set in a timer circuit (not shown) provided in the dispensing side MPU 261 (step SB405), and it is determined whether the dispensing side release waiting period has elapsed (step SB406). If the dispensing side release waiting period has not elapsed (step SB406: NO), the determination process of step SB406 is repeated until the dispensing side release waiting period has elapsed. If the dispensing side release waiting period has elapsed (step SB406: YES), it is determined whether the data volume of the information stored in the dispensing side receive buffer 363 is equal to or greater than the dispensing side abnormality standard amount (specifically, 20 bytes) (step SB407).

If step SB401 determines that the cause of this reset was the detection of travel outside the designated area by the dispensing side MPU 261 (step SB401: YES), or if the data volume of information stored in the dispensing side receiving buffer 363 is less than the dispensing side abnormality reference amount (step SB407: YES), steps SB408 and SB409 execute the same processing as steps SA707 and SA708 of the dispensing side reset release processing (FIG. 187) in the 18th embodiment described above. Specifically, by executing the reset response signal raising processing, the reset response signal output from the reset response output terminal 368 is raised from LOW level to HIGH level (step SB408). This enables the first receiving terminal 361 to receive information output from the main side MPU 222, and the second receiving terminal 362 to receive information output from the management unit 170. Then, a jump to the start address of the dispensing side main processing is performed (step SB409). This starts the payout main process. The payout main process is as described in the 18th embodiment above.

If an abnormality is detected during the payout side status confirmation process (step SB403: YES), or if the data volume of information stored in the payout side receive buffer 363 is equal to or greater than the payout side abnormality reference amount (step SB407: YES), payout side execution stop processing is executed (step SB410), similar to step SA709 of the payout side reset release processing (FIG. 187) in the 18th embodiment. The payout side execution stop processing executes processing to stop the operation of the payout side MPU 261. This prevents the payout side main processing from being executed without resolving the abnormality if an abnormality is detected during reset release of the payout side MPU 261.

As described above, if the reset cause is the falling edge of the dispensing side reset signal, a situation occurs in which a dispensing side release standby period is set, whereas if the reset cause is driving outside the designated area in the dispensing side MPU 261, a situation in which a dispensing side release standby period is set does not occur. As a result, if the dispensing side MPU 261 is reset based on the falling edge of the dispensing side reset signal, the operation of the dispensing side MPU 261 is stopped based on the data volume of the information stored in the dispensing side receive buffer 363 exceeding the dispensing side abnormality reference amount. However, if the dispensing side MPU 261 is reset based on the occurrence of driving outside the designated area in the dispensing side MPU 261, it is possible to prevent the operation of the dispensing side MPU 261 from being stopped due to the first receiving terminal 361 or the second receiving terminal 362 receiving data output from the main side MPU 222 or management unit 170 before the dispensing side main processing is started.

<Other Embodiments>
The present invention is not limited to the contents of the above-described embodiments, and various modifications and improvements are possible within the scope of the spirit of the present invention. For example, the following changes may be made. The configurations of the following alternative embodiments may be applied individually to the configurations of the above-described embodiments, or may be applied in combination. The configurations of the above-described embodiments may be applied in combination with each other, and the configurations of the following alternative embodiments may be applied individually or in combination with a configuration obtained by combining the configurations of the above-described embodiments with each other.

(1) Although the configuration is such that backup power is not supplied to the performance-side RAM 94, an alternative configuration is possible in which backup power is supplied to the performance-side RAM 94. In this case, backup power may be supplied to the entire performance-side RAM 94. This ensures that all information stored in the performance-side RAM 94 is retained even if the supply of operating power is stopped. Alternatively, a configuration may be such that backup power is supplied only to a backup area provided in the performance-side RAM 94. The backup area includes the remaining number of display targets counter 94a, the remaining number of non-display targets counter 94b, the number of AT acquisitions counter 94c, and the number of AT consumption counter 94d, but does not include a memory area in which other information for executing performances is stored. This makes it possible to store and retain the values of the various counters 94a to 94d in a configuration that reduces the amount of power required for backup. Furthermore, in a configuration in which backup power is supplied to the performance-side RAM 94 as described above, it is preferable that when a partial clear process (step S105) or full clear process (step S106) of the main RAM 74 is executed, a corresponding command is sent to the performance-side MPU 92, and initialization processing corresponding to that command is performed on the performance-side RAM 94.

(2) In a configuration in which the ending condition for the second section SC2 is basically met depending on the value of the total number of wins counter 96d, if the ending condition is met based on the value of the number of continued games counter 96c, it may be determined that an abnormality has occurred, and abnormality response processing such as an abnormality notification may be executed.

(3) In the fifth to seventh embodiments, the type of color bell winning combination that has been achieved may be determined based on the remainder obtained when the numerical information set in the index value counter 74a is divided by 3. Specifically, the color bell winning combinations include the first to third red bell winning combinations, the first to third black bell winning combinations, and the first to third blue bell winning combinations. In the role lottery table referenced in the role lottery process executed in non-bonus state, the first red bell winning data is set to index value IV=1, the first black bell winning data is set to index value IV=2, the first blue bell winning data is set to index value IV=3, the second red bell winning data is set to index value IV=4, the second black bell winning data is set to index value IV=5, the second blue bell winning data is set to index value IV=6, the third red bell winning data is set to index value IV=7, the third black bell winning data is set to index value IV=8, and the third blue bell winning data is set to index value IV=9.

Index values IV = 1, 4, 7, which have red bell winning data set, are all numerical information that gives a remainder of 1 when divided by 3; index values IV = 2, 5, 8, which have black bell winning data set, are all numerical information that gives a remainder of 2 when divided by 3; and index values IV = 3, 6, 9, which have blue bell winning data set, are all numerical information that gives a remainder of 0 when divided by 3. When any of the color bell winnings is achieved, the number of game media awarded is 15. Furthermore, this number of 15 is not set as the number of game media awarded when a minor winning combination other than a color bell winning is achieved. The main RAM 74 is provided with a red achievement flag that allows the main MPU 72 to determine when the mission of achieving any one of the red bell wins has been achieved in the AT state ST14, a black achievement flag that allows the main MPU 72 to determine when the mission of achieving any one of the black bell wins has been achieved, and a blue achievement flag that allows the main MPU 72 to determine when the mission of achieving any one of the blue bell wins has been achieved.

In the achievement response processing in the main MPU 72 (see FIG. 79), if the value of the payout number counter in the main RAM 74 is "15," the remainder when the value of the index value counter 74a is divided by "3" is calculated, and it is determined whether the calculated remainder is "1." If the calculated remainder is "1," processing is executed to set the red achievement flag to "1." This simplifies the processing configuration for setting the red achievement flag to "1" based on the establishment of any red bell winning. Furthermore, if the calculated remainder is not "1," it is determined whether the calculated remainder is "2." If the calculated remainder is "2," processing is executed to set the black achievement flag to "1." Furthermore, if the calculated remainder is not "2," i.e., if the calculated remainder is "0," processing is executed to set the blue achievement flag to "1." This simplifies the processing configuration for setting the black achievement flag to "1" when any black bell win occurs, and for setting the blue achievement flag to "1" when any blue bell win occurs.

(4) In the configuration described in (3) above, when an index value IV set with any color bell winning data is selected during the lottery process for the role in AT state ST14, the type of reel 32L, 32M, or 32R that should be stopped first to achieve the corresponding color bell winning may be determined based on the type of numerical range that the index value IV falls within. Specifically, the first red bell winning data, the first black bell winning data, and the first blue bell winning data are winning data that can achieve the corresponding color bell winning by making the first stop on the left reel 32L; the second red bell winning data, the second black bell winning data, and the second blue bell winning data are winning data that can achieve the corresponding color bell winning by making the first stop on the center reel 32M; and the third red bell winning data, the third black bell winning data, and the third blue bell winning data are winning data that can achieve the corresponding color bell winning by making the first stop on the right reel 32R. The index value IV, which has winning data set to enable a corresponding colored bell win when the first stop is on the left reel 32L, is within the numerical range of "1" to "3", the index value IV, which has winning data set to enable a corresponding colored bell win when the first stop is on the center reel 32M, is within the numerical range of "4" to "6", and the index value IV, which has winning data set to enable a corresponding colored bell win when the first stop is on the right reel 32R, is within the numerical range of "7" to "9".

In the stop operation notification control process (see FIG. 74) in the main MPU 72, when the AT state ST14 is reached and the value of the index value counter 74a is equal to or greater than "1," a determination is made as to whether the value of the index value counter 74a is equal to or less than "3." If a positive determination is made, a left stop operation notification command is read from the main ROM 73 to notify that the first stop will be the left reel 32L. Furthermore, if the value of the index value counter 74a is not equal to or less than "3," a determination is made as to whether the value of the index value counter 74a is equal to or less than "6." If a positive determination is made, a center stop operation notification command is read from the main ROM 73 to notify that the first stop will be the center reel 32M. Furthermore, if the value of the index value counter 74a is not "6" or less, it is determined whether the value of the index value counter 74a is "9" or less, and if a positive determination is made, a right stop operation notification command is read from the main ROM 73 to notify that the first stop will be the right reel 32R. This simplifies the processing configuration for processing to read a left stop operation notification command based on winning an index value IV to which any of the first red bell winning data, first black bell winning data, and first blue bell winning data is set; processing to read a center stop operation notification command based on winning an index value IV to which any of the second red bell winning data, second black bell winning data, and second blue bell winning data is set; and processing to read a right stop operation notification command based on winning an index value IV to which any of the third red bell winning data, third black bell winning data, and third blue bell winning data is set.

(5) In the fifth to seventh embodiments, the type of color bell winning combination that has been achieved may be determined based on the remainder obtained when the numerical information set in the index value counter 74a is divided by 4. Specifically, the color bell winning combinations include the first to third red bell winning combinations, the first to third yellow bell winning combinations, the first to third black bell winning combinations, and the first to third blue bell winning combinations. In the role lottery table referenced in the role lottery process executed in non-bonus state, the first red bell winning data is set to index value IV=1, the first yellow bell winning data is set to index value IV=2, the first black bell winning data is set to index value IV=3, the first blue bell winning data is set to index value IV=4, the second red bell winning data is set to index value IV=5, the second yellow bell winning data is set to index value IV=6, the second black bell winning data is set to index value IV=7, the second blue bell winning data is set to index value IV=8, the third red bell winning data is set to index value IV=9, the third yellow bell winning data is set to index value IV=10, the third black bell winning data is set to index value IV=11, and the third blue bell winning data is set to index value IV=12.

Index values IV = 1, 5, and 9, which are set with red bell winning data, are all numerical information that gives a remainder of 1 when divided by 4; index values IV = 2, 6, and 10, which are set with yellow bell winning data, are all numerical information that gives a remainder of 2 when divided by 4; index values IV = 3, 7, and 11, which are set with black bell winning data, are all numerical information that gives a remainder of 3 when divided by 4; and index values IV = 4, 8, and 12, which are set with blue bell winning data, are all numerical information that gives a remainder of 0 when divided by 4. When any of the color bell winnings is achieved, the number of game media awarded is 15. Furthermore, this number of 15 is not set as the number of game media awarded when a minor prize other than a color bell winning is achieved. The main RAM 74 is provided with a red achievement flag that allows the main MPU 72 to determine that the mission of achieving any one of the red bell wins has been achieved in AT state ST14, a yellow achievement flag that allows the main MPU 72 to determine that the mission of achieving any one of the yellow bell wins has been achieved, a black achievement flag that allows the main MPU 72 to determine that the mission of achieving any one of the black bell wins has been achieved, and a blue achievement flag that allows the main MPU 72 to determine that the mission of achieving any one of the blue bell wins has been achieved.

In the achievement response processing in the main MPU 72 (see FIG. 79), when the value of the payout number counter in the main RAM 74 is "15," the remainder when the value of the index value counter 74a is divided by "4" is calculated, and it is determined whether the calculated remainder is "1." If the calculated remainder is "1," processing is executed to set the red achievement flag to "1." This simplifies the processing configuration for setting the red achievement flag to "1" based on the establishment of any red bell winning. Furthermore, if the calculated remainder is not "1," it is determined whether the calculated remainder is "2." If the calculated remainder is "2," processing is executed to set the yellow achievement flag to "1." Furthermore, if the calculated remainder is not "2," it is determined whether the calculated remainder is "3." If the calculated remainder is "3," processing is executed to set the black achievement flag to "1." Furthermore, if the calculated remainder is not "3", that is, if the calculated remainder is "0", processing is performed to set the blue achievement flag to "1". This simplifies the processing configuration for the processing to set the black achievement flag to "1" based on the achievement of any yellow bell win, the processing to set the black achievement flag to "1" based on the achievement of a black bell win, and the processing to set the blue achievement flag to "1" based on the achievement of any blue bell win.

(6) In the configuration of (5) above, the type of color bell winning that has been achieved may be determined based on the values of the lowest two bits (bit 0 and bit 1) of the index value counter 74a. Specifically, index values IV = 1, 5, 9, in which red bell winning data is set, are all numerical information in which the lowest two bits of the index value counter 74a are "01." index values IV = 2, 6, 10, in which yellow bell winning data is set, are all numerical information in which the lowest two bits of the index value counter 74a are "10." index values IV = 3, 7, 11, in which black bell winning data is set, are all numerical information in which the lowest two bits of the index value counter 74a are "11." index values IV = 4, 8, 12, in which blue bell winning data is set, are all numerical information in which the lowest two bits of the index value counter 74a are "00."

In the achievement response process (see FIG. 79) in the main MPU 72, if the value of the payout counter in the main RAM 74 is "15," the process determines whether the value of the first bit in the index value counter 74a is "1." If the value of the first bit is "1," the process determines whether the value of the zeroth bit is "1." If the value of the zeroth bit is "1," the process executes a process to set the black achievement flag to "1." If the value of the zeroth bit is "0," the process executes a process to set the yellow achievement flag to "1." This simplifies the process for setting the black achievement flag to "1" based on the establishment of any black bell win, and the process for setting the yellow achievement flag to "1" based on the establishment of any yellow bell win. Furthermore, if the value of the first bit in the index value counter 74a is not "1," the process determines whether the value of the zeroth bit is "1." If the value of bit 0 is "1", processing is performed to set the red achievement flag to "1", and if the value of bit 0 is "0", processing is performed to set the blue achievement flag to "1". This simplifies the processing structure for setting the red achievement flag to "1" based on the achievement of any red bell win, and for setting the blue achievement flag to "1" based on the achievement of any blue bell win.

(7) In the configuration of (5) or (6) above, if an index value IV to which any color bell winning data is set is won in the role lottery process in AT state ST14, the type of reel 32L, 32M, 32R that should be stopped first to achieve the corresponding color bell winning may be determined based on the type of numerical range that the index value IV falls into. Specifically, the first red bell winning data, the first yellow bell winning data, the first black bell winning data, and the first blue bell winning data are winning data that make it possible to win the corresponding color bell by making the first stop on the left reel 32L, the second red bell winning data, the second yellow bell winning data, the second black bell winning data, and the second blue bell winning data are winning data that make it possible to win the corresponding color bell by making the first stop on the middle reel 32M, and the third red bell winning data, the third yellow bell winning data, the third black bell winning data, and the third blue bell winning data are winning data that make it possible to win the corresponding color bell by making the first stop on the right reel 32R. The index value IV, which has winning data set to enable a corresponding colored bell win when the first stop is on the left reel 32L, is within the numerical range of "1" to "4", the index value IV, which has winning data set to enable a corresponding colored bell win when the first stop is on the center reel 32M, is within the numerical range of "5" to "8", and the index value IV, which has winning data set to enable a corresponding colored bell win when the first stop is on the right reel 32R, is within the numerical range of "9" to "12".

In the stop operation notification control process (see FIG. 74) in the main MPU 72, when the AT state ST14 is reached and the value of the index value counter 74a is equal to or greater than "1," a determination is made as to whether the value of the index value counter 74a is equal to or less than "4." If a positive determination is made, a left stop operation notification command is read from the main ROM 73 to notify that the first stop will be the left reel 32L. Furthermore, if the value of the index value counter 74a is not equal to or less than "4," a determination is made as to whether the value of the index value counter 74a is equal to or less than "8." If a positive determination is made, a center stop operation notification command is read from the main ROM 73 to notify that the first stop will be the center reel 32M. Furthermore, if the value of the index value counter 74a is not "8" or less, the controller 71 determines whether the value of the index value counter 74a is "12" or less, and if a positive determination is made, the controller 71 reads from the main ROM 73 a right stop operation notification command to notify the right reel 32R of the first stop. This simplifies the processing configuration for: a process for reading a left stop operation notification command based on a win for an index value IV in which any of the first red bell winning data, first yellow bell winning data, first black bell winning data, and first blue bell winning data is set; a process for reading a center stop operation notification command based on a win for an index value IV in which any of the second red bell winning data, second yellow bell winning data, second black bell winning data, and second blue bell winning data is set; and a process for reading a right stop operation notification command based on a win for an index value IV in which any of the third red bell winning data, third yellow bell winning data, third black bell winning data, and third blue bell winning data is set.

(8) In the fifth to seventh embodiments described above, the achievement of a color bell winning event, which is set as the subject of the additional lottery, may be determined based on the remainder when the value of the payout number counter in the main RAM 74 is divided by "3." Specifically, the payout number counter is set to the number of game media awarded corresponding to the small winning combination achieved in the current game. Color bell winning events include first to third red bell winning events and first to third black bell winning events. The number of game media awarded when the first red bell winning event is achieved is "5," the number of game media awarded when the second red bell winning event is achieved is "8," and the number of game media awarded when the third red bell winning event is achieved is "11." Furthermore, when the first black bell win is achieved, the number of game media awarded is "14," when the second black bell win is achieved, the number of game media awarded is "17," and when the third black bell win is achieved, the number of game media awarded is "20." The numerical information set in the payout number counter based on the achievement of either the red bell win or the black bell win is numerical information that, when divided by "3," results in a remainder of "2." Furthermore, as minor prizes other than the red bell win and the black bell win, there are the cherry win, which awards "1" game media, and the watermelon win, which awards "3" game media. When the numerical information set in the payout number counter based on the achievement of a minor prize other than the red bell win or the black bell win is divided by "3," the remainder is either "1" or "0," not "2." The main MPU 72 determines that either the first to third red bell wins or the first to third black bell wins have occurred by determining that the remainder when the payout number counter value is divided by "3" is "2." This simplifies the processing configuration for determining whether either the first to third red bell wins or the first to third black bell wins have occurred.

In AT state ST14, an additional lottery process is executed to determine whether to increase the remaining number of awards in AT state ST14 based on the establishment of any of the first to third red bell wins or the first to third black bell wins. If any of the red bell wins is established, the additional lottery process is executed with reference to the first additional lottery table, which sets the probability of an additional win at 10%, and if any of the black bell wins is established, the additional lottery process is executed with reference to the second additional lottery table, which sets the probability of an additional win at 20%. If any of the red bell wins is established, the number of awards of gaming media ("5", "8", and "11") is all numerical information less than "12", and if any of the black bell wins is established, the number of awards of gaming media ("14", "17", and "20") is all numerical information greater than "12".

The AT processing in the main MPU 72 (see FIG. 78) calculates the remainder when the value of the payout number counter is divided by "3" and determines whether the remainder is "2." If the remainder is "2," i.e., if any of the first to third red bell wins and the first to third black bell wins, which are the subject of the additional lottery processing, are achieved, a determination process is executed to determine whether the value of the payout number counter is "12" or greater. If a negative determination is made in the determination process, the first additional lottery table is read from the main ROM 73, and if a positive determination is made in the determination process, the second additional lottery table is read from the main ROM 73. This simplifies the processing configuration for reading the first additional lottery table based on the achievement of any red bell win, and the processing for reading the second additional lottery table based on the achievement of any black bell win. In this way, the additional lottery process is executed based on the remainder being "2" when the value of the payout number counter is divided by "3", which simplifies the processing configuration for executing the additional lottery process based on the achievement of either the first to third red bell wins or the first to third black bell wins.

(9) In the fifth to seventh embodiments, the achievement of a color bell winning event, which is set as the target of the additional lottery, may be determined based on the value of the first bit in the payout number counter of the main RAM 74. Specifically, the payout number counter is set to the number of game media awarded corresponding to the small win achieved in the current game. Color bell winning events include first to third red bell winning events and first to third black bell winning events. The number of game media awarded when the first red bell winning event is achieved is "3," the number of game media awarded when the second red bell winning event is "7," and the number of game media awarded when the third red bell winning event is "11." Furthermore, the number of game media awarded when the first black bell winning event is "15," the number of game media awarded when the second black bell winning event is "19," and the number of game media awarded when the third black bell winning event is "23." The numerical information set in the payout coin counter based on the realization of either the red bell win or the black bell win is numerical information with the first bit value set to "1." Furthermore, other minor prizes besides the red bell win and the black bell win include the cherry win, which awards four gaming media, and the watermelon win, which awards five gaming media. The first bit of the numerical information set in the payout coin counter based on the realization of a minor prize other than the red bell win or the black bell win is set to "0," not "1." The main MPU 72 determines that either the first through third red bell wins or the first through third black bell wins have been achieved by determining that the first bit value in the payout coin counter is set to "1." This simplifies the processing configuration for determining whether either the first through third red bell wins or the first through third black bell wins have been achieved.

In AT state ST14, based on the establishment of any of the first to third red bell wins and the first to third black bell wins, an additional lottery process is executed to determine whether to increase the remaining number of awards in AT state ST14. If any of the red bell wins is established, the additional lottery process is executed with reference to the first additional lottery table, which sets the probability of an additional win at 10%, and if any of the black bell wins is established, the additional lottery process is executed with reference to the second additional lottery table, which sets the probability of an additional win at 20%. If any of the red bell wins is established, the number of game media awarded ("3," "7," and "11") is all numerical information less than "12," and if any of the black bell wins is established, the number of game media awarded ("15," "19," and "23") is all numerical information greater than "12."

The AT processing in the main MPU 72 (see FIG. 78) determines whether the value of the first bit in the payout number counter is "1." If the value of the first bit is "1," i.e., if any of the first to third red bell wins and the first to third black bell wins, which are the subject of the bonus lottery processing, are achieved, a determination process is executed to determine whether the value of the payout number counter is "12" or greater. If a negative determination is made in the determination process, the first bonus lottery table is read from the main ROM 73, and if a positive determination is made in the determination process, the second bonus lottery table is read from the main ROM 73. This simplifies the processing configuration for reading the first bonus lottery table based on the achievement of any red bell win, and the processing for reading the second bonus lottery table based on the achievement of any black bell win. In this way, by configuring the additional lottery process to be executed based on the value of the first bit in the payout number counter being "1," it is possible to simplify the processing configuration for the process to be executed based on the achievement of either the first to third red bell wins or the first to third black bell wins.

(10) In the fifth to seventh embodiments described above, when the total number of bonus points earned during AT state ST14 reaches an upper limit (specifically, "100"), the remaining number of awarded gaming media in AT state ST14 is increased by "30." The color bell winning event may be identified based on the value of the 0th bit in the earned point counter provided in the main RAM 74. The earned point counter is a counter that enables the main MPU 72 to grasp the bonus points earned in the current game. Color bell winning events include the first to sixth red bell winning events and the first to sixth black bell winning events. In AT state ST14, if any of the first to sixth red bell winning events is achieved, a lottery for red bell bonus points is held, and if any of the first to sixth black bell winning events is achieved, a lottery for black bell bonus points is held. The bonus points won in any of the bonus point winning events is set in the earned point counter in the main RAM 74. In the red bell extra points lottery, you are guaranteed to win one of the extra points "2", "6", "10", or "14", and in the black bell extra points lottery, you are guaranteed to win one of the extra points "3", "7", "11", or "15". All extra points that can be won in the red bell extra points lottery are even numbers with a 0th bit value of "0", and all extra points that can be won in the black bell extra points lottery are odd numbers with a 1th bit value.

The upper lamp 61, speaker 62, and image display device 63 provide effects to indicate that additional points have been acquired: a first red bell acquisition effect that indicates that additional points within a relatively small first numerical range (a numerical range of "1" to "7") have been acquired based on the achievement of any red bell win; a second red bell acquisition effect that indicates that additional points within a relatively large second numerical range (a numerical range of "8" to "15") have been acquired based on the achievement of any red bell win; a first black bell acquisition effect that indicates that additional points within a relatively small first numerical range (a numerical range of "1" to "7") have been acquired based on the achievement of any black bell win; and a second black bell acquisition effect that indicates that additional points within a relatively large second numerical range (a numerical range of "8" to "15") have been acquired based on the achievement of any black bell win.

After the red bell bonus point lottery or black bell bonus point lottery is executed to select one of the bonus points and set the selected bonus points in the earned point counter in the main RAM 74, the main MPU 72 executes a determination process to determine whether the value of the earned point counter is equal to or greater than 8. If the determination process returns a negative result, the main MPU 72 reads a first earning effect command from the main ROM 73, and if the determination process returns a positive result, the main MPU 72 reads a second earning effect command from the main ROM 73. This simplifies the processing configuration for reading the first earning effect command based on the selection of numerical information within a relatively small first numerical range (1 to 7) as the bonus points to be awarded, and for reading the second earning effect command based on the selection of numerical information within a relatively large second numerical range (8 to 15) as the bonus points to be awarded.

Then, it determines whether the value of bit 0 in the acquisition point counter is "1," and if the value of bit 0 is "1," it sets black bell winning information to the first acquisition effect command or second acquisition effect command that has been read. The presentation-side MPU 92 executes the first acquisition effect for the black bell if black bell winning information is set in the first acquisition effect command received from the main MPU 72, and executes the first acquisition effect for the red bell if black bell winning information is not set in the first acquisition effect command received from the main MPU 72. Furthermore, the presentation-side MPU 92 executes the second acquisition effect for the black bell if black bell winning information is set in the second acquisition effect command received from the main MPU 72, and executes the second acquisition effect for the red bell if black bell winning information is not set in the second acquisition effect command received from the main MPU 72. In this way, by configuring the black bell winning information to be set based on the value of bit 0 in the earned point counter being "1", it is possible to simplify the processing configuration for setting the black bell winning information based on the establishment of any black bell winning event.

(11) In the configuration of (10) above, the color bell winning may be determined based on the remainder when the value of the earned point counter is divided by "5." In the red bell bonus point lottery, which is held when any of the first through sixth red bell winnings is achieved in AT state ST14, the player is guaranteed to win any of the bonus points "3," "7," "9," "12," or "19." Also, in the black bell bonus point lottery, which is held when any of the first through sixth black bell winnings is achieved in AT state ST14, the player is guaranteed to win any of the bonus points "5," "10," "15," or "20." All bonus points that can be selected in the black bell bonus point lottery are numerical information that, when divided by "5," leaves a remainder of "0." All bonus points that can be selected in the red bell bonus point lottery are numerical information that, when divided by "5," leaves a remainder other than "0" (specifically, any of "2," "3," or "4").

The upper lamp 61, speaker 62, and image display device 63 provide effects to indicate that additional points have been acquired: a first red bell acquisition effect that indicates that additional points within a relatively small first numerical range (a numerical range of "1" to "11") have been acquired based on the achievement of any red bell win; a second red bell acquisition effect that indicates that additional points within a relatively large second numerical range (a numerical range of "12" to "20") have been acquired based on the achievement of any red bell win; a first black bell acquisition effect that indicates that additional points within a relatively small first numerical range (a numerical range of "1" to "11") have been acquired based on the achievement of any black bell win; and a second black bell acquisition effect that indicates that additional points within a relatively large second numerical range (a numerical range of "12" to "20") have been acquired based on the achievement of any black bell win.

After the red bell bonus point lottery or black bell bonus point lottery is executed to select one of the bonus points and set the selected bonus points in the earned point counter in the main RAM 74, the main MPU 72 executes a determination process to determine whether the value of the earned point counter is 12 or greater. If the determination process returns a negative result, the main MPU 72 reads a first earning effect command from the main ROM 73, and if the determination process returns a positive result, the main MPU 72 reads a second earning effect command from the main ROM 73. This simplifies the processing configuration for reading the first earning effect command based on the selection of numerical information within a relatively small first numerical range (1 to 11) as the bonus points to be awarded, and for reading the second earning effect command based on the selection of numerical information within a relatively large second numerical range (12 to 20) as the bonus points to be awarded.

Then, the remainder when the value of the acquired point counter is divided by "5" is calculated, and a determination process is executed to determine whether the remainder is "0." If a positive determination is made in the determination process, black bell winning information is set in the first acquisition effect command or second acquisition effect command that has been read. In this way, by configuring the black bell winning information to be set based on the remainder being "0" when the value of the acquired point counter is divided by "5," it is possible to simplify the processing configuration for setting black bell winning information based on the establishment of any black bell winning event.

(12) In the fifth to seventh embodiments, a red bell winning effect corresponding to the realization of any red bell winning and a black bell winning effect corresponding to the realization of any black bell winning may be executed. The payout number counter in the main RAM 74 is set to the number of game media awarded corresponding to the small win achieved in the current game. Color bell winnings include first to third red bell winnings and first to third black bell winnings. The number of game media awarded when the first red bell winning is achieved is "3," the number of game media awarded when the second red bell winning is achieved is "7," and the number of game media awarded when the third red bell winning is achieved is "11." Furthermore, the number of game media awarded when the first black bell winning is achieved is "15," the number of game media awarded when the second black bell winning is achieved is "19," and the number of game media awarded when the third black bell winning is achieved is "23." The numerical information set in the payout number counter based on the establishment of either the red bell win or the black bell win is numerical information with the value of the first bit set to "1." Furthermore, other minor prizes besides the red bell win and the black bell win include the cherry win, which awards four gaming media, and the watermelon win, which awards five gaming media. The first bit of the numerical information set in the payout number counter based on the establishment of a minor prize other than the red bell win or the black bell win is "0," not "1." The main MPU 72 determines that either the first to third red bell wins or the first to third black bell wins have been established by determining that the value of the first bit in the payout number counter is "1." This simplifies the processing configuration for determining whether either the first to third red bell wins or the first to third black bell wins have been established. When a red bell win is achieved, the number of gaming media awarded is always numerical information less than "12," and when a black bell win is achieved, the number of gaming media awarded is always numerical information greater than or equal to "12."

After the winning determination process in step S613 of the reel control process (Figure 22) is executed, the main MPU 72 determines whether the value of the first bit in the payout coin counter is "1." If the value of the first bit is "1," i.e., if any of the first to third red bell wins or the first to third black bell wins is achieved, the main MPU 72 executes a determination process to determine whether the value of the payout coin counter is "12" or greater. If a negative determination is made in the determination process, a red bell win command is sent to the presentation MPU 92, and if a positive determination is made in the determination process, a black bell win command is sent to the presentation MPU 92. This simplifies the processing configuration for sending a red bell win command based on the achievement of any red bell win, and for sending a black bell win command based on the achievement of any black bell win. When the presentation MPU 92 receives a red bell winning command from the main MPU 72, it executes a red bell winning effect by controlling the light emission of the upper lamp 61, the sound output of the speaker 62, and the display on the image display device 63 in a manner that allows the player to recognize that a red bell winning has occurred. Furthermore, when the presentation MPU 92 receives a black bell winning command from the main MPU 72, it executes a black bell winning effect by controlling the light emission of the upper lamp 61, the sound output of the speaker 62, and the display on the image display device 63 in a manner that allows the player to recognize that a black bell winning has occurred. By configuring the process to send a red bell winning command or a black bell winning command based on the value of the first bit in the payout coin counter being "1" in this way, it is possible to simplify the processing configuration for sending a red bell winning command or a black bell winning command based on the establishment of either a red bell winning or a black bell winning.

(13) In the fifth to seventh embodiments, the index value IV having one of the color bell winning data set may be determined to have been won based on the value of the third bit in the index value counter 74a. Specifically, the color bell winning data includes first to fourth red bell winning data and first to fourth black bell winning data. In the role selection table referenced in the role selection process executed in the non-bonus state, the first red bell winning data is set to index value IV=8, the second red bell winning data is set to index value IV=9, the third red bell winning data is set to index value IV=10, the fourth red bell winning data is set to index value IV=11, the first black bell winning data is set to index value IV=12, the second black bell winning data is set to index value IV=13, the third black bell winning data is set to index value IV=14, and the fourth black bell winning data is set to index value IV=15. Numerical information between "0" and "20" is set in the index value counter 74a. All of the index values IV = 8 to 15, for which color bell winning data is set, are numerical information with a third bit value of "1." Furthermore, all of the numerical information set in the index value counter 74a other than "8" to "15" is numerical information with a third bit value of "0." Therefore, the main MPU 72 can determine that a win has been achieved for the index value IV for which color bell winning data is set, based on the value of the index value counter 74a being "1." All of the index values IV = 8 to 11, for which red bell winning data is set, are numerical information with a second bit value of "0," and all of the index values IV = 12 to 15, for which black bell winning data is set, are numerical information with a second bit value of "1."

The main RAM 74 is provided with a red achievement flag that allows the main MPU 72 to determine whether the mission of achieving any red bell win has been achieved in AT state ST14, and a black achievement flag that allows the main MPU 72 to determine whether the mission of achieving any black bell win has been achieved. In the achievement response process (see FIG. 79) executed by the main MPU 72, if the value of the payout number counter in the main RAM 74 is "2" or greater, it determines whether the value of the third bit in the index value counter 74a is "1." If the value of the third bit is "1," i.e., if any color bell win has been achieved, it executes a judgment process to determine whether the value of the second bit in the index value counter 74a is "1." If a negative judgment is made in this judgment process, the red achievement flag in the main RAM 74 is set to "1." If a positive judgment is made in this judgment process, the black achievement flag in the main RAM 74 is set to "1." This simplifies the processing configuration for setting the red achievement flag to "1" based on the achievement of any red bell win, and for setting the black achievement flag to "1" based on the achievement of any black bell win. By configuring the processing to set any achievement flag to "1" based on the value of the third bit in index value counter 74a being "1," it is possible to simplify the processing configuration for setting the achievement flag corresponding to the winning index value IV to "1" based on the winning of any color bell win data.

In the post-achievement addition process (see FIG. 80) executed by the main MPU 72, if both the red achievement flag and the black achievement flag in the main RAM 74 are set to "1," a determination process is executed to determine whether the value of the second bit in the index value counter 74a is "1." If a negative determination is made in this determination process, the award number of "30" corresponding to the red bell win is added to the AT continuation counter 74d. If a positive determination is made in this determination process, the award number of "40" corresponding to the black bell win is added to the AT continuation counter 74d. This simplifies the processing structure for adding the award number corresponding to the red bell win when the red achievement flag is finally set to "1," thereby setting both the red achievement flag and the black achievement flag to "1," and for adding the award number corresponding to the black bell win when the black achievement flag is finally set to "1."

(14) In the configuration described in (13) above, the type of reel 32L, 32M, or 32R that should be stopped first to achieve a colored bell win may be determined based on the value of the first bit in the index value counter 74a. Specifically, the first and second red bell winning data and the first and second black bell winning data are winning data that enable the corresponding colored bell win to be achieved by making the first stop on the left reel 32L. The index values IV = 8, 9, 12, and 13 to which the first and second red bell winning data and the first and second black bell winning data are set are all numerical information whose first bit value is "0." Furthermore, the third and fourth red bell winning data and the third and fourth black bell winning data are winning data that enable the corresponding colored bell win to be achieved by making the first stop on the center reel 32M. The index values IV = 10, 11, 14, and 15 to which either the third or fourth red bell winning data or the third or fourth black bell winning data is set are all numerical information in which the first bit value is "1".

In the stop operation notification control process in the main MPU 72 (see FIG. 74), when the AT state ST14 is reached, a determination is made as to whether the value of the third bit in the index value counter 74a is "1." If the value of the third bit is "1," i.e., when a win has been achieved for an index value IV (specifically, any of index values IV = 8 to 15) for which any color bell winning data is set, a determination process is executed to determine whether the value of the first bit in the index value counter 74a is "1." If a negative determination is made in this determination process, a left stop operation notification command is read from the main ROM 73 to cause the presentation MPU 92 to notify the stop order in which the left reel 32L is the first stop. If a positive determination is made in this determination process, a center stop operation notification command is read from the main ROM 73 to cause the presentation MPU 92 to notify the stop order in which the center reel 32M is the first stop. This simplifies the processing configuration for reading out a left stop operation notification command based on winning the index value IV in which either the first or second red bell winning data or the first or second black bell winning data is set in the AT state ST14, and for reading out a center stop operation notification command based on winning the index value IV in which either the third or fourth red bell winning data or the third or fourth black bell winning data is set in the AT state ST14.

In the stop operation notification control process (see FIG. 74), after reading a left stop operation notification command or a center stop operation notification command, red bell winning information is set in the read stop operation notification command, provided that the value of the second bit in the index value counter 74a is "0." If the value of the second bit in the index value counter 74a is "1," the state in which black bell winning information is set in the read stop operation notification command is maintained. This simplifies the processing configuration for the process that sets red bell winning information in the stop operation notification command based on winning an index value IV in which any of the first through fourth red bell winning data is set, and the process that sets black bell winning information in the stop operation notification command based on winning an index value IV in which any of the first through fourth black bell winning data is set.

(15) In the configuration of (14) above, the presence or absence of a target range notification may be determined based on the value of the 0th bit in the index value counter 74a. Specifically, of the index values IV = 8 to 11 to which any of the first to fourth red bell winning data is set, only the odd index values IV = 9 and 11 are set as targets for target range notification. Also, of the index values IV = 12 to 15 to which any of the first to fourth black bell winning data is set, only the odd index values IV = 13 and 15 are set as targets for target range notification. If an even index value IV = 8, 10, 12, or 14 is selected, the target range notification will not be executed. In the stop operation notification control process (see FIG. 74 ) in the main MPU 72, after reading the left stop operation notification command or the center stop operation notification command described above, a determination process is executed to determine whether the value of the 0th bit in the index value counter 74a is "1." If a positive determination is made in the determination process, the target range notification information is set to the read stop operation notification command. On the other hand, if a negative determination is made in the determination process, the target range notification information is not set. The production MPU 92 executes a target range notification on the condition that the target range notification information is set in any stop operation notification command received from the main MPU 72. In this way, by configuring the target range notification information to be set based on the value of the 0th bit in the index value counter 74a being "1," the processing configuration for setting the target range notification information based on winning the index value IV to which either the second or fourth red bell winning data or the second or fourth black bell winning data is set can be simplified.

(16) In the fifth to seventh embodiments, the index value IV that is the target of the additional lottery process may be determined to have been won based on the value of the third bit in the index value counter 74a. Specifically, in the role lottery table referenced in the role lottery process executed in the AT state ST14, the first watermark replay winning data is set to index value IV=8, the second watermark replay winning data is set to index value IV=9, the third watermark replay winning data is set to index value IV=10, and the fourth watermark replay winning data is set to index value IV=11. Furthermore, the first bell replay winning data is set to index value IV=12, the second bell replay winning data is set to index value IV=13, the third bell replay winning data is set to index value IV=14, and the fourth bell replay winning data is set to index value IV=15. The index value counter 74a is set to any one of numerical information "0" to "20." Among the numerical information set in the index value counter 74a, numerical information with a third bit value of "1" ranges from "8" to "15." In the AT state ST14, based on the winning of the index value IV = 8 to 15, to which any of the first to fourth anchor replay winning data and the first to fourth bell replay winning data is set in the role lottery process, an additional lottery process is executed to determine whether to increase the remaining number of awarded gaming media in the AT state ST14. All of the index values IV = 8 to 15 that are the subject of the additional lottery process are numerical information with a third bit value of "1." Furthermore, among the index values IV set in the index value counter 74a, all index values IV other than IV = 8 to 15 are numerical information with a third bit value of "0."

When an index value IV is selected that has either the first or second anchor play winning data or the first or second bell replay winning data set, the add-on lottery process is executed by referencing the first add-on lottery table, which sets the probability of an add-on win at 10%. When an index value IV is selected that has either the third or fourth anchor play winning data or the third or fourth bell replay winning data set, the add-on lottery process is executed by referencing the second add-on lottery table, which sets the probability of an add-on win at 20%. Index values IV = 8, 9, 12, 13, which have either the first or second anchor play winning data or the first or second bell replay winning data set, are all numerical information whose first bit value is "0." Index values IV = 10, 11, 14, 15, which have either the third or fourth anchor play winning data or the third or fourth bell replay winning data set, are all numerical information whose first bit value is "1."

During the advantageous lottery process at the start of the game in the main MPU 72 (see Figure 69), if the AT state ST14 is reached, a determination is made as to whether the value of the third bit in the index value counter 74a is "1." If the value of the third bit is "1," i.e., if the index value IV to which any of the first to fourth anchor replay winning data and the first to fourth bell replay winning data that are the subject of the additional lottery process is set, a determination is made as to whether the value of the first bit in the index value counter 74a is "1." If a negative determination is made in the determination process, the first additional lottery table is read from the main ROM 73, and if a positive determination is made in the determination process, the second additional lottery table is read from the main ROM 73. This simplifies the processing configuration for reading the first add-on lottery table based on winning the index value IV set with either the first or second anchor play winning data or the first or second bell replay winning data, and for reading the second add-on lottery table based on winning the index value IV set with either the third or fourth anchor play winning data or the third or fourth bell replay winning data. In this way, by configuring the add-on lottery process to be executed based on the value of the third bit in the index value counter 74a being "1," it is possible to simplify the processing configuration for reading the add-on lottery process based on winning the index value IV set with either the first through fourth anchor play winning data or the first through fourth bell replay winning data in the role lottery process.

(17) In the configuration of (16) above, the remaining number of awarded gaming media in the AT state ST14, which is added when an additional win occurs, may be determined based on the value of the second bit of the index value counter 74a. Specifically, when an index value IV for which any of the winning data for the Suica replay is set is won in the lottery process for the winning combination and an additional win occurs in the lottery process for the additional win, the remaining number of awarded gaming media in the AT state ST14 is added by "30." Furthermore, when an index value IV for which any of the winning data for the bell replay is set is won in the lottery process for the winning combination and an additional win occurs in the lottery process for the additional win, the remaining number of awarded gaming media in the AT state ST14 is added by "60." All of the index values IV = 8 to 11 for which the winning data for the Suica replay is set are numerical information whose second bit value is "0," and all of the index values IV = 12 to 15 for which the winning data for the bell replay is set are numerical information whose second bit value is "1."

When an additional win occurs in the additional lottery process executed by referencing the first additional lottery table or the second additional lottery table described above, the main MPU 72 executes a determination process to determine whether the value of the second bit in the index value counter 74a is "1." If a negative determination is made in the determination process, "30" is added to the AT continuation counter 74d, and if a positive determination is made in the determination process, "60" is added to the AT continuation counter 74d. This simplifies the processing configuration for adding "30" to the remaining number of awarded gaming media in the AT state ST14 based on an additional win occurring in the additional lottery process executed by winning an index value IV for which any of the win data for the swift replay is set, and for adding "60" to the remaining number of awarded gaming media in the AT state ST14 based on an additional win occurring in the additional lottery process executed by winning an index value IV for which any of the win data for the bell replay is set.

(18) In the configuration of (17) above, if a losing result is obtained in the additional lottery process when a re-draw has not yet been performed, the presence or absence of a re-draw may be determined based on the value of the 0th bit of the index value counter 74a. Specifically, if a losing result is obtained in the additional lottery process executed when an index value IV is selected that is set to either the second or fourth anchor play winning data or the second or fourth bell replay winning data, a re-draw is performed. However, if a losing result is obtained in the additional lottery process executed when an index value IV is selected that is set to either the first or third anchor play winning data or the first or third bell replay winning data, a re-draw is not performed. In the re-draw, the additional lottery process is performed again using the first or second additional lottery table already read into the main RAM 74. The index values IV = 9, 11, 13, and 15 that are subject to re-drawing are all odd-numbered numerical information with a 0th bit value of "1," while the index values IV = 8, 10, 12, and 14 that are not subject to re-drawing are all even-numbered numerical information with a 0th bit value of "0." If the additional drawing process results in a loss, the main MPU 72 executes a determination process to determine whether the 0th bit value of the index value counter 74a is "1," provided that a re-draw has not yet been executed. If the determination process results in a positive determination, a re-draw is executed; if the determination process results in a negative determination, a re-draw is not executed. This simplifies the processing configuration for executing a re-draw based on a loss in the additional drawing process executed when an index value IV with either the second or fourth watermark replay winning data or the second or fourth bell replay winning data is selected.

(19) In the fifth to seventh embodiments, the achievement of a color bell winning event, which is set as the target of the additional lottery process, may be determined based on the value of the third bit in the payout number counter in the main RAM 74. Specifically, the payout number counter is set to the number of game media awarded corresponding to the small win achieved in the current game. Color bell winning events include first to fourth red bell winning events and first to fourth black bell winning events. The number of game media awarded when the first red bell winning event is achieved is "8," the number of game media awarded when the second red bell winning event is "9," the number of game media awarded when the third red bell winning event is "10," and the number of game media awarded when the fourth red bell winning event is "11." Furthermore, when a first black bell win is achieved, the number of game media awarded is "12," when a second black bell win is achieved, the number of game media awarded is "13," when a third black bell win is achieved, the number of game media awarded is "14," and when a fourth black bell win is achieved, the number of game media awarded is "15." The numerical information "8" to "15" set in the payout counter based on the achievement of either a red bell win or a black bell win is all numerical information in which the third bit value is "1." Furthermore, when a small win other than a red bell win or a black bell win is achieved, the number of game media awarded is set to "7" or less. Therefore, the number of game media awarded when a small win other than a red bell win or a black bell win is achieved is all numerical information in which the third bit value is "0." The main MPU 72 determines that either the first through fourth red bell wins or the first through fourth black bell wins have occurred by determining that the value of the third bit in the payout number counter is "1." This simplifies the processing configuration for determining whether either the first through fourth red bell wins or the first through fourth black bell wins have occurred.

In AT state ST14, based on the establishment of either the first to fourth red bell wins or the first to fourth black bell wins, an additional lottery process is executed to determine whether to increase the remaining number of awards in AT state ST14. If either the first or second red bell wins or the first or second black bell wins are established, the additional lottery process is executed with reference to the first additional lottery table, in which the probability of an additional win is set to 10%, and if either the third or fourth red bell wins or the third or fourth black bell wins are established, the additional lottery process is executed with reference to the second additional lottery table, in which the probability of an additional win is set to 20%. The number of gaming media awarded when either the first or second red bell win or the first or second black bell win is achieved ("8", "9", "12", and "13") is all numerical information with a first bit value of "0", and the number of gaming media awarded when either the third or fourth red bell win or the third or fourth black bell win is achieved ("10", "11", "14", and "15") is all numerical information with a first bit value of "1".

The AT processing in the main MPU 72 (see FIG. 78) determines whether the value of the third bit in the payout number counter is "1." If the value of the third bit is "1," i.e., if any of the first through fourth red bell wins and the first through fourth black bell wins, which are the subject of the add-on lottery processing, are achieved, a determination process is executed to determine whether the value of the first bit in the payout number counter is "1." If a negative determination is made in the determination process, the first add-on lottery table is read from the main ROM 73. If a positive determination is made in the determination process, the second add-on lottery table is read from the main ROM 73. This simplifies the processing configuration for reading the first add-on lottery table based on the achievement of either the first or second red bell win or the first or second black bell win, and the processing for reading the second add-on lottery table based on the achievement of either the third or fourth red bell win or the third or fourth black bell win. In this way, by configuring the additional lottery process to be executed based on the value of the third bit in the payout number counter being "1," it is possible to simplify the processing configuration for the process to be executed based on the achievement of either the first through fourth red bell wins or the first through fourth black bell wins.

(20) In the configuration of (19) above, the remaining number of game media awarded in the AT state ST14, which is added when an additional win occurs, may be determined based on the value of the second bit in the payout number counter. Specifically, when any of the first through fourth red bell wins is achieved and an additional win occurs in the additional lottery process, the remaining number of game media awarded in the AT state ST14 is added by "30." Furthermore, when any of the first through fourth black bell wins is achieved and an additional win occurs in the additional lottery process, the remaining number of game media awarded in the AT state ST14 is added by "60." The number of game media awarded when the first through fourth red bell wins are achieved ("8" through "11") is numerical information whose second bit value is "0," and the number of game media awarded when the first through fourth black bell wins are achieved ("12" through "15") is numerical information whose second bit value is "1."

When an additional win occurs in the additional lottery process executed by referencing the first additional lottery table or the second additional lottery table described above, the main MPU 72 executes a determination process to determine whether the value of the second bit in the payout number counter is "1." If a negative determination is made in the determination process, the main MPU 72 increments the AT continuation counter 74d by "30." If a positive determination is made in the determination process, the main MPU 72 increments the AT continuation counter 74d by "60." This simplifies the processing configuration for adding "30" to the remaining number of game media to be awarded in the AT state ST14 based on an additional win occurring in the additional lottery process executed when any red bell win is achieved, and for adding "60" to the remaining number of game media to be awarded in the AT state ST14 based on an additional win occurring in the additional lottery process executed when any black bell win is achieved.

(21) In the configuration of (20) above, the presence or absence of a re-draw may be determined based on the value of the 0th bit in the payout number counter. Specifically, if the second or fourth red bell win or the second or fourth black bell win results in a losing result in the additional draw process executed, a re-draw is executed, whereas if the first or third red bell win or the first or third black bell win results in a losing result in the additional draw process executed, a re-draw is not executed. In the re-draw, the additional draw process is executed again using the first or second additional draw table already read into the main RAM 74. The number of game media awarded when a color bell win that is subject to a re-draw is achieved (specifically, "9," "11," "13," and "15") is odd-numbered numerical information with a value of "1" in the 0th bit, while the number of game media awarded when a color bell win that is not subject to a re-draw is achieved (specifically, "8," "10," "12," and "14") is even-numbered numerical information with a value of "0" in the 0th bit. If the additional drawing process results in a loss, the main MPU 72 executes a determination process to determine whether the value of the 0th bit in the payout number counter is "1," provided that a re-draw has not yet been performed. If the determination process results in a positive result, a re-draw is performed, and if the determination process results in a negative result, a re-draw is not performed. This simplifies the processing configuration for executing a re-draw based on a loss in the additional drawing process executed when either the second or fourth red bell win or the second or fourth black bell win is achieved.

(22) In the fifth to seventh embodiments, the achievement of a color bell winning event that is set as the target of the additional lottery process may be determined based on the value of the second bit in the payout number counter of the main RAM 74. Specifically, the payout number counter is set to the number of game media awarded corresponding to the small winning combination that has been achieved in the current game. Color bell winning events include first to fourth red bell winning events and first to fourth black bell winning events. The number of game media awarded when the first red bell winning event is achieved is "4," the number of game media awarded when the second red bell winning event is "5," the number of game media awarded when the third red bell winning event is "6," and the number of game media awarded when the fourth red bell winning event is "7." Furthermore, when a first black bell win is achieved, the number of game media awarded is "12," when a second black bell win is achieved, the number of game media awarded is "13," when a third black bell win is achieved, the number of game media awarded is "14," and when a fourth black bell win is achieved, the number of game media awarded is "15." The numerical information ("4" to "7" and "12" to "15") set in the payout number counter based on the achievement of either a red bell win or a black bell win is all numerical information in which the second bit value is "1." In addition to the red bell win and the black bell win, other minor prizes include a cherry win, which awards "1" game media, a watermelon win, which awards "2," a first regular bell win, which awards "9," and a second regular bell win, which awards "10." The number of gaming media awarded when a minor win other than a red bell win or a black bell win is achieved is numerical information in which the second bit value is "0." The main MPU 72 determines that one of the first through fourth red bell wins or the first through fourth black bell wins has been achieved by determining that the second bit value in the payout number counter is "1." This simplifies the processing configuration for determining that one of the first through fourth red bell wins or the first through fourth black bell wins has been achieved.

In AT state ST14, based on the establishment of either the first to fourth red bell wins or the first to fourth black bell wins, an additional lottery process is executed to determine whether to increase the remaining number of awards in AT state ST14. If either the first or second red bell wins or the first or second black bell wins are established, the additional lottery process is executed with reference to the first additional lottery table, in which the probability of an additional win is set to 10%, and if either the third or fourth red bell wins or the third or fourth black bell wins are established, the additional lottery process is executed with reference to the second additional lottery table, in which the probability of an additional win is set to 20%. The number of gaming media awarded when either the first or second red bell win or the first or second black bell win is achieved ("4", "5", "12", and "13") is all numerical information with a first bit value of "0", and the number of gaming media awarded when either the third or fourth red bell win or the third or fourth black bell win is achieved ("6", "7", "14", and "15") is all numerical information with a first bit value of "1".

The AT processing in the main MPU 72 (see FIG. 78) determines whether the value of the second bit in the payout number counter is "1." If the value of the second bit is "1," i.e., if any of the first through fourth red bell wins and the first through fourth black bell wins, which are the subject of the add-on lottery processing, are achieved, a determination process is executed to determine whether the value of the first bit in the payout number counter is "1." If a negative determination is made in the determination process, the first add-on lottery table is read from the main ROM 73. If a positive determination is made in the determination process, the second add-on lottery table is read from the main ROM 73. This simplifies the processing configuration for reading the first add-on lottery table based on the achievement of either the first or second red bell win or the first or second black bell win, and the processing for reading the second add-on lottery table based on the achievement of either the third or fourth red bell win or the third or fourth black bell win. In this way, by configuring the additional lottery process to be executed based on the value of the second bit in the payout number counter being "1," it is possible to simplify the processing configuration for the process to be executed based on the achievement of either the first through fourth red bell wins or the first through fourth black bell wins.

(23) In the configuration of (22) above, the remaining number of gaming media to be awarded in the AT state ST14, which will be added when an additional win occurs, may be determined based on the value of the third bit in the payout number counter. Specifically, when any of the first through fourth red bell wins is achieved and an additional win occurs in the additional lottery process, the remaining number of gaming media to be awarded in the AT state ST14 is added by "30." Furthermore, when any of the first through fourth black bell wins is achieved and an additional win occurs in the additional lottery process, the remaining number of gaming media to be awarded in the AT state ST14 is added by "60." The number of gaming media to be awarded when the first through fourth red bell wins are achieved ("4" to "7") is all numerical information within the numerical range of "0" to "7," and therefore is numerical information in which the value of the third bit is "0." Furthermore, the number of gaming media awarded when the first to fourth black bell wins are achieved ("12" to "15") is all numerical information within the range of "8" to "15", and therefore has a third bit value of "1".

When an additional win occurs in the additional lottery process executed by referencing the first additional lottery table or the second additional lottery table described above, the main MPU 72 executes a determination process to determine whether the value of the third bit in the payout number counter is "1." If a negative determination is made in the determination process, "30" is added to the AT continuation counter 74d, and if a positive determination is made in the determination process, "60" is added to the AT continuation counter 74d. This simplifies the processing configuration for adding "30" to the remaining number of game media to be awarded in the AT state ST14 based on an additional win occurring in the additional lottery process executed when any red bell win is achieved, and for adding "60" to the remaining number of game media to be awarded in the AT state ST14 based on an additional win occurring in the additional lottery process executed when any black bell win is achieved.

(24) In the configuration of (23) above, the presence or absence of a re-draw may be determined based on the value of the 0th bit in the payout number counter. Specifically, if the additional draw process executed when either the second or fourth red bell win or the second or fourth black bell win is achieved results in a loss, a re-draw is performed, whereas if the additional draw process executed when either the first or third red bell win or the first or third black bell win is achieved results in a loss, a re-draw is not performed. In a re-draw, the additional draw process is performed again using the first or second additional draw table already loaded into the main RAM 74. The number of game media awarded when a color bell win that is subject to a re-draw is achieved (specifically, "5," "7," "13," and "15") is odd-numbered numerical information with a value of "1" for the 0th bit, while the number of game media awarded when a color bell win that is not subject to a re-draw is achieved (specifically, "4," "6," "12," and "14") is even-numbered numerical information with a value of "0" for the 0th bit. If the additional drawing process results in a loss, the main MPU 72 executes a determination process to determine whether the value of the 0th bit of the payout number counter is "1," provided that a re-draw has not yet been executed. If the determination process results in a positive result, a re-draw is executed, and if the determination process results in a negative result, a re-draw is not executed. This simplifies the processing configuration for executing a re-draw based on a loss in the additional drawing process executed when either the second or fourth red bell win or the second or fourth black bell win is achieved.

(25) In the fifth to seventh embodiments, the achievement of a color bell winning event, which is set as the target of the additional lottery process, may be determined based on the value of the 0th bit in the payout number counter of the main RAM 74. Specifically, the payout number counter is set to the number of game media awarded corresponding to the small win achieved in the current game. Color bell winning events include first to second red bell winning events and first to second black bell winning events. The number of game media awarded when the first red bell winning event is achieved is "5," when the second red bell winning event is achieved is "7," when the first black bell winning event is achieved is "13," and when the second black bell winning event is achieved is "15." The numerical information ("5," "7," "13," and "15") set in the payout number counter based on the establishment of either the red bell win or the black bell win is all odd-numbered numerical information with a 0th bit value of "1." Other minor prizes besides the red bell win and the black bell win include the cherry win, which awards two gaming media, the watermelon win, which awards four gaming media, the first regular bell win, which awards eight gaming media, and the second regular bell win, which awards ten gaming media. The number of gaming media awarded when a minor prize other than the red bell win or the black bell win is established is all even-numbered numerical information with a 0th bit value of "0." By determining that the 0th bit of the payout number counter is "1," the main MPU 72 determines that either the first or second red bell win or the first or second black bell win has been established. This simplifies the processing configuration for determining whether either the first or second red bell win or the first or second black bell win has occurred.

In AT state ST14, an additional lottery process is executed to determine whether to increase the remaining number of awards in AT state ST14 based on whether either the first or second red bell win or the first or second black bell win is achieved. If either the first red bell win or the first black bell win is achieved, the additional lottery process is executed with reference to a first additional lottery table, in which the probability of an additional win is set to 10%, and if either the second red bell win or the second black bell win is achieved, the additional lottery process is executed with reference to a second additional lottery table, in which the probability of an additional win is set to 20%. The number of game media awarded when either the first red bell win or the first black bell win is achieved ("5" and "13") is both numerical information with a first bit value of "0", and the number of game media awarded when either the second red bell win or the second black bell win is achieved ("7" and "15") is both numerical information with a first bit value of "1".

The AT processing in the main MPU 72 (see FIG. 78) determines whether the value of the 0th bit in the payout number counter is "1." If the value of the 0th bit is "1," i.e., if any of the first to second red bell wins and the first to second black bell wins, which are the subject of the add-on lottery processing, are achieved, a determination process is executed to determine whether the value of the 1st bit in the payout number counter is "1." If a negative determination is made in the determination process, the first add-on lottery table is read from the main ROM 73, and if a positive determination is made in the determination process, the second add-on lottery table is read from the main ROM 73. This simplifies the processing configuration for reading the first add-on lottery table based on the achievement of either the first red bell win or the first black bell win, and the processing for reading the second add-on lottery table based on the achievement of either the second red bell win or the second black bell win. In this way, by configuring the additional lottery process to be executed based on the value of the 0th bit in the payout number counter being "1", it is possible to simplify the processing configuration for the process to be executed based on the achievement of either the first or second red bell win or the first or second black bell win.

(26) In the configuration of (25) above, the remaining number of gaming media to be awarded in the AT state ST14, which will be added when an additional win occurs, may be determined based on the value of the third bit in the payout number counter. Specifically, when either the first or second red bell win occurs and an additional win occurs in the additional lottery process, the remaining number of gaming media to be awarded in the AT state ST14 is added by "30," and when either the first or second black bell win occurs and an additional win occurs in the additional lottery process, the remaining number of gaming media to be awarded in the AT state ST14 is added by "60." The number of gaming media to be awarded when either the first or second red bell win occurs ("5" and "7") is both numerical information within the numerical range of "0" to "7," and therefore is numerical information in which the value of the third bit is "0." Furthermore, the number of gaming media awarded when the first and second black bell wins are achieved ("13" and "15") is numerical information that falls within the range of "8" to "15," and therefore has a third bit value of "1."

When an additional win occurs in the additional lottery process executed by referencing the first additional lottery table or the second additional lottery table described above, the main MPU 72 executes a determination process to determine whether the value of the third bit in the payout number counter is "1." If a negative determination is made in the determination process, "30" is added to the AT continuation counter 74d, and if a positive determination is made in the determination process, "60" is added to the AT continuation counter 74d. This simplifies the processing configuration for adding "30" to the remaining number of game media to be awarded in the AT state ST14 based on an additional win occurring in the additional lottery process executed when any red bell win is achieved, and for adding "60" to the remaining number of game media to be awarded in the AT state ST14 based on an additional win occurring in the additional lottery process executed when any black bell win is achieved.

(27) In the fifth to seventh embodiments, the achievement of a color bell winning event that is set as the target of the additional lottery process may be determined based on the value of the second bit in the payout number counter of the main RAM 74. Specifically, the payout number counter is set to the number of game media awarded corresponding to the small winning combination that has been achieved in the current game. Color bell winning events include the first to third red bell winning events, the first to third black bell winning events, and the first to third blue bell winning events. When the first red bell winning event is achieved, the number of game media awarded is "4," when the second red bell winning event is achieved, the number of game media awarded is "5," and when the third red bell winning event is achieved, the number of game media awarded is "6." Furthermore, when the first black bell win is achieved, the number of game media awarded is "12," when the second black bell win is achieved, the number of game media awarded is "13," and when the third black bell win is achieved, the number of game media awarded is "14." Furthermore, when the first blue bell win is achieved, the number of game media awarded is "20," when the second blue bell win is achieved, the number of game media awarded is "21," and when the third blue bell win is achieved, the number of game media awarded is "22." The numerical information ("4" to "6," "12" to "14," and "20" to "22") set in the payout number counter based on the achievement of any of these red bell wins, black bell wins, and blue bell wins is all numerical information in which the second bit value is "1." In addition to the red bell, black bell, and blue bell wins, other minor wins include the cherry win, which awards one gaming medium, and the watermelon win, which awards two gaming media. The number of gaming media awarded when a minor win other than the red bell, black bell, or blue bell win is achieved is numerical information in which the second bit value is zero. The main MPU 72 determines that one of the first through third red bell wins, the first through third black bell wins, or the first through third blue bell wins has been achieved by determining that the second bit value in the payout number counter is one. This simplifies the processing configuration for determining whether one of the first through third red bell wins, the first through third black bell wins, or the first through third blue bell wins has been achieved.

In AT state ST14, an additional lottery process is executed to determine whether to increase the remaining number of awards in AT state ST14 based on the achievement of any of the first to third red bell wins, the first to third black bell wins, and the first to third blue bell wins. If any of the first to third red bell wins is achieved, the additional lottery process is executed with reference to the first additional lottery table, which sets the probability of an additional win at 10%. If any of the first to third black bell wins is achieved, the additional lottery process is executed with reference to the second additional lottery table, which sets the probability of an additional win at 20%, and if any of the first to third blue bell wins is achieved, the additional lottery process is executed with reference to the third additional lottery table, which sets the probability of an additional win at 30%. The number of awards of gaming media ("4" to "6") when any of the first to third red bell wins is achieved is numerical information in which the third and fourth bits are both set to "0." Furthermore, when any of the first to third black bell wins are achieved, the number of game media awarded ("12" to "14") is numerical information in which the third bit value is "1" and the fourth bit value is "0." Furthermore, when any of the first to third blue bell wins are achieved, the number of game media awarded ("20" to "22") is numerical information in which the third bit value is "0" and the fourth bit value is "1."

The AT processing in the main MPU 72 (see Figure 78) determines whether the value of the second bit in the payout number counter is "1." If the value of the second bit is "1," i.e., if any of the first to third red bell wins, first to third black bell wins, or first to third blue bell wins, which are the subject of the additional lottery processing, is achieved, a determination process is executed to determine whether the value of the fourth bit in the payout number counter is "1." If a positive determination is made in the determination process, the third additional lottery table is read from the main ROM 73. This simplifies the processing configuration for reading the third additional lottery table based on the achievement of any of the first to third blue bell wins. Furthermore, if a negative determination is made in the determination process, the system determines whether the value of the third bit in the payout coin counter is "1." If a negative determination is made (if the value of the third bit is "0"), the first bonus lottery table is read from the main ROM 73. If a positive determination is made (if the value of the third bit is "1"), the system reads the second bonus lottery table from the main ROM 73. This simplifies the processing configuration for reading the first bonus lottery table based on the achievement of any of the first to third red bell wins, and the processing configuration for reading the second bonus lottery table based on the achievement of any of the first to third black bell wins. In this way, the configuration for executing the bonus lottery process based on the achievement of any of the first to third red bell wins, first to third black bell wins, and first to third blue bell wins simplifies the processing configuration for executing the bonus lottery process based on the achievement of any of the first to third red bell wins, first to third black bell wins, and first to third blue bell wins.

(28) In the fifth to seventh embodiments described above, when the total number of bonus points earned during AT state ST14 reaches an upper limit (specifically, "100"), the remaining number of awarded gaming media in AT state ST14 is increased by "30." The color bell winning event may be identified based on the value of the 0th bit in the earned point counter provided in the main RAM 74. The earned point counter is a counter that enables the main MPU 72 to grasp the bonus points earned in the current game. Color bell winning events include the first to sixth red bell winning events and the first to sixth black bell winning events. In AT state ST14, if any of the first to sixth red bell winning events is achieved, a lottery for red bell bonus points is held, and if any of the first to sixth black bell winning events is achieved, a lottery for black bell bonus points is held. The bonus points won in any of the bonus point winning events is set in the earned point counter in the main RAM 74. In the red bell extra points lottery, you are guaranteed to win one of the extra points "2", "4", "10" or "12", and in the black bell extra points lottery, you are guaranteed to win one of the extra points "1", "3", "9" or "11". All extra points that can be won in the red bell extra points lottery are even numbers with a 0th bit value of "0", and all extra points that can be won in the black bell extra points lottery are odd numbers with a 1th bit value of "1".

The upper lamp 61, speaker 62, and image display device 63 provide effects to indicate that additional points have been acquired: a first red bell acquisition effect that indicates that additional points within a relatively small first numerical range (a numerical range of "1" to "4") have been acquired based on the achievement of any red bell win; a second red bell acquisition effect that indicates that additional points within a relatively large second numerical range (a numerical range of "9" to "12") have been acquired based on the achievement of any red bell win; a first black bell acquisition effect that indicates that additional points within a relatively small first numerical range (a numerical range of "1" to "4") have been acquired based on the achievement of any black bell win; and a second black bell acquisition effect that indicates that additional points within a relatively large second numerical range (a numerical range of "9" to "12") have been acquired based on the achievement of any black bell win.

After the red bell bonus point lottery or black bell bonus point lottery is executed to select one of the bonus points and set the selected bonus points in the earned point counter in the main RAM 74, the main MPU 72 executes a determination process to determine whether the value of the third bit in the earned point counter is "1." If the determination process returns a negative result, the main MPU 72 reads a first earning effect command from the main ROM 73, and if the determination process returns a positive result, the main MPU 72 reads a second earning effect command from the main ROM 73. This simplifies the processing configuration for reading the first earning effect command based on the selection of numerical information within the first numerical range ("1" to "4"), which is relatively small, as the bonus points to be awarded, and for reading the second earning effect command based on the selection of numerical information within the second numerical range ("9" to "12"), which is relatively large, as the bonus points to be awarded.

Then, it determines whether the value of bit 0 in the acquisition point counter is "1," and if the value of bit 0 is "1," it sets black bell winning information to the first acquisition effect command or second acquisition effect command that has been read. The presentation-side MPU 92 executes the first acquisition effect for the black bell if black bell winning information is set in the first acquisition effect command received from the main MPU 72, and executes the first acquisition effect for the red bell if black bell winning information is not set in the first acquisition effect command received from the main MPU 72. Furthermore, the presentation-side MPU 92 executes the second acquisition effect for the black bell if black bell winning information is set in the second acquisition effect command received from the main MPU 72, and executes the second acquisition effect for the red bell if black bell winning information is not set in the second acquisition effect command received from the main MPU 72. In this way, by configuring the black bell winning information to be set based on the value of bit 0 in the earned point counter being "1", it is possible to simplify the processing configuration for setting the black bell winning information based on the establishment of any black bell winning event.

(29) In the fifth to seventh embodiments described above, a determination process is performed to determine whether the value of the 0th bit in the index value counter 74a is "1" to determine whether the value of the index value counter 74a is odd. However, this is not limited to this. To determine whether the value of the index value counter 74a is odd, an operation is performed to divide the value of the index value counter 74a by "2," and a determination process is performed to determine whether the remainder of this operation is "1."

(30) In the fifth and seventh embodiments, a configuration may be adopted in which an addition process is executed to add to the remaining number of gaming media awarded in the AT state ST14 when a combination of achievement flags 74h-74m set to "1" in the main RAM 74 becomes a predetermined combination. Specifically, when the red left achievement flag 74h and the black left achievement flag 74k are set to "1," an addition process is executed upon a left achievement to add to the number of awards to "10." When the red middle achievement flag 74i and the black middle achievement flag 74l are set to "1," an addition process is executed upon a middle achievement to add to the number of awards to "15." When the red right achievement flag 74j and the black right achievement flag 74m are set to "1," an addition process is executed upon a right achievement to add to the number of awards to "20." This allows the player to anticipate that the remaining number of gaming media awarded in the AT state ST14 will be added when any red bell win or any black bell win occurs. This makes it possible to increase the enjoyment of the game.

(31) In the fifth and seventh embodiments, a configuration may be adopted in which an add-on process is executed to add to the remaining number of game media awarded in the AT state ST14 depending on the number of achievement flags 74h-74m set to "1" in the main RAM 74. Specifically, an add-on process is executed to set the number of awards to "5" when the number of flags set to "1" among the six types of achievement flags 74h-74m reaches "1," an add-on process is executed to set the number of awards to "10" when the number of flags set to "1" reaches "2," an add-on process is executed to set the number of awards to "15" when the number of flags set to "1" reaches "3," an add-on process is executed to set the number of awards to "20" when the number of flags set to "1" reaches "4," an add-on process is executed to set the number of awards to "25" when the number of flags set to "1" reaches "5," and an add-on process is executed to set the number of awards to "50" when the number of flags set to "1" reaches "6." This allows players to anticipate an increase in the number of bonuses awarded each time a mission is completed, making it possible to increase the enjoyment of the game.

(32) In the fifth to seventh embodiments described above, the bell winning combination that has been achieved is identified based on the value of the index value counter 74a, but this is not limited to this, and the bell winning combination that has been achieved may also be identified based on the value of the payout number counter in the main RAM 74. Specifically, the number of awards for the first red bell win is "7," the number of awards for the first black bell win is "8," the number of awards for the second red bell win is "9," the number of awards for the second black bell win is "10," the number of awards for the third red bell win is "11," the number of awards for the third black bell win is "12," the number of awards for the fourth red bell win is "13," the number of awards for the fourth black bell win is "14," the number of awards for the fifth red bell win is "15," the number of awards for the fifth black bell win is "16," the number of awards for the sixth red bell win is "17," and the number of awards for the sixth black bell win is "18." In addition, the number of awards for small prize wins other than these bell wins is "5" or less. The 1st and 2nd Red Bell wins and the 1st and 2nd Black Bell wins are small wins that can be achieved by making the first stop on the left reel 32L, the 3rd and 4th Red Bell wins and the 3rd and 4th Black Bell wins are small wins that can be achieved by making the first stop on the middle reel 32M, and the 5th and 6th Red Bell wins and the 5th and 6th Black Bell wins are small wins that can be achieved by making the first stop on the right reel 32R.

When a red bell or black bell win, which can be achieved by having the first stop be on the left reel 32L, is achieved, the value of the payout coin counter will be anywhere between "7" and "10." When a red bell or black bell win, which can be achieved by having the first stop be on the center reel 32M, is achieved, the value of the payout coin counter will be anywhere between "11" and "14." When a red bell or black bell win, which can be achieved by having the first stop be on the right reel 32R, is achieved, the value of the payout coin counter will be anywhere between "15" and "18." When any of the red bell wins is achieved, the value of the payout coin counter will be odd, so the value of the 0th bit of that payout coin counter will be "1." When any of the black bell wins is achieved, the value of the payout coin counter will be even, so the value of the 0th bit of that payout coin counter will be "0."

The achievement response process in the main MPU 72 (see FIG. 79) determines whether the value of the payout number counter is equal to or greater than "7," and if a positive determination is made, executes a first determination process to determine whether the value of the payout number counter is equal to or less than "10." If a positive determination is made in the first determination process, it determines whether the value of the 0th bit in the payout number counter is equal to "1," and if the value of the 0th bit is equal to "1," executes a process to set the red left achievement flag 74h to "1," and if the value of the 0th bit is equal to "0," executes a process to set the black left achievement flag 74k to "1." Furthermore, if a negative determination is made in the first determination process, it executes a second determination process to determine whether the value of the payout number counter is equal to or less than "14." If a positive determination is made in the second determination process, a determination is made as to whether the value of the 0th bit in the payout coin counter is "1." If the value of the 0th bit is "1," a process is executed to set the red center achievement flag 74i to "1." If the value of the 0th bit is "0," a process is executed to set the black center achievement flag 74l to "1." Furthermore, if a negative determination is made in the second determination process, a third determination process is executed to determine whether the value of the payout coin counter is "18" or less. If a positive determination is made in the third determination process, a determination is made as to whether the value of the 0th bit in the payout coin counter is "1." If the value of the 0th bit is "1," a process is executed to set the red right achievement flag 74j to "1." If the value of the 0th bit is "0," a process is executed to set the black right achievement flag 74m to "1." This simplifies the process for setting these achievement flags 74h-74m to "1."

(33) In the fifth to seventh embodiments, an AT transition lottery process may be executed to determine whether an AT transition win has occurred, whether an operation timing notification will be issued to notify the timing of operation of each stop button 42-44 after transitioning to AT state ST14, and whether a notification preview effect will be displayed to provide advance notice of the operation timing notification, based on the value of a predetermined bit in the acquired lottery random number and the numerical range in which the lottery random number falls. In the AT transition lottery process, a lottery random number between "0" and "255" is acquired from a lottery counter that is updated periodically (specifically, every 1.49 milliseconds) in the main RAM 74. The main MPU 72 executes a determination process to determine whether the value of bit 0 of bits 0 to 7 of the acquired lottery random number is "1," and identifies an AT transition win as occurring when a positive determination is made in the determination process. When an AT transition winning is identified, the main MPU 72 executes a first determination process to determine whether the lottery random number is equal to or greater than "192." If a positive determination is made in the first determination process, the operation timing notification flag in the main RAM 74 is set to "1." This allows an operation timing notification to be executed after transitioning to the AT state ST14. In the operation timing notification, if an index value IV is selected that is set with color bell winning data (any red bell winning data, any black bell winning data, or any blue bell winning data), a left operation image, a center operation image, or a right operation image is displayed on the image display device 63, provided that the stop buttons 42-44 should be operated to achieve the color bell winning corresponding to the color bell winning data. The player can achieve the color bell winning by operating the corresponding stop button 42-44 at the timing when these operation images are displayed. In the AT transition lottery process, if a positive determination is made in the first determination process, a second determination process is executed to determine whether the lottery random number is equal to or greater than "224," and if a positive determination is made in the second determination process, an operation timing notification notice command is sent to the performance-side MPU 92. When the performance-side MPU 92 receives the operation timing notification notice command, it controls the light emission of the upper lamp 61, the sound output of the speaker 62, and the display of the image display device 63 so that a performance is executed that notifies the player that an operation timing notification will be executed after the transition to the AT state ST14. This prevents the processing configuration of the AT transition lottery process from becoming complicated, and makes it possible to execute the AT transition lottery process in a manner in which the numerical information that is a winning AT transition and is not subject to the operation timing notification within the numerical range of "0" to "255," the numerical information that is a winning AT transition and is subject to the operation timing notification and is not subject to the operation timing notification notice performance, and the numerical information that is a winning AT transition and is subject to the operation timing notification and is subject to the operation timing notification notice performance are dispersed so as not to be consecutive numbers. This reduces the possibility of bias in the results of the AT transition lottery process.

(34) In the above fifth to seventh embodiments, the configuration is such that whether or not one of the index values IV in which red bell winning data is set is determined based on the value of the 0th bit in the index value counter 74a, but this is not limited to this, and the configuration may also be such that whether or not an index value IV in which red bell winning data is set is determined based on a value other than the 0th bit. Specifically, the first red bell winning data is set to index value IV=0, the second red bell winning data is set to index value IV=1, the first black bell winning data is set to index value IV=2, the second black bell winning data is set to index value IV=3, the third red bell winning data is set to index value IV=4, the fourth red bell winning data is set to index value IV=5, the third black bell winning data is set to index value IV=6, the fourth black bell winning data is set to index value IV=7, the fifth red bell winning data is set to index value IV=8, the sixth red bell winning data is set to index value IV=9, the fifth black bell winning data is set to index value IV=10, and the sixth black bell winning data is set to index value IV=11.

Red bell winning data or black bell winning data with an index value IV set to 0-3 is bell winning data that can be used to achieve a win by making the first stop on the left reel 32L. Therefore, the main MPU 72 can execute processing corresponding to a win of bell winning data that can be used to achieve a win by making the first stop on the left reel 32L, based on the value of the index value counter 74a being within the range of "0" to "3." Red bell winning data or black bell winning data with an index value IV set to 4-7 is bell winning data that can be used to achieve a win by making the first stop on the center reel 32M. Therefore, the main MPU 72 can execute processing corresponding to a win of bell winning data that can be used to achieve a win by making the first stop on the center reel 32M, based on the value of the index value counter 74a being within the range of "4" to "7." Red bell winning data or black bell winning data set to an index value IV of 8 to 11 is bell winning data that can be used to achieve a win by having the first reel stop on the right reel 32R. Therefore, the host MPU 72 can execute processing corresponding to a win in which bell winning data that can be used to achieve a win by having the first reel stop on the right reel 32R is selected based on the value of the index value counter 74a being within the range of "8" to "11."

Index values IV = 0, 1, 4, 5, 8, 9 in which red bell winning data is set are numerical information in which the value of the first bit of the 0th to 7th bits of the index value IV is "0," while index values IV = 2, 3, 6, 7, 10, 11 in which black bell winning data is set are numerical information in which the value of the first bit of the 0th to 7th bits of the index value IV is "1." Therefore, the main MPU 72 can execute processing corresponding to winning an index value IV in which red bell winning data is set based on the value of the first bit in the index value counter 74a being "0," and can execute processing corresponding to winning an index value IV in which black bell winning data is set based on the value of the first bit in the index value counter 74a being "1." This simplifies the processing configuration for executing these processes.

(35) In the fifth to seventh embodiments, the AT transition lottery may be performed using an AT transition lottery table in which a point value PV that does not result in a win is set. Specifically, the main ROM 73 stores a first AT transition lottery table referenced in the normal gaming state ST11 and a second AT transition lottery table referenced in the bonus internal state ST12. These AT transition lottery tables have index values IV and point values PV set in them, similar to the role lottery tables TB1 and TB2. The main MPU 72 reads one of the AT transition lottery tables and performs the AT transition lottery process by executing the same processes as steps S2801 to S2806, S2809, and S2810 in the role lottery process (FIG. 62).

In these AT transition lottery tables, the index value IV=1 is set to the first AT transition win, where the initial number of game media awarded is "40." The index value IV=2 is set to the second AT transition win, where the initial number of game media awarded is "50." The index values IV of "3" and "4" are set to the third AT transition win, where the initial number of game media awarded is "100." Special effect information is also set for index value IV=4. The effects corresponding to the AT transition win include a normal effect in which the initial number of game media awarded, which is set when transitioning to AT state ST14, is displayed on the image display device 63, and a special effect in which the initial number is displayed on the image display device 63 and an audible notification of the AT transition win is output from the speaker 62. If the index value IV=4, for which special effect information is set, is won, a special effect is executed; otherwise, a normal effect is executed.

In these AT transition lottery tables, a point value PV of "5000" is set for index values IV=1 and IV=2. A point value PV of "1000" is set for index value IV=3 in the first AT transition lottery table and index value IV=4 in the second AT transition lottery table. This makes it possible to set the probability of winning the third AT transition to the same probability in the normal gaming state ST11 and the bonus internal state ST12. A point value PV of "0" is set for index value IV=4 in the first AT transition lottery table and index value IV=3 in the second AT transition lottery table. This makes it possible to configure the normal gaming state ST11 so that a win does not occur for index value IV=4, which has special effect information set, and to configure the bonus internal state ST12 so that a win does not occur for index value IV=3, which does not have special effect information set.

When an AT transition win occurs during the AT transition lottery process, the main MPU 72 transmits an AT transition win command in which the winning index value IV is set to the presentation MPU 92. The presentation MPU 92 determines that a third AT transition win has occurred in the normal gaming state ST11 based on the fact that the index value IV set in the received AT transition win command is "3," and executes a normal effect corresponding to the determined AT transition win. Furthermore, the presentation MPU 92 determines that a third AT transition win has occurred in the bonus internal state ST12 based on the fact that the index value IV set in the received AT transition win command is "4," and executes a special effect corresponding to the determined AT transition win. By configuring the execution of an effect corresponding to the situation in which the third AT transition win occurred based on the index value IV set in the AT transition win command in this way, the processing configuration for executing an effect corresponding to the situation in which the third AT transition win occurred can be simplified compared to a configuration in which it is necessary to set information indicating the type of AT transition win that occurred and information indicating the situation (game state) in which the AT transition win occurred in the AT transition win command.

(36) In the configuration of (35) above, the second AT transition lottery table described above may be stored in the main ROM 73 as a common AT transition lottery table used in the normal gaming state ST11 and the bonus internal state ST12. This eliminates the need to store the first AT transition lottery table in the main ROM 73, thereby reducing the data capacity of the main ROM 73 required to store the AT transition lottery table. When the main MPU 72 wins the index value IV = 4 in the AT transition lottery process, it determines whether the gaming state is the normal gaming state ST11, and if so, changes the index value IV set in the AT transition winning command from "4" to "3." This allows for a configuration in which the index value IV = 3 can be set in the AT transition winning command in the normal gaming state ST11, while also allowing for a configuration in which the index value IV = 4 is not set in the AT transition winning command. Additionally, in the bonus internal state ST12, it is possible to configure the AT transition winning command to have an index value IV = 4 set, and it is also possible to configure the AT transition winning command to not have an index value IV = 3 set.

(37) In the fifth to seventh embodiments, the bonus lottery may be performed using a bonus lottery table in which a point value PV that does not result in a win is set. Specifically, the bonus lottery is performed in the AT state ST14. The main ROM 73 stores a first bonus lottery table that is referenced in a first situation in which the remaining number of awarded gaming media in the AT state ST14 is 15 or more, and a second bonus lottery table that is referenced in a second situation in which the remaining number of awarded gaming media in the AT state ST14 is less than 15. These bonus lottery tables have index values IV and point values PV set in them, similar to the role lottery tables TB1 and TB2. The main MPU 72 reads one of the bonus lottery tables and performs the bonus lottery process by executing the same processes as steps S2801 to S2806, S2809, and S2810 in the role lottery process (FIG. 62).

In these bonus lottery tables, an index value IV=1 is set to a first bonus win in which the number of game media awarded increases by 10; an index value IV=2 is set to a second bonus win in which the number of game media awarded increases by 15; an index value IV=3 is set to a third bonus win in which the number of game media awarded increases by 20; an index value IV=4 is set to a fourth bonus win in which the number of game media awarded increases by 25; and index values IV of 5 and 6 are set to a fifth bonus win in which the number of game media awarded increases by 50. Special effect information is also set for index value IV=6. Effects corresponding to bonus wins include a normal effect in which the number of bonus awards is displayed on the image display device 63, and a special effect in which the number of bonus awards is displayed on the image display device 63 and an audible notification of an bonus win is output from the speaker 62. A special effect is executed when an index value IV=6, for which special effect information is set, is won; otherwise, a normal effect is executed.

In these bonus lottery tables, a point value PV of "2500" is set for index values IV=1 to 4. A point value PV of "1000" is set for index value IV=5 in the first bonus lottery table and index value IV=6 in the second bonus lottery table. This makes it possible to make the probability of winning the fifth bonus equal in the first and second situations. A point value PV of "0" is set for index value IV=6 in the first bonus lottery table and index value IV=5 in the second bonus lottery table. This makes it possible to configure the first situation so that a win does not occur for index value IV=6, which has special effect information set, and to configure the second situation so that a win does not occur for index value IV=5, which does not have special effect information set.

When an additional win occurs during the additional lottery process, the main MPU 72 sends an additional win command, in which the winning index value IV is set, to the production MPU 92. The production MPU 92 determines that a fifth additional win has occurred in the first situation based on the fact that the index value IV set in the received additional win command is "5," and executes a normal effect corresponding to the identified additional win. Furthermore, the production MPU 92 determines that a fifth additional win has occurred in the second situation based on the fact that the index value IV set in the received additional win command is "6," and executes a special effect corresponding to the identified additional win. By configuring the execution of an effect corresponding to the situation in which the fifth additional win occurred based on the index value IV set in the additional win command in this way, the processing configuration for executing an effect corresponding to the situation in which the fifth additional win occurred can be simplified compared to a configuration in which it is necessary to set information indicating the type of additional win that occurred and information indicating the situation in which the additional win occurred (information indicating the first situation or the second situation) in the additional win command.

(38) In the configuration of (37) above, the second bonus lottery table described above may be stored in the main ROM 73 as a common bonus lottery table used in the first and second situations. This eliminates the need to store the first bonus lottery table in the main ROM 73, thereby reducing the data capacity of the main ROM 73 required to store the bonus lottery table. When the main MPU 72 wins index value IV = 6 in the bonus lottery process, it determines whether the first situation is occurring, and if the first situation is occurring, it changes the index value IV set in the bonus win command from "6" to "5." This allows for a configuration in which index value IV = 5 can be set in the bonus win command in the first situation, and for index value IV = 6 not to be set in the bonus win command. Furthermore, it allows for a configuration in which index value IV = 6 can be set in the bonus win command in the second situation, and for index value IV = 5 not to be set in the bonus win command.

(39) In the fifth to seventh embodiments, the release game number lottery may be performed using a release game number lottery table in which a point value PV that does not result in a win is set. Specifically, a game in which the number of gaming media bets is "2" and a game in which the number of gaming media bets is "3" are executed, and the release game number lottery is performed in the first betting situation in which the number of gaming media bets is "2" or the third betting situation in which the number of gaming media bets is "3". The main ROM 73 stores a first release game number lottery table that is referenced in the first betting situation and a second release game number lottery table that is referenced in the second betting situation. In these release game number lottery tables, index values IV and point values PV are set, similar to the role lottery tables TB1 and TB2. The main MPU 72 reads one of the release game number lottery tables and executes the release game number lottery process by performing the same processes as steps S2801 to S2806, S2809, and S2810 in the role lottery process (FIG. 62).

In these release game number lottery tables, the index value IV=1 is set to "1200" as the release game number, the index value IV=2 is set to "1100" as the release game number, the index value IV=3 is set to "1000" as the release game number, the index value IV=4 is set to "900" as the release game number, and the index values IV of "5" and "6" are set to the minimum release game number of "600." Special effect information is also set for index value IV=6. The effects corresponding to the release game number setting include a normal effect in which a suggestive image indicating the size of the release game number to be set is displayed on the image display device 63, and a special effect in which a suggestive image indicating the size of the release game number to be set is displayed on the image display device 63 and an alarm sound is output from the speaker 62 to notify the player that the minimum release game number has been set. If the index value IV=6, for which special effect information is set, is selected, a special effect is executed; otherwise, a normal effect is executed.

In these number of release games lottery tables, a point value PV of "16,300" is set for index values IV = 1 to 4. A point value PV of "336" is set for index value IV = 5 in the first number of release games lottery table and index value IV = 6 in the second number of release games lottery table. This makes it possible to make the probability of winning the minimum number of release games the same in the first betting situation and the second betting situation. A point value PV of "0" is set for index value IV = 6 in the first number of release games lottery table and index value IV = 5 in the second number of release games lottery table. This makes it possible to configure the first betting situation so that a win for index value IV = 6, which has special effect information set, does not occur, and to configure the second betting situation so that a win for index value IV = 5, which does not have special effect information set, does not occur.

When the release game number lottery process is executed, the main MPU 72 sends a release game number command in which the winning index value IV is set to the presentation MPU 92. The presentation MPU 92 determines that the minimum release game number has been won in the first betting situation based on the fact that the index value IV set in the received release game number command is "5," and executes a normal effect corresponding to the specified release game number. Furthermore, the presentation MPU 92 determines that the minimum release game number has been won in the second betting situation based on the fact that the index value IV set in the received release game number command is "6," and executes a special effect corresponding to the specified release game number. In this way, by configuring the system to execute an effect corresponding to the situation in which the minimum number of release games is won based on the index value IV set in the release game number command, the processing configuration for executing an effect corresponding to the situation in which the minimum number of release games is won can be simplified compared to a configuration in which it is necessary to set information indicating the number of release games won in the release game number command and information indicating the situation in which the release game number lottery was executed (information indicating the first betting situation or the second betting situation).

(40) In the configuration of (39) above, the second release game number lottery table described above may be stored in the main ROM 73 as a common release game number lottery table used in the first betting situation and the second betting situation. This eliminates the need to store the first release game number lottery table in the main ROM 73, thereby reducing the data capacity of the main ROM 73 required to store the release game number lottery table. When the main MPU 72 wins index value IV = 6 in the release game number lottery process, it determines whether the first betting situation is present, and if the first betting situation is present, it changes the index value IV set in the release game number command from "6" to "5." This allows for a configuration in which index value IV = 5 can be set in the release game number command in the first betting situation, and also allows for a configuration in which index value IV = 6 is not set in the release game number command. Furthermore, it is possible to configure the release game count command to have an index value IV=6 set in the second bet situation, and it is also possible to configure the release game count command to not have an index value IV=5 set.

(41) In the fifth and sixth embodiments, the index value IV that can win in the lottery process for winning combinations may vary depending on the number of gaming media bets. Specifically, the main ROM 73 stores, as combination lottery tables referenced in the normal gaming state ST11 or the AT state ST14, a non-internal combination lottery table for three bets that is referenced when the number of gaming media bets is "3," and a non-internal combination lottery table for two bets that is referenced when the number of gaming media bets is "2." In these non-internal combination lottery tables, first chance replay winning data is set for index value IV = 17, and second chance replay winning data is set for index value IV = 18. In the non-internal combination lottery table for three bets, the point value PV set for index value IV = 17 is "600," and the point value PV set for index value IV = 18 is "0." Furthermore, in the non-internal role lottery table when two coins are bet, the point value PV set for index value IV = 17 is "0," and the point value PV set for index value IV = 18 is "600." As a result, when the role lottery process is executed with reference to the non-internal role lottery table when three coins are bet, it is possible to win the index value IV (specifically, "17") in which the first chance replay winning data is set, but not the index value IV (specifically, "18") in which the second chance replay winning data is set. Furthermore, when the role lottery process is executed with reference to the non-internal role lottery table when two coins are bet, it is possible to win the index value IV (specifically, "18") in which the second chance replay winning data is set, but not the index value IV (specifically, "17") in which the first chance replay winning data is set.

The host MPU 72 executes a determination process to determine whether the value of the index value counter 74a is "17," and, based on a positive determination in the determination process, executes a process to execute a first chance replay effect corresponding to winning the index value IV for which the first chance replay winning data is set in a game in which the number of gaming media bets is "3." This simplifies the processing configuration for executing a first chance replay effect based on winning the index value IV for which the first chance replay winning data is set in a game in which the number of gaming media bets is "3," compared to a configuration that requires a determination process to determine whether the first chance replay winning data is set in the host RAM 74 and a determination process to determine whether the number of gaming media bets in the game in which the first chance replay winning data is set. The main MPU 72 also executes a determination process to determine whether the value of the index value counter 74a is "18," and, based on a positive determination in the determination process, executes a process to execute a second chance replay effect corresponding to winning the index value IV for which the second chance replay winning data is set in a game in which the number of gaming media bets is "2." This simplifies the processing configuration for executing a second chance replay effect based on winning the index value IV for which the second chance replay winning data is set in a game in which the number of gaming media bets is "2," compared to a configuration that requires not only a determination process to determine that the second chance replay winning data has been set in the main RAM 74, but also a determination process to determine that the number of gaming media bets in the game in which the second chance replay winning data was set.

(42) In the fifth to seventh embodiments, a cherry winning effect may be executed when a cherry winning occurs in a game where the number of gaming media bets is three, whereas an effect corresponding to the cherry winning may not be executed when a cherry winning occurs in a game where the number of gaming media bets is two. Specifically, when a cherry winning occurs in a game where the number of gaming media bets is three, the payout number counter in the main RAM 74 is set to "18," and when a cherry winning occurs in a game where the number of gaming media bets is two, the payout number counter in the main RAM 74 is set to "4." The numerical information "18" is set in the payout number counter only when a cherry winning occurs in a game where the number of gaming media bets is three, and the numerical information "4" is set in the payout number counter only when a cherry winning occurs in a game where the number of gaming media bets is two. Furthermore, the award number of "18" is the maximum award number among the award numbers that are set based on the establishment of a small winning combination. The main MPU 72 executes a determination process to determine whether the value of the payout number counter is "18," and, on the condition that a positive determination is made in the determination process, transmits a cherry award command to the presentation MPU 92. When the presentation MPU 92 receives the cherry award command, it controls the light emission of the upper lamp 61, the sound output of the speaker 62, and the display of the image display device 63 so that a cherry award presentation corresponding to the establishment of a cherry award with the maximum award number (specifically, "18") is executed. This configuration executes a determination process to determine whether the value of the payout number counter is "18," and sends a cherry win command if a positive determination is made. This reduces the number of determination processes required to identify that a cherry win has been achieved in a game with a bet of "3," compared to a configuration that requires not only a determination process to determine whether a cherry win has been achieved, but also a determination process to determine whether the game in which the cherry win data that triggered the cherry win was set was a game with a bet of "3." This simplifies the processing configuration for executing a cherry win effect based on the achievement of a cherry win in a game with a bet of "3," and reduces the data capacity of the main ROM 73 required to store the program corresponding to this processing.

(43) In the fifth to seventh embodiments described above, a cherry winning effect may be executed when a cherry winning occurs in a game executed in the bonus internal state ST12, whereas an effect corresponding to the cherry winning may not be executed when a cherry winning occurs in a game executed in the normal gaming state ST11 or the AT state ST14. Specifically, when a cherry winning occurs in a game executed in the bonus internal state ST12, the payout number counter in the main RAM 74 is set to "18," and when a cherry winning occurs in a game executed in the normal gaming state ST11 or the AT state ST14, the payout number counter in the main RAM 74 is set to "4." The numerical information "18" is set in the payout number counter only when a cherry win is achieved in a game executed in the bonus internal state ST12, and the numerical information "4" is set in the payout number counter only when a cherry win is achieved in a game executed in the normal game state ST11 or the AT state ST14. The payout number "18" is the maximum payout number set based on the achievement of a small win. The main MPU 72 executes a determination process to determine whether the payout number counter value is "18," and, if a positive determination is made in the determination process, transmits a cherry win command to the presentation MPU 92. Upon receiving the cherry win command, the presentation MPU 92 controls the illumination of the upper lamp 61, the sound output of the speaker 62, and the display of the image display device 63 to execute a cherry win effect corresponding to the achievement of a cherry win with the maximum award number (specifically, "18"). This configuration executes a determination process to determine whether the value of the payout number counter is "18," and sends a cherry win command if a positive determination is made. This reduces the number of determination processes required to identify that a cherry win was made in a game played in the bonus internal state ST12, compared to a configuration that requires not only a determination process to determine whether a cherry win has been made, but also a determination process to determine whether the game in which the cherry win data that triggered the cherry win was set was a game played in the bonus internal state ST12. This simplifies the processing configuration for executing the cherry win effect based on the cherry win being made in a game played in the bonus internal state ST12, and reduces the data capacity of the main ROM 73 required to store the program corresponding to this processing.

(44) In the fifth to seventh embodiments, a configuration may be adopted in which a win is determined based on the value of the index value counter 74a when the number of bets is "3" and the index value IV for which cherry winning data is set is determined. Specifically, a three-coin bet winning combination table, which is referenced when a game is executed when the number of bets is "3," and a two-coin bet winning combination table, which is referenced when a game is executed when the number of bets is "2," are stored in the main ROM 73. In these winning combination tables, cherry winning combination data is set for index values IV of "14" and "15." In the three-coin bet winning combination table, a point value PV of 850 is set corresponding to an index value IV of 14, and a point value PV of 0 is set corresponding to an index value IV of 12. In addition, in the two-coin bet winning combination table, a point value PV of 0 is set corresponding to an index value IV of 14, and a point value PV of 850 is set corresponding to an index value IV of 15. For this reason, when the role selection table for three bets is referenced, an index value IV of 14 is an index value IV that can result in a win, and an index value IV of 15 is an index value IV that will not result in a win. Furthermore, when the role selection table for two bets is referenced, an index value IV of 14 is an index value IV that will not result in a win, and an index value IV of 15 is an index value IV that can result in a win. If the normal lottery for the AT transition lottery results in a loss, the main MPU 72 performs a determination process to determine whether the value of the index value counter 74a is "14" or not, and a re-lottery is executed on the condition that a positive determination is made in the determination process. Furthermore, if the normal lottery for the additional lottery results in a loss, the main MPU 72 performs a determination process to determine whether the value of the index value counter 74a is "14" or not, and a re-lottery is executed on the condition that a positive determination is made in the determination process.

In this way, by determining that the value of the index value counter 74a is "14," it is possible to determine that an index value IV set with cherry winning data has been won in a game with a bet of "3." This simplifies the processing configuration for the process that enables a re-draw to be performed on the condition that an index value IV set with cherry winning data has been won in a game with a bet of "3," compared to a configuration that requires processing to determine whether an index value IV set with cherry winning data has been won in addition to processing to determine whether that index value IV was won in a game with a bet of "3."

(45) In the fifth to seventh embodiments described above, the index value IV, which is the target of the win/loss determination process in the winning combination lottery process, is updated in ascending order from "1." However, this is not limited to this, and the index value IV may be updated in descending order. Specifically, in the winning combination lottery process, the index value IV is first set to "20." Thereafter, a process is executed to subtract 1 from the index value IV each time the winning data, which is the target of the win/loss determination process, is updated. This allows the index value IV, which is the target of the win/loss determination process in the winning combination lottery process, to be updated in descending order from "20." Even in this configuration, by configuring the index value IV set in the index value counter 74a when cherry winning data is won in the bonus internal state ST12 to be different from the index value IV set in the index value counter 74a when cherry winning data is won in the normal gaming state ST11 or AT state ST14, it is possible to determine whether cherry winning data has been won in the bonus internal state ST12 based on the value of the index value counter 74a.

(46) In the fifth to seventh embodiments described above, when the index value IV for which the BB winning data and the cherry winning data are set is selected in the role selection process, the cherry winning takes priority over the BB winning. However, this is not limited to this, and the BB winning may take priority over the cherry winning. Specifically, when the role selection process is executed in a non-bonus internal state and a winning result is obtained with index value IV = 15, the cherry winning or the BB winning may occur regardless of the stopping order of reels 32L, 32M, and 32R. In a situation where a cherry win is possible (specifically, any of the following situations: a situation where all reels 32L, 32M, and 32R are spinning; a situation where a "red 7" symbol is stopped on the main line ML of the center reel 32M and the left reel 32L and right reel 32R are spinning; a situation where a "red 7" symbol is stopped on the main line ML of the right reel 32R and the left reel 32L and center reel 32M are spinning; and a situation where a "red 7" symbol is stopped on the main line ML of the center reel 32M and right reel 32R and the left reel 32L is spinning), if the left stop button 42 is operated at a timing where it is possible to stop the "red 7" symbol on the left reel 32L on the main line ML, stop control of the left reel 32L is executed so that the "red 7" symbol is stopped on the main line ML, even if it is possible to stop the "cherry" symbol on the left reel 32L on the main line ML. This allows a win with index value IV = 15 to prioritize a BB win over a Cherry win. Furthermore, if a symbol other than a "Red 7" symbol is stopped on at least one of the main lines ML of the center reel 32M and the right reel 32R, and the left stop button 42 is operated at a time when a "Cherry" symbol on the left reel 32L can be stopped on the main line ML, the left reel 32L is controlled to stop so that the "Cherry" symbol stops on the main line ML, even if a "Red 7" symbol on the left reel 32L can be stopped on the main line ML. Furthermore, depending on the operation timing of each stop button 42-44, a BB win may not be achieved, and depending on the operation timing of the left stop button 42, a Cherry win may not be achieved.

(47) In the fifth to seventh embodiments, information that makes it easy to distinguish between the red, black, and blue ranges may be set on each reel 32L, 32M, and 32R. Specifically, in the fifth and seventh embodiments, red areas are provided around symbols that are included in the "left red range" but not the "left black range," symbols that are included in the "middle red range" but not the "middle black range," and symbols that are included in the "right red range" but not the "right black range." Furthermore, black areas are provided around symbols that are included in the "left black range" but not the "left red range," symbols that are included in the "middle black range" but not the "middle red range," and symbols that are included in the "right black range" but not the "right red range." Furthermore, purple areas are provided around symbols that are included in the "left red range" and the "left black range," symbols that are included in the "middle red range" and the "middle black range," and symbols that are included in the "right red range" and the "right black range." This allows the player to easily see the red and black ranges on each reel 32L, 32M, and 32R. In the sixth embodiment, a red area is provided as part of the background of the symbols included in the "left red range," the symbols included in the "middle red range," and the symbols included in the "right red range." Furthermore, a black area is provided as part of the background of the symbols included in the "left black range," the symbols included in the "middle black range," and the symbols included in the "right black range." Furthermore, a blue area is provided as part of the background of the symbols included in the "left blue range," the symbols included in the "middle blue range," and the symbols included in the "right blue range." This allows the player to easily see the red, black, and blue ranges on each reel 32L, 32M, and 32R.

(48) In the tenth, sixteenth, and seventeenth embodiments, similar to the first embodiment, if the reset button 56 is not pressed when the supply of operating power begins, a partial clear process for the area (step S105) may be executed, and if the reset button 56 is pressed when the supply of operating power begins, a full clear process for the area (step S106) may be executed.

(49) In the eighth embodiment, the pre-end emphasis image G81 is displayed to emphasize and notify the player that the forced termination of game play is approaching. However, this is not limited to this, and a sound announcing the number of coins remaining to be paid out until the forced termination of game play (for example, a sound saying "100 coins left until game play is stopped") may be output from the speaker 62. Specifically, when the display of the pre-end image G33 begins and when the display of the demo image G82 ends, in addition to the display of the pre-end image G33 on the image display device 63, a sound announcing the number of coins remaining to be paid out until the forced termination of game play is output. This makes it possible to emphasize and notify the player that the forced termination of game play is approaching.

(50) In the eighth embodiment, the display of the pre-end emphasis image G81 may be terminated based on the fact that the image G81 has been displayed for a predetermined period of time (for example, one minute). Furthermore, the display of the pre-end emphasis image G81 may be terminated based on the fact that the first game has started after the display of the pre-end emphasis image G81 has started.

(51) In the eighth embodiment described above, when the image display device 63 is displaying a background image corresponding to the ending AT state ST5 and a pre-end image G33, a configuration may be adopted in which, based on the occurrence of a penalty event, a background image corresponding to the penalty target game is displayed in place of the background image corresponding to the ending AT state ST5. The background image is switched from the background image corresponding to the ending AT state ST5 to a background image corresponding to the penalty game while the pre-end image G33 continues to be displayed. This prevents the display of the pre-end image G33 from being interrupted due to the occurrence of a penalty event. The display content of the pre-end image G33 does not change even if the background image is switched.

(52) In the eighth embodiment described above, if a win occurs in the CZ state to transition to the base AT state ST4, a display indicating the number of games remaining until the CZ state ends and transition to the base AT state ST4 may be executed on the image display device 63. Specifically, the CZ state counter is set to "5" at the start of the CZ state. If a win occurs in the CZ state to transition to the base AT state ST4, and the number of games remaining in the CZ state is four, a pre-announcement text image stating "4 games left until transition to the base AT state" is displayed on the image display device 63. The number of remaining games indicated in the pre-announcement text image is updated each time the number of games remaining in the CZ state decreases by one. This allows the player to be notified that the time is approaching when the CZ state will end and the transition to the base AT state ST4 will occur. Furthermore, when the number of games remaining in the CZ state is one, in addition to the advance notification text image stating "One game left until transition to base AT state," an emphasized advance notification text image with the same content ("One game left until transition to base AT state") but larger in size than the advance notification text image is displayed on the image display device 63. The emphasized advance notification text image is displayed closer to the center of the screen of the image display device 63 than the advance notification text image while the advance notification text image continues to be displayed. This allows the emphasized advance notification text image to be displayed in a more prominent manner than the advance notification text image. It also prevents the display of the advance notification text image from being interrupted due to the start of display of the emphasized advance notification text image.

(53) In the eighth embodiment, if a penalty event occurs in a game, a penalty game may be executed after three games have been played after the game has ended, and if a penalty event occurs, a display indicating the number of games remaining until the start of the penalty game may be executed on the image display device 63. Specifically, if a penalty event occurs, an advance notification text image stating "3 games remaining until the penalty game" is displayed on the image display device 63. The number of remaining games indicated by the advance notification text image is updated each time a game is played. This notifies the player that the start timing of the penalty game is approaching. Furthermore, when the number of games remaining until the start of the penalty game is one game, in addition to the advance notification text image stating "1 game remaining until the penalty game," an emphasized advance notification text image with the same content ("1 game remaining until the penalty game") but larger in size than the advance notification text image is displayed on the image display device 63. The emphasized advance notification text image is displayed closer to the center of the screen of the image display device 63 than the advance notification text image while the advance notification text image continues to be displayed. This allows the emphasized advance warning text image to be displayed in a more prominent manner than the advance warning text image. It also prevents the display of the advance warning text image from being interrupted due to the start of display of the emphasized advance warning text image.

(54) In the eighth embodiment, a demo effect may be displayed for a predetermined period of time when a predetermined time has elapsed after a new game has not been started for a predetermined period of time. Specifically, the effect control board 91 is provided with a real-time clock. When the effect control board 91 determines that a predetermined time (e.g., 10:00 AM, 11:00 AM, ..., 9:00 PM, and 10:00 PM) has elapsed by referring to the real-time clock in a situation where no rotation acceptance commands A or B have been received from the main MPU 72 for 10 minutes or more, the effect control board 91 executes a demo effect in which the image display device 63 displays a demo image G82 for five minutes. The demo effect ends when five minutes have elapsed since the start of the demo effect, or when the effect control board 92 receives rotation acceptance commands A or B. In this way, when multiple slot machines 10 of the same model are placed adjacent to each other in an amusement parlor, the demo effect can be displayed on the multiple slot machines 10 at approximately the same time, making it easier to attract players' attention.

(55) In the eighth to tenth embodiments described above, when the non-play period reaches or exceeds the demo start reference period (e.g., one minute), the display of the demo image G82 is initiated in place of the display for effects (display of the remaining award number image G21, the number of wins image G22, the number of games played image G23, and the character image for effects in the base AT state ST4). However, this is not limited to this, and the display for effects and the demo image G82 may be configured to be displayed in a manner in which the demo image G82 stands out more than the display for effects. Specifically, a reduced display for effects (reduced display of the remaining award number image G21, the number of wins image G22, the number of games played image G23, and the character image for effects in the base AT state ST4) is displayed in the lower left area of the screen of the image display device 63 (e.g., 1/4 of the screen area), and the demo image G82 is displayed in the remaining area of the screen (e.g., 3/4 of the screen area). This allows the display for effects and the demo image G82 to be displayed in a manner in which the demo image G82 stands out more than the display for effects.

(56) In the eighth to tenth embodiments described above, instead of displaying the demo image G82, a standby state display in which the screen of the image display device 63 goes dark may be configured. Specifically, when the non-play period is equal to or longer than the demo start reference period, the standby state display is initiated with the image display device 63 displaying the effects (the display of the remaining award number image G21, the acquisition number image G22, the number of games played image G23, and the effect character image G80 in the base AT state ST4). In the standby state display, the screen of the image display device 63 darkens in areas other than the display areas of the pre-end image G33 and the pre-end emphasis image G81, making the standby state display more noticeable than the effects display. Even during the standby state display, the brightness of the display areas of the pre-end image G33 and the pre-end emphasis image G81 remains unchanged. This increases the attention paid to the pre-end image G33 and the pre-end emphasis image G81.

(57) In the eighth to tenth embodiments described above, the image display device 63 may be configured to display a background image corresponding to the game status and an in-game effect image corresponding to each game (e.g., a character image corresponding to the game status), and may be configured to start displaying a demo image G82 instead of the background image and in-game effect image when the non-play period exceeds the demo start reference period (e.g., one minute).

(58) In the eighth to tenth embodiments described above, the image display device 63 may be configured to display a background image corresponding to the game status and an in-game effect image corresponding to each game (e.g., a character image corresponding to the game status), and may also be configured to display the background image, in-game effect image, and demo image G82 in a manner such that the demo image G82 stands out more than the background image and in-game effect image when the non-play period is equal to or longer than the demo start reference period (e.g., one minute). Specifically, the background image and in-game effect image are displayed in a reduced size in the lower left area of the screen of the image display device 63 (e.g., 1/4 of the screen area), and the demo image G82 is displayed in the remaining area of the screen (e.g., 3/4 of the screen area). This allows the background image, in-game effect image, and demo image G82 to be displayed in a manner such that the demo image G82 stands out more than the background image and in-game effect image.

(59) In the eighth to tenth embodiments described above, when the pre-end image G33 is being displayed, if the display of the demo image G82 begins based on the non-play period being equal to or longer than the demo start reference period, the display size of the pre-end image G33 may be reduced (specifically, reduced to 80% of its original size), and when the display of the demo image G82 ends, the display size of the pre-end image G33 may be increased (specifically, returned to its original size before reduction). Furthermore, when the pre-end image G33 is being displayed, if the display of the demo image G82 begins based on the non-play period being equal to or longer than the demo start reference period, the display position of the pre-end image G33 on the image display device 63 may be changed (specifically, changed from the bottom left to the top right of the screen), and when the display of the demo image G82 ends, the display position of the pre-end image G33 on the image display device 63 may be changed (specifically, returned from the top right to the bottom left of the screen).

(60) In the eighth to tenth embodiments described above, when the pre-end image G33 is being displayed, the display of the demo image G82 is started based on the non-play period becoming equal to or longer than the demo start reference period, and then a predetermined period (specifically, 0.5 seconds) after that, the display of the pre-end emphasis image G81 may be started. Also, when the pre-end image G33 and the demo image G82 are being displayed, the display of the pre-end emphasis image G81 may be started after a predetermined period (specifically, 0.5 seconds) after the display of the demo image G82 has ended.

(61) In the eighth to tenth embodiments described above, when the pre-end image G33 and the demo image G82 are being displayed, the production-side MPU 92 may be configured to execute processing to update the display content of the pre-end image G33 and processing to update the display content of the demo image G82.

(62) In the eighth to tenth embodiments described above, when the pre-end image G33 and the demo image G82 are being displayed, if the display of the demo image G82 is terminated, the display of the pre-end image G33 may be terminated at the same time as the display of the demo image G82, and the display of the pre-end image G33 may be resumed after a predetermined period of time (specifically, 0.5 seconds) has elapsed.

(63) In the tenth embodiment, when a win occurs with an index value IV for which CB winning data is set in a CB internal state or in a game started in a non-CB internal state, a guideline symbol notification may be provided to notify a symbol that serves as a guide for the timing of operating the left stop button 42 to prevent a CB win. Specifically, in a game started in a CB internal state or in a game started in a non-CB internal state and a win occurs with an index value IV for which CB winning data is set, a CB win avoidance notification is executed when the presentation-side MPU 92 receives rotation acceptance commands A and B. In the CB win avoidance notification, a text image reading "Aim for Cherry" is displayed on the image display device 63. The player can prevent the "Red 7" symbol from stopping on the main line ML of the left reel 32L by operating the stop button 42 when the "Cherry" symbol is located on the main line ML of the left reel 32L. By preventing the "red 7" symbol from stopping on the main line ML of the left reel 32L, it is possible to prevent a CB win from occurring. In this way, by configuring the system to notify players of a CB win prevention, it is possible to reduce the possibility of a CB win occurring.

(64) In the eleventh embodiment described above, if an error command corresponding to any of the error information "1" to "5" is sent when an error corresponding to any of the error information "1" to "5" has occurred, a cancellation error command may be sent before the error command is sent; and if an error command corresponding to any of the error information "1" to "5" is sent when no error has occurred, a cancellation error command may not be sent before the error command is sent.

(65) In the eleventh embodiment described above, in addition to or instead of the configuration in which error information is transmitted based on a combination of the error information set in the current error information counter 96r and the error information set in the previous error information counter 96s, a configuration in which status information is transmitted based on a combination of the status information set in the current status information counter and the status information set in the previous status information counter may be adopted. Examples of status information include "1" corresponding to the normal game status ST1, "2" corresponding to the CB status, "3" corresponding to the base AT status ST4, and "4" corresponding to the ending AT status ST5.

(66) In the eleventh embodiment described above, in addition to or instead of the configuration in which error information is transmitted based on a combination of the error information set in the current error information counter 96r and the error information set in the previous error information counter 96s, a configuration in which detection information is transmitted based on a combination of the detection information set in the current detection information counter and the detection information set in the previous detection information counter may be used. Examples of detection information include "1" which corresponds to a state in which an unauthorized magnetism has been detected, "2" which corresponds to a state in which an unauthorized radio wave has been detected, and "3" which corresponds to a state in which abnormal vibrations have been detected.

(67) In the eleventh embodiment described above, a configuration may be adopted in which a cheating detection signal is transmitted instead of a game start signal. When the cheating detection signal is raised, a period during which the cheating detection signal is prohibited from falling (300.98 milliseconds) is set. This prevents the cheating detection signal from falling without the timing for transmitting the third gaming machine information notification occurring after the cheating detection signal is raised. Furthermore, when the cheating detection signal is lowered, a period during which the cheating detection signal is prohibited from rising (300.98 milliseconds) is set. This prevents the cheating detection signal from rising without the timing for transmitting the third gaming machine information notification occurring after the cheating detection signal is lowered.

(68) In the above 11th to 13th embodiments, the numerical information set in the first interval setting counter 96p, the second interval setting counter 96q, the third interval setting counter 96t, and the interval setting counter 96v is not limited to numerical information ("202") corresponding to 300.98 milliseconds, but may be any numerical information equal to or greater than the occurrence period of the timing of transmitting the third gaming machine information notification (300 milliseconds). Specifically, the first interval setting counter 96p, the second interval setting counter 96q, the third interval setting counter 96t, or the interval setting counter 96v may be configured to set numerical information ("210") corresponding to 312.9 milliseconds, or to set numerical information ("404") corresponding to 601.96 milliseconds.

(69) In the eleventh to thirteenth embodiments, instead of a configuration in which a signal is output from the main MPU 72 to the value number MPU 142, a configuration in which signal information data is transmitted from the main MPU 72 to the value number MPU 142 may be used. Specifically, the main MPU 72 transmits a game start signal startup command instead of the startup of the game start signal, and transmits a game start signal shutdown command instead of the startup of the game start signal. Furthermore, the main MPU 72 transmits a base AT signal, an AT first win signal, or a game signal startup command instead of the startup of these signals, and transmits a shutdown command instead of the shutdown of these signals.

(70) In the eleventh and twelfth embodiments described above, the time set in the first interval setting counter 96p when the game start signal is raised may be configured to be longer (specifically, 600 milliseconds) than the time set in the first interval setting counter 96p when the game start signal is lowered (specifically, 300 milliseconds). Furthermore, the time set in the first interval setting counter 96p when the game start signal is raised may be configured to be shorter (specifically, 300 milliseconds) than the time set in the first interval setting counter 96p when the game start signal is lowered (specifically, 600 milliseconds). Furthermore, the time set in the second interval setting counter 96q when the base AT signal is raised may be configured to be longer (specifically, 600 milliseconds) than the time set in the second interval setting counter 96q when the base AT signal is lowered (specifically, 300 milliseconds). Furthermore, the time set in the second interval setting counter 96q when the base AT signal rises may be shorter (specifically, 300 milliseconds) than the time set in the second interval setting counter 96q when the base AT signal falls (specifically, 600 milliseconds).

(71) In the above 11th embodiment, if the supply of operating power to the slot machine 10 is stopped while the error display "award limit reached" is being displayed and then normal operation is resumed, the presentation-side MPU 92 receives a power restoration command containing error information ("1") corresponding to "award limit reached," and the error display corresponding to "award limit reached" is resumed on the image display device 63 based on the reception of that power restoration command by the presentation-side MPU 92. However, this is not limited to this, and the main-side MPU 72 may send an error command corresponding to "award limit reached" after normal operation is resumed, and the error display corresponding to "award limit reached" may be resumed on the image display device 63 based on the presentation-side MPU 92 receiving the error command corresponding to "award limit reached."

(72) In the above-described twelfth embodiment, the initialization process for the second section SC2 may be configured not to switch the section display unit 67 to an off state. Specifically, when the ending conditions are met and the ending AT state ST5 ends, the initialization process for the second section SC2 is executed in step S1208 of the game section control process (Figure 28). In the initialization process for the second section SC2, the second section flag, base AT state flag, and ending AT state flag in the various flag areas 96i in the work area 96 for intra-area processing are cleared to "0," and the AT difference number counter 96e in the work area 96 for intra-area processing is cleared to "0." This results in a situation in which the first section SC1 is in the normal game state ST1. If a win occurs with any index value IV in a game started after the initialization process for the second section SC2 is executed, the game transitions to the second section SC2. The lit state of the section display unit 67 continues from the time the initialization process for the second section SC2 is executed until the transition to the second section SC2, and continues even after the transition to the second section SC2. This prevents the player from realizing that the initialization process for the second section SC2 has been executed based on the display of the section display unit 67. Therefore, when the initialization process for the second section SC2 is executed based on the value of the total win number counter 96d being equal to or greater than "65321" at the time the termination condition for the base AT state ST4 is met, or when the initialization process for the second section SC2 is executed based on the completion of the ending condition, the player can expect that the second section SC2 is continuing.

(73) In the twelfth embodiment described above, the CZ lottery process may be configured to be executed in the normal process (Figure 126). Specifically, the CZ state is entered based on a CZ win in the CZ lottery process, and when a transition win to the base AT state ST4 occurs during the CZ state and a transition to the base AT state ST4 occurs, the AT first hit signal is raised. This allows players and gaming hall managers to distinguish, based on the behavior of the AT first hit signal, between a case where the CZ state is entered based on a CZ win in the CZ lottery process and a transition win to the base AT state ST4 occurs during the CZ state, and a case where the CZ state is entered after the end of the base AT state ST4 or the end of the ending AT state ST5 and a transition win to the base AT state ST4 occurs during the CZ state.

(74) In the twelfth embodiment, if the ending pre-condition is met at the time the ending condition for the base AT state ST4 is met, a transition to the ending AT state ST5 may occur. Specifically, in the base AT processing (FIG. 124), if the value of the AT difference counter 96e is "0," i.e., if the ending condition for the base AT state ST4 is met, it is determined whether the value of the total winnings counter 96d is "65321" or greater. If the value of the total winnings counter 96d is "65321" or greater, i.e., if the ending pre-condition is met, a transition from the base AT state ST4 to the ending AT state ST5 occurs. This makes it possible to ensure that the ending condition for the second section SC2 is met when the ending pre-condition for the base AT state ST4 is met at the same time.

(75) In the twelfth embodiment, if a transition to the base AT state ST4 occurs in a CZ state (the CZ state after the ending condition is met) that is set based on the transition to the second section SC2 after the ending condition is met and the first section SC1 is reached, and the transition to the base AT state ST4 is based on the occurrence of a win to transition to the base AT state ST4, the configuration may be such that it is easier to transition back to the base AT state ST4 after the base AT state ST4 ends than if the transition to the base AT state ST4 occurred in a state that is not the CZ state after the ending condition is met. Specifically, if a transition to the base AT state ST4 occurs in the CZ state after the ending condition is met, the ending transition flag set in the work area 96 for specific control is set to "1." On the other hand, if a transition to the base AT state ST4 occurs in a state that is not the CZ state after the ending condition is met, the value of the ending transition flag becomes "0." When the value of the AT difference number counter 96e becomes "0," the base AT state ST4 ends and the CZ state begins. The probability of an AT win in the AT lottery process executed in the CZ state is higher when the value of the ending via flag is "1" than when the value of the ending via flag is "0." This increases the likelihood of a win to transition to the base AT state ST4 occurring during the CZ state set at the end of the base AT state ST4 transitioned from the CZ state after the ending condition is met, resulting in a transition to the base AT state ST4 again, compared to the likelihood of a win to transition to the base AT state ST4 occurring during the CZ state set at the end of the base AT state ST4 transitioned from a state other than the CZ state after the ending condition is met, resulting in a transition to the base AT state ST4 again.

Instead of varying the probability of winning the AT depending on the value of the ending transition flag, a configuration may be adopted in which, at the start of the CZ state, if the value of the ending transition flag is "0," the CZ state counter 96h is set to "3," and if the value of the ending transition flag is "1," the CZ state counter 96h is set to "10." Even with this configuration, the likelihood of winning the transition to the base AT state ST4 during the CZ state set at the end of the base AT state ST4 transitioned from the CZ state after the ending condition is met and transitioning back to the base AT state ST4 is higher than the likelihood of winning the transition to the base AT state ST4 during the CZ state set at the end of the base AT state ST4 transitioned from the CZ state after the ending condition is met and transitioning back to the base AT state ST4.

(76) In the twelfth embodiment described above, the configuration may be such that, provided that the game state when the ending condition of the second section SC2 is fulfilled is the base AT state ST4 or the ending AT state ST5, the activation of the AT initial win signal is avoided if a win to transition to the base AT state ST4 occurs during the CZ state set at the time of the transition to the second section SC2 after the end of the second section SC2. Specifically, when the value of the total winning number counter 96d in the second section SC2 becomes "65321" or greater and the ending condition of the second section SC2 is fulfilled, an initialization process for the second section SC2 (step S1208) is executed. In the initialization process for the second section SC2, the signal output avoidance flag 96u is set to "1" provided that the game state when the ending condition of the second section SC2 is fulfilled is the base AT state ST4 or the ending AT state ST5. If the game state when the ending condition of the second section SC2 is established is not the base AT state ST4 or the ending AT state ST5, the value of the signal output avoidance flag 96u becomes "0." If a win occurs to transition to the base AT state ST4 during the CZ state set at the time of transition to the second section SC2 after the end of the second section SC2, if the value of the signal output avoidance flag 96u is "0," the AT first win signal is raised, and if the value of the signal output avoidance flag 96u is "1," the raising of the AT first win signal is avoided. This allows the AT first win signal to be raised if the ending conditions of the second section SC2 are met in a game state that is not the base AT state ST4 or the ending AT state ST5, and a win to transition to the base AT state ST4 occurs during the CZ state that is set when transitioning to the second section SC2 after the end of the second section SC2, while the AT first win signal is avoided from being raised if the ending conditions of the second section SC2 are met in the base AT state ST4 or the ending AT state ST5, and a win to transition to the base AT state ST4 occurs during the CZ state that is set when transitioning to the second section SC2 after the end of the second section SC2.

(77) In the above twelfth embodiment, when the signal output avoidance flag 96u is set to "1," the rising of the AT first hit signal may be avoided when transitioning to the base AT state ST4 based on the occurrence of a win to transition to the base AT state ST4 in the AT lottery process, while the AT first hit signal may be raised when transitioning to the base AT state ST4 based on the value of the release game number counter 96g becoming "0." This makes it possible to make the behavior of the AT first hit signal the same as that when an AT first hit occurs (specifically, behavior in which the AT first hit signal rises) regardless of the value of the signal output avoidance flag 96u when transitioning to the base AT state ST4 based on the value of the release game number counter 96g becoming "0."

(78) In the above 11th to 13th embodiments, external signal information may be set in all of the first to third gaming machine information notifications. As already explained, in the 11th embodiment, game start signal information and base AT signal information are set as external signal information in the first to third gaming machine information notifications; in the 12th embodiment, game start signal information, base AT signal information, and AT first win signal information are set as external signal information; and in the 13th embodiment, in-game signal information and base AT signal information are set as external signal information. Furthermore, if the transmission timings of the first to third gaming machine information notifications overlap, only the first gaming machine information notification is set in the value number side transmission buffer 149 at that timing, and if the transmission timings of the second and third gaming machine information notifications overlap, only the second gaming machine information notification is set in the value number side transmission buffer 149 at that timing. In this configuration, when a gaming machine information notification is sent from the value side MPU 142 to the card unit 130, these external signal information items are sent regardless of the type of gaming machine information notification. This allows external signal information to be sent from the value side MPU 142 to the card unit 130 at a cycle of 300 milliseconds.

(79) In the above 11th to 13th embodiments, the "owned gaming value full" error may also be cleared when the value full signal input from the value number side MPU 142 to the main side MPU 72 becomes a LOW level.

(80) In the above 11th to 13th embodiments, a value number control board 151 is provided in addition to the main control board 71, but this is not limited to this. The functions of the main control board 71 and the value number control board 141 may be integrated into the main control board 71, and the value number control board 141 may be absent. In this configuration, the main MPU 72 transmits gaming machine information notifications to the card unit 130 at intervals of 300 milliseconds.

(81) In the above 11th to 13th embodiments, a configuration may be adopted in which, based on the detection that the count button 127 has been continuously operated for a predetermined period (e.g., 1 second) or more, the value number side MPU 142 performs processing to transmit all of the owned gaming value numbers stored in the value number side RAM 144 to the card unit 130.

(82) In the above 11th to 13th embodiments, when counted game value number information is stored in the storage medium M, some or all of the stored counted game value number may be added to the owned game value number stored in the value number RAM 144 based on the operation of the game value loan button 133.

(83) In the above 11th to 13th embodiments, the owned game value number is stored in the value number RAM 144, but this is not limited to this. The slot machine 10 may be equipped with a value number display device having a game value number display unit 123, and the owned game value number may be stored in the value number display device. Specifically, the value number display device displays the owned game value number. The value number side MPU 142 controls management of the owned game value number stored in the value number display device and controls display of the owned game value number on the value number display device and the value number display 146.

(84) In the above 11th to 17th embodiments, the interval display unit 67 may not be provided. This prevents the player from determining the end timing of the second interval SC2 based on the state of the interval display unit 67. Furthermore, when the initialization process for the second interval SC2 is executed based on the value of the total winnings counter 96d being equal to or greater than "65321" at the time when the end condition for the base AT state ST4 is met, and when the initialization process for the second interval SC2 is executed based on the end condition being met, the player can expect that the second interval SC2 is continuing.

(85) In the first to seventeenth embodiments described above, when a power outage is identified, a process may be executed to clear the end flag 98c in the work area 98 for out-of-area processing to "0" during power outage processing. Furthermore, a real-time clock may be used to clear the end flag 98c to "0" on the condition that the supply of operating power to the slot machine 10 is initiated during a predetermined time period (e.g., between 8:00 AM and 10:00 AM). Alternatively, a process may be executed to clear the end flag 98c to "0" on the condition that the supply of operating power to the slot machine 10 is stopped during a predetermined time period (e.g., between 9:00 PM and 11:00 PM). Furthermore, a process may be executed to clear the end flag 98c to "0" on the condition that a predetermined operation (e.g., turning on the setting key) is performed when the supply of operating power to the slot machine 10 is initiated. Alternatively, a process may be executed to clear the end flag 98c to "0" on the condition that the supply of operating power to the slot machine 10 is stopped while a predetermined operation (e.g., turning on the setting key) is being performed. Alternatively, a configuration may be adopted in which if a predetermined operation (for example, operation of the left stop button 42) is not performed when the supply of operating power to the slot machine 10 begins, processing is executed to clear the end flag 98c to "0," and if a predetermined operation (for example, operation of the left stop button 42) is performed when the supply of operating power to the slot machine 10 begins, processing to clear the end flag 98c to "0" is not executed. Also, a real-time clock may be used, and if the supply of operating power to the slot machine 10 begins, processing to clear the end flag 98c to "0" may be executed on the condition that the period during which the supply of operating power was stopped (power interruption period) is equal to or longer than a predetermined length (for example, equal to or longer than one hour).

(86) In the first to tenth embodiments described above, the initialization process for the second section SC2 (step S1208) is executed based on the fulfillment of either the condition that the number of games continued in the second section SC2 is equal to the number of games corresponding to the fulfillment of the ending condition, or the condition that the increase in the gaming media owned by the player from the initial value when the second section SC2 starts is equal to the increase corresponding to the fulfillment of the ending condition. However, this is not limited to this, and the initialization process for the second section SC2 (step S1208) may be executed based on the fulfillment of the condition that the increase in the gaming media owned by the player from the initial value when the second section SC2 starts is equal to the increase corresponding to the fulfillment of the ending condition, but the initialization process for the second section SC2 (step S1208) is not executed based on the number of games continued in the second section SC2.

(87) In the above 11th to 17th embodiments, the initialization process for the second section SC2 (step S1208) may be executed based on the fulfillment of either the condition that the number of continued games in the second section SC2 is equal to the number of games corresponding to the fulfillment of the ending condition, or the condition that the increase in the gaming media owned by the player from the initial value when the second section SC2 starts is equal to the increase corresponding to the fulfillment of the ending condition.

(88) In the above 11th to 17th embodiments, when the game value insertion button 126 is operated in a situation where the number of owned game values stored in the value number control device 140 is "2" or "1", the number of owned game values is subtracted by "2" or "1" to become "0", and the number of game values bet becomes "2" or "1". However, this is not limited to this, and a configuration may also be adopted in which no game value bet is made when the game value insertion button 126 is operated in a situation where the number of owned game values stored in the value number control device 140 is less than "3".

(89) In the thirteenth embodiment, the process of reserving a lowering of the in-game signal may be executed when all reels 32L, 32M, and 32R are stopped, or the process of reserving a lowering of the in-game signal may be executed when the second reel 32L, 32M, and 32R is stopped.

(90) In the above thirteenth embodiment, the third reel 32L, 32M, 32R may be configured to wait for the value of the interval setting counter 96v to reach "0" before stopping, or the second reel 32L, 32M, 32R may be configured to wait for the value of the interval setting counter 96v to reach "0".

(91) In the fourteenth to seventeenth embodiments, the range switched from color to monochrome when the monochrome switching process is executed may be a partial range on the display surface of the image display device 63. Specifically, the display surface of the image display device 63 has a first display range in which a background image corresponding to the game status and in-game effects corresponding to each game are displayed, and a second display range in which various numerical data such as the remaining award number image G21, the number of wins image G22, and the number of games played image G23 are displayed. In the monochrome switching process executed based on the occurrence of a penalty event, the display mode of the first display range is switched from color to monochrome. This makes it easier for players and gaming hall managers to understand that a penalty event has occurred based on the change in the display mode of the first display range to monochrome. Meanwhile, the color display state is maintained in the second display range. This makes it possible to prevent the display mode of the various numerical data displayed in the second display range from changing even when the first display range is in monochrome.

(92) In the above fourteenth to seventeenth embodiments, when the monochrome switching process is executed, the range that is switched from color display to monochrome display may be either the background image corresponding to the game status or the in-game effect image displayed in the in-game effect corresponding to each game. Even in this configuration, it is possible for players and gaming hall managers to easily understand that a penalty event has occurred based on the display mode of the background image or in-game effect image changing to monochrome display.

(93) In the above fourteenth to seventeenth embodiments, a penalty event occurs when the stop buttons 43, 44 are operated to set the first stop on the center reel 32M or the right reel 32R in the normal gaming state ST1. However, this is not limited to this, and a penalty event may occur when the stop buttons 42 to 44 are operated in the order of left reel 32L → right reel 32R → center reel 32M in the normal gaming state ST1. Furthermore, in each gaming state, in a game other than a game in which a stop order notification is performed, a penalty event may occur when the stop buttons 42 to 44 are operated in an order other than left reel 32L → center reel 32M → right reel 32R.

(94) In the above-mentioned 14th embodiment, the display mode of the image display device 63 is switched to monochrome display when a penalty event occurs during the color navigation presentation, but this is not limited to this, and the color navigation presentation may be terminated when a penalty event occurs during the color navigation presentation.

(95) In the above fourteenth and fifteenth embodiments, the game following the game in which a penalty event occurred is configured to be the penalty target game, but this is not limited to this. The game in which a penalty event occurred may be configured to be the penalty target game, or the game in which a penalty event occurred and the game following the game in which the penalty event occurred may be configured to be the penalty target games.

(96) In the above sixteenth and seventeenth embodiments, the game in which a penalty event occurred is the penalty target game, but this is not limited to this. The penalty target game may be the game following the game in which a penalty event occurred, or the game in which a penalty event occurred and the game following the game in which the penalty event occurred may be the penalty target games.

(97) In the above fourteenth to seventeenth embodiments, two or more games (e.g., three or five games) may be set as penalty games based on the occurrence of a penalty event.

(98) In the above-mentioned 16th embodiment, the process of decrementing the value of the displayed game number counter 94p by 1 is executed when a penalty event occurs and the monochrome switching process is executed. However, this is not limited to this. After the monochrome switching process is executed, the process of decrementing the value of the displayed game number counter 94p by 1 may be executed when the presentation side MPU 92 receives the second stop start command, when the presentation side MPU 92 receives the third stop start command, when the game in which the monochrome switching process was executed ends, or when the game following the game in which the monochrome switching process was executed starts.

(99) In the above fourteenth and fifteenth embodiments, when a game in which a penalty event occurs transitions to the base AT state ST4, the first game in the base AT state ST4 becomes a penalty-subject game. However, this is not limited to this, and a game that starts in the base AT state ST4 may not become a penalty-subject game. Specifically, when a game starts in the base AT state ST4, the main MPU 72 executes processing to clear the value of the penalty-subject flag 96y to "0." This prevents a game that starts in the base AT state ST4 from becoming a penalty-subject game.

(100) In the above fourteenth and fifteenth embodiments, the penalty games may be a number of games following the game in which the penalty event occurred (for example, three games played after the end of the game in which the penalty event occurred).

(101) In the above-mentioned 14th and 15th embodiments, when a cherry win is achieved in the normal gaming state ST1, the game following the game in which the cherry win is achieved may be configured to be a game executed in the CZ state.

(102) In the above sixteenth and seventeenth embodiments, multiple games including the game in which the penalty event occurred (for example, the game in which the penalty event occurred and two games played after the end of that game) may be configured as penalty-subject games.

(103) In the above 16th and 17th embodiments, when a cherry win occurs in the normal gaming state ST1, the game in which the cherry win occurs may be configured to be the game executed in the CZ state.

(104) In the above-mentioned 16th and 17th embodiments, in addition to or instead of displaying the number of games played after the all-clear process for the area (step S106) or the initialization process for the second section SC2 is executed, the image display device 63 may be configured to display the number of remaining games (the number of games remaining until the ceiling is reached) required to trigger a transition to the base AT state ST4 based on the consumption of the ceiling number of games (specifically, 1000 games) in the normal gaming state ST1. The display of the number of games remaining until the ceiling is reached is performed on the condition that the normal gaming state ST1 is in effect. Note that the display of the number of games remaining until the ceiling is also possible on the condition that the normal gaming state ST1 is in effect and the number of games remaining until the ceiling is less than or equal to a predetermined reference number (for example, less than or equal to 300 games).

(105) In the above-described sixteenth embodiment, the number of remaining games in the CZ state may be displayed on the image display device 63. The number of remaining games in the CZ state on the image display device 63 is decremented by one upon the start of the game. Furthermore, if a penalty event occurs, the number of remaining games in the CZ state on the image display device 63 is incremented by one at the time the penalty event occurs. This makes it possible to display the number of remaining games in the CZ state on the image display device 63 so that the penalty game is not counted as one game.

(106) In the above-described sixteenth embodiment, the number of remaining games in the CZ state may be displayed on the image display device 63. The number of remaining games in the CZ state on the image display device 63 is decremented by one upon the start of the game. Furthermore, for the game following the game in which a penalty event occurred, the number of remaining games in the CZ state on the image display device 63 is not decremented by one even when that game starts. This makes it possible to display the number of remaining games in the CZ state on the image display device 63 so that the penalty game is not counted as one game.

(107) In the above fourteenth to seventeenth embodiments, instead of or in addition to the monochrome switching process, the production-side MPU 92 may be configured to execute a process to create a silent state in which no sound is output from the speaker 62 until the end of the penalty game, or a process to create a bass state in which all sounds output from the speaker 62 are one octave lower than in a state not affected by the occurrence of a penalty event until the end of the penalty game.

(108) In the above fourteenth to seventeenth embodiments, instead of or in addition to the monochrome switching process, the presentation-side MPU 92 may be configured to execute a process to cause the upper lamp 61 to flash in a penalty-related manner (for example, emitting light at a cycle of once every three seconds) until the penalty-related game ends, or the presentation-side MPU 92 may be configured to execute a process to cause the upper lamp 61 to remain lit in a penalty-related color (for example, red) until the penalty-related game ends.

(109) In the above fourteenth to seventeenth embodiments, instead of the configuration in which the display mode of the screen on the image display device 63 is switched to a black monochrome display upon the occurrence of a penalty event, the screen may be switched to a blue monochrome display, or a two-tone black and white display. Alternatively, the luminance (brightness of the screen), contrast ratio (the difference in luminance between the brightest and darkest parts of the screen), or saturation (vividness of the color) of the screen may be changed to switch to a display mode in which the content of the color navigation effect is indistinguishable or difficult to distinguish. Here, a blue monochrome display is a display mode in which shades and tones of blue are present, and no colors other than blue are present. Furthermore, a two-tone black and white display is a display mode in which only the two colors of white and black are present, and no shades or tones of black are present.

(110) In the 11th to 17th embodiments, the period from when the rotation of reels 32L, 32M, and 32R begins until the rotation of all reels 32L, 32M, and 32R is stopped may be 300 milliseconds or longer. Specifically, the acceleration period for reels 32L, 32M, and 32R is set to 300.98 milliseconds, which is 202 times the interrupt period of the timer interrupt process. Furthermore, as already explained in the 11th embodiment, in each game, the stop operation for reels 32L, 32M, and 32R becomes effective after the acceleration period for reels 32L, 32M, and 32R ends. In this way, by configuring the period from when reels 32L, 32M, and 32R start to when operation of stop buttons 42-44 becomes effective to be 300 milliseconds or more, the period from when reels 32L, 32M, and 32R start to when all reels 32L, 32M, and 32R stop spinning can be set to 300 milliseconds or more.

(111) In the above 11th to 17th embodiments, the stop control of two or more reels 32L, 32M, and 32R may not be performed in parallel. If a stop operation is performed on another reel (the center reel 32M or the right reel 32R) while stop control of one reel (for example, the left reel 32L) is being performed, stop control of the other reel will begin after stop control of the one reel has finished.

(112) In each of the above embodiments, if a transition to the second section SC2 occurs in the CB internal state, the game state may be configured to transition to the base AT state ST4. Specifically, a game in the first section SC1 is executed when the all-clear process for the area (step S106) is executed, or when the initialization process for the second section SC2 (step S1208) is executed. In a game in the first section SC1, the game section transitions to the second section SC2 based on a win with any index value IV in the role lottery process. Also, if a win with any index value IV is achieved in the role lottery process in a game started in the first section SC1 and the game transitions to the second section SC2, the game state transitions from the normal game state ST1 to the base AT state ST4 after the ending condition is met, provided that the game was started in the CB internal state.

When the ending conditions for the second section SC2 are met, the initialization process for the second section SC2 (step S1208) is executed, causing the system to return to the first section SC1 and the normal gaming state ST1. Even when the initialization process for the second section SC2 (step S1208) is executed, the CB winning data is not erased. Therefore, when the ending conditions for the second section SC2 are met and the system enters the normal gaming state ST1, the game is basically executed in the CB internal state. Then, if a winning combination is achieved with any of the index values IV in the lottery process for the game started in that CB internal state, the system will transition to the second section SC2 and the base AT state ST4 after the ending conditions are met.

When the all-clear process for within the area (step S106) is executed, the CB winning data is erased and the system enters a non-CB internal state. Therefore, when the all-clear process for within the area (step S106) is executed and the system enters the normal gaming state ST1, the game is played in a non-CB internal state. Then, if a winning combination is achieved with any index value IV in the lottery process for a role in a game started in the non-CB internal state, the system transitions to the second section SC2. In this case, the system does not transition to the base AT state ST4, and the normal gaming state ST1 is maintained. Furthermore, when the termination condition for the base AT state ST4 is met, the system enters the normal gaming state ST1 with the second section SC2 continuing.

In this way, by configuring the system so that transition to the base AT state ST4 after the ending is achieved can occur only in the normal game state ST1, which is entered based on the ending condition being met, it is possible to create a state that is advantageous for the player even after the ending condition of the second section SC2 is met, resulting in the first section SC1 and the normal game state ST1, compared to the normal game state ST1 when the ending condition is not met. This prevents the player from becoming disappointed even when the ending condition is met and the ending AT state ST5 ends, and increases the enjoyment of the game.

(113) In the configuration of (112) above, if the termination condition for the base AT state ST4 is satisfied in the base AT state ST4 after the ending condition is satisfied, the configuration may be such that the possibility of transitioning from the CZ state set at the end of the base AT state ST4 to the base AT state ST4 is higher than when the termination condition for the base AT state ST4 is satisfied in the normal base AT state ST4 (the base AT state ST4 to which transition is made based on the occurrence of a win for transition to the base AT state ST4 in the AT lottery process, without the condition that the ending condition is satisfied). Specifically, if the termination condition for the base AT state ST4 is satisfied and the base AT state ST4 after the ending condition is satisfied ends, a high-probability CZ state is set, and if the termination condition for the base AT state ST4 is satisfied and the normal base AT state ST4 ends, a normal CZ state is set. The number of continuing games in the high-probability CZ state and the normal CZ state is "3". The probability of winning a transition to the base AT state ST4 in the AT lottery process executed in the normal CZ state (e.g., 15%) is higher than the probability of winning a transition to the base AT state ST4 in the AT lottery process executed in a game state other than the CZ state (e.g., 5%). Furthermore, the probability of winning a transition to the base AT state ST4 in the AT lottery process executed in the high-probability CZ state (e.g., 25%) is higher than the probability of winning a transition to the base AT state ST4 in the AT lottery process executed in the normal CZ state. This allows the player to be in a more advantageous state after the base AT state ST4 ends after the ending condition is met, compared to the state before the ending condition was met. This increases the player's interest in meeting the ending condition of the second section SC2 and enhances the enjoyment of the game. Note that a configuration may be adopted in which a transition from the high-probability CZ state to the base AT state ST4 is more likely to occur by allocating a number of games greater than the number of games ("3") in the normal CZ state as the number of continued games in the high-probability CZ state.

(114) In the configuration of (112) above, the CZ states that are set based on the completion of the termination conditions of the base AT state ST4 may include a normal CZ state, a first high-probability CZ state, and a second high-probability CZ state, and when the termination conditions of the base AT state ST4 are met in the base AT state ST4 after the ending conditions are met, the first high-probability CZ state or the second high-probability CZ state may be set. When the termination conditions of the base AT state ST4 are met in the normal base AT state ST4 (the base AT state ST4 to which transition is made based on the occurrence of a winning transition to the base AT state ST4 in the AT lottery process without the condition of the ending conditions being met), the normal CZ state is set with a 1/2% probability, the first high-probability CZ state is set with a 1/4 probability, and the second high-probability CZ state is set with a 1/4 probability. The number of continuing games for each CZ state is "3." The probability of winning a transition to the base AT state ST4 in the AT lottery process executed in the normal CZ state (e.g., 15%) is higher than the probability of winning a transition to the base AT state ST4 in the AT lottery process executed in a game state other than the CZ state (e.g., 5%). Furthermore, the probability of winning a transition to the base AT state ST4 in the AT lottery process is higher in the first high-probability CZ state than in the normal CZ state, and higher in the second high-probability CZ state than in the first high-probability CZ state. In this way, when the ending condition is met, the player can be placed in a more advantageous state after the base AT state ST4 ends after the ending condition is met, compared to the state before the ending condition was met. This increases the player's interest in meeting the ending condition of the second section SC2, thereby enhancing the enjoyment of the game.

(115) In the configuration of (114) above, when the termination condition of the base AT state ST4 is satisfied in the base AT state ST4 after the ending condition is satisfied, the first high-probability CZ state or the second high-probability CZ state may be more likely to be set compared to when the termination condition of the base AT state ST4 is satisfied in the normal base AT state ST4. Specifically, when the termination condition of the base AT state ST4 is satisfied in the normal base AT state ST4, the normal CZ state is set with a probability of 3/4, the first high-probability CZ state is set with a probability of 1/8, and the second high-probability CZ state is set with a probability of 1/8. Furthermore, when the termination condition of the base AT state ST4 is satisfied in the base AT state ST4 after the ending condition is satisfied, the normal CZ state is set with a probability of 1/4, the first high-probability CZ state is set with a probability of 1/2, and the second high-probability CZ state is set with a probability of 1/4. As a result, when the ending condition is met, the player can be placed in a more advantageous state after the base AT state ST4 ends, compared to the state before the ending condition was met. This increases the player's interest in meeting the ending condition of the second section SC2, and increases the player's enjoyment of the game.

(116) In each of the above embodiments, a waiting time of 4.1 seconds may be set when the start lever 41 is operated to start a game, and the start of the next game may be delayed until the waiting time of 4.1 seconds has elapsed.

(117) In each of the above embodiments, a waiting time of 4.1 seconds may be set based on the start of the lottery process for a winning combination, and the lottery process for a winning combination in the game following the current game may be suspended until the waiting time of 4.1 seconds has elapsed.

(118) In the above 18th to 23rd embodiments, the main MPU 222 may be configured to execute a process (main reset process) to reset the main MPU 222. Specifically, the main reset process first switches the power supplied to the main RAM 224 from the second normal operating power to the backup power. Then, it executes a process to initialize the main MPU 222. Then, it stops the operation of the main MPU 222, putting it into a state where no processing is being executed in the main MPU 222.

(119) In the above-described 18th to 23rd embodiments, the main MPU 222 may be configured to perform the operations for switching the power supplied to the main RAM 224 from the normal second operating power to the backup power, the initialization of the main MPU 222, and part of the operation for putting the main MPU 222 into a stopped state.

(120) In the above-described 18th to 23rd embodiments, the numerical information obtained from the R register 268 is used as a random number to execute the normal pass/fail determination process. However, this is not limited to this configuration, and the R register 268 may be used to determine the timing of DRAM refresh. Specifically, a DRAM that requires periodic refresh is used as a register for the main RAM 224 or the main MPU 222. The value of the R register 268 is updated by adding 1 each time the main CPU 251 reads an instruction stored in the main ROM 223 to execute it. The maximum value of the R register 268 is "255." If the R register 268 is updated while the maximum value is stored in the R register 268, the value of the R register 268 becomes "0." In this configuration, the DRAM is refreshed when the value of the R register 268 becomes "0." This allows the information written to the DRAM to be properly stored and maintained.

(121) In the above-described 18th to 23rd embodiments, a lottery may be performed to determine which of multiple effect contents will be executed using the numerical information updated in the R register 268. Specifically, a winning expectation effect is executed when pending information is acquired based on the occurrence of a winning entry into the first actuation port 193 or the second actuation port 194. The winning expectation effects include a first winning expectation effect that notifies the player that a jackpot result is highly likely, and a second winning expectation effect that notifies the player that a jackpot result is low. The main MPU 222 executes a winning expectation effect lottery process to identify which of these two winning expectation effects will be executed. In the winning expectation effect lottery process, numerical information is acquired from the R register 268 based on the occurrence of a winning entry into the actuation port 193, 194. Furthermore, if the reserved information acquired based on the occurrence of the winning event corresponds to a jackpot result, a first effect lottery table is read out, in which the probability of winning the first winning expectation effect is set relatively high. If the reserved information acquired based on the occurrence of the winning event does not correspond to a jackpot result, a second effect lottery table is read out, in which the probability of winning the first winning expectation effect is set relatively low. The numerical information acquired from the R register 268 is then compared with the information set in the read effect lottery table, thereby identifying the winning expectation effect to be executed. This simplifies the configuration for executing the winning expectation effect lottery process compared to a configuration in which an area for updating the random numbers used in the winning expectation effect lottery process is provided in the main RAM 224. The winning expectation effect lottery process may be executed during specific control processing or non-specific control processing.

(122) In the above-mentioned 19th embodiment, the win/loss determination process executed in the pachinko machine 160 is configured to execute an exchange command (specifically, the command "EXX" or the command "EX AF, AF'") to exchange data in a general-purpose register with data in an auxiliary register corresponding to that general-purpose register. However, this is not limited to this, and for example, the exchange command may be executed in a role selection process for selecting winning roles in a slot machine. This makes it possible to reduce the data capacity of the memory area required to execute the role selection process in RAM.

(123) In the above eighteenth to twenty-third embodiments, the execution of the instruction "EX AF, AF'" is configured to exchange data in a pair register called the AF register 271 with data in the auxiliary register corresponding to that pair register, but this is not limited to this, and data exchange may be possible on a register-by-register basis. Specifically, the execution of the instruction "EX A, A'" may exchange data between the A register 271a and the A' register 291a, and the execution of the instruction "EX F, F'" may exchange data between the F register 271b and the F' register 291b.

(124) In the above eighteenth to twenty-third embodiments, the execution of the "EXX" instruction exchanges data in multiple general-purpose registers with data in the auxiliary registers corresponding to those general-purpose registers. However, this is not limited to this. Data may be exchanged in pairs of registers, or in registers. Specifically, the execution of the "EX BC, BC'" instruction may exchange data between the BC register 272 and the BC' register 292. The same applies to the DE register 273 and the HL register 274. The execution of the "EX B, B'" instruction may exchange data between the B register 272a and the B' register 292a. The same applies to the C register 272b, D register 273a, E register 273b, H register 274a, and L register 274b.

(125) In the above-described 18th to 23rd embodiments, the instructions targeting the registers included in the first register group 265 may be different from the instructions targeting the registers included in the second register group 266.

(126) In the above 18th to 23rd embodiments, instead of the V register 278 being configured to set the most significant byte ("AAH" or "ABH") of the address corresponding to the register included in the setting register group 256 or the monitoring and control register group 257, the most significant 4 bits (e.g., "AH") or the most significant 12 bits (e.g., "AA0H") may be set.

(127) In the above-mentioned 18th to 23rd embodiments, a configuration is possible in which timer interrupt processing can be initiated even in a situation where non-specific control processing is being executed, and a configuration may be possible in which a start address pointer (2 bytes) is output using the upper 1 byte of data stored in the I register 267 even when timer interrupt processing is initiated in a situation in which non-specific control processing is being executed.

(128) In the above 18th to 23rd embodiments, an interrupt factor other than the occurrence of a timeout in the interrupt period measurement register may be provided, such as an interrupt factor that occurs when a rising or falling edge of an interrupt signal input to the input terminal of the main CPU 251 is detected.

(129) In the above-described 18th to 23rd embodiments, the main MPU 222 may be configured to execute a process for identifying the start address of the interrupt processing program corresponding to the interrupt cause that has occurred, and the main MPU 222 may be configured to identify the start address of the interrupt processing program corresponding to the interrupt cause using data stored in the I register 267.

(130) In the above eighteenth to twenty-third embodiments, the interrupt vector circuit 258c may be configured as a volatile storage circuit. Specifically, the interrupt vector circuit 258c has eight flip-flops that store one bit of information. The main ROM 223 stores the lowest eight bits of data in the start address pointer of the timer interrupt processing (FIG. 167). The lowest eight bits of data are set in the interrupt vector circuit 258c at a timing before the timing at which execution of the timer interrupt processing is permitted in the main processing (FIG. 161). As a result, when the timer interrupt processing (FIG. 167) is started, the main MPU 222 can obtain the lowest eight bits of data in the start address pointer of the timer interrupt processing (FIG. 167) from the interrupt vector circuit 258c.

(131) In the above 18th to 23rd embodiments, the timer interrupt request circuit 318 is configured as an AND circuit, but this is not limited thereto. The timer interrupt request circuit 318 may be configured as another logic circuit (for example, an equivalent circuit of an AND circuit). Furthermore, a control device having a CPU may be provided in place of the timer interrupt request circuit 318. The control device sets the interrupt request signal output to the interrupt input terminal 319 to a LOW level when at least one of the 0th bit of the interrupt request register 258a and the 0th bit of the interrupt control register 258b is "0," and sets the interrupt request signal output to the interrupt input terminal 319 to a HIGH level when both the 0th bit of the interrupt request register 258a and the 0th bit of the interrupt control register 258b are "1." Even in this configuration, the interrupt request signal can be controlled based on the values of the 0th bit of the interrupt request register 258a and the 0th bit of the interrupt control register 258b.

(132) In the above eighteenth to twenty-third embodiments, after the interrupt acceptance signal is raised (step S9101) in the interrupt start process (FIG. 166 (d)), the main MPU 222 may acquire the 8-bit data output to the internal bus NB after a predetermined time (e.g., 50 microseconds) has elapsed. When the interrupt acceptance signal is raised, the interrupt vector circuit 258c outputs the lower 8 bits of data in the start address pointer of the timer interrupt process (FIG. 167) to the internal bus NB within the predetermined time. This allows the data acquired by the main MPU 222 from the internal bus NB after a predetermined time has elapsed since the interrupt acceptance signal was raised (step S9101) to be the lower 8 bits of data in the start address pointer of the timer interrupt process (FIG. 167).

(133) In the above-described 18th to 23rd embodiments, instead of updating the numerical information stored in the R register 268 each time an instruction is read, the numerical information stored in the R register 268 may be updated each time an instruction is executed, or the numerical information stored in the R register 268 may be updated each time a predetermined instruction (e.g., an arithmetic instruction or a transfer instruction) is read, or the numerical information stored in the R register 268 may be updated each time a predetermined instruction (e.g., an arithmetic instruction or a transfer instruction) is executed.

(134) In the above-described 18th to 23rd embodiments, the non-specific control processing may be configured to perform lottery processing using the numerical information obtained from the R register 268 as a random number for lottery selection.

(135) In the above-mentioned 18th to 23rd embodiments, the numerical information obtained from the R register 268 may be used as a random number for lottery selection to perform the process of determining whether the jackpot result is correct or incorrect and the process of determining whether the time-saving result is correct or incorrect, or the process of determining whether the jackpot result is distributed or incorrect and the process of determining whether the time-saving result is distributed or incorrect may be performed.

(136) In the above-described 18th to 23rd embodiments, the first register group 265 may be configured to execute an instruction (e.g., a transfer instruction) to save data from a main register (e.g., the AF register 271) in which an auxiliary register (e.g., the AF' register 291) is provided to the stack area 282 for specific control, or the second register group 266 may be configured to execute an instruction (e.g., a transfer instruction) to save data from a main register (e.g., the AF register 301) in which an auxiliary register (e.g., the AF' register 311) is provided to the stack area 284 for non-specific control.

(137) In the above 18th to 23rd embodiments, a call instruction that does not switch the register groups 265 and 266 to be used may be configured as an instruction for calling a subroutine program corresponding to non-specific control processing.

(138) In the above-described 18th to 23rd embodiments, a call instruction that does not prohibit the execution of timer interrupt processing may be present as an instruction for calling a subroutine program corresponding to non-specific control processing.

(139) In the above-described 18th to 23rd embodiments, any one of the data in the BC register 272, the data in the DE register 273, and the data in the HL register 274 may be configured to be saved to the BC' register 292, any one of the data in the BC register 272, the data in the DE register 273, and the data in the HL register 274 may be configured to be saved to the DE' register 293, and any one of the data in the BC register 272, the data in the DE register 273, and the data in the HL register 274 may be configured to be saved to the HL' register 294.

(140) In the above 18th to 23rd embodiments, the data in the BC' register 292 may be readable to any of the BC register 272, DE register 273, and HL register 274; the data in the DE' register 293 may be readable to any of the BC register 272, DE register 273, and HL register 274; and the data in the HL' register 294 may be readable to any of the BC register 272, DE register 273, and HL register 274.

(141) In the above-described 18th to 23rd embodiments, a configuration may be adopted in which a save instruction exists to save data from a main register (A register 271a, F register 271b, B register 272a, C register 272b, D register 273a, E register 273b, H register 274a, L register 274b, IX register 275, IY register 276, or K register 277 in the first register group 265; A register 301a, F register 301b, B register 302a, C register 302b, D register 303a, E register 303b, H register 304a, L register 304b, IX register 305, IY register 306, or K register 307 in the second register group 266) to the auxiliary register corresponding to that main register, and a restore instruction exists to restore data from the auxiliary register to the main register corresponding to that auxiliary register.

(142) In the above-described 18th to 23rd embodiments, a configuration may be adopted in which an exchange instruction is present that, when specific control processing is being executed, exchanges the data in the IX register 275 and the data in the IY register 276 with the data in the auxiliary register in a single instruction, and, when non-specific control processing is being executed, exchanges the data in the IX register 305 and the data in the IY register 306 with the data in the auxiliary register in a single instruction.

(143) In the above 18th to 23rd embodiments, the address of an area in the main ROM 223 or main RAM 224 may be specified using the upper 1 byte of data stored in the V register 278.

(144) In the above 18th to 23rd embodiments, one flag register may be provided for the first register group 265 and one flag register may be provided for the second register group 266, or one flag register may be provided for the main CPU 251.

(145) In the above-mentioned 18th to 23rd embodiments, the data in the flag register may be changed by executing an exchange instruction (specifically, "EX AF,AF'," "EXX," "EX IX,IX'," "EX IY,IY'," or "EX K,K'"). Specifically, when the value of data read from the auxiliary register to the main register by the exchange instruction "EX AF,AF'," "EX IX,IX'," "EX IY,IY'," or "EX K,K'" is "0," the zero flag of F register 271b, 301b is set to "1." Furthermore, when the value of all data read from the auxiliary register to the main register by the exchange instruction "EXX" is "0," the zero flag of F register 271b, 301b is set to "1." Alternatively, the zero flags of F registers 271b and 301b may be set to "1" when at least part of the data read from the auxiliary register to the main register by the exchange command "EXX" is "0".

(146) In the above-described eighteenth to twenty-third embodiments, a configuration may be adopted in which a use register group flag is provided in the main CPU 251 instead of the use register group switching circuit 252. The use register group flag is a one-bit memory area in which information is set for identifying which of the first register group 265 and the second register group 266 is to be used. A state in which the value of the use register group flag is "0" corresponds to a state in which the first register group 265 is to be used and the second register group 266 is not to be used, and a state in which the value of the use register group flag is "1" corresponds to a state in which the second register group 266 is to be used and the first register group 265 is not to be used. When the supply of operating power to the main CPU 251 is started, the value of the use register group flag becomes "0", i.e., the first register group 265 is to be used. Execution of the CALLA instruction sets the use register group flag to "1", switching the register group to be used from the first register group 265 to the second register group 266. Execution of the RETA instruction clears the use register group flag to "0", switching the register group to be used from the second register group 266 to the first register group 265. In this way, by configuring the register group to be used, either the first register group 265 or the second register group 266, to be identified based on the state of the use register group flag, it is possible to ensure that only one of the first register group 265 and the second register group 266 is selected for use, and to prevent a situation in which both the first register group 265 and the second register group 266 are selected for use.

(147) In the above-mentioned 18th to 23rd embodiments, the main CPU 251 is configured to have two register groups, the first register group 265 and the second register group 266. However, this is not limited to this. The main CPU 251 may be configured to have three or more register groups, or may be configured to have one register group.

(148) In the above-mentioned 18th to 23rd embodiments, the AF registers 271, 301, the BC registers 272, 302, the DE registers 273, 303, the HL registers 274, 304, the IX registers 275, 305, the IY registers 276, 306, and the K registers 277, 307 are each provided with a corresponding auxiliary register, and the V registers 278, 308, the stack pointers 279, 309, the I register 267, and the R register 268 are each provided with a corresponding auxiliary register. However, the present invention is not limited to this configuration, and a corresponding auxiliary register may be provided for each of these registers (AF registers 271, 301, BC registers 272, 302, DE registers 273, 303, HL registers 274, 304, IX registers 275, 305, IY registers 276, 306, K registers 277, 307, V registers 278, 308, stack pointers 279, 309, I register 267, and R register 268). This allows for greater flexibility in program design.

(149) In the above-described 18th to 23rd embodiments, the AF registers 271, 301, BC registers 272, 302, DE registers 273, 303, HL registers 274, 304, IX registers 275, 305, IY registers 276, 306, and K registers 277, 307 were configured to have corresponding auxiliary registers, respectively. However, this is not limited to this, and the first register group 265 and the second register group 266 may not be configured to have auxiliary registers (AF' registers 291, 311, BC' registers 292, 312, DE' registers 293, 313, HL' registers 294, 314, IX' registers 295, 315, IY' registers 296, 316, and K' registers 297, 317). This makes it possible to simplify the configuration of the first register group 265 and the second register group 266.

(150) In the above-mentioned 18th to 23rd embodiments, the first register group 265 is provided with auxiliary registers (AF' register 291, BC' register 292, DE' register 293, HL' register 294, IX' register 295, IY' register 296, and K' register 297), while the second register group 266 is provided with auxiliary registers (AF' register 311, BC' register 312, DE' register 313, HL' register 314, IX' register 315, IY' register 316, and K' register 317). Alternatively, the first register group 265 may not have auxiliary registers (AF' register 291, BC' register 292, DE' register 293, HL' register 294, IX' register 295, IY' register 296, and K' register 297), while the second register group 266 may have auxiliary registers (AF' register 311, BC' register 312, DE' register 313, HL' register 314, IX' register 315, IY' register 316, and K' register 317).

(151) In the above 18th to 23rd embodiments, the AF registers 271, 301, BC registers 272, 302, DE registers 273, 303, and HL registers 274, 304 may each have a corresponding auxiliary register, while the IX registers 275, 305, IY registers 276, 306, and K registers 277, 307 may not have a corresponding auxiliary register. Alternatively, the AF registers 271, 301, BC registers 272, 302, DE registers 273, 303, and HL registers 274, 304 may each not have a corresponding auxiliary register, while the IX registers 275, 305, IY registers 276, 306, and K registers 277, 307 may have a corresponding auxiliary register.

(152) In the above 18th to 23rd embodiments, a combination of edges is set as the detection target in the 0th to 7th edge measurement registers, but this is not limited to this, and a type of edge may be set as the detection target. Specifically, edges that can be set as the detection target include the falling edge of the input signal and the rising edge of the input signal. In the initial setting, information corresponding to the rising edge of the input signal is set. This allows the value of the edge measurement counter to be incremented by 1 when the input signal rises. Therefore, in the 0th to 7th input ports, the value of the edge measurement counter can be incremented by 1 when a gaming ball enters the corresponding entry point.

(153) In the above-mentioned 18th to 23rd embodiments, values of 2 or more may be set in the 0th to 7th edge measurement maximum value registers, and the main MPU 222 may determine the number of gaming balls that have passed through the corresponding ball entry section based on the values of the 0th to 7th edge measurement registers. Specifically, in the initial setting, the 0th to 7th edge measurement maximum value registers are set to "3" as the maximum value of the corresponding edge measurement register. In one processing round (first processing round) of the timer interrupt processing, data is read from the 0th to 2nd edge measurement registers corresponding to the 0th to 2nd input ports, in the processing round (second processing round) following the first processing round, data is read from the 3rd to 5th edge measurement registers corresponding to the 3rd to 5th input ports, and in the processing round (third processing round) following the second processing round, data is read from the 6th to 8th edge measurement registers corresponding to the 6th to 8th input ports. In this way, by configuring each edge measurement register to be the target for data read once every three processing times during timer interrupt processing, the number of edge measurement registers from which data is read during one processing time during timer interrupt processing can be reduced, thereby reducing the processing load on the main MPU 222.

(154) In the above-described 18th to 23rd embodiments, each of the 0th to 8th input terminals may be configured with a noise filter function for removing noise from the input signal input to that input terminal. The setting register group 256 is provided with a total of nine input terminal control registers, numbered 0th to 8th input terminal control registers. The mth input terminal control register (m is any value from 0 to 8) has a one-to-one correspondence with the mth input terminal. The 0th to 7th input terminal control registers are registers in which information is set specifying the sampling interval of the noise filter at the 0th to 7th input terminals corresponding to the 0th to 7th input terminal control registers and the type of edge combination to be detected at the 0th to 7th input terminals. Furthermore, the 8th input terminal control register is a register in which information is set specifying the sampling interval of the noise filter at the 8th input terminal corresponding to the 8th input terminal control register. The 0th to 3rd bits of the mth input terminal control register (m is any of "0" to "8") are set to one of the following: information for setting the sampling interval of the noise filter at the mth input terminal to approximately 0.25 milliseconds ("1"), information for setting the sampling interval to approximately 0.5 milliseconds ("2"), information for setting the sampling interval to approximately 1 millisecond ("3"), and information for setting the sampling interval to approximately 2 milliseconds ("4"). In the register setting process (FIG. 163(b)), information "2" is set to the 0th to 3rd bits of the 0th to 8th input terminal control registers. As a result, input signals are sampled at approximately 0.5 millisecond intervals at each of the 0th to 8th input terminals. The operation of sampling the input signals is an operation performed by an internal circuit provided outside the primary CPU 251 in the primary MPU 222, and is different from the operation of the primary CPU 251 executing instructions set in a program stored in the primary ROM 223. When the input signal after passing through the noise filter is at a low level, if two consecutive high levels are detected during sampling performed at approximately 0.5 millisecond intervals, the input signal after passing through the noise filter will rise to a high level. Furthermore, when the input signal after passing through the noise filter is at a high level, if two consecutive low levels are detected during sampling performed at approximately 0.5 millisecond intervals, the input signal after passing through the noise filter will fall to a low level. This reduces the possibility of noise causing false detection of rising or falling edges of the input signals input to input terminals 0 to 8.

(155) In the above-described eighteenth to twenty-third embodiments, the group of setting registers 256 and the group of monitoring and control registers 257 may be configured to include registers for using lottery random numbers. Specifically, the group of monitoring and control registers 257 is provided with a random value update register that updates the lottery random numbers. The group of setting registers 256 is also provided with a random value maximum setting register that sets the maximum value of the lottery random numbers updated in the random value update register, and a random number cycle setting register that sets the update cycle for the lottery random numbers in the random value update register. In the initial setting, the maximum value of "238" is set in the random value maximum setting register, and an update cycle of approximately 1 millisecond is set in the random value update register. This allows the random value update register to update lottery random numbers in the numerical range of "0" to "238" at a cycle of approximately 1 millisecond.

(156) In the above-mentioned 18th to 23rd embodiments, after the processing at the start of the supply of operating power in steps S8701 to S8713 of the main processing (Fig. 161) is completed, processing to change the data set in the registers included in the setting register group 256 in the main processing (Fig. 161) may be configured. Specifically, in the main MPU 222, a random number circuit is provided outside the main CPU 251. In addition, the setting register group 256 includes a random number maximum value setting register, a random number update period setting register, and a random number update mode setting register. The random number maximum value setting register is a register for setting the maximum value of the random number value updated by the random number circuit, the random number update period setting register is a register for setting the update period of the random number value in the random number circuit, and the random number update mode setting register is a register for setting the update mode of the random number value in the random number circuit (specifically, an update mode in which the random number value in the random number circuit starts a new cycle without waiting for a predetermined period to elapse after updating the random number value once, or an update mode in which the random number value in the random number circuit starts a new cycle after updating the random number value once before waiting for a predetermined period to elapse). By configuring the process to update the data set in the random number maximum value setting register, random number update period setting register, or random number update mode setting register in the setting register group 256 after the process at the start of supply of operating power (steps S8701 to S8713) is performed, the possibility of bias occurring in the lottery results in the lottery process performed using the random number value updated in the random number circuit can be reduced.

(157) In the above-mentioned 18th to 23rd embodiments, the higher voltage of the second normal operating power or the backup power may be supplied to the main RAM 224. Specifically, the second normal operating power and the backup power are supplied to the main power supply control unit 253. The maximum voltage of the second normal operating power is set to +5.0 V, and the maximum voltage of the backup power is set to +4.4 V. When the voltage of the second normal operating power is higher than the voltage of the backup power, of the second normal operating power and the backup power supplied to the main power supply control unit 253, the main RAM 224 is supplied with the second normal operating power. Furthermore, when the voltage of the backup power is higher than the voltage of the second normal operating power, of the second normal operating power and the backup power supplied to the main power supply control unit 253, the main RAM 224 is supplied with the backup power. This allows the configuration to be such that, in a situation where the supply of operating power to the pachinko machine 160 is stopped, if the voltage of the second normal operating power drops and becomes less than the voltage of the backup power, the power supplied to the main RAM 224 will switch to the backup power even without resetting the main MPU 222.

(158) In the above 18th to 23rd embodiments, the main MPU 222 may be reset based on at least one of the first reset signal and the second reset signal input to the reset circuit 254 being at a LOW level.

(159) In the above 18th to 23rd embodiments, the main MPU 222 may be reset based on the detection of both a fall from HIGH to LOW of the first reset signal input to the reset circuit 254 and a fall from HIGH to LOW of the second reset signal input to the reset circuit 254.

(160) In the above-mentioned 18th to 23rd embodiments, the power outage monitoring board 225 is configured to lower the first reset signal when a reset delay period occurs after the power outage signal is lowered on the power outage monitoring board 225, or when the voltage of the second normal operating power monitored by the power outage monitoring board 225 becomes equal to or lower than the first reset reference voltage (specifically, 4.0 V). However, this is not limited to this, and the power outage monitoring board 225 may be configured to lower the power outage signal based on the period during which the maximum voltage of the first normal operating power monitored by the power outage monitoring board 225 is undetected being equal to or longer than the first reference period (e.g., 6 milliseconds), and to lower the first reset signal based on the period during which the maximum voltage of the first normal operating power monitored by the power outage monitoring board 225 is undetected being equal to or longer than the second reference period (e.g., 12 milliseconds), or the voltage of the second normal operating power monitored by the power outage monitoring board 225 becoming equal to or lower than the first reset reference voltage (specifically, 4.0 V). In this configuration, the main MPU 222 can also execute power outage processing from the time the power outage signal is turned off based on the fact that the period during which the maximum voltage of the first normal operating power monitored by the power outage monitoring board 225 is undetected becomes equal to or longer than the first reference period, until the time the first reset signal is turned off based on the fact that the period during which the maximum voltage of the first normal operating power monitored by the power outage monitoring board 225 is undetected becomes equal to or longer than the second reference period.

(161) In the above-mentioned 18th to 23rd embodiments, the power outage monitoring board 225 is configured to lower the first reset signal when the voltage of the second normal operating power monitored by the power outage monitoring board 225 drops below 4.0 V (the guaranteed operating voltage of the main MPU 222). However, this is not limited to this, and the power outage monitoring board 225 may be configured to lower the first reset signal when the voltage of the second normal operating power monitored by the power outage monitoring board 225 drops below 3.6 V (a voltage lower than the guaranteed operating voltage of the main MPU 222). Specifically, if the voltage of the second normal operating power drops when the supply of operating power to the pachinko machine 160 is stopped, the power outage monitoring board 225 lowers the first reset signal when the voltage of the second normal operating power it monitors drops below 3.6 V, and the voltage monitoring circuit 354 lowers the second reset signal when the voltage drops below 2.7 V. Therefore, the reset circuit 254 generally detects the falling edge of the first reset signal earlier than the falling edge of the second reset signal. If a circuit abnormality occurs that delays the falling edge of the first reset signal input to the reset circuit 254, the voltage monitoring circuit 354 will cause the second reset signal to fall before the voltage of the second normal operating power supplied to the main power supply control unit 253 falls below the operating voltage (+2.1 V) of the main CPU 251. As a result, even if the circuit abnormality occurs, the main MPU 222 can be reset before the voltage of the second normal operating power supplied to the main power supply control unit 253 falls below the operating voltage (+2.1 V) of the main CPU 251.

(162) In the above-described 18th to 23rd embodiments, the receiving terminals 361 and 362 may be configured as general-purpose terminals. Specifically, the receiving terminals 361 and 362 can be used as receiving terminals for asynchronous serial communication, and can also be used as terminals for input ports, and are configured to be used as receiving terminals for asynchronous serial communication.

(163) In the above-described 18th to 23rd embodiments, instead of the configuration in which a reset circuit 254 to which the first reset signal and the second reset signal are input is provided, a configuration in which a reset circuit (second reset circuit) to which the second reset signal is input is provided as a circuit separate from the reset circuit (first reset circuit) to which the first reset signal is input may be used.

(164) In the above 18th to 23rd embodiments, the voltage monitoring circuit 354 may be configured to be provided on a board different from the main control board 221 and the power outage monitoring board 225.

(165) In the above-described 18th to 23rd embodiments, the second normal operating power may be supplied from the power supply and launch control device 218 to the main power supply control unit 253 without passing through the power outage monitoring board 225.

(166) In the above 18th to 23rd embodiments, instead of the configuration in which the power outage monitoring board 225 monitors the voltages of the first normal operating power and the second normal operating power and controls the power outage signal and the first reset signal based on the voltages, the power outage monitoring board 225 may monitor the amount of power of the first normal operating power and the second normal operating power and control the power outage signal and the first reset signal based on the amount of power, or the power outage monitoring board 225 may monitor the current of the first normal operating power and the second normal operating power and control the power outage signal and the first reset signal based on the current.

(167) In the above-described 18th to 23rd embodiments, instead of the configuration in which the voltage monitoring circuit 354 monitors the voltage of the second normal operating power and controls the second reset signal based on that voltage, the voltage monitoring circuit 354 may monitor the amount of power of the second normal operating power and control the second reset signal based on that amount of power, or the voltage monitoring circuit 354 may monitor the current of the second normal operating power and control the second reset signal based on that current.

(168) In the above-mentioned 18th to 23rd embodiments, instead of the logic IC 372 having logic circuits 373, 374 that output a signal in a state corresponding to the combination of the states of the signals input to the two input terminals 373a, 373b, 374a, 374b, a signal adjustment device having a CPU that outputs a signal in a state corresponding to the combination of the states of the signals input to the two input terminals may be provided. Specifically, data output from the main MPU 222 (e.g., gaming machine information data) is input to the first receiving terminal 361 via the signal adjustment device. In addition, a reset-compatible signal output from the reset-compatible output terminal 368 of the payout MPU 261 is input to the signal adjustment device. The CPU of the signal adjustment device enters a reception restriction-compatible state in which the state of the data signal output to the first receiving terminal 361 is not changed until the signal output from the reset-compatible output terminal 368 is raised to a HIGH level. This ensures that after the dispensing side MPU 261 is reset, even if data is output from the main side MPU 222, data corresponding to that data will not be stored in the dispensing side receiving buffer 363 for the period until the reset response signal startup process is executed.

Data output from the management unit 170 (e.g., ball loan information) is input to the second receiving terminal 362 via the signal adjustment device. As described above, the reset-compatible signal output from the reset-compatible output terminal 368 of the payout side MPU 261 is also input to the signal adjustment device. The CPU of the signal adjustment device enters a reception restriction compatible state in which the state of the data signal output to the second receiving terminal 362 is not changed until the signal output from the reset-compatible output terminal 368 is set to a HI level. This ensures that even if data is output from the management unit 170, the data corresponding to that data will not be stored in the payout side receiving buffer 363 for the period until the reset-compatible signal setting process is executed after the payout side MPU 261 is reset.

(169) In the above 18th to 23rd embodiments, a receive buffer for storing data received at the second receive terminal 362 may be provided as a receive buffer different from the receive buffer for storing data received at the first receive terminal 361.

(170) In the 18th to 23rd embodiments, similar to the first embodiment, setting values ("Setting 1" to "Setting 6") that determine the degree of advantage per unit time are provided, and the processing at the start of the supply of operating power in the main processing (FIG. 161) (steps S8701 to S8713) may include processing for updating the setting values.

(171) In the 20th to 22nd embodiments described above, the main side reset release process (FIG. 196) is configured to execute steps SB302 to SB307 and step SB309 on the condition that the value of the reset cause register is "0" (step SB301: NO). However, this is not limited to this, and the process from step SB302 onwards may be executed regardless of the value of the reset cause register. This allows the process to proceed to step SB302 and execute steps SB302 and onwards (steps SB302 to SB309) in both cases where the main side reset release process (FIG. 196) is executed after a full reset of the main side MPU 222, and where the main side reset release process (FIG. 196) is executed after a partial reset of the main side MPU 222. Therefore, in both cases where a full reset of the main MPU 222 is performed, and where a partial reset of the main MPU 222 is performed and then the main reset release process (FIG. 196) is executed, it is possible to prevent the main process (FIG. 161) from being started while an abnormality is occurring.

(172) In the twentieth to twenty-second embodiments, the main reset release process (FIG. 196) may proceed to step SB302 and execute the processes from step SB302 onward (steps SB302 to SB309) on the condition that the power to the pachinko machine 160 is turned on while the reset button 326 is pressed, starting the supply of operating power to the main MPU 222. Specifically, the main reset release process (FIG. 196) first determines whether the reset button 326 is pressed. If the reset button 326 is pressed, the process proceeds to step SB302 and executes the processes from step SB302 onward. As a result, when the RAM clear process (steps S8709 to S8710) is performed, the processes from step SB302 onward may be executed regardless of the type of reset of the main MPU 222. On the other hand, if the reset button 326 is not pressed, the process jumps to the start address of the main process without executing steps SB302 to SB307 and step SB309. This allows the main process to start quickly if the gaming hall manager does not perform any operations to execute the RAM clear process (steps S8709 to S8710).

(173) In the above 21st and 22nd embodiments, if a positive determination is made in step SB303 or step SB307 of the main side reset release processing (FIG. 196), in addition to the execution stop processing (step SB309), a lamp control for anomaly notification may be performed. In the lamp control for anomaly notification, processing is executed to turn on an anomaly notification lamp provided on the front of the pachinko machine 160.

(174) In the above 21st and 22nd embodiments, if a positive judgment is made in step SB303 or step SB307 of the main side reset release processing (FIG. 196), the main processing (FIG. 161) is executed, but the game is not played (the game stop flag is set to "1"), and processing to send an abnormality notification command to the sound/light side MPU 233 may be executed. When the sound/light side MPU 233 receives the abnormality notification command, it controls the symbol display device 199, the display light-emitting unit 204, and the speaker unit 205 so that an abnormality notification is issued to notify the main side MPU 222 that an abnormality has occurred.

(175) In the above 21st and 22nd embodiments, instead of the configuration in which the occurrence of an abnormality is identified based on whether data equal to or greater than the abnormality reference amount is stored in the main side receive buffer 383 during the main side reset release process (FIG. 196), the occurrence of an abnormality may be identified regardless of the amount of data stored in the main side receive buffer 383 if data exists in the main side receive buffer 383.

(176) In the above 18th to 23rd embodiments, the register setting process (FIG. 163(b)) may be executed in the main side reset release process (FIG. 196) before the main process (FIG. 161) is executed. This allows the main process (FIG. 161) to be started with the first register group 265, the second register group 266, the setting register group 256, and the monitoring and control register group 257 cleared to "0" and initialized.

(177) In the above 18th to 23rd embodiments, the output port clearing process of the power outage monitoring process (FIG. 170) may be configured to clear some of the output ports in the main MPU 222, and the output port clearing process of the power outage monitoring process (FIG. 170) may be configured to clear the first output data register, second output data register, and output destination selection register in the monitoring control register group 257 to "0." In these configurations, resetting the main MPU 222 clears all output ports in the main MPU 222 to "0."

(178) In the above 18th to 23rd embodiments, the output port clearing process of the power outage monitoring process (FIG. 170) may be configured to clear the input port of the main MPU 222 to "0" in addition to clearing the output port of the main MPU 222 to "0."

(179) In the above-mentioned 18th to 23rd embodiments, in the RAM clearing process in steps S8709 to S8710 of the main processing (FIG. 161), in addition to clearing the work area 281 for specific control to "0" and initializing it, the work area 283 for non-specific control may also be cleared to "0" and initializing it. Specifically, in the RAM clearing process, the initialization process for specific control is first executed. In the initialization process for specific control, the work area 281 for specific control is cleared to "0" and initializing it. Then, the stack area 282 for specific control is cleared to "0" and initializing it. Then, the first register group 265 is cleared to "0" and initializing it. Then, the initialization process for non-specific control is executed by the CALLA instruction. In the initialization process for non-specific control, the work area 283 for non-specific control is first cleared to "0" and initializing it. This makes it possible to erase the information used to calculate the winning ratio when the RAM clearing process is executed. After that, the stack area 284 for non-specific control is cleared to "0" and initialized. After that, the second register group 266 is cleared to "0" and initialized. After that, the RETA command is used to return to specific control processing. Note that in the RAM clearing process, the initialization process for specific control may be configured to be performed after the initialization process for non-specific control.

(180) In the above-described 18th to 23rd embodiments, non-specific control processing is executed while the activation of timer interrupt processing is prohibited, and timer interrupt processing is not activated when non-specific control processing is being executed. However, this is not limited to this, and a configuration in which timer interrupt processing can be activated even when non-specific control processing is being executed is also possible. Specifically, the main MPU 222 can activate timer interrupt processing when non-specific control processing is being executed by performing an interrupt permission setting that permits the activation of timer interrupt processing during non-specific control processing. Furthermore, the main MPU 222 can set the interrupt permission setting when non-specific control processing is being executed, and then set an interrupt prohibition setting that prohibits the activation of timer interrupt processing, thereby prohibiting the activation of timer interrupt processing.

(181) In the above-mentioned 18th to 23rd embodiments, the ball loan button 173 operated to receive loaned gaming balls, the medium return button 174 operated to eject the storage medium M from the medium insertion/ejection port 172, and the balance display unit 175 that displays the balance information stored on the storage medium M inserted into the medium insertion/ejection port 172 are configured to be provided on the management unit 170, but this is not limited to this, and the ball loan button 173, medium return button 174, and balance display unit 175 may also be configured to be provided on the pachinko machine 160. Specifically, the ball loan button 173, medium return button 174, and balance display unit 175 are provided to the right of the upper tray 206a (Figure 153) on the upper plane of the upper bulge 206 (Figure 153) of the pachinko machine 160.

(182) In the above-mentioned 18th to 23rd embodiments, instead of a configuration in which a game becomes unavailable when the predetermined difference in the number of balls measured by the total winning number counter 347 becomes equal to or exceeds the termination reference number (specifically, 19,000 or more), a configuration in which a game becomes unavailable when the total number of payouts after the supply of operating power to the pachinko machine 160 begins becomes equal to or exceeds the termination reference number (specifically, 19,000 or more) may be adopted. Specifically, a total payout number counter is provided in the work area 283 for non-specific control. The value of the total payout number counter is cleared to "0" when the supply of operating power to the pachinko machine 160 begins. In the second management process (FIG. 177), when game balls are paid out, a process is executed to add the number of paid game balls to the value of the total payout counter, and a process is executed to set the unplayable flag 351 to "1" when the value of the total payout counter after the addition reaches or exceeds the termination reference number (specifically, 19,000 or more). By configuring the process to make the game unplayable when the total number of payouts after the supply of operating power to the pachinko machine 160 begins to reach or exceed the termination reference number as a non-specific control process, it is possible to configure the game to be unplayable when the total number of payouts reaches or exceed the termination reference number while preventing an increase in the data size of the specific control program and specific control data.

(183) In the above 18th to 23rd embodiments, when the non-playable flag 351 is set to "1", an infinite loop occurs when non-specific control processing is being executed in the timer interrupt processing (FIG. 167). However, this is not limited to this, and an infinite loop may occur when non-specific control processing is being executed in the remaining processing of the main processing (FIG. 161), an infinite loop may occur when specific control processing is being executed in the remaining processing of the main processing (FIG. 161), or an infinite loop may occur when specific control processing is being executed in the timer interrupt processing (FIG. 167).

(184) In the above-described 18th to 23rd embodiments, instead of a configuration in which game balls are paid out to the upper tray 206a or the lower tray 207a, a configuration in which information on the number of game balls to be paid out may be recorded. Specifically, the payout number information is stored in a storage medium M inserted in the management unit 170. When a ball enters a ball entry section in which a number of prize balls is set, the number of prize balls is added to the value of the payout number information stored in the storage medium M. This eliminates the need for a configuration for measuring game balls paid out to the upper tray 206a or the lower tray 207a, thereby simplifying the configuration of the pachinko machine 160. Furthermore, game balls are sealed in the pachinko machine 160 and circulate within the pachinko machine 160. Based on the operation of the ball loan button 173 provided on the management unit 170, a game ball that can be fired is loaned out from the game ball launching mechanism 187. Balls that enter the ball entry section are guided from the back of the game board 184 to the ball launching mechanism 187. This reduces the possibility of illegally introduced balls being used. Even in this configuration, if the predetermined difference in the number of balls measured by the total winning number counter 347 provided in the non-specific control work area 283 exceeds 19,000, which is the termination threshold, a game becomes unplayable. The process of managing the predetermined difference in the number of balls and the process of disabling play when the predetermined difference in the number of balls reaches the termination threshold are executed using a non-specific control program and non-specific control data. This makes it possible to execute the process of managing the predetermined difference in the number of balls and the process of disabling play when the predetermined difference in the number of balls reaches the termination threshold, while minimizing the increase in the data size of the specific control program and specific control data.

(185) In the 20th to 22nd embodiments described above, the main reset release process (FIG. 191(c)) is configured to execute the execution stop process (step SB309) on the condition that the data volume of data stored in the main receive buffer 383 at the end of the release waiting period is equal to or greater than the abnormality reference amount. However, this is not limited to this, and the main reset release process (FIG. 191(c)) may be configured not to execute the processes of steps SB304 to SB307. Specifically, the main reset release process first determines whether the value of the reset cause register in the monitoring and control register group 257 is "1" or "2." If the value of the reset cause register is "0," i.e., if a total reset of the main MPU 222 has been performed, a status confirmation process is executed. The status confirmation process includes a process to confirm that no abnormalities have occurred in the programs set in the main ROM 223 and a process to confirm that no abnormalities have been detected in the circuits built into the main MPU 222. If no abnormality is identified in the status confirmation process, a jump is made to the start address of the main process ( FIG. 161 ). This causes the main process to start in the main MPU 222. On the other hand, if an abnormality is detected in the status confirmation process, an execution stop process is executed without jumping to the start address of the main process ( FIG. 161 ). The execution stop process executes a process to stop the operation of the main MPU 222. This prevents the main process ( FIG. 161 ) from being executed without resolving the abnormality if an abnormality is detected when the main MPU 222 is released from reset. Furthermore, if the value of the reset cause register is "1" or "2," i.e., if a partial reset of the main MPU 222 is performed due to the main MPU 222 having traveled outside the designated area or the watchdog timer 382 having timed out, a jump is made to the start address of the main process ( FIG. 161 ) without executing the status confirmation process. This causes the main process to start in the main MPU 222.

In this way, when a full reset of the main MPU 222 is performed, the status check process is executed, and the main process is started only if no abnormality is detected in the status check process. This prevents the main process from being started while an abnormality is occurring. Furthermore, when a partial reset of the main MPU 222 is performed because the main MPU 222 has traveled outside the designated area or the watchdog timer 382 has timed out, the main process is started without executing the status check process, allowing the main process to be started quickly after the partial reset.

(186) In the above 20th to 22nd embodiments, the gaming balls may be sealed inside the pachinko machine 160, and the gaming balls may be circulated and used inside the pachinko machine 160. Specifically, instead of paying out gaming balls, the value of the number of award information stored in the storage medium M is added. After sending a prize ball command to the payout side MPU 261, the main side MPU 222 receives a prize ball response command from the payout side MPU 261 via asynchronous serial communication. In this way, the configuration is such that there is data that the main side MPU 222 receives from the payout side MPU 261 via asynchronous serial communication. In this configuration, if a partial reset of the main MPU 222 is performed based on the occurrence of driving outside the designated area in the main MPU 222 or the occurrence of a watchdog timer timeout, a positive determination is made in step SB301 of the main reset release processing (FIG. 196), and the processing of steps SB302 to SB307 and step SB309 is not executed, and the main processing (FIG. 161) is started. This makes it possible to quickly enter a state in which the main processing (FIG. 161) and timer interrupt processing (FIG. 167) are executed after the partial reset of the main MPU 222. This reduces the possibility that the main MPU 222 will fail to receive data sent from the dispensing MPU 261.

(187) The configurations of the 20th to 22nd embodiments may be applied to a slot machine. Specifically, when a winning combination for which gaming media are awarded is achieved, the value of the award number information stored in the storage medium M is incremented. The main MPU of the slot machine sends a media award command to the value number MPU and then receives a media award response command from the value number MPU via asynchronous serial communication. In this manner, the main MPU receives data via asynchronous serial communication from the value number MPU. In this configuration, if a partial reset of the main MPU is performed based on the occurrence of driving outside the designated area in the main MPU or the occurrence of a watchdog timer timeout, a positive judgment is made in step SB301 of the main reset release processing (FIG. 196), and the main processing is started without executing the processing of steps SB302 to SB307 and step SB309. This allows the main processing and timer interrupt processing to be executed promptly after the partial reset of the main MPU. This reduces the possibility that the master MPU will fail to receive data sent from the value MPU.

(188) In the above 20th embodiment, the main MPU 222 is configured to be fully reset before processing begins in the sound/light side MPU 233 and the dispensing side MPU 261. However, this is not limited to this, and the main MPU 222 may be configured to be fully reset when processing to perform initial settings is being executed in at least one of the sound/light side MPU 233 and the dispensing side MPU 261.

(189) In the above-described 18th to 23rd embodiments, a reset response signal may be supplied from outside the payout-side MPU 261. Specifically, the payout-side power failure monitoring board 366 outputs a reset response signal to the 22nd input terminal 373b of the first logic circuit 373 and the 32nd input terminal 374b of the second logic circuit 374. After the supply of operating power to the pachinko machine 160 begins, the payout-side power failure monitoring board 366 keeps the reset response signal at a LOW level for a predetermined period (e.g., the period from the rise of the payout-side reset signal until one second has elapsed), and then raises the reset response signal to a HIGH level after the predetermined period has elapsed. This prevents data from being stored in the payout-side receiving buffer 363 even if it is output from the main MPU 222 or management unit 170 for a predetermined period after the supply of operating power to the pachinko machine 160 begins.

(190) In the above 18th to 23rd embodiments, when the payout side MPU 261 is reset, the data in the payout side receive buffer 363 is cleared, and if one or more bytes of data are stored in the payout side receive buffer 363 in step SA706 of the payout side reset release process (FIG. 187) or step SB407 of the payout side reset release process (FIG. 201), the payout side execution stop process may be executed without jumping to the payout side main process. This prevents the payout side main process from starting if an abnormal condition occurs in which abnormal data is stored in the payout side receive buffer 363 and the abnormal condition has not been resolved.

(191) In the twentieth to twenty-second embodiments described above, when the main MPU 222 is reset, the data in the main receive buffer 383 is cleared, and if one byte or more of data is stored in the main receive buffer 383 in step SB307 of the main reset release process (FIG. 196), the execution stop process may be executed without jumping to the main process. This prevents the main process from starting before an abnormal state is resolved when abnormal data is stored in the main receive buffer 383.

(192) In the above 18th to 23rd embodiments, in addition to or instead of the configuration in which the reception limiting circuit 371 is provided between the first receiving terminal 361 of the dispensing side MPU 261 and the main side MPU 222, a configuration in which a reception limiting circuit is provided between the sound/light receiving terminal provided in the sound/light side MPU 233 and the main side MPU 222 may be adopted. Specifically, the sound/light emission control board 232 is provided with a sound/light receiving buffer. The sound/light receiving buffer stores data received at the sound/light side receiving terminal. The sound/light side MPU 233 is provided with a sound/light side reset-compatible output terminal. A sound/light side reset-compatible signal is output from the sound/light side reset-compatible output terminal. When the sound/light side MPU 233 is reset, the sound/light side reset signal output from the sound/light side reset-compatible output terminal will be at a LOW level until the sound/light side reset-compatible signal rise processing is executed after the sound/light side MPU 233 is released from reset. By providing a reception restriction circuit between the audio/video side receiving terminal and the main MPU 222, it is possible to prevent the audio/video side MPU 233 from stopping operation due to data normally transmitted from the main MPU 222 being stored in the audio/video side receiving buffer after the audio/video side MPU 233 is released from reset and before the audio/video side reset response signal is started.

(193) The main control board 221 may be configured to have the same configuration as the first receiving terminal 361, dispensing side receiving buffer 363, first receiving corresponding terminal 364, second receiving corresponding terminal 365, reset corresponding output terminal 368, and receiving limiting circuit 371 provided on the dispensing control board 259 in the 18th to 23rd embodiments. Specifically, as in the 20th embodiment, the main MPU 222 on the main control board 221 is provided with a main receiving buffer 383. The main MPU 222 is also provided with a first main receiving terminal and a main reset corresponding output terminal. The main control board 221 is also provided with a first main receiving corresponding terminal and a main receiving limiting circuit. The first main receiving terminal is electrically connected to the dispensing side MPU 261 via the receiving limiting circuit and the first main receiving corresponding terminal. The main receiving buffer 383 stores information corresponding to changes in the state of the signal input to the first main receiving terminal. The information stored in the main reception buffer 383 is a message called a prize ball response sent from the payout MPU 261 via asynchronous serial communication. The main reception limiting circuit receives a data signal received from the payout MPU 261 via the main first reception corresponding terminal and a main reset corresponding signal output from the main reset corresponding output terminal. Furthermore, if at least one of the two signals input to the main reception limiting circuit is at a low level, the signal output from the main reception limiting circuit to the main first reception terminal is at a low level, and if both of the two signals input to the main reception limiting circuit are at a high level, the signal output from the main reception limiting circuit to the main first reception terminal is at a high level. In the main reset release process (FIG. 196), if a positive determination is made in step SB301 or a negative determination is made in step SB307, a main reset response signal raising process is executed to raise the main reset response signal from a low level to a high level, and after the main reset response signal raising process is executed, the main process is started in step SB308. This makes it possible to prevent data corresponding to data output from the dispensing MPU 261 from being stored in the main receive buffer 383 during the period from when a partial reset or full reset of the main MPU 222 is performed until the main reset response signal raising process is executed.

(194) In the above 18th to 23rd embodiments, instead of the configuration in which the display control device 241 is controlled by the audio and light emitting control device 231 based on commands output from the main control device 211, a configuration in which the display control device 241 controls the audio and light emitting control device 231 based on commands output from the main control device 211 may be adopted. Also, instead of the configuration in which the audio and light emitting control device 231 and the display control device 241 are provided separately, a configuration in which both control devices are provided as a single control device may be adopted, or the functions of one of these two control devices may be integrated into the main control device 211, or both functions of these two control devices may be integrated into the main control device 211. Also, the configuration of the commands output from the main control device 211 to the audio and light emitting control device 231 and the configuration of the commands output from the audio and light emitting control device 231 to the display control device 241 may be arbitrary.

(195) In the above 18th to 23rd embodiments, the device that executes the game round effects is not limited to the symbol display device 199, and may be configured to execute the game round effects by operating a movable decorative member, or by lighting up a specified light-emitting unit, or may be configured to execute the game round effects by combining all or part of the above aspects.

(196) The present invention can also be applied to other types of pachinko machines different from the 18th to 23rd embodiments above, such as pachinko machines in which an electric device opens a predetermined number of times when a gaming ball enters a specific area of a special device, pachinko machines in which a right is generated and a jackpot is awarded when a gaming ball enters a specific area of a special device, pachinko machines with other devices, arrange ball machines, mahjong ball machines, etc.

The present invention can also be applied to non-ball gaming machines, such as slot machines, which have multiple reels with multiple symbols circumferentially printed on them, and which start the reels by inserting a medal and operating the start lever, and which award players a special prize, such as a medal payout, if a specific symbol or combination of symbols appears on an active line visible through a display window after the reels stop when the stop switch is operated or a predetermined time has passed.

The present invention can also be applied to a gaming machine that combines a pachinko machine and a slot machine, in which the gaming machine main body is supported on an outer frame so that it can be opened and closed, is equipped with a storage section and a take-up device, and the reels begin to rotate when the start lever is operated after a predetermined number of gaming balls stored in the storage section have been taken in by the take-up device.

(197) The number of active lines is not limited to one, the main line ML, and may be two, three, four, or more. In this case, the number of active lines may increase as the number of gaming media bets increases, or the maximum number of active lines may be set regardless of the number of gaming media bets.

(198) The types of information transmitted from the main MPU 72 to the presentation MPU 92 are not limited to those described in the above embodiments. For example, when a winning combination corresponding to the awarding of game media is achieved, information regarding the number of game media awarded as a result of the winning combination may be transmitted from the main MPU 72 to the presentation MPU 92. In this case, information regarding the number of game media awarded as a result of the winning combination can be displayed on the image display device 63 or the like. Furthermore, even when all reels 32L, 32M, and 32R are not stopped, when some of the reels 32L, 32M, and 32R have stopped spinning or have stopped, corresponding information may be transmitted from the main MPU 72 to the presentation MPU 92. In this case, it is possible to display presentations corresponding to the spinning status of the reels 32L, 32M, and 32R on the image display device 63 or the like.

(199) In each of the above embodiments, a bonus of medals being paid out is awarded when a small winning combination is achieved, but the invention is not limited to such a configuration and may be configured to award some kind of bonus to the player. For example, a prize other than medals may be paid out when a small winning combination is achieved. Furthermore, in slot machines that do not have the function of inserting actual medals or paying out medals, but instead manage medals owned by the player as credits, an increase in the number of credited medals corresponds to the awarding of a bonus.

(200) This invention may be applied to so-called B-type slot machines, or to any type of slot machine, such as C-type, a combination of A-type and C-type, a combination of B-type and C-type, or even a type equipped with an RT game, CT game, or ART game. It may also be configured to have a bonus state that is advantageous to the player.

(201) The symbols on each reel 32L, 32M, 32R are not limited to pictures, numbers, letters, etc., but may also be geometric lines, figures, etc. Furthermore, symbols may be formed using light, color, etc., or three-dimensional shapes, etc., or may be a combination of these. In other words, symbols may function as distinguishable information.

(202) In the first to seventeenth embodiments described above, specific examples were shown for a slot machine 10, but the present invention may also be applied to a pachinko machine in which games are played using gaming balls as the gaming medium, or to a gaming machine that combines a slot machine and a pachinko machine.

(203) The characteristic features of the first to twenty-third embodiments may be applied to one another in any combination. For example, the characteristic features of the first embodiment, the second embodiment, the fourth embodiment, the fifth embodiment, the eighth embodiment, the ninth embodiment, the tenth embodiment, the eleventh embodiment, the twelfth embodiment, the thirteenth embodiment, the fourteenth embodiment, the sixteenth embodiment, the eighteenth embodiment, and the twentieth embodiment may be combined, or the characteristic features of the third embodiment and the fourth embodiment may be combined. Furthermore, the characteristic features of the other embodiments may be applied in any combination to a configuration in which the characteristic features of the first to twenty-third embodiments are applied in a predetermined combination.

<Inventions extracted from the above embodiments>
The following describes the features of the inventions extracted from the above-described embodiments, while indicating, as necessary, their effects, etc. Note that, for ease of understanding, the corresponding configurations in the above-described embodiments are indicated in parentheses as appropriate below, but the invention is not limited to the specific configurations indicated in parentheses.

<Features Group A>
Feature A1. A main control means (main MPU 72) that controls the progress of the game;
A performance control means (performance side MPU 92) that controls the execution of performance based on the transmission information transmitted by the main control means;
Equipped with
The main control means is equipped with a predetermined transmission means (a function of executing the processing of steps S315, S1304 and steps S1305 to S1308 of the main MPU 72 in the first embodiment) that transmits predetermined transmission information (game end command A) including predetermined information (information on the game status of the next game) that enables the presentation control means to identify the game status of the next game for the predetermined game.

According to Feature A1, in a given game, predetermined transmission information including predetermined information that enables the game state of the next game to be identified for that given game is transmitted from the main control means to the presentation control means. This makes it possible for the presentation control means to identify the game state of the next game in the previous game, and enables optimal execution control of presentations corresponding to the game state.

Feature A2. A gaming machine as described in Feature A1, wherein the predetermined transmission means transmits the predetermined transmission information both when the gaming state transition occurs and when the gaming state transition does not occur.

According to feature A2, the predetermined transmission information is transmitted whether or not a transition in the gaming state occurs, eliminating the need to determine whether or not the predetermined transmission information needs to be transmitted depending on whether or not a transition in the gaming state occurs. This simplifies the processing configuration for transmitting the predetermined transmission information.

Feature A3. A gaming machine according to Feature A1 or A2, wherein the predetermined transmission means transmits the predetermined transmission information for each game.

According to feature A3, the predetermined transmission information is transmitted for each game, eliminating the need to determine whether the game is the target of transmission. This simplifies the processing configuration for transmitting the predetermined transmission information.

Feature A4. A gaming machine according to any one of Features A1 to A3, wherein the predetermined transmission means transmits the predetermined transmission information when a predetermined transmission trigger occurs in each game (when one game ends).

According to feature A4, the specified transmission information is transmitted when a predetermined transmission trigger occurs in each game, making it possible to fix the timing at which the specified transmission information is transmitted within the scope of one game.

Feature A5. A gaming machine according to any one of Features A1 to A4, wherein the predetermined transmission means transmits the predetermined transmission information when a predetermined transmission trigger occurs, which occurs when each game ends.

According to feature A5, the specified transmission information is transmitted when a predetermined transmission trigger occurs, which occurs when each game ends, so the presentation control means can determine the game status of the next game when each game ends.

Feature A6. A gaming machine described in any one of Features A1 to A5, wherein the predetermined transmission information or the transmission information transmitted when the predetermined transmission information is transmitted includes specific information (information about the game status of the current game) that enables the presentation control means to identify the game status of the predetermined game.

According to feature A6, the predetermined transmission information or the transmission information transmitted when the predetermined transmission information is transmitted includes information that allows the gaming status of the predetermined game to be identified, allowing the presentation control means to simultaneously identify the gaming status of the predetermined game and the gaming status of the game following the predetermined game. This allows the presentation control means to identify whether a change in gaming status will occur based on the predetermined game, and to execute a presentation corresponding to the identified result.

Feature A7. A gaming machine according to Feature A6, wherein the effect control means includes means for executing an effect corresponding to the second gaming state when the gaming state corresponding to the specific information is the first gaming state and the gaming state corresponding to the predetermined information is the second gaming state (a function for executing the processing of steps S1419 to S1421 of the effect-side MPU 92 in the first embodiment).

According to feature A7, if the gaming state corresponding to the specific information included in the predetermined transmission information or the transmission information transmitted when the predetermined transmission information is transmitted is the first gaming state, and the gaming state corresponding to the predetermined information included in the predetermined transmission information is the second gaming state, the presentation control means identifies that a transition from the first gaming state to the second gaming state has occurred at the boundary of a predetermined game, and executes control to execute a presentation corresponding to the second gaming state. This enables the presentation control means to preferably control the execution of a presentation corresponding to the transition to the second gaming state.

Feature A8. A gaming machine according to Feature A7, wherein the effect control means includes means for executing an effect corresponding to the second gaming state when information indicating that the gaming state is the second gaming state is transmitted from the main control means while an effect corresponding to the second gaming state is not being executed (a function for executing the processing of steps S1505 to S1507 of the effect-side MPU 92 in the first embodiment).

According to feature A8, when information corresponding to the game state of a specified game being the second game state is received while an effect corresponding to the second game state is not being executed, the effect control means executes an effect corresponding to the second game state. This makes it possible for the effect control means to identify that a transition from the first game state to the second game state has occurred in that game due to a communication error or the like, and to identify that the game is in the second game state when the communication error is subsequently resolved, and to execute an effect corresponding to the second game state.

Feature A9: A state information storage area (end status area 96k) is provided that can store state information corresponding to the game state of the next game (information on the game state of the next game),
A gaming machine according to any one of features A1 to A8, wherein the predetermined transmission information includes the status information stored in the status information storage area.

Feature A9 is configured to read status information from a status information storage area capable of storing status information corresponding to the game status of the next game, and then transmit predetermined transmission information that sets that status information, thereby simplifying the processing configuration for transmitting the predetermined transmission information.

Feature A10. The gaming machine described in Feature A9 is characterized by including specific transmission means (a function for executing the processing of steps S411, S1303, and steps S1305 to S1308 of the main MPU 72 in the first embodiment) that transmits specific transmission information (rotation acceptance command A) including the status information stored in the status information storage area at a timing different from that of the predetermined transmission information during one game.

According to feature A10, transmission information including status information corresponding to the game status of the next game is transmitted multiple times in one game, each time at different times. This enables the presentation control means to appropriately identify the game status of the next game.

In addition, the configuration of features A1 to A10 may be applied to any one or more of features A1 to A10, features B1 to B8, features C1 to C6, features D1 to D7, features E1 to E8, features F1 to F8, features G1 to G7, features H1 to H6, features I1 to I14, features J1 to J9, features K1 to K14, features L1 to L11, features M1 to M14, features N1 to N6, features O1 to O10, features P1 to P13, features Q1 to Q11, features R1 to R13, features S1 to S14, features T1 to T11, features U1 to U9, features V1 to V5, features W1 to W7, features X1 to X10, features Y1 to Y13, features Z1 to Z16, features a1 to a11, features b1 to b12, and features c1 to c9. This allows for a synergistic effect to be achieved through the combined configuration.

<Features Group B>
Feature B1. A main control means (main MPU 72) that controls the progress of the game;
A performance control means (performance side MPU 92) that controls the execution of performance based on the transmission information transmitted by the main control means;
Equipped with
The main control means includes a corresponding transmission means (a function of executing the processing of step S411 and steps S1301 to S1315 of the main MPU 72 in the first embodiment) that transmits transmission information (rotation reception commands A and B) to the performance control means based on the occurrence of a transmission trigger,
The performance control means
A means for starting predetermined effects (real premonition effects and false premonition effects) (a function for executing the processes of steps S1406 and S1411 of the effect-side MPU 92 in the first embodiment);
A performance progression means (a function of executing the processes of steps S1406 and S1408 of the performance-side MPU 92 in the first embodiment) for progressing the performance content of the predetermined performance based on receiving the transmission information;
Equipped with
The presentation progression means of the gaming machine is characterized in that when the presentation control means does not receive the transmission information corresponding to the occurrence of a predetermined transmission trigger, but receives the transmission information corresponding to the occurrence of a subsequent transmission trigger, the progression mode of the presentation content of the predetermined presentation is changed depending on the game situation (a situation in which a real premonition presentation is being executed and a situation in which a false premonition presentation is being executed).

According to feature B1, transmission information is sent from the main control means to the presentation control means upon the occurrence of a transmission trigger, and the presentation control means progresses the presentation content of the predetermined presentation upon receiving the transmission information after the start of the predetermined presentation. This makes it possible to progress the presentation content of the predetermined presentation according to the progress of the game. In this case, it is conceivable that the presentation control means will not receive the transmission information corresponding to the occurrence of the predetermined transmission trigger due to, for example, an abnormality in the communication path. If such an event occurs, the progress of the presentation content of the predetermined presentation when transmission information corresponding to the subsequent occurrence of a transmission trigger is received will differ depending on the game status. Therefore, even if an event occurs in which the presentation control means does not receive the transmission information corresponding to the occurrence of the predetermined transmission trigger, it is possible to make the progress of the presentation content of the predetermined presentation appropriate for the game status.

Feature B2. A gaming machine as described in Feature B1, wherein the effect progression means is capable of creating a situation in which, if the effect control means does not receive the transmission information corresponding to the predetermined transmission trigger, the content of the predetermined effect will not progress until new transmission information is received, regardless of whether the first gaming status (a status in which a real premonition effect is being executed) or the second gaming status (a status in which a false premonition effect is being executed) is being executed.

According to feature B2, in either the first or second game status, if the effect control means does not receive transmission information corresponding to a predetermined transmission trigger, the content of the predetermined effect will not proceed until new transmission information is received. This makes it possible to prevent the content of the predetermined effect from progressing even when transmission information has not been received from the main control means.

Feature B3. The presentation progression means
a first situation response means (a function of executing the processing of step S1406 and steps S1501 to S1510 of the performance side MPU 92 in the first embodiment) for generating performance contents that are not to be executed among the performance contents of the predetermined performance when the performance control means does not receive the transmission information corresponding to the occurrence of a predetermined transmission trigger in a first game situation (a situation in which the present premonition performance is being executed) and then receives the transmission information corresponding to the occurrence of a subsequent transmission trigger;
a second situation response means (a function for executing the process of step S1408 of the performance side MPU 92 in the first embodiment) for preventing performance contents that are not to be executed from being generated among the performance contents of the predetermined performance when the performance control means does not receive the transmission information corresponding to the occurrence of a predetermined transmission trigger in a second game situation (a situation in which a false premonition performance is being executed) and then receives the transmission information corresponding to the occurrence of a subsequent transmission trigger;
The gaming machine according to feature B1 or B2, characterized in that it is provided with:

According to feature B3, in the first gaming situation, if the effect control means does not receive transmission information corresponding to the occurrence of a predetermined transmission trigger, and then receives transmission information corresponding to the occurrence of a subsequent transmission trigger, it will produce the effect content of the predetermined effect that is not to be executed. On the other hand, in the second gaming situation, if the effect control means does not receive transmission information corresponding to the occurrence of a predetermined transmission trigger, and then receives transmission information corresponding to the occurrence of a subsequent transmission trigger, it will not produce the effect content of the predetermined effect that is not to be executed. This makes it possible to create gaming situations in which the effect content of the predetermined effect is skipped and gaming situations in which it is not skipped in response to the failure to receive transmission information corresponding to the occurrence of a predetermined transmission trigger, and to progress the effect content of the predetermined effect in a manner appropriate to the gaming situation.

Feature B4. The presentation progression means
a first situation response means (a function of executing the processing of step S1406 and steps S1501 to S1510 of the performance side MPU 92 in the first embodiment) for setting the performance content of the predetermined performance to the performance content corresponding to the transmission trigger of the received transmission information when the performance control means does not receive the transmission information corresponding to the occurrence of a predetermined transmission trigger in a first game situation (a situation in which the present premonition performance is being executed) and receives the transmission information corresponding to the occurrence of a subsequent transmission trigger;
a second situation response means (a function for executing the process of step S1408 of the performance side MPU 92 in the first embodiment) for changing the performance content of the predetermined performance to the same performance content as when the performance control means receives the transmission information corresponding to the occurrence of a predetermined transmission trigger after the transmission information corresponding to the occurrence of the predetermined transmission trigger is received in a second game situation (a situation in which a false premonition performance is being executed);
The gaming machine according to feature B1 or B2, characterized in that it is provided with:

According to feature B4, if the presentation control means does not receive transmission information corresponding to the occurrence of a predetermined transmission trigger in the first gaming situation, but receives transmission information corresponding to the occurrence of a subsequent transmission trigger, the presentation content of the predetermined presentation will be the presentation content corresponding to the transmission trigger of the received transmission information. On the other hand, if the presentation control means does not receive transmission information corresponding to the occurrence of a predetermined transmission trigger in the second gaming situation, but receives transmission information corresponding to the occurrence of a subsequent transmission trigger, the presentation content of the predetermined presentation will be the same as if transmission information corresponding to the predetermined transmission trigger had been received. As a result, even if a situation occurs in the first gaming situation in which the presentation control means does not receive transmission information corresponding to the occurrence of a predetermined transmission trigger, if transmission information is subsequently received, the presentation content of the predetermined presentation can be adjusted to match the progress of the game under the control of the main control means. Furthermore, even if a situation occurs in the second gaming situation in which the presentation control means does not receive transmission information corresponding to the occurrence of a predetermined transmission trigger, if transmission information is subsequently received, the presentation content of the predetermined presentation can be continued without skipping.

Feature B5. The first gaming situation is a situation in which the progress is controlled by the main control means,
The gaming machine described in feature B4 is characterized in that the second game situation is a situation in which the progress is controlled by the presentation control means.

According to Feature B5, while the first game situation is a situation in which progress is controlled by the main control means, the second game situation is a situation in which progress is controlled by the presentation control means, making it possible to create a situation in which the main control means and the presentation control means each play a major role in progress control. In this case, by including the configuration of Feature B4 above, even if a situation occurs in which the presentation control means does not receive transmission information corresponding to the occurrence of a predetermined transmission trigger in the first game situation in which progress is controlled by the main control means, if transmission information is subsequently received, it is possible to make the presentation content of the predetermined presentation match the progress of the game controlled by the main control means. Furthermore, in the second game situation in which progress is controlled by the presentation control means, even if a situation occurs in which the presentation control means does not receive transmission information corresponding to the occurrence of a predetermined transmission trigger, it is possible to continue the presentation content of the predetermined presentation without skipping if transmission information is subsequently received.

Feature B6. A gaming machine as described in Feature A5, wherein the corresponding transmission means transmits the transmission information so as to include information corresponding to the progress of the first game status (information of the standby counter 96f).

According to feature B6, the transmission information is transmitted from the main control means to the presentation control means so as to include information corresponding to the progress of the first game situation. Therefore, even if a situation arises in the first game situation where the presentation control means does not receive transmission information corresponding to the occurrence of a specified transmission trigger, if transmission information is subsequently received, the information contained in the transmission information can be used to adjust the presentation content of the specified presentation to match the progress of the game controlled by the main control means.

Feature B7. The performance control means
a situation-corresponding storage means (a counter for false omen effects in the effect-side RAM 94) capable of storing information corresponding to the progress of the second game situation;
A means for updating the information stored in the situation-dependent storage means based on reception of the transmission information (a function for executing the process of step S1408 of the performance-side MPU 92 in the first embodiment);
Equipped with
The gaming machine according to feature B5 or B6, wherein the presentation progression means sets the presentation content of the predetermined presentation to be presentation content corresponding to the information stored in the situation-corresponding storage means.

According to Feature B7, the information in the situation-responsive storage means provided in the effect control means is updated based on the reception of transmitted information, and the content of the predetermined effect is set to the content of the effect corresponding to the information stored in the situation-responsive storage means. This makes it possible to adapt the game progress controlled by the main control means to the second game state in which progress is controlled by the effect control means. In this case, even if a situation occurs in the second game state in which the effect control means does not receive transmitted information corresponding to the occurrence of a predetermined transmission trigger, if transmitted information is subsequently received, the information in the situation-responsive storage means is updated and the content of the predetermined effect is set to the content of the effect corresponding to the information stored in the situation-responsive storage means, making it possible to progress without skipping the content of the predetermined effect.

Feature B8. The first gaming situation is a situation in which a special benefit (base AT state ST4 or CZ state) is awarded after continuing for multiple games,
The gaming machine according to any one of features B3 to B7, wherein the second gaming situation is a situation in which no bonus is awarded after a plurality of games have been played.

Feature B8 makes it possible to skip the content of a predetermined effect in a first gaming situation in which a bonus is awarded after multiple games have been played and the content of a predetermined effect is not skipped if transmission information corresponding to the occurrence of a predetermined transmission trigger is not received, and to prevent skipping the content of a predetermined effect in a second gaming situation in which a bonus is not awarded after multiple games have been played and the content of a predetermined effect is not skipped if transmission information corresponding to the occurrence of a predetermined transmission trigger is not received.

In addition, the configurations of features B1 to B8 may be configured with any one or more of features A1 to A10, features B1 to B8, features C1 to C6, features D1 to D7, features E1 to E8, features F1 to F8, features G1 to G7, features H1 to H6, features I1 to I14, features J1 to J9, features K1 to K14, features L1 to L11, features M1 to M14, features N1 to N6, features O1 to O10, features P1 to P13, features Q1 to Q11, features R1 to R13, features S1 to S14, features T1 to T11, features U1 to U9, features V1 to V5, features W1 to W7, features X1 to X10, features Y1 to Y13, features Z1 to Z16, features a1 to a11, features b1 to b12, and features c1 to c9. This allows for a synergistic effect to be achieved through the combined configuration.

The inventions in the above Feature Group A and Feature Group B can solve the following problems:

Pachinko machines and slot machines are well-known gaming machines. For example, pachinko machines are equipped with a storage section for storing gaming balls. The gaming balls stored in the storage section are guided to a gaming ball launcher and launched toward the gaming area in response to the player's launch operation. Then, for example, when a gaming ball enters a ball entry section provided in the gaming area, a lottery process is executed, or a process is executed to increase the number of gaming balls available to the player.

In a slot machine, when a game value such as medals has been bet and the start lever is operated to start a new game, a lottery process is executed by the control means. Furthermore, when the lottery process is executed, the control means executes rotation start control, causing the reels to start spinning. If the stop button is operated while the reels are spinning, the control means executes rotation stop control, causing the reels to stop spinning. If the result after the reels have stopped spinning corresponds to a winning combination in the lottery process, a bonus corresponding to that winning combination is awarded to the player.

Here, in gaming machines such as those exemplified above, the execution control of effects needs to be carried out appropriately, and there is still room for improvement in this regard.

<Feature Group C>
Feature C1. A symbol display means (reel unit 31) that displays symbols in a variable manner;
A stop operation means (stop buttons 42 to 44) that is operated to stop the variable display of the picture;
A lottery means for executing a lottery process for winning combinations (a function for executing the lottery process for winning combinations (FIG. 16) of the main MPU 72 in the first embodiment);
a variable display control means (a function for executing the reel control process (FIG. 22) of the main MPU 72 in the first embodiment) for controlling the variable display of the pattern in the pattern display means so that a predetermined win (first bell win or second bell win) is achieved when the stop operation means is operated in a stop operation mode (stop order of reels 32L, 32M, 32R) corresponding to the correct answer in the case where a predetermined role (index value IV = 1 to 9) is won in the lottery process of the role;
A transmission means (a function of executing the processing of step S411 and steps S1301 to S1308 of the main MPU 72 in the first embodiment) for transmitting stop corresponding transmission information (rotation acceptance command A) that enables the stop operation mode corresponding to the correct answer to be identified when the predetermined role is won in the lottery processing of the role;
An operation notification control means (a function of executing the processes of steps S1510 and S1604 of the production-side MPU 92 in the first embodiment) that causes a predetermined notification means (image display device 63) to notify the correct stop operation mode corresponding to the stop corresponding transmission information based on the reception of the stop corresponding transmission information;
A correct answer control means (a function for executing the process of step S1622 of the production-side MPU 92 in the first embodiment) for executing a correct answer corresponding notification (display of a GET image G26) based on the fact that the stop operation means is operated in the stop operation mode corresponding to the correct answer notified by the predetermined notification means;
Equipped with
The correct answer control means is configured to execute the correct answer notification based on the stop operation means being operated in the stop operation mode corresponding to the correct answer notified by the predetermined notification means in a situation where the correct answer corresponding stop operation mode corresponding to the predetermined role won in the role lottery process in a predetermined game is different from the correct answer corresponding stop operation mode notified by the predetermined notification means.

According to feature C1, if a predetermined role is won in the role lottery process and the correct stop operation mode is notified by the predetermined notification means, the player can achieve a predetermined win by operating the stop operation means in the correct stop operation mode. Furthermore, if the stop operation means is operated in the correct stop operation mode notified by the predetermined notification means, a correct response notification is executed, allowing the player to recognize that they have been able to operate the stop operation means in the correct stop operation mode.

In this case, for example, due to an abnormality in the communications path, the notification control means may be unable to grasp the progress of the game, and the notification of the correct stop operation mode by the predetermined notification means may continue even after the end of the game in which the predetermined combination was won and notification of the correct stop operation mode by the predetermined notification means began. In such a situation, if the communication path abnormality is resolved in the next game or later and the notification control means is able to grasp the progress of the game, it is likely that the player will operate the stop operation means in the correct stop operation mode that has already been notified by the predetermined notification means, even in a game in which the predetermined win would not be achieved even if the stop operation means were operated in the correct stop operation mode that has already been notified by the predetermined notification means. In this case, the correct answer notification will be executed even if the predetermined win is not achieved, and the player will be able to grasp that the operation of the stop operation means corresponded to the correct stop operation mode notified by the predetermined notification means, and will be able to recognize that the failure to achieve the predetermined win was not due to an operational error on their part.

Feature C2: An incorrect answer response control means (a function of executing the process of step S1620 of the production-side MPU 92 in the first embodiment) is provided that causes an incorrect answer response notification (display of a blackout image G25) to be executed based on the fact that the stop operation means is not operated in the stop operation mode corresponding to the correct answer notified by the predetermined notification means,
The gaming machine described in feature C1 is characterized in that the incorrect answer response control means executes the incorrect answer response notification based on the stop operation means being operated in the stop operation mode corresponding to the correct answer corresponding to the predetermined role won in the lottery process for the role in the predetermined game, in a situation where the stop operation mode corresponding to the correct answer corresponding to the predetermined role won in the lottery process for the role in the predetermined game is different from the stop operation mode corresponding to the correct answer notified by the predetermined notification means.

According to feature C2, if the stop operation means is not operated in the correct stop operation mode notified by the predetermined notification means, an incorrect response notification is executed, allowing the player to recognize that the stop operation means could not be operated in the correct stop operation mode. In this case, for example, due to an abnormality in the communication path, it is possible that the notification control means will be unable to grasp the progress of the game, and the notification of the correct stop operation mode by the predetermined notification means will continue even after the game in which the predetermined role was won and the notification of the correct stop operation mode by the predetermined notification means was initiated has ended. In such a situation, if the abnormality in the communication path is resolved in the next game or later and the notification control means is able to grasp the progress of the game, it is possible that the predetermined role will be newly won in that game and the correct stop operation mode corresponding to that role will be different from the correct stop operation mode already notified by the predetermined notification means. In this situation, even if a player accidentally operates the stop operation means in a correct stop operation mode corresponding to a newly won predetermined role in the game, rather than the correct stop operation mode notified by the predetermined notification means, and thereby achieves a predetermined win, an incorrect stop notification will be executed because the correct stop operation mode is not the correct stop operation mode notified by the predetermined notification means. This makes it possible for the player to recognize that a predetermined win has been achieved despite operating the stop operation means in a stop operation mode different from the correct stop operation mode notified by the predetermined notification means.

Feature C3. A gaming machine described in Feature C1 or C2, characterized in that the main control means having the transmission means is equipped with a means (a function of executing the processing of step S511 of the main MPU 72 in the first embodiment) for causing a notification corresponding to the stop operation mode corresponding to the correct answer to be issued by a notification means (dual-purpose display unit 66) different from the predetermined notification means when the predetermined role is won in the role lottery process.

According to feature C3, a notification corresponding to the correct stop operation mode for a predetermined role that has been won in the role lottery process is made by a notification means different from the predetermined notification means, which is controlled by a main control means having a transmission means. As a result, even if the notification control means is unable to grasp the progress of the game due to, for example, an abnormality in the communication path, causing the predetermined notification means to notify an incorrect correct stop operation mode, it is possible to accurately grasp the correct stop operation mode by checking the notification means controlled by the main control means.

Feature C4. In the advantageous game state (base AT state ST4), the predetermined notification means notifies the stop operation mode corresponding to the correct answer,
When the predetermined winning is achieved, a game value is awarded to the player.
This gaming machine is
When a situation arises in which a game value can be awarded to a player in the advantageous game state, an information updating means (a function of executing the processing of step S1007 of the main MPU 72 in the first embodiment) updates the continuation information (information on the remaining number of awarded game media) stored in the continuation information storage means (AT difference number counter 96e) to approach the termination corresponding information ("0");
A means for terminating the advantageous game state based on the fact that the continuation information stored in the continuation information storage means has become the termination corresponding information (a function for executing the processing of step S1102 of the main MPU 72 in the first embodiment);
Equipped with
The gaming machine described in any one of features C1 to C3 is characterized in that the information update means updates the continuation information to approach the end corresponding information by an amount corresponding to the establishment of the predetermined winning, regardless of whether the predetermined winning is won in the lottery process for the winning role, the predetermined winning is established, or the predetermined winning is not established.

According to feature C4, when a winning combination corresponding to the awarding of game value is achieved during a favorable gaming state, the continuation information is updated to approach the end-corresponding information, and the favorable gaming state ends when the continuation information becomes the end-corresponding information. In this case, if a predetermined combination is won in the winning combination lottery process, the continuation information is updated to approach the end-corresponding information by the amount corresponding to the predetermined winning combination, regardless of whether the stop operation means is operated in the stop operation mode corresponding to the correct answer and the predetermined winning combination is achieved, or whether the stop operation means is not operated in the stop operation mode corresponding to the correct answer and the predetermined winning combination is not achieved. This makes it possible to update the continuation information to approach the end-corresponding information when a predetermined combination is won, regardless of the mode of operation of the stop operation means by the player.

Feature C5. A continuation information notification control means (a function of executing the processes of steps S1421, S1607, S1613, and S1625 of the performance side MPU 92 in the first embodiment) is provided so that a continuation information notification (display of the remaining awarded number image G21) corresponding to the continuation information is performed in the advantageous game state,
The gaming machine described in feature C4 is characterized in that the continuation information notification control means updates the content of the continuation information notification to the extent corresponding to the establishment of the specified winning, regardless of whether the specified winning is won in the lottery process for the role, the specified winning is established, or the specified winning is not established.

According to Feature C5, when a player is in a favorable gaming state, a continuation information notification corresponding to the continuation information is issued. This allows the player to know when the favorable gaming state will end by checking the continuation information notification. In this case, if a predetermined winning combination is achieved in the winning combination lottery process, whether the stop operation means is operated in the correct stop operation mode corresponding to the winning combination and a predetermined winning result is achieved, or the stop operation means is not operated in the correct stop operation mode corresponding to the winning combination and a predetermined winning result is not achieved, the content of the continuation information notification is updated in accordance with the continuation information being updated to approach the end-corresponding information by the amount corresponding to the winning combination being achieved. This allows the player to be notified of accurate continuation information. Furthermore, if the predetermined winning result is not achieved despite the stop operation means being operated in the correct stop operation mode notified by the predetermined notification means due to, for example, an abnormality in the communication path, not only is the correct answer notification issued but the content of the continuation information notification is updated even in a situation where the predetermined winning result is not achieved. This allows the player to understand that the operation of the stop operation means corresponded to the correct stop operation pattern notified by the specified notification means, and allows the player to recognize that the reason the specified win was not achieved was not due to an operational error on their part.

Feature C6. In the advantageous game state (base AT state ST4), the predetermined notification means notifies the stop operation mode corresponding to the correct answer,
When the predetermined winning is achieved, a game value is awarded to the player.
This gaming machine is equipped with an acquisition notification control means (a function of executing the processes of steps S1606 and S1625 of the presentation-side MPU 92 in the first embodiment) that causes an acquisition-related information notification (display of an acquisition number image G22) corresponding to the number of game values acquired by the player in the advantageous game state to be executed,
The gaming machine described in any one of features C1 to C5 is characterized in that, when the predetermined role is won in the role lottery process, if the predetermined winning is achieved, the winning notification control means updates the content of the winning corresponding information notification for the amount corresponding to the predetermined winning, but if the predetermined winning is not achieved, the gaming machine does not update the content of the winning corresponding information notification for the amount corresponding to the predetermined winning.

According to feature C6, an acquisition-related information notification is executed in a favorable gaming state, allowing the player to grasp the number of gaming values acquired in the favorable gaming state. In this case, if a predetermined combination is won in the combination lottery process, and a predetermined winning combination is achieved, the content of the acquisition-related information notification is updated for the amount corresponding to the predetermined winning combination; however, if a predetermined winning combination is not achieved, the content of the acquisition-related information notification is not updated for the amount corresponding to the predetermined winning combination. This makes it possible to increase the accuracy of the acquisition-related information notification.

In addition, the configurations of features C1 to C6 may be configured with any one or more of features A1 to A10, features B1 to B8, features C1 to C6, features D1 to D7, features E1 to E8, features F1 to F8, features G1 to G7, features H1 to H6, features I1 to I14, features J1 to J9, features K1 to K14, features L1 to L11, features M1 to M14, features N1 to N6, features O1 to O10, features P1 to P13, features Q1 to Q11, features R1 to R13, features S1 to S14, features T1 to T11, features U1 to U9, features V1 to V5, features W1 to W7, features X1 to X10, features Y1 to Y13, features Z1 to Z16, features a1 to a11, features b1 to b12, and features c1 to c9. This allows for a synergistic effect to be achieved through the combined configuration.

<Feature Group D>
Feature D1. A main control means (main MPU 72) that controls the progress of the game,
A performance control means (performance side MPU 92) that controls the execution of performance based on the transmission information transmitted by the main control means;
Equipped with
The main control means includes a corresponding transmission means (a function of executing the process of step S614 of the main MPU 72 in the first embodiment) for transmitting corresponding transmission information (a winning result command) including result corresponding information (information on the result of the lottery process for winning roles) corresponding to a predetermined execution result of the game in a predetermined game state (base AT state ST4),
The performance control means
a storage execution means (a function for executing the process of step S1625 of the presentation-side MPU 92 in the first embodiment) for storing predetermined result information corresponding to the predetermined execution results of the plurality of games executed in the predetermined gaming state in a predetermined storage means (a display target remaining number counter 94a) by using the result correspondence information included in the correspondence transmission information;
A predetermined control means (the performance side MPU 92) for controlling the predetermined notification means (the image display device 63) so that a predetermined result notification (a remaining number of awards image G21) corresponding to the predetermined result information stored in the predetermined storage means is executed;
A correction means (a function of executing the processes of steps S1701 to S1703, step S1613 and step S1625 of the performance-side MPU 92 in the first embodiment) that makes it possible to correct the predetermined result information stored in the predetermined storage means by using information included in the trigger transmission information (rotation reception command B) that is different from the corresponding transmission information, based on receiving the trigger transmission information;
A gaming machine characterized by comprising:

According to Feature D1, corresponding transmission information including result correspondence information corresponding to a predetermined execution result of a game in a predetermined gaming state is transmitted from the main control means to the presentation control means, and the presentation control means uses the result correspondence information contained in the corresponding transmission information to store predetermined result information corresponding to the predetermined execution results of multiple games executed in the predetermined gaming state in the predetermined storage means, and executes control so that a predetermined result notification corresponding to the predetermined result information stored in the predetermined storage means is executed by the predetermined notification means. This allows the player to understand the content of the predetermined result information corresponding to the predetermined execution results of multiple games executed in the predetermined gaming state. In this case, based on receiving trigger transmission information, the presentation control means can modify the predetermined result information stored in the predetermined storage means using the information contained in the trigger transmission information. This makes it possible to increase the accuracy of the content of the predetermined result notification executed by the predetermined notification means.

Feature D2. The main control means
An information update means (a function for executing the processing of step S1007 of the main MPU 72 in the first embodiment) for updating the continuation information (information on the remaining number of game media awarded) stored in the continuation information storage means (AT difference number counter 96e) in association with the execution of the game in the predetermined game state to approach the termination corresponding information ("0");
A means for terminating the advantageous game state based on the fact that the continuation information stored in the continuation information storage means has become the termination corresponding information (a function for executing the processing of step S1102 of the main MPU 72 in the first embodiment);
Equipped with
the result-related information is information relating to execution of the game,
A gaming machine described in feature D1, characterized in that the predetermined result information is information corresponding to the continuation information.

According to feature D2, when a situation arises in which game value can be awarded in a predetermined game state, the continuation information is updated to approach the termination information, and when the continuation information becomes the termination information, the predetermined game state ends. Furthermore, control is executed so that a predetermined result notification corresponding to the continuation information is executed by the predetermined notification means, allowing the player to know when the predetermined game state will end by checking the predetermined result notification. In this case, based on receiving the trigger transmission information, the presentation control means can modify the predetermined result information stored in the predetermined storage means using the information contained in the trigger transmission information. This makes it possible to increase the accuracy of the content of the predetermined result notification executed by the predetermined notification means.

Feature D3. The main control means
A means for updating master predetermined result information (information on the remaining number of awarded game media) which corresponds to the predetermined execution results of the plurality of games executed in the predetermined game state and is stored in a master storage means (AT difference number counter 96e) in accordance with the execution results of the games in the predetermined game state (a function for executing the processing of steps S103 to S1009 of the master MPU 72 in the first embodiment);
A trigger transmission means (a function of executing the processes of step S411 and steps S1301 to S1308 of the main MPU 72 in the first embodiment) that transmits the trigger transmission information including the main predetermined result information stored in the main storage means separately from the corresponding transmission information;
A gaming machine according to feature D1 or D2, characterized in that it is equipped with:

According to feature D3, master predetermined result information corresponding to the predetermined execution results of multiple games executed in a predetermined gaming state is grasped by the main control means, and trigger transmission information including the grasped master predetermined result information is transmitted from the main control means. Then, based on receiving the trigger transmission information, the presentation control means can modify the predetermined result information stored in the predetermined storage means using the information included in the trigger transmission information. This makes it possible to match the predetermined result information stored in the predetermined storage means of the presentation control means with the master predetermined result information stored in the main storage means of the main control means, thereby improving the accuracy of the content of the predetermined result notification executed by the predetermined notification means.

Feature D4: The corresponding transmission means transmits the corresponding transmission information when a predetermined transmission trigger (the rotation of all reels 32L, 32M, 32R stops) occurs based on an operation by a player in a game;
A gaming machine described in feature D3, characterized in that the trigger transmission means transmits the trigger transmission information when a specific transmission trigger (start of the game) occurs based on the player's operation in the game.

According to feature D4, corresponding transmission information is transmitted when a predetermined transmission trigger occurs in the game based on player operation, and trigger transmission information is transmitted when a specific transmission trigger occurs in the game based on player operation. This makes it possible to appropriately update the content of the predetermined result notification in the predetermined notification means in accordance with the execution of the game in a predetermined game state, and to appropriately modify the predetermined result information to make the content of the predetermined result notification accurate.

Feature D5. The correction means
A correction determination means (a function of executing the process of step S1701 of the production-side MPU 92 in the first embodiment) for determining whether or not the predetermined result information stored in the predetermined storage means should be corrected by using information included in the trigger transmission information each time the trigger transmission information is received;
When the correction specifying means specifies that the predetermined result information should be corrected, a correction executing means (a function of executing the processes of steps S1613, S1625, S1702, and S1703 of the production-side MPU 92 in the first embodiment) that enables the predetermined result information stored in the predetermined storage means to be corrected using information included in the trigger transmission information;
A gaming machine according to any one of features D1 to D4, characterized in that it is equipped with:

According to feature D5, each time the performance control means receives trigger transmission information, it uses the information contained in the trigger transmission information to determine whether or not the predetermined result information stored in the predetermined storage means should be modified, and if it determines that the predetermined result information should be modified, it is possible to modify the predetermined result information stored in the predetermined storage means using the information contained in the trigger transmission information. This makes it possible to increase the frequency with which the predetermined result information stored in the predetermined storage means is modified.

Feature D6. The correction means is
a means for identifying correction target information, which is information to be corrected for the predetermined result information stored in the predetermined storage means, by utilizing information included in the trigger transmission information based on reception of the trigger transmission information, and storing the identified correction target information in a specific storage means (a non-display target remaining number counter 94b) (a function for executing the process of step S1703 of the performance-side MPU 92 in the first embodiment);
A means for correcting the predetermined result information stored in the predetermined storage means by using the correction target information stored in the specific storage means based on the occurrence of a correction trigger (a function for executing the processes of steps S1613 and S1625 of the performance-side MPU 92 in the first embodiment);
A gaming machine according to any one of features D1 to D5, characterized in that it is equipped with:

According to feature D6, information included in the received trigger transmission information is used to store correction target information, which is information that should be corrected for the specified result information, in a specific storage means, and when a correction trigger occurs, the correction target information stored in the specific storage means is used to correct the specified result information. This makes it possible to correct the specified result information at the appropriate time.

Feature D7. The main control means
An information update means (a function for executing the processing of step S1007 of the main MPU 72 in the first embodiment) for updating the continuation information (information on the remaining number of game media awarded) stored in the continuation information storage means (AT difference number counter 96e) in association with the execution of the game in the predetermined game state to approach the termination corresponding information ("0");
A means for terminating the advantageous game state based on the fact that the continuation information stored in the continuation information storage means has become the termination corresponding information (a function for executing the processing of step S1102 of the main MPU 72 in the first embodiment);
Equipped with
the result-related information is information relating to execution of the game,
the predetermined result information is information corresponding to the continuation information,
The gaming machine described in feature D6 is characterized in that the correction trigger is the information update means executing a process to update the continuation information to move it away from the termination corresponding information (a trigger to add to the remaining number of gaming media to be awarded).

According to feature D7, if correction target information is stored in the specific storage means, the predetermined result information is corrected using the correction target information when continuation information is added. This makes it possible to avoid giving the player a sense of discomfort when correcting the predetermined result information.

In addition, any one or more of the following configurations may be applied to the configurations of features D1 to D7: features A1 to A10, features B1 to B8, features C1 to C6, features D1 to D7, features E1 to E8, features F1 to F8, features G1 to G7, features H1 to H6, features I1 to I14, features J1 to J9, features K1 to K14, features L1 to L11, features M1 to M14, features N1 to N6, features O1 to O10, features P1 to P13, features Q1 to Q11, features R1 to R13, features S1 to S14, features T1 to T11, features U1 to U9, features V1 to V5, features W1 to W7, features X1 to X10, features Y1 to Y13, features Z1 to Z16, features a1 to a11, features b1 to b12, and features c1 to c9. This allows for a synergistic effect to be achieved through the combined configuration.

<Feature Group E>
Feature E1. Advantageous transition means (a function of executing the processing of steps S907 and S908 of the main MPU 72 in the first embodiment) that transitions to an advantageous game state (base AT state ST4, ending AT state ST5) based on the establishment of an advantageous transition condition (a positive determination in step S906);
A presentation control means (a function for executing the processing of steps S1420 and S1421 of the presentation side MPU 92 in the first embodiment) that executes advantageous corresponding presentations (presentations for the AT state including the remaining awarded number image G21, the acquired number image G22, and the number of games played image G23) corresponding to the advantageous game state;
A predetermined updating means (a function for executing the processes of steps S2107 and S2108 of the main MPU 72 in the first embodiment) for updating the termination trigger information stored in the termination trigger storage means (the termination determination counter 98b) as the game is executed to approach the termination occurrence information (the occurrence of a reversal from the maximum value to the minimum value exceeding "65535");
A progress prevention means (a function of executing the processing of step S2110 and steps S2201 to S2204 of the main MPU 72 in the first embodiment) that prevents the progress of the game after the termination trigger information stored in the termination trigger storage means becomes the termination occurrence information;
Equipped with
The gaming machine is characterized in that the presentation control means executes the advantageous corresponding presentation with content corresponding to the termination trigger information.

According to feature E1, by executing an advantageous response effect corresponding to an advantageous gaming state when the player is in an advantageous gaming state, the effect can make the player aware that the game is in an advantageous gaming state. Furthermore, as the game is played, the end trigger information is updated to approach the end occurrence information, and if the end trigger information becomes the end occurrence information, further game progress is blocked. Therefore, if the game continues to be played and a situation arises where the game progress should be blocked, further game progress can be blocked. In this case, an advantageous response effect is executed with content corresponding to the end trigger information. This makes it possible to make the player aware that if the end trigger information approaches the end occurrence information when the game is in an advantageous gaming state, the game progress may be blocked, making it possible to prevent inconveniences such as the player being confused when game progress is suddenly blocked during an advantageous gaming state.

Feature E2. A gaming machine as described in Feature E1, characterized in that the presentation control means includes pre-end notification control means (a function for executing the processing of step S2604 of the presentation-side MPU 92 in the first embodiment) that causes a pre-end notification (display of a pre-end image G33) to be executed as part of the advantageous response presentation based on the end trigger information becoming notification trigger information ("65385") that will be reached before the end occurrence information is reached.

According to feature E2, a pre-end notification is executed as part of the advantageous response effect when the end trigger information becomes notification trigger information that will be reached before the end occurrence information is reached. This makes it possible to make a player who is paying attention to the advantageous response effect aware that a situation is approaching in which the progress of the game will be blocked when the end trigger information reaches the end occurrence information.

Feature E3. A gaming machine according to Feature E2, characterized in that the pre-end notification control means terminates the pre-end notification based on the fact that, while the pre-end notification is being executed, the end trigger information becomes notification cancellation information ("65285"), which is information that is further away from the end occurrence information than the notification trigger information (a function that executes the processing of step S2609 of the presentation-side MPU 92 in the first embodiment).

According to feature E3, if the termination trigger information becomes the notification cancellation information while a pre-termination notification is being executed, the pre-termination notification is terminated. This prevents the pre-termination notification from continuing even in situations where the likelihood of the termination trigger information reaching the termination occurrence information has decreased. Furthermore, by setting the notification cancellation information as information that is farther away from the termination occurrence information than the notification trigger information, it is possible to prevent the pre-termination notification from being repeatedly started and canceled in a short period of time.

Feature E4. A gaming machine as described in Feature E2 or E3, wherein the pre-end notification control means continues the pre-end notification in the game state (normal game state ST1) after the advantageous game state ends when the advantageous game state ends while the pre-end notification is being executed.

According to feature E4, even if the advantageous game state ends while a pre-end notification is being executed, the pre-end notification will continue in the game state after the advantageous game state ends. This makes it possible to execute a pre-end notification regardless of the game state when a situation is approaching in which game progress will be blocked due to the end trigger information reaching the end occurrence information.

Feature E5: A means for ending the advantageous gaming state based on the establishment of a predetermined ending condition (a positive determination in step S1207) in the advantageous gaming state (a function for executing the processing of step S1208 of the main MPU 72 in the first embodiment) is provided,
The presentation control means is provided with a pre-ending notification control means (a function of executing the processing of step S2316 of the presentation side MPU 92 in the first embodiment) that causes a pre-ending notification (display of the pre-ending establishment image G31) to be executed when a predetermined situation occurs in which the establishment of the predetermined ending condition is approaching in the advantageous game state,
A gaming machine according to any one of features E2 to E4, wherein the execution of the pre-end notification is prioritized over the execution of the pre-ending notification.

According to feature E5, the advantageous gaming state is ended when a predetermined ending condition is met, making it possible to prevent the advantageous gaming state from continuing excessively. Furthermore, when a predetermined situation occurs in which the predetermined ending condition is about to be met during the advantageous gaming state, a pre-ending notification is executed, making it possible to make the player aware that the predetermined ending condition is about to be met. In this case, the execution of the pre-end notification takes priority over the execution of the pre-ending notification. This makes it possible to focus on notifying the player that a situation in which game progress will be blocked is approaching, rather than that the predetermined ending condition is about to be met.

Feature E6. The gaming machine described in Feature E5, wherein the pre-ending notification control means is configured to execute the pre-ending notification in the specified situation after an event occurs that terminates the pre-ending notification when the execution of the pre-ending notification is prioritized and the pre-ending notification has not been executed even in the specified situation.

According to feature E6, if the pre-ending notification is terminated in a situation where the pre-ending notification has not been executed even in a predetermined situation because the execution of the pre-ending notification is prioritized, the pre-ending notification will be executed in a predetermined situation thereafter. This makes it possible to ensure the execution of the pre-ending notification when the pre-ending notification has not been executed, even in a configuration where the execution of the pre-ending notification is prioritized over the execution of the pre-ending notification.

Feature E7: A means (a function of executing the process of step S504 of the main MPU 72 in the first embodiment) for transitioning to a second situation (second section SC2) based on the establishment of a situation transition condition (a positive determination in step S503) in the first situation (first section SC1);
A situation ending means (a function of executing the process of step S1208 of the main MPU 72 in the first embodiment) that ends the second situation based on the establishment of the predetermined ending condition (a positive determination in step S1207) in the second situation;
Equipped with
The gaming machine described in feature E5 or E6, wherein the advantageous transition means transitions to the advantageous gaming state based on the establishment of an advantageous transition condition in the second situation.

Feature E7 makes it possible to achieve an advantageous gaming state within the scope of the second situation, so that the player will play while paying attention not only to the advantageous gaming state but also to the second situation.

Feature E8. A gaming machine described in any one of Features E1 to E7, characterized in that it is equipped with a means for initializing the termination trigger information in the termination trigger storage means based on the start of the supply of operating power (a function for executing the processing of step S808 of the main MPU 72 in the first embodiment).

Feature E8 allows the termination trigger information to be initialized based on the start of the supply of operating power, thereby improving the workability of initializing the termination trigger information.

In addition, the configurations of features E1 to E8 may be configured with any one or more of features A1 to A10, features B1 to B8, features C1 to C6, features D1 to D7, features E1 to E8, features F1 to F8, features G1 to G7, features H1 to H6, features I1 to I14, features J1 to J9, features K1 to K14, features L1 to L11, features M1 to M14, features N1 to N6, features O1 to O10, features P1 to P13, features Q1 to Q11, features R1 to R13, features S1 to S14, features T1 to T11, features U1 to U9, features V1 to V5, features W1 to W7, features X1 to X10, features Y1 to Y13, features Z1 to Z16, features a1 to a11, features b1 to b12, and features c1 to c9. This allows for a synergistic effect to be achieved through the combined configuration.

The inventions of Feature Group C, Feature Group D, and Feature Group E above can solve the following problems:

Pachinko machines and slot machines are well-known gaming machines. For example, pachinko machines are equipped with a storage section for storing gaming balls. The gaming balls stored in the storage section are guided to a gaming ball launcher and launched toward the gaming area in response to the player's launch operation. When a gaming ball enters a ball entry section provided in the gaming area, for example, a lottery process is executed, or a process is executed to increase the number of gaming balls available to the player.

In a slot machine, when a game value such as medals has been bet and the start lever is operated to start a new game, a lottery process is executed by the control means. Furthermore, when the lottery process is executed, the control means executes rotation start control, causing the reels to start spinning. If the stop button is operated while the reels are spinning, the control means executes rotation stop control, causing the reels to stop spinning. If the result after the reels have stopped spinning corresponds to a winning combination in the lottery process, a bonus corresponding to that winning combination is awarded to the player.

Here, in gaming machines such as those exemplified above, it is necessary to appropriately control the execution of notifications, and there is still room for improvement in this regard.

<Feature Group F>
Feature F1. A means (a function of executing the process of step S504 of the main MPU 72 in the first embodiment) for transitioning to a second situation (second section SC2) based on the establishment of a situation transition condition (a positive determination in step S503) in the first situation (first section SC1);
A situation ending means (a function of executing the process of step S1208 of the main MPU 72 in the first embodiment) that ends the second situation based on the establishment of a predetermined ending condition (a positive determination in step S1207) in the second situation;
A means for transitioning to a first advantageous gaming state (base AT state ST4) based on the establishment of an advantageous transition condition (a positive determination in step S906) in the second situation (a function for executing the processing of steps S907 and S908 of the main MPU 72 in the first embodiment);
An information update means (a function for executing the processing of step S1007 of the main MPU 72 in the first embodiment) for updating the continuation information (information on the remaining number of game media awarded) stored in the continuation information storage means (AT difference number counter 96e) in association with the execution of the game in the first advantageous game state to approach the termination corresponding information ("0");
A means for terminating the first advantageous game state based on the fact that the continuation information stored in the continuation information storage means has become the termination corresponding information (a function for executing the processing of step S1102 of the main MPU 72 in the first embodiment);
A means for transitioning to a second advantageous gaming state (ending AT state ST5) based on the establishment of a predetermined transition condition (a positive determination in step S1103 or step S1104) as a result of multiple games being executed in the first advantageous gaming state (a function for executing the processing of step S1105 of the main MPU 72 in the first embodiment);
The continuation information does not affect the timing of ending the second advantageous game state, and when the predetermined ending condition is met, means for ending the second advantageous game state (a function for executing the processing of step S1208 of the main MPU 72 in the first embodiment);
A gaming machine characterized by comprising:

According to feature F1, a transition to the first advantageous gaming state occurs when the advantageous transition condition is met in the second state. Therefore, the player expects that the transition condition will be met in the first state and that a transition to the second state will occur, and that the advantageous transition condition will be met in the second state and that a transition to the first advantageous gaming state will occur. Furthermore, since the first advantageous gaming state ends when the continuation information becomes end-corresponding information in the first advantageous gaming state, the player expects the continuation information to be far from end-corresponding information. Furthermore, since the second state ends when a predetermined ending condition is met in the second state, it is possible to prevent the second state from continuing excessively. In this case, as a result of multiple games being played in the first advantageous gaming state, the gaming state transitions to the second advantageous gaming state when the predetermined transition condition is met. Furthermore, the continuation information does not affect the trigger for ending the second advantageous gaming state, and the second advantageous gaming state ends when the predetermined ending condition of the second state is met. As a result, if the first advantageous gaming state continues and the specified transition condition is met, the gaming state advantageous to the player will continue until the specified ending condition for the second situation is met, making it possible for the player to look forward to the specified transition condition being met in the first advantageous gaming state. This makes it possible to increase the player's interest in the game.

Feature F2. A gaming machine according to Feature F1, wherein the information updating means updates the continuation information to bring it closer to the termination information when a predetermined combination (index value IV = 1 to 13) is won in the combination lottery process, when a predetermined win corresponding to the predetermined combination is achieved, or when the predetermined win is not achieved.

According to feature F2, when a winning combination corresponding to the awarding of game value is achieved in the first advantageous gaming state, the continuation information is updated to approach the end-corresponding information, and when the continuation information becomes the end-corresponding information, the first advantageous gaming state ends. In this case, if a predetermined combination is won in the combination lottery process, the continuation information is updated to approach the end-corresponding information, regardless of whether the predetermined combination is achieved or not. This makes it possible to update the continuation information to approach the end-corresponding information when a predetermined combination is won in the first advantageous gaming state, regardless of whether the predetermined combination is achieved or not, making it impossible for the player to delay the end of the first advantageous gaming state by deliberately not achieving the predetermined combination through their operations.

Feature F3: An ending-side updating means (a function of executing the processes of steps S1204 to S1206 of the main MPU 72 in the first embodiment) is provided, which updates the predetermined ending target information stored in the ending-corresponding storage means (total winning number counter 96d) to approach the ending establishment information ("65521") when a game value is awarded to the player in the second situation,
the predetermined ending condition is established when the predetermined ending target information stored in the ending correspondence storage means becomes the ending establishment information,
The gaming machine described in feature F2 is characterized in that, when the predetermined role is won in the role lottery process, if the predetermined winning corresponding to the predetermined role is achieved, the ending side update means updates the predetermined ending target information to bring it closer to the ending achievement information, but if the predetermined winning corresponding to the predetermined role is not achieved, the gaming machine does not update the predetermined ending target information to bring it closer to the ending achievement information.

According to feature F3, when a winning combination corresponding to the awarding of game value is achieved in the second situation, the predetermined ending target information is updated to approach the ending achievement information, and when the predetermined ending target information becomes the ending achievement information, the second situation and the second advantageous game state end. In this case, if a predetermined combination is won in the combination lottery process and a predetermined winning combination is achieved, the predetermined ending target information is updated to approach the ending achievement information, whereas if the predetermined winning combination is not achieved, the predetermined ending target information is not updated to approach the ending achievement information. This makes it possible to prevent the second situation and the second advantageous game state from ending when the player has not been awarded the predetermined game value.

Feature F4. A gaming machine as described in Feature F3, characterized in that it is equipped with a means (a function for executing the processing of steps S1614 to S1616 of the presentation-side MPU 92 in the first embodiment) for making a predetermined final notification (LAST display) in a game that may be the final game of the first advantageous gaming state, so that the player can recognize that this is the final game, and for preventing the predetermined final notification from being made in a game that may be the final game of the second advantageous gaming state.

According to feature F4, a predetermined final notification is made in the final game of the first advantageous gaming state to allow the player to recognize that this is the final game, but no predetermined final notification is made in the final game of the second advantageous gaming state. In the first advantageous gaming state, if a predetermined role is won in the lottery process for a game that could be the final game, the first advantageous gaming state ends in that game regardless of whether a predetermined win is achieved. Therefore, by making a predetermined final notification in that game, it is possible to clearly allow the player to recognize that this is the final game of the first advantageous gaming state. On the other hand, in the second advantageous gaming state, even if a predetermined role is won in the lottery process for a game that could be the final game, the second advantageous gaming state does not end in that game unless a predetermined win is achieved. Therefore, by not making a predetermined final notification in that game, it is possible to prevent the player from becoming confused because the second advantageous gaming state does not end despite the predetermined final notification being made.

Feature F5. A means for executing an add-on process (step S1003) for updating the continuation information to move away from the end corresponding information based on the occurrence of an add-on trigger in the first advantageous gaming state (a function for executing the process of step S1003 of the main MPU 72 in the first embodiment),
A gaming machine described in any one of features F1 to F4, characterized in that the additional processing is not executed in the second advantageous gaming state.

According to feature F5, in the first advantageous gaming state, an add-on process is executed to update the continuation information away from the termination information based on the occurrence of an add-on trigger, so that in the first advantageous gaming state the player plays in the hope that an add-on trigger will occur. On the other hand, in the second advantageous gaming state, the add-on process is not executed, making it possible to simplify the processing configuration in the second advantageous gaming state.

Feature F6. A gaming machine described in any one of Features F1 to F5, wherein the predetermined transition condition is a condition that is met even when the continuation information in the first advantageous gaming state does not constitute information that allows the predetermined ending condition to be met.

According to feature F6, even if the continuation information in the first advantageous gaming state does not provide information that allows the specified ending condition of the second situation to be met, the specified transition condition is met and the game transitions to the second advantageous gaming state. The second advantageous gaming state then continues until the specified ending condition of the second situation is met. This allows the player to play in the first advantageous gaming state while hoping that the specified transition condition will be met.

Feature F7: An ending-side updating means (a function of executing the processes of steps S1204 to S1206 of the main MPU 72 in the first embodiment) is provided, which updates the predetermined ending target information stored in the ending-corresponding storage means (total winning number counter 96d) to approach the ending achievement information ("65521") when a game value is awarded to the player in the second situation,
the predetermined ending condition is established when the predetermined ending target information stored in the ending correspondence storage means becomes the ending establishment information,
A gaming machine described in any one of features F1 to F6, characterized in that the specified transition condition is met based on the specified ending target information stored in the ending corresponding memory means becoming pre-establishment information ("65321") corresponding to information in which the game value granted to the player is less than the ending establishment information.

According to feature F7, when play is performed in the first advantageous game state, the predetermined transition condition is met based on the predetermined ending target information becoming pre-establishment information corresponding to information in which the game value awarded to the player is less than the ending establishment information, and the second advantageous game state is entered. The second advantageous game state then continues until the predetermined ending target information becomes ending establishment information. As a result, the player plays in the first advantageous game state in the hope that the predetermined ending target information will reach the pre-establishment information.

Feature F8. A means for notifying information corresponding to the continuation information in the first advantageous gaming state (a function for executing the processing of steps S1613 and S1625 of the presentation side MPU 92 in the first embodiment) is provided,
A gaming machine described in any one of features F1 to F7, characterized in that information regarding the execution of the game required until the specified ending condition is met is not announced in the second advantageous gaming state.

According to feature F8, in the first advantageous gaming state, information corresponding to the continuation information is notified, allowing the player to understand when the first advantageous gaming state will end. On the other hand, in the second advantageous gaming state, information regarding the game execution required until the specified ending condition is met is not notified, allowing the player to expect the second advantageous gaming state to continue for a long time.

In addition, the configurations of features F1 to F8 may be configured with any one or more of features A1 to A10, features B1 to B8, features C1 to C6, features D1 to D7, features E1 to E8, features F1 to F8, features G1 to G7, features H1 to H6, features I1 to I14, features J1 to J9, features K1 to K14, features L1 to L11, features M1 to M14, features N1 to N6, features O1 to O10, features P1 to P13, features Q1 to Q11, features R1 to R13, features S1 to S14, features T1 to T11, features U1 to U9, features V1 to V5, features W1 to W7, features X1 to X10, features Y1 to Y13, features Z1 to Z16, features a1 to a11, features b1 to b12, and features c1 to c9. This allows for a synergistic effect to be achieved through the combined configuration.

The inventions of Feature Group F above can solve the following problems:

Pachinko machines and slot machines are well-known gaming machines. For example, pachinko machines are equipped with a storage section for storing gaming balls. The gaming balls stored in the storage section are guided to a gaming ball launcher and launched toward the gaming area in response to the player's launch operation. Then, for example, when a gaming ball enters a ball entry section provided in the gaming area, a lottery process is executed, or a process is executed to increase the number of gaming balls available to the player.

In a slot machine, when a game value such as medals has been bet and the start lever is operated to start a new game, a lottery process is executed by the control means. Furthermore, when the lottery process is executed, the control means executes rotation start control, causing the reels to start spinning. If the stop button is operated while the reels are spinning, the control means executes rotation stop control, causing the reels to stop spinning. If the result after the reels have stopped spinning corresponds to a winning combination in the lottery process, a bonus corresponding to that winning combination is awarded to the player.

Here, gaming machines such as those exemplified above need to be designed to enhance the enjoyment of the game, and there is still room for improvement in this regard.

<Feature Group G>
Feature G1. The device is equipped with a control means (main MPU 72) that executes various processes including predetermined progress processes (steps S302 to S310) for progressing the game, and temporarily stores information in a predetermined internal storage means (register) when executing the processes;
The control means
an intra-area processing execution means (a function of executing the intra-area processing of the main MPU 72 in the first embodiment) that executes intra-area processing, which is processing that utilizes a program (a program for intra-area processing) stored in a storage area (a storage area from address X(1) to address X(k+2)) in a predetermined address range in a program storage means (main ROM 73);
an out-of-area processing execution means (a function of executing the out-of-area processing of the main MPU 72 in the first embodiment) that executes out-of-area processing, which is processing that utilizes a program (a program for out-of-area processing) stored in a storage area (a storage area from address X(m+6) to address X(n+2)) in an address range outside the predetermined address range in the program storage means;
a save execution means for saving information stored in the predetermined internal storage means to a save storage means (a stack area 97 for in-area processing, a work area 98 for out-area processing) when or after the out-area processing is started (a function for executing the CALLI command of steps S102, S107, and S311 of the main MPU 72 in the first embodiment, a function for executing the processes of steps S1801 to S1807, a function for executing the processes of steps S1901 to S1907, and a function for executing the processes of steps S2001 to S2007);
A restore execution means for restoring the information saved in the save storage means to the predetermined internal storage means when or after the out-of-area processing is completed (a function for executing the RETI command of the main MPU 72 in the first embodiment, a function for executing the processing of steps S1809 to S1815, a function for executing the processing of steps S1910 to S1916, and a function for executing the processing of steps S2009 to S2015);
a predetermined update means (a function for executing the processes of steps S2107 and S2108 of the main MPU 72 in the first embodiment) for executing a predetermined update process for updating the termination trigger information stored in the termination trigger storage means (the termination determination counter 98b) as the game is executed to approach the termination occurrence information (the occurrence of a reversal from the maximum value to the minimum value exceeding "65535");
A progress prevention means (a function of executing the processing of step S2110 and steps S2201 to S2204 of the main MPU 72 in the first embodiment) that executes a progress prevention process to prevent the subsequent progress of the game based on the fact that the end trigger information stored in the end trigger storage means has become the end occurrence information;
Equipped with
A gaming machine characterized in that the specified update processing is included in the outside area processing.

According to feature G1, the various processes executed by the control means are divided into in-area processes and out-area processes. When or after out-area processes are started from a situation where in-area processes are being executed, information stored in the specified internal storage means of the control means is saved to the save storage means. When or after the out-area processes are terminated, the information saved to the save storage means is restored to the specified internal storage means. This makes it possible to prevent information stored in the specified internal storage means when in-area processes are being executed from being overwritten when out-area processes are being executed. Furthermore, as the game is executed, the end trigger information is updated to approach end occurrence information. If the end trigger information becomes end occurrence information, further game progress is blocked. Therefore, if the game continues to be executed and a situation arises where game progress should be blocked, further game progress can be blocked. In this case, the specified update process for updating the end trigger information is included in the out-area processes. This makes it possible to execute the specified update process without increasing the program capacity required for in-area processes.

Feature G2. The gaming machine described in Feature G1, wherein the progress prevention processing is included in the in-area processing.

According to feature G2, the progress prevention process for preventing further game progress when the end trigger information becomes end occurrence information is included in the in-area processing rather than the out-area processing. This makes it possible to consolidate the processing related to game progress into the in-area processing.

Feature G3. A gaming machine according to Feature G1 or G2, characterized in that it is equipped with a means for executing a predetermined initialization process to initialize the termination trigger information in the termination trigger storage means upon the start of the supply of operating power (a function for executing the process of step S808 of the main MPU 72 in the first embodiment).

Feature G3 allows the termination trigger information to be initialized based on the start of the supply of operating power, thereby improving the workability of initializing the termination trigger information.

Feature G4. The gaming machine described in Feature G3, wherein the initialization process is included in the out-of-area process.

According to Feature G4, in a configuration in which the specified update process for updating the termination trigger information is included in the out-of-domain processing, the initialization process for initializing the termination trigger information is also included in the out-of-domain processing. This makes it possible to consolidate the processing for changing the contents of the termination trigger information into the out-of-domain processing.

Feature G5: A means (a function of executing the process of step S2110 of the main MPU 72 in the first embodiment) for storing progress prevention information ("1") in a progress prevention storage means (a termination flag 98c) when the termination trigger information stored in the termination trigger storage means becomes the termination occurrence information,
The progress blocking means blocks the progress of the game when the progress blocking information is stored in the progress blocking storage means,
A gaming machine described in feature G3 or G4, characterized in that the state in which the progress prevention information is stored in the progress prevention storage means is not canceled during the specified initialization process.

According to feature G5, when the termination trigger information becomes termination occurrence information, the progress blocking information is stored in the progress blocking storage means, and when progress blocking information is stored in the progress blocking storage means, subsequent game progress is blocked, making it easier to identify whether or not a situation exists in which game progress should be blocked. In this case, the state in which the progress blocking information has been stored in the progress blocking storage means is not canceled by the predetermined initialization process executed when the supply of operating power is started. This makes it possible to prevent the blocked game progress from being canceled simply by starting the supply of operating power again.

Feature G6: A means for executing a specific operation response process (step S108) based on a specific operation (turning on the setting key in the setting key insertion hole 57) being performed when the supply of operating power is started (a function for executing the process of step S108 of the main MPU 72 in the first embodiment) is provided;
A gaming machine described in feature G5, characterized in that when the specific operation corresponding processing is executed, the state in which the progress prevention information is stored in the progress prevention memory means is canceled (a function that executes the processing of step S1909 of the main MPU 72 in the first embodiment).

According to Feature G6, in a configuration in which a specific operation response process is executed based on the fact that a specific operation is being performed when the supply of operating power is started, the state in which progress blockage information is stored in the progress blockage storage means is canceled when the specific operation response process is executed. This makes it possible to ensure that the state in which game progress is blocked is not canceled simply by starting the supply of operating power again, while the state in which game progress is blocked is canceled when the specific operation response process is executed based on the fact that a specific operation is being performed when the supply of operating power is started.

Feature G7. In the advantageous game state, the continuation information (information on the remaining number of game media) stored in the continuation information storage means (AT difference number counter 96e) is updated to approach the end corresponding information ("0") by performing a specific update process (a function for executing the process of step S1007 of the main MPU 72 in the first embodiment),
A means for terminating the first advantageous game state based on the fact that the continuation information stored in the continuation information storage means has become the termination corresponding information (a function for executing the processing of step S1102 of the main MPU 72 in the first embodiment);
Equipped with
A gaming machine described in any one of features G1 to G6, characterized in that the specific update process is included in the in-area process.

According to feature G7, when a game is in an advantageous gaming state, the advantageous gaming state ends when the continuation information becomes end-corresponding information, so the player expects the continuation information to be far from the end-corresponding information. In this case, the specific update process for updating the continuation information to bring it closer to the end-corresponding information is included in the intra-area processing. This makes it possible to consolidate the processing related to the transition of the gaming state into the intra-area processing.

In addition, the configurations of features G1 to G7 may be configured with any one or more of features A1 to A10, features B1 to B8, features C1 to C6, features D1 to D7, features E1 to E8, features F1 to F8, features G1 to G7, features H1 to H6, features I1 to I14, features J1 to J9, features K1 to K14, features L1 to L11, features M1 to M14, features N1 to N6, features O1 to O10, features P1 to P13, features Q1 to Q11, features R1 to R13, features S1 to S14, features T1 to T11, features U1 to U9, features V1 to V5, features W1 to W7, features X1 to X10, features Y1 to Y13, features Z1 to Z16, features a1 to a11, features b1 to b12, and features c1 to c9. This allows for a synergistic effect to be achieved through the combined configuration.

The inventions in Feature Group G above can solve the following problems:

Pachinko machines and slot machines are well-known gaming machines. For example, pachinko machines are equipped with a storage section for storing gaming balls. The gaming balls stored in the storage section are guided to a gaming ball launcher and launched toward the gaming area in response to the player's launch operation. Then, for example, when a gaming ball enters a ball entry section provided in the gaming area, a lottery process is executed, or a process is executed to increase the number of gaming balls available to the player.

In a slot machine, when a game value such as medals has been bet and the start lever is operated to start a new game, a lottery process is executed by the control means. Furthermore, when the lottery process is executed, the control means executes rotation start control, causing the reels to start spinning. If the stop button is operated while the reels are spinning, the control means executes rotation stop control, causing the reels to stop spinning. If the result after the reels have stopped spinning corresponds to a winning combination in the lottery process, a bonus corresponding to that winning combination is awarded to the player.

Here, in gaming machines such as those exemplified above, it is necessary to ensure that processing using programs is executed appropriately, and there is still room for improvement in this regard.

<Feature H group>
Feature H1. A value correspondence storage means (AT acquisition number counter 94c in the fourth embodiment) that stores value correspondence information that can change depending on the game value granted to the player by executing the game in the advantageous game state (base AT state ST4, ending AT state ST5),
A standard correspondence notification control means (a function for executing the process of step S2703 of the performance side MPU 92 in the fourth embodiment) for executing a standard correspondence notification (standard reaching image G41) based on the value correspondence information becoming standard correspondence information (information on the standard number of coins) corresponding to a predetermined standard game value;
Equipped with
The gaming machine is characterized in that the standard correspondence notification control means is equipped with a notification restriction means (a function that executes the processing of step S2701 of the presentation side MPU 92 in the fourth embodiment) that prevents the standard correspondence notification from being executed even if the value correspondence information becomes the standard correspondence information in the final game of the advantageous gaming state.

According to feature H1, value correspondence information that can change depending on the game value awarded to a player as a result of a game being played in an advantageous game state is stored, and a reference correspondence notification is executed when the stored value correspondence information becomes reference correspondence information that corresponds to a predetermined reference game value, allowing the player to understand that the predetermined reference game value has been awarded. In this case, even if the value correspondence information becomes reference correspondence information in the final game of the advantageous game state, the reference correspondence notification is not executed. This prevents a player who sees the reference correspondence notification even though it is the final game of the advantageous game state from mistakenly believing that the advantageous game state is continuing.

Feature H2. The gaming machine described in Feature H1, wherein the reference correspondence notification control means executes the reference correspondence notification in a game in which the value correspondence information becomes the reference correspondence information.

According to feature H2, the reference correspondence notification is executed in the game in which the value correspondence information becomes the reference correspondence information, making it easier for the player to recognize in which game the value correspondence information becomes the reference correspondence information.

Feature H3: A predetermined update means (a function for executing the processes of steps S2107 and S2108 of the main MPU 72 in the first embodiment) for updating the end trigger information stored in the end trigger storage means (end determination counter 98b) as the game is executed to approach the end occurrence information (exceeding "65535" and causing a reversal from the maximum value to the minimum value);
A progress prevention means (a function of executing the processing of step S2110 and steps S2201 to S2204 of the main MPU 72 in the first embodiment) that prevents the progress of the game after the termination trigger information stored in the termination trigger storage means becomes the termination occurrence information;
Equipped with
The gaming machine described in feature H1 or H2 is characterized in that, when the termination trigger information becomes the termination occurrence information, the progress prevention means prevents further progress of the game even if it is the final game of the advantageous gaming state.

According to feature H3, as the game is played, the end trigger information is updated to approach the end occurrence information, and if the end trigger information becomes the end occurrence information, subsequent game progress is blocked. Therefore, if the game continues to be played and a situation arises where the game progress should be blocked, further game progress can be blocked. In this case, if the end trigger information becomes the end occurrence information, subsequent game progress is blocked even if it is the final game of an advantageous game state. This makes it possible to block game progress when the end trigger information becomes the end occurrence information, regardless of whether it is the final game of an advantageous game state.

Feature H4: A pre-end notification control means (a function for executing the processing of step S2604 of the production-side MPU 92 in the first embodiment) is provided, which causes a pre-end notification (display of a pre-end image G33) to be executed based on the fact that the end trigger information has become notification trigger information ("65385") that will be reached before the end occurrence information is reached,
The gaming machine described in feature H3 is characterized in that the pre-end notification control means executes the pre-end notification even in the final game of the advantageous gaming state when the pre-end trigger information becomes the notification trigger information.

According to feature H4, a pre-end notification is executed when the end trigger information becomes notification trigger information, which is reached before the end occurrence information is reached. This makes it possible to make the player aware that a situation is approaching in which game progress will be blocked when the end trigger information reaches the end occurrence information. In this case, if the end trigger information becomes notification trigger information, a pre-end notification is executed even if it is the final game of an advantageous game state. This makes it possible to make the player aware that a situation is approaching in which game progress will be blocked when the end trigger information reaches the end occurrence information, regardless of whether it is the final game of an advantageous game state.

Feature H5. A gaming machine according to Feature H4, wherein the pre-end notification control means terminates the pre-end notification based on the fact that, while the pre-end notification is being executed, the end trigger information has become notification cancellation information ("65285"), which is information that is further away from the end occurrence information than the notification trigger information (a function that executes the processing of step S2609 of the presentation-side MPU 92 in the first embodiment).

According to feature H5, if the termination trigger information becomes the notification cancellation information while a pre-termination notification is being executed, the pre-termination notification is terminated. This prevents the pre-termination notification from continuing even in situations where the likelihood of the termination trigger information reaching the termination occurrence information has decreased. Furthermore, by setting the notification cancellation information as information that is farther away from the termination occurrence information than the notification trigger information, it is possible to prevent the pre-termination notification from being repeatedly started and canceled in a short period of time.

Feature H6. A gaming machine as described in Feature H4 or H5, wherein the pre-end notification control means continues the pre-end notification in the game state after the advantageous game state ends (normal game state ST1) when the advantageous game state ends while the pre-end notification is being executed.

According to feature H6, even if the advantageous game state ends while a pre-end notification is being executed, the pre-end notification will continue in the game state after the advantageous game state ends. This makes it possible to execute a pre-end notification regardless of the game state when a situation is approaching in which game progress will be blocked due to the end trigger information reaching the end occurrence information.

In addition, the configurations of features H1 to H6 may be configured with any one or more of features A1 to A10, features B1 to B8, features C1 to C6, features D1 to D7, features E1 to E8, features F1 to F8, features G1 to G7, features H1 to H6, features I1 to I14, features J1 to J9, features K1 to K14, features L1 to L11, features M1 to M14, features N1 to N6, features O1 to O10, features P1 to P13, features Q1 to Q11, features R1 to R13, features S1 to S14, features T1 to T11, features U1 to U9, features V1 to V5, features W1 to W7, features X1 to X10, features Y1 to Y13, features Z1 to Z16, features a1 to a11, features b1 to b12, and features c1 to c9. This allows for a synergistic effect to be achieved through the combined configuration.

Each invention in Feature Group H above can solve the following problems:

Pachinko machines and slot machines are well-known gaming machines. For example, pachinko machines are equipped with a storage section for storing gaming balls. The gaming balls stored in the storage section are guided to a gaming ball launcher and launched toward the gaming area in response to the player's launch operation. Then, for example, when a gaming ball enters a ball entry section provided in the gaming area, a lottery process is executed, or a process is executed to increase the number of gaming balls available to the player.

In a slot machine, when a game value such as medals has been bet and the start lever is operated to start a new game, a lottery process is executed by the control means. Furthermore, when the lottery process is executed, the control means executes rotation start control, causing the reels to start spinning. If the stop button is operated while the reels are spinning, the control means executes rotation stop control, causing the reels to stop spinning. If the result after the reels have stopped spinning corresponds to a winning combination in the lottery process, a bonus corresponding to that winning combination is awarded to the player.

Here, in gaming machines such as those exemplified above, it is necessary to appropriately control the execution of notifications, and there is still room for improvement in this regard.

<Feature Group I>
Feature I1. A numerical information storage means (index value counter 74a) in which one of a plurality of pieces of numerical information ("0" to "20" in the fifth to seventh embodiments) is set;
a numerical information setting means (a function for executing the processing of steps S2806 to S2807 of the main MPU 72 in the fifth and sixth embodiments, and a function for executing the processing of steps S4506 and S4509 to S4513 of the main MPU 72 in the seventh embodiment) for setting predetermined target numerical information (an index value IV of any one of "1" to "12") corresponding one-to-one to the predetermined target event that has occurred based on the occurrence of one of a plurality of predetermined target events (winning any odd index value IV included in the numerical range of "1" to "12" in the lottery processing of the winning combination in the fifth to seventh embodiments, or winning any even index value IV included in the numerical range of "1" to "12");
Equipped with
The predetermined target numerical information is all numerical information (any of numerical information "1", "3", "5", "7", "9", and "11", or any of numerical information "2", "4", "6", "8", "10", and "12") included in a predetermined arithmetic progression (an arithmetic progression in which each term is odd and the common difference is "2" in the fifth to seventh embodiments, or an arithmetic progression in which each term is even and the common difference is "2");
The gaming machine performs a predetermined target event response process (the process of step S3516 of the master MPU 72 in the fifth embodiment, the process of steps S4003 to S4011 of the master MPU 72, the process of steps S4012 to S4020, the process of step S4103, the process of step S4104 of the master MPU 72 in the sixth embodiment) corresponding to the occurrence of any of the predetermined target events, based on the fact that the numerical information set in the numerical information storage means is any of the numerical information included in the predetermined arithmetic progression. a function to execute the processing of step S4003 to step S4406 by the main MPU 72 in the sixth embodiment, a function to execute the processing of step S3516 by the main MPU 72 in the fifth embodiment, a function to execute the processing of steps S4003 to S4020 by the main MPU 72, a function to execute the processing of steps S4103 and S4104 by the main MPU 72, and a function to execute the processing of steps S4403 to S4406 by the main MPU 72 in the sixth embodiment).

According to Feature I1, predetermined target numerical information that corresponds one-to-one to an occurring predetermined target event among a plurality of predetermined target events is set in the numerical information storage means, making it possible to identify the type of predetermined target event that has occurred based on the predetermined target numerical information set in the numerical information storage means.

In a configuration in which multiple predetermined target events exist, the predetermined target event response process is executed based on whether the numerical information set in the numerical information storage means is any of the numerical information included in a predetermined arithmetic progression. Therefore, compared to a configuration in which a determination process is executed for each of multiple predetermined target events to determine whether numerical information corresponding to that predetermined target event is set in the numerical information storage means and the predetermined target event response process is executed based on a positive determination in one of these determination processes, the number of determination processes required to identify the occurrence of any predetermined target event can be reduced. This simplifies the processing configuration for the process that executes the predetermined target event response process based on the occurrence of any predetermined target event, and reduces the data volume required to store the program corresponding to that process.

Feature I2. All of the numerical information included in the predetermined arithmetic progression is specific numerical information that is either an odd number or an even number (either an odd number or an even number in the fifth to seventh embodiments),
The gaming machine described in Feature I1 is characterized in that the specified target event response means is equipped with specific response means (a function for executing the processing of step S3516 of the main MPU 72 in the fifth embodiment, a function for executing the processing of steps S4003 to S4020 of the main MPU 72, a function for executing the processing of steps S4103 and S4104 of the main MPU 72, and a function for executing the processing of steps S4403 to S4406 of the main MPU 72 in the sixth embodiment) that executes the specified target event response processing based on the fact that the numerical information set in the numerical information storage means is any of the specific numerical information.

According to Feature I2, in a configuration in which all the numerical information contained in the predetermined arithmetic progression is odd numbers, the predetermined target event response process can be executed based on the numerical information set in the numerical information storage means being any odd number. This allows for a configuration in which any even-numbered numerical information can be set in the numerical information storage means based on the occurrence of an event other than the predetermined target event, while simplifying the processing configuration for executing the predetermined target event response process based on the occurrence of any predetermined target event. Furthermore, in a configuration in which all the numerical information contained in the predetermined arithmetic progression is even numbers, the predetermined target event response process can be executed based on the numerical information set in the numerical information storage means being any even number. This allows for a configuration in which any odd-numbered numerical information can be set in the numerical information storage means based on the occurrence of an event other than the predetermined target event, while simplifying the processing configuration for executing the predetermined target event response process based on the occurrence of any predetermined target event.

Feature I3. The specific numerical information is numerical information in which the value of the least significant bit (bit 0) among the multiple bits (bits 0 to 7) of the specific numerical information is a predetermined value (the value of “1” or “0”),
The specific response means is:
a predetermined determination means (a function for executing the process of step S3515 of the main MPU 72 in the fifth embodiment, a function for executing the process of step S4002 of the main MPU 72, a function for executing the process of step S4102 of the main MPU 72, and a function for executing the process of step S4402 of the main MPU 72 in the sixth embodiment) that uses the numerical information set in the numerical information storage means;
means for executing the predetermined target event response process based on a determination result (a determination result indicating that a positive determination is made, a determination result indicating that a negative determination is made) corresponding to the value of the least significant bit in the numerical information set in the numerical information storage means being the predetermined value in the predetermined determination process (a function for executing the process of step S3516 of the main MPU 72 in the fifth embodiment, a function for executing the processes of steps S4003 to S4011 and steps S4012 to S4020 of the main MPU 72, a function for executing the process of step S4103 and step S4104 of the main MPU 72, a function for executing the process of step S4403 and steps S4404 to S4406 of the main MPU 72 in the sixth embodiment);
The gaming machine described in feature I2 is characterized by comprising:

According to Feature I3, by configuring the predetermined determination process to execute a predetermined target event response process based on a determination result that corresponds to the value of the least significant bit of the numerical information set in the numerical information storage means being a predetermined value, the amount of processing required to determine whether the numerical information set in the numerical information storage means is an odd number or an even number can be reduced compared to a configuration in which the predetermined determination process executes a determination process that determines whether the remainder when the numerical information set in the numerical information storage means is divided by 2 is 1 or whether the remainder is 0. This simplifies the processing configuration for executing a predetermined target event response process based on the numerical information set in the numerical information storage means being any specific numerical information, and reduces the data volume required to store a program corresponding to either of these processes.

Feature I4. Based on the occurrence of one of a plurality of target events including the predetermined target event (winning one of index values IV = 1 to 20 in the lottery process for winning a role), numerical information (winning index value IV) corresponding one-to-one to the target event that has occurred is set in the numerical information storage means by the numerical information setting means,
The target events include a plurality of first target events (in the fifth to seventh embodiments, winning an index value IV = 1 to 4 in which any bell winning data is set and which can be used to establish a win by making the first stop the left reel 32L, winning an index value IV = 5 to 8 in which any bell winning data is set and which can be used to establish a win by making the first stop the center reel 32M, and winning an index value IV = 9 to 12 in which any bell winning data is set and which can be used to establish a win by making the first stop the right reel 32R).
the numerical information set in the numerical information storage means by the numerical information setting means based on the occurrence of any one of the plurality of first target events is numerical information that is included in a first numerical range (a numerical range of "1" to "4", a numerical range of "5" to "8", a numerical range of "9" to "12");
The gaming machine performs first target event response processing (the processing of steps S4004, S4005, S4007, S4008, S4010, S4011, S4013, S4014, S4016, S4017, S4019, and S4020 of the main MPU 72 in the fifth embodiment, and steps S4303, S4304, S4306, S4307, S4309, and S4310 of the main MPU 72 in the sixth embodiment) corresponding to the occurrence of any of the first target events based on whether the numerical information set in the numerical information storage means is included in the first numerical range. A gaming machine according to any one of features I1 to I3, characterized in that it is equipped with a first target event response means (a function of executing the processing of steps S4004, S4005, S4007, S4008, S4010, S4011, S4013, S4014, S4016, S4017, S4019 and S4020 of the main MPU 72 in the fifth embodiment, a function of executing the processing of steps S4303, S4304, S4306, S4307, S4309 and S4310 of the main MPU 72 in the sixth embodiment) that executes the processing of step S4304, S4305, S4007, S4008, S4010, S4011, S4013, S4014, S4016, S4017, S4019 and S4020 of the main MPU 72 in the sixth embodiment).

According to Feature I4, by configuring the first target event response process to be executed based on the numerical information set in the numerical information storage means being within the first numerical range, a determination process is executed to determine whether numerical information corresponding to each of multiple first target events is set in the numerical information storage means, and the number of determination processes required to identify the occurrence of any of the first target events can be reduced compared to a configuration in which the first target event response process is executed based on a positive determination being made in one of these determination processes. This simplifies the processing configuration for the process in which the first target event response process is executed based on the occurrence of any of the first target events.

Feature I5. A gaming machine as described in Feature I4, wherein the first numerical range includes multiple pieces of predetermined target numerical information that are part of the multiple pieces of predetermined target numerical information (for example, "1" and "3" when the first numerical range is "1" to "4" and the predetermined target numerical information is an odd number).

According to Feature I5, there is provided a configuration having the configuration of Feature I1 above, in which a predetermined target event response process is executed based on the numerical information set in the numerical information storage means being any of the numerical information included in a predetermined arithmetic progression; and there is provided a configuration having the configuration of Feature I4 above, in which a first target event response process is executed based on the numerical information set in the numerical information storage means being included in a first numerical range, wherein the first numerical range includes multiple predetermined target numerical information that is part of the multiple predetermined target numerical information. This simplifies the processing configuration for the process for executing a predetermined target event response process based on the occurrence of any of multiple predetermined target events that are both a predetermined target event and a first target event, and the processing configuration for the process for executing a first target event response process based on the occurrence of any of multiple predetermined target events that are both a predetermined target event and a first target event.

Feature I6. A gaming machine as described in Feature I5, wherein the first numerical range includes numerical information that is not the predetermined target numerical information (for example, when the first numerical range is "1" to "4" and the predetermined target numerical information is an odd number, "2" and "4").

According to Feature I6, in a configuration having the configuration of Feature I5 above, in which there are multiple predetermined target events that are both predetermined target events and first target events, there are also first target events that are not predetermined target events, and the numerical information set in the numerical information storage means based on the occurrence of these first target events is all numerical information that falls within the first numerical range. Also, in a configuration having the configuration of Feature I4 above, the first target event response process is executed based on the numerical information set in the numerical information storage means falling within the first numerical range. This simplifies the processing configuration for executing the first target event response process based on the occurrence of any of the first target events, even in a configuration in which both target events that are predetermined target events and target events that are not predetermined target events exist as first target events.

Feature I7. The plurality of first target events includes a plurality of specific first target events (such as winning the index value IV = 1 to 2 in which any bell winning data that can be established by stopping in the order of left → center → right to establish a win, or winning the index value IV = 3 to 4 in which any bell winning data that can be established by stopping in the order of left → right → center to establish a win),
any of the numerical information set in the numerical information storage means by the numerical information setting means based on the occurrence of any of the specific first target events is numerical information included in a specific first numerical range included in the first numerical range (such as a numerical range of "1" to "2" included in the numerical range of "1" to "4", a numerical range of "3" to "4" included in the numerical range of "1" to "4"),
This gaming machine is a gaming machine described in any one of features I4 to I6, characterized in that it is equipped with a specific first response means (a function of executing the processing of steps S3504, S3506, S3508, S3510, S3512 and S3514 of the main MPU 72) that executes a specific first response processing (processing of steps S3504, S3506, S3508, S3510, S3512 and S3514 of the main MPU 72) in response to the occurrence of any of the specific first target events, as a processing different from the first target event response processing, based on the numerical information set in the numerical information storage means being included in the specific first numerical range.

According to Feature I7, by configuring the specific first response process to be executed based on whether the numerical information set in the numerical information storage means is included in the specific first numerical range, a determination process is executed to determine whether each of the multiple pieces of numerical information included in the specific first numerical range is set in the numerical information storage means, and the specific first response process is executed based on a positive determination in one of these determination processes. Compared to this configuration, the number of determination processes required to determine that any of the specific first target events has occurred can be reduced. This simplifies the processing configuration for the process to execute the specific first response process based on the occurrence of any of the specific first target events.

In a configuration having the configuration of Feature I4 above, in which the first target event response process is executed based on the numerical information set in the numerical information storage means being within the first numerical range, the specific first response process is executed based on the numerical information set in the numerical information storage means being within the specific first numerical range. This simplifies the processing configuration for executing the first target event response process based on the occurrence of any specific first target event, and the processing configuration for executing the specific first response process based on the occurrence of any specific first target event.

Feature I8. A symbol display means (reels 32L, 32M, 32R) that displays symbols in a variable manner;
stop operation means (stop buttons 42 to 44) that are operated to stop the variable display of the patterns in the pattern display means;
Equipped with
After the first target event occurs, a first winning combination corresponding to the first target event that has occurred (in the fifth and seventh embodiments, for index values IV = 1 to 4, any of the first red bell winning, the second red bell winning, the first black bell winning, and the second black bell winning; in the fifth and seventh embodiments, for index values IV = 5 to 8, any of the third red bell winning, the fourth red bell winning, the third black bell winning, and the fourth black bell winning; in the sixth embodiment, for index values IV = 9 to 12, any of the fifth red bell winning, the sixth red bell winning, the fifth black bell winning, and the sixth black bell winning) When the index value IV is 1 to 4, any of the first red bell winning, the second red bell winning, the first black bell winning, and the first blue bell winning; when the index value IV is 5 to 8, any of the third red bell winning, the fourth red bell winning, the second black bell winning, and the second blue bell winning; when the index value IV is 9 to 12, any of the fifth red bell winning, the sixth red bell winning, the third black bell winning, and the third blue bell winning), the winning of the first winning combination is realized by stopping the variable display of the pattern on the pattern display means in a stopping mode corresponding to the index value IV.
A gaming machine described in any one of features I4 to I7, characterized in that all of the multiple first target events are target events that require the stop operation means to be operated in a predetermined operation mode (an operation mode in which the first stop is on the left reel 32L, an operation mode in which the first stop is on the center reel 32M, or an operation mode in which the first stop is on the right reel 32R) in order to achieve the first winning role corresponding to the first target event.

According to Feature I8, all of the multiple first target events are target events in which the stop operation means must be operated in a predetermined operating manner to achieve the first winning combination corresponding to the first target event. Furthermore, this configuration includes the configuration of Feature I4 above, and the first target event response process is executed based on the numerical information set in the numerical information storage means being within the first numerical range. This simplifies the processing configuration for executing the first target event response process based on the occurrence of any first target event in which the stop operation means must be operated in a predetermined operating manner to achieve the corresponding first winning combination.

Feature I9. The plurality of predetermined target events include a plurality of first predetermined target events (winning the index values IV = 1, 3 in which red bell winning data is set, which makes it possible to establish a win by making the first stop on the left reel 32L; winning the index values IV = 5, 7 in which red bell winning data is set, which makes it possible to establish a win by making the first stop on the center reel 32M; winning the index values IV = 9, 11 in which red bell winning data is set, which makes it possible to establish a win by making the first stop on the right reel 32R, etc.),
the predetermined target numerical information set in the numerical information storage means by the numerical information setting means based on the occurrence of any one of the plurality of first predetermined target events is numerical information that is included in a first predetermined numerical range (a numerical range of "1" to "4", a numerical range of "5" to "8", a numerical range of "9" to "12");
The predetermined target event response means
a first predetermined determination means (a function of executing the processes of steps S4003, S4006, S4009, S4012, S4015, and S4018 of the main MPU 72 in the fifth embodiment) that executes a first predetermined determination process (the processes of steps S4003, S4006, S4009, S4012, S4015, and S4018 of the main MPU 72 in the fifth embodiment) using the numerical information set in the numerical information storage means as the predetermined target event response process;
In the first predetermined determination process, based on the first predetermined determination result (determination result in which a positive determination is made) corresponding to the numerical information set in the numerical information storage means being included in the first predetermined numerical range, a first predetermined target event response process (steps S4004, S4005, S4007, S4008, S4010, S4011, and S4013 of the main MPU 72 in the fifth embodiment) corresponding to the occurrence of any of the first predetermined target events is performed. a first predetermined target event response means (a function of executing the processes of steps S4004, S4005, S4007, S4008, S4010, S4011, S4013, S4014, S4016, S4017, S4019, and S4020 of the main MPU 72 in the fifth embodiment);
A gaming machine according to any one of features I1 to I8, characterized by comprising:

According to Feature I9, by configuring the first predetermined target event response processing to be executed based on the first predetermined judgment result in the first predetermined judgment processing, a judgment processing is executed to determine whether numerical information corresponding to each of multiple first predetermined target events is set in the numerical information storage means, and the first predetermined target event response processing is executed based on a positive judgment in one of these judgment processings. This reduces the number of judgment processing steps required to identify the occurrence of any of the first predetermined target events, compared to a configuration in which the first predetermined target event response processing is executed based on the occurrence of any of the first predetermined target events. This simplifies the processing configuration for executing the first predetermined target event response processing based on the occurrence of any of the first predetermined target events.

Feature I10. A specific storage means (main ROM 73) in which a determination information group (non-internal utility lottery table TB1 and internal utility lottery table TB2 in the fifth embodiment, non-internal utility lottery table TB3 and internal utility lottery table TB4 in the sixth embodiment, non-bonus utility lottery table TB5 in the seventh embodiment) in which a plurality of determination target information (winning data) is set is stored;
a predetermined pass/fail judgment means (a function for executing the process of step S2806 of the main MPU 72 in the fifth and sixth embodiments, a function for executing the process of step S4506 of the main MPU 72 in the seventh embodiment) for executing a predetermined pass/fail judgment process (the process of step S2806 of the main MPU 72 in the fifth and sixth embodiments, the process of step S4506 of the main MPU 72 in the seventh embodiment) for determining whether or not one of the plurality of judgment target information set in the judgment information group that is the judgment execution target (winning data corresponding to the current index value IV) has been selected;
A target update means for updating the judgment target information in the judgment information group based on the result that the judgment target information that is the judgment execution target in the specified pass/fail judgment process is not selected (a function for executing the process of step S2809 of the main MPU 72 in the fifth and sixth embodiments, and a function for executing the process of step S4507 of the main MPU 72 in the seventh embodiment);
Equipped with
A gaming machine described in any one of features I1 to I9, characterized in that the specified target event occurs when a specified judgment target information (index value IV = 1, 3, 5, 7, 9, 11, or index value IV = 2, 4, 6, 8, 10, 12) that is the judgment target information corresponding to the specified target event in the specified win/loss judgment process is won.

Feature I10 simplifies the processing configuration for executing a predetermined target event response process based on the selection of predetermined judgment target information corresponding to one of the predetermined target events in the predetermined pass/fail judgment process. This simplifies the processing configuration for executing processing corresponding to the results of the predetermined pass/fail judgment process.

Feature I11. The numerical information setting means sets numerical information (index value IV) corresponding one-to-one to the judgment target information that has been selected in the predetermined win/loss judgment process in the numerical information storage means,
The gaming machine described in feature I10 is characterized in that the group of judgment information has a plurality of the predetermined judgment target information arranged at predetermined intervals corresponding to the common difference (the difference between two consecutive terms in an arithmetic progression) in the predetermined arithmetic progression (in the fifth to seventh embodiments, an interval where there is one even index value IV between an odd index value IV and its next odd index value IV, and an interval where there is one odd index value IV between an even index value IV and its next even index value IV).

Feature I11 prevents the processing configuration for setting in the numerical information storage means numerical information corresponding to the target information selected in the predetermined pass/fail judgment process from becoming complicated, while ensuring that the numerical information set in the numerical information storage means based on the selection of any of the target information in the predetermined pass/fail judgment process becomes target numerical information included in a predetermined arithmetic progression.

Feature I12. A symbol display means (reels 32L, 32M, 32R) that displays symbols in a variable manner;
stop operation means (stop buttons 42 to 44) that are operated to stop the variable display of the patterns in the pattern display means;
Equipped with
After the predetermined target event occurs, the variable display of the picture on the picture display means stops in a stopping pattern corresponding to the predetermined winning combination (in the fifth and seventh embodiments, any of the first to sixth red bell winnings, any of the first to sixth black bell winnings, and in the sixth embodiment, any of the first to sixth red bell winnings, any of the first to third black bell winnings, and any of the first to third blue bell winnings) corresponding to the predetermined target event that has occurred, thereby achieving a winning of the predetermined winning combination;
The predetermined target event response means performs a predetermined winning realization response process (the process of steps S4003 to S4011, the process of steps S4012 to S4020, the process of step S4103, the process of step S4104, the process of step S4105, the process of step S4106, the process of step S4107, the process of step S4108, the process of step S4109, the process of step S4110, the process of step S4111, the process of step S4112, the process of step S4113, the process of step S4114, the process of step S4115, the process of step S4116, the process of step S4117, the process of step S4118, the process of step S4119, the process of step S4120, the process of step S4121, the process of step S4122, the process of step S4123, the process of step S4124, the process of step S4125, the process of step S4126, the process of step S4127, the process of step S4128, the process of step S4129, the process of step S4130, the process of step S4131, the process of step S4132, the process of step S4133, the process of step S4134, the process of step S4135, the process of step S4136, the process of step S4137, the process of step S4138, the process of step S4139, the process of step S4140, the process of step S4141, the process of step S4142, the process of step S4143, the process of step S4144, the process of step S4145, the process of step S4146, the process of step S4147, the process of step S4148, the process of step A gaming machine described in any one of features I1 to I11, characterized in that it is equipped with a predetermined winning response means (a function for executing the processing of steps S4003 to S4020 of the main MPU 72 in the fifth embodiment, a function for executing the processing of steps S4103 and S4104 of the main MPU 72, and a function for executing the processing of steps S4403 to S4406 of the main MPU 72 in the sixth embodiment) that executes the processing of step S4104 of the main MPU 72 in the sixth embodiment, the processing of step S4403 of the main MPU 72 in the sixth embodiment, and the processing of steps S4404 to S4406.

According to Feature I12, after the stop operation means is operated while the image display is changing, the predetermined winning response process is executed based on whether the numerical information set in the numerical information storage means is any of the numerical information included in a predetermined arithmetic progression. This reduces the number of determination processes required to identify the occurrence of a winning combination compared to a configuration in which a determination process is executed to determine whether numerical information corresponding to each of a plurality of predetermined target events is set in the numerical information storage means, and the predetermined winning response process is executed based on a positive determination in one of these determination processes. This simplifies the processing configuration for executing the predetermined winning response process based on the occurrence of a winning combination of any of the predetermined winning combinations.

Feature I13. A symbol display means (reels 32L, 32M, 32R) that displays symbols in a variable manner;
stop operation means (stop buttons 42 to 44) that are operated to stop the variable display of the patterns in the pattern display means;
Equipped with
After the predetermined target event occurs, the variable display of the picture on the picture display means stops in a stopping pattern corresponding to the predetermined winning combination (in the fifth and seventh embodiments, any of the first to sixth red bell winnings, any of the first to sixth black bell winnings, and in the sixth embodiment, any of the first to sixth red bell winnings, any of the first to third black bell winnings, and any of the first to third blue bell winnings) corresponding to the predetermined target event that has occurred, thereby achieving a winning of the predetermined winning combination;
A gaming machine described in any one of features I1 to I12, characterized in that the predetermined target event response means is equipped with a predetermined occurrence response means (a function of executing the processing of step S3516 of the main MPU 72 in the fifth to seventh embodiments) that executes a predetermined occurrence response processing corresponding to the occurrence of any of the predetermined target events as the predetermined target event response processing, based on the fact that the numerical information set in the numerical information storage means is any of the numerical information included in the predetermined arithmetic progression, at a timing before the timing at which the variable display of the picture in the picture display means is stopped.

According to Feature I13, the predetermined occurrence response process is executed based on whether the numerical information set in the numerical information storage means is any of the numerical information included in a predetermined arithmetic progression, at a timing before the timing at which the variable display of the image on the image display means is stopped. This simplifies the processing configuration for executing the predetermined occurrence response process based on the occurrence of any of the predetermined target events, compared to a configuration in which a determination process is executed to determine whether numerical information corresponding to each of a plurality of predetermined target events is set in the numerical information storage means, and the predetermined occurrence response process is executed based on a positive determination in one of these determination processes.

Feature I14. A gaming machine according to any one of Features I1 to I13, wherein the predetermined target event response processing is processing for setting information corresponding to the occurrence of the predetermined target event (red bell winning information set in the stop operation notification command in the fifth embodiment, information of "1" set in any of the achievement flags 74h to 74m, a value obtained by adding the number of awards corresponding to a red bell win or a black bell win to the value of the AT continuation counter 74d in the sixth embodiment, and a value obtained by adding the number of awards corresponding to a red bell win, a black bell win, or a blue bell win to the value of the AT continuation counter 74d in the sixth embodiment) (processing of step S3516 by the main MPU 72, processing of steps S4003 to S4011 by the main MPU 72, processing of steps S4012 to S4020, processing of step S4103, processing of step S4104 by the main MPU 72 in the sixth embodiment, processing of step S4403 by the main MPU 72, processing of steps S4404 to S4406 by the main MPU 72 in the sixth embodiment).

Feature I14 includes the configuration of feature I1 above, and is configured to execute a predetermined target event response process based on whether the numerical information set in the numerical information storage means is any of the numerical information included in a predetermined arithmetic progression. This simplifies the processing configuration for setting information corresponding to the occurrence of a predetermined target event based on the occurrence of any of the predetermined target events.

In addition, any one or more of the following configurations may be applied to the configurations of features I1 to I14: features A1 to A10, features B1 to B8, features C1 to C6, features D1 to D7, features E1 to E8, features F1 to F8, features G1 to G7, features H1 to H6, features I1 to I14, features J1 to J9, features K1 to K14, features L1 to L11, features M1 to M14, features N1 to N6, features O1 to O10, features P1 to P13, features Q1 to Q11, features R1 to R13, features S1 to S14, features T1 to T11, features U1 to U9, features V1 to V5, features W1 to W7, features X1 to X10, features Y1 to Y13, features Z1 to Z16, features a1 to a11, features b1 to b12, and features c1 to c9. This allows for a synergistic effect to be achieved through the combined configuration.

<Feature J group>
Feature J1: A numerical information storage means (index value counter 74a) in which one of a plurality of pieces of numerical information ("0" to "20" in the fifth to seventh embodiments) is set;
a numerical information setting means (a function for executing the processing of steps S2806 to S2807 of the main MPU 72 in the fifth and sixth embodiments, and a function for executing the processing of steps S4506 and S4509 to S4513 of the main MPU 72 in the seventh embodiment) for setting predetermined target numerical information (an index value IV of any one of "1" to "12") corresponding one-to-one to the predetermined target event that has occurred based on the occurrence of one of a plurality of predetermined target events (winning any odd index value IV included in the numerical range of "1" to "12" in the lottery processing of the winning combination in the fifth to seventh embodiments, or winning any even index value IV included in the numerical range of "1" to "12");
Equipped with
The predetermined target numerical information is numerical information (an odd index value IV in the numerical range of "1" to "12", an even index value IV in the numerical range of "1" to "12") in which the value of a predetermined bit (bit 0) among a plurality of bits (bits 0 to 7) of the predetermined target numerical information is a predetermined value (the value "1", the value "0");
The gaming machine performs predetermined target event response processing (the processing of step S3516 of the main MPU 72 in the fifth embodiment, the processing of steps S4003 to S4011 of the main MPU 72, the processing of steps S4012 to S4020, the processing of step S4103, the processing of step S4104 of the main MPU 72 in the sixth embodiment) corresponding to the occurrence of any of the predetermined target events, based on the value of the predetermined bit in the numerical information set in the numerical information storage means being the predetermined value. A gaming machine characterized by being equipped with a predetermined target event response means (a function for executing the processing of step S3516 of the main MPU 72 in the fifth embodiment, a function for executing the processing of steps S4003 to S4020 of the main MPU 72, a function for executing the processing of steps S4103 and S4104 of the main MPU 72, and a function for executing the processing of steps S4403 to S4406 of the main MPU 72 in the sixth embodiment).

According to Feature J1, predetermined target numerical information that corresponds one-to-one to an occurring predetermined target event among a plurality of predetermined target events is set in the numerical information storage means, making it possible to identify the type of predetermined target event that has occurred based on the predetermined target numerical information set in the numerical information storage means.

In a configuration where multiple predetermined target events exist, the predetermined target event response process is executed based on the value of a predetermined bit in the numerical information stored in the numerical information storage means being a predetermined value. Therefore, compared to a configuration in which a determination process is executed to determine whether numerical information corresponding to each of multiple predetermined target events is stored in the numerical information storage means, and the predetermined target event response process is executed based on a positive determination in one of these determination processes, the number of determination processes required to identify the occurrence of any of the predetermined target events can be reduced. This simplifies the processing configuration for executing the predetermined target event response process based on the occurrence of any of the predetermined target events, and reduces the data volume required to store the program corresponding to that processing.

Feature J2. A gaming machine according to Feature J1, wherein the predetermined bit is the least significant bit (bit 0 in the fifth to seventh embodiments) of the plurality of bits contained in the predetermined target numerical information.

According to Feature J2, in a configuration where the predetermined value is "1," it is possible to configure the numerical information storage means to set an even number as the numerical information corresponding to an event other than a predetermined target event when that event occurs, while the predetermined target event response processing is executed based on the numerical information set in the numerical information storage means being an odd number. Furthermore, in a configuration where the predetermined value is "0," it is possible to configure the numerical information storage means to set an odd number as the numerical information corresponding to an event other than a predetermined target event when that event occurs, while the predetermined target event response processing is executed based on the numerical information set in the numerical information storage means being an even number. Using either of these configurations simplifies the processing configuration for executing the predetermined target event response processing based on the occurrence of any predetermined target event.

Feature J3. The plurality of predetermined target events includes a plurality of predetermined target events (winning any one of index values IV = 2, 6, 10 to which black bell winning data is set in the lottery process for the role in the sixth embodiment, and winning any one of index values IV = 4, 8, 12 to which blue bell winning data is set),
any of the numerical information set by the numerical information setting means in the numerical information storage means as the predetermined target numerical information corresponding to the predetermined target event that has occurred based on the occurrence of any of the predetermined target events is numerical information (any of "2", "6", and "10", any of "4", "8", and "12") in which the value of the predetermined bit among the multiple bits of the predetermined target numerical information is the predetermined value, and the value of a specific bit (the first bit in the sixth embodiment) different from the predetermined bit is a specific value (the value "1", the value "0");
The predetermined target event response means
As the predetermined target event response processing, a means for executing a specific bit determination process (the processing of step S4404 of the main MPU 72) for the value of the specific bit in the numerical information set in the numerical information storage means (a function for executing the processing of step S4404 of the main MPU 72 in the sixth embodiment);
means for executing predetermined target event response processing (the processing of step S4405 of the main MPU 72 and the processing of step S4406 of the main MPU 72) corresponding to the occurrence of any of the predetermined target events based on the determination result that the value of the specific bit in the numerical information set in the numerical information storage means is the specific value in the specific bit determination processing (a function for executing the processing of steps S4405 and S4406 of the main MPU 72 in the sixth embodiment);
A gaming machine according to feature J1 or J2, characterized by comprising:

Feature J3 allows a predetermined target event response process to be executed based on the value of a predetermined bit in the numerical information stored in the numerical information storage means being a predetermined value and the value of a specific bit being a specific value. Therefore, compared to a configuration in which a determination process is executed to determine whether predetermined target numerical information corresponding to each of a plurality of predetermined target events is stored in the numerical information storage means for that predetermined target event, and the predetermined target event response process is executed based on a positive determination in one of these determination processes, the processing configuration for executing the predetermined target event response process based on the occurrence of any of the predetermined target events can be simplified, and the data volume required to store the program corresponding to that process can be reduced.

Feature J4: Based on the occurrence of one of a plurality of target events including the predetermined target event (winning one of index values IV = 1 to 20 in the lottery process for winning a role), numerical information (winning index value IV) corresponding one-to-one to the target event that has occurred is set in the numerical information storage means by the numerical information setting means,
The target events include a plurality of first target events (in the fifth to seventh embodiments, winning an index value IV = 1 to 4 in which any bell winning data is set and which can be used to establish a win by making the first stop the left reel 32L, winning an index value IV = 5 to 8 in which any bell winning data is set and which can be used to establish a win by making the first stop the center reel 32M, and winning an index value IV = 9 to 12 in which any bell winning data is set and which can be used to establish a win by making the first stop the right reel 32R).
the numerical information set in the numerical information storage means by the numerical information setting means based on the occurrence of any one of the plurality of first target events is numerical information that is included in a first numerical range (a numerical range of "1" to "4", a numerical range of "5" to "8", a numerical range of "9" to "12");
The gaming machine performs first target event response processing (the processing of steps S4004, S4005, S4007, S4008, S4010, S4011, S4013, S4014, S4016, S4017, S4019, and S4020 of the main MPU 72 in the fifth embodiment, and steps S4303, S4304, S4306, S4307, S4309, and S4310 of the main MPU 72 in the sixth embodiment) corresponding to the occurrence of any of the first target events based on whether the numerical information set in the numerical information storage means is included in the first numerical range. A gaming machine according to any one of features J1 to J3, characterized in that it is equipped with a first target event response means (a function of executing the processing of steps S4004, S4005, S4007, S4008, S4010, S4011, S4013, S4014, S4016, S4017, S4019 and S4020 of the main MPU 72 in the fifth embodiment, a function of executing the processing of steps S4303, S4304, S4306, S4307, S4309 and S4310 of the main MPU 72 in the sixth embodiment) that executes the processing of step S4304, S4305, S4007, S4008, S4010, S4011, S4013, S4014, S4016, S4017, S4019 and S4020 of the main MPU 72 in the sixth embodiment).

According to Feature J4, by configuring the first target event response process to be executed based on the numerical information set in the numerical information storage means being within the first numerical range, a determination process is executed to determine whether numerical information corresponding to each of multiple first target events is set in the numerical information storage means, and the number of determination processes required to identify the occurrence of any of the first target events can be reduced compared to a configuration in which the first target event response process is executed based on a positive determination being made in one of these determination processes. This simplifies the processing configuration for executing the first target event response process based on the occurrence of any of the first target events.

Feature J5: The plurality of predetermined target events include a plurality of first predetermined target events (winning at index values IV=1, 3 in which red bell winning data is set, which makes it possible to establish a win by making the first stop on the left reel 32L; winning at index values IV=5, 7 in which red bell winning data is set, which makes it possible to establish a win by making the first stop on the center reel 32M; winning at index values IV=9, 11 in which red bell winning data is set, which makes it possible to establish a win by making the first stop on the right reel 32R, etc.),
the predetermined target numerical information set in the numerical information storage means by the numerical information setting means based on the occurrence of any of the first predetermined target events is numerical information that is included in a first predetermined numerical range (a numerical range of "1" to "4", a numerical range of "5" to "8", a numerical range of "9" to "12");
The predetermined target event response means
a first predetermined determination means (a function of executing the processes of steps S4003, S4006, S4009, S4012, S4015, and S4018 of the main MPU 72 in the fifth embodiment) that executes a first predetermined determination process (the processes of steps S4003, S4006, S4009, S4012, S4015, and S4018 of the main MPU 72 in the fifth embodiment) using the numerical information set in the numerical information storage means as the predetermined target event response process;
In the first predetermined determination process, based on the first predetermined determination result (determination result in which a positive determination is made) corresponding to the numerical information set in the numerical information storage means being included in the first predetermined numerical range, a first predetermined target event response process (steps S4004, S4005, S4007, S4008, S4010, S4011, and S4013 of the main MPU 72 in the fifth embodiment) corresponding to the occurrence of any of the first predetermined target events is performed. a first predetermined target event response means (a function of executing the processes of steps S4004, S4005, S4007, S4008, S4010, S4011, S4013, S4014, S4016, S4017, S4019, and S4020 of the main MPU 72 in the fifth embodiment);
A gaming machine according to any one of features J1 to J4, characterized in that it is equipped with:

According to Feature J5, by configuring the first predetermined target event response processing to be executed based on the first predetermined judgment result in the first predetermined judgment processing, a judgment processing is executed to determine whether numerical information corresponding to each of multiple first predetermined target events is set in the numerical information storage means, and the number of judgment processing steps required to identify the occurrence of any of the first predetermined target events can be reduced compared to a configuration in which the first predetermined target event response processing is executed based on a positive judgment in any of these judgment processing steps. This simplifies the processing configuration for executing the first predetermined target event response processing based on the occurrence of any of the first predetermined target events.

Feature J6. A specific storage means (main ROM 73) in which a determination information group (non-internal utility lottery table TB1 and internal utility lottery table TB2 in the fifth embodiment, non-internal utility lottery table TB3 and internal utility lottery table TB4 in the sixth embodiment, non-bonus utility lottery table TB5 in the seventh embodiment) in which a plurality of determination target information (winning data) is set is stored;
a predetermined pass/fail judgment means (a function for executing the process of step S2806 of the main MPU 72 in the fifth and sixth embodiments, a function for executing the process of step S4506 of the main MPU 72 in the seventh embodiment) for executing a predetermined pass/fail judgment process (the process of step S2806 of the main MPU 72 in the fifth and sixth embodiments, the process of step S4506 of the main MPU 72 in the seventh embodiment) for determining whether or not one of the plurality of judgment target information set in the judgment information group that is the judgment execution target (winning data corresponding to the current index value IV) has been selected;
A target update means for updating the judgment target information in the judgment information group based on the result that the judgment target information that is the judgment execution target in the specified pass/fail judgment process is not selected (a function for executing the process of step S2809 of the main MPU 72 in the fifth and sixth embodiments, and a function for executing the process of step S4507 of the main MPU 72 in the seventh embodiment);
Equipped with
A gaming machine described in any one of features J1 to J5, characterized in that the specified target event occurs when a specified judgment target information (index value IV = 1, 3, 5, 7, 9, 11, or index value IV = 2, 4, 6, 8, 10, 12) that is the judgment target information corresponding to the specified target event in the specified win/loss judgment process is won.

Feature J6 simplifies the processing configuration for executing a predetermined target event response process based on the selection of predetermined judgment target information corresponding to one of the predetermined target events in the predetermined pass/fail judgment process. This simplifies the processing configuration for executing processing corresponding to the results of the predetermined pass/fail judgment process.

Feature J7. A symbol display means (reels 32L, 32M, 32R) that displays symbols in a variable manner;
stop operation means (stop buttons 42 to 44) that are operated to stop the variable display of the patterns in the pattern display means;
Equipped with
After the predetermined target event occurs, the variable display of the picture on the picture display means stops in a stopping pattern corresponding to the predetermined winning combination (in the fifth and seventh embodiments, any of the first to sixth red bell winnings, any of the first to sixth black bell winnings, and in the sixth embodiment, any of the first to sixth red bell winnings, any of the first to third black bell winnings, and any of the first to third blue bell winnings) corresponding to the predetermined target event that has occurred, thereby achieving a winning of the predetermined winning combination;
The predetermined target event response means performs predetermined winning establishment response processing (the processing of steps S4003 to S4011, the processing of steps S4012 to S4020, the processing of step S4103, the processing of step S4104, the processing of step S4105, the processing of step S4106, the processing of step S4107, the processing of step S4108, the processing of step S4109, the processing of step S4110, the processing of step S4111, the processing of step S4112, the processing of step S4113, the processing of step S4114, the processing of step S4115, the processing of step S4116, the processing of step S4117, the processing of step S4118, the processing of step S4119, the processing of step S4120, the processing of step S4121, the processing of step S4122, the processing of step S4123, the processing of step S4124, the processing of step S4125, the processing of step S4126, the processing of step S4127, the processing of step S4128, the processing of step S4129, the processing of step S4130, the processing of step S4131, the processing of step S4132, the processing of step S4133, the processing of step S4134, the processing of step S4135, the processing of step S4136, the processing of step S4137, the processing of step S4138, the processing of step S4139, the processing of step S4140, the processing of step S4141, the processing of step S4142, the processing of step S4143, the processing of step S4144, the processing of step S4145, the processing of step S4146, the processing of step S4147, the processing of step S4148, the processing of step S4 A gaming machine described in any one of features J1 to J6, characterized in that it is equipped with a predetermined winning response means (a function for executing the processing of steps S4003 to S4020 of the main MPU 72 in the fifth embodiment, a function for executing the processing of steps S4103 and S4104 of the main MPU 72, and a function for executing the processing of steps S4403 to S4406 of the main MPU 72 in the sixth embodiment) that executes the processing of step S4104 of the main MPU 72 in the sixth embodiment, the processing of step S4403 of the main MPU 72 in the sixth embodiment, and the processing of steps S4404 to S4406.

According to Feature J7, after the stop operation means is operated while the image is being displayed, the predetermined winning response process is executed based on the value of a predetermined bit in the numerical information set in the numerical information storage means being a predetermined value. This reduces the number of determination processes required to identify the occurrence of a winning combination compared to a configuration in which a determination process is executed to determine whether numerical information corresponding to each of a plurality of predetermined target events is set in the numerical information storage means, and the predetermined winning response process is executed based on a positive determination in one of these determination processes. This simplifies the processing configuration for executing the predetermined winning response process based on the occurrence of a winning combination of a predetermined winning combination.

Feature J8. A symbol display means (reels 32L, 32M, 32R) that displays symbols in a variable manner;
stop operation means (stop buttons 42 to 44) that are operated to stop the variable display of the patterns in the pattern display means;
Equipped with
After the predetermined target event occurs, the variable display of the picture on the picture display means stops in a stopping pattern corresponding to the predetermined winning combination (in the fifth and seventh embodiments, any of the first to sixth red bell winnings, any of the first to sixth black bell winnings, and in the sixth embodiment, any of the first to sixth red bell winnings, any of the first to third black bell winnings, and any of the first to third blue bell winnings) corresponding to the predetermined target event that has occurred, thereby achieving a winning of the predetermined winning combination;
A gaming machine described in any one of features J1 to J7, characterized in that the specified target event response means is equipped with a specified occurrence response means (a function of executing the processing of step S3516 of the main MPU 72 in the fifth to seventh embodiments) that executes a specified occurrence response processing corresponding to the occurrence of any of the specified target events as the specified target event response processing, based on the value of the specified bit in the numerical information set in the numerical information storage means being the specified value, at a timing before the timing when the variable display of the picture in the picture display means is stopped.

According to feature J8, the predetermined occurrence response process is configured to be executed based on the value of a predetermined bit in the numerical information set in the numerical information storage means being a predetermined value at a timing before the timing at which the variable display of the image in the image display means is stopped. This simplifies the processing configuration for executing the predetermined occurrence response process based on the occurrence of any of the predetermined target events, compared to a configuration in which a determination process is executed to determine whether numerical information corresponding to each of a plurality of predetermined target events is set in the numerical information storage means, and the predetermined occurrence response process is executed based on a positive determination in any of these determination processes.

Feature J9. A gaming machine according to any one of Features J1 to J8, wherein the predetermined target event response processing is processing for setting information corresponding to the occurrence of the predetermined target event (red bell winning information set in the stop operation notification command in the fifth embodiment, information of "1" set in any of the achievement flags 74h to 74m, a value obtained by adding the number of awards corresponding to a red bell win or a black bell win to the value of the AT continuation counter 74d in the sixth embodiment, a value obtained by adding the number of awards corresponding to a red bell win, a black bell win, or a blue bell win to the value of the AT continuation counter 74d in the sixth embodiment) (processing of step S3516 by the main MPU 72, processing of steps S4003 to S4011 by the main MPU 72, processing of steps S4012 to S4020, processing of step S4103, processing of step S4104 by the main MPU 72 in the fifth embodiment, processing of step S4403 by the main MPU 72 in the sixth embodiment, processing of steps S4404 to S4406 by the main MPU 72).

Feature J9 has the configuration of feature J1 described above, and is configured to execute a predetermined target event response process based on the value of a predetermined bit in the numerical information set in the numerical information storage means being a predetermined value. This simplifies the processing configuration for setting information corresponding to the occurrence of a predetermined target event based on the occurrence of any of the predetermined target events.

In addition, the configurations of features J1 to J9 may be configured with any one or more of features A1 to A10, features B1 to B8, features C1 to C6, features D1 to D7, features E1 to E8, features F1 to F8, features G1 to G7, features H1 to H6, features I1 to I14, features J1 to J9, features K1 to K14, features L1 to L11, features M1 to M14, features N1 to N6, features O1 to O10, features P1 to P13, features Q1 to Q11, features R1 to R13, features S1 to S14, features T1 to T11, features U1 to U9, features V1 to V5, features W1 to W7, features X1 to X10, features Y1 to Y13, features Z1 to Z16, features a1 to a11, features b1 to b12, and features c1 to c9. This allows for a synergistic effect to be achieved through the combined configuration.

The invention relating to the above-mentioned feature group I and feature group J can solve the following problems.

Pachinko machines and slot machines are well-known gaming machines. For example, pachinko machines are equipped with a storage section for storing gaming balls. The gaming balls stored in the storage section are guided to a gaming ball launcher and launched toward the gaming area in response to the player's launch operation. Then, for example, when a gaming ball enters a ball entry section provided in the gaming area, a lottery process is executed, or a process is executed to increase the number of gaming balls available to the player.

In a slot machine, when a game value such as medals has been bet and the start lever is operated to start a new game, a lottery process is executed by the control means. Furthermore, when the lottery process is executed, the control means executes rotation start control, causing the reels to start spinning. If the stop button is operated while the reels are spinning, the control means executes rotation stop control, causing the reels to stop spinning. If the result after the reels have stopped spinning corresponds to a winning combination in the lottery process, a bonus corresponding to that winning combination is awarded to the player.

Here, in gaming machines such as those exemplified above, it is necessary to reduce the memory capacity required to control game execution, and there is still room for improvement in this regard.

<Feature K group>
Feature K1. A specific storage means (main ROM 73) in which a group of judgment information (non-internal utility lottery table TB1 and internal utility lottery table TB2 in the fifth embodiment, non-internal utility lottery table TB3 and internal utility lottery table TB4 in the sixth embodiment, non-bonus utility lottery table TB5 in the seventh embodiment) is stored, in which a plurality of judgment target information (index value IV) and win/loss judgment information (point value PV) corresponding to the judgment target information are set,
a predetermined pass/fail judgment means (a function for executing the processing of step S2806 in the main MPU 72 in the fifth and sixth embodiments, a function for executing the processing of step S4506 in the main MPU 72 in the seventh embodiment) that executes a predetermined pass/fail judgment process (the processing of step S2806 in the main MPU 72, the processing of step S4506 in the main MPU 72) that uses the pass/fail judgment information corresponding to one of the judgment target information that is the judgment execution target (current index value IV) among the multiple judgment target information set in the judgment information group to determine whether the judgment target information has been selected;
A target update means for updating the judgment target information in the judgment information group based on the result that the judgment target information that is the judgment execution target in the specified pass/fail judgment process is not selected (a function for executing the process of step S2809 of the main MPU 72 in the fifth and sixth embodiments, and a function for executing the process of step S4507 of the main MPU 72 in the seventh embodiment);
Equipped with
The specific storage means stores predetermined determination information groups (internal utility lottery table TB2 in the fifth embodiment, internal utility lottery table TB4 in the sixth embodiment, non-bonus utility lottery table TB5 in the seventh embodiment) in which a plurality of pieces of determination target information including predetermined determination target information (index value IV = 14 in the fifth to seventh embodiments, index value IV = 15 in the seventh embodiment) and specific determination target information different from the predetermined determination target information (index value IV = 15 in the fifth to seventh embodiments, index value IV = 14 in the seventh embodiment) are set as the determination information groups used in the predetermined win/loss determination process in predetermined situations (bonus internal state ST12 in the fifth to seventh embodiments, normal game state ST11 or AT state ST14 in the seventh embodiment),
A gaming machine characterized in that, in the group of predetermined judgment information, the information for determining whether or not a win is set in correspondence with the predetermined judgment target information is information that can result in a win in the predetermined win/loss judgment process (a point value PV of "850" that is greater than "0"), and the information for determining whether or not a win is set in correspondence with the specific judgment target information is information that will not result in a win in the predetermined win/loss judgment process (a point value PV of "0").

According to Feature K1, the predetermined pass/fail determination process is executed using a group of determination information, and in a predetermined situation, the predetermined pass/fail determination process is executed using the group of determination information. This prevents the processing configuration for executing the predetermined pass/fail determination process from becoming too complicated, while allowing the predetermined pass/fail determination process to be executed with content appropriate to the situation. By setting multiple pieces of determination target information, including predetermined determination target information and specific determination target information, in the group of determination information, when the predetermined pass/fail determination process is executed in a predetermined situation, a situation can be generated in which the predetermined determination target information is the target of determination, and a situation can be generated in which the specific determination target information is the target of determination. In the group of determination information, the pass/fail determination information set corresponding to the predetermined determination target information is information that can result in a win in the predetermined pass/fail determination process, and the pass/fail determination information set corresponding to the specific determination target information is information that does not result in a win in the predetermined pass/fail determination process. This allows, when the predetermined pass/fail determination process is executed in a predetermined situation, a win can be generated in a situation in which the predetermined determination target information is the target of determination, and a win cannot be generated in a situation in which the specific determination target information is the target of determination.

When the specified win/loss determination process is executed in a predetermined situation, in a configuration in which a win does not occur in a situation in which specific determination target information is the target of determination execution, the specific determination target information is set in the specified determination information group used when the specified win/loss determination process is executed in the predetermined situation. This prevents fluctuations in the number of determination target information that is the target of determination execution before the specified determination target information becomes the target of determination execution in the specified win/loss determination process, and the number of determination target information that is the target of determination execution before the specific determination target information becomes the target of determination execution, depending on the situation in which the specified win/loss determination process is executed. This makes it possible to ensure that win/loss determinations are performed appropriately.

Feature K2. A gaming machine as described in Feature K1, wherein both the predetermined judgment target information and the specific judgment target information are set in the judgment information group used in the predetermined win/loss judgment process executed in a specific situation different from the predetermined situation (normal gaming state ST11 or AT state ST14 in the fifth to seventh embodiments, bonus internal state ST12 in the seventh embodiment).

According to Feature K2, in a configuration having the configuration of Feature K1 above, in which the predetermined judgment target information and specific judgment target information are set in the predetermined judgment information group used in the predetermined correctness judgment process executed in a predetermined situation, the predetermined judgment target information and specific judgment target information are also set in the judgment information group used in the predetermined correctness judgment process executed in a specific situation. This allows the predetermined judgment target information and specific judgment target information to be the judgment execution target in both the predetermined correctness judgment process executed in a predetermined situation and the predetermined correctness judgment process executed in a specific situation. As a result, even in a configuration having the configuration of Feature K1 above and capable of being selected as the predetermined judgment target information in the predetermined correctness judgment process executed in a predetermined situation but not as the specific judgment target information, it is possible to prevent a change in the number of judgment target information that is the target of judgment execution before the predetermined judgment target information becomes the target of judgment execution in the predetermined correctness judgment process executed in a predetermined situation and the predetermined correctness judgment process executed in a specific situation, and it is possible to prevent a change in the number of judgment target information that is the target of judgment execution before the specific judgment target information becomes the target of judgment execution.

Feature K3. The predetermined judgment information group is set with predetermined winning target information that is winning target information corresponding to the predetermined judgment target information (cherry winning data when the predetermined judgment target information has an index value IV = 14, cherry winning data when the predetermined judgment target information has an index value IV = 15, and BB winning data when the predetermined judgment target information has an index value IV = 15), and specific winning target information that is winning target information corresponding to the specific judgment target information and different from the predetermined winning target information (cherry winning data and BB winning data when the specific judgment target information has an index value IV = 15, and cherry winning data when the specific judgment target information has an index value IV = 14),
A gaming machine according to feature K1 or K2, characterized in that the predetermined winning target information and the specific winning target information include common predetermined winning target information (cherry winning data).

According to Feature K3, in a configuration in which the judgment target information in which winning target information including predetermined winning target information is set includes predetermined judgment target information in which predetermined winning target information is set and specific judgment target information in which specific winning target information is set, the configuration includes the configuration of Feature K1 above, and in a predetermined win/loss judgment process executed in a predetermined situation, a win can occur for the predetermined judgment target information, but a win cannot occur for the specific judgment target information. As a result, when the predetermined win/loss judgment process is executed in a predetermined situation, it is possible to win for the predetermined judgment target information in which the predetermined winning target information is set, out of the predetermined winning target information including the predetermined winning target information and the specific winning target information including the predetermined winning target information, and it is possible to prevent a win from occurring for the specific judgment target information in which the specific winning target information is set.

Feature K4: A winning information storage means (index value counter 74a) in which any of the determination target information is set;
A winning information setting means (a function for executing the processing of step S2807 of the main MPU 72 in the fifth and sixth embodiments, and a function for executing the processing of step S4513 of the main MPU 72 in the seventh embodiment) for setting the judgment target information for which a winning has been confirmed in the winning information storage means based on the state in which a winning has been confirmed for any of the judgment target information (a state in which a positive judgment has been made in step S2806 of the main MPU 72 in the fifth and sixth embodiments, and a state in which the processing of steps S4509 to S4512 has been executed after a positive judgment has been made in step S4506 of the main MPU 72 in the seventh embodiment);
A gaming machine according to any one of features K1 to K3, characterized in that it is provided with:

Feature K4 makes it possible to identify the determination target information for which a winning has been confirmed by referencing the winning information storage means. This simplifies the processing configuration for identifying the determination target information for which a winning has been confirmed.

Feature K5: When the predetermined win/loss determination process is executed in the predetermined situation, the winning of the predetermined determination target information may be confirmed,
When the predetermined winning/losing judgment process is executed in a specific situation different from the predetermined situation (normal game state ST11 or AT state ST14 in the fifth to seventh embodiments, bonus internal state ST12 in the seventh embodiment), the winning of the predetermined judgment target information is not confirmed.
Based on the predetermined judgment target information being set in the winning information storage means, the gaming machine performs predetermined response processing in response to the state in which a win has been confirmed for the predetermined judgment target information in the predetermined situation (when the predetermined judgment target information is an index value IV=14, the processing of steps S3208 to S3209 and S3217 of the main MPU 72, the processing of steps S3307 to S3308 and S3316 of the main MPU 72, and when the predetermined judgment target information is an index value IV=14, A gaming machine described in feature K4, characterized in that it is equipped with a predetermined corresponding processing execution means (a function for executing the processing of step S3006 in the main MPU 72 in the fifth to seventh embodiments, a function for executing the processing of steps S3208 to S3209 and step S3217 in the main MPU 72, and a function for executing the processing of steps S3307 to S3308 and step S3316 in the main MPU 72 when the value IV is 15).

Feature K5 is configured such that when the predetermined win/loss determination process is executed in a predetermined situation, a winning state for the determination target information can be confirmed, whereas when the predetermined win/loss determination process is executed in a specific situation, a winning state for the determination target information is not confirmed. Therefore, when the predetermined response process is executed based on the predetermined determination target information being set in the win information storage means, the determination process for determining whether a state in which a winning state for the predetermined determination target information has been confirmed has occurred in the predetermined situation is unnecessary. This simplifies the processing configuration for the process for identifying a state in which a winning state for the predetermined determination target information has been confirmed in the predetermined situation, compared to a configuration that requires a determination process for determining whether a winning state for the predetermined determination target information has occurred in the predetermined situation in addition to a determination process for determining whether a winning state for the predetermined determination target information has been confirmed. Therefore, it is possible to simplify the processing configuration for the process that executes the predetermined response process based on a state in which a winning state for the predetermined determination target information has been confirmed in the predetermined situation, and reduce the data volume required to store the program corresponding to the process.

Feature K6: When the predetermined win/loss determination process is executed in the specific situation, the winning of the specific determination target information may be confirmed,
When the predetermined winning/losing determination process is executed in the predetermined situation, the winning of the specific determination target information is not confirmed,
In this gaming machine, based on the fact that the specific judgment target information is set in the winning information storage means, a specific response process corresponding to the fact that a win for the specific judgment target information has been confirmed in the specific situation is performed (when the specific judgment target information has an index value IV = 15, the main MPU 72 performs the process of step S3006; when the specific judgment target information has an index value IV = 14, the main MPU 72 performs the process of steps S3208 to S3209 and S3217; A gaming machine according to feature K4 or K5, characterized in that it is equipped with a specific response processing execution means (a function for executing the processing of step S3006 of the main MPU 72 in the fifth to seventh embodiments, a function for executing the processing of steps S3208 to S3209 and S3217 of the main MPU 72, and a function for executing the processing of steps S3307 to S3308 and S3316 of the main MPU 72) that executes the processing of steps S3307 to S3308 and S3316 of the main MPU 72 in the fifth to seventh embodiments.

Feature K6 is configured such that when a predetermined win/loss determination process is executed in a specific situation, a state in which a win for the specific determination target information is confirmed can be established, but when a predetermined win/loss determination process is executed in a specific situation, a state in which a win for the specific determination target information is not confirmed. Therefore, when a specific response process is executed based on specific determination target information being set in the win information storage means, a determination process for determining whether a state in which a win for the specific determination target information is confirmed has occurred in a specific situation can be eliminated. This simplifies the processing configuration for the process for determining that a win for the specific determination target information has occurred in a specific situation, compared to a configuration that requires a determination process for determining whether a state in which a win for the specific determination target information has occurred has occurred in a specific situation. Therefore, it is possible to simplify the processing configuration for the process that executes the specific response process based on a state in which a win for the specific determination target information has been confirmed in a specific situation, and reduce the data volume required to store the program corresponding to the process.

Feature K7. A gaming machine described in any one of Features K4 to K6, characterized in that if any of the judgment target information is won in the predetermined win/loss judgment process (if a positive judgment is made in step S2806 by the main MPU 72 in the fifth and sixth embodiments), the winning of that judgment target information is confirmed regardless of the circumstances under which that judgment target information was won, and the judgment target information for which the winning has been confirmed is set in the winning information storage means by the winning information setting means.

According to feature K7, when a player wins one of the pieces of judgment target information in the predetermined win/loss determination process and the winning status of that judgment target information is confirmed, the judgment target information for which the winning status has been confirmed can be set in the winning information storage means, without the need for a determination process to identify the circumstances under which that state occurred. This simplifies the processing configuration for setting the judgment target information in the winning information storage means based on the winning status of a piece of judgment target information being confirmed. In particular, it simplifies the processing configuration for setting the predetermined judgment target information in the winning information storage means based on the winning status of the predetermined judgment target information in the predetermined win/loss determination process and the winning status of that predetermined judgment target information being confirmed, and for setting the specific judgment target information in the winning information storage means based on the winning status of specific judgment target information in the predetermined win/loss determination process and the winning status of that specific judgment target information being confirmed.

Feature K8. The specific storage means stores a specific determination information group (non-internal utility lottery table TB1 in the fifth embodiment, non-internal utility lottery table TB3 in the sixth embodiment) in which a plurality of pieces of determination target information including the predetermined determination target information and the specific determination target information are set as the determination information group used in the predetermined pass/fail determination process executed in the specific situation and which is different from the predetermined determination information group;
A gaming machine described in feature K7, characterized in that in the group of specific judgment information, the information for determining whether or not a win is set in correspondence with the specific judgment target information is information that can result in a win in the specified win/loss judgment process (a point value PV of "850" that is greater than "0"), and the information for determining whether or not a win is set in correspondence with the specified judgment target information is information that will not result in a win in the specified win/loss judgment process (a point value PV of "0").

According to feature K8, the configuration of feature K7 is included, and when a player wins any of the judgment target information in the predetermined pass/fail judgment process, the player is confirmed as having won the judgment target information regardless of the circumstances under which the player won the judgment target information. In this configuration, the player may win specific judgment target information in the predetermined pass/fail judgment process executed in a specific situation, but will not win the specific judgment target information in the predetermined pass/fail judgment process executed in the specific situation. This allows the player to be confirmed as having won the specific judgment target information when the predetermined pass/fail judgment process is executed in a specific situation, but the player may not be confirmed as having won the specific judgment target information.

In a configuration that can be selected as specific judgment target information in a predetermined pass/fail judgment process executed in a specific situation, but does not select as specific judgment target information in the predetermined pass/fail judgment process executed in the specific situation, both the specified judgment target information and the specific judgment target information can be the target of judgment execution in the predetermined pass/fail judgment process executed in the specific situation. Furthermore, with the configuration of feature K1 described above, the specified judgment target information and the specific judgment target information are the targets of judgment execution in both the predetermined pass/fail judgment process executed in a specific situation and the predetermined pass/fail judgment process executed in a specific situation. This prevents the number of judgment target information that is the target of judgment execution from changing before the specified judgment target information becomes the target of judgment in the predetermined pass/fail judgment process executed in the specific situation and prevents the number of judgment target information that is the target of judgment execution from changing before the specific judgment target information becomes the target of judgment execution.

Feature K9. The gaming machine described in Feature K8 is characterized in that the target update means includes means for updating the judgment execution target (a function for executing the processing of step S2809 of the main MPU 72 in the fifth and sixth embodiments) by updating the numerical information for identifying the judgment execution target information in a predetermined order (ascending order in which "1" to "20" increase by "1" in increments of "1" in the fifth and sixth embodiments) each time a result of the predetermined win/loss judgment process executed using the predetermined judgment information group or the specific judgment information group results in a non-winning result for the judgment execution target information.

Feature K9 allows the information to be updated by updating the numerical information in a predetermined order, simplifying the processing structure for updating the information to be judged in the predetermined validity judgment process.

In both cases where the predetermined pass/fail judgment process is performed using a predetermined judgment information group and where the predetermined pass/fail judgment process is performed using a specific judgment information group, information corresponding to the number of judgment target information that has been the subject of judgment execution before a win occurs in the predetermined pass/fail judgment process can be set in the winning information storage means. In both of these cases, by configuring the number of judgment target information that is the subject of judgment execution before the predetermined judgment target information becomes the subject of judgment execution and the number of judgment target information that is the subject of judgment execution before the specific judgment target information becomes the subject of judgment execution to remain constant, it is possible to simplify the processing configuration for ensuring that the information stored in the winning information storage means becomes the predetermined judgment target information when the predetermined judgment target information is won, and it is also possible to simplify the processing configuration for ensuring that the information stored in the numerical information storage means becomes the specific judgment target information when the specific judgment target information is won.

Feature K10. The predetermined judgment information group is set with predetermined winning target information that is winning target information corresponding to the predetermined judgment target information (cherry winning data when the predetermined judgment target information has an index value IV = 14, cherry winning data when the predetermined judgment target information has an index value IV = 15, and BB winning data when the predetermined judgment target information has an index value IV = 15), and specific winning target information that is winning target information corresponding to the specific judgment target information and different from the predetermined winning target information (cherry winning data and BB winning data when the specific judgment target information has an index value IV = 15, and cherry winning data when the specific judgment target information has an index value IV = 14),
The predetermined winning target information and the specific winning target information include common predetermined winning target information (cherry winning data),
A gaming machine described in feature K8 or K9, characterized in that the probability of winning the specific judgment target information in the specified hit/miss judgment process when the specific judgment information group is used is set to the same probability as the probability of winning the specified judgment target information in the specified hit/miss judgment process when the specified judgment information group is used.

According to feature K10, a configuration is provided in which, if a player wins any of the judgment target information in the predetermined pass/fail judgment process, the player is confirmed as having won the judgment target information regardless of the circumstances under which the player won the judgment target information; a configuration is provided in which, if a predetermined group of judgment information is used, the player may win the predetermined judgment target information in the predetermined pass/fail judgment process but not win the specific judgment target information; a configuration is provided in which, if a specific group of judgment information is used, the player may win the specific judgment target information in the predetermined pass/fail judgment process but not win the specific judgment target information; and a configuration is provided in which, if a specific group of judgment information is used, the player may win the specific judgment target information in the predetermined pass/fail judgment process but not win the specific judgment target information, the probability of winning the specific judgment target information in the predetermined pass/fail judgment process when a specific group of judgment information is used is the same as the probability of winning the specific judgment target information in the predetermined pass/fail judgment process when a specific group of judgment information is used. This makes it possible to make the probability that a win will be confirmed for specific determination information in which specific win target information including predetermined win target information is set when the specified win/loss determination process is executed using the specific determination information group the same as the probability that a win will be confirmed for specific determination information in which specific win target information including predetermined win target information is set when the specified win/loss determination process is executed using the specific determination information group.

Feature K11: A predetermined response processing execution means (a function for executing the processing of steps S3208 to S3209 and step S3217 of the main MPU 72 in the fifth embodiment, and a function for executing the processing of steps S3307 to S3308 and step S3316 of the main MPU 72) that corresponds to the fact that a winning of the predetermined judgment information has been confirmed in the predetermined situation based on the predetermined judgment information being set in the winning information storage means,
A gaming machine described in any one of features K8 to K10, characterized in that the specified response processing is processing to make it easier for the player to be awarded a specified benefit (AT transition winning, increase in the remaining number of awarded gaming media in AT state ST14) (processing of steps S3208 to S3209 of the main MPU 72 in the fifth to seventh embodiments, processing of steps S3307 to S3308 of the main MPU 72).

According to feature K11, the device has the configuration of feature K7, and if a player wins any of the judgment target information in the predetermined win/loss determination process, the player is confirmed as having won the judgment target information regardless of the circumstances under which the player won the judgment target information; it has the configuration of feature K1, and is capable of winning the predetermined judgment target information in the predetermined win/loss determination process executed in a predetermined situation; and it has the configuration of feature K8, and is not configured to win the predetermined judgment target information in the predetermined win/loss determination process executed in a specific situation, so that when the predetermined win/loss determination process is executed in a predetermined situation, the player may be confirmed as having won the predetermined judgment target information, but when the predetermined win/loss determination process is executed in a specific situation, the player is not confirmed as having won the predetermined judgment target information. This eliminates the need for a determination process to determine whether a state in which the player has won the predetermined judgment target information has occurred in a predetermined situation when the predetermined response process is executed based on the predetermined judgment target information being set in the winning information storage means. Therefore, compared to a configuration that requires a determination process to determine whether a winning status for the predetermined determination information has been confirmed, as well as a determination process to determine whether that status has occurred in a predetermined situation, the processing configuration for the processing to identify that a winning status for the predetermined determination information has been confirmed in a predetermined situation can be simplified. This also simplifies the processing configuration for the processing to execute a predetermined response process based on a winning status for the predetermined determination information being confirmed in a predetermined situation, and reduces the data volume required to store the program corresponding to that process.

Since the specified response process is executed based on the information stored in the winning information storage means being the specified judgment target information, it is possible to make it easier for a player to receive a specified bonus based on the state in which a win for the specified judgment target information is confirmed in the specified win/loss determination process executed under specified circumstances. This increases the advantage of being in a state in which a win for the specified judgment target information is confirmed under specified circumstances.

Feature K12: A specific response processing execution means (a function of executing the processing of step S3006 of the main MPU 72 in the fifth to seventh embodiments) is provided that executes a specific response processing (the processing of step S3006 of the main MPU 72) corresponding to the fact that a winning of the specific judgment target information has been confirmed in the specific situation based on the specific judgment target information being set in the winning information storage means,
A gaming machine described in any one of features K8 to K11, characterized in that the specific response processing is processing that corresponds to the end of the specific situation and the transition to the specified situation (processing of step S3006 in the main MPU 72).

According to feature K12, the device has the configuration of feature K7, and if a player wins any of the judgment target information in the predetermined win/loss determination process, the player is confirmed as having won the judgment target information regardless of the circumstances under which the player won the judgment target information; the device has the configuration of feature K1, and is not confirmed as having won specific judgment target information in the predetermined win/loss determination process executed in a predetermined situation; and the device has the configuration of feature K8, and is capable of winning specific judgment target information in the predetermined win/loss determination process executed in a specific situation, so that when the predetermined win/loss determination process is executed in a predetermined situation, the player is not confirmed as having won the specific judgment target information, but when the predetermined win/loss determination process is executed in a specific situation, the player may be confirmed as having won the specific judgment target information. This eliminates the need for a determination process to determine whether a specific situation has occurred in which the player has won the specific judgment target information, when the specific response process is executed based on the specific judgment target information being set in the winning information storage means. Therefore, compared to a configuration that requires a determination process to determine whether a winning status for specific determination information has been confirmed in addition to a determination process to determine whether that status has occurred in a specific situation, the processing configuration for the processing to determine whether a winning status for specific determination information has been confirmed in a specific situation can be simplified. This also simplifies the processing configuration for the processing to execute a specific response process based on a winning status for specific determination information being confirmed in a specific situation, and reduces the data volume required to store the program corresponding to that process.

When the specified pass/fail judgment process is executed in a specific situation, it is possible for the winning of the specific judgment target information to be confirmed. Therefore, when the specified pass/fail judgment process is executed in a specific situation, it is possible to execute a process corresponding to the specific situation ending and transitioning to a specific situation based on the winning of the specific judgment target information being confirmed in the specific situation. Furthermore, since the winning of the specific judgment target information is not confirmed when the specified pass/fail judgment process is executed in a specific situation, it is possible to prevent the execution of a process corresponding to the specific situation ending and transitioning to a specific situation when the specific situation is already in a specific situation.

Feature K13. A gaming machine described in any one of Features K4 to K6, characterized in that the predetermined hit/miss determination process is executed using the predetermined determination information group (non-bonus role lottery table TB5 in the seventh embodiment) in both the predetermined situation and the specific situation.

Feature K13 enables a reduction in the data capacity of the specific storage means required to store the judgment information group, compared to a configuration in which the judgment information group used for the specified pass/fail judgment process in a specified situation is different from the judgment information group used for the specified pass/fail judgment process in a specific situation.

Feature K14. The gaming machine described in Feature K13 is characterized in that the winning information setting means includes means for generating a state in which the specific judgment target information has won by changing the judgment target information identified as the winning judgment target information from the predetermined judgment target information to the specific judgment target information before the winning judgment target information is determined in the predetermined win/loss judgment process, based on the judgment being determined in the specific win/loss judgment process in the specific situation in which the predetermined judgment target information is the judgment execution target (a function for executing the processes of steps S4509 to S4511 of the main MPU 72 in the seventh embodiment).

According to feature K14, in a specific situation where the predetermined judgment target information is the target of judgment execution, if the predetermined win/loss judgment process determines that a win has been made, the specific judgment target information can be set to have been won instead of the predetermined judgment target information. As a result, in a configuration that has the configuration of feature K13 and in which the predetermined win/loss judgment process is executed using a predetermined judgment information group in both predetermined and specific situations, it is possible to configure such that, in specific situations, a win for the specific judgment target information can be confirmed, but a win for the predetermined judgment target information cannot be confirmed.

This configuration includes the configuration of feature K13, and executes a predetermined pass/fail judgment process using a predetermined judgment information group in both predetermined and specific situations. This makes it possible to make the probability that a win for the predetermined judgment target information is confirmed when the predetermined pass/fail judgment process is executed in a predetermined situation the same as the probability that a win for the specific judgment target information is confirmed when the predetermined pass/fail judgment process is executed in a specific situation.

In addition, the configuration of features K1 to K14 may be configured with any one or more of features A1 to A10, features B1 to B8, features C1 to C6, features D1 to D7, features E1 to E8, features F1 to F8, features G1 to G7, features H1 to H6, features I1 to I14, features J1 to J9, features K1 to K14, features L1 to L11, features M1 to M14, features N1 to N6, features O1 to O10, features P1 to P13, features Q1 to Q11, features R1 to R13, features S1 to S14, features T1 to T11, features U1 to U9, features V1 to V5, features W1 to W7, features X1 to X10, features Y1 to Y13, features Z1 to Z16, features a1 to a11, features b1 to b12, and features c1 to c9. This allows for a synergistic effect to be achieved through the combined configuration.

The invention relating to the above group of features K can solve the following problems:

Pachinko machines and slot machines are well-known gaming machines. For example, pachinko machines are equipped with a storage section for storing gaming balls. The gaming balls stored in the storage section are guided to a gaming ball launcher and launched toward the gaming area in response to the player's launch operation. Then, for example, when a gaming ball enters a ball entry section provided in the gaming area, a lottery process is executed, or a process is executed to increase the number of gaming balls available to the player.

In a slot machine, when a game value such as medals has been bet and the start lever is operated to start a new game, a lottery process is executed by the control means. Furthermore, when the lottery process is executed, the control means executes rotation start control, causing the reels to start spinning. If the stop button is operated while the reels are spinning, the control means executes rotation stop control, causing the reels to stop spinning. If the result after the reels have stopped spinning corresponds to a winning combination in the lottery process, a bonus corresponding to that winning combination is awarded to the player.

Here, in gaming machines such as those exemplified above, it is necessary to ensure that win/loss determination is performed appropriately, and there is still room for improvement in this regard.

<Feature L group>
Feature L1. A predetermined display means (image display device 63),
A predetermined display control means (a function for executing the processing of steps S4807 and S4808 of the performance side MPU 92 in the eighth embodiment) that causes the predetermined display means to perform a predetermined display (display of the remaining award number image G21, the acquisition number image G22, the number of games played image G23, and the performance character image G80 in the base AT state ST4);
a predetermined display control means (a function for executing the processing of step S4605 of the production-side MPU 92 in the eighth embodiment) for causing the predetermined display means to display a pre-notification display (display of a pre-end image G33) to notify the player that a predetermined state (a state in which a forced end of a game has occurred) is approaching in a previous state (a state in which the number of game media granted to the player has reached 18,850 since the initial value was set in the end determination counter 98b);
A specific display control means (a function of executing the processing of steps S4802 to S4803 in the performance side MPU 92) that causes the specific display means to display a specific display (display of a demo image G82) in place of the specific display or in a more noticeable manner than the specific display, based on the occurrence of a specific start trigger (the non-play period becoming longer than the demo start reference period) while the specific display is being performed;
Equipped with
A gaming machine characterized in that the specific display is started while the advance notification display is continuing based on the occurrence of the specified start trigger while the advance notification display is being displayed.

Feature L1 prevents situations where the advance warning display is not being displayed, even when a specific display is initiated due to a predetermined trigger while the advance warning display is being displayed. This prevents the advance warning display from being interrupted even during the specific display in the pre-stage state, and allows for continued notification that the specific state is approaching.

Feature L2. A gaming machine as described in Feature L1, characterized in that when the specific display is initiated based on the occurrence of the predetermined initiation trigger while the advance notification display is being displayed, the content of the advance notification display does not change before or after the start of the specific display.

Feature L2 makes it possible to clearly display to the player that the previous stage state has not ended. Furthermore, by eliminating the need for processing to change the content of the advance notification display, it is possible to suppress an increase in processing load when the specific display begins.

Feature L3: A means for executing a process for updating the content of the specific display (a function for executing the process of step S4806 of the production-side MPU 92 in the eighth embodiment),
A gaming machine described in feature L2, characterized in that when the advance warning display and the specific display are being executed, processing to update the content of the specific display is executed, and processing to update the content of the advance warning display is not executed.

Feature L3 makes it possible to clearly display to the player that the previous stage state has not ended. Furthermore, by eliminating the need for processing to change the content of the advance notification display, it is possible to suppress an increase in processing load during the specific display.

Feature L4: A specific display termination control means (a function for executing the process of step S4807 of the production-side MPU 92 in the eighth embodiment) is provided to terminate the specific display based on the occurrence of a predetermined termination trigger (the start of a new game),
A gaming machine described in any one of features L1 to L3, characterized in that when the advance warning display and the specific display are being executed and the specific display is terminated based on the occurrence of the specified termination trigger, the advance warning display continues.

Feature L4 prevents a situation in which the advance warning display is not being displayed, even when the specific display is terminated while the advance warning display and specific display are being displayed. This prevents the advance warning display from being interrupted when the specific display is terminated in the pre-stage state, and allows for continued notification that a predetermined state may occur.

Feature L5. A gaming machine as described in Feature L4, characterized in that when the specific display is terminated based on the occurrence of the predetermined termination trigger while the advance notification display and the specific display are being displayed, the content of the advance notification display does not change before or after the termination of the specific display.

Feature L5 makes it possible to clearly display to the player that the previous stage state has not ended. Furthermore, by eliminating the need for processing to change the content of the advance notification display, it is possible to suppress an increase in processing load when the specific display ends.

Feature L6. A gaming machine described in any one of Features L1 to L5, wherein the specific display is a predetermined standby screen (demo image G82) that is initiated when the predetermined start trigger occurs when no game is being played.

Feature L6 prevents situations where the advance notification display is not displayed even when no game is being played and the specified standby screen is being displayed. This allows players and amusement hall managers to know that the specified state is approaching, even when no game is being played.

Feature L7. A gaming machine described in any one of Features L1 to L6, wherein the predetermined state is a state in which a new game cannot be started (a state in which a game is forcibly terminated).

Feature L7 ensures that players and arcade managers can continue to be aware that a new game cannot be started anytime soon.

Feature L8: A predetermined update means (a function for executing the processes of steps S2107 and S2108 of the main MPU 72 in the first embodiment) for updating the end trigger information stored in the end trigger storage means (end determination counter 98b) as the game is executed to approach the end occurrence information (exceeding "65535" and causing a reversal from the maximum value to the minimum value);
A means for bringing the device into the predetermined state based on the termination trigger information stored in the termination trigger storage means becoming the termination occurrence information (a function for executing the processes of step S2110 and steps S2201 to S2204 of the main MPU 72 in the first embodiment);
Equipped with
A gaming machine described in feature L7, characterized in that the content of the advance notification display corresponds to the termination trigger information stored in the termination trigger memory means.

Feature L8 includes the configuration of feature L7, and in a configuration in which a predetermined state makes it impossible to start a new game, an advance warning display is displayed with content corresponding to the termination trigger information, allowing the player to understand, based on the advance warning display, how the game is approaching a state in which it will no longer be possible to start a new game. This prevents the player from becoming confused by a situation in which it will no longer be possible to start a new game at a time the player does not anticipate.

Feature L9. A gaming machine as described in Feature L8, characterized in that the preceding state is entered when the termination trigger information stored in the termination trigger storage means becomes notification trigger information ("65385") that is reached before the termination occurrence information is reached.

According to feature L9, by configuring the game so that the advance notification display is not displayed until the end trigger information stored in the end trigger storage means reaches the notification trigger information, it is possible to impress upon the player that a predetermined state is approaching when the end trigger information stored in the end trigger storage means reaches the notification trigger information and the advance notification display is initiated, compared to a configuration in which the advance notification display is displayed before the end trigger information stored in the end trigger storage means reaches the notification trigger information.

Feature L10. A gaming machine according to Feature L9, wherein the predetermined display control means terminates the advance notification display when the termination trigger information becomes notification cancellation information ("65285"), which is information that is further from the termination occurrence information than the notification trigger information, while the advance notification display is being executed (a function that executes the processing of step S4705 of the presentation-side MPU 92 in the eighth embodiment).

According to feature L10, if the termination trigger information becomes the notification cancellation information while the advance notification display is being displayed, the advance notification display is terminated. This prevents the advance notification display from continuing even in situations where the likelihood of the termination trigger information reaching the termination occurrence information has decreased. Furthermore, by setting the notification cancellation information as information that is farther away from the termination occurrence information than the notification trigger information, it is possible to prevent the advance notification display from repeatedly starting and ending in a short period of time on the specified display means.

Feature L11. Advantageous transition means (a function of executing the processing of steps S907 and S908 of the main MPU 72 in the first embodiment) that transitions to an advantageous game state (base AT state ST4, ending AT state ST5) based on the establishment of an advantageous transition condition (a positive determination in step S906);
A means for ending the advantageous gaming state based on the establishment of a predetermined ending condition (a positive determination in step S1207) in the advantageous gaming state (a function for executing the processing of step S1208 of the main MPU 72 in the first embodiment);
A pre-ending display control means (a function for executing the processing of step S4611 of the production side MPU 92 in the eighth embodiment) that causes the pre-ending display (display of the pre-ending establishment image G31) to be executed in the pre-ending display means when a predetermined situation occurs in which the establishment of the predetermined ending condition is approaching in the advantageous game state;
Equipped with
A gaming machine according to feature L9 or L10, characterized in that execution of the advance notification display takes priority over execution of the pre-ending display.

According to feature L11, the advantageous gaming state ends when a predetermined ending condition is met, making it possible to prevent the advantageous gaming state from continuing excessively. Furthermore, when a predetermined situation occurs in which the predetermined ending condition is about to be met during the advantageous gaming state, a pre-ending display is executed, making it possible to make the player aware that the predetermined ending condition is about to be met. In this case, the execution of the advance notification display takes priority over the execution of the pre-ending display. This makes it possible to focus on notifying the player that the predetermined state is approaching, rather than that the predetermined ending condition is about to be met.

In addition, the configurations of features L1 to L11 may be configured with any one or more of features A1 to A10, features B1 to B8, features C1 to C6, features D1 to D7, features E1 to E8, features F1 to F8, features G1 to G7, features H1 to H6, features I1 to I14, features J1 to J9, features K1 to K14, features L1 to L11, features M1 to M14, features N1 to N6, features O1 to O10, features P1 to P13, features Q1 to Q11, features R1 to R13, features S1 to S14, features T1 to T11, features U1 to U9, features V1 to V5, features W1 to W7, features X1 to X10, features Y1 to Y13, features Z1 to Z16, features a1 to a11, features b1 to b12, and features c1 to c9. This allows for a synergistic effect to be achieved through the combined configuration.

<Feature M group>
Feature M1. A predetermined display means (image display device 63),
a predetermined display control means (a function for executing the processing of step S4605 of the production-side MPU 92 in the eighth embodiment) for causing the predetermined display means to display a pre-notification display (display of a pre-end image G33) to notify the player that a predetermined state (a state in which a forced end of a game has occurred) is approaching in a previous state (a state in which the number of game media granted to the player has reached 18,850 since the initial value was set in the end determination counter 98b);
A predetermined advance notification control means (a function for executing the processing of steps S4603 to S4604 in the presentation-side MPU 92 in the eighth embodiment, and a function for executing the processing of steps S4707 to S4708 in the presentation-side MPU 92) that executes a predetermined advance notification (display of a pre-end highlighting image G81) regarding the approaching of the predetermined state in addition to the advance notification display based on the occurrence of a predetermined trigger (the non-play period being equal to or longer than the demo start reference period, or the completion of the demo presentation end condition);
A gaming machine characterized by comprising:

According to feature M1, when a predetermined trigger occurs, a predetermined advance notification is executed in addition to the advance notification display, thereby emphasizing the possibility of a predetermined state occurring. This prevents the player from entering a predetermined state without being aware of the possibility.

Feature M2. A predetermined display control means (a function for executing the processing of steps S4807 and S4808 of the performance side MPU 92 in the eighth embodiment) that causes a predetermined display (the display of the remaining awarded number image G21, the acquired number image G22, the number of games played image G23, and the performance character image G80 in the base AT state ST4) to be performed in the predetermined display means,
A specific display control means (a function of executing the processing of steps S4802 to S4803 in the performance side MPU 92) that causes the specific display means to display a specific display (display of a demo image G82) in place of the specific display or in a more noticeable manner than the specific display, based on the occurrence of a specific start trigger (the non-play period becoming longer than the demo start reference period) while the specific display is being performed;
Equipped with
A gaming machine described in feature M1, characterized in that when the specific display is started based on the occurrence of the specified start trigger while the advance warning display is being displayed, the specific display is started while the advance warning display is continuing.

Feature M2 prevents situations where the advance warning display is not being displayed, even when a specific display is initiated due to a predetermined trigger while the advance warning display is being displayed. This prevents the advance warning display from being interrupted at the start of the specific display and during the specific display in the pre-stage state, making it possible to continue to notify the user that the specific state may occur.

Feature M3. A predetermined display control means (a function for executing the processing of steps S4807 and S4808 of the performance side MPU 92 in the eighth embodiment) that causes a predetermined display (the display of the remaining awarded number image G21, the acquired number image G22, the number of games played image G23, and the performance character image G80 in the base AT state ST4) to be performed in the predetermined display means,
A specific display control means (a function of executing the processing of steps S4802 to S4803 in the performance side MPU 92) that causes the specific display means to display a specific display (display of a demo image G82) in place of the specific display or in a more noticeable manner than the specific display, based on the occurrence of a specific start trigger (the non-play period becoming longer than the demo start reference period) while the specific display is being performed;
Equipped with
A gaming machine described in feature M1 or M2, characterized in that the specified trigger occurs when the specified start trigger occurs while the advance notification display is being displayed.

According to feature M3, in a configuration in which a specific display is displayed in place of the specific display or in a more prominent manner than the specific display based on the occurrence of a specific start trigger when a specific display is being displayed, if a specific start trigger occurs when a pre-warning display is being displayed, a specific pre-warning can be executed in addition to the pre-warning display at the start of the specific display. By executing the specific pre-warning in addition to the pre-warning display in a situation switching from a state in which a specific display is being displayed in place of the specific display or in a more prominent manner than the specific display, it is possible to prevent the presence of the display notifying that a specific state may occur from being diminished and to emphasize the notification that a specific state may occur.

Feature M4. A predetermined display control means (a function for executing the processing of steps S4807 and S4808 of the performance side MPU 92 in the eighth embodiment) that causes a predetermined display (the display of the remaining awarded number image G21, the acquired number image G22, the number of games played image G23, and the performance character image G80 in the base AT state ST4) to be performed in the predetermined display means,
A specific display control means (a function of executing the processing of steps S4802 to S4803 in the performance side MPU 92) that causes the specific display means to display a specific display (display of a demo image G82) in place of the specific display or in a more noticeable manner than the specific display, based on the occurrence of a specific start trigger (the non-play period becoming longer than the demo start reference period) while the specific display is being performed;
A specific display termination control means (a function for executing the process of step S4807 of the production-side MPU 92 in the eighth embodiment) that terminates the specific display based on the occurrence of a predetermined termination trigger (the start of a new game);
Equipped with
A gaming machine described in any one of features M1 to M3, characterized in that the specified trigger occurs when the specified termination trigger occurs while the advance notification display is being displayed.

According to feature M4, in a configuration in which a specific display is terminated based on the occurrence of a predetermined termination trigger, if the predetermined termination trigger occurs while an advance notification display is being displayed, a predetermined advance notification can be executed in addition to the advance notification display when the specific display is terminated. By executing the predetermined advance notification in addition to the advance notification display in a situation in which the specific display is terminated, it is possible to prevent the presence of the display notifying that a predetermined state may occur from being diminished and to emphasize the notification that a predetermined state may occur.

Feature M5. A gaming machine described in any one of Features M2 to M4, wherein the specific display is a display of a predetermined standby screen (demo image G82) that is initiated when the predetermined start trigger occurs when no game is being played.

According to feature M5, if a predetermined start trigger occurs when no game is being played, a predetermined standby screen is displayed, making it easy for players and amusement hall managers to confirm that no game is being played.

Feature M6. A gaming machine described in any one of Features M1 to M5, wherein the display content displayed in a predetermined position (bottom left) of the predetermined display means during the advance notification display is displayed in a specific position (center left) of the predetermined display means during the predetermined advance notification.

Feature M6 allows the display content displayed on the specified display means in the advance notification display to be displayed in a manner that is likely to attract the player's attention. It also eliminates the need to store image data for the specified advance notification separately from the image data stored for the advance notification display.

Feature M7. A gaming machine described in any one of Features M1 to M6, wherein the area in which the predetermined advance notification is displayed on the predetermined display means is larger than the area in which the advance notification display is displayed on the predetermined display means.

Feature M7 enhances the effectiveness of emphasizing the possibility of a predetermined state occurring when a predetermined advance notification is displayed in addition to a pre-notification display on the predetermined display means, compared to a configuration in which the area in which the predetermined advance notification is displayed on the predetermined display means is set to an area the same size as the area in which the advance notification display is displayed or an area narrower than the area in which the advance notification display is displayed.

Feature M8: The predetermined advance notification control means includes a means (a function of executing the processing of steps S4710 to S4711 in the production-side MPU 92) for terminating the predetermined advance notification based on the occurrence of a specific trigger (the end of the game while the pre-end emphasis image G81 is being displayed),
A gaming machine described in any one of features M1 to M7, characterized in that when the specific trigger occurs while the advance notification display and the specified advance notification are being displayed, the specified advance notification ends and the advance notification display continues.

Feature M8 allows the possibility of a predetermined state occurring to be emphasized when an advance warning display and a predetermined advance warning are being displayed. Furthermore, by continuing the advance warning display even after the predetermined advance warning has ended, it is possible to prevent interruption of the notification that a predetermined state may occur in a previous state.

Feature M9: The predetermined display control means includes a means for starting the advance notification display based on the fact that the previous stage state has been reached (a function for executing the processing of step S4605 of the production-side MPU 92 in the eighth embodiment),
A gaming machine described in any one of features M1 to M8, characterized in that the specified advance notification control means is equipped with a means for starting the specified advance notification based on the previous stage state being reached (a function for executing the processing of steps S4603 to S4604 of the presentation side MPU 92 in the eighth embodiment).

According to feature M9, by configuring the system so that a predetermined advance notification is displayed in addition to the advance notification display when the advance notification display begins, the player can be made more aware that they have entered the pre-stage state than in a configuration in which only the advance notification display is displayed out of the advance notification display and the predetermined advance notification.

Feature M10. A gaming machine described in any one of Features M1 to M9, wherein the predetermined state is a state in which a new game cannot be started (a state in which a game is forcibly terminated).

According to feature M10, when a predetermined trigger occurs, a predetermined advance notification is executed in addition to the advance notification display, thereby emphasizing the possibility that a new game may become unavailable. This prevents the player from entering a state where a new game cannot be started without being aware that a new game may become unavailable.

Feature M11: A predetermined update means (a function for executing the processes of steps S2107 and S2108 of the main MPU 72 in the first embodiment) for updating the end trigger information stored in the end trigger storage means (end determination counter 98b) as the game is executed to approach the end occurrence information (exceeding "65535" and causing a reversal from the maximum value to the minimum value);
A means for bringing the device into the predetermined state based on the termination trigger information stored in the termination trigger storage means becoming the termination occurrence information (a function for executing the processes of step S2110 and steps S2201 to S2204 of the main MPU 72 in the first embodiment);
Equipped with
The gaming machine described in feature M10 is characterized in that the content of the advance notification display corresponds to the termination trigger information stored in the termination trigger storage means.

Feature M11, which includes the configuration of feature M10 above and is configured so that a predetermined state will make it impossible to start a new game, displays an advance warning with content corresponding to the termination trigger information, allowing the player to understand, based on the advance warning, how the game is approaching a state where it will no longer be possible to start a new game. This prevents the player from becoming confused by a situation where it will no longer be possible to start a new game at a time the player does not anticipate.

Feature M12. A gaming machine as described in Feature M11, characterized in that the preceding state is entered when the termination trigger information stored in the termination trigger storage means becomes notification trigger information ("65385") that is reached before the termination occurrence information is reached.

Feature M12 is configured so that the advance notification display is not displayed until the end trigger information stored in the end trigger storage means reaches the notification trigger information. This gives the player the impression that a predetermined state is approaching when the end trigger information stored in the end trigger storage means reaches the notification trigger information and the advance notification display is initiated, compared to a configuration in which the advance notification display is displayed before the end trigger information stored in the end trigger storage means reaches the notification trigger information.

Feature M13. A gaming machine according to Feature M12, wherein the predetermined display control means terminates the advance notification display when the termination trigger information becomes notification cancellation information ("65285"), which is information that is further from the termination occurrence information than the notification trigger information, while the advance notification display is being executed (a function that executes the processing of step S4705 of the presentation-side MPU 92 in the first embodiment).

According to feature M13, if the termination trigger information becomes the notification cancellation information while the advance notification display is being displayed, the advance notification display is terminated. This prevents the advance notification display from continuing even in situations where the likelihood of the termination trigger information reaching the termination occurrence information has decreased. Furthermore, by setting the notification cancellation information as information that is farther away from the termination occurrence information than the notification trigger information, it is possible to prevent the advance notification display from repeatedly starting and ending in a short period of time on the specified display means.

Feature M14. Advantageous transition means (a function of executing the processing of steps S907 and S908 of the main MPU 72 in the first embodiment) that transitions to an advantageous game state (base AT state ST4, ending AT state ST5) based on the establishment of an advantageous transition condition (a positive determination in step S906);
A means for ending the advantageous gaming state based on the establishment of a predetermined ending condition (a positive determination in step S1207) in the advantageous gaming state (a function for executing the processing of step S1208 of the main MPU 72 in the first embodiment);
A pre-ending display control means (a function for executing the processing of step S4611 of the production side MPU 92 in the eighth embodiment) that causes the pre-ending display (display of the pre-ending establishment image G31) to be executed in the pre-ending display means when a predetermined situation occurs in which the establishment of the predetermined ending condition is approaching in the advantageous game state;
Equipped with
A gaming machine according to feature M12 or M13, wherein execution of the advance notification display takes priority over execution of the pre-ending display.

According to feature M14, the advantageous gaming state ends when a predetermined ending condition is met, making it possible to prevent the advantageous gaming state from continuing excessively. Furthermore, when a predetermined situation occurs in which the predetermined ending condition is about to be met during the advantageous gaming state, a pre-ending display is executed, making it possible to make the player aware that the predetermined ending condition is about to be met. In this case, the execution of the advance notification display takes priority over the execution of the pre-ending display. This makes it possible to focus on notifying the player that the predetermined state is approaching, rather than that the predetermined ending condition is about to be met.

In addition, the configurations of features M1 to M14 may be configured with any one or more of features A1 to A10, features B1 to B8, features C1 to C6, features D1 to D7, features E1 to E8, features F1 to F8, features G1 to G7, features H1 to H6, features I1 to I14, features J1 to J9, features K1 to K14, features L1 to L11, features M1 to M14, features N1 to N6, features O1 to O10, features P1 to P13, features Q1 to Q11, features R1 to R13, features S1 to S14, features T1 to T11, features U1 to U9, features V1 to V5, features W1 to W7, features X1 to X10, features Y1 to Y13, features Z1 to Z16, features a1 to a11, features b1 to b12, and features c1 to c9. This allows for a synergistic effect to be achieved through the combined configuration.

The inventions in the above Feature L group and Feature M group can solve the following problems:

Pachinko machines and slot machines are well-known gaming machines. For example, pachinko machines are equipped with a storage section for storing gaming balls. The gaming balls stored in the storage section are guided to a gaming ball launcher and launched toward the gaming area in response to the player's launch operation. Then, for example, when a gaming ball enters a ball entry section provided in the gaming area, a lottery process is executed, or a process is executed to increase the number of gaming balls available to the player.

In a slot machine, when a game value such as medals has been bet and the start lever is operated to start a new game, a lottery process is executed by the control means. Furthermore, when the lottery process is executed, the control means executes rotation start control, causing the reels to start spinning. If the stop button is operated while the reels are spinning, the control means executes rotation stop control, causing the reels to stop spinning. If the result after the reels have stopped spinning corresponds to a winning combination in the lottery process, a bonus corresponding to that winning combination is awarded to the player.

Here, in gaming machines such as those exemplified above, it is necessary to appropriately control the execution of notifications, and there is still room for improvement in this regard.

<Feature N group>
Feature N1. A first predetermined processing execution means (a function of executing the processing of steps S5005 to S5009 of the main MPU 72 in the ninth embodiment, a function of executing the processing of steps S5503 to S5510 of the main MPU 72 in the tenth embodiment) that executes a first predetermined processing (the processing of steps S5005 to S5009 of the ninth embodiment, and the processing of steps S5503 to S5510 of the main MPU 72 in the tenth embodiment);
a state information storage means (a function for executing the processing of steps S5002 to S5003 of the main MPU 72 in the ninth embodiment, and a function for executing the processing of steps S5501 to S5502 of the main MPU 72 in the tenth embodiment) for storing state information corresponding to the game state (whether it is in the BB state in the ninth embodiment, or whether it is in the CB internal state in the tenth embodiment) before the execution of the first predetermined processing in one game;
a second predetermined process execution means (a function for executing the freeze setting process of the main MPU 72 in the ninth embodiment, a function for executing the external output setting process of the main MPU 72, and a function for executing the game start process of the main MPU 72 in the tenth embodiment) for executing a second predetermined process (a freeze setting process, an external output setting process in the ninth embodiment, and a game start process in the tenth embodiment) after the first predetermined process is executed in one game;
Equipped with
A gaming machine characterized in that the second predetermined process is executed in accordance with the state information stored in the state information storage means.

Feature N1 allows the second predetermined process to be executed in accordance with the state information stored in the state information storage means before the first predetermined process is executed in the game, regardless of whether the game state changes between the start of the game and the execution of the second predetermined process in the game. This allows the process to be executed optimally.

Feature N2. A gaming machine as described in Feature N1, characterized in that the execution of the first predetermined process can change the gaming state to a gaming state different from the gaming state corresponding to the state information stored in the state information storage means before the execution of the first predetermined process.

Feature N2 makes it possible to execute the second predetermined process in a game according to the state information stored in the state information storage means before the first predetermined process is executed, regardless of whether the game state changes as a result of the execution of the first predetermined process. This prevents the second predetermined process from being changed as a result of the first predetermined process being executed and the game state being changed.

Feature N3. The gaming machine described in Feature N2 is characterized in that the second predetermined process execution means includes a predetermined standby state setting process execution means (a function of executing the processes of steps S5301 to S5308 of the main MPU 72 in the ninth embodiment) that executes, as the second predetermined process, a predetermined standby state setting process (the processes of steps S5301 to S5308 of the main MPU 72) that generates a predetermined standby state (a freeze state at the end of the base AT state, a freeze state during BB) in a manner corresponding to the state information stored in the state information storage means.

According to Feature N3, in a configuration having the configuration of Feature N2 above, in which the execution of a first predetermined process can change the gaming state to a gaming state different from the gaming state corresponding to the state information stored in the state information storage means before the execution of the first predetermined process, the second predetermined process executes processing to generate a predetermined standby state in a manner corresponding to the state information. As a result, even when the second predetermined process is executed after the first predetermined process is executed and the gaming state changes, the predetermined standby state generated in the second predetermined process can be set in a manner corresponding to the state information stored in the state information storage means before the execution of the first predetermined process. This prevents a situation in which the predetermined standby state corresponding to the gaming state before the execution of the first predetermined process is not set due to a change in the gaming state caused by the execution of the first predetermined process.

Feature N4. In the first predetermined process, a termination judgment is performed to determine whether or not the predetermined game state (base AT state ST4) is terminated (the judgment process of step S5101 of the main MPU 72 in the ninth embodiment).
A gaming machine described in feature N3, characterized in that when the termination judgment determines that the specified game state has terminated, the specified standby state setting processing execution means executes the specified standby state setting processing.

Feature N4 prevents the state of the predetermined standby state that is set when the predetermined game state ends from changing due to a change in the game state caused by the execution of the first predetermined process.

Feature N5. Equipped with a predetermined transmitting means (a function of executing the processing of steps S5409 and S5411 of the main MPU 72) for transmitting predetermined information (AT signal in the ninth embodiment) corresponding to the content of the game state,
In the first predetermined process, a termination determination is made to determine whether or not a predetermined game state (base AT state ST4) is terminated (the determination process of step S5101 of the main MPU 72 in the ninth embodiment).
A gaming machine described in feature N2, characterized in that in the second predetermined processing, the predetermined information corresponding to the status information stored in the status information storage means and the result of the termination judgment is transmitted.

According to Feature N5, in a configuration having the configuration of Feature N2 above, in which the execution of a first predetermined process can change the gaming state to a gaming state different from the gaming state corresponding to the state information stored in the state information storage means before the execution of the first predetermined process, the predetermined information can be transmitted in a manner corresponding to the combination of the gaming state before the execution of the first predetermined process and the gaming state at the time the second predetermined process is executed.

Feature N6. In the first predetermined process, a role lottery process (the process of steps S5503 to S5510 of the main MPU 72 in the tenth embodiment) for drawing a role is executed.
A gaming machine described in feature N1 or N2, characterized in that in the second predetermined processing, it is determined whether or not to set a specific state (CZ state) depending on the state information stored in the state information storage means.

According to feature N6, after the role selection process is executed, a specific state can be set depending on the game state before the role selection process is executed. This prevents the result of the role selection process from preventing the setting of a specific state that is set depending on the game state before the role selection process is executed.

In addition, the configurations of features N1 to N6 may be configured with any one or more of features A1 to A10, features B1 to B8, features C1 to C6, features D1 to D7, features E1 to E8, features F1 to F8, features G1 to G7, features H1 to H6, features I1 to I14, features J1 to J9, features K1 to K14, features L1 to L11, features M1 to M14, features N1 to N6, features O1 to O10, features P1 to P13, features Q1 to Q11, features R1 to R13, features S1 to S14, features T1 to T11, features U1 to U9, features V1 to V5, features W1 to W7, features X1 to X10, features Y1 to Y13, features Z1 to Z16, features a1 to a11, features b1 to b12, and features c1 to c9. This allows for a synergistic effect to be achieved through the combined configuration.

The inventions of the above feature group N can solve the following problems:

Pachinko machines and slot machines are well-known gaming machines. For example, pachinko machines are equipped with a storage section for storing gaming balls. The gaming balls stored in the storage section are guided to a gaming ball launcher and launched toward the gaming area in response to the player's launch operation. Then, for example, when a gaming ball enters a ball entry section provided in the gaming area, a lottery process is executed, or a process is executed to increase the number of gaming balls available to the player.

In a slot machine, when a game value such as medals has been bet and the start lever is operated to start a new game, a lottery process is executed by the control means. Furthermore, when the lottery process is executed, the control means executes rotation start control, causing the reels to start spinning. If the stop button is operated while the reels are spinning, the control means executes rotation stop control, causing the reels to stop spinning. If the result after the reels have stopped spinning corresponds to a winning combination in the lottery process, a bonus corresponding to that winning combination is awarded to the player.

Here, in gaming machines such as those exemplified above, processing needs to be executed appropriately, and there is still room for improvement in this regard.

<Feature O group>
Feature O1. A predetermined control means (main MPU 72) capable of transmitting predetermined information (a game start signal and a base AT signal in the eleventh embodiment);
A specific control means (value number side MPU 142) capable of receiving the predetermined information from the predetermined control means;
Equipped with
The specific control means includes an external transmission means (a function of executing the processes of steps S5921 to S5922 in the value number side MPU 142) that transmits the content of the predetermined information received from the predetermined control means to the outside (card unit 130) based on the occurrence of a predetermined output trigger (the passage of 300 milliseconds),
The predetermined control means
a predetermined change processing execution means (a function for executing the processing of step S6104 or step S6108 in the main MPU 72, a function for executing the processing of step S6116 or step S6121 in the main MPU 72) for executing predetermined change processing (ON processing of the game start signal or OFF processing of the game start signal, ON processing of the base AT signal or OFF processing of the base AT signal) for changing the content of the predetermined information from a first content (LOW level or HIGH level of the game start signal, LOW level or HIGH level of the base AT signal) to a second content (HIGH level or LOW level of the game start signal, HIGH level or LOW level of the base AT signal);
A predetermined time setting means (a function for executing the processes of steps S6106 and S6118 of the main MPU 72 in the eleventh embodiment) for setting a predetermined time (300.98 milliseconds) based on the execution of the predetermined change process;
a specific change processing execution means (a function for executing the processing of step S6108 or step S6104 in the main MPU 72, a function for executing the processing of step S6121 or step S6116 in the main MPU 72) for executing specific change processing (a game start signal OFF processing or a game start signal ON processing, a base AT signal OFF processing or a base AT signal ON processing) for changing the content of the predetermined information from the second content to the first content;
When the specific change process is executed after the execution of the predetermined change process, a means for preventing the specific change process from being executed until the predetermined time has elapsed (a function for executing the process of step S6103 or step S6107 of the main MPU 72, and a function for executing the process of step S6115 or step S6120 of the main MPU 72);
A gaming machine characterized by comprising:

Feature O1 reduces the possibility that, after a predetermined change process for changing the content of the specified information from first content to second content has been performed, a specific change process for changing the content of the specified information from second content to first content will be performed before the second content of the specified information is transmitted to the outside. This reduces the possibility that the specific control means will not transmit the second content to the outside despite the predetermined change process for changing the content of the specified information from first content to second content having been performed.

Feature O2. A gaming machine according to Feature O1, wherein the predetermined time is set to a length equal to or greater than the occurrence cycle of the predetermined output trigger.

According to Feature O2, after a predetermined change process is performed to change the content of the specified information from first content to second content, the second content of the specified information is transmitted to an external device, and then a specific change process is performed to change the content of the specified information from the second content to the first content.

Feature O3. The predetermined control means is
A specific time setting means (a function for executing the process of step S6118 or step S6106 of the main MPU 72 in the eleventh embodiment) for setting a specific time (300.98 milliseconds) based on the execution of the specific change process;
When the predetermined change process is executed after the specific change process is executed, a means for preventing the predetermined change process from being executed until the specific time has elapsed (a function for executing the process of step S6107 or step S6103 of the main MPU 72, and a function for executing the process of step S6120 or step S6115 of the main MPU 72);
A gaming machine according to feature O1 or O2, characterized in that it is equipped with:

Feature O3 reduces the possibility that, after specific change processing has been performed to change the content of the specified information from the second content to the first content, a specific change processing to change the content of the specified information from the first content to the second content will be performed before the first content of the specified information is transmitted to the outside. This reduces the possibility that the specific control means will not transmit the first content to the outside despite the specific change processing having been performed.

Feature O4. A gaming machine according to Feature O3, characterized in that it is equipped with a means (a function for executing the processing of step S6107 of the main MPU 72 in the 11th embodiment) that causes the specific change processing execution means to execute the specific change processing based on the lapse of the specified time after the specific change processing is executed.

According to Feature O4, in a configuration that includes the configuration of Feature O1 above and ensures a predetermined time as the period from when a predetermined change process is executed until when a specific change process is executed, and in a configuration that includes the configuration of Feature O3 above and ensures a specific time as the period from when the specific change process is executed until when a predetermined change process is executed, the period from when the predetermined change process is executed until when the specific time has elapsed after the specific change process is executed can be made the shortest period. This reduces the possibility of an opportunity to execute the next predetermined change process occurring between when the predetermined change process is executed and when the specific time has elapsed after the specific change process is executed.

Feature O5. The predetermined change process is executed by the predetermined change process execution means based on the occurrence of a predetermined execution trigger (starting or ending of the game in the eleventh embodiment), which can occur once in one game;
A gaming machine according to feature O4, characterized in that the predetermined execution trigger can occur once in each successive game.

According to Feature O5, in a configuration in which a predetermined execution trigger can occur once in each of consecutive games, the configuration of Feature O4 is included, and the specific change processing is executed based on the passage of a predetermined time after the execution of the specific change processing. This reduces the possibility of a predetermined execution trigger occurring in a game following the one game between the execution of the specific change processing based on the occurrence of a predetermined execution trigger in the one game and the passage of a specific time after the execution of the specific change processing.

Feature O6. A predetermined trigger (the start of rotation of the reels 32L, 32M, and 32R in the eleventh embodiment) occurs in each game.
a means for waiting for the occurrence of the predetermined trigger in a game following the game until a predetermined waiting period (a waiting time of 4.1 seconds) has elapsed since the occurrence of the predetermined trigger in the game (a function for executing the process of step S5711 of the main MPU 72 in the eleventh embodiment);
A gaming machine described in feature O5, characterized in that the specified waiting period is set to be at least twice as long as the total time of the specified time and the specific time (601.96 milliseconds in the 11th embodiment).

Feature O6 includes the configuration of Feature O1 above, which ensures a predetermined time as the period from when a predetermined change process is executed until when a specific change process is executed; and the configuration of Feature O3 above, which ensures a specific time as the period from when the specific change process is executed until when a predetermined change process is executed. In this configuration, the predetermined waiting period is set to be at least twice the total length of the predetermined time and the specific time, thereby preventing the occurrence of an event in which a predetermined execution trigger following the predetermined execution trigger occurs for three or more consecutive games between when a predetermined change process is executed based on the occurrence of a predetermined execution trigger and when the specific time has elapsed after the execution of the specific change process. This prevents a cumulative increase in the period from when a predetermined execution trigger occurs until when the predetermined change process is executed based on the occurrence of the predetermined execution trigger.

Feature O7. A gaming machine described in any one of Features O3 to O6, wherein the specific time is the same length as the predetermined time.

According to Feature O7, the period from when a predetermined change process is performed until a specific change process can be executed can be the same as the period from when a specific change process is performed until a predetermined change process can be executed. This makes it easier for the specific control means that receives the predetermined information to identify the period during which the content of the predetermined information can be changed from the first content to the second content, and the period during which the content of the predetermined information can be changed from the second content to the first content.

Feature O8. The device includes time storage means (first interval setting counter 96p, second interval setting counter 96q) for setting the predetermined time,
A gaming machine according to any one of features O3 to O7, wherein the specific time is also set in the time storage means.

Feature O8 reduces the data capacity of the storage means required to set the predetermined time and the specific time, compared to a configuration in which a storage means for setting the specific time is provided as a separate storage means from a storage means for setting the predetermined time.

Feature O9. A gaming machine described in any one of Features O1 to O8, characterized in that the predetermined change processing is executed by the predetermined change processing execution means upon the start of a game.

Feature O9 makes it possible to know, from outside the gaming machine, that a game has started on the gaming machine based on the content of the specified information transmitted by the external transmission means.

Feature O10. A gaming machine described in any one of Features O1 to O8, characterized in that the predetermined change process is executed by the predetermined change process execution means based on the gaming state at the end of the game being a predetermined gaming state (base AT state ST4 in the 11th embodiment), and the predetermined change process is not executed if the gaming state at the end of the game is a gaming state different from the predetermined gaming state (normal gaming state ST1, CB state, or ending AT state ST5).

Feature O10 makes it possible to determine, outside the gaming machine, whether the gaming state at the end of a game on the gaming machine was a predetermined gaming state, based on the content of the predetermined information transmitted by the external transmission means.

In addition, the configurations of features O1 to O10 may be configured with any one or more of features A1 to A10, features B1 to B8, features C1 to C6, features D1 to D7, features E1 to E8, features F1 to F8, features G1 to G7, features H1 to H6, features I1 to I14, features J1 to J9, features K1 to K14, features L1 to L11, features M1 to M14, features N1 to N6, features O1 to O10, features P1 to P13, features Q1 to Q11, features R1 to R13, features S1 to S14, features T1 to T11, features U1 to U9, features V1 to V5, features W1 to W7, features X1 to X10, features Y1 to Y13, features Z1 to Z16, features a1 to a11, features b1 to b12, and features c1 to c9. This allows for a synergistic effect to be achieved through the combined configuration.

The invention of the above feature group O can solve the following problems:

Pachinko machines and slot machines are well-known gaming machines. For example, pachinko machines are equipped with a storage section for storing gaming balls. The gaming balls stored in the storage section are guided to a gaming ball launcher and launched toward the gaming area in response to the player's launch operation. Then, for example, when a gaming ball enters a ball entry section provided in the gaming area, a lottery process is executed, or a process is executed to increase the number of gaming balls available to the player.

In a slot machine, when a game value such as medals has been bet and the start lever is operated to start a new game, a lottery process is executed by the control means. Furthermore, when the lottery process is executed, the control means executes rotation start control, causing the reels to start spinning. If the stop button is operated while the reels are spinning, the control means executes rotation stop control, causing the reels to stop spinning. If the result after the reels have stopped spinning corresponds to a winning combination in the lottery process, a bonus corresponding to that winning combination is awarded to the player.

In gaming machines such as those exemplified above, information needs to be transmitted efficiently, and there is still room for improvement in this regard.

<Feature P group>
Feature P1: Equipped with target game setting means (a function of executing the processing of steps S7407 to S7408 of the master MPU 72 in the fourteenth and fifteenth embodiments) for generating a specific target game (penalty target game) based on the occurrence of a specific event (penalty event) based on the player's operation,
When a game is played as the specific target game, the game is played under conditions that are less advantageous to the player than when the game is played as a game that is not the specific target game,
A gaming machine characterized in that a game in which the specific event occurs becomes a game that is not the specific target game, and games following the game in which the specific event occurred are played as the specific target games.

Feature P1 increases the likelihood that a player will perform an operation that will cause a specific event to occur, as this will result in a specific target game occurring.

A game in which a specific event occurs can be executed without becoming a specific target game, and games following the game in which the specific event occurred can be executed as specific target games. This allows games following the game in which the specific event occurred to be executed as specific target games from the start of that game.

Feature P2: The specific target game that is set based on the occurrence of the specific event is one game,
A gaming machine according to feature P1, characterized in that the game following the game in which the specific event occurs is played as the specific target game.

According to feature P2, by setting only one specific target game based on the occurrence of a specific event, if a player accidentally triggers a specific event, the impact of the specific event will not extend to multiple games. Furthermore, by setting the game following the game in which the specific event occurred as the specific target game, it is possible to make it easier for the player to understand that a specific target game has been set based on the occurrence of a specific event.

Feature P3: In a game that is not the specific target game, a predetermined transition lottery execution means (a function of executing the processing of step S7511 of the main MPU 72) is provided that executes a predetermined transition lottery process (AT lottery process) to determine whether or not to transition to a predetermined gaming state (base AT state ST4) based on the occurrence of a predetermined lottery trigger (starting of a game in the normal gaming state ST1),
The gaming machine according to feature P1 or P2, wherein in the specific target game, even if the predetermined lottery trigger occurs, the predetermined transition lottery process is not executed.

Feature P3 means that if an operation that causes a specific event is performed, the opportunity for the predetermined transition lottery process will be lost, thereby increasing the likelihood that the player will perform an operation that will not cause the specific event to occur.

Feature P4: A predetermined control means (main MPU 72) that executes processing to progress the game;
A specific control means (performance-side MPU 92) for executing a process for performing a performance;
Equipped with
The specific control means includes specific determination execution means (a function for executing the process of step S7718 of the production-side MPU 92 in the fourteenth embodiment, a function for executing the process of step S7820 of the production-side MPU 92 in the fifteenth embodiment) for determining whether or not the specific event has occurred at the timing when the specific event may occur (the timing when the first stop start command is received from the main-side MPU 72),
A gaming machine described in any one of features P1 to P3, characterized in that the predetermined control means is equipped with a predetermined judgment execution means (a function of executing the processing of step S7407 of the main MPU 72 in the 14th and 15th embodiments) that determines whether the specific event has occurred at a timing later than the timing at which the specific event could occur (the timing at which the rotation of all reels 32L, 32M, 32R stops).

According to feature P4, by configuring the predetermined determination execution means to determine whether a specific event has occurred in a game at a timing before the game ends, it is possible to execute the game following the game in which the specific event occurred as a specific target game. In this configuration, by using the specific determination execution means to determine whether a specific event has occurred at a timing when the specific event could occur, if a specific event occurs, it is possible to execute a presentation corresponding to the occurrence of the specific event at the timing when the specific event occurred.

Feature P5: In a game that is not the specific target game, a presentation control means (a function of executing the processes of steps S7708, S7717, and S7724 in the presentation-side MPU 92) is provided to execute a predetermined presentation corresponding to the game (a presentation during the game corresponding to the gaming state),
The gaming machine according to any one of features P1 to P4, wherein in the specific target game, the predetermined effect corresponding to the specific target game is not executed.

Feature P5 makes it easier for players to understand that a specific target game is being played based on the absence of a predetermined effect. Furthermore, compared to a configuration in which a predetermined effect corresponding to a specific target game is executed, the amount of data stored for the effect to be executed can be reduced.

Feature P6: Equipped with a predetermined display means (image display device 63),
The effect control means includes a means for performing, as the predetermined effect in a game other than the specific target game, a predetermined effect corresponding to the game (a game effect corresponding to a gaming state) (a function for executing the processes of steps S7708, S7717, and S7724 in the effect side MPU 92);
A gaming machine described in feature P5, characterized in that in the specific target game, the predetermined effect-compatible display displayed on the predetermined display means is not updated from the predetermined effect-compatible display corresponding to the game immediately preceding the specific target game.

Feature P6 makes it unnecessary to store data for executing a predetermined effect-compatible display corresponding to a specific target game. This reduces the amount of data that needs to be stored to execute a predetermined effect-compatible display.

Feature P7. A gaming machine as described in Feature P6, wherein the display on the predetermined display means during the specific target game is a display (monochrome display) that indicates that the game being played is the specific target game.

Feature P7, which includes the configuration of feature P6 and in which the predetermined effect-compatible display displayed on the predetermined display means in a specific target game is not updated from the predetermined effect-compatible display corresponding to the game immediately preceding the specific target game, allows players and amusement hall managers to know that the game being played is a specific target game based on the display on the predetermined display means.

Feature P8. A gaming machine described in any one of Features P1 to P7, characterized in that it is equipped with specific event response effect control means (a function for executing the processing of step S7720 of the performance-side MPU 92 in the fourteenth embodiment, and a function for executing the processing of step S7815 of the performance-side MPU 92 in the fifteenth embodiment) that, based on the occurrence of the specific event, executes a specific event response effect (switching to monochrome display) corresponding to the occurrence of the specific event.

Feature P8 allows the player to understand that a specific event has occurred based on the execution of a specific event-responsive presentation.

Feature P9. A gaming machine as described in Feature P8, characterized in that the specific event-related effect is initiated at the timing of the specific event occurrence based on the occurrence of the specific event.

Feature P9 allows players and amusement hall managers to understand that a specific event has occurred at the time a specific event response effect starts, based on the start of the specific event response effect.

Feature P10. A gaming machine as described in Feature P8, characterized in that, upon the occurrence of the specific event, the specific event-related effect is initiated in the game following the game in which the specific event occurred.

Feature P10 allows players and amusement hall managers to know that a specific target game is being played based on the execution of a specific event-responsive presentation.

Feature P11. Equipped with a predetermined display means (image display device 63),
A gaming machine described in any one of features P8 to P10, characterized in that the specific event-responsive presentation is a presentation in which the color displayed on the specified display means is changed to a color change state (monochrome display in the 14th and 15th embodiments).

Feature P11 eliminates the need to store image data for executing specific event-responsive effects, and allows the specific event-responsive effects to be executed by changing the color displayed on the specified display means. This reduces the amount of image data stored to execute the effects.

Feature P12. A color notification effect control means (a function for executing the processing of steps S7709 to S7713 of the performance-side MPU 92 in the 14th embodiment, a function for executing the processing of steps S7809 to S7813 of the performance-side MPU 92 in the 15th embodiment) is provided to execute a color notification effect (color navigation effect) that displays a predetermined suggestive image (color navigation image G88) including a color that suggests the possibility of winning a predetermined role (cherry), on the predetermined display means,
A gaming machine as described in feature P11, characterized in that the color change state occurs in a manner that makes it impossible or difficult for the player to recall the predetermined role based on the color of the predetermined suggestive image displayed on the predetermined display means.

According to feature P12, when a specific event occurs in a game in which a color notification effect is executed, it is possible to create a state in which a player is unable or difficult to imagine a specific role even when looking at a specific suggestive image displayed on a specific display means. This reduces the possibility that a player may feel that they may have won a specific role based on the display of a specific suggestive image while a specific target game is being played.

Feature P13. A gaming machine described in Feature P11 or P12, wherein the color change state continues until the specific target game ends.

According to feature P13, players and the amusement hall manager can understand that the effects of the specific event are still being felt until the specific target game ends, based on the display mode on the specified display means.

In addition, the configuration of features P1 to P13 may be configured with any one or more of features A1 to A10, features B1 to B8, features C1 to C6, features D1 to D7, features E1 to E8, features F1 to F8, features G1 to G7, features H1 to H6, features I1 to I14, features J1 to J9, features K1 to K14, features L1 to L11, features M1 to M14, features N1 to N6, features O1 to O10, features P1 to P13, features Q1 to Q11, features R1 to R13, features S1 to S14, features T1 to T11, features U1 to U9, features V1 to V5, features W1 to W7, features X1 to X10, features Y1 to Y13, features Z1 to Z16, features a1 to a11, features b1 to b12, and features c1 to c9. This allows for a synergistic effect to be achieved through the combined configuration.

<Feature Q group>
Feature Q1. Equipped with target game setting means (a function for executing the processes of steps S7407 to S7408 of the master MPU 72 in the fourteenth and fifteenth embodiments, and a function for executing the processes of steps S8001 and S8004 of the master MPU 72 in the sixteenth and seventeenth embodiments) for generating a specific target game (penalty target game) based on the occurrence of a specific event (penalty event) based on the player's operation,
When a game is played as the specific target game, the game is played under conditions that are less advantageous to the player than when the game is played as a game that is not the specific target game,
A gaming machine characterized in that after the specific event occurs, the execution mode of the presentation during the execution of the specific target game becomes a specific event-responsive mode (a mode in which a monochrome display is performed, and a mode in which a new presentation is not executed during the game).

Feature Q1 means that if an operation that causes a specific event is performed, a specific target game will occur, increasing the likelihood that the player will perform an operation that will prevent the specific event from occurring.

Based on the fact that the execution mode of the effect is a specific event response mode, players and amusement hall managers can easily understand that a specific event has occurred and that they are being affected by the occurrence of that specific event.

Feature Q2. Equipped with a predetermined display means (image display device 63) on which the performance is executed,
A gaming machine described in feature Q1, characterized in that when the execution mode of the performance becomes the specific event corresponding mode, the color display mode of the specified display means becomes a display mode different from when the specific event corresponding mode is not in effect.

Feature Q2 eliminates the need to store image data for executing the specific event response mode, and allows players and amusement hall managers to easily understand that a specific event has occurred and that they are being affected by the occurrence of that specific event, based on the color display mode on the specified display means.

Feature Q3. A color notification effect control means (a function for executing the processing of steps S7709 to S7713 of the performance-side MPU 92 in the 14th embodiment, a function for executing the processing of steps S7809 to S7813 of the performance-side MPU 92 in the 15th embodiment) is provided to execute a color notification effect (color navigation effect) that displays a predetermined suggestive image (color navigation image G88) including a color that suggests the possibility of winning a predetermined role (cherry), on the predetermined display means;
A gaming machine as described in feature Q2, characterized in that when the execution mode of the performance becomes the specific event corresponding mode, the color display mode on the specified display means becomes a mode in which the player is unable to recall or finds it difficult to recall the specified role based on the color of the specified suggestive image displayed on the specified display means.

According to feature Q3, after a specific event occurs, while a specific target game is being played, it is possible to make it so that the player is unable or difficult to imagine the specific role even when looking at the specific suggestion image displayed on the specific display means. This reduces the possibility that, while a specific target game is being played after a specific event occurs, the player may feel that they may have won the specific role based on the display of the specific suggestion image.

Feature Q4. A gaming machine according to any one of Features Q1 to Q3, characterized in that it is equipped with means for changing the execution mode of the effect to the specific event-responsive mode at the timing of the specific event occurrence based on the occurrence of the specific event (a function for executing the processing of steps S7718 to S7720 by the effect-side MPU 92 in the fourteenth embodiment, and a function for executing the processing of steps S8314 and S8316 by the effect-side MPU 92 in the sixteenth embodiment).

Feature Q4 allows the execution mode of the effect to be changed to the specific event-responsive mode when a specific event occurs, making it easier for players to understand the correspondence between the occurrence of a specific event and the change in the execution mode of the effect to the specific event-responsive mode.

Feature Q5. A gaming machine described in any one of Features Q1 to Q4, wherein the state in which the effect execution mode is the specific event response mode continues until the specific target game ends.

According to feature Q5, players and the amusement hall manager can understand that they are being affected by the occurrence of a specific event based on the fact that the execution mode of the effect is in a specific event response mode until the specific target game ends.

Feature Q6. In a game that is not the specific target game, a presentation control means (a function that executes the processes of steps S7708, S7717, and S7724 of the presentation-side MPU 92 in the fourteenth embodiment) is provided to execute a predetermined presentation corresponding to the game (a presentation during the game corresponding to the game state),
A gaming machine according to any one of features Q1 to Q5, wherein in the specific target game, the predetermined effect corresponding to the specific target game is not executed.

Feature Q6 makes it easier for players to understand that a specific target game is being played based on the absence of a predetermined effect. Furthermore, compared to a configuration in which a predetermined effect corresponding to a specific target game is executed, the amount of data stored for the effect to be executed can be reduced.

Feature Q7. Equipped with a predetermined display means (image display device 63) on which the performance is performed,
The effect control means includes a means for performing, as the predetermined effect in a game other than the specific target game, a predetermined effect corresponding to the game (a game effect corresponding to a gaming state) (a function for executing the processes of steps S7708, S7717, and S7724 of the effect side MPU 92 in the fourteenth embodiment),
A gaming machine described in feature Q6, characterized in that in the specific target game, the predetermined effect-compatible display displayed on the predetermined display means is not updated from the predetermined effect-compatible display corresponding to the game immediately preceding the specific target game.

Feature Q7 makes it unnecessary to store data for executing a predetermined effect-compatible display corresponding to a specific target game. This reduces the amount of data that needs to be stored to execute a predetermined effect-compatible display.

Feature Q8. In a game that is not the specific target game, a predetermined transition lottery execution means (a function of executing the processing of step S7511 of the main MPU 72 in the 14th embodiment) is provided that executes a predetermined transition lottery process (AT lottery process) to determine whether or not to transition to a predetermined gaming state (base AT state ST4) based on the occurrence of a predetermined lottery trigger (starting of a game in the normal gaming state ST1),
A gaming machine according to any one of features Q1 to Q7, characterized in that in the specific target game, even if the predetermined lottery trigger occurs, the predetermined transition lottery process is not executed.

According to feature Q8, if an operation that causes a specific event to occur is performed, the opportunity for the predetermined transition lottery process will be lost, thereby increasing the likelihood that the player will perform an operation that will not cause the specific event to occur.

Feature Q9. A gaming machine described in any one of Features Q1 to Q8, in which the game in which the specific event occurred is not the specific target game, and games subsequent to the game in which the specific event occurred are played as the specific target games.

According to feature Q9, a game in which a specific event occurs is executed without becoming a specific target game, and games following the game in which the specific event occurred can be executed as specific target games. This allows games following the game in which the specific event occurred to be executed as specific target games from the start of the game.

Feature Q10. The specific target game that is set based on the occurrence of the specific event is one game,
A gaming machine according to feature Q9, characterized in that the game following the game in which the specific event occurs is played as the specific target game.

According to feature Q10, by setting only one specific target game based on the occurrence of a specific event, if a player accidentally triggers a specific event, the impact of the specific event's occurrence will not extend to multiple games. Furthermore, by setting the game following the game in which the specific event occurred as the specific target game, it is possible for the player to easily understand that a specific target game has been set based on the occurrence of a specific event.

Feature Q11. A predetermined control means (main MPU 72) that executes processing to progress the game;
A specific control means (performance-side MPU 92) for executing a process for performing a performance;
Equipped with
The specific control means includes specific determination execution means (a function for executing the process of step S7718 of the production-side MPU 92 in the fourteenth embodiment, a function for executing the process of step S7820 of the production-side MPU 92 in the fifteenth embodiment) for determining whether or not the specific event has occurred at the timing when the specific event may occur (the timing when the first stop start command is received from the main-side MPU 72),
A gaming machine described in any one of features Q1 to Q10, characterized in that the predetermined control means is equipped with a predetermined judgment execution means (a function of executing the processing of step S7407 of the main MPU 72 in the 14th and 15th embodiments) that determines whether the specific event has occurred at a timing later than the timing at which the specific event could occur (the timing at which the rotation of all reels 32L, 32M, 32R stops).

According to Feature Q11, by configuring the predetermined determination execution means to determine whether a specific event has occurred in a game at a timing before the game ends, it becomes possible to execute the game following the game in which the specific event occurred as a specific target game. In this configuration, by using the specific determination execution means to determine whether a specific event has occurred at a timing when the specific event could occur, if a specific event occurs, it becomes possible to execute an effect corresponding to the occurrence of the specific event at the timing when the specific event occurred.

In addition, the configurations of features Q1 to Q11 may be configured with any one or more of features A1 to A10, features B1 to B8, features C1 to C6, features D1 to D7, features E1 to E8, features F1 to F8, features G1 to G7, features H1 to H6, features I1 to I14, features J1 to J9, features K1 to K14, features L1 to L11, features M1 to M14, features N1 to N6, features O1 to O10, features P1 to P13, features Q1 to Q11, features R1 to R13, features S1 to S14, features T1 to T11, features U1 to U9, features V1 to V5, features W1 to W7, features X1 to X10, features Y1 to Y13, features Z1 to Z16, features a1 to a11, features b1 to b12, and features c1 to c9. This allows for a synergistic effect to be achieved through the combined configuration.

The inventions in the above Feature P group and Feature Q group can solve the following problems:

Pachinko machines and slot machines are well-known gaming machines. For example, pachinko machines are equipped with a storage section for storing gaming balls. The gaming balls stored in the storage section are guided to a gaming ball launcher and launched toward the gaming area in response to the player's launch operation. Then, for example, when a gaming ball enters a ball entry section provided in the gaming area, a lottery process is executed, or a process is executed to increase the number of gaming balls available to the player.

In a slot machine, when a game value such as medals has been bet and the start lever is operated to start a new game, a lottery process is executed by the control means. Furthermore, when the lottery process is executed, the control means executes rotation start control, causing the reels to start spinning. If the stop button is operated while the reels are spinning, the control means executes rotation stop control, causing the reels to stop spinning. If the result after the reels have stopped spinning corresponds to a winning combination in the lottery process, a bonus corresponding to that winning combination is awarded to the player.

However, gaming machines such as those exemplified above need to offer suitable gameplay, and there is still room for improvement in this regard.

<Feature R group>
Feature R1. A means for transitioning to a second situation (second section SC2) based on the establishment of a situation transition condition (a win occurs at any index value IV) in the first situation (first section SC1) (a function for executing the processing of steps S7902 to S7904 of the main MPU 72 in the 16th and 17th embodiments);
a predetermined number of games storage means (display game number counter 94p) for storing predetermined number of games information (the value of the display game number counter 94p in the sixteenth and seventeenth embodiments) to be displayed on a predetermined display means (image display device 63);
a predetermined number of games update means (a function for executing the processing of steps S8405 to S8406 of the presentation side MPU 92 in the 16th embodiment, and a function for executing the processing of steps S8605 to S8607 of the presentation side MPU 92 in the 17th embodiment) for updating the predetermined number of games information in a predetermined update manner (a manner in which the processing for adding 1 to the value of the display game number counter 94p is performed and the processing for subtracting 1 from the value of the display game number counter 94p is not performed) based on the execution of a game;
a target game setting means (a function of executing the processing of steps S8001 and S8004 of the master MPU 72 in the 16th and 17th embodiments) for setting a specific target game (penalty target game) based on the occurrence of a specific event (penalty event) based on the player's operation;
Equipped with
When a game is played as the specific target game, the game is played under conditions that are less advantageous to the player than when the game is played as a game that is not the specific target game,
A gaming machine characterized in that when a game is started in the first situation and the specific target game is set based on the occurrence of the specific event in the game, the specific game number information is updated in the specific update manner by the specific game number update means based on the execution of the specific target game.

Feature R1 increases the likelihood that a player will perform an operation that will cause a specific event to occur, as this will result in a specific target game occurring.

It is possible to prevent the update mode of the specified number of games played from changing between when a specific event occurs in a game started in the first situation and when that specific event does not occur.

Feature R2: In a game that is not the specific target game, a predetermined transition lottery execution means (a function of executing the processing of step S8204 of the main MPU 72 in the 16th and 17th embodiments) is provided that executes a predetermined transition lottery process (AT lottery process) to determine whether or not to transition to a predetermined gaming state (base AT state ST4) based on the occurrence of a predetermined lottery trigger (starting of a game in the normal gaming state ST1),
A gaming machine according to feature R1, characterized in that in the specific target game, even if the predetermined lottery trigger occurs, the predetermined transition lottery process is not executed.

Feature R2 means that if an operation that triggers a specific event is performed, the opportunity for a predetermined transition lottery will be lost, increasing the likelihood that the player will perform an operation that will not trigger the specific event.

Feature R3. A gaming machine according to Feature R1 or R2, in which a game is set as the specific target game based on the occurrence of the specific event in that game.

Feature R3 makes it easy for players to understand the correspondence between the occurrence of a specific event and the setting of a specific target game based on the occurrence of that specific event.

Feature R4. Equipped with specific state setting means (a function to execute the processing of steps S8207 to S8212 of the main MPU 72 in the 16th and 17th embodiments) that generates a specific state (CZ state) based on the occurrence of a specific transition trigger (a win to transition to the CZ state in the first CZ lottery process or the second CZ lottery process, or a win with any index value IV in a game started in a state in which the first section SC1 and the CB internal state are both in the first section SC1 and the CB internal state),
A gaming machine described in any one of features R1 to R3, characterized in that in the specific state, the specified display means does not display the specified game number information stored in the specified game number memory means.

Feature R4 prevents the display corresponding to the predetermined number of games played from catching the player's eye in certain situations, thereby allowing the player to focus their attention on the presentation content executed in those specific situations.

Feature R5. A second situation initialization processing execution means (a function of executing the processing of step S1208 of the main MPU 72) that executes a second situation initialization processing (initialization processing of the second section SC2) that ends the second situation and sets the second situation to the first situation based on the fact that the end condition of the second situation is satisfied;
A specific situation setting means (a function for executing the processing of step S406 of the main MPU 72) that transitions from a specific situation (non-CB internal state) to a specific situation (CB internal state) based on the occurrence of a predetermined transition trigger (a win occurs at the index value IV to which the CB winning data is set);
Equipped with
The specific situation is maintained even if the second situation initialization process is executed in the specific situation,
A gaming machine according to feature R4, characterized in that the specific transition trigger occurs when a game is executed in a situation that is the specific situation and the first situation.

According to feature R5, the state after the second situation initialization process is executed based on the second situation termination condition being satisfied can be made to be a state in which a specific state is more likely to be set than a state in which the second situation initialization process is not executed. This makes it possible to make the state after the second situation termination condition is satisfied and the second situation ends to be more advantageous to the player than a state in which the second situation initialization process is not executed.

Feature R6. A gaming machine as described in Feature R4 or R5, wherein if a specific target game is set based on the occurrence of the specific event in a game started in the specific state, even if the specific target game is executed, the specific target game is not counted as one game in the predetermined game count storage means.

Feature R6 prevents changes to the content of the display corresponding to the predetermined number of games played after the end of a specific state in which no display corresponding to the predetermined number of games played is made, even if a specific target game is played one or more times.

Feature R7: A predetermined initialization process execution means (a function for executing the process of step S106 of the main MPU 72) is provided that executes a predetermined initialization process (a process for clearing all data within the area) based on the occurrence of a predetermined event (turning on the setting key) when the supply of operating power starts,
If the predetermined event does not occur when the supply of operating power starts, the predetermined initialization process is not executed.
A gaming machine described in any one of features R1 to R6, characterized in that it is equipped with a game number information initialization means (a function of executing the processing of steps S8401 to S8404 of the presentation side MPU 92 in the 16th and 17th embodiments) that sets the predetermined game number memory means to a state in which the initial value of the predetermined game number information ("0" in the 16th and 17th embodiments) is set, both when the predetermined initialization processing is executed and when the predetermined initialization processing is not executed based on the start of the supply of operating power.

According to feature R7, when the supply of operating power begins, the predetermined number of games memory means can be set to an initial value regardless of whether the predetermined initialization process has been performed or not. This prevents the player from knowing whether the predetermined initialization process has been performed based on the display corresponding to the predetermined number of games information displayed by the predetermined display means.

Feature R8: A predetermined initialization process execution means (a function for executing the process of step S106 of the main MPU 72) is provided that executes a predetermined initialization process (a process for clearing all data within the area) based on the occurrence of a predetermined event (the ON operation of the setting key and the pressing of the reset button 56) when the supply of operating power starts,
A gaming machine described in any one of features R1 to R7, characterized in that the first situation is reached when the specified initialization process is executed.

Feature R8 has the configuration of feature R1 above, and is configured such that when a game is started in the first situation and a specific target game is set based on the occurrence of a specific event in the game, the specific number of games information is updated in a predetermined update manner based on the execution of the specific target game. Therefore, when a specific target game is set based on the occurrence of a specific event in a game started after the execution of a predetermined initialization process, the specific target game can be counted as one game in the specific number of games storage means.

Feature R9: A means for setting predetermined return information (information "1" set in the normal return flag of the performance-side RAM 94) based on the fact that the supply of operating power has started and the predetermined initialization process has not been executed (a function for executing the processes of steps S8401 to S8402 of the performance-side MPU 92 in the sixteenth embodiment, and a function for executing the processes of steps S8601 to S8602 of the performance-side MPU 92 in the seventeenth embodiment) is provided,
A gaming machine described in feature R8, characterized in that when the specific target game is set based on the occurrence of the specific event in a game started in the second situation, the specific target game is counted as one game in the specified game number memory means based on the specified return information being set.

According to feature R9, when the supply of operating power is started without executing a predetermined initialization process and the second state is maintained, if a specific event occurs in a game started after the supply of operating power is started and a specific target game is set, the specific target game can be counted as one game in the predetermined game count storage means.

With the configuration of feature R8 above, if a specific target game is set based on the occurrence of a specific event in a game that started after the supply of operating power started and the execution of the specified initialization process, the specific target game is counted as one game in the specified number of games storage means. This reduces the possibility that a player will be able to determine whether the specified initialization process has been executed based on the display corresponding to the specified number of games information that is displayed after the supply of operating power started.

Feature R10. A gaming machine as described in Feature R9, characterized in that if the specific event occurs in a game started in the second situation and the specific target game is set, the specific target game is not counted as one game in the specified game count storage means even if the specific target game is executed, based on the fact that the specified return information is not set.

According to feature R10, if a specific event occurs in a game that is started in a situation where the specified return information is not set and the situation is the second situation, and a specific target game is set, even if the specific target game is executed, the specific target game will not be counted as one game in the specified game count storage means.

Feature R11. A gaming machine described in any one of Features R1 to R10, characterized in that it is equipped with a specific expectation effect control means (a function for executing the processing of steps S8501 to S8506 of the effect side MPU 92 in the 16th and 17th embodiments) that executes a specific expectation effect (CZ expectation effect) that anticipates the occurrence of a specific bonus (transition to CZ state) based on the predetermined number of games information stored in the predetermined number of games storage means.

Feature R11 can increase the player's attention to the display corresponding to the predetermined number of games played on the predetermined display means, thereby enhancing the enjoyment of the game.

Feature R12. A specific game number storage means (a release game number counter 96g) different from the predetermined game number storage means;
A specific game number update means (a function that executes the processing of step S8203 of the main MPU 72 in the 16th and 17th embodiments) that updates the specific game number information (the value of the release game number counter 96g) stored in the specific game number storage means based on the execution of a game;
A means for executing a specific benefit lottery process (first CZ lottery process, second CZ lottery process) that determines whether or not the specific benefit will occur based on the specific game number information stored in the specific game number storage means (a function for executing the processes of steps S8207 to S8212 of the main MPU 72 in the 16th embodiment);
The gaming machine according to feature R11 is characterized by comprising:

According to feature R12, in a configuration in which a display corresponding to the predetermined number of games information stored in the predetermined number of games storage means is performed on the predetermined display means, and a specific bonus lottery is executed based on the specific number of games information stored in a specific number of games storage means different from the predetermined number of games storage means, the result of the specific bonus lottery is made difficult to predict, thereby increasing the enjoyment of the game.

Feature R13. A gaming machine described in Feature R12, in which a game started in the first situation is not counted as one game in the predetermined game number storage means.

According to Feature R13, the specific game count storage means can be configured to count the number of times a game that is not a specific target game is played in the second situation. In this configuration, which includes the configuration of Feature R1 above, if a game is started in the first situation and a specific target game is set based on the occurrence of a specific event in that game, the specific target game is counted as one game in the predetermined game count storage means. This allows for a configuration in which, when a game is started in the first situation, there is a difference of one game between the number of games played determined based on the value in the specific game count storage means and the number of games played determined based on the value in the predetermined game count storage means, while preventing any change in the update mode of the predetermined game count information between when a specific event occurs in a game started in the first situation and when that specific event does not occur.

In addition, the configurations of features R1 to R13 may be configured with any one or more of features A1 to A10, features B1 to B8, features C1 to C6, features D1 to D7, features E1 to E8, features F1 to F8, features G1 to G7, features H1 to H6, features I1 to I14, features J1 to J9, features K1 to K14, features L1 to L11, features M1 to M14, features N1 to N6, features O1 to O10, features P1 to P13, features Q1 to Q11, features R1 to R13, features S1 to S14, features T1 to T11, features U1 to U9, features V1 to V5, features W1 to W7, features X1 to X10, features Y1 to Y13, features Z1 to Z16, features a1 to a11, features b1 to b12, and features c1 to c9. This allows for a synergistic effect to be achieved through the combined configuration.

<Feature S group>
Feature S1. A means for transitioning to a second situation (second section SC2) based on the establishment of a situation transition condition (a win occurs at any index value IV) in a first situation (first section SC1) (a function for executing the processing of steps S7902 to S7904 of the main MPU 72 in the 16th and 17th embodiments);
a predetermined number of games storage means (display game number counter 94p) for storing predetermined number of games information (the value of the display game number counter 94p in the sixteenth and seventeenth embodiments) to be displayed on a predetermined display means (image display device 63);
A predetermined number of games update means (a function of executing the processing of steps S8405 to S8406 of the presentation side MPU 92 in the 16th embodiment, and steps S8605 to S8607 of the presentation side MPU 92 in the 17th embodiment) that updates the predetermined number of games information in a predetermined update manner (a manner in which the processing of adding 1 to the value of the display game number counter 94p is performed and the processing of subtracting 1 from the value of the display game number counter 94p is not performed) based on the execution of a game;
a target game setting means (a function of executing the processing of steps S8001 and S8004 of the master MPU 72 in the 16th and 17th embodiments) for setting a specific target game (penalty target game) based on the occurrence of a specific event (penalty event) based on the player's operation;
Equipped with
When a game is played as the specific target game, the game is played under conditions that are less advantageous to the player than when the game is played as a game that is not the specific target game,
A gaming machine characterized by being equipped with a predetermined game number setting means (a function for executing the processing of steps S8408 to S8412 of the presentation side MPU 92 in the 16th embodiment, and a function for executing the processing of steps S8605, S8606, S8608 and steps S8610 to S8615 of the presentation side MPU 92 in the 17th embodiment) that ensures that when a game is started in the second situation and the specific event occurs in the game, the specific target game that is set based on the occurrence of the specific event is not counted as one game in the predetermined game number information.

Feature S1 increases the likelihood that a player will perform an operation that will cause a specific event to occur, as this will result in a specific target game occurring.

The predetermined number of games information is configured to be updated in a predetermined manner based on the execution of a game, and if a specific event occurs in a game started in the second situation and a specific target game is set, the specific target game can be prevented from being counted as one game in the predetermined number of games information.

Feature S2: In a game that is not the specific target game, a predetermined transition lottery execution means (a function of executing the processing of step S8204 of the main MPU 72 in the 16th and 17th embodiments) is provided that executes a predetermined transition lottery process (AT lottery process) to determine whether or not to transition to a predetermined gaming state (base AT state ST4) based on the occurrence of a predetermined lottery trigger (starting of a game in the normal gaming state ST1),
The gaming machine according to feature S1, wherein in the specific target game, even if the predetermined lottery trigger occurs, the predetermined transition lottery process is not executed.

According to feature S2, if an operation that causes a specific event to occur is performed, the opportunity for the predetermined transition lottery process is lost, thereby increasing the likelihood that the player will perform an operation that will not cause the specific event to occur.

Feature S3. A gaming machine as described in Feature S1 or S2, wherein a game is set as the specific target game based on the occurrence of the specific event in that game.

Feature S3 makes it easy for players to understand the correspondence between the occurrence of a specific event and the setting of a specific target game based on the occurrence of that specific event.

Feature S4. A gaming machine described in any one of Features S1 to S3, wherein the predetermined number of games setting means is equipped with predetermined number of games correction means (a function of executing the processing of step S8412 by the presentation-side MPU 92 in the sixteenth embodiment) that, when the specific target game is set based on the occurrence of the specific event in a game started in the second situation, executes predetermined number of games correction processing (processing of step S8412) to return the predetermined number of games information to the predetermined number of games information before the specific target game was started at a predetermined timing (the timing when the first stop is performed and the monochrome switching processing is executed) before the specific target game is ended, after the predetermined number of games information is updated in the predetermined update manner by the predetermined number of games update means based on the start of the specific target game in the second situation.

According to feature S4, if a specific target game is set based on the occurrence of a specific event in a game started in the second situation, the specific number of games information is updated in a predetermined update manner based on the start of the specific target game, and then the specific number of games correction process is executed, so that the specific target game is not counted as one game in the specific number of games storage means.

Feature S5: A display switching means (a function of executing the process of step S8316 of the production-side MPU 92 in the sixteenth embodiment) is provided that switches the display mode of the predetermined display means from the first display mode (color display) to the second display mode (monochrome display) based on the occurrence of the specific event,
A gaming machine according to feature S4, wherein the predetermined timing is set to the period from the start of the second display mode to the end of the second display mode.

Feature S5 draws the player's attention to the fact that the display mode on the predetermined display means has switched from the first display mode to the second display mode, and the display corresponding to the predetermined number of games played on the predetermined display means can be modified in an inconspicuous manner. This reduces the possibility of the player feeling uncomfortable.

Feature S6. The gaming machine described in Feature S5, wherein the predetermined timing is the timing of switching the display on the predetermined display means.

Feature S6 draws the player's attention to the fact that the display has been switched on the specified display means, and the display corresponding to the specified number of games played on the specified display means can be modified in an inconspicuous manner. This reduces the possibility of the player feeling uncomfortable.

Feature S7: A specific state setting means (a function for executing the processing of steps S8207 to S8212 of the main MPU 72 in the 16th and 17th embodiments) is provided to generate a specific state (CZ state) based on the occurrence of a specific transition trigger (a win to transition to the CZ state in the first CZ lottery process or the second CZ lottery process, or a win with any index value IV in a game started in a state in which the first section SC1 is in a CB internal state),
A gaming machine described in any one of features S1 to S6, characterized in that in the specific state, the specified display means does not display information corresponding to the specified number of games stored in the specified number of games memory means.

Feature S7 prevents the display corresponding to the predetermined number of games played from catching the player's eye in certain situations, thereby allowing the player to focus their attention on the presentation content being executed in those specific situations.

Feature S8. A gaming machine as described in Feature S7, characterized in that when a specific target game is set based on the occurrence of the specific event in a game started in the specific state, the specific target game is not counted as one game in the specific game number storage means after the specific number of games information stored in the specific game number storage means is updated in the specific update manner based on the start of the specific target game.

Feature S8 prevents changes to the content of the display corresponding to the predetermined number of games played after the end of a specific state in which no display corresponding to the predetermined number of games played is made, even if a specific target game is played one or more times.

Feature S9: A predetermined initialization process execution means (a function for executing the process of step S106 of the main MPU 72) is provided that executes predetermined initialization process (all clear process for the area) based on the occurrence of a predetermined event (ON operation of the setting key) when the supply of operating power starts,
If the predetermined event does not occur when the supply of operating power starts, the predetermined initialization process is not executed.
A gaming machine described in any one of features S1 to S8, characterized in that it is equipped with a game number information initialization means (a function of executing the processing of steps S8401 to S8404 of the presentation side MPU 92 in the 16th and 17th embodiments) that sets the predetermined game number memory means to a state in which the initial value of the predetermined game number information ("0" in the 16th and 17th embodiments) is set, both when the predetermined initialization processing is executed and when the predetermined initialization processing is not executed based on the start of the supply of operating power.

According to feature S9, when the supply of operating power begins, the predetermined number of games memory means can be set to an initial value regardless of whether the predetermined initialization process has been performed or not. This prevents the player from knowing whether the predetermined initialization process has been performed based on the display corresponding to the predetermined number of games information displayed by the predetermined display means.

Feature S10: A predetermined initialization process execution means (a function for executing the process of step S106 of the main MPU 72) is provided that executes a predetermined initialization process (a process for clearing all data within the area) based on the occurrence of a predetermined event (the ON operation of the setting key and the pressing of the reset button 56) when the supply of operating power starts,
The first situation is achieved by executing the predetermined initialization process,
A gaming machine described in any one of features S1 to S9, characterized in that when the specific target game is set based on the occurrence of the specific event in a game started in the first situation, the specified number of games information is updated in the specified update manner based on the start of the specific target game, and the specific target game is counted as one game in the specified number of games memory means.

According to feature S10, if a specific target game is set based on the occurrence of a specific event in a game started after the execution of a predetermined initialization process, the specific number of games information is updated in a predetermined update manner based on the execution of the specific target game, and the specific target game is counted as one game in the specific number of games storage means.

Feature S11: A means for setting predetermined return information (information "1" set in the normal return flag of the performance-side RAM 94) based on the fact that the supply of operating power has started and the predetermined initialization process has not been executed (a function for executing the processes of steps S8401 to S8402 of the performance-side MPU 92 in the 16th embodiment) is provided;
A gaming machine as described in feature S10, characterized in that when the specific target game is set based on the occurrence of the specific event in a game started in the second situation, the specified number of games information is updated in the specified update manner based on the start of the specific target game, and then, based on the specified return information being set, execution of a process (processing of step S8412 of the presentation side MPU 92 in the 16th embodiment) to make the specific target game not counted as one game in the specified number of games memory means is avoided.

According to feature S11, when the supply of operating power is started without executing a predetermined initialization process and the second state is maintained, if a specific event occurs in a game started after the supply of operating power is started and a specific target game is set, the specific target game can be counted as one game in the predetermined game count storage means.

With the configuration of feature S10 described above, if a specific target game is set based on the occurrence of a specific event in a game that started after the supply of operating power started and the specified initialization process was executed, the specific target game is counted as one game in the specified number of games storage means. This reduces the possibility that a player will be able to determine whether the specified initialization process has been executed based on the display corresponding to the specified number of games information that is displayed after the supply of operating power started.

Feature S12. A gaming machine described in any one of Features S1 to S11, characterized in that it is equipped with a specific expectation effect control means (a function of executing the processing of steps S8501 to S8506 of the effect side MPU 92 in the 16th and 17th embodiments) that executes a specific expectation effect (CZ expectation effect) that anticipates the occurrence of a specific bonus (transition to CZ state) based on the predetermined number of games information stored in the predetermined number of games storage means.

Feature S12 can increase the player's attention to the display corresponding to the predetermined number of games played on the predetermined display means, thereby enhancing the enjoyment of the game.

Feature S13: A specific game number storage means (a release game number counter 96g) different from the predetermined game number storage means;
A specific game number update means (a function of executing the processing of step S8203 of the main MPU 72 in the 16th and 17th embodiments) that updates the specific game number information (the value of the release game number counter 96g) stored in the specific game number storage means based on the execution of a game;
A means for executing a specific benefit lottery process (first CZ lottery process, second CZ lottery process) that determines whether or not the specific benefit will occur based on the specific game number information stored in the specific game number storage means (a function for executing steps S8207 to S8212 of the main MPU 72 in the 16th embodiment);
The gaming machine according to feature S12 is characterized by comprising:

According to feature S13, in a configuration in which a display corresponding to the predetermined number of games information stored in the predetermined number of games storage means is performed on the predetermined display means, and a specific bonus lottery is executed based on the specific number of games information stored in a specific number of games storage means different from the predetermined number of games storage means, the result of the specific bonus lottery is made difficult to predict, thereby increasing the enjoyment of the game.

Feature S14. A gaming machine as described in Feature S13, wherein a game started in the first situation is not counted as one game in the predetermined game number storage means.

According to feature S14, the specific game count storage means can be configured to count the number of times a game that is not a specific target game is played in the second situation. Furthermore, since the configuration of feature S12 above is included and a specific benefit lottery process is executed to determine whether or not a specific benefit will occur based on the specific game count information stored in the specific game count storage means, the specific benefit lottery process can be executed to determine whether or not a specific benefit will occur based on the number of times a game that is not a specific target game is played in the second situation.

In addition, the configurations of features S1 to S14 may be configured with any one or more of features A1 to A10, features B1 to B8, features C1 to C6, features D1 to D7, features E1 to E8, features F1 to F8, features G1 to G7, features H1 to H6, features I1 to I14, features J1 to J9, features K1 to K14, features L1 to L11, features M1 to M14, features N1 to N6, features O1 to O10, features P1 to P13, features Q1 to Q11, features R1 to R13, features S1 to S14, features T1 to T11, features U1 to U9, features V1 to V5, features W1 to W7, features X1 to X10, features Y1 to Y13, features Z1 to Z16, features a1 to a11, features b1 to b12, and features c1 to c9. This allows for a synergistic effect to be achieved through the combined configuration.

The inventions in the above Feature R group and Feature S group can solve the following problems:

Pachinko machines and slot machines are well-known gaming machines. For example, pachinko machines are equipped with a storage section for storing gaming balls. The gaming balls stored in the storage section are guided to a gaming ball launcher and launched toward the gaming area in response to the player's launch operation. Then, for example, when a gaming ball enters a ball entry section provided in the gaming area, a lottery process is executed, or a process is executed to increase the number of gaming balls available to the player.

In a slot machine, when a game value such as medals has been bet and the start lever is operated to start a new game, a lottery process is executed by the control means. Furthermore, when the lottery process is executed, the control means executes rotation start control, causing the reels to start spinning. If the stop button is operated while the reels are spinning, the control means executes rotation stop control, causing the reels to stop spinning. If the result after the reels have stopped spinning corresponds to a winning combination in the lottery process, a bonus corresponding to that winning combination is awarded to the player.

Here, in gaming machines such as those exemplified above, the execution control of effects needs to be carried out appropriately, and there is still room for improvement in this regard.

<Feature T group>
Feature T1: There are multiple notification target states (errors corresponding to any of the error information “1” to “5” in the eleventh embodiment),
A predetermined display means (image display device 63);
a predetermined display control execution means (a performance-side MPU 92) for executing display control of the predetermined display means;
An occurrence information transmitting means (a function for executing the process of step S6407 of the main side MPU 72 in the eleventh embodiment) for transmitting state occurrence information (error information) corresponding to the state to be notified that has occurred;
A resolution information transmitting means (a function for executing the process of step S6404 of the main MPU 72 in the eleventh embodiment) for transmitting state resolution information (a release error command) indicating that the notification target state has been resolved;
Equipped with
The predetermined display control execution means
a means for executing display control of the predetermined display means so that a status occurrence display (an error display on the image display device 63) corresponding to the status occurrence information received from the occurrence information transmitting means is performed (a function for executing the process of step S6505 of the performance-side MPU 92 in the eleventh embodiment);
means for executing display control of the predetermined display means so that the state occurrence display being executed on the predetermined display means is terminated based on receipt of the state resolution information from the resolution information transmitting means (a function for executing the process of step S6509 of the performance-side MPU 92 in the eleventh embodiment);
Equipped with
A gaming machine characterized in that when any of the notification target states occurs, if the state occurrence information is sent, the state resolution information is sent before the state occurrence information.

According to feature T1, when a state to be notified occurs, if state occurrence information is transmitted, state resolution information is transmitted before the state occurrence information. Therefore, after an information occurrence display being executed by the predetermined display means based on the predetermined display control execution means receiving the state resolution information is terminated, a state occurrence display corresponding to the state occurrence information can be initiated by the predetermined display means based on the predetermined display control execution means receiving the state occurrence information.

Feature T2: A predetermined state occurrence information storage means (a previous error information counter 96s in the eleventh embodiment) in which the state occurrence information transmitted by the occurrence information transmission means is set;
a specific state occurrence information storage means (current error information counter 96r) in which the state occurrence information corresponding to the notification target state that is identified as occurring after the state occurrence information transmission means transmits the state occurrence information is set;
Equipped with
A gaming machine described in feature T1, characterized in that, based on the fact that the state occurrence information stored in the predetermined state occurrence information storage means and the specific state occurrence information storage means is different, the state resolution information is transmitted, and then the state occurrence information stored in the specific state occurrence information storage means is transmitted.

According to feature T2, after the state occurrence information is transmitted by the occurrence information transmission means, the state occurrence information stored in the predetermined state occurrence information storage means and the specific state occurrence information storage means will match until new state occurrence information is set in the specific state occurrence information storage means, so it is possible to prevent the transmission of state resolution information and state occurrence information. Furthermore, if new state occurrence information is set in the specific state occurrence information storage means after the state occurrence information is transmitted by the occurrence information transmission means, the state occurrence information stored in the predetermined state occurrence information storage means and the specific state occurrence information storage means will differ, so it is possible to transmit the state occurrence information after the state resolution information is transmitted.

Feature T3: The notification target state includes a predetermined notification target state (an error called "upper limit of power supply reached") and a specific notification target state (an error called "unit connection abnormality");
The predetermined display control execution means
a means for executing display control of the predetermined display means so that a predetermined state occurrence display (an error display corresponding to "award upper limit reached"), which is the state occurrence display corresponding to the predetermined notification target state, is executed based on reception of the state occurrence information corresponding to the predetermined notification target state (a function for executing the processing of steps S6505 and S6514 of the performance-side MPU 92 in the eleventh embodiment);
a means for executing display control of the predetermined display means so that a specific state occurrence display (an error "unit connection abnormality") corresponding to the specific state to be notified is displayed based on reception of the state occurrence information corresponding to the specific state to be notified (a function for executing the processing of steps S6508 and S6512 of the performance-side MPU 92 in the eleventh embodiment);
means for executing display control of the predetermined display means so that, when the specific notification target state occurs in a situation where the predetermined notification target state is occurring, the specific notification target state is displayed based on the reception of the state occurrence information corresponding to the specific notification target state in a situation where the predetermined notification target state is being displayed, without causing a situation where neither the predetermined notification target state nor the specific notification target state is being displayed; and (a function for executing the processing of step S6512 of the performance-side MPU 92);
A gaming machine according to feature T1 or T2, characterized in that it is equipped with:

Feature T3 prevents a situation in which neither the predetermined state occurrence display nor the specific state occurrence display is being executed when a specific state occurrence display occurs and a specific state occurrence display is initiated while a predetermined state occurrence display is occurring. This prevents players and amusement hall managers from misunderstanding that a state has occurred in which the predetermined state occurrence display has been temporarily resolved, even though the predetermined state occurrence display has not been resolved.

Feature T4: A predetermined notification target state (an error "reached upper limit of the given amount") exists as the notification target state,
A gaming machine described in any one of features T1 to T3, characterized in that the specified display control execution means is equipped with a means (a function of executing the processing of steps S6502 and S6508 of the presentation side MPU 92 in the 11th embodiment) that prevents the specified state occurrence display (an error display of ``award limit reached''), which is the state occurrence display corresponding to the specified notification target state, from being terminated even if the state resolution information is received in a situation where the specified state occurrence display (an error display of ``award limit reached'') is being displayed.

According to feature T4, when a predetermined state occurrence display is being displayed, the predetermined state occurrence display can be prevented from being interrupted even when the predetermined display control execution means receives state resolution information. As a result, when a predetermined state occurrence display is being displayed, the predetermined state occurrence display can be continued without interruption, without being affected by the occurrence of other states that are subject to notification.

Feature T5: A specific notification target state (an error called "unit connection abnormality") exists as the notification target state,
The gaming machine described in feature T4 is characterized in that the predetermined display control execution means is equipped with a means (a function of executing the processing of steps S6504, S6511 and S6512 of the presentation side MPU 92 in the 11th embodiment) that, after receiving the state resolution information when the predetermined state occurrence display is being performed, causes the predetermined display means to execute a specific state occurrence display corresponding to the specific state to be notified (an error display of ``unit connection abnormality'') instead of the predetermined state occurrence display as the state occurrence display based on receiving the state occurrence information corresponding to the specific state to be notified.

According to feature T5, when a situation changes from one in which a predetermined notification target state has occurred to one in which both a predetermined notification target state and a specific notification target state have occurred, it is possible to switch from a situation in which the predetermined notification target state display is being executed to a situation in which the specific notification target state display is being executed, without creating a situation in which neither the predetermined notification target state display nor the specific notification target state display is being executed on the predetermined display means. By preventing a situation in which neither the predetermined notification target state display nor the specific notification target state display is being executed on the predetermined display means when a predetermined notification target state has occurred, it is possible to prevent players and amusement hall managers from misunderstanding that the predetermined notification target state has temporarily been resolved.

Feature T6: In a situation where the predetermined notifiable state and the specific notifiable state are occurring, if the specific notifiable state among the predetermined notifiable state and the specific notifiable state is resolved and a situation occurs where only the predetermined notifiable state is occurring, the state resolution information is transmitted to the predetermined display control execution means, and then the state occurrence information corresponding to the predetermined notifiable state is transmitted to the predetermined display control execution means,
The gaming machine described in feature T5 is characterized in that the predetermined display control execution means is equipped with a means (a function of executing the processing of steps S6504, S6511, S613 and S6514 of the presentation side MPU 92) that, after receiving the state resolution information in a situation where the predetermined notification target state and the specific notification target state have occurred and the specific state occurrence display is being displayed, causes the predetermined state occurrence display to be executed in the predetermined display means instead of the specific state occurrence display as the state occurrence display based on receiving the state occurrence information corresponding to the predetermined notification target state.

According to feature T6, when only the specific notification target state of the predetermined notification target state and the specific notification target state is resolved, a switch can be made from a state in which the specific state occurrence display is being executed to a state in which the predetermined state occurrence display is being executed. This makes it possible to notify the player and the amusement hall manager that the predetermined notification target state has not been resolved when only the specific notification target state of the predetermined notification target state and the specific notification target state is resolved.

Feature T7. A gaming machine according to Feature T6, wherein the predetermined display control execution means includes means (a function of executing the processing of steps S6502 and S6508 of the presentation-side MPU 92) for preventing the specific state occurrence display from ending even when the state resolution information is received in a situation where the predetermined notification target state and the specific notification target state have occurred and the specific state occurrence display is being displayed.

According to feature T7, even if the predetermined display control execution means receives state resolution information while the specific state occurrence display is being displayed, the specific state occurrence display can be continued until the predetermined display control execution means receives the specific state occurrence information. This prevents a situation in which neither the predetermined state occurrence display nor the specific state occurrence display is being displayed by the predetermined display means when a predetermined state subject to notification and a specific state subject to notification are present and only the specific state subject to notification is resolved. Furthermore, by preventing a situation in which neither the predetermined state occurrence display nor the specific state occurrence display is being displayed by the predetermined display means when a predetermined state subject to notification is present, it is possible to prevent players and amusement hall managers from misunderstanding that the predetermined state subject to notification has been temporarily resolved.

Feature T8. A gaming machine according to any one of Features T3 to T7, wherein, when the predetermined notification condition occurs, the predetermined notification condition continues to occur until the supply of operating power is stopped.

Feature T8 allows a predetermined display means to display a predetermined state occurrence, thereby notifying players and amusement hall managers that a predetermined notification-required state has occurred, which will continue until the supply of operating power is stopped.

Feature T9. A gaming machine according to any one of Features T3 to T8, characterized in that, when the predetermined notification condition occurs, the game cannot be started until the condition in which the predetermined notification condition occurs is resolved.

According to feature T9, by displaying a predetermined condition occurrence indication on a predetermined display means, it is possible to notify players and the gaming hall manager that a predetermined notification condition has occurred and the game cannot be started.

Feature T10: A predetermined update means (a function of executing the processes of steps S2107 and S2108 of the main MPU 72 in the first embodiment) is provided that updates the end trigger information stored in the end trigger storage means (end determination counter 98b) as the game is executed to approach the end occurrence information (exceeding "65535" and causing a reversal from the maximum value to the minimum value),
A gaming machine described in any one of features T3 to T9, characterized in that the specified notification target state occurs based on the termination trigger information stored in the termination trigger memory means becoming the termination occurrence information.

According to feature T10, when a predetermined state occurrence display is performed on a predetermined display means, it is possible to notify the player and the amusement hall manager that the end trigger information stored in the end trigger storage means has become end occurrence information.

Feature T11. A gaming machine described in any one of Features T1 to T10, characterized in that, in both a situation where the notification target state has occurred and a situation where the notification target state has not occurred, if the state occurrence information is to be transmitted, the state resolution information is transmitted before the state occurrence information.

Feature T11 eliminates the need to determine whether a notification target state has occurred before transmitting state resolution information and state occurrence information in the order of state resolution information → state occurrence information. This simplifies the processing configuration for transmitting state resolution information and state occurrence information.

In addition, any one or more of the following configurations may be applied to the configurations of features T1 to T11: features A1 to A10, features B1 to B8, features C1 to C6, features D1 to D7, features E1 to E8, features F1 to F8, features G1 to G7, features H1 to H6, features I1 to I14, features J1 to J9, features K1 to K14, features L1 to L11, features M1 to M14, features N1 to N6, features O1 to O10, features P1 to P13, features Q1 to Q11, features R1 to R13, features S1 to S14, features T1 to T11, features U1 to U9, features V1 to V5, features W1 to W7, features X1 to X10, features Y1 to Y13, features Z1 to Z16, features a1 to a11, features b1 to b12, and features c1 to c9. This allows for a synergistic effect to be achieved through the combined configuration.

<Feature U group>
Feature U1. Predetermined display means (image display device 63),
a predetermined display control execution means (a function of executing the processing of steps S6505, S6512, and S6514 of the production-side MPU 92 in the 11th embodiment) that executes display control of the predetermined display means so that a state occurrence display (an error display corresponding to any of the error information "1" to "5") corresponding to the occurred notification target state (an error corresponding to any of the error information "1" to "5" in the 11th embodiment) is displayed;
Equipped with
The notification target state includes a predetermined notification target state (an error corresponding to "reaching the upper limit of the grant") and a specific notification target state (an error corresponding to "unit connection abnormality").
The gaming machine is characterized in that the predetermined display control execution means is equipped with a predetermined display switching means (a function of executing the processing of step S6512 of the presentation side MPU 92) that, based on the occurrence of the specific notification target state in a situation where the predetermined notification target state is occurring, enables the state occurrence display being executed in the predetermined display means to be switched from the predetermined state occurrence display to the specific state occurrence display, without creating a state in which neither the predetermined state occurrence display (error display corresponding to ``award limit reached'') that is the state occurrence display corresponding to the predetermined notification target state nor the specific state occurrence display (error display corresponding to ``unit connection abnormality'') that is the state occurrence display corresponding to the specific notification target state is being executed.

Feature U1 allows the specific state occurrence display to be executed with priority over the predetermined state occurrence display. As a result, when a specific notification target state occurs, even when the predetermined notification target state is occurring, the occurrence of a specific notification target event can be notified to players and the amusement hall manager as a priority.

When the state occurrence display being executed by the predetermined display means is switched from a predetermined state occurrence display to a specific state occurrence display, a state in which neither the predetermined state occurrence display nor the specific state occurrence display is being executed is not created. This prevents players and amusement hall managers from misunderstanding that the predetermined state to be notified has been temporarily resolved, even though the predetermined state to be notified has not been resolved.

Feature U2: Equipped with occurrence information transmission means (a function of executing the process of step S6407 of the main MPU 72 in the eleventh embodiment) for transmitting state occurrence information (error information) corresponding to the occurred notification target state,
A gaming machine described in feature U1, characterized in that when the predetermined state occurrence display is being performed, the state occurrence display being executed by the predetermined display means is switched from the predetermined state occurrence display to the specific state occurrence display based on the predetermined display control execution means receiving the state occurrence information corresponding to the specific notification target state.

According to feature U2, if a specific notification target state occurs while a specific notification target state is occurring, the state occurrence display being executed by the specific display means can be switched from the specific state occurrence display to the specific state occurrence display at the timing when the specific display control execution means receives state occurrence information corresponding to the specific notification target state.

Feature U3: A resolution information transmission unit (a function of executing the process of step S6404 of the main MPU 72 in the eleventh embodiment) is provided that transmits state resolution information (a release error command) indicating that the notification target state has been resolved,
The predetermined display control execution means
a means for executing display control of the predetermined display means so that the state occurrence display being executed on the predetermined display means is terminated based on the reception of the state resolution information (a function for executing the process of step S6509 of the performance-side MPU 92 in the eleventh embodiment);
A means for preventing the predetermined state occurrence display from being terminated even if the state resolution information is received while the predetermined state occurrence display is being performed (a function for executing the process of step S6508 of the performance-side MPU 92 in the eleventh embodiment);
A gaming machine according to feature U2, characterized by comprising:

According to feature U3, when a predetermined state occurrence display is being displayed, the predetermined state occurrence display can be prevented from ending even if the predetermined display control execution means receives state resolution information until the predetermined display control execution means receives state occurrence information corresponding to a specific notification event. This prevents a situation in which, when a specific notification event occurs while a predetermined notification event is occurring, neither the predetermined state occurrence display nor the specific state occurrence display is being displayed before the specific state occurrence display is started by the predetermined display means.

Feature U4: In a situation where the predetermined notifiable state and the specific notifiable state are occurring, when the specific notifiable state ends and only the predetermined notifiable state remains occurring, the state occurrence information corresponding to the predetermined notifiable state is transmitted to the predetermined display control execution means,
A gaming machine described in feature U2 or U3, characterized in that when the specific state occurrence display is being performed, the state occurrence display being executed by the specified display means is switched from the specific state occurrence display to the specified state occurrence display based on the specified display control execution means receiving the state occurrence information corresponding to the specified notification target state.

According to feature U4, when a predetermined notification target state and a specific notification target state occur, if only the specific notification target state of the two states is resolved, the state occurrence display being executed by the predetermined display means can be switched from the specific state occurrence display to the predetermined state occurrence display at the timing when the predetermined display control execution means receives state occurrence information corresponding to the predetermined notification target state. This makes it possible to notify the player and the amusement hall manager that the predetermined notification target state has not been resolved.

Feature U5: A resolution information transmission unit (a function of executing the process of step S6404 of the main MPU 72 in the eleventh embodiment) is provided that transmits state resolution information (a release error command) indicating that the notification target state has been resolved,
The predetermined display control execution means
A means for executing display control of the predetermined display means so that the state occurrence display being executed on the predetermined display means is terminated based on the reception of the state resolution information (a function for executing the process of step S6509 of the performance-side MPU 92 in the eleventh embodiment);
a means for preventing the specific state occurrence display from being terminated even if the state resolution information is received in a situation where the predetermined notification target state and the specific notification target state have occurred and the specific state occurrence display is being displayed (a function for executing the processing of step S6508 of the performance-side MPU 92);
A gaming machine according to feature U4, characterized by comprising:

According to feature U5, when a predetermined notification target state and a specific notification target state have occurred and a specific state occurrence display is being displayed, the specific state occurrence display can be prevented from ending even if the predetermined display control execution means receives state resolution information until the predetermined display control execution means receives state occurrence information corresponding to the predetermined notification target event. This prevents a situation in which neither the predetermined state occurrence display nor the specific state occurrence display is displayed before the predetermined state occurrence display is started by the predetermined display means when only the specific notification target state is resolved from among the predetermined notification target state and the specific notification target state while the predetermined notification target state and the specific notification target state are occurring.

Feature U6: An occurrence information transmitting means (a function of executing the process of step S6407 of the main MPU 72 in the eleventh embodiment) for transmitting state occurrence information (error information) corresponding to the occurred notification target state;
a predetermined state occurrence information storage means (a previous error information counter 96s in the eleventh embodiment) in which the state occurrence information transmitted by the occurrence information transmission means is set;
a specific state occurrence information storage means (current error information counter 96r) in which the state occurrence information corresponding to the notification target state that is identified as occurring after the state occurrence information transmission means transmits the state occurrence information is set;
A resolution information transmitting means (a function for executing the process of step S6404 of the main MPU 72 in the eleventh embodiment) for transmitting state resolution information (a release error command) indicating that the notification target state has been resolved;
Equipped with
A gaming machine described in any one of features U1 to U5, characterized in that, based on the fact that the state occurrence information stored in the predetermined state occurrence information storage means and the specific state occurrence information storage means is different, the state resolution information is transmitted, and then the state occurrence information stored in the specific state occurrence information storage means is transmitted.

According to feature U6, after the state occurrence information is transmitted by the occurrence information transmission means, the state occurrence information stored in the predetermined state occurrence information storage means and the specific state occurrence information storage means will match until new state occurrence information is set in the specific state occurrence information storage means, so it is possible to prevent the transmission of state resolution information and state occurrence information. Furthermore, if new state occurrence information is set in the specific state occurrence information storage means after the state occurrence information is transmitted by the occurrence information transmission means, the state occurrence information stored in the predetermined state occurrence information storage means and the specific state occurrence information storage means will differ, so it is possible to transmit the state occurrence information after the state resolution information is transmitted.

Feature U7. A gaming machine described in any one of Features U1 to U6, characterized in that when the predetermined notification condition occurs, the occurrence of the predetermined notification condition continues until the supply of operating power is stopped.

Feature U7 allows a predetermined display means to display a predetermined state occurrence, thereby notifying players and the amusement hall manager that a predetermined notification-required state has occurred, which will continue until the supply of operating power is stopped.

Feature U8. A gaming machine described in any one of Features U1 to U7, characterized in that when the predetermined notification condition occurs, the game cannot be started until the condition in which the predetermined notification condition occurs is resolved.

Feature U8 allows a predetermined display means to display a predetermined condition occurrence, thereby notifying players and the gaming hall manager that a predetermined notification condition has occurred and the game cannot be started.

Feature U9: A predetermined update means (a function of executing the processes of steps S2107 and S2108 of the main MPU 72 in the first embodiment) is provided that updates the end trigger information stored in the end trigger storage means (end determination counter 98b) as the game is executed to approach the end occurrence information (exceeding "65535" and causing a reversal from the maximum value to the minimum value),
A gaming machine described in any one of features U1 to U8, characterized in that the specified notification target state occurs based on the termination trigger information stored in the termination trigger memory means becoming the termination occurrence information.

Feature U9 allows players and the amusement hall manager to be notified that the termination trigger information stored in the termination trigger storage means has become termination occurrence information based on the predetermined state occurrence display being displayed on the predetermined display means.

In addition, the configurations of features U1 to U9 may be configured with any one or more of features A1 to A10, features B1 to B8, features C1 to C6, features D1 to D7, features E1 to E8, features F1 to F8, features G1 to G7, features H1 to H6, features I1 to I14, features J1 to J9, features K1 to K14, features L1 to L11, features M1 to M14, features N1 to N6, features O1 to O10, features P1 to P13, features Q1 to Q11, features R1 to R13, features S1 to S14, features T1 to T11, features U1 to U9, features V1 to V5, features W1 to W7, features X1 to X10, features Y1 to Y13, features Z1 to Z16, features a1 to a11, features b1 to b12, and features c1 to c9. This allows for a synergistic effect to be achieved through the combined configuration.

The inventions of the above feature group T and feature group U can solve the following problems:

Pachinko machines and slot machines are well-known gaming machines. For example, pachinko machines are equipped with a storage section for storing gaming balls. The gaming balls stored in the storage section are guided to a gaming ball launcher and launched toward the gaming area in response to the player's launch operation. Then, for example, when a gaming ball enters a ball entry section provided in the gaming area, a lottery process is executed, or a process is executed to increase the number of gaming balls available to the player.

In a slot machine, when a game value such as medals has been bet and the start lever is operated to start a new game, a lottery process is executed by the control means. Furthermore, when the lottery process is executed, the control means executes rotation start control, causing the reels to start spinning. If the stop button is operated while the reels are spinning, the control means executes rotation stop control, causing the reels to stop spinning. If the result after the reels have stopped spinning corresponds to a winning combination in the lottery process, a bonus corresponding to that winning combination is awarded to the player.

Here, in gaming machines such as those exemplified above, it is necessary to appropriately control the execution of notifications, and there is still room for improvement in this regard.

<Feature Group V>
Feature V1. A predetermined control means (main MPU 72) capable of transmitting specific information (a game signal in the thirteenth embodiment);
A specific control means (value number side MPU 142) capable of receiving the specific information from the predetermined control means;
Equipped with
The specific control means includes external transmission means (a function of executing the processes of steps S5921 to S5922 of the value number side MPU 142 in the 11th embodiment) that transmits the content of the specific information received from the predetermined control means to the outside (card unit 130) based on the occurrence of a predetermined output trigger (the passage of 300 milliseconds),
The predetermined control means
a predetermined change means (a function of executing the process of step S7204 of the main MPU 72 in the thirteenth embodiment) for executing a predetermined change process (on-processing of the in-game signal) for changing the content of the specific information from a predetermined content (a LOW level of the in-game signal) to a specific content (a HIGH level of the in-game signal) based on the start of a game;
a start time period setting means (a function for executing the process of step S7206 of the main MPU 72) for setting a specific period (300.98 milliseconds) based on the execution of the predetermined change process;
A termination waiting means (a function of executing the process of step S7116 of the main MPU 72) that prevents the game for which the specific period set by the start period setting means has been set from being terminated until the specific period has elapsed;
A gaming machine characterized by comprising:

According to feature V1, after a predetermined change process is performed based on the start of a game, a specific period can be secured as the period until the predetermined change process is performed at the start of the next game of that game. This reduces the possibility that after a predetermined change process is performed to change the content of the specific information from predetermined content to specific content based on the start of a game, but before the specific content of the specific information is transmitted externally, the predetermined change process to change the content of the specific information from predetermined content to specific content will be performed at the start of the next game of that game. This reduces the possibility that the number of times the specific content of the specific information is transmitted externally will be less than the number of times the predetermined change process was performed at the start of a game.

Feature V2. A gaming machine according to Feature V1, characterized in that the predetermined control means is equipped with specific change processing execution means (a function for executing the processing of steps S7116 to S7117 of the main MPU 72 in the thirteenth embodiment, and a function for executing the processing of steps S7201, S7207, and S7208 of the main MPU 72) that executes specific change processing (processing to turn off the in-game signal) to change the content of the specific information from the specific content to the predetermined content based on the occurrence of a specific change trigger (the end of the game) that occurs between the start of a game and the start of the next game of that game.

According to feature V2, after a predetermined change process is performed based on the start of a game, a specific change process is executed before the next game of that game is started, so that each game can be started with the content of the specific information set to the predetermined content.

Feature V3. A gaming machine according to Feature V2, wherein the specific change trigger occurs when the game ends.

According to Feature V3, in a configuration that includes the configuration of Feature V1 and in which a game is not ended until a specific period set by a start period setting means has elapsed, a specific change process is executed based on the occurrence of a specific change trigger that occurs when the game is ended, so that the specific change process can be executed after the specific period has elapsed. This prevents the specific change process from being executed to change the content of specific information from specific content to specific content after the specific change process has been executed to change the content of specific information from specific content to specific content in a game, before the specific content of the specific information is transmitted externally.

Feature V4: A predetermined trigger (the start of rotation of the reels 32L, 32M, and 32R in the thirteenth embodiment) occurs in each game.
a means (a function of executing the process of step S5711 of the main MPU 72) for making the occurrence of the predetermined trigger in one game wait until a predetermined waiting period (a waiting time of 4.1 seconds) has elapsed since the occurrence of the predetermined trigger in the previous game;
A gaming machine described in any one of features V1 to V3, wherein the predetermined waiting period is longer than the specific period.

Feature V4 reduces the possibility that, after a predetermined change process is performed based on the start of a game, the predetermined change process will be performed at the start of the next game before the specific content of the specific information is transmitted to the outside.

Feature V5. A gaming machine described in any one of Features V1 to V4, wherein the specific period is set to a length equal to or greater than the cycle at which the predetermined output trigger occurs.

Feature V5 prevents a predetermined change process from being performed when a game is started, at the start of the next game, before the specific content of the specific information is transmitted externally.

In addition, the configurations of features V1 to V5 may be configured with any one or more of features A1 to A10, features B1 to B8, features C1 to C6, features D1 to D7, features E1 to E8, features F1 to F8, features G1 to G7, features H1 to H6, features I1 to I14, features J1 to J9, features K1 to K14, features L1 to L11, features M1 to M14, features N1 to N6, features O1 to O10, features P1 to P13, features Q1 to Q11, features R1 to R13, features S1 to S14, features T1 to T11, features U1 to U9, features V1 to V5, features W1 to W7, features X1 to X10, features Y1 to Y13, features Z1 to Z16, features a1 to a11, features b1 to b12, and features c1 to c9. This allows for a synergistic effect to be achieved through the combined configuration.

<Feature W group>
Feature W1. A second situation setting means (a function of executing the process of step S6801 of the main MPU 72 in the twelfth embodiment) that causes a transition from the first situation (first section SC1) to the second situation (second section SC2) based on the occurrence of a predetermined transition trigger (a win at any index value IV in a game executed in the first section SC1),
A specific information setting means (a function for executing the processing of step S6807 of the main MPU 72) sets specific information (information of "1" set in the signal output avoidance flag 96u) based on the occurrence of the specific transition trigger in a game started in a state in which specific information (CB winning data) is set (CB internal state);
A transition information output processing execution means (a function of executing the processing of step S6911 of the main MPU 72) that executes a transition information output processing (processing of step S6911) to externally output predetermined transition information (a third gaming machine information notification corresponding to the HI level of the AT initial win signal) based on the occurrence of a transition to a predetermined gaming state (base AT state ST4) when the specific information is not set;
Equipped with
A gaming machine characterized in that if a transition to the predetermined gaming state occurs while the specific information is set, the transition information output process is not executed.

According to feature W1, if a game is started with predetermined information set and a predetermined transition trigger occurs, causing specific information to be set. After that, if a transition to a predetermined game state occurs with the specific information set, external output of the predetermined transition information can be prevented even if a transition to the predetermined game state occurs.

Feature W2: A predetermined initialization process execution means (a function for executing the process of step S106 of the main MPU 72) is provided that executes a predetermined initialization process (a process for clearing all data within the area) based on the occurrence of a predetermined event (turning on the setting key and pressing the reset button 56) when the supply of operating power starts,
The predetermined information and the specific information are set to a state where they are not set by executing the predetermined initialization process,
A gaming machine described in feature W1, characterized in that the specific information is not set when the specified transition trigger occurs in a game that is started when the specified information has not been set.

According to Feature W2, after a predetermined initialization process is executed and a state in which predetermined information is not set occurs, if a predetermined transition trigger occurs in a game started in that state and a transition to a predetermined game state occurs in a state in which specific information is not set, the predetermined transition information can be externally output based on the transition to the predetermined game state.

Feature W3. A predetermined transition means (a function for executing the processing of step S6808 of the main MPU 72 in the 12th embodiment) is provided to transition to a predetermined state (CZ state) based on the occurrence of a predetermined transition trigger (a win at any index value IV in the game started in the first section SC1) in the first situation,
When the predetermined state is started in a state where the specific information is set, the state in which the specific information is set continues until the predetermined state ends,
A gaming machine described in feature W1 or W2, characterized in that if the specified state is started when the specific information is not set, the state in which the specific information is not set will continue until the specified state ends.

According to feature W3, if the predetermined state is initiated when a specific state is not set and a win occurs to transition to the predetermined gaming state in that predetermined state, a transition to the predetermined gaming state is executed and the predetermined transition information is externally output. Furthermore, if the predetermined state is initiated when a specific state is set and a win occurs to transition to the predetermined gaming state in that predetermined state, a transition to the predetermined gaming state is executed and the external output of the predetermined transition information is prevented.

Feature W4. A gaming machine as described in Feature W3, characterized in that if the transition to the specified gaming state is not executed at the end of the specified state, the specific information is set to an unset state.

According to feature W4, the predetermined state is initiated with a specific state set, and if no winnings for transition to the predetermined game state occur in the predetermined state, the specific information is not set when the predetermined state ends. This allows the predetermined transition information to be output externally when a transition to the predetermined game state is executed after the end of the predetermined state.

Feature W5. A second situation termination process execution means (a function of executing the process of step S1208 of the main MPU 72) is provided, which executes a second situation termination process (initialization process of the second section) to terminate the second situation and set the first situation based on the occurrence of an end trigger of the second situation,
A gaming machine described in any one of features W1 to W4, characterized in that even if the second situation termination processing is executed in a situation where the specified information is set, the situation in which the specified information is set continues.

According to feature W5, if a predetermined transition trigger occurs in a game that was started after the second situation termination process was executed in a situation in which predetermined information was set, resulting in the first situation, the game can be made to enter a state in which specific information is set, because the game was started in a state in which predetermined information was set.

Feature W6. A predetermined game state termination process (the process of step S6702) that terminates the predetermined game state based on the occurrence of a predetermined termination trigger (the value of the AT difference number counter 96e becoming "0") is executed (a function that executes the process of step S6702 of the main MPU 72);
A means for setting the specific information to a set state based on the execution of the predetermined game state termination process (a function for executing the process of step S6704 of the main MPU 72);
A gaming machine described in any one of features W1 to W5, characterized in that it is equipped with:

According to feature W6, if a transition to a predetermined gaming state occurs while the specific information is set after the predetermined gaming state termination process is executed and the predetermined gaming state is terminated, external output of the predetermined transition information can be prevented even if a transition to the predetermined gaming state occurs.

Feature W7. Based on the execution of the predetermined game state termination process, a specific transition means (a function of executing the process of step S6705 of the main MPU 72) is provided to transition to a predetermined state (CZ state),
When a winning entry to the predetermined gaming state occurs in the predetermined state, the transition to the predetermined gaming state is executed.
A gaming machine described in feature W6, characterized in that if the specified state is started while the specific information is set, the state in which the specific information is set will continue until the specified state ends.

According to feature W7, when the predetermined game state termination process is executed and the predetermined game state ends, the specific information is set and the predetermined state is entered. If a win occurs in the predetermined state to transition to the predetermined game state, the transition to the predetermined game state is executed and external output of the predetermined transition information is prevented.

In addition, the configurations of features W1 to W7 may be configured with any one or more of features A1 to A10, features B1 to B8, features C1 to C6, features D1 to D7, features E1 to E8, features F1 to F8, features G1 to G7, features H1 to H6, features I1 to I14, features J1 to J9, features K1 to K14, features L1 to L11, features M1 to M14, features N1 to N6, features O1 to O10, features P1 to P13, features Q1 to Q11, features R1 to R13, features S1 to S14, features T1 to T11, features U1 to U9, features V1 to V5, features W1 to W7, features X1 to X10, features Y1 to Y13, features Z1 to Z16, features a1 to a11, features b1 to b12, and features c1 to c9. This allows for a synergistic effect to be achieved through the combined configuration.

<Feature X group>
Feature X1. A setting information storage unit (a previous error information counter 96s in the 11th embodiment, a current external signal area 96m in the 11th to 13th embodiments) in which specific setting information (error information transmitted in the 11th embodiment, setting data of the signal for external output in the 11th to 13th embodiments) that is specific information set as a transmission target (error information in the 11th embodiment, information of the signal for external output in the 11th to 13th embodiments) is set;
a pre-setting information storage means (a current error information counter 96r in the eleventh embodiment, a reserved external signal area 96n in the eleventh to thirteenth embodiments) for storing specific pre-setting information (error information scheduled for transmission in the eleventh embodiment, and reservation data for an external output signal in the eleventh to thirteenth embodiments) which is the specific information that is set to be transmitted after the specific setting information stored in the setting information storage means;
A specific transmission process (the processes of steps S6104, S6108, S6116, and S6121 of the main MPU 72 in the eleventh embodiment, the processes of steps S6403 to S6407 of the main MPU 72 in the twelfth embodiment, and steps S7001, S7002, and S7003 of the main MPU 72 in the twelfth embodiment) for transmitting the specific pre-setting information based on a combination of the specific setting information stored in the setting information storage means and the specific pre-setting information stored in the pre-setting information storage means being a predetermined combination (a state in which the data of the previous error information counter 96s and the data of the current error information counter 96r are different in the eleventh embodiment, and a state in which the setting data and reservation data of the external output signal are different in the eleventh to thirteenth embodiments) of the specific pre-setting information. specific information transmitting means (a function for executing the processes of steps S6104, S6108, S6116 and S6121 of the main MPU 72 in the eleventh embodiment, a function for executing the processes of steps S6403 to S6407 of the main MPU 72, a function for executing the processes of steps S7001, S7002, S7005 and S7009 of the main MPU 72 in the twelfth embodiment, and a function for executing the processes of steps S7204, S7208, S7212 and S7215 of the main MPU 72 in the thirteenth embodiment);
Equipped with
A gaming machine characterized in that when the specific transmission process is executed, the specific pre-setting information transmitted in the specific transmission process is stored in the setting information storage means as the specific setting information.

According to Feature X1, by providing a setting information storage means as a storage means separate from the pre-setting information storage means, it is possible to store specific pre-setting information in the pre-setting information storage means while preventing the specific setting information set for the transmission target from being overwritten. This makes it possible to execute processing corresponding to the combination of specific setting information and specific pre-setting information that has already been set for the transmission target.

The specific transmission process is prevented from being executed if the combination of the specific setting information stored in the setting information storage means and the specific pre-setting information stored in the pre-setting information storage means is not a predetermined combination, and the specific pre-setting information stored in the pre-setting information storage means is updated, and the specific transmission process is executed when the combination of the specific setting information stored in the setting information storage means and the specific pre-setting information stored in the pre-setting information storage means becomes a predetermined combination.

Feature X2. A gaming machine as described in Feature X1, characterized in that when the specific pre-setting information stored in the pre-setting information storage means is the specific information different from the specific setting information stored in the setting information storage means, the combination of the specific setting information stored in the setting information storage means and the specific pre-setting information stored in the pre-setting information storage means becomes the predetermined combination.

According to feature X2, when the specific pre-setting information stored in the pre-setting information storage means is updated after the specific transmission process is executed, the specific pre-setting information stored in the pre-setting information storage means becomes specific information that is different from the specific setting information stored in the setting information storage means, and the specific transmission process is executed to transmit the specific pre-setting information stored in the setting information storage means.

Feature X3. A gaming machine as described in Feature X1 or X2, characterized in that the information transmitted in the specific transmission process includes predetermined identification information (error-handling header data set in an error command in the 11th embodiment), regardless of the type of specific pre-setting information to be transmitted in the specific transmission process.

Feature X3 allows information to be transmitted that has common predetermined identification information set but different specific pre-setting information. This makes it easier for the recipient of the information to understand that it has received information with specific pre-setting information set. Furthermore, compared to a configuration in which the identification information set in the information transmitted by the specific transmission process varies depending on the type of specific pre-setting information, the amount of data storage required to store the identification information can be reduced.

Feature X4. A gaming machine according to any one of Features X1 to X3, wherein the specific information is information (any of error information "0" to "5") corresponding to the occurrence of a predetermined error (such as "award limit reached," "unit connection error," "owned gaming value full," "award error," or "bet error" in the 11th embodiment).

According to feature X4, a specific transmission process can be executed to transmit information corresponding to the occurrence of a predetermined error stored in the pre-configuration information storage means when a predetermined combination is achieved between information corresponding to the occurrence of a predetermined error stored in the configuration information storage means and information corresponding to the occurrence of a predetermined error stored in the pre-configuration information storage means. This makes it possible to transmit information corresponding to the occurrence of a predetermined error in response to changes in the occurrence of the predetermined error.

Feature X5. A gaming machine according to Feature X4, wherein the specific information includes information corresponding to a state in which the predetermined error has not occurred (error information of "0").

Feature X5 enables the receiver of information transmitted by the specific transmission process to determine whether a specific error has occurred.

Feature X6. A gaming machine as described in Feature X4 or X5, characterized in that when the predetermined error occurs, the game does not start (the determination process of step S6202 of the main MPU 72 in the 11th embodiment is repeated).

Feature X6 makes it possible for the receiver of the information transmitted by the specific transmission process to determine, based on the information, that a specific error has occurred that prevents the game from starting.

Feature X7. The predetermined errors include a first predetermined error ("award limit reached,""owned gaming value full,""awardabnormality," or "bet abnormality") and a second predetermined error ("unit connection abnormality") that may occur in a situation where the first predetermined error occurs and the game cannot be started,
A gaming machine described in feature X6, characterized in that it is equipped with a means for setting the specific information corresponding to the second specified error in the pre-setting information storage means based on the occurrence of the second specified error in a situation where the first specified error is occurring.

According to feature X7, even after a first predetermined error occurs and the game cannot be started, if a second predetermined error occurs, the receiver of the information transmitted by the specific transmission process can determine that the second predetermined error has occurred based on the information transmitted. This makes it possible for the receiver of the information transmitted by the specific transmission process to determine that the first predetermined error and the second predetermined error have occurred simultaneously.

Feature X8. A specific receiving means (an input port of the value number side MPU 142) for receiving the specific pre-setting information transmitted by the specific transmission process;
A means for executing a process of transmitting information corresponding to the specific pre-setting information received by the specific receiving means to the outside of the gaming machine (the process of step S5922 of the value number side MPU 142 in the 11th to 13th embodiments) (a function for executing the process of step S5922 of the value number side MPU 142 in the 11th to 13th embodiments);
The gaming machine according to feature X1 or X2, characterized in that it is provided with:

Feature X8 includes the configuration of feature X1 above, and when the specific information stored in the pre-setting information storage means is updated and the combination of the specific setting information stored in the setting information storage means and the specific pre-setting information stored in the pre-setting information storage means becomes a predetermined combination, the specific transmission process is executed in a configuration in which the specific transmission process is executed to transmit the specific pre-setting information, thereby transmitting information corresponding to the specific pre-setting information to an external device.

Feature X9. The gaming machine described in Feature X8 is configured such that, when the combination of the specific setting information stored in the setting information storage means and the specific pre-setting information stored in the pre-setting information storage means is the predetermined combination, if a predetermined waiting period (the period set in the first interval setting counter 96p, the period set in the second interval setting counter 96q, and the period set in the third interval setting counter 96t in the 11th to 13th embodiments) has not elapsed, the specific transmission process is not executed until the predetermined waiting period has elapsed.

Feature X9 prevents specific transmission processing from being performed before a predetermined waiting period has elapsed. This reduces the possibility that the specific transmission processing will be performed at a time when the recipient of the information transmitted by the specific transmission processing cannot properly use the information transmitted by the specific transmission processing.

Feature X10. A gaming machine according to Feature X9, characterized in that it is equipped with a waiting period setting means (a function for executing the processing of steps S6106 and S6118 by the main MPU 72 in the 11th embodiment, a function for executing the processing of step S7007 by the main MPU 72 in the 12th embodiment, and a function for executing the processing of step S7206 by the main MPU 72 in the 13th embodiment) that sets the predetermined waiting period based on the execution of the specific transmission processing.

Feature X10. A predetermined waiting period can be secured as the period from when a specific transmission process is executed until the next specific transmission process is executed. This reduces the possibility that a specific transmission process will be executed at a time when the recipient of the information transmitted by the specific transmission process cannot properly use the information transmitted by the specific transmission process.

In addition, the configuration of features X1 to X10 may be configured with any one or more of features A1 to A10, features B1 to B8, features C1 to C6, features D1 to D7, features E1 to E8, features F1 to F8, features G1 to G7, features H1 to H6, features I1 to I14, features J1 to J9, features K1 to K14, features L1 to L11, features M1 to M14, features N1 to N6, features O1 to O10, features P1 to P13, features Q1 to Q11, features R1 to R13, features S1 to S14, features T1 to T11, features U1 to U9, features V1 to V5, features W1 to W7, features X1 to X10, features Y1 to Y13, features Z1 to Z16, features a1 to a11, features b1 to b12, and features c1 to c9. This allows for a synergistic effect to be achieved through the combined configuration.

The inventions of the above feature group V, feature group W, and feature group X can solve the following problems:

Pachinko machines and slot machines are well-known gaming machines. For example, pachinko machines are equipped with a storage section for storing gaming balls. The gaming balls stored in the storage section are guided to a gaming ball launcher and launched toward the gaming area in response to the player's launch operation. Then, for example, when a gaming ball enters a ball entry section provided in the gaming area, a lottery process is executed, or a process is executed to increase the number of gaming balls available to the player.

In a slot machine, when a game value such as medals has been bet and the start lever is operated to start a new game, a lottery process is executed by the control means. Furthermore, when the lottery process is executed, the control means executes rotation start control, causing the reels to start spinning. If the stop button is operated while the reels are spinning, the control means executes rotation stop control, causing the reels to stop spinning. If the result after the reels have stopped spinning corresponds to a winning combination in the lottery process, a bonus corresponding to that winning combination is awarded to the player.

In gaming machines such as those exemplified above, information needs to be transmitted efficiently, and there is still room for improvement in this regard.

<Characteristic Group Y>
Feature Y1. An area processing execution means (a function for executing specific control processing in the main MPU 222) that executes area processing (specific control processing) using a program in a predetermined address range in the program storage means (main ROM 223);
an out-of-area processing execution means (a function of executing non-specific control processing in the main MPU 222) that executes out-of-area processing (non-specific control processing) using a program at an address outside the predetermined address range in the program storage means;
Equipped with
The in-area processing includes predetermined processing for gaming (processing of steps S9201 to S9210, steps S9212 to S9221, and steps S9223 to S9224 of the main MPU 222 in the 18th to 23rd embodiments),
The out-of-area processing includes specific processing for managing game history (the processing of steps S9211 and S9222 of the main MPU 222 in the 18th to 23rd embodiments),
This gaming machine is
A predetermined register group (first register group 265) that is used in the in-area processing but is not used in the out-area processing;
A specific register group (second register group 266) that is used in the out-of-area processing but is not used in the in-area processing;
A gaming machine characterized by comprising:

According to Feature Y1, by using registers included in the specified register group and not using registers included in the specific register group when in-region processing is being executed, it is possible to prevent information used in out-of-region processing from being overwritten when in-region processing is being executed. Furthermore, it is unnecessary to save information from the specified register group used in in-region processing when transitioning from in-region processing to out-of-region processing, and to restore the saved information to the specified register group when returning to the in-region processing state, thereby reducing the data size of the program. By using registers included in the specific register group and not using registers included in the specified register group when out-of-region processing is being executed, it is possible to prevent information used in in-region processing from being overwritten when out-of-region processing is being executed. Furthermore, it is unnecessary to save information from the specific register group used in out-of-region processing when transitioning from out-of-region processing to in-region processing, and to restore the saved information to the specific register group when returning to the in-region processing state, thereby reducing the data size of the program.

Feature Y2. A gaming machine according to Feature Y1, characterized in that the registers included in the predetermined register group or the specific register group are registers that are identified in a predetermined instruction (LD instruction, LDK instruction, IN instruction, OUT instruction, OR instruction) set in the program stored in the program storage means without using an address of a predetermined number of bytes (2 bytes).

Feature Y2 enables high-speed reading of information from and writing of information to registers included in a predetermined register group or a specific register group, while also reducing the number of bytes in instructions that use those registers.

Feature Y3: The predetermined register group includes a predetermined first register (such as the A register 271a and the HL register 274 in the eighteenth to twenty-third embodiments) as a first register,
The specific register group includes a specific first register (such as the A register 301a and the HL register 304 in the eighteenth to twenty-third embodiments) as the first register,
In a situation where the predetermined register group is being used, when the intra-area processing execution means executes a first instruction (the instruction "EX AF, AF'" in step S8803, the instruction "EXX" in step S8804) that targets the first register, the predetermined first register becomes the target,
A gaming machine according to feature Y1 or Y2, characterized in that when the specific register group is the target of use, the specific first register is the target when the first instruction (the instruction "EX AF, AF'" in step S8903, the instruction "EXX" in step S8904) that targets the first register is executed by the out-of-area processing execution means.

Feature Y3 allows the register targeted by the first instruction to be varied depending on the set of registers being used, without increasing the number of instructions that need to be stored in advance.

Feature Y4: A predetermined storage means (main RAM 224) having a plurality of predetermined storage areas (1-byte areas corresponding to each address of the main RAM 224) is provided,
The intra-area processing execution means and the extra-area processing execution means include a predetermined transfer command execution means (a function of executing the processes of steps S9001 and S9007 of the main MPU 222 in the eighteenth to twenty-third embodiments, and a function of executing the processes of steps S9902, S9904, S9906, S9911, S9913, and S9915 of the main MPU 222) that executes a predetermined transfer command (LDK command) for transferring information set in a source area to a destination area,
A gaming machine described in any one of features Y1 to Y3, characterized in that the number of bits of information set in the specified transfer command to specify a register included in either the specified register group or the specific register group as the source or destination of transfer is fewer than the number of bits of information set in the specified transfer command to specify the specified memory area as the source or destination of transfer.

Feature Y4 allows the data size of a predetermined transfer command set in a program to read information stored in a register included in either the predetermined register group or the specific register group to be reduced compared to the data size of a predetermined transfer command set in a program to read information stored in a predetermined memory area. Furthermore, the data size of a predetermined transfer command set in a program to write information to a predetermined memory area to be reduced compared to the data size of a predetermined transfer command set in a program to write information to that register.

Feature Y5: Equipped with a predetermined program counter (program counter 269 of the main CPU 251) in which address information of the command to be executed next is set,
A gaming machine described in any one of features Y1 to Y4, characterized in that the specified program counter is used in both situations where the intra-area processing is executed by the intra-area processing execution means and where the extra-area processing is executed by the extra-area processing execution means.

Feature Y5 prevents the number of program counters from increasing in a configuration that includes the configuration of feature Y1, in which a predetermined set of registers is used when in-region processing is being executed and a specific set of registers is used when out-of-region processing is being executed.

Feature Y6. A gaming machine described in any one of Features Y1 to Y4, characterized in that it is equipped with predetermined registers (I register 267, R register 268) that can be used both when the intra-area process is executed by the intra-area process execution means and when the extra-area process is executed by the extra-area process execution means.

Feature Y6, in a configuration that includes the configuration of Feature Y1, in which a predetermined set of registers is used when in-region processing is being performed and a specific set of registers is used when out-of-region processing is being performed, makes it possible to increase the number of registers available for in-region processing and the number of registers available for out-of-region processing while suppressing an increase in the number of registers.

Feature Y7: A means (a function of executing the timer interrupt process of the main MPU 222 in the eighteenth to twenty-third embodiments, an interrupt control circuit 258) for executing a predetermined interrupt process (timer interrupt process) that is started based on the occurrence of a predetermined interrupt trigger (the passage of 4 milliseconds in the eighteenth to twenty-third embodiments),
A gaming machine described in feature Y6, characterized in that the specified register is set with information (upper 8 bits) used to identify the interrupt processing program corresponding to the interrupt trigger that occurred.

Feature Y7 makes it possible to suppress an increase in the number of registers used to execute interrupt processes corresponding to interrupt triggers that occur when in-region processing is being executed, compared to a configuration in which a register used to execute interrupt processes corresponding to interrupt triggers that occur when in-region processing is being executed is provided as a separate register.

Feature Y8. A gaming machine described in Feature Y6, characterized in that the information stored in the specified register (R register 268) is updated each time a specified update trigger occurs (the main CPU 251 reads an instruction to execute an instruction stored in the main ROM 223).

Feature Y8 makes it possible to suppress an increase in the number of registers, while making information stored in specified registers and updated each time a specified update trigger occurs available for both in-domain and out-of-domain processing.

Feature Y9. A gaming machine as described in Feature Y8, wherein the predetermined update trigger occurs both when the in-area process is being executed and when the out-area process is being executed.

Feature Y9 reduces the possibility of bias occurring in the information updated in the specified register, compared to a configuration in which the information stored in the specified register is not updated when either in-region processing is being executed or out-of-region processing is being executed.

Feature Y10. A gaming machine according to Feature Y8 or Y9, characterized in that at least one of the in-area processing execution means and the out-area processing execution means is equipped with a means for acquiring information stored in the predetermined register and using the acquired information to execute a predetermined lottery process (a normal lottery winning/losing determination process) (a function for executing the process of step S9307 of the main MPU 222 in the 18th to 23rd embodiments).

Feature Y10 makes it possible to reduce the data size of the commands set in the program to obtain information used in the predetermined lottery process during at least one of the in-area processing and the out-of-area processing.

Feature Y11: A predetermined save area (the stack area 282 for specific control in the eighteenth to twenty-third embodiments) that serves as a save destination for information used in the intra-area process when a predetermined save command (PUSH command) is executed while the intra-area process is being executed;
a specific save area (the stack area 284 for non-specific control in the eighteenth to twenty-third embodiments) that serves as a save destination for information used in the out-of-area processing when the predetermined save command is executed while the out-of-area processing is being executed;
A gaming machine according to any one of features Y1 to Y10, characterized by comprising:

Feature Y11 allows for a reduction in the number of registers included in the specified register group and the specific register group in a configuration that includes the configuration of feature Y1, in which a specified register group is used when in-region processing is being performed and a specific register group is used when out-of-region processing is being performed.

Feature Y12. A gaming machine according to any one of Features Y1 to Y11, characterized in that when a predetermined call instruction (CALLA instruction) is executed to call a program corresponding to a specific process included in the out-of-area process (second stack pointer storage process, fraud detection process, base value calculation and setting process, initial setting process for non-specific control, and second management process) while the in-area process is being executed, the register group to be used is switched from the predetermined register group to the specific register group based on the execution of the predetermined call instruction, and the specific process is started.

Feature Y12, in a configuration having the configuration of feature Y1 described above, in which a predetermined register group is used when in-region processing is being executed and a specific register group is used when out-of-region processing is being executed, can prevent a situation from occurring in which a predetermined register group corresponding to in-region processing is used even when out-of-region processing is being executed.

Feature Y13: A means (a function of executing the timer interrupt process of the main MPU 222 in the eighteenth to twenty-third embodiments, an interrupt control circuit 258) for executing a predetermined interrupt process (timer interrupt process) that is started based on the occurrence of a predetermined interrupt trigger (the passage of 4 milliseconds in the eighteenth to twenty-third embodiments),
A gaming machine described in any one of features Y1 to Y12, characterized in that when a predetermined call instruction (CALLA instruction) is executed to call a program corresponding to a specific process included in the outside-area process (second stack pointer storage process, fraud detection process, base value calculation setting process, initial setting process for non-specific control, and second management process) while the inside-area process is being executed, the execution of the predetermined call instruction results in a state in which the start of the predetermined interrupt process is prohibited, and the specific process is started.

Feature Y13 prevents a specified interrupt process from being started after an out-of-area process has started. This eliminates the need to save information used in the out-of-area process when the specified interrupt process starts. This reduces the processing load required to start the specified interrupt process and reduces the data size of the instructions set in the program to start the specified interrupt process.

In addition, the configuration of features Y1 to Y13 may be configured with any one or more of features A1 to A10, features B1 to B8, features C1 to C6, features D1 to D7, features E1 to E8, features F1 to F8, features G1 to G7, features H1 to H6, features I1 to I14, features J1 to J9, features K1 to K14, features L1 to L11, features M1 to M14, features N1 to N6, features O1 to O10, features P1 to P13, features Q1 to Q11, features R1 to R13, features S1 to S14, features T1 to T11, features U1 to U9, features V1 to V5, features W1 to W7, features X1 to X10, features Y1 to Y13, features Z1 to Z16, features a1 to a11, features b1 to b12, and features c1 to c9. This allows for a synergistic effect to be achieved through the combined configuration.

<Feature Z group>
Feature Z1. The device includes predetermined registers (such as the AF register 271, BC register 272, DE register 273, and HL register 274 of the first register group 265 in the eighteenth to twenty-third embodiments, and the AF register 301, BC register 302, DE register 303, and HL register 304 of the second register group 266) and specific registers (the V register 278 of the first register group 265, the V register 308, I register 267, and R register 268 of the second register group 266) that are used when executing various processes,
As auxiliary registers corresponding to the predetermined registers, predetermined auxiliary registers (such as an AF' register 291, a BC' register 292, a DE' register 293, and an HL' register 294 of the first register group 265, and an AF' register 311, a BC' register 312, a DE' register 313, and an HL' register 314 of the second register group 266) are provided to be used for saving data stored in the predetermined registers,
A gaming machine characterized in that the auxiliary register corresponding to the specific register is not provided.

According to feature Z1, by providing a predetermined auxiliary register as an auxiliary register corresponding to the predetermined register, the configuration for specifying the backup destination of data stored in the predetermined register can be simplified compared to a configuration in which the predetermined auxiliary register is not provided.

In a configuration in which a specified auxiliary register is provided as an auxiliary register for a specified register, an increase in the number of registers can be suppressed by configuring a specific register so that no corresponding auxiliary register is provided.

Feature Z2. The gaming machine described in Feature Z1 is characterized in that the predetermined register and the specific register are registers that are identified in a predetermined instruction (LD instruction, LDK instruction, IN instruction, OUT instruction, OR instruction) set in the program without using an address of a predetermined number of bytes (2 bytes).

Feature Z2 enables high-speed reading of information from a specified register or a specific register, and high-speed writing of information to a specified register or a specific register. It also reduces the number of bytes in an instruction that uses a specified register or a specific register.

Feature Z3. A gaming machine as described in Feature Z1 or Z2, characterized in that no information other than the information stored in the specified register is written to the specified auxiliary register.

Feature Z3 prevents information saved from a specified register to a specified auxiliary register from being overwritten with information other than the information stored in the specified register. This reduces the possibility of losing information saved from a specified register to a specified auxiliary register.

Feature Z4. A gaming machine described in any one of Features Z1 to Z3, characterized in that the information stored in the specified auxiliary register is read from the specified register.

Feature Z4 simplifies the configuration for restoring information saved from a specified register to the specified register, compared to a configuration in which a specified auxiliary register is not provided.

Feature Z5: Equipped with a predetermined storage means (main RAM 224) having a plurality of predetermined storage areas (1-byte areas corresponding to each address of the main RAM 224),
a predetermined transfer command execution means for executing a predetermined transfer command (LD command, LDK command) for transferring information set in a source area to a destination area (a function for executing the processes of steps S9001 and S9007 of the main MPU 222 in the eighteenth to twenty-third embodiments, and a function for executing the processes of steps S9902, S9904, S9906, S9911, S9913, and S9915 of the main MPU 222);
Equipped with
A gaming machine described in any one of features Z1 to Z4, characterized in that the number of bits of information set in the specified transfer command to designate either the specified register or the specific register as the source or destination of transfer is fewer than the number of bits (2 bytes) of information set in the specified transfer command to designate the specified memory area as the source or destination of transfer.

Feature Z5 allows the data size of a predetermined transfer command set in a program to read information stored in either a predetermined register or a specific register to be reduced compared to the data size of a predetermined transfer command set in a program to read information stored in a predetermined memory area. Furthermore, the data size of a predetermined transfer command set in a program to write information to either a predetermined register or a specific register can be reduced compared to the data size of a predetermined transfer command set in a program to write information to a predetermined memory area.

Feature Z6: The specific registers include predetermined registers (V registers 278, 308, I register 267) that store predetermined information (the most significant byte of the monitoring and control register group 257, "ABH", and the most significant byte of the start address pointer, "01H") used to specify a predetermined address of a predetermined number of bits (2 bytes) (the address of a register included in the monitoring and control register group 257 in the eighteenth to twenty-third embodiments, and the start address of the timer interrupt process in the eighteenth to twenty-third embodiments),
A gaming machine described in any one of features Z1 to Z5, characterized in that when the specified information stored in the specified register is used, the number of bits of information required to identify the specified address is fewer than the specified bits.

Feature Z6 reduces the number of bits of information required to identify a specific address, thereby reducing the data size of instructions set in a program.

Feature Z7: A means (a function of executing the timer interrupt process of the main MPU 222 in the eighteenth to twenty-third embodiments, an interrupt control circuit 258) for executing a predetermined interrupt process (timer interrupt process) that is started based on the occurrence of a predetermined interrupt trigger (the passage of four milliseconds in the eighteenth to twenty-third embodiments),
A gaming machine described in feature Z6, characterized in that the specified information is information used to identify a program for executing interrupt processing corresponding to an interrupt trigger that has occurred.

Feature Z7 simplifies the configuration for identifying a program to execute interrupt processing corresponding to an interrupt trigger that has occurred.

Feature Z8. Peripheral function setting registers (setting register group 256, monitoring control register group 257) in which information for controlling the peripheral functions of the control means (main side MPU 222) is set,
A peripheral function control execution means for controlling the peripheral functions based on the information set in the peripheral function setting register (a function for executing the processes of steps S8702 and S8711 of the main MPU 222 in the eighteenth to twenty-third embodiments, and a function for executing the processes of steps S9218 to S9220 of the main MPU 222);
Equipped with
A gaming machine described in feature Z6, characterized in that the specified information is information used to identify an address corresponding to the peripheral function setting register.

Feature Z8 reduces the data size of the information set in the program to specify the peripheral function setting register.

Feature Z9. A gaming machine described in any one of Features Z1 to Z8, characterized in that the specific register is a specific register (R register 268) in which the stored information is updated each time a predetermined update trigger occurs (the main CPU 251 reads an instruction to execute an instruction stored in the main ROM 223).

Feature Z9 makes it possible to use information that is updated each time a specified update trigger occurs, while suppressing an increase in the number of registers, compared to a configuration in which auxiliary registers corresponding to specific registers are provided.

Feature Z10. A gaming machine as described in Feature Z9, characterized in that it is equipped with a means for executing a predetermined lottery process (regular lottery win/loss determination process) using information obtained from the specific register (a function for executing the process of step S9307 of the main MPU 222 in the 18th to 23rd embodiments).

Feature Z10 reduces the data size of the commands set in the program to obtain information used in the specified lottery process.

Feature Z11. A gaming machine according to any one of Features Z1 to Z10, characterized in that it is equipped with a means for executing a predetermined exchange command (the command "EX AF, AF'" or the command "EXX") that exchanges information stored in the predetermined register with information stored in the predetermined auxiliary register corresponding to the predetermined register (a function that executes the processing of steps S9201, S9202, S9223, and S9224 of the main MPU 222 in the 18th to 23rd embodiments).

According to Feature Z11, by executing a specified exchange instruction, it is possible to save information stored in a specified register to a specified auxiliary register, and restore information saved in a specified auxiliary register, while preventing the loss of information stored in the specified register and information saved in a specified auxiliary register. This reduces the number of instructions and data size set in a program to save information stored in a specified register and restore information saved in a specified auxiliary register.

Feature Z12. A means for executing a predetermined calculation command (subtraction command) to perform a predetermined calculation (subtraction) (a function for executing the process of step SA408 of the main MPU 222 in the eighteenth embodiment, a function for executing the process of step SB110 of the main MPU 222 in the nineteenth embodiment, and a function for executing the process of step SB209 of the main MPU 222);
an area corresponding to the calculation result (a zero flag and a carry flag provided in the F register 271b) whose value changes depending on the calculation result of the predetermined calculation;
Equipped with
A gaming machine described in feature Z11, characterized in that the value of the calculation result corresponding area does not change before and after execution of the specified exchange command.

Feature Z12 allows a process for executing a predetermined exchange instruction to be set between a process for executing a predetermined calculation instruction and a process for using the value of the calculation result corresponding area that has changed in accordance with the calculation result of the predetermined calculation instruction. This eliminates the need for a process for saving the value of the calculation result corresponding area that has changed in accordance with the calculation result of the predetermined calculation instruction in a memory area separate from the calculation result corresponding area after the process for executing the predetermined calculation instruction but before the process for executing the predetermined exchange instruction, and a process for reading out the saved value after the process for executing the predetermined exchange instruction. This reduces the number of instructions and data volume set in a program. This increases the degree of freedom in program design.

Feature Z13. A means for executing predetermined processing (the processing of steps S8714 to S8715 of the main MPU 222) (a function for executing the processing of steps S8714 to S8715 of the main MPU 222 in the 18th to 23rd embodiments),
A means for executing a predetermined interrupt process (timer interrupt process) based on the occurrence of a predetermined interrupt trigger (the passage of 4 milliseconds) while the predetermined process is being executed (a function for executing the timer interrupt process of the main MPU 222 in the 18th to 23rd embodiments, an interrupt control circuit 258);
A start exchange means (a function for executing the processing of steps S9201 to S9202 in the main MPU 222) for executing the predetermined exchange command based on the occurrence of the predetermined interrupt trigger;
A means for executing the predetermined exchange command when the predetermined interrupt process is ended and the process is returned to (a function for executing the processes of steps S9223 to S9224 in the main MPU 222);
A gaming machine according to feature Z11 or Z12, characterized in that it is equipped with:

According to Feature Z13, information used in a predetermined process before the start of the predetermined interrupt process can be saved in a predetermined auxiliary register throughout the period during which the predetermined interrupt process is being executed. Then, when the predetermined interrupt process is terminated and the process is returned to, the information saved in the predetermined auxiliary register can be restored to the predetermined register.

Feature Z14. A means for executing a predetermined process (residual process) that is repeatedly executed (a function for executing the residual process of the main MPU 222 in the 19th embodiment),
A means for executing a predetermined interrupt process (timer interrupt process) based on the occurrence of a predetermined interrupt trigger (a function for executing the timer interrupt process in the main MPU 222);
An interrupt prohibiting means (a function of executing the processing of step SA817 in the main MPU 222) that prohibits the start of the predetermined interrupt processing at the start of the predetermined processing;
An interrupt permission means (a function of executing an interrupt permission process in the main MPU 222) that allows activation of the predetermined interrupt process when the predetermined process is completed;
A means for executing the predetermined exchange command when the predetermined interrupt processing is being executed (a function for executing the processing of steps SB107, SB111, SB114, SB118, and SB122 of the main MPU 222 in the 19th embodiment, and a function for executing the processing of steps SB204 and SB214 of the main MPU 222);
A gaming machine according to feature Z11 or Z12, characterized in that it is equipped with:

Feature Z14 prevents a predetermined interrupt process from starting when a predetermined process has finished, preventing the predetermined interrupt process from starting in the middle of the predetermined process. This eliminates the need to save information used in the predetermined process to a predetermined auxiliary register while the predetermined interrupt process is being executed. This makes it possible to use the predetermined register and the predetermined auxiliary register in the predetermined interrupt process.

Feature Z15. A predetermined storage area (a stack area 282 for specific control, a stack area 284 for non-specific control) having a plurality of storage areas (a storage area included in the stack area 282 for specific control in the eighteenth to twenty-third embodiments, and a storage area included in the stack area 284 for non-specific control),
a write destination update unit (a function of executing a PUSH command from the main MPU 222) that updates the storage area to which information is to be written in the predetermined storage area;
a read source update unit (a function of executing a POP command of the main MPU 222) for updating the storage area from which information is to be read in the predetermined storage area;
A predetermined saving means (a function of executing the processes of steps SB105, SB106, and SB113 of the main MPU 222 in the 19th embodiment) for saving the information stored in the predetermined register to the storage area to which the information is to be written in the predetermined storage area;
A gaming machine according to any one of features Z1 to Z14, characterized in that it is provided with:

According to feature Z15, after information is saved from a specified register to a specified auxiliary register, the information stored in the specified register can be saved to a storage area in the specified storage area that is the target of writing. This prevents the information saved in the specified auxiliary register from being overwritten. Furthermore, after information is saved from a specified register to a storage area in the specified storage area that is the target of writing, the information stored in the specified register can be saved to the specified auxiliary register. This prevents the information saved in the storage area in the specified storage area from being overwritten.

Feature Z16. The gaming machine described in Feature Z15 is characterized in that it comprises means for executing, after the predetermined saving means has performed a process of saving the information stored in the predetermined register to the memory area to be written in the predetermined memory area (processing of step SB105 by the main MPU 222 in the 19th embodiment), a process of exchanging the information stored in the predetermined register with the information stored in the predetermined auxiliary register (processing of step SB107 by the main MPU 222), and a process of reading the information saved in the memory area into a register other than the predetermined register (processing of step SB109 by the main MPU 222).

Feature Z16 makes it possible to make available both the information stored in the specified register and the information stored in the specified auxiliary register.

In addition, any one or more of the following configurations may be applied to the configurations of features Z1 to Z16: features A1 to A10, features B1 to B8, features C1 to C6, features D1 to D7, features E1 to E8, features F1 to F8, features G1 to G7, features H1 to H6, features I1 to I14, features J1 to J9, features K1 to K14, features L1 to L11, features M1 to M14, features N1 to N6, features O1 to O10, features P1 to P13, features Q1 to Q11, features R1 to R13, features S1 to S14, features T1 to T11, features U1 to U9, features V1 to V5, features W1 to W7, features X1 to X10, features Y1 to Y13, features Z1 to Z16, features a1 to a11, features b1 to b12, and features c1 to c9. This allows for a synergistic effect to be achieved through the combined configuration.

The invention relating to the above-mentioned feature group Y and feature group Z can solve the following problems.

Pachinko machines and slot machines are known types of gaming machines. These gaming machines are known to be configured so that an internal lottery is held when certain lottery conditions are met, and a bonus is awarded to the player depending on the results of the internal lottery.

Specific examples of pachinko machines include those that transition to a special game state when an internal lottery is won based on a game ball entering a ball entry section in the game area, and those that transition to a special game state when a game ball enters a specified ball entry section. When a transition to a special game state occurs, for example, a ball entry device in the game area begins to open and close, and game balls are paid out based on the ball entering the ball entry device.

Here, in gaming machines such as those exemplified above, processing needs to be executed appropriately, and there is still room for improvement in this regard.

<Feature group a>
Feature a1. A control unit (main MPU 222) that executes various processes;
reset means (the reset circuit 254, the internal register initialization circuit 251 a, the supply switching circuit 253 a, and the external register initialization circuit 355) for resetting the control means (the reset of the main MPU 222 in the eighteenth, nineteenth, and twenty-third embodiments, and the full reset of the main MPU 222 in the twentieth to twenty-second embodiments) based on the occurrence of a reset execution trigger (at least one of the first reset signal and the second reset signal input to the reset circuit 254 being at a LOW level when the voltage of the second operating power supplied to the main power supply control unit 253 is 2.1 V or higher in the eighteenth to twenty-third embodiments; both the first reset signal and the second reset signal input to the reset circuit 254 being at a LOW level when the voltage of the second operating power supplied to the main power supply control unit 253 is 2.1 V or higher in the twenty-first and twenty-second embodiments; or detection of the falling edge of the first reset signal or the falling edge of the second reset signal input to the reset circuit 254);
A predetermined reset signal (first reset signal) is output to the reset means based on the occurrence of a predetermined trigger (the reset delay period has elapsed since the fall of the power outage signal, or the voltage of the second normal operating power monitored by the power outage monitoring board 225 has become equal to or lower than the first reset reference voltage). A predetermined reset signal output means (power outage monitoring board 225, power outage signal control circuit 225c, first reset signal control circuit 225d, power outage signal delay circuit 225e) that causes the reset execution trigger to occur by setting the state in which the first reset signal is lowered to a LOW level;
specific reset signal output means (main power supply control unit 253, voltage monitoring circuit 354) that, based on the occurrence of a specific trigger (the voltage of the second normal operating power monitored by the voltage monitoring circuit 354 becoming equal to or lower than a falling detection voltage), causes the reset execution trigger to occur by outputting a specific reset signal (second reset signal) to the reset means (a state in which the second reset signal is lowered to a LOW level);
A gaming machine characterized by comprising:

According to feature a1, the control means can be reset based on the occurrence of a predetermined trigger, even if a specific trigger has not occurred. Furthermore, the control means can be reset based on the occurrence of a specific trigger, even if a predetermined trigger has not occurred. This prevents the control means from becoming unstable when the supply of operating power to the gaming machine is stopped without resetting the control means.

Feature a2. The control means and the specific reset signal output means are provided on a predetermined board (main control board 221),
The gaming machine described in feature a1 is characterized in that the predetermined reset signal output means is provided on a specific board (power outage monitoring board 225) different from the predetermined board.

Feature a2 makes it possible to reset the control means based on a predetermined reset signal input to the reset means from a predetermined reset signal output means provided on a specific board different from the predetermined board on which the control means is provided, and to reset the control means based on a specific reset signal input to the reset means from a specific reset signal output means provided on the same board as the control means. This reduces the possibility of the control means becoming unstable due to a circuit abnormality on the predetermined board or the specific board preventing the control means from being reset.

Feature a3. A predetermined power supply means (power supply/launch control device 218) that outputs operating power for the control means;
A predetermined power monitoring means (power outage monitoring board 225) that monitors the predetermined power (first normal operating power) output from the predetermined power supply means;
Equipped with
The predetermined power monitoring means monitors the predetermined power supplied from the predetermined power supply means to the predetermined power monitoring means, and determines that the predetermined event has occurred based on the monitoring result. A predetermined event identification means (power outage monitoring board 225, first voltage monitoring circuit 225a) is provided.
A gaming machine described in feature a1 or a2, characterized in that the predetermined reset signal output means puts the predetermined reset signal into a state in which it is output based on the occurrence of the predetermined trigger being identified by the predetermined trigger identification means.

According to feature a3, if the occurrence of a specified trigger is identified based on the supply status of specified power from the specified power supply means to the specified power monitoring means, the control means can be reset even if the specified trigger has not occurred.

Feature a4: A specific power monitoring means (voltage monitoring circuit 354) is provided to monitor the specific power (second normal operating power) output from the predetermined power supply means,
The specific power monitoring means monitors the specific power supplied from the predetermined power supply means to the specific power monitoring means, and is equipped with a specific opportunity identification means (power outage monitoring board 225, second voltage monitoring circuit 225b) that identifies the occurrence of the specific opportunity based on the monitoring result,
A gaming machine described in feature a3, characterized in that the specific reset signal output means puts the specific reset signal into a state in which it is output based on the occurrence of the specific trigger being identified by the specific trigger identification means.

According to feature a4, if the occurrence of a specific trigger is identified based on the supply status of specific power from the specific power supply means to the specific power monitoring means, the control means can be reset even if the specific trigger has not occurred.

Feature a5: The specified power output from the specified power supply means is supplied to the specified power monitoring means via the specified power monitoring means,
The gaming machine described in feature a4 is characterized in that the specified power monitoring means is equipped with a means (power outage monitoring board 225, second voltage monitoring circuit 225b) that monitors the specified power supplied to the specified power monitoring means and determines that the specified trigger has occurred based on the monitoring results.

According to feature a5, the specific power output from the specific power supply means can be configured to be monitored by the specific power monitoring means and the specific power monitoring means. Furthermore, a specific trigger can be generated based on the monitoring results of the supply status of the specific power monitored by the specific power monitoring means, and a specific trigger can be generated based on the monitoring results of the supply status of the specific power monitored by the specific power monitoring means. This increases the likelihood that the control means will be reset based on the supply status of the specific power from the specific power supply means.

Feature a6. A gaming machine as described in Feature a5, wherein the predetermined power supply means outputs the predetermined power and the specific power that is different from the predetermined power.

According to feature a6, when the occurrence of a predetermined trigger is identified based on the supply state of the predetermined power supplied to the predetermined power monitoring means, the predetermined reset signal output means can be configured to output a predetermined reset signal regardless of whether the occurrence of a predetermined trigger is identified based on the supply state of the specific power supplied to the predetermined power monitoring means. Furthermore, when the occurrence of a predetermined trigger is identified based on the supply state of the specific power supplied to the predetermined power monitoring means, the predetermined reset signal output means can be configured to output a predetermined reset signal regardless of whether the occurrence of a predetermined trigger is identified based on the supply state of the specific power supplied to the predetermined power monitoring means. This prevents the control means from becoming unstable when the supply of operating power to the gaming machine is stopped without resetting the control means.

Feature a7. The predetermined power monitoring means monitors the supply status of the predetermined power supplied from the predetermined power supply means to the predetermined power monitoring means, and outputs a predetermined power outage signal (power outage signal) to the control means based on the occurrence of a predetermined trigger (a state in which the maximum voltage of the first normal operating power monitored by the power outage monitoring board 225 is not detected continues over a power outage reference period), A predetermined output means (power outage monitoring board 225, power outage signal control circuit 225c) is provided,
The control means includes a means for executing a power outage response process (power outage processing) based on receiving the predetermined power outage signal (a function for executing the power outage processing of the main MPU 222 in the 18th to 23rd embodiments),
A gaming machine described in any one of features a2 to a6, characterized in that the predetermined trigger occurs based on the lapse of a predetermined period (reset delay period) after the occurrence of the predetermined trigger.

According to feature a7, the control means can be configured to execute power outage response processing between the occurrence of a predetermined trigger and the resetting of the control means. This allows the control means to be reset while the power outage response processing is being executed.

Feature a8. The predetermined power and a specific power (second normal operating power) are included as powers monitored by the predetermined power monitoring means,
the predetermined trigger occurs based on a supply state of the predetermined power to the predetermined power monitoring means,
A gaming machine described in feature a7, characterized in that the specified trigger occurs based on the supply status of the specific power to the specified power monitoring means even if the specified trigger does not occur.

According to feature a8, in a configuration having the configuration of feature a7 above, where if a predetermined trigger occurs based on the supply status of a predetermined power monitored by the predetermined power monitoring means, the predetermined trigger occurs based on the lapse of a predetermined period of time since the occurrence of the predetermined trigger, even if the predetermined trigger does not occur based on the supply status of the predetermined power, the predetermined trigger can be generated based on the supply status of the specific power monitored by the predetermined power monitoring means. This reduces the possibility of a situation occurring in which the predetermined trigger does not occur when the supply of operating power to the gaming machine is stopped.

Feature a9. A gaming machine as described in Feature a8, wherein, in a situation where the supply of operating power is stopped, the timing at which the specific trigger occurs is later than the timing at which the predetermined trigger occurs based on the supply status of the predetermined power monitored by the predetermined power monitoring means.

According to feature a9, the control means is configured to be reset based on the state of a predetermined reset signal input from a predetermined output means to the reset means, and if a circuit abnormality occurs and the control means is not reset based on the state of the predetermined reset signal, the control means can be reset based on the state of a specific reset signal input from a specific output means to the reset means.

Feature a10. A gaming machine described in any one of Features a1 to a9, characterized in that the reset means is provided with a predetermined filter (noise filter 356) that determines that the predetermined reset signal has been input to the reset means based on the predetermined reset signal being input to the reset means over a period of a predetermined number of system clocks (a period of six system clocks).

Feature a10 eliminates the need for the control means to set a period to confirm that the change in state of the specified reset signal is not due to noise. This allows the control means to be reset quickly.

Feature a11. After the supply of operating power is started, the predetermined reset signal is output from the predetermined reset signal output means and the specific reset signal is output from the specific reset signal output means,
A gaming machine described in any one of features a1 to a10, characterized in that it is provided with a means (reset execution signal control circuit 254a, reset control circuit 254b) for canceling the reset of the control means based on the fact that, when the control means is being reset, neither the predetermined reset signal nor the specific reset signal is input to the reset means (a state in the 18th to 20th and 23rd embodiments in which both the first reset signal and the second reset signal input to the reset circuit 254 are at HI level).

According to feature a11, the control means is reset after the supply of operating power to the gaming machine begins, thereby eliminating an unstable state of the control means.

By configuring the control means so that it does not release its reset state until neither the predetermined reset signal nor the specific reset signal is input to the reset means, it is possible to ensure that the control means begins operating after the reset is released once a power supply state is reached that allows the control means to operate normally.

In addition, the configurations of features a1 to a11 may be configured with any one or more of features A1 to A10, features B1 to B8, features C1 to C6, features D1 to D7, features E1 to E8, features F1 to F8, features G1 to G7, features H1 to H6, features I1 to I14, features J1 to J9, features K1 to K14, features L1 to L11, features M1 to M14, features N1 to N6, features O1 to O10, features P1 to P13, features Q1 to Q11, features R1 to R13, features S1 to S14, features T1 to T11, features U1 to U9, features V1 to V5, features W1 to W7, features X1 to X10, features Y1 to Y13, features Z1 to Z16, features a1 to a11, features b1 to b12, and features c1 to c9. This allows for a synergistic effect to be achieved through the combined configuration.

The invention relating to the above feature group a can solve the following problems:

Pachinko machines and slot machines are known types of gaming machines. These gaming machines are known to be configured so that an internal lottery is held when certain lottery conditions are met, and a bonus is awarded to the player depending on the results of the internal lottery.

Specific examples of pachinko machines include those that transition to a special game state when an internal lottery is won based on a game ball entering a ball entry section in the game area, and those that transition to a special game state when a game ball enters a specified ball entry section. When a transition to a special game state occurs, for example, a ball entry device in the game area begins to open and close, and game balls are paid out based on the ball entering the ball entry device.

Here, in gaming machines such as those exemplified above, it is necessary to reset the control means appropriately, and there is still room for improvement in this regard.

<Feature group b>
Feature b1. In a gaming machine equipped with a specific control means (the payout side MPU 261 in the eighteenth to twenty-third embodiments) that executes various processes,
The specific control means
Predetermined receiving means (first receiving terminal 361, second receiving terminal 362);
A receiving information storage means (a payout side receiving buffer 363) in which information received by the predetermined receiving means is stored;
Equipped with
This gaming machine is provided with a predetermined reception limiting means (reception limiting circuit 371, reset-compatible output terminal 368) that generates a predetermined limited state (a state in which the signals input to the 22nd input terminal 373b of the first logic circuit 373 and the 32nd input terminal 374b of the second logic circuit 374 are fixed at a LOW level) in which a change in state (a change from a HIGH level to a LOW level) of a signal input to the predetermined reception means is limited,
A gaming machine characterized in that in a predetermined situation (a situation from when the payout side MPU 261 is reset until the reset response signal raising process is executed), the predetermined receiving control means enters the predetermined restricted state, and in a specific situation different from the predetermined situation (a situation after the reset response signal raising process is executed), the predetermined receiving control means enters a predetermined restricted release state in which the predetermined restricted state is released (a state in which the signals input to the 22nd input terminal 373b of the first logic circuit 373 and the 32nd input terminal 374b of the second logic circuit 374 are fixed at a HI level).

According to feature b1, in certain circumstances, the state change of the signal input to the specified receiving means is not restricted, and data received by the specified receiving means is stored in the received information storage means, while in certain circumstances, a specified restricted state is entered, and data reception by the specified receiving means is restricted. This allows the data reception restrictions of the specified receiving means to be adjusted depending on the situation, allowing data to be received optimally.

Feature b2. A gaming machine as described in Feature b1, characterized in that it is equipped with a predetermined restriction signal output means (payout side MPU 261, reset-compatible output terminal 368) that outputs a predetermined restriction signal (a LOW-level signal output from the reset-compatible output terminal 368) to the predetermined reception restriction means to set the predetermined restriction state.

Feature b2 allows the configuration to switch between a predetermined restriction state and a predetermined restriction-released state depending on the output mode of the predetermined restriction signal from the predetermined restriction signal output means. This prevents the configuration for switching between the predetermined restriction state and the predetermined restriction-released state from becoming complicated.

Feature b3. The gaming machine described in Feature b2, wherein the specific control means is provided with the predetermined restriction signal output means.

Feature b3 makes it possible to switch between a specified restricted state and a specified restricted state without delay, depending on the execution status of the process in the specific control means.

Feature b4: The predetermined reception limiting means includes corresponding data output means (the second output terminal 373c of the first logic circuit 373, the third output terminal 374c of the second logic circuit 374) that outputs to the predetermined receiving means a predetermined data corresponding signal (a signal output from the second output terminal 373c or the third output terminal 374c) that corresponds to the state (LOW level or HIGH level) of the predetermined data signal (a data signal corresponding to data output from the main MPU 222, a data signal corresponding to data output from the connection terminal board 255) input to the predetermined reception limiting means,
When the predetermined restriction signal is not input to the predetermined reception restriction means, the state of the predetermined data corresponding signal output from the corresponding data output means changes in response to a change in the state of the predetermined data signal input to the predetermined reception restriction means, thereby entering the predetermined restriction release state,
A gaming machine described in feature b2 or b3, characterized in that when the predetermined restriction signal is input to the predetermined reception restriction means, the predetermined restriction state is entered in which the state of the predetermined data corresponding signal output from the corresponding data output means does not change even if the state of the predetermined data signal input to the predetermined reception restriction means changes.

Feature b4 allows for easy switching between the specified restriction state and the specified restriction-free state depending on the output mode of the specified restriction signal to the specified reception restriction means.

Feature b5. A gaming machine described in any one of Features b2 to b4, wherein the predetermined reception restriction means is a circuit that transmits to the predetermined receiving means a predetermined data corresponding signal that corresponds to a combination of the state of the predetermined restriction signal and the state of the predetermined data signal input to the predetermined reception restriction means.

Feature b5 allows the operation of switching between the specified restriction state and the specified restriction-free state based on the state of the specified restriction signal input to the specified reception restriction means to be a hardware operation. This prevents the configuration of the specified reception restriction means from becoming complicated.

Feature b6: A specific initialization means (dispensing side MPU 261) is provided that performs specific initialization (resetting the dispensing side MPU 261) to set the specific control means to a specific initialization state (a state in which the dispensing side MPU 261 has been reset) based on the occurrence of a specific initialization trigger (a falling edge of the dispensing side reset signal input to the dispensing side MPU 261, or the occurrence of travel outside the designated area in the dispensing side MPU 261),
A gaming machine according to any one of features b1 to b5, characterized in that the predetermined situation is established based on the specific initialization of the specific control means.

Feature b6 reduces the possibility that a change in the state of a signal input to the specified receiving means occurs after specific initialization of the specific control means, causing data corresponding to that signal state change to be stored in the received information storage means, and also reduces the possibility that processing based on data corresponding to that signal state change will be executed in the specific control means.

Feature b7. A gaming machine according to Feature b6, wherein the specific control means is equipped with a predetermined restriction release means (a function for executing the processing of step SA707 of the payout side MPU 261 in the 18th embodiment, and a function for executing the processing of step SB408 of the payout side MPU 261 in the 23rd embodiment) that releases the predetermined restriction state after the specific initialization state of the specific control means is released and the specific control means enters a state in which processing is executed.

According to feature b7, after the specific control means is released from the specific initialization state and enters a state in which processing can be executed by the specific control means, the specified restriction state is released and the specific restriction is released. This allows the specific control means to execute processing based on data received by the specified receiving means after the specific control means enters a state in which processing can be executed.

Feature b8. The specific control means
A specific control processing execution means (a function of executing the payout side main processing in the payout side MPU 261) that executes a specific control processing (a payout side main processing in the eighteenth to twenty-third embodiments) after the specific initialization state of the specific control means is released and the specific restriction state is released by the specific restriction release means;
means for executing a predetermined abnormality response process (dispensing side execution stop process) based on the fact that the data volume of the information stored in the received information storage means is equal to or greater than a specific reference data volume (dispensing side abnormality reference data volume in the 18th to 23rd embodiments) after the specific initialization state of the specific control means is released and before the specific restriction state is released (a function for executing the process of step SA709 of the dispensing side MPU 261 in the 18th embodiment, a function for executing the process of step SB410 in the 23rd embodiment);
The gaming machine according to feature b7, characterized in that it is provided with:

According to feature b8, if an abnormal state occurs in which the data volume of information stored in the received information storage means exceeds a specific reference data volume before the specified restricted state is released, a specified abnormality response process can be executed. This prevents specific control processes from being initiated in this abnormal state, and also prevents processes based on data stored in the received information storage means from being executed in this abnormal state.

Feature b9. The specific control means includes a means for setting a predetermined monitoring period (a dispensing-side release waiting period) before the predetermined restriction state is released by the predetermined restriction release means (a function for executing the processing of step SA704 of the dispensing-side MPU 261 in the eighteenth embodiment, and a function for executing the processing of step SB405 of the dispensing-side MPU 261 in the twenty-third embodiment),
A gaming machine described in feature b8, characterized in that the specified abnormality response processing is executed based on the data volume of the information stored in the received information storage means being equal to or greater than the specific standard data volume at the end of the specified monitoring period.

According to feature b9, if an abnormal condition occurs in which the data volume of information stored in the received information storage means during a specified monitoring period exceeds a specified reference amount, a specified abnormality response process can be executed. This reduces the possibility that a specific control process will be initiated without executing the specified abnormality response process, even though an abnormal condition has occurred.

Feature b10. The specific initialization triggers include a first specific initialization trigger (the occurrence of a falling edge of the dispensing side reset signal input to the dispensing side MPU 261 in the 23rd embodiment) and a second specific initialization trigger (the occurrence of travel outside the designated area in the dispensing side MPU 261),
The specific initialization states include a first specific initialization state (a state in which the dispensing side MPU 261 is completely reset in the 23rd embodiment) that occurs when the specific initialization is performed based on the occurrence of the first specific initialization trigger, and a second specific initialization state (a state in which the dispensing side MPU 261 is partially reset in the 23rd embodiment) that occurs when the specific initialization is performed based on the occurrence of the second specific initialization trigger,
When the specific initialization of the specific control means is performed based on the occurrence of the first specific initialization trigger, the specific monitoring period is set after the first specific initialization state of the specific control means is released and before the specific restricted state is released,
A gaming machine as described in feature b9, characterized in that when the specific initialization of the specific control means is performed based on the occurrence of the second specific initialization trigger, after the second specific initialization state of the specific control means is released, the specific control processing is started without the specified monitoring period being set.

According to feature b10, when specific initialization of the specific control means is performed based on the occurrence of a first specific initialization trigger, a predetermined monitoring period is set after the first specific initialization state of the specific control means is released. Therefore, if an abnormal state occurs in which the data volume of information stored in the received information storage means exceeds a predetermined reference amount during the predetermined monitoring period, a predetermined abnormality response process can be executed.

When specific initialization of the specific control means is performed based on the occurrence of a second specific initialization trigger, the specific control processing is started without setting a predetermined monitoring period after the second specific initialization state of the specific control means is released. This reduces the time between specific initialization of the specific control means and the start of the specific control processing compared to a configuration in which a predetermined monitoring period is set. This allows for a swift return to a state in which the specific control processing is being executed after the second specific initialization trigger occurs.

Feature b11. Equipped with a predetermined control means (main MPU 222 in the 18th to 23rd embodiments),
A gaming machine described in any one of features b8 to b10, characterized in that information (gaming machine information) is transmitted from the specified control means to the specified receiving means each time a specified transmission trigger occurs (the passage of 300 milliseconds in the 18th to 23rd embodiments).

According to feature b11, in a configuration having the configuration of feature b1 above, in which a predetermined restricted state restricts changes in the state of the signal input to the predetermined receiving means, information normally transmitted from the predetermined control means can be prevented from being stored in the received information storage means until the predetermined restricted state is released, in a configuration in which information is transmitted from the predetermined control means each time a predetermined transmission trigger occurs. This prevents information normally transmitted from the predetermined control means from being stored in the received information storage means in a configuration having the configuration of feature b8 above, in which predetermined abnormality response processing is executed based on the data volume of information stored in the received information storage means being equal to or greater than a specific reference data volume after specific initialization of the specific control means is released but before the predetermined restricted state is released.

Feature b12. A gaming machine described in any one of Features b1 to b11, wherein the information received by the specific control means via the predetermined receiving means includes synchronization data.

According to feature b12, by adopting a communication mode in which information including synchronization data is received, it is possible to eliminate the need for a signal line for a synchronization clock signal. Furthermore, in this communication mode in which information including synchronization data is received, by incorporating the configuration of feature b1 above and adopting a configuration in which a predetermined restriction state is entered under a predetermined condition, it is possible to reduce the possibility of information being stored in the received information storage means under that predetermined condition.

In addition, the configurations of features b1 to b12 may be configured with any one or more of features A1 to A10, features B1 to B8, features C1 to C6, features D1 to D7, features E1 to E8, features F1 to F8, features G1 to G7, features H1 to H6, features I1 to I14, features J1 to J9, features K1 to K14, features L1 to L11, features M1 to M14, features N1 to N6, features O1 to O10, features P1 to P13, features Q1 to Q11, features R1 to R13, features S1 to S14, features T1 to T11, features U1 to U9, features V1 to V5, features W1 to W7, features X1 to X10, features Y1 to Y13, features Z1 to Z16, features a1 to a11, features b1 to b12, and features c1 to c9. This allows for a synergistic effect to be achieved through the combined configuration.

The invention relating to the above feature group B can solve the following problems:

Pachinko machines and slot machines are known types of gaming machines. These gaming machines are known to be configured so that an internal lottery is held when certain lottery conditions are met, and a bonus is awarded to the player depending on the results of the internal lottery.

Specific examples of pachinko machines include those that transition to a special game state when an internal lottery is won based on a game ball entering a ball entry section in the game area, and those that transition to a special game state when a game ball enters a specified ball entry section. When a transition to a special game state occurs, for example, a ball entry device in the game area begins to open and close, and game balls are paid out based on the ball entering the ball entry device.

In gaming machines such as those exemplified above, it is necessary to ensure that information is received properly, and there is still room for improvement in this regard.

<Feature group c>
Feature c1. In a gaming machine equipped with a predetermined control means (main MPU 222 in the 20th embodiment) that executes various processes,
The predetermined control means
a first predetermined reset means (a reset control circuit 254b, a first reset execution signal control circuit 254c, a second reset execution signal control circuit 254d, an internal register initialization circuit 251a, an external register initialization circuit 355, and a supply switching circuit 253a) that performs a first predetermined reset (a total reset of the main MPU 222) to set the predetermined control means to a first predetermined reset state (a state in which a total reset of the main MPU 222 has been performed) based on the occurrence of a first predetermined reset trigger (at least one of the first reset signal and the second reset signal input to the reset circuit 254 becoming a LOW level state);
second predetermined reset means (a reset control circuit 254b, a second reset execution signal control circuit 254d, and an internal register initialization circuit 251a) for performing a second predetermined reset (a partial reset of the main MPU 222) that sets the predetermined control means to a second predetermined reset state (a state in which a partial reset of the main MPU 222 has been performed) based on the occurrence of a second predetermined reset trigger (the occurrence of driving outside a designated area in the main MPU 222, or the occurrence of a timeout of a watchdog timer in the main MPU 222);
A predetermined post-reset processing execution means (a function of executing the processes of steps SB302 to SB307 and step SB309 of the main MPU 222 in the twentieth embodiment) that executes predetermined post-reset processing (the processes of steps SB302 to SB307 and step SB309 of the main MPU 222);
A predetermined control processing execution means (a function for executing the processing of steps S8701 to S8713 of the main MPU 222 in the 18th embodiment) for executing predetermined control processing (the processing of steps S8701 to S8713 of the main MPU 222);
Equipped with
The first predetermined reset state and the second predetermined reset state are states that are set so that the predetermined control processing is executed after the state is released (in the 20th embodiment, the program counter 269 of the main CPU 251 is set to “0000H” and the main processing is started by executing the processing of step SB308 of the main reset release processing),
When the first predetermined reset state is released, the predetermined post-reset process is executed, and then the predetermined control process is started.
A gaming machine characterized in that, when the second predetermined reset state is released, the predetermined control processing is started without executing the predetermined post-reset processing.

According to feature c1, when the predetermined control means enters the first predetermined reset state upon the occurrence of a first predetermined reset trigger, a predetermined post-reset process is executed before the predetermined control process is initiated after the first predetermined reset state is released. In this configuration, when the predetermined control means enters the second predetermined reset state upon the occurrence of a second predetermined reset trigger, the predetermined control process is initiated after the second predetermined reset state is released without the predetermined post-reset process being executed. This allows the predetermined control process to be initiated quickly after the second predetermined reset trigger occurs. This allows the process in the predetermined control means to be executed optimally.

Feature c2: A predetermined storage means (main RAM 224) including predetermined storage areas (a work area 281 for specific control, a stack area 282 for specific control) is provided,
The gaming machine described in feature c1 is characterized in that the predetermined control processing execution means is equipped with a means (a function of executing the processing of steps S8709 to S8710 in the main MPU 222) for executing a predetermined initialization processing (processing of steps S8709 to S8710 in the main MPU 222) that initializes the predetermined memory area based on the occurrence of a predetermined initialization trigger (a negative judgment in step S8703 or step S8704, or a positive judgment in step S8705 or step S8706) in the predetermined control processing.

According to feature c2, when the predetermined control means enters the first predetermined reset state upon the occurrence of a first predetermined reset trigger, after the first predetermined reset state is released, predetermined post-reset processing can be executed before the predetermined memory area is initialized upon the occurrence of a predetermined initialization trigger.

Feature c3. A gaming machine according to Feature c1 or c2, characterized in that the predetermined post-reset processing execution means includes means for executing predetermined abnormality response processing (processing of step SB309 in the main MPU 222) based on the occurrence of a predetermined abnormal state (circuit abnormality in the main MPU 222, a state in which data exceeding the abnormality reference amount is stored in the main receive buffer 383) identified during the predetermined post-reset processing (a function for executing the processing of step SB309 in the main MPU 222 in the 20th embodiment).

Feature c3 prevents the specified control process from starting without executing the specified abnormality response process corresponding to the specified abnormality state, even though the specified abnormality state has occurred, when the specified post-reset process is executed. Furthermore, if the specified post-reset process is not executed, the process for identifying the occurrence of the specified abnormality state is not executed, allowing the specified control process to be started quickly.

Feature c4: A predetermined reception information storage means (main reception buffer 383) is provided in which predetermined reception information (data received by the main MPU 222 from the dispensing MPU 261) is stored,
A gaming machine described in feature c3, characterized in that the specified abnormal state is a state in which the data capacity of the data stored in the specified reception information storage means is equal to or greater than a specified abnormal standard amount (20 bytes in the 20th embodiment) (a state in which data equal to or greater than the abnormal standard amount is stored in the main reception buffer 383).

Feature c4 prevents the start of a predetermined control process when the predetermined post-reset process is executed, even if the data volume of data stored in the predetermined received information storage means is equal to or greater than the predetermined abnormality standard amount, without executing the predetermined abnormality response process corresponding to that state. This prevents abnormal information from being stored in the predetermined received information storage means and the execution of a process corresponding to that abnormal information.

Feature c5. A gaming machine as described in Feature c3 or c4, characterized in that when the predetermined abnormality response process is executed, the machine enters a state in which the predetermined control process is not executed (the state after execution stop processing is executed in the main MPU 222).

Feature c5 prevents the execution of a predetermined control process when a predetermined abnormal state occurs when the predetermined post-reset process is executed. This prevents play from being played in a predetermined abnormal state.

Feature c6: The predetermined control means includes predetermined registers (a first register group 265, a second register group 266, an I register 267, an R register 268, and a program counter 269) and specific registers (a setting register group 256 and a monitoring and control register group 257),
the first predetermined reset state is a state in which the predetermined register and the specific register are initialized,
A gaming machine described in any one of features c1 to c5, characterized in that the second predetermined reset state is a state in which the predetermined register is initialized and the specific register is not initialized.

Feature c6 allows the range of registers to be initialized to vary depending on the type of initialization trigger that occurs, either the first predetermined reset trigger or the second predetermined reset trigger, so that registers can be initialized to the required range depending on the type of initialization trigger that occurs.

Feature c7. A gaming machine described in any one of Features c1 to c6, wherein the first predetermined reset trigger occurs when the state of the predetermined reset signal (first reset signal) input to the first predetermined reset means becomes a specific state (HI level), or when the state of the predetermined reset signal input to the first predetermined reset means is the specific state.

According to feature c7, a predetermined post-reset process can be executed before the start of the predetermined control process based on the state of the predetermined reset signal input to the first predetermined reset means.

Feature c8. The first predetermined reset means receives the predetermined reset signal and a specific initialization signal (second reset signal),
A gaming machine as described in feature c7, characterized in that the first predetermined reset of the predetermined control means is performed based on the specific initialization signal input to the first predetermined reset means reaching a predetermined state (LOW level) or the specific initialization signal input to the first predetermined reset means being in the predetermined state.

According to feature c8, in a configuration having the configuration of feature c7 above, in which a predetermined post-reset process is executed based on the state of the predetermined reset signal input to the first predetermined reset means becoming or being in a specific state, the first predetermined reset of the predetermined control means can be performed based on the state of the specific initialization signal input to the first predetermined reset means.

Feature c9. A gaming machine as described in Feature c7 or c8, wherein the second predetermined reset trigger occurs without changing the state of the predetermined reset signal input to the first predetermined reset means.

According to feature c9, in a configuration having the configuration of feature c7 above, in which a predetermined post-reset process is executed based on the state of the predetermined reset signal input to the first predetermined reset means becoming a specific state or being in a specific state, if the state of the predetermined reset signal input to the first predetermined reset means does not change, the predetermined post-reset process can be executed before the execution of the predetermined control process.

In addition, the configurations of features c1 to c9 may be configured with any one or more of features A1 to A10, features B1 to B8, features C1 to C6, features D1 to D7, features E1 to E8, features F1 to F8, features G1 to G7, features H1 to H6, features I1 to I14, features J1 to J9, features K1 to K14, features L1 to L11, features M1 to M14, features N1 to N6, features O1 to O10, features P1 to P13, features Q1 to Q11, features R1 to R13, features S1 to S14, features T1 to T11, features U1 to U9, features V1 to V5, features W1 to W7, features X1 to X10, features Y1 to Y13, features Z1 to Z16, features a1 to a11, features b1 to b12, and features c1 to c9. This allows for a synergistic effect to be achieved through the combined configuration.

The invention relating to the above feature group c can solve the following problems:

Pachinko machines and slot machines are known types of gaming machines. These gaming machines are known to be configured so that an internal lottery is held when certain lottery conditions are met, and a bonus is awarded to the player depending on the results of the internal lottery.

Specific examples of pachinko machines include those that transition to a special game state when an internal lottery is won based on a game ball entering a ball entry section in the game area, and those that transition to a special game state when a game ball enters a specified ball entry section. When a transition to a special game state occurs, for example, a ball entry device in the game area begins to open and close, and game balls are paid out based on the ball entering the ball entry device.

Here, in gaming machines such as those exemplified above, processing needs to be executed appropriately, and there is still room for improvement in this regard.

Below is the basic configuration of a gaming machine to which the above features can be applied.

Pachinko gaming machine: A gaming machine that has an operating means operated by the player, a gaming ball launching means that launches gaming balls based on the operation of the operating means, a ball passage that guides the launched gaming balls to a specified gaming area, and various gaming components arranged within the gaming area, and that awards a bonus to the player when the gaming ball passes through a specified passage section of each of the gaming components.

Slot machines and other reel-type gaming machines: A gaming machine that starts the rotation of a rotating body based on the operation of a start operation means, stops the rotation of the rotating body based on the operation of a stop operation means, and awards a bonus to the player based on the image that appears after the rotation has stopped.

10...slot machine, 31...reel unit, 32L...left reel, 32M...middle reel, 32R...right reel, 42-44...stop button, 56...reset button, 57...setting key insertion hole, 63...image display device, 66...multipurpose display unit, 72...main MPU, 73...main ROM, 74a...index value counter, 74d...AT continuation counter, 74h-74m...achievement flag, 92...performance MPU, 94...performance RAM, 94a...display target remaining number counter, 94b...non-display target remaining number counter, 9 4c...AT acquisition number counter, 94p...display game number counter, 96...work area for processing within the area, 96d...total acquisition number counter, 96e...AT difference number counter, 96f...standby counter, 96g...release game number counter, 96i...flag area, 96k...area for end status, 96m...current external signal area, 96n...reserved external signal area, 96p...first interval setting counter, 96q...second interval setting counter, 96r...current error information counter, 96s...error information counter, 96t...third 3 interval setting counter, 96u...signal output avoidance flag, 97...stack area for in-area processing, 98...work area for out-area processing, 98b...end determination counter, 98c...end flag, 130...card unit, 142...value number side MPU, 218...power supply/launch control device, 221...main control board, 222...main side MPU, 223...main side ROM, 224...main side RAM, 225...power outage monitoring board, 225a...first voltage monitoring circuit, 225b...second voltage monitoring circuit, 225c...power outage signal control circuit, 225d ...First reset signal control circuit, 225e...power failure signal delay circuit, 251...main CPU, 251a...internal register initialization circuit, 253...main power supply control unit, 253a...supply switching circuit, 254...reset circuit, 254a...reset execution signal control circuit, 254b...reset control circuit, 254c...first reset execution signal control circuit, 254d...second reset execution signal control circuit, 255...connection terminal board, 256...setting register group, 257...monitoring control register group, 258...interrupt control circuit, 261...dispatch side MPU, 265...first register group, 266...second register group, 267...I register, 268...R register, 269...program counter, 271...AF register, 271a...A register, 271b...F register, 272...BC register, 273...DE register, 274...HL register, 278...V register, 281...work area for specific control, 282...stack area for specific control, 284...stack area for non-specific control, 291...AF' register, 292...BC' register, 293...DE' register, 294...HL' register, 301...AF register, 301a...A register, 302...BC register, 303...DE register, 304...HL register, 308...V register, 311...AF' register, 312...BC' register, 313...DE' register, 314...HL' register, 354...voltage monitoring circuit, 355...external register initialization circuit, 356...noise filter, 361...first receiving terminal, 362...second receiving terminal, 363...payment side receiving buffer, 368...reset G31...image before ending is achieved, G33...image before end, G41...image reaching standard, G80...image of character for effect, G81...end Previous emphasis image, G82... demo image, G88... color navigation image, IV... index value, PV... point value, SC1... first section, SC2... second section, ST1... normal game state, ST4... base AT state, ST5... ending AT state, ST11... normal game state, ST12... bonus internal state, ST14... AT state, TB1... non-internal utility lottery table, TB2... internal utility lottery table, TB3... non-internal utility lottery table, TB4... internal utility lottery table, TB5... non-bonus utility lottery table.

Claims (1)

A predetermined display means;
a predetermined display control means for causing a predetermined display to be performed on the predetermined display means;
a predetermined display control means for controlling the predetermined display means to display a pre-notification display for notifying that a predetermined state is approaching in a pre-stage state that is a stage preceding the predetermined state;
a specific display control means for controlling the specific display means to display a specific display in place of the specific display or in a more noticeable manner than the specific display, based on the occurrence of a specific start trigger in a situation where the specific display is being displayed;
a specific display termination control means for terminating the specific display when a predetermined termination trigger occurs;
a predetermined advance notification control means for executing a predetermined advance notification regarding the approach of the predetermined state in addition to the advance notification display based on the occurrence of a predetermined trigger;
Equipped with
The specific display is started while the advance warning display is being continued based on the occurrence of the predetermined start trigger while the advance warning display is being performed ,
A gaming machine characterized in that the predetermined trigger occurs when the predetermined termination trigger occurs while the advance notification display is being displayed .