JP7788965B2 - Semiconductor Module - Google Patents

Description

An embodiment of the present invention relates to a semiconductor module.

For example, to build a MW-class power converter with a breakdown voltage of several kV, it is necessary to increase the current capacity of the semiconductor elements. To achieve this, semiconductor modules with multiple semiconductor elements mounted in parallel have been proposed. To tolerate high voltages and currents, it is necessary to ensure the continued operation and safety of the semiconductor module in the event of a semiconductor element failure. From this perspective, it is necessary to maintain electrical continuity in the event of a large-energy breakdown.

Patent No. 6860453

The problem that this invention aims to solve is to provide a semiconductor module that can maintain electrical continuity even during high-energy breakdown.

The semiconductor module of the embodiment has a first metal member, a second metal member, a first semiconductor package, and a second semiconductor package. The first metal member and the second metal member are arranged facing each other. The first semiconductor package and the second semiconductor package are arranged between the first metal member and the second metal member. Each of the first semiconductor package and the second semiconductor package includes a first conductive member, a second conductive member, and a semiconductor element. The first conductive member is connected to the first metal member. The second conductive member is connected to the second metal member. The semiconductor element is arranged between the first conductive member and the second conductive member. The semiconductor element is connected to the first conductive member and the second conductive member. At least one of the first conductive member and the second conductive member has a bent shape. At least one of the first conductive member and the second conductive member generates a repulsive electromagnetic force when current is passed from one of the first metal member and the second metal member to the other. The repulsive electromagnetic force is a force that pushes at least one of the first metal member and the second metal member toward the opposite side from the semiconductor element.

FIG. 2 is a side cross-sectional view of the semiconductor module according to the first embodiment. FIG. 1 is a side cross-sectional view of a semiconductor package according to a first embodiment. 5A and 5B are explanatory diagrams of repulsive electromagnetic forces of the semiconductor module according to the first embodiment; 10A and 10B are diagrams showing the relationship between current and voltage when a semiconductor element in a semiconductor module fails; FIG. 10 is a graph showing the relationship between the chip stress increase factor and the probability of short circuit failure. FIG. 10 is a graph showing the relationship between the thickness of the upper electrode and the chip stress increase factor. FIG. 10 is a graph showing the relationship between the thickness of the top plate and the chip stress increase ratio. FIG. 10 is a side cross-sectional view of a semiconductor module according to a second embodiment. 10A and 10B are explanatory diagrams illustrating arc generation in the semiconductor module according to the second embodiment. FIG. 10 is a side cross-sectional view of a semiconductor module according to a third embodiment. FIG. 10 is a side cross-sectional view showing a modified example of the conductive member. FIG. 10 is a perspective view showing a modified example of the conductive member. FIG. 10 is a diagram showing calculation results of an assumed current and a temperature of a conductive member. FIG. 10 is a top view of a semiconductor module according to a fourth embodiment. FIG. 10 is a side cross-sectional view of a semiconductor module according to a fourth embodiment. FIG. 13 is a side cross-sectional view of a semiconductor module according to a fifth embodiment. FIG. 10 is a cross-sectional side view of a semiconductor module according to a first modified example. FIG. 10 is a cross-sectional side view of a semiconductor module according to a second modified example. FIG. 10 is a cross-sectional side view of a semiconductor module according to a third modified example. FIG. 10 is a side cross-sectional view of a semiconductor module according to a fourth modified example. FIG. 13 is a side cross-sectional view of a semiconductor module according to a fifth modified example.

The semiconductor module of the embodiment will be described below with reference to the drawings.

Fig. 1 is a side cross-sectional view of a semiconductor module 1 according to the first embodiment. Fig. 2 is a side cross-sectional view of a semiconductor package P according to the first embodiment.
The semiconductor module 1 of the embodiment comprises a bottom plate 2 (an example of a first metal member), a top plate 3 (an example of a second metal member), an insulating case 4, a first semiconductor package PA, and a second semiconductor package PB.

The bottom plate 2 and the top plate 3 are arranged opposite each other. For example, the bottom plate 2 and the top plate 3 are made of a material with excellent electrical and thermal conductivity. For example, the bottom plate 2 and the top plate 3 contain copper or aluminum as a main component. For example, the bottom plate 2 and the top plate 3 are made of a metal such as copper, a copper alloy, aluminum, or an aluminum alloy.

The bottom plate 2 and top plate 3 are formed into plates that extend along a horizontal plane. The top plate 3 is positioned above the bottom plate 2. The top plate 3 has a uniform thickness (length in the vertical direction) along the horizontal plane. For example, the thickness of the top plate 3 is 2 mm or more and 12 mm or less. For example, it is more preferable that the thickness of the top plate 3 is 4 mm or more and 10 mm or less.

The bottom plate 2 is connected to the top plate 3 via the insulating case 4. For example, the insulating case 4 is connected to the bottom plate 2 and top plate 3 with an adhesive or fastening member. For example, the insulating case 4 is formed from an electrically insulating material such as resin. The upper end of the insulating case 4 is connected to the underside of the top plate 3. The lower end of the insulating case 4 is connected to the upper surface of the bottom plate 2. As a result, the space surrounded by the bottom plate 2, top plate 3, and insulating case 4 is an airtight space.

The bottom plate 2 has a lower connection terminal 5 (an example of a first connection terminal) that protrudes laterally beyond the insulating case 4. The top plate 3 has an upper connection terminal 6 (an example of a second connection terminal) that protrudes laterally beyond the insulating case 4. In this embodiment, electricity is conducted from the lower connection terminal 5 to the upper connection terminal 6.

The first semiconductor package PA and the second semiconductor package PB are arranged between the bottom plate 2 and the top plate 3. The semiconductor module 1 also includes multiple semiconductor packages P in addition to the first semiconductor package PA and the second semiconductor package PB. These multiple semiconductor packages P are mounted in parallel within the semiconductor module 1.

Each of the first semiconductor package PA and the second semiconductor package PB includes a lower electrode 10 (an example of a first conductive member), an upper electrode 20 (an example of a second conductive member), a semiconductor element 30, a metal case 40, and a sealing member 50 (an example of a first insulating member). Hereinafter, except when distinguishing between the first semiconductor package PA and the second semiconductor package PB, the multiple semiconductor packages P including the first semiconductor package PA and the second semiconductor package PB may be simply referred to as the "semiconductor package P."

For example, the lower electrode 10 and the upper electrode 20 are formed of a metal material with low electrical resistance, such as copper. The lower electrode 10 is connected to the bottom plate 2. The upper electrode 20 is connected to the top plate 3. The semiconductor element 30 is disposed between the lower electrode 10 and the upper electrode 20. The semiconductor element 30 is connected to the lower electrode 10 and the upper electrode 20. For example, the semiconductor element 30 is a power semiconductor element used for power conversion. For example, the semiconductor element 30 is a switching element having a control electrode, such as an IGBT (Insulated Gate Bipolar Transistor) or a MOSFET (Metal-Oxide-Semiconductor Field-Effect Transistor). For example, the semiconductor element 30 may be a diode, such as an FRD (Fast Recovery Diode).

A semiconductor package P includes one or more semiconductor elements 30. For example, if multiple semiconductor elements 30 are mounted on one semiconductor package P, the multiple semiconductor elements 30 do not all need to be identical. For example, a single semiconductor package P may contain a mixture of switching elements such as IGBTs and diodes such as FRDs.

For example, a collector electrode, a drain electrode, and an anode electrode are formed on one surface (bottom surface) of the semiconductor element 30. These electrodes are connected to the lower electrode 10 by a bonding material 31. For example, the bonding material 31 is solder, a conductive adhesive, silver paste, etc.

For example, an emitter electrode, a source electrode, and a cathode electrode are formed on the other surface (top surface) of the semiconductor element 30. These electrodes are connected to the spacer 15 by a bonding material 32. For example, the spacer 15 is made of a metal such as copper, a copper alloy, aluminum, or an aluminum alloy. The spacer 15 is connected to the upper electrode 20 by a bonding material 33. For example, the bonding material 33 is solder, a conductive adhesive, silver paste, etc.

The semiconductor element 30 is housed in a metal case 40. For example, the metal case 40 is made of a metal such as stainless steel, aluminum, or iron. For example, the metal case 40 is shaped like a rectangular box having a storage space for the semiconductor element 30, etc.

The metal case 40 has a bottom opening 41 and a side opening 42 .
The lower opening 41 exposes the lower surface of the lower electrode 10 (an example of the surface opposite to the surface connected to the semiconductor element 30). The lower opening 41 is formed in the lower surface of the metal case 40.
The side opening 42 opens to the side of the semiconductor element 30 so as to intersect with the lower opening 41. The side opening 42 is formed on one side surface of the metal case 40. The side opening 42 is positioned approximately perpendicular to the lower opening 41.

The lower electrode 10 is connected to the bottom plate 2 through the lower opening 41. The lower electrode 10 is connected to the upper surface of the bottom plate 2 by a bonding material 34. For example, the bonding material 34 is solder, a conductive adhesive, silver paste, etc.

The upper electrode 20 is connected to the top plate 3 through the side opening 42. The upper electrode 20 has a bent shape. In this embodiment, the upper electrode 20 has a crank shape. The upper electrode 20 is formed by bending a plate-shaped member into a crank shape. The upper electrode 20 extends laterally from the semiconductor element 30, then bends and extends upward, and then bends again and extends laterally. The upper electrode 20 includes a first extension portion 21, a second extension portion 22, and a third extension portion 23. The first extension portion 21, the second extension portion 22, and the third extension portion 23 are integrally formed from the same metal member.

The first extending portion 21 extends along the upper surface of the semiconductor element 30 (an example of the surface connected to the semiconductor element 30). The first extending portion 21 protrudes from the side opening 42 to the outside of the metal case 40.
The second extending portion 22 extends upward from the protruding end of the first extending portion 21 toward the top plate 3 .
The third extending portion 23 extends along the horizontal plane from the upper end of the second extending portion 22. The third extending portion 23 extends laterally from the upper end of the second extending portion 22 toward the third extending portion 23 of the adjacent semiconductor package.

The metal case 40 is covered with a sealing member 50 to electrically insulate it from the semiconductor element 30. For example, the sealing member 50 is formed of an electrically insulating material such as resin. The sealing member 50 covers the metal case 40 except for the portion where the lower electrode 10 extends from the lower opening 41 and the portion where the upper electrode 20 extends from the side opening 42. The lower portion of the lower electrode 10 (the portion connected to the bottom plate 2) is exposed and not covered by the sealing member 50. The portion of the upper electrode 20 above the protruding end of the first extension portion 21 (the second extension portion 22 and third extension portion 23) is exposed and not covered by the sealing member 50.

The upper electrode 20 has a uniform thickness along the direction in which the upper electrode 20 extends. The first extension portion 21 and the third extension portion 23 of the upper electrode 20 have a uniform thickness (length in the vertical direction) along the horizontal plane. The second extension portion 22 has a uniform thickness (length in the horizontal direction on the paper) along the vertical plane. For example, the thickness of the upper electrode 20 is 3 mm or more and 10 mm or less.

The upper end of the upper electrode 20 is located lower than the upper end of the insulating case 4. In this embodiment, the upper end of the upper electrode 20 corresponds to the upper surface of the third extension portion 23. The upper end of the insulating case 4 is the end of the insulating case 4 that is connected to the lower surface of the top plate 3. The upper surface of the third extension portion 23 is a flat surface that lies along a horizontal plane. The upper electrode 20 is connected to the top plate 3 via fastening members 60 and 61.

In this embodiment, a nut 60 (an example of a fastening member) is integrated with the upper electrode 20. The nut 60 is connected to the underside of the third extension portion 23. The top plate 3 and the third extension portion 23 each have a through-hole (bolt-through hole) through which a bolt 61 (an example of a fastening member) can be inserted. For example, the bolts 61 are inserted into each through-hole from above the top plate 3 and screwed into the nuts 60. This allows the upper electrode 20 to be connected to the top plate 3 via a fastening member such as the bolts 61. The upper electrode 20 is placed in a state where a load is applied by the bolts 61 toward the top plate 3 (upward). This load generates initial stress in the semiconductor element 30.

The semiconductor package P is electrically connected to the bottom plate 2 and top plate 3 via the lower electrode 10 and upper electrode 20. Multiple semiconductor packages P are electrically connected in parallel between the bottom plate 2 and top plate 3 via the lower electrode 10 and upper electrode 20. In this embodiment, electricity is applied from the lower connection terminal 5. The current flows vertically through the semiconductor package P.

During normal operation (normal operation), current is divided into the lower electrodes 10 of each semiconductor package P. In the example shown in the figure, during normal operation, current is divided into the first semiconductor package PA and the second semiconductor package PB. The current then flows along the top plate 3 toward the upper connection terminals 6.

For example, heat generated by the semiconductor element 30 during normal operation is conducted to the bottom plate 2 and top plate 3 on both sides of the semiconductor module 1. This allows the semiconductor element 30 to be cooled. For example, compared to a configuration in which only one side of the semiconductor package P is connected to a metal member, cooling performance can be improved. For example, the bottom plate 2 may also function as a cooler.

Fig. 3 is an explanatory diagram of the repulsive electromagnetic force MF of the semiconductor module 1 of the first embodiment. Fig. 4 is a diagram showing the relationship between current and voltage when a semiconductor element 30 in the semiconductor module 1 fails.
For example, if one or more semiconductor elements 30 in the semiconductor module 1 fail, a short circuit occurs between the collector and emitter electrodes of the semiconductor element 30. As a result, a large current of several hundred kA peaks, as shown in FIG. 4 , flows through the failed semiconductor element 30 (hereinafter also referred to as the "failed chip") as a path. In this embodiment, the upper electrode 20 is bent at a substantially right angle, generating a repulsive electromagnetic force MF when current is applied. The repulsive electromagnetic force MF is a force that pushes the top plate 3 toward the side opposite the semiconductor element 30. In this embodiment, the direction of current flowing through the first extension portion 21 of the upper electrode 20 is VA (horizontal) and the direction of current flowing through the second extension portion 22 is VB (vertical). Therefore, a repulsive electromagnetic force MF (Lorentz force) that pushes the upper electrode 20 toward the top plate 3 is generated.

When a large current flows, the faulty chip generates Joule heat. This can cause the constituent materials of the faulty chip (e.g., silicon, a semiconductor material) to melt and vaporize. This causes the pressure inside the semiconductor package to rise by several hundred MPa. The increased pressure inside the semiconductor package pushes the upper electrode 20 toward the top plate 3. The top plate 3 deforms upward by several millimeters due to the repulsive electromagnetic force MF and the upward pressure pushing up the upper electrode 20. The deformation of the top plate 3 pulls the upper electrodes 20 of other semiconductor packages connected in parallel to the faulty semiconductor package toward the top plate 3. As the upper electrodes 20 are pulled up, additional stress is generated in the semiconductor elements 30 connected by solder or the like. The initial stress and additional stress cause cracks in the semiconductor elements 30. This causes a short circuit between the collector and emitter electrodes of the semiconductor element 30 (short-circuit failure) due to the application of a voltage of several hundred volts that occurs after the peak current, as shown in Figure 4. Hereinafter, a short circuit failure in a semiconductor element 30 other than the semiconductor element 30 that has initially failed due to the occurrence of additional stress will be referred to as a "concomitant short circuit failure."

FIG. 5 is a diagram showing the relationship between the chip stress increase factor and the probability of short circuit failure.
The chip stress increase factor is the stress increase factor when the stress at which a crack occurs in the semiconductor element 30 is set to 1. If the stress occurring in the semiconductor element 30 is smaller than a reference value, no crack will occur. The greater the stress occurring in the semiconductor element 30 exceeds the reference value, the more likely it is that a crack will occur. For example, by utilizing the characteristics shown in FIG. 5, the semiconductor elements 30 arranged in parallel within the semiconductor module 1 are caused to suffer a concomitant short-circuit failure. For example, the design is such that the initial stress does not exceed the reference value 1, and the sum of the initial stress and the additional stress exceeds the reference value 1. This prevents short-circuit failures under normal circumstances, but allows concomitant short-circuit failures to occur in the event of a failure.

FIG. 6 is a diagram showing the relationship between the thickness of the upper electrode 20 and the chip stress increase factor.
The thicker the upper electrode 20, the easier it is to transmit the load to the semiconductor element 30, and therefore the larger the chip stress increase factor. On the other hand, the thicker the upper electrode 20, the more rigid it becomes, making it harder for the top plate 3 to deform, and therefore the larger the chip stress increase factor becomes. Therefore, it is desirable that the thickness of the upper electrode 20 is not too thick. For example, by making the thickness of the upper electrode 20 3 mm or more, the chip stress increase factor becomes 1 or more. This makes it possible to generate stress above the reference value required for concomitant short circuit failure.

FIG. 7 is a diagram showing the relationship between the thickness of the top plate and the chip stress increase factor.
The chip stress increase factor has the characteristic of reaching a maximum value when the top plate thickness is a certain thickness. The reason for this is that if the top plate thickness is too thin, only the top plate 3 directly above the semiconductor element 30 that has experienced an initial failure can deform, while if the top plate thickness is too thick, the top plate 3 itself becomes difficult to deform. For example, the top plate thickness is set to 2 mm or more and 12 mm or less. This makes it easier for cracks to occur in the semiconductor element 30.

As described above, the semiconductor module 1 of this embodiment includes a bottom plate 2, a top plate 3, a first semiconductor package PA, and a second semiconductor package PB. The bottom plate 2 and the top plate 3 are disposed opposite each other. The first semiconductor package PA and the second semiconductor package PB are disposed between the bottom plate 2 and the top plate 3. Each of the first semiconductor package PA and the second semiconductor package PB includes a lower electrode 10, an upper electrode 20, and a semiconductor element 30. The lower electrode 10 is connected to the bottom plate 2. The upper electrode 20 is connected to the top plate 3. The semiconductor element 30 is disposed between the lower electrode 10 and the upper electrode 20. The semiconductor element 30 is connected to the lower electrode 10 and the upper electrode 20. The upper electrode 20 has a curved shape. The upper electrode 20 generates a repulsive electromagnetic force MF when current is applied from the bottom plate 2 to the top plate 3. The repulsive electromagnetic force MF pushes the upper electrode 20 in the direction opposite the semiconductor element 30. The above configuration provides the following effects.
When the semiconductor element 30 in the first semiconductor module 1 fails, a short circuit occurs between the collector and emitter electrodes of the semiconductor element 30. This causes a large current, peaking at several hundred kA, to flow through the failed semiconductor element 30 (failed chip). In this embodiment, the upper electrode 20 has a curved shape, which generates a repulsive electromagnetic force MF when current is applied, pushing up the top plate 3. The top plate 3 is deformed upward by the upward pushing of the upper electrode 20. The deformation of the top plate 3 pulls up the upper electrode 20 of the second semiconductor package PB, which is connected in parallel with the failed first semiconductor package PA, toward the top plate 3. Pulling up the upper electrode 20 of the second semiconductor package PB generates additional stress on the semiconductor element 30 in the second semiconductor package PB. The initial stress and the additional stress cause cracks to form in the semiconductor element 30 in the second semiconductor package PB. This makes it possible to short-circuit the second semiconductor packages PB other than the initially failed first semiconductor package PA by mechanical destruction.
In addition, even if the first semiconductor package PA and the second semiconductor package PB are broken, electrical continuity can be maintained in the other semiconductor packages P. Therefore, it is possible to provide a semiconductor module 1 that can maintain electrical continuity even in the event of a large-energy breakdown.

For example, a semiconductor package alone has a limit to the amount of energy that can maintain electrical continuity in the event of a short-circuit failure. In contrast, in this embodiment, by mechanically destroying the second semiconductor package PB arranged in parallel within the semiconductor module 1, a short-circuit failure occurs, making it possible to increase the amount of energy that can maintain electrical continuity for the semiconductor module 1 to more than twice that of a single semiconductor package.

For example, one structure for withstanding large amounts of energy is to place a resistive terminal with high electrical resistance in the current path of a semiconductor element. This structure dissipates energy at the resistive terminal when a large current is passing through it. However, the placement of the resistive terminal results in an increase in the size of the semiconductor module. In contrast, this embodiment is designed to actively destroy semiconductor elements 30 (healthy chips) other than the semiconductor element 30 (faulty chip) in which a short circuit has occurred, thereby maintaining electrical continuity as a semiconductor module 1. For this reason, resistive terminals are not necessary in this embodiment. Removing the resistive terminals enables smaller size and lower costs. Therefore, the allowable energy required to maintain electrical continuity in the event of a fault can be more than doubled without increasing the size of the semiconductor module 1.

In this embodiment, the top plate 3 is disposed above the bottom plate 2. The semiconductor element 30 is housed in a metal case 40. The metal case 40 has a lower opening 41 that exposes the lower surface of the lower electrode 10, and a side opening 42 that opens to the side of the semiconductor element 30 and intersects with the lower opening 41. The lower electrode 10 is connected to the bottom plate 2 through the lower opening 41. The upper electrode 20 is connected to the top plate 3 through the side opening 42. The above configuration provides the following effects.
The metal case 40 can protect the semiconductor element 30 from external factors. In addition, since the upper electrode 20 is connected to the top plate 3 through the side opening 42, a larger repulsive electromagnetic force MF can be generated when current is applied. This increases the upward force of the upper electrode 20, allowing the top plate 3 to deform upward to a greater extent. This increases the pulling force of the upper electrode 20 of the second semiconductor package PB connected in parallel with the first semiconductor package PA. This increases the additional stress generated in the semiconductor element 30 in the second semiconductor package PB. This is therefore suitable for short-circuiting, by mechanical destruction, the second semiconductor package PB other than the first semiconductor package PA that has experienced an initial failure.

The upper electrode 20 of this embodiment includes a first extension portion 21 and a second extension portion 22. The first extension portion 21 extends along the upper surface of the semiconductor element 30 and protrudes out of the metal case 40 through a side opening 42. The second extension portion 22 extends upward from the protruding end of the first extension portion 21 toward the top plate 3. The above-described configuration provides the following effects.
In the upper electrode 20, the first extension portion 21 and the second extension portion 22 are arranged at a substantially right angle, which is suitable for generating a repulsive electromagnetic force MF when current is applied.

The metal case 40 of this embodiment is covered with the sealing member 50 for electrical insulation from the semiconductor element 30, and thereby provides the following effects.
The metal case 40 and the sealing member 50 can protect the semiconductor element 30 from external factors. In addition, the sealing member 50 can electrically insulate the metal case 40 and the semiconductor element 30 from each other.

The bottom plate 2 is connected to the top plate 3 via the insulating case 4. The upper end of the upper electrode 20 is located lower than the upper end of the insulating case 4. The upper electrode 20 is connected to the top plate 3 via fastening members 60 and 61. The above-described configuration provides the following effects.
The upper electrode 20 is placed in a state where a load is applied in the direction of the top plate 3 by the fastening members 60 and 61. This load generates an initial stress in the semiconductor element 30. Therefore, with a simple configuration including the fastening members 60 and 61, the initial stress can be generated in the semiconductor element 30.
In addition, by raising the upper end of the insulating case 4, a preload can be applied to the upper electrode 20 during assembly to eliminate play.

In the semiconductor module 1 of this embodiment, the upper electrodes 20 of the first semiconductor package PA and the second semiconductor package PB are connected to the top plate 3 via fastening members 60, 61. The portions of the upper electrodes 20 connected to the top plate 3 via the fastening members 60, 61 are located adjacent to each other. The above configuration provides the following effects.
The repulsive electromagnetic force MF when current is applied can cause the portions (parts of the top plate 3) where the upper electrodes 20 are connected to the top plate 3 via the fastening members to be largely deformed into an arch shape, which is therefore suitable for short-circuiting the second semiconductor packages PB other than the first semiconductor package PA that has experienced an initial failure through mechanical destruction.

In this embodiment, the thickness of the upper electrode 20 is 3 mm or more, which provides the following effects.
Since the chip stress increase factor is 1 or more, it is possible to generate stress exceeding the reference value required for concomitant short circuit failure.

The thickness of the top plate 3 in this embodiment is 2 mm or more and 12 mm or less, which provides the following effects.
For example, if the thickness of the top plate 3 is less than 2 mm, it is too thin, and there is a high possibility that only the top plate 3 directly above the semiconductor element 30 that has experienced an initial failure can deform. For example, if the thickness of the top plate 3 exceeds 12 mm, it is too thick, and there is a high possibility that the top plate 3 itself will not deform easily. In contrast, in this embodiment, the thickness of the top plate 3 is 2 mm or more and 12 mm or less, which makes it easier for cracks to occur in the semiconductor element 30.

In this embodiment, the bottom plate 2 is connected to the top plate 3 via the insulating case 4. The bottom plate 2 has a lower connection terminal 5 that protrudes laterally beyond the insulating case 4. The top plate 3 has an upper connection terminal 6 that protrudes laterally beyond the insulating case 4. The above-described configuration provides the following effects.
This is preferable because it is easier to connect a power source or the like to the connection terminals 5 and 6 compared to when the lower connection terminal 5 and the upper connection terminal 6 are located inside the insulating case 4 .

The first embodiment described so far is an example in which the upper electrode 20 is connected to the top plate 3 via fastening members 60, 61. However, because the semiconductor package P has a structure in which the semiconductor elements 30 and electrodes 10, 20 are stacked, variations in the height position of the upper electrodes 20 occur. It is important to arrange multiple semiconductor packages P in parallel within the semiconductor module 1 and not deteriorate the contact electrical resistance between the upper electrodes 20 and the top plate 3. To do this, it is necessary to ensure contact pressure for all upper electrodes 20 that vary in height. In the following embodiment, an example will be described in which the elastic force of an elastic member is used to ensure contact pressure for all upper electrodes 20 that vary in height.

Next, a second embodiment will be described as an example of a semiconductor module. In the second embodiment, a description of the same configuration as in the first embodiment will be omitted. The second embodiment differs from the first embodiment in that it includes a spring structure 270 (an example of an elastic member).
FIG. 8 is a side cross-sectional view of a semiconductor module 201 according to the second embodiment.
The upper electrode 20 is connected to the top plate 3 via a spring structure 270 arranged alongside the fastening member 61 .

The spring structure 270 is a structure in which multiple disc springs 271 are stacked. Two adjacent disc springs 271 in the vertical direction do not make surface contact with each other, but make line or point contact at the ends of the disc springs 271. For example, the disc springs 271 are made of a conductive metal material. A bolt 61 is inserted through the center hole of the multiple disc springs 271. The spring structure 270 has an initial length that allows it to be compressed when the top plate 3 is fastened with the bolt 61.

The end of the spring structure 270 on the semiconductor element 30 side is positioned closer to the bolt 61 (an example of a fastening member) than the portion of the upper electrode 20 that protrudes toward the top plate 3. Here, the end of the spring structure 270 on the semiconductor element 30 side is the end of the lowest of the multiple disc springs 271 that is closest to the semiconductor element 30. The portion of the upper electrode 20 that protrudes toward the top plate 3 is the end of the third extension 23 that is closest to the semiconductor element 30.

FIG. 9 is an explanatory diagram of arc generation in the semiconductor module 201 of the second embodiment.
In this embodiment, the spring structure 270 is offset toward the bolt 61. The offset S in the drawing is the horizontal distance between the end of the lowest disc spring 271 closest to the semiconductor element 30 and the end of the third extension portion 23 closest to the semiconductor element 30.

For example, when an upward load (force in the direction of the upward arrow) is applied due to a pressure increase during a short-circuit fault, a load that stretches the bolt 61 acts on it using the principle of leverage. In other words, a downward load (force in the direction of the downward arrow) acts on the bolt 61 via the fulcrum FP. If the bolt 61 breaks when a large current is flowing due to a short-circuit fault, the top plate 3 and upper electrode 20 will no longer be in contact. This will cause an arc to occur between the top plate 3 and the upper electrode 20. The pressure from the arc will push the top plate 3 upward. This will pull up the upper electrode 20 of the semiconductor package P that is arranged in parallel. This will make it more likely that other semiconductor packages P will also suffer a short-circuit fault.

As described above, in the second embodiment, the upper electrode 20 is connected to the top plate 3 via the spring structure 270 arranged alongside the bolt 61, thereby achieving the following effects.
It is possible to ensure contact pressure for all upper electrodes 20 that vary in height. Therefore, even if there is variation in the height position of the upper electrodes 20, an electrical conduction path can be formed between each upper electrode 20 and the top plate 3. Furthermore, it is possible to reduce the contact thermal resistance between each upper electrode 20 and the top plate 3.
In addition, the spring structure 270 can absorb the tolerance in the height of the top end of the upper electrode 20 during assembly.

In the second embodiment, the end of the spring structure 270 on the semiconductor element 30 side is positioned closer to the bolt 61 than the portion of the upper electrode 20 that protrudes toward the top plate 3, thereby achieving the following effects.
A load acts on the bolt 61, stretching it using the principle of leverage. If the bolt 61 breaks when a large current flows due to a short-circuit fault, an arc occurs. The arc pushes the top plate 3 upward, which in turn pulls up the upper electrodes 20 of the parallel-arranged semiconductor packages P. Therefore, compared to a structure in which no arc occurs, a concomitant short-circuit fault is more likely to occur.

The second embodiment described above is an example in which the upper electrode 20 is connected to the top plate 3 via fastening members 60, 61 and a spring structure 270. However, depending on factors such as the magnitude of the current flowing during a short-circuit fault, it may be necessary to further reduce electrical resistance. In the following embodiment, an example in which electrical resistance is further reduced using a conductive member will be described.

Next, a third embodiment will be described as an example of a semiconductor module. In the third embodiment, a description of the same configuration as in the first and second embodiments will be omitted. The third embodiment differs from the second embodiment in that a conductive member 380 is provided.
FIG. 10 is a side cross-sectional view of a semiconductor module 301 according to the third embodiment.
The upper electrode 20 is connected to the top plate 3 via a conductive member 380 arranged alongside a spring structure 270 (an example of an elastic member).

For example, the conductive member 380 is made of a metal material with low electrical resistance, such as copper. The conductive member 380 is made of a metal material with lower electrical resistance than the spring structure 270. The conductive member 380 has a U-shape. The conductive member 380 is formed by bending a plate-shaped member into a U-shape. One end of the conductive member 380 is located between the upper electrode 20 and the lower end of the spring structure 270. The other end of the conductive member 380 is located between the top plate 3 and the upper end of the spring structure 270. The conductive member 380 has a sufficient cross-sectional area so that it will not melt due to Joule heating even when an expected current flows through it.

11 and 12 are side cross-sectional and perspective views showing modified examples of the conductive member.
For example, the length L of the conductive member 480 (the length in the left-right direction in FIG. 11 ) may be longer than the length of the third extension portion 23 of the upper electrode 20 (the length in the left-right direction in FIG. 11 ). Because the conductive member 480 has a turning structure, current flows in the conductive member 480 in opposite directions (the rightward arrow in FIG. 11 and the leftward arrow in FIG. 11 ). The action of the opposite current generates a repulsive electromagnetic force MF. This generates an electromagnetic force in a direction that presses the conductive member 480 against the upper electrode 20 and the top plate 3. This is therefore advantageous for improving the contact pressure and preventing a deterioration in the contact electrical resistance.

For example, the conductive member 480 may have multiple through holes 481 (bolt holes). For example, the through holes 481 may be arranged in pairs in the width direction of the conductive member 480. This makes it possible to adjust the preload during assembly by inserting a bolt 61 into each through hole 481. In addition, this is advantageous for further improving the contact pressure of the conductive member 480 with the upper electrode 20 and top plate 3 and preventing a deterioration in contact electrical resistance.

For example, the conductive member 480 may be designed as follows: The material of the conductive member 480 may be copper (electrical resistivity 1.78×10 ⁻⁸ Ω·m, melting point 1084.5° C.). The dimensions of the conductive member 480 may be thickness t=1 mm, width w=28 mm, and length L=15 mm.

FIG. 13 is a diagram showing the calculation results of the assumed current and the temperature of the conducting member.
In the example of FIG. 13, the maximum temperature of the conductive member is 840°C.
For example, in the event of a short circuit, the temperature rise caused by Joule heat generated by the current flow is made smaller than the melting point, thereby preventing the melting of conductive members and maintaining electrical continuity in the semiconductor module.

As described above, in the third embodiment, the upper electrode 20 is connected to the top plate 3 via the conductive member 380 arranged alongside the spring structure 270, thereby achieving the following effects.
Since the current flows through the conductive member 380 in addition to the bolt 61 and the spring structure 270, the electrical resistance of the semiconductor module 301 can be reduced.

In the second and third embodiments, the spring structure 270 (elastic member) is a structure in which multiple disc springs 271 are stacked (a configuration including disc springs 271). In contrast, the elastic member does not have to be a configuration including disc springs 271. For example, the elastic member may be a coil spring, a leaf spring, or a thin plate. For example, the form of the elastic member can be changed depending on the design specifications.

Next, a fourth embodiment will be described as an example of a semiconductor module. In the fourth embodiment, a description of the same configuration as in the first embodiment will be omitted. The fourth embodiment differs from the first embodiment in the arrangement of paired semiconductor packages in the semiconductor module.
Fig. 14 is a top view of a semiconductor module 401 according to the fourth embodiment. Fig. 15 is a side cross-sectional view of the semiconductor module 401 according to the fourth embodiment.
The upper electrode 20 protrudes from a position closer to one side of the side opening 42 in a top view. The first semiconductor package PA and the second semiconductor package PB are disposed opposite each other.

The upper electrode 20 of the first semiconductor package PA protrudes from a position closer to one side of the side opening 42 in a top view. The upper electrode 20 of the second semiconductor package PB protrudes from a position closer to the other side of the side opening 42 in a top view. The upper electrode 20 of the second semiconductor package PB protrudes toward the other side of the side opening 42 of the first semiconductor package PA in a top view. The first semiconductor package PA and the second semiconductor package PB are each L-shaped with a crank-shaped gap between them in a top view. The first semiconductor package PA and the second semiconductor package PB are arranged alternately in a top view.

The first semiconductor package PA and the second semiconductor package PB are arranged so that the third extension portions 23 of their respective upper electrodes 20 are aligned in the depth direction of the page. The first semiconductor package PA and the second semiconductor package PB are positioned so that the through holes (bolt holes) of their respective upper electrodes 20 overlap in the depth direction of the page.

As described above, in the fourth embodiment, the upper electrode 20 protrudes from a position closer to one side of the side opening 42 in a top view. The first semiconductor package PA and the second semiconductor package PB are disposed opposite each other. The above configuration provides the following effects.
Since the first semiconductor package PA and the second semiconductor package PB are arranged alternately in a top view, the spacing between the parallel upper electrodes 20 becomes closer. This makes it easier to pull up the upper electrodes 20 of other semiconductor packages connected in parallel to the faulty semiconductor package toward the top plate 3. This makes it easier for mechanical damage to occur in the other semiconductor packages. In addition, more semiconductor packages can be arranged in a small space.

Next, a fifth embodiment will be described as an example of a semiconductor module. In the fifth embodiment, a description of the same configuration as the first embodiment will be omitted. The fifth embodiment differs from the first embodiment in that there is no collector potential exposed surface in the semiconductor module.
FIG. 16 is a side cross-sectional view of a semiconductor module 501 according to the fifth embodiment.
The portion of the bottom plate 2 that is connected to the lower electrode 10 is covered with a lower sealing member 590 (an example of a second insulating member) for electrical insulation from the upper electrode 20 .

For example, the lower sealing member 590 may be formed from an electrically insulating material such as resin. For example, the resin may be a thermosetting resin such as epoxy resin. For example, the lower sealing member 590 in a highly fluid state may be injected into the semiconductor module 501 and allowed to harden. This may result in the resin sealing of the lower electrode 10 and the bottom plate 2.

The lower sealing member 590 is provided in the portion of the semiconductor module 501 that is surrounded by the lower portion of the insulating case 4 and the upper surface of the bottom plate 2. The lower sealing member 590 covers the upper surface of the bottom plate 2 and the lower electrode 10 (collector-side metal portion) of the semiconductor package P in the semiconductor module 501. The upper portion of the semiconductor package P (the portion connected to the top plate 3) in the semiconductor module 501 is exposed and not covered by the lower sealing member 590.

As described above, in the fifth embodiment, the portion of the bottom plate 2 connected to the lower electrode 10 is covered with a lower sealing member 590 for electrical insulation from the upper electrode 20, thereby achieving the following effects.
It is possible to electrically insulate the member at the potential on the upper electrode 20 side from the member at the potential on the lower electrode 10 side, thereby enabling the semiconductor module 501 to have a high breakdown voltage and be miniaturized.

Next, a modification of the embodiment will be described.
The upper electrode of the embodiment includes a first extension portion and a second extension portion. Alternatively, the upper electrode may not include a second extension portion. For example, as shown in FIG. 17 , the upper electrode 1020 may extend along the top surface of the semiconductor element 30 and protrude from the side opening 42 to the outside of the metal case 40. The bolt 61 may extend in the vertical direction from the protruding end of the upper electrode 1020 to the top plate 3. For example, the upper electrode 1020 and the bolt 61 may have a bent shape to generate a repulsive electromagnetic force. For example, the configuration of the upper electrode can be changed according to design specifications.

The upper electrode in this embodiment has a crank shape. However, the upper electrode may have other shapes (e.g., a J-shape). For example, as shown in FIG. 18 , the upper electrode 1120 may include a first extension portion 21, a second extension portion 22, a third extension portion 23, and a fourth extension portion 1124. The third extension portion 23 and the fourth extension portion 1124 may extend in opposite directions along a horizontal plane. For example, the end of the third extension portion 23 and the end of the fourth extension portion 1124 may each be fastened to the top plate 3 with bolts 61. For example, the fastening manner between the upper electrode and the top plate can be changed according to design specifications.

In the embodiment, the upper electrode is fastened to the top plate with bolts. However, the upper electrode does not have to be fastened to the top plate with bolts. For example, as shown in FIG. 19 , the upper electrode 1220 may extend from the semiconductor element 30 to one side (to the right on the paper), then bend and extend upward, then bend again and extend to the other side (to the left on the paper), then bend again and extend upward. For example, the upper end of the upper electrode 1220 may be connected to the underside of the top plate 3 with solder or the like. For example, the connection between the upper electrode and the top plate can be changed according to design specifications.

The upper electrode in this embodiment has a crank shape. However, the upper electrode may have other shapes (e.g., an S-shape). For example, as shown in FIG. 20 , the upper electrode 1320 may extend from the semiconductor element 30 to one side (to the right on the paper), then bend and extend upward, then bend again and extend to the other side (to the left on the paper), then bend again and extend upward, then bend again and extend to one side (to the right on the paper). For example, the shape of the upper electrode can be changed according to design specifications.

In the embodiment, the upper electrode is fastened with bolts from above the top plate. However, the upper electrode does not have to be fastened with bolts from above the top plate. For example, as shown in FIG. 21 , the upper electrode 20 may be fastened with bolts 61 from below the top plate 3 (below the upper electrode 20). For example, the nut 60 may be provided on the top surface of the top plate 3. For example, the fastening mode of the upper electrode can be changed according to the design specifications.

In this embodiment, the top plate (second metal member) is positioned above the bottom plate (first metal member). However, the top plate (second metal member) does not have to be positioned above the bottom plate (first metal member). For example, the second metal member may be positioned below the first metal member or to the left or right of the first metal member. For example, each metal member may be block-shaped rather than plate-shaped. For example, the arrangement and shape of each metal member can be changed according to design specifications.

In the semiconductor module of the embodiment, current flows from the bottom plate (first metal member) to the top plate (second metal member). However, current does not have to flow from the bottom plate (first metal member) to the top plate (second metal member). For example, current may flow from the top plate (second metal member) to the bottom plate (first metal member). For example, the direction of current flow in the semiconductor module can be changed depending on the design specifications.

In the embodiment, the semiconductor element is housed in a metal case. However, the semiconductor element does not have to be housed in a metal case. For example, the semiconductor element may be covered with resin or the like without a metal case. For example, the installation form of the metal case can be changed depending on the design specifications.

In the embodiment, the metal case is covered with a sealing member (first insulating member). However, the metal case does not have to be covered with a sealing member (first insulating member). For example, the sealing aspect of the metal case can be changed depending on the design specifications.

The upper electrode in the embodiment has a curved shape and generates a repulsive electromagnetic force when current is passed from the bottom plate to the top plate. In contrast, the upper electrode does not have to have a curved shape. For example, the lower electrode may have a curved shape and generate a repulsive electromagnetic force when current is passed from the top plate to the bottom plate. For example, at least one of the lower electrode and the upper electrode may have a curved shape and generate a repulsive electromagnetic force that pushes at least one of the bottom plate and the top plate toward the side opposite the semiconductor element when current is passed from one of the bottom plate and the top plate to the other. For example, the configuration of the lower electrode and the upper electrode can be changed according to design specifications.

In at least one of the embodiments described above, at least one of the first conductive member and the second conductive member has a bent shape, and when current is passed from one of the first metal member and the second metal member to the other, a repulsive electromagnetic force is generated that pushes at least one of the first metal member and the second metal member toward the side opposite the semiconductor element. This makes it possible to provide a semiconductor module that can maintain electrical continuity even in the event of a large-energy breakdown.

While several embodiments of the present invention have been described, these embodiments are presented as examples and are not intended to limit the scope of the invention. These embodiments may be embodied in a variety of other forms, and various omissions, substitutions, and modifications may be made without departing from the spirit of the invention. These embodiments and their variations are within the scope of the invention and its equivalents as defined in the claims, as well as the scope and spirit of the invention.

(Appendix 1)
a first metal member and a second metal member arranged opposite to each other;
a first semiconductor package and a second semiconductor package disposed between the first metal member and the second metal member,
Each of the first semiconductor package and the second semiconductor package includes:
a first conductive member connected to the first metal member;
a second conductive member connected to the second metal member;
a semiconductor element disposed between the first conductive member and the second conductive member and connected to the first conductive member and the second conductive member,
At least one of the first conductive member and the second conductive member has a bent shape, and generates a repulsive electromagnetic force that pushes up at least one of the first metal member and the second metal member toward an opposite side to the semiconductor element when current is passed from one of the first metal member and the second metal member to the other.
Semiconductor module.

(Appendix 2)
the second metal member is disposed above the first metal member,
The semiconductor element is housed in a metal case,
The metal case is
a lower opening exposing a surface of the first conductive member opposite to a surface connected to the semiconductor element;
a side opening that opens to a side of the semiconductor element so as to intersect with the lower opening,
the first conductive member is connected to the first metal member through the lower opening;
the second conductive member is connected to the second metal member through the side opening;
2. The semiconductor module of claim 1.

(Appendix 3)
The second conductive member is
a first extension portion extending along a surface connected to the semiconductor element and protruding from the side opening to the outside of the metal case;
a second extending portion extending upward from the protruding end of the first extending portion toward the second metal member,
3. The semiconductor module of claim 2.

(Appendix 4)
The metal case is covered with a first insulating member for electrically insulating the metal case from the semiconductor element.
4. The semiconductor module according to claim 2 or 3.

(Appendix 5)
the first metal member is connected to the second metal member via an insulating case,
an upper end of the second conductive member is located lower than an upper end of the insulating case;
the second conductive member is connected to the second metal member via a fastening member;
5. The semiconductor module according to claim 2,

(Appendix 6)
the second conductive member is connected to the second metal member via an elastic member arranged alongside the fastening member;
6. The semiconductor module of claim 5.

(Appendix 7)
the second conductive member is connected to the second metal member via a conductive member arranged alongside the elastic member;
7. The semiconductor module of claim 6.

(Appendix 8)
an end of the elastic member on the semiconductor element side is positioned more toward the fastening member than a portion of the second conductive member that protrudes toward the second metal member;
8. The semiconductor module according to claim 6 or 7.

(Appendix 9)
the second conductive member protrudes from a position closer to one side of the side opening in a top view,
the first semiconductor package and the second semiconductor package are disposed opposite to each other;
9. The semiconductor module of claim 2.

(Appendix 10)
The thickness of the second conductive member is 3 mm or more.
10. The semiconductor module of claim 1.

(Appendix 11)
The thickness of the second metal member is 2 mm or more and 12 mm or less.
11. The semiconductor module of claim 1.

(Appendix 12)
the first metal member is connected to the second metal member via an insulating case,
the first metal member has a first connection terminal that protrudes laterally beyond the insulating case,
The second metal member has a second connection terminal that protrudes laterally beyond the insulating case.
12. The semiconductor module of claim 1.

(Appendix 13)
a portion of the first metal member connected to the first conductive member being covered with a second insulating member for electrically insulating the first metal member from the second conductive member;
13. The semiconductor module of any one of claims 1 to 12.

1, 201, 301, 401, 501...Semiconductor module, 2...Bottom plate (first metal member), 3...Top plate (second metal member), 4...Insulating case, 5...Lower connection terminal (first connection terminal), 6...Upper connection terminal (second connection terminal), 10...Lower electrode (first conductive member), 20, 1020, 1120, 1220, 1320...Upper electrode (second conductive member), 21...First extension portion, 22...Second extension portion, 30...Semiconductor element, 40...Metal case, 41...Lower opening, 42...Side opening, 50...Sealing member (first insulating member), 60...Nut (fastening member), 61...Bolt (fastening member), 270...Spring structure (elastic member), 380, 480...Conductive member, 590...Lower sealing member (second insulating member), MF...Repulsive electromagnetic force, P...Semiconductor package, PA...First semiconductor package, PB...Second semiconductor package

Claims (13)

a first metal member and a second metal member arranged opposite to each other;
a first semiconductor package and a second semiconductor package disposed between the first metal member and the second metal member,
Each of the first semiconductor package and the second semiconductor package includes:
a first conductive member connected to the first metal member;
a second conductive member connected to the second metal member;
a semiconductor element disposed between the first conductive member and the second conductive member and connected to the first conductive member and the second conductive member,
At least one of the first conductive member and the second conductive member has a bent shape, and generates a repulsive electromagnetic force that pushes up at least one of the first metal member and the second metal member toward an opposite side to the semiconductor element when current is passed from one of the first metal member and the second metal member to the other.
Semiconductor module. the second metal member is disposed above the first metal member,
The semiconductor element is housed in a metal case,
The metal case is
a lower opening exposing a surface of the first conductive member opposite to a surface connected to the semiconductor element;
a side opening that opens to a side of the semiconductor element so as to intersect with the lower opening,
the first conductive member is connected to the first metal member through the lower opening;
the second conductive member is connected to the second metal member through the side opening;
The semiconductor module according to claim 1 . The second conductive member is
a first extension portion extending along a surface connected to the semiconductor element and protruding from the side opening to the outside of the metal case;
a second extending portion extending upward from the protruding end of the first extending portion toward the second metal member,
The semiconductor module according to claim 2 . The metal case is covered with a first insulating member for electrically insulating the metal case from the semiconductor element.
The semiconductor module according to claim 2 . the first metal member is connected to the second metal member via an insulating case,
an upper end of the second conductive member is located lower than an upper end of the insulating case;
the second conductive member is connected to the second metal member via a fastening member;
The semiconductor module according to claim 2 . the second conductive member is connected to the second metal member via an elastic member arranged alongside the fastening member;
The semiconductor module according to claim 5 . the second conductive member is connected to the second metal member via a conductive member arranged alongside the elastic member;
The semiconductor module according to claim 6 . an end of the elastic member on the semiconductor element side is positioned more toward the fastening member than a portion of the second conductive member that protrudes toward the second metal member;
The semiconductor module according to claim 6 . the second conductive member protrudes from a position closer to one side of the side opening in a top view,
the first semiconductor package and the second semiconductor package are disposed opposite to each other;
The semiconductor module according to claim 2 . The thickness of the second conductive member is 3 mm or more.
The semiconductor module according to claim 1 . The thickness of the second metal member is 2 mm or more and 12 mm or less.
The semiconductor module according to claim 1 . the first metal member is connected to the second metal member via an insulating case,
the first metal member has a first connection terminal that protrudes laterally beyond the insulating case,
The second metal member has a second connection terminal that protrudes laterally beyond the insulating case.
The semiconductor module according to claim 1 . a portion of the first metal member connected to the first conductive member being covered with a second insulating member for electrically insulating the first metal member from the second conductive member;
The semiconductor module according to claim 1 .