JP7795663B2 - Display device and method for manufacturing the same - Google Patents

Description

TECHNICAL FIELD One aspect of the present invention relates to a display panel and a display module.

Note that one embodiment of the present invention is not limited to the above technical field. The technical field of one embodiment of the invention disclosed in this specification and the like relates to an object, a method, or a manufacturing method. Alternatively, one embodiment of the present invention relates to a process, a machine, manufacture, or a composition of matter. Therefore, more specifically, examples of the technical field of one embodiment of the present invention disclosed in this specification include a semiconductor device, a display device, a light-emitting device, a power storage device, a memory device, a driving method thereof, or a manufacturing method thereof.

There are functional elements whose functions are impaired by the diffusion of impurities. In order to maintain the functions of such functional elements, an invention is known in which the functional element is sealed in a space surrounded by a substrate on which the functional element is provided, a sealing substrate, and a sealing material that bonds the substrate and the sealing substrate (Patent Document 1).

In a known invention, in the manufacturing process of a light-emitting device, after manufacturing an electrode layer and an element layer, a light-emitting panel having at least a partially bent portion is manufactured by performing a processing to form a shape, and a protective film is formed to cover the surface of the light-emitting panel having at least a partially bent portion, thereby adding high functionality and high reliability to a light-emitting device using the light-emitting panel (Patent Document 2).

US Patent Application Publication No. 2007/0170854 JP 2011-003537 A

An object of one embodiment of the present invention is to provide a novel display panel that is highly convenient or reliable, a novel display panel that can be easily housed in a housing, a novel display panel with reduced power consumption, or a novel display module or a novel semiconductor device.

The description of these problems does not preclude the existence of other problems. It is not necessary for one embodiment of the present invention to solve all of these problems. Problems other than these will become apparent from the description of the specification, drawings, claims, etc., and will not be discussed further.
It is possible to extract other issues from the drawings, claims, etc.

One embodiment of the present invention is a display panel including a terminal, a first substrate that supports the terminal, a second substrate having an area overlapping with the first substrate, a bonding layer that bonds the first substrate and the second substrate together, a display element that is electrically connected to the terminal between the first substrate and the second substrate, and an insulating layer that is in contact with the first substrate, the second substrate, and the bonding layer, and the insulating layer has an opening in the area overlapping with the display element.

Another embodiment of the present invention is the display panel described above, further including a resin layer, wherein the insulating layer has a region sandwiched between the bonding layer and the resin layer.

Another embodiment of the present invention is the display panel, in which the display element contains a light-emitting organic compound.

Another aspect of the present invention is the display panel, wherein the first substrate is flexible and the second substrate is flexible.

Another aspect of the present invention is the above-mentioned display panel, in which the display element includes a liquid crystal.

Another embodiment of the present invention is a display module including the display panel and a flexible printed circuit board electrically connected to the terminals.

Another aspect of the present invention is a method for manufacturing the display panel, the method including: preparing a processed member having a terminal, a first substrate supporting the terminal, a second substrate having an area overlapping the first substrate, a bonding layer bonding the first substrate and the second substrate, and a display element electrically connected to the terminal between the first substrate and the second substrate; and forming a mask in an area overlapping the area where the display element will be disposed; forming an insulating layer in contact with the first substrate, the second substrate, and the bonding layer by atomic layer deposition; and removing a part of the insulating layer together with the mask.

In this specification, the EL layer refers to a layer provided between a pair of electrodes of a light-emitting element. Therefore, a light-emitting layer containing an organic compound as a light-emitting substance sandwiched between electrodes is one embodiment of the EL layer.

In addition, in this specification, when a substance A is dispersed in a matrix made of another substance B,
The substance B that constitutes the matrix is called the host material, and the substance A dispersed in the matrix is called the guest material. Note that each of the substances A and B may be a single substance or a mixture of two or more substances.

In this specification, the term "light emitting device" refers to a display device or a light source (including a lighting device).
printed circuit) or TCP (Tape Carrier P
a module with a TCP package attached, a module with a printed wiring board attached to the end of the TCP, or a module with a COG (Chip On Glass) on a substrate on which light emitting elements are formed.
A module in which an IC (integrated circuit) is directly mounted may be included in a light emitting device.

It should be noted that the terms "film" and "layer" can be interchangeable in some cases or depending on the situation. For example, the term "conductive layer" can be changed to the term "conductive film." Or, for example, the term "insulating film" can be changed to the term "insulating layer."

In this specification, one of a first electrode and a second electrode of a transistor refers to a source electrode, and the other refers to a drain electrode.

According to one embodiment of the present invention, a novel display panel with excellent convenience or reliability, a novel display panel with excellent houseability in a housing, a novel display panel with reduced power consumption, or a novel display module or a novel semiconductor device can be provided.

Note that the description of these effects does not preclude the existence of other effects. Note that one embodiment of the present invention does not necessarily have all of these effects. Note that effects other than these will become apparent from the description in the specification, drawings, claims, etc., and it is possible to extract other effects from the description in the specification, drawings, claims, etc.

1A to 1C illustrate a structure of a display panel according to an embodiment. 1A to 1C illustrate a structure of a display panel according to an embodiment. 1A to 1C illustrate a structure of a display panel according to an embodiment. 1A to 1C illustrate a structure of a display panel according to an embodiment. 1A to 1C illustrate a structure of a display panel according to an embodiment. 1A and 1B illustrate a configuration of a display module according to an embodiment. 1A and 1B illustrate a configuration of a display module according to an embodiment. 1 is a flowchart illustrating a manufacturing method of a display panel according to an embodiment. 1A to 1C illustrate a method for manufacturing a display panel according to an embodiment. 1A to 1C illustrate a method for manufacturing a display panel according to an embodiment. 1A to 1C illustrate a method for manufacturing a display panel according to an embodiment. 1 is a diagram illustrating a configuration of a film formation apparatus according to an embodiment. 1A to 1C illustrate a method for manufacturing a display panel according to an embodiment. 1A to 1C illustrate structural examples of a transistor according to one embodiment of the present invention. 1A to 1C illustrate an example of a method for manufacturing a transistor according to one embodiment of the present invention. 1A to 1C illustrate structural examples of a transistor according to one embodiment of the present invention. 1A to 1C illustrate structural examples of a transistor according to one embodiment of the present invention. A Cs-corrected high-resolution TEM image of a cross section of a CAAC-OS and a schematic cross-sectional view of a CAAC-OS. Cs-corrected high-resolution TEM image of a CAAC-OS surface. 10A and 10B illustrate structural analyses of a CAAC-OS and a single-crystal oxide semiconductor by XRD. FIG. 1 shows an electron diffraction pattern of CAAC-OS. FIG. 1 is a diagram showing changes in crystalline parts of an In—Ga—Zn oxide due to electron irradiation. 1A and 1B illustrate a structure of a display module according to one embodiment of the present invention. 1A and 1B illustrate a structure of a display module according to one embodiment of the present invention. 1A and 1B illustrate a structure of a display module according to one embodiment of the present invention. 1A to 1C illustrate a method for manufacturing a display panel according to an embodiment. 1A to 1C illustrate a method for manufacturing a display panel according to an embodiment. 1A and 1B illustrate a structure of a display module according to one embodiment of the present invention.

The embodiments will be described in detail with reference to the drawings. However, the present invention is not limited to the following description, and it will be readily understood by those skilled in the art that various changes in form and details can be made without departing from the spirit and scope of the present invention. Therefore, the present invention should not be interpreted as being limited to the description of the embodiments shown below. In the configuration of the invention described below, the same parts or parts having similar functions will be denoted by the same reference numerals in different drawings, and repeated explanations will be omitted.

(Embodiment 1)
In this embodiment, a structure of a display panel according to one embodiment of the present invention will be described with reference to drawings.

2A and 2B illustrate a structure of a display panel according to one embodiment of the present invention. FIG. 2A is a top view of a display panel 200 according to one embodiment of the present invention. FIG. 2B is a cross-sectional view of a display panel according to one embodiment of the present invention.
8B and a cross-sectional view taken along the cutting line CD.

FIG. 2C is a cross-sectional view illustrating the structure of a display panel 200B that has a different structure from the display panel 200 shown in FIG. 2B.

<Display panel configuration example 1.>
The display panel 200 described in this embodiment includes a terminal 219, a first base material 210 supporting the terminal 219, a second base material 270 having an area overlapping the first base material 210, a bonding layer 205 bonding the first base material 210 and the second base material 270 together, and a bonding layer 205 bonding the first base material 210 and the second base material 270 together.
The display element 250 electrically connected to the terminal 219 is disposed between the first substrate 210 and the second substrate 270.
, and an insulating layer 290 in contact with the second base material 270 and the bonding layer 205.
0 has an opening 291 and an opening 295 .

The display panel 200 described in this embodiment has a first base material 210 that supports terminals 219.
, a second substrate 270 overlapping the first substrate 210, and a second substrate 270 overlapping the first substrate 210 and the second substrate 27
The display panel includes an insulating layer 290 that is in contact with the bonding layer 205 that bonds the display panel 100 to the insulating layer 290. This makes it possible to suppress the diffusion of impurities into the region surrounded by the insulating layer 290. As a result, a novel display panel that is excellent in convenience and reliability can be provided.

The display panel 200 described in this embodiment also includes an insulating layer 290 having an opening 291 in an area overlapping an area where the display element 250 is disposed.
Therefore, an insulating layer that suppresses the diffusion of impurities can be provided in other regions without forming a layer that absorbs light in the region overlapping with pixel 0. As a result, a novel display panel with excellent reliability and reduced power consumption can be provided.

The display panel 200 also includes wiring 211 that is electrically connected to a terminal 219 and a display element 250 .

The display panel 200 also has a driving circuit 203 G between the region where the display element 250 is disposed and the end of the first base material 210 .

Note that the display panel 200 described with reference to Figure 2 (B) includes a material (e.g., gas, liquid, or liquid crystal) different from the bonding layer 205 in the area surrounded by the first base material 210, the second base material 270, and the bonding layer 205.

On the other hand, the display panel 200B described with reference to Figure 2(C) differs from the display panel 200 described with reference to Figure 2(B) in that a bonding layer 205 fills the space between the display element 250 and the second base material 270.

The display panel 200 has a drive circuit 203G, and the distance L2 from the drive circuit 203G to the nearest end of the first base material 210 is 1.0 mm or less, preferably 0.3 mm or less, and is greater than 0 mm.

For example, the display panel 200 has a distance L from the display element 250 arranged so as to sandwich the drive circuit 203G between the display element 250 and the edge of the first base material 210, to the closest edge of the first base material 210.
1 is 4.0 mm or less, preferably 2 mm or less, and more preferably 1.0 mm or less,
Greater than m.

For example, the display panel 200 has a display element 250, and the distance L3 from the edge of the first substrate 210 or the edge of the second substrate 270 to the nearest display element 250 is less than 3.0 mm, preferably less than 1.5 mm, and greater than 0 mm.

For example, the display panel 200 has a bonding layer 205, and the longest distance L4 between the end of the first substrate 210 overlapping the second substrate 270 and the end of the bonding layer 205, or the end of the second substrate 270 overlapping the first substrate 210 and the end of the bonding layer 205, is 0.3 mm or more, preferably 0.5 mm or more and less than 10 mm. For example, by using atomic layer deposition, the insulating layer 290 can be formed by spreading the film material around (
See Figure 2(B).

The following describes the individual elements that make up the display panel 200. Note that these components cannot be clearly separated, and one component may also serve as another component or may include part of another component.

Display panel 200
The display panel 200 includes a terminal 219, a first substrate 210, a second substrate 270, and a bonding layer 205.
, a display element 250 , and an insulating layer 290 .

The display panel 200 also has wiring 211.

<<First substrate 210>>
At least one of the first base material 210 and the second base material 270 has a light-transmitting region in a region overlapping with the display element 250 .

There are no particular limitations on the first base material 210 as long as it has heat resistance sufficient to withstand the manufacturing process and a thickness and size that are applicable to a manufacturing device.

An organic material, an inorganic material, or a composite material of an organic material and an inorganic material can be used for the first base material 210. For example, an inorganic material such as glass, ceramics, or metal can be used for the first base material 210.
It can be used for.

Specifically, alkali-free glass, soda-lime glass, potash glass, crystal glass, or the like can be used for the first base material 210. Specifically, an inorganic oxide film, an inorganic nitride film, an inorganic oxynitride film, or the like can be used for the first base material 210. For example, a silicon oxide film, a silicon nitride film, a silicon oxynitride film, an alumina film, or the like can be used for the first base material 210. SUS, aluminum, or the like can be used for the first base material 210.

For example, an organic material such as a resin, a resin film, or a plastic can be used for the first base material 210. Specifically, a resin film or a resin plate made of polyester, polyolefin, polyamide, polyimide, polycarbonate, acrylic resin, or the like can be used for the first base material 210.

For example, a composite material in which a metal plate, a thin glass plate, or a film of an inorganic material or the like is bonded to a resin film or the like can be used for the first substrate 210. For example, a composite material in which fibrous or particulate metal, glass, or an inorganic material or the like is dispersed in a resin film can be used for the first substrate 210.
For example, the first base material 210 can be a composite material in which fibrous or particulate resin or organic material is dispersed in an inorganic material.

Furthermore, a single-layer material or a material having multiple layers laminated thereon can be used for the first base material 210. For example, a material having a substrate and an insulating layer or the like laminated thereon that prevents the diffusion of impurities contained in the substrate can be used for the first base material 210. Specifically, a material having glass and one or more films selected from a silicon oxide layer, a silicon nitride layer, a silicon oxynitride layer, or the like that prevent the diffusion of impurities contained in the glass laminated thereon can be used for the first base material 210. Alternatively, a material having resin and a silicon oxide film, a silicon nitride film, a silicon oxynitride film, or the like that prevent the diffusion of impurities that permeate the resin laminated thereon can be used for the first base material 210.

A flexible material can be used for the first substrate 210. For example, a material having flexibility to the extent that it can be bent or folded can be used. Specifically, a material that can be bent with a radius of curvature of 5 mm or more, preferably 4 mm or more, more preferably 3 mm or more, and particularly preferably 1 mm or more can be used. In addition, a material having a thickness of 2.5 μm or more and 3 mm or less, preferably 5 μm or more and 1.5 mm or less, and particularly preferably 10 μm or more can be used.
A material having a thickness of 500 μm or more can be used for the first base material 210 .

For example, the first substrate 210 may be a laminate including a flexible substrate 210b, a barrier film 210a that prevents the diffusion of impurities, and an adhesive layer 210c that bonds the substrate 210b and the barrier film 210a together.

<<Second substrate 270>>
The materials that can be used for the first substrate 210 can be used for the second substrate 270 .

For example, the second base material 270 includes a flexible base material 270b, a barrier film 270a that prevents the diffusion of impurities, and an adhesive layer 270c that bonds the base material 270b and the barrier film 270a together.

<<Joining layer 205>>
A material capable of bonding the first base material 210 and the second base material 270 is used as the bonding layer 2.
It can be used for 05.

The bonding layer 205 can be made of an inorganic material, an organic material, a composite material of an inorganic material and an organic material, or the like.

For example, glass having a melting point of 400° C. or less, preferably 300° C. or less, can be used for the bonding layer 205 .

For example, the bonding layer 205 can be made of an organic material such as a heat-melting resin or a curable resin.

For example, the bonding layer 205 can be made of an organic material such as a photo-curable adhesive, a reaction-curable adhesive, a thermosetting adhesive, or/and an anaerobic adhesive.

Specifically, adhesives containing epoxy resin, acrylic resin, silicone resin, phenolic resin, polyimide resin, imide resin, PVC (polyvinyl chloride) resin, PVB (polyvinyl butyral) resin, EVA (ethylene vinyl acetate) resin, etc. can be used.

<<Wiring 211, Terminal 219>>
A conductive material can be used for the wiring 211 or the terminal 219 .

For example, inorganic conductive materials, organic conductive materials, metals, conductive ceramics, or the like can be used for the wiring 211 or the terminal 219 .

Specifically, a metal element selected from aluminum, gold, platinum, silver, copper, chromium, tantalum, titanium, molybdenum, tungsten, nickel, iron, cobalt, palladium, or manganese can be used for the wiring 211 or the terminal 219. Alternatively, an alloy containing the above-mentioned metal element can be used for the wiring 211 or the terminal 219. Alternatively,
An alloy made by combining the above-mentioned metal elements can be used for the wiring 211 or the terminal 219 .

Specifically, a conductive oxide such as indium oxide, indium tin oxide, indium zinc oxide, zinc oxide, or zinc oxide doped with gallium can be used for the wiring 211 or the terminal 219 .

Specifically, a film containing graphene or graphite can be used for the wiring 211 or the terminal 219 .

For example, a film containing graphene can be formed by forming a film containing graphene oxide and reducing the film containing graphene oxide. Examples of the reduction method include a method of applying heat or a method of using a reducing agent.

Specifically, a conductive polymer can be used for the wiring 211 or terminal 219.

<<Display element 250>>
A variety of display elements can be used for the display element 250 .

For example, a display medium whose contrast, brightness, reflectance, transmittance, etc. change due to an electrical or magnetic effect can be used as a display element.

Specifically, EL (electroluminescence) elements (EL elements containing organic and inorganic materials, organic EL elements, inorganic EL elements), LEDs (white LEDs, red LEDs, green LEDs, blue LEDs, etc.), transistors (transistors that emit light in response to current), electron-emitting elements,
Liquid crystal elements, electronic ink, electrophoretic elements, grating light valves (GLV), plasma displays (PDP), MEMS (microelectromechanical systems)
display elements using the above, digital micromirror devices (DMD), DMS (digital micro shutter), MIRASOL (registered trademark), IMOD (interference modulation) elements, shutter-type MEMS display elements, optical interference-type MEMS
A display element, an electrowetting element, a piezoelectric ceramic display, a display element using carbon nanotubes, etc. can be used.

<Insulating layer 290>
The insulating layer 290 has an opening 291 in a region overlapping the region where the display element 250 is disposed, and also has an opening 295 in a region overlapping the terminal 219.

For example, films comprising oxides, nitrides, fluorides, ternary compounds or polymers can be formed.

Specifically, materials containing aluminum oxide, hafnium oxide, aluminum silicate, hafnium silicate, lanthanum oxide, silicon oxide, strontium titanate, tantalum oxide, titanium oxide, zinc oxide, niobium oxide, zirconium oxide, tin oxide, yttrium oxide, cerium oxide, scandium oxide, erbium oxide, vanadium oxide, or indium oxide can be used.

For example, a material containing aluminum nitride, hafnium nitride, silicon nitride, or the like can be used.

The display panel 200 and the display panel 200B described with reference to FIG. 2 have openings 2 in the insulating layer 290 so that the surfaces of the first base material 210 and the second base material 270 are exposed.
3, the display panel 200 and the display panel 200B may have an opening 291 in the insulating layer 290 so that the surface of the second base material 270 is exposed. Also, the display panel 200 and the display panel 200B may have an opening 291 in the insulating layer 290 so that the surface of the first base material 210 is exposed.

In the display panel 200 and the display panel 200B, the insulating layer 290 is
205. Alternatively, the bonding layer 205 may be provided in a region in contact with the bonding layer 205 as shown in FIG.

In place of the opening 295, a mask having a function of forming the opening 295 is formed on the insulating layer 2.
90 and the terminal 219. Specifically, a masking tape or the like can be used as the mask. For example, when connecting the flexible printed circuit board 221 to the display panel, the mask can be removed to expose the terminal 219.

The insulating layer 290 can be made of a material having electrical insulating properties or a material having a function of suppressing impurity diffusion.

For example, a material that suppresses the transmission of water vapor can be used for the insulating layer 290. Specifically, a material having a water vapor transmission rate of 10 ⁻⁵ g/(m ² ·day) or less, preferably 10 ⁻⁶ g/(m ² ·day) or less can be used for the insulating layer 290.

For example, the insulating layer 290 may be made of a material that can be formed using an atomic layer deposition (ALD) method.

However, defects such as cracks and pinholes contained in the insulating layer 290 or the insulating layer 29
The thickness unevenness of the insulating layer 2 may promote the diffusion of impurities.
By forming the insulating layer 290, defects contained in the insulating layer 290 or unevenness in the thickness of the insulating layer 290 can be reduced. In addition, the insulating layer 290 can be made dense. This makes it possible to provide an insulating layer 290 that can suppress the diffusion of impurities.

When the first substrate 210 or the second substrate 270 is separated from the other substrate, fine cracks (also called microcracks) may be formed on the edge surface. Specifically, fine cracks may be formed on the edge surface of the separated glass when a scribe is performed and stress is applied so that the stress is concentrated on the scribe. Forming the insulating layer 290 using atomic layer deposition may be able to close the fine cracks formed on the edge surface.

Furthermore, atomic layer deposition can be used to form the insulating layer 290. When atomic layer deposition is used, damage to the processed member can be reduced compared to, for example, plasma CVD or thermal CVD.

Incidentally, a film containing an inorganic compound and having a thickness of 3 nm to 200 nm, preferably 5 nm to 50 nm, can be used for the insulating layer 290 .

In particular, a film containing an inorganic compound formed with attention paid to good coverage by using an atomic layer deposition method including a step of supplying an element containing a precursor and a step of supplying an element containing a radical can be used for the insulating layer 290. This can prevent the bonding layer 205 from coming into contact with air containing impurities such as moisture.

The atomic layer deposition method is a film formation method that includes a first step of supplying a first element to the surface of a processed substrate, and a second step of supplying a second element that reacts with the first element, and deposits a reaction product of the first element and the second element on the surface of the processed substrate.

In the first step, the amount of the first element adsorbed to the surface of the processing substrate is limited based on processing conditions such as temperature. This is also referred to as the condition under which a self-limiting mechanism operates. This allows a limited amount of the reaction product of the first element and the second element to be deposited in one cycle including one first step and one second step.

For example, by alternately repeating the first step and the second step, a predetermined amount of the reaction product of the first element and the second element can be deposited on the surface of the processed substrate.

Furthermore, the method may include, after the first step, a step of discharging the first element that has been supplied in excess in the first step.

Furthermore, after the second step, there may be a step of discharging the second element that has been supplied in excess in the second step.

Specifically, in the first step, a processing substrate is placed in a reaction chamber prepared in a predetermined environment, and a first element is supplied to the reaction chamber, whereby the first element is adsorbed onto the surface of the processing substrate.

Next, the excess first element remaining in the reaction chamber is evacuated while supplying purge gas.

In the second step, a second element is supplied, whereby the first element adsorbed on the surface of the processed substrate reacts with the second element, and a reaction product is deposited on the surface of the processed substrate.

Next, the excess second element remaining in the reaction chamber is evacuated while supplying purge gas.

Thereafter, the first and second steps are repeated to deposit a predetermined amount of reaction product on the surface of the processed substrate.

The first element can be a precursor selected depending on the type of reaction product to be deposited, such as a volatile organometallic compound or a metal alkoxide.

Note that a precursor vaporized using a vaporizer (also called a vaporizer or a bubbling device) can be used for the first element.

It should be noted that a material containing multiple elements can be used for the first element, and different materials can be used for the first element in repeated first steps.

For example, various materials that react with the first component can be used for the second component, selected depending on the type of reaction product to be deposited and the first component, such as materials that participate in oxidation reactions, reduction reactions, addition reactions, decomposition reactions, or hydrolysis reactions.

It should be noted that plasma can be used as the second element. Specifically, oxygen radicals, nitrogen radicals, or the like can be used as the second element. This can increase the reaction rate with the first element. As a result, it is possible to suppress the temperature rise of the processed substrate. Alternatively, it is possible to shorten the film formation time.

<Display panel configuration example 2.>
Another structure of a display panel according to one embodiment of the present invention will be described with reference to FIG.

4A and 4B illustrate a structure of a display panel according to one embodiment of the present invention. FIG. 4A is a top view of a display panel 200C according to one embodiment of the present invention. FIG. 4B is a cross-sectional view of a display panel according to one embodiment of the present invention.
10 is a cross-sectional view taken along line -B and line CD.

FIG. 4C is a cross-sectional view illustrating the configuration of a display panel 200D that has a different configuration from the display panel 200C shown in FIG. 4B.

The display panel 200C differs from the display panel 200 shown in FIG. 2 in that the positions of the openings in the insulating layer 290 are different.
The display panel 200 is different from the display panel 200 described with reference to the accompanying drawings. Here, the different configurations will be described in detail, and the above description will be used for parts where similar configurations can be used.

The display panel 200C described in this embodiment is the above-described display panel in which the insulating layer 290 has the openings 292 and 295.
has flexibility.

The display panel 200C described in this embodiment has an opening 292 in a region where the insulating layer 290 overlaps with the wiring 211.
As a result, a novel display panel that is easy to store in a housing and has excellent reliability can be provided.

Display Panel 200C
The display panel 200C includes a terminal 219, a first base material 210, a second base material 270, and a bonding layer 20.
5, the display element 250 and the insulating layer 290.

The display panel 200C also has wiring 211.

In addition, the insulating layer 290 has an opening 292 in the area where it overlaps with the wiring 211.

Note that the insulating layer 290 may have an opening 292 in a region overlapping with a part of the region where the display element 250 is disposed. For example, the opening 292 may be in a strip shape including a line that divides the region where the display element 250 is disposed into two equal parts (see FIG. 4B ). Alternatively, the opening 292 may be in a strip shape including a line that divides the region where the display element 250 is disposed into three equal parts.

<Display panel configuration example 3.>
Another structure of a display panel according to one embodiment of the present invention will be described with reference to FIG.

5A and 5B are diagrams illustrating a structure of a display panel of one embodiment of the present invention. FIG. 5A is a top view of a display panel 200E of one embodiment of the present invention. FIG. 5B is a diagram illustrating a cross section of a display panel 200E of one embodiment of the present invention.
10 is a cross-sectional view taken along line -B and line CD.

FIG. 5C is a cross-sectional view illustrating the configuration of a display panel 200F that has a different configuration from the display panel 200E shown in FIG. 5B.

2 in that the display panel 200E has a resin layer 298. Here, the different configuration will be described in detail, and the above description will be used for parts where a similar configuration can be used.

The display panel 200E described in this embodiment is the above-described display panel including the resin layer 298. The insulating layer 290 includes a region sandwiched between the bonding layer 205 and the resin layer 298.

The display panel 200E described in this embodiment includes an insulating layer 290 sandwiched between a bonding layer 205 and a resin layer 298. This allows various stresses to be dispersed and prevents damage to the insulating layer due to stress concentration. As a result, a novel display module with excellent convenience and reliability can be provided.

Display panel 200E
The display panel 200E includes a resin layer 298, a terminal 219, a first substrate 210, a second substrate 27, and a
0, a bonding layer 205, a display element 250, and an insulating layer 290.

The display panel 200E also has wiring 211.

<<Resin layer 298>>
The display panel 200E includes a resin layer 298 that is arranged so as to have a region where the insulating layer 290 is sandwiched between the insulating layer 290 and the bonding layer 205.

For example, the resin layer 298 can be formed using the same material as that which can be used for the bonding layer 205 .

Note that this embodiment mode can be appropriately combined with other embodiment modes described in this specification.

(Embodiment 2)
In this embodiment, a structure of a display module according to one embodiment of the present invention will be described with reference to FIGS. 6 and 7. FIG.

6A and 6B illustrate a structure of a display module of one embodiment of the present invention. Fig. 6A is a top view of a display module 200M of one embodiment of the present invention. Fig. 6B is a cross-sectional view taken along the cutting lines AB and CD in Fig. 6A.

FIG. 6C is a cross-sectional view illustrating the configuration of a display module 200MB that has a different configuration from the display module 200M shown in FIG. 6B.

<Display module configuration example 1.>
The display module 200M described in this embodiment includes a terminal 219, a first base material 210 supporting the terminal 219, a second base material 270 having an area overlapping the first base material 210, and
A bonding layer 205 that bonds the first substrate 210 and the second substrate 270 together, and a bonding layer 205 that bonds the first substrate 210 and the second substrate 270 together.
and a display element 250 electrically connected to a terminal 219 between the second substrate 270 and the terminal 219.
and an insulating layer 290 in contact with the first base material 210 , the second base material 270 and the bonding layer 205 .

The display module 200M described in this embodiment is configured to include a first substrate 210 supporting terminals 219, a second substrate 270 overlapping the first substrate 210, an insulating layer 290 in contact with a bonding layer 205 bonding the first substrate 210 and the second substrate 270 together, and a flexible printed circuit board 221 electrically connected to the terminals 219.
It is possible to suppress the diffusion of impurities into the region surrounded by 90. As a result, it is possible to provide a novel display module that is excellent in convenience and reliability.

The display module 200M also has wiring 211 that is electrically connected to the terminal 219 and the display element 250 .

The display module 200M described with reference to FIG. 6B includes a display element 250
Between the bonding layer 205 and the second base material 270, there is a region containing a material different from that of the bonding layer 205. For example, there is a region containing a gas.

On the other hand, the display module 200MB, which will be described with reference to FIG. 6C, includes a display element 25
6B in that a bonding layer 205 is provided between the first base 200 and the second base 270.

2 in that the display module 200M has a flexible printed circuit board 221 and an anisotropic conductive film 222. Here, the different configuration will be described in detail, and the above description will be used for parts where a similar configuration can be used.

<<Flexible Printed Circuit Board 221>>
The flexible printed circuit board 221 has wiring electrically connected to the terminals 219, a base material supporting the wiring, and a covering layer having an area overlapping the wiring. The wiring has an area sandwiched between the base material and the covering layer and an area not overlapping the covering layer.

The area of the wiring that does not overlap with the covering layer can be used as a terminal of the flexible printed circuit board 221 .

A conductive material can be used for the wiring of the flexible printed circuit board 221 .
For example, the material that can be used for the wiring 211 etc. can be used for the wiring of the flexible printed circuit board 221. Specifically, copper etc. can be used.

A material that has an insulating region in the region that contacts the wiring of the flexible printed circuit board 221 can be used as the base material of the flexible printed circuit board 221.

For example, organic materials such as resins, resin films, or plastics can be used as the substrate. Specifically, resin layers, resin films, or resin plates made of polyester, polyolefin, polyamide, polyimide, polycarbonate, or acrylic resin can be used as the substrate. The glass transition temperature is 150° C. or higher, preferably 200° C. or higher, and more preferably 200° C. or higher.
A stretched film at 50° C. or higher can be used as the substrate.

The anisotropic conductive film 222 can be used as a material that electrically connects the flexible printed circuit board 221 and the terminal 219. For example, a material containing conductive particles, resin, or the like can be used for the anisotropic conductive film 222. This allows the terminal of the flexible printed circuit board 221 and the terminal 219 to be electrically connected using the conductive particles, or the like.

<Display module configuration example 2.>
Another structure of the display module of one embodiment of the present invention will be described with reference to FIG.

7A and 7B illustrate a structure of a display module of one embodiment of the present invention. FIG. 7A is a top view of a display module 200MC of one embodiment of the present invention. FIG. 7B is a top view of a display module 200MC of one embodiment of the present invention.
1 is a cross-sectional view taken along the cutting lines AB and CD.

FIG. 7C is a cross-sectional view illustrating the configuration of a display module 200MD having a different configuration from the display module 200MC shown in FIG. 7B.

The display module 200MC differs from the display module 200M described with reference to Fig. 6 in that it has a resin layer 298. Here, the different configuration will be described in detail, and the above description will be used for parts where a similar configuration can be used.

The display module 200MC described in this embodiment is the above-described display module including the resin layer 298. The insulating layer 290 includes a region sandwiched between the bonding layer 205 and the resin layer 298.

The display module 200MC described in this embodiment includes an insulating layer 290 sandwiched between a bonding layer 205 and a resin layer 298. This allows various stresses to be dispersed,
This prevents the insulating layer from being damaged due to stress concentration, thereby providing a novel display module that is highly convenient and reliable.

Display Module 200MC
The display module 200MC includes a resin layer 298 , a terminal 219 , a first base material 210 , a second base material 270 , a bonding layer 205 , a display element 250 , a flexible printed circuit board 221 , or an insulating layer 290 .

The display module 200MC also has wiring 211.

<<Resin layer 298>>
The resin layer 29 is arranged so that the insulating layer 290 has a region sandwiched between the insulating layer 290 and the bonding layer 205.
8.

For example, the resin layer 298 can be formed using the same material as that which can be used for the bonding layer 205 .

Note that this embodiment mode can be appropriately combined with other embodiment modes described in this specification.

(Embodiment 3)
In this embodiment, a method for manufacturing a display panel according to one embodiment of the present invention will be described with reference to FIGS.
This will be explained with reference to 1.

Figure 8 is a flow diagram illustrating a method for manufacturing a display panel according to one embodiment of the present invention.

9A to 9C are cross-sectional views illustrating a method for manufacturing a display panel according to one embodiment of the present invention.

<Display Panel Manufacturing Method Example 1>
A manufacturing method of a display panel described in this embodiment mode includes the following three steps (see FIG. 8).

First Step
In the first step, a terminal 219, a first substrate 210 supporting the terminal 219, a second substrate 270 having an area overlapping the first substrate 210, and a bonding area between the first substrate 210 and the second substrate 27 are formed.
The terminal 2 is provided between the bonding layer 205 and the first substrate 210 and the second substrate 270.
A processed member having a display element 250 electrically connected to 19 is prepared, and a mask 223 is formed in an area overlapping the area where the display element 250 is arranged so as to contact each of the first substrate 210 and the second substrate 270 (see Figure 8 (S1) and Figure 9 (A)).

In the first step, a mask 224 may be formed in the area overlapping the terminal 219 .

Second Step
In the second step, the first substrate 210 and the second substrate 270 are deposited by atomic layer deposition.
An insulating layer 290 is formed in contact with the bonding layer 205 and the terminal 219 (see FIG. 8(S2)).
.

If the mask 224 covers the entire surface where the terminals 219 are exposed, the insulating layer 290 is not formed on the terminals 219 in the second step.

However, defects such as cracks and pinholes contained in the insulating layer 290 or the insulating layer 29
The thickness unevenness of the insulating layer 2 may promote the diffusion of impurities.
By forming the insulating layer 290, defects contained in the insulating layer 290 or unevenness in the thickness of the insulating layer 290 can be reduced. In addition, the insulating layer 290 can be made dense. This makes it possible to provide an insulating layer 290 that can suppress the diffusion of impurities.

When the first substrate 210 or the second substrate 270 is separated from another substrate, microcracks (microcracks 225) may be formed on the edge surface. Specifically, microcracks may be formed on the edge surface of glass obtained by a method of scribing (also called scribing) and then applying stress so that the stress is concentrated on the scribing to separate (also called breaking). When the insulating layer 290 is formed by atomic layer deposition, the microcracks formed on the edge surface may be sealed (see FIG. 9B).

For example, the insulating layer 290 can be formed by atomic layer deposition using the film forming apparatus 190 described in the fourth embodiment.

<<Third Step>>
In the third step, a part of the insulating layer 290 is removed together with the mask 223, and the insulating layer 2
An opening 291 is formed in the area where the display element 250 of the substrate 90 overlaps (FIG. 8 (S3) and FIG. 9
(See (B)).

If the mask 224 overlaps the terminal 219 , a part of the insulating layer 290 is removed together with the mask 224 in the third step, and an opening 295 is formed in the region of the insulating layer 290 that overlaps the terminal 219 .

The manufacturing method of the display panel described in this embodiment includes a first step of forming a mask 223 in a region overlapping with the display element 250, a second step of forming an insulating layer 290 by atomic layer deposition, and a third step of forming an opening 291 in the region of the insulating layer 290 overlapping with the display element 250. This makes it possible to form an insulating layer having an opening in the region overlapping with the display element. As a result, a novel manufacturing method of a display panel with excellent reliability can be provided.

<Modification of the method for manufacturing the display panel>
The method for manufacturing a display panel described in this embodiment mode includes a fourth step in addition to the above steps.

The Fourth Step
In the fourth step, the region sandwiched between the bonding layer 205 and the resin layer 298 is formed as the insulating layer 2
A resin layer 298 is formed so as to be formed in 90 (see FIG. 9C).

<Display Panel Manufacturing Method Example 2>
Another example of a method for manufacturing a display panel of one embodiment of the present invention will be described with reference to FIGS.

10A and 10B are cross-sectional views illustrating a method for manufacturing a display panel according to one embodiment of the present invention.

9 in that the region in which the mask 223 is formed is different. Here, the differences will be described in detail, and the above description will be used for parts to which the same manufacturing method can be applied.

First Step
In the first step, a terminal 219, a first substrate 210 supporting the terminal 219, a second substrate 270 having an area overlapping the first substrate 210, and a bonding area between the first substrate 210 and the second substrate 27 are formed.
The terminal 2 is provided between the bonding layer 205 and the first substrate 210 and the second substrate 270.
A processed member having a display element 250 electrically connected to the wiring 211 is prepared, and a mask 223 is formed in the area overlapping the wiring 211 so as to contact the first substrate 210 and the second substrate 270.
(See FIG. 8(S1) and FIG. 10(A)).

In the first step, the mask 223 may be formed in a region overlapping with a part of the region where the display element 250 is disposed. For example, the mask 223 may be formed in a band shape including a line that divides the region where the display element 250 is disposed into two equal parts (see FIG. 10A). Alternatively, for example, the mask 223 may be formed in a band shape including a line that divides the region where the display element 250 is disposed into three equal parts.

The cross-sectional shape of the mask 223 is not limited to a rectangle. By using a mask 223 in which the angle formed by the side surface of the mask 223 and the surface of the other film is 90° or more in the cross section of the portion where the end of the mask 223 contacts the other film (here, the first base material and the second base material), the insulating layer 29
The end portion of the mask 223 can be tapered forward, which can improve the adhesion of the insulating layer 290. For example, the cross-sectional shape of the mask 223 may be circular or elliptical (see FIGS. 11A and 11B).

Note that this embodiment mode can be appropriately combined with other embodiment modes described in this specification.

(Fourth embodiment)
In this embodiment, a film formation apparatus that can be used for manufacturing a display module of one embodiment of the present invention will be described with reference to FIGS.

FIG. 12 illustrates a deposition apparatus 190 that can be used to manufacture a display module of one embodiment of the present invention.
FIG.

FIG. 13A is a perspective view of a processed member 10 that can be used to manufacture a display module of one embodiment of the present invention.

FIG. 13B illustrates a state in which the processed member 10 that can be used to manufacture a display module of one embodiment of the present invention is supported by a support 186. FIG.

<Configuration example of film forming apparatus 190>
The film forming apparatus 190 described in this embodiment includes a film forming chamber 180 and a control unit 182 connected to the film forming chamber 180 .

The control unit 182 includes a control device (not shown) that supplies a control signal, and flow rate controllers 182a, 182b, and 182c that receive the control signal. For example, high-speed valves can be used as the flow rate controllers. Specifically, the use of ALD valves or the like allows for precise flow rate control. The control unit 182 also includes a heating mechanism 182h that controls the temperature of the flow rate controllers and piping.

The flow rate controller 182a is supplied with a control signal, the first source material, and the inert gas, and has a function of supplying the first source material or the inert gas based on the control signal.

The flow rate controller 182b is supplied with a control signal, the second source material, and the inert gas, and has a function of supplying the second source material or the inert gas based on the control signal.

The flow rate controller 182c is supplied with a control signal and has a function of connecting to the exhaust device 185 based on the control signal.

《Raw material supply department》
The raw material supply unit 181a has a function of supplying the first raw material, and is connected to a flow rate controller 182a.

The raw material supply unit 181b has a function of supplying the second raw material, and is connected to the flow rate controller 182b.

A vaporizer or a heating means can be used in the raw material supply unit, which allows a gaseous raw material to be produced from a solid raw material or a liquid raw material.

Note that the number of raw material supply units is not limited to two, and it is possible to have three or more raw material supply units.

《Raw materials》
A variety of materials can be used for the first feedstock.

For example, a volatile organometallic compound, a metal alkoxide, or the like can be used as the first source material.

The second raw material can be any material that reacts with the first raw material. For example,
The second raw material can be a material that contributes to an oxidation reaction, a material that contributes to a reduction reaction, a material that contributes to an addition reaction, a material that contributes to a decomposition reaction, or a material that contributes to a hydrolysis reaction.

Furthermore, a material containing radicals can be used as the second source material. For example, a material can be supplied to a plasma source, and the material in a plasma state can be used as the second source material. Specifically, oxygen radicals, nitrogen radicals, etc. can be used as the second source material.

The second raw material is preferably a material that reacts with the first raw material at a temperature close to room temperature, for example, a material whose reaction temperature is from room temperature to 200°C, preferably from 50°C to 150°C.

Exhaust System 185
The exhaust device 185 has an exhaust function and is connected to the flow rate controller 182c.
A trap may be included between outlet 184 and flow controller 182c to capture the material being discharged.

<<Control Unit 182>>
The control device supplies a control signal for controlling a flow rate controller or a control signal for controlling a heating mechanism. For example, in a first step, a first raw material is supplied to the surface of the processing substrate. Then, in a second step, a second raw material that reacts with the first raw material is supplied. This causes the first raw material to react with the second raw material, and a reaction product can be deposited on the surface of the processing member 10.

The amount of reaction product deposited on the surface of the processed member 10 can be controlled by repeating the first and second steps.

The amount of the first raw material supplied to the processed member 10 is limited by the amount that can be adsorbed by the surface of the processed member 10. For example, by selecting conditions under which a monolayer of the first raw material is formed on the surface of the processed member 10 and then reacting the formed monolayer of the first raw material with the second raw material, it is possible to form a layer containing an extremely uniform reaction product of the first raw material and the second raw material.

As a result, it is possible to form films of various materials on the surface of the processed member 10 having a complex structure on the surface.
It can be formed to 0.

For example, if a small hole called a pinhole is formed on the surface of the processed member 10, the film forming material can be formed into the inside of the pinhole to fill the pinhole.

Furthermore, excess first or second source material is exhausted from the film formation chamber 180 using the exhaust device 185. For example, exhaust may be performed while introducing an inert gas such as argon or nitrogen.

《Film forming chamber 180》
The film formation chamber 180 includes an inlet 183 through which the first source material, the second source material, and the inert gas are supplied, and an outlet 184 through which the first source material, the second source material, and the inert gas are discharged.

The film forming chamber 180 includes a support 186 that supports one or more processed members 10.
a heating mechanism 187 having the function of heating the processed member; and a door 188 having the function of opening and closing the area for carrying in and out the processed member 10.

For example, a resistance heater or an infrared lamp can be used as the heating mechanism 187.

The heating mechanism 187 has a function of heating to, for example, 80° C. or higher, 100° C. or higher, or 150° C. or higher.

The heating mechanism 187 is, for example, at a temperature between room temperature and 200° C., preferably between 50° C. and 15° C.
The processed workpiece 10 is heated to a temperature of 0° C. or less.

The deposition chamber 180 also has a pressure regulator and a pressure detector.

《Support 186》
The support 186 supports the workpiece 10 .

For example, six workpieces 10 are supported by seven supports 186 as shown in FIG.
2 and FIG. 13(B).

For example, the outer shape of the support 186 is larger than the area where the display element 250 is arranged and smaller than the processed member 10 .

Materials that can be used for the support 186 include plastic, metal, alloy, paper, glass, etc. Furthermore, by using a material with weak adhesiveness on the surface (for example, a slightly adhesive sheet, a silicone sheet, a rubber sheet, etc.), the support 186 can be arranged on the processed member 10 without any gaps.

One processed member 10 supported by one support 186 can be placed on another support 186, and the other support 186 can be used to support the other processed member 10. By alternately stacking the supports 186 and the processed members 10 in this manner, a plurality of processed members can be prepared in the film formation chamber 180.

A support 186 smaller than the outer shape of the processed member 10 is used, and the processed member 10 is placed so that its end protrudes outside the support 186. This allows the raw material to be supplied uniformly to the end and side of the processed member 10 (see FIG. 13(B)).

In addition, the end of the processed member 10 is disposed away from the wall surface of the film formation chamber 180. For example, the distance from the end of the processed member 10 to the wall surface of the film formation chamber 180 is set to be greater than the distance between one processed member 10 and another processed member 10. This allows the raw material to be supplied uniformly.

The supports 186 may be configured to be individually positionable, or may include beams connecting a plurality of supports 186 together.

Incidentally, the mask 186a may be placed at a position overlapping the terminal 219.
The masks 186a may be configured to be individually positionable, or may be configured to be connected to one support 186. Examples of materials used for the masks 186a include the same materials as those used for the support 186.

13C, a support 186B having a circular or elliptical cross section may be used instead of the support 186. Materials used for the support 186B include plastic, metal, alloy, and glass.

As shown in Figures 26 and 27, a separate film 196 may be used instead of the support 186. The separate film 196 is disposed above and below the processed member 10. The separate film 196 has the function of protecting the surface of the processed member 10. The separate film 196 may match the outer shape of the processed member 10. Alternatively, the separate film 196 may be processed to be smaller than the outer shape of the processed member 10 so that the end of the processed member 10 protrudes outside the separate film 196 (see Figure 26(A)). The processed member 10 shown in Figure 26(A) includes a first base material 210, a second base material 270, a bonding layer 205, wiring 211 including terminals, a display element 250, and the separate film 196.
and a colored layer 845. By stacking a plurality of processed members 10 to form an insulating layer 290 (see FIG. 26B), and then removing the separate film 196, the insulating layer 290 can be formed in the region in contact with the first base material 210, the second base material 270, and the bonding layer 205, as shown in FIG. 26C. In addition, the separate film 196 and the processed members 10 are formed in the region in contact with the opening 1.
99, the support 186 may be provided at a position overlapping the uppermost and lowermost separate films 196 of the multiple layered processed members 10 (see FIG. 27A).
27(A), the support 186 is provided, and then the insulating layer 290 is formed. The support 186 is removed (see FIG. 27(B)). The separate film 196 is removed, and the insulating layer 290 is formed as shown in FIG. 27(C).
26(B), 27(A), and 27(B), the first base material 210 and the second base material 270 are partially omitted.

<Example of membrane>
A film that can be formed using the film formation apparatus 190 described in this embodiment will be described.

For example, films comprising oxides, nitrides, fluorides, sulfides, ternary compounds, metals, or polymers can be formed.

For example, materials containing aluminum oxide, hafnium oxide, aluminum silicate, hafnium silicate, lanthanum oxide, silicon oxide, strontium titanate, tantalum oxide, titanium oxide, zinc oxide, niobium oxide, zirconium oxide, tin oxide, yttrium oxide, cerium oxide, scandium oxide, erbium oxide, vanadium oxide, or indium oxide can be used.

For example, aluminum nitride, hafnium nitride, silicon nitride, tantalum nitride, titanium nitride,
Materials including niobium nitride, molybdenum nitride, zirconium nitride, or gallium nitride can be used.

For example, materials containing copper, platinum, ruthenium, tungsten, iridium, palladium, iron, cobalt, nickel, or the like can be used.

For example, materials containing zinc sulfide, strontium sulfide, calcium sulfide, lead sulfide, calcium fluoride, strontium fluoride, zinc fluoride, or the like can be used.

For example, materials including nitrides containing titanium and aluminum, oxides containing titanium and aluminum, oxides containing aluminum and zinc, sulfides containing manganese and zinc, sulfides containing cerium and strontium, oxides containing erbium and aluminum, oxides containing yttrium and zirconium, etc. can be used.

<Film containing aluminum oxide>
For example, a gas obtained by vaporizing a material containing an aluminum precursor compound can be used as the first source material. Specifically, trimethylaluminum (TMA, chemical formula: Al(CH ₃ ) ₃
), tris(dimethylamido)aluminum, triisobutylaluminum, aluminum tris(2,2,6,6-tetramethyl-3,5-heptanedionate), or the like can be used.

Water vapor (chemical formula: H ₂ O) can be used as the second source material.

Using the film forming apparatus 190, a film containing aluminum oxide can be formed from the first and second raw materials.

<<Film containing hafnium oxide>>
For example, a gas obtained by vaporizing a material containing a hafnium precursor compound can be used as the first source material. Specifically, tetrakisdimethylamidohafnium (TDMAH, chemical formula: H
Materials including hafnium amides such as f[N(CH ₃ ) ₂ ] ₄ or tetrakis(ethylmethylamido)hafnium can be used.

Ozone can be used as the second raw material.

<Film containing tungsten>
For example, _WF6 gas can be used as the first source material.

B ₂ H ₆ gas or SiH ₄ gas can be used as the second source material.

Note that this embodiment mode can be appropriately combined with other embodiment modes described in this specification.

Fifth Embodiment
In this embodiment, a structural example of a transistor that can be applied to a pixel of a display module described later will be described with reference to the drawings.

<Transistor configuration example>
FIG. 14A is a schematic top view of a transistor 100 described below.
14B is a schematic cross-sectional view of the transistor 100 taken along the line AB in FIG. 14A. The transistor 100 illustrated in FIGS. 14A and 14B is a bottom-gate transistor.

The transistor 100 includes a gate electrode 102 provided over a substrate 101, an insulating layer 103 provided over the substrate 101 and the gate electrode 102, and a gate electrode 102 formed over the insulating layer 103.
The insulating layer 103 and the oxide semiconductor layer 104 are provided so as to overlap with each other, and a pair of electrodes 105 a and 105 b are in contact with the top surface of the oxide semiconductor layer 104.
4. An insulating layer 106 covering the pair of electrodes 105a and 105b, and an insulating layer 10 on the insulating layer 106.
7 is provided.

"substrate"
Although there are no significant limitations on the material of the substrate 101, a material that is at least heat-resistant enough to withstand subsequent heat treatments should be used. For example, a glass substrate, a ceramic substrate, a quartz substrate, a sapphire substrate, a YSZ (yttria-stabilized zirconia) substrate, or the like may be used as the substrate 101. It is also possible to use a single-crystal semiconductor substrate made of silicon or silicon carbide, a polycrystalline semiconductor substrate, a compound semiconductor substrate made of silicon germanium, an SOI substrate, or the like. Furthermore, any of these substrates on which semiconductor elements are provided may also be used as the substrate 101.

Alternatively, a flexible substrate such as plastic may be used as the substrate 101, and the transistor 100 may be formed directly on the flexible substrate. Alternatively, a peeling layer may be provided between the substrate 101 and the transistor 100. The peeling layer can be used to separate a part or all of the transistor from the substrate 101 after it has been formed thereon, and transfer the transistor 100 to another substrate. As a result, the transistor 100 can be transferred to a substrate with poor heat resistance or a flexible substrate.

Gate electrode
The gate electrode 102 can be formed using a metal selected from aluminum, chromium, copper, tantalum, titanium, molybdenum, and tungsten, or an alloy containing any of the above metals, or an alloy combining the above metals. Alternatively, a metal selected from one or more of manganese and zirconium may be used. The gate electrode 102 may have a single-layer structure or a stacked structure of two or more layers. For example, a single-layer structure of an aluminum film containing silicon, a two-layer structure in which a titanium film is stacked on an aluminum film, a two-layer structure in which a titanium film is stacked on a titanium nitride film, a two-layer structure in which a tungsten film is stacked on a titanium nitride film, a two-layer structure in which a tungsten film is stacked on a tantalum nitride film or a tungsten nitride film, a titanium film,
A three-layer structure may be used in which an aluminum film is stacked on the titanium film, and another titanium film is formed on that.Also, an alloy film or a nitride film may be used in which aluminum is combined with one or more elements selected from titanium, tantalum, tungsten, molybdenum, chromium, neodymium, and scandium.

Alternatively, the gate electrode 102 may be formed using a light-transmitting conductive material such as indium tin oxide, indium oxide containing tungsten oxide, indium zinc oxide containing tungsten oxide, indium oxide containing titanium oxide, indium tin oxide containing titanium oxide, indium zinc oxide, or indium tin oxide to which silicon oxide is added. Alternatively, the gate electrode 102 may have a stacked structure of the above light-transmitting conductive material and the above metal.

Between the gate electrode 102 and the insulating layer 103, an In—Ga—Zn-based oxynitride semiconductor film, an In—Sn-based oxynitride semiconductor film, an In—Ga-based oxynitride semiconductor film, an In—Zn-based oxynitride semiconductor film, an Sn-based oxynitride semiconductor film, an In-based oxynitride semiconductor film, a metal nitride film (InN
ZnN, etc.) may be provided. These films have a work function of 5 eV or more, preferably 5.5 eV or more, and can shift the threshold voltage of the transistor to the positive side, thereby realizing a switching element with so-called normally-off characteristics. For example, when an In—Ga—Zn-based oxynitride semiconductor film is used, the nitrogen concentration is at least higher than that of the oxide semiconductor layer 104, specifically, an In—Ga—Zn-based oxynitride semiconductor film with a nitrogen concentration of 7 atomic % or more is used.

Insulating layer
The insulating layer 103 functions as a gate insulating film. The insulating layer 103 in contact with the lower surface of the oxide semiconductor layer 104 is preferably an oxide insulating film.

The insulating layer 103 may be formed using, for example, silicon oxide, silicon oxynitride, silicon nitride oxide, silicon nitride, aluminum oxide, hafnium oxide, gallium oxide, or a Ga—Zn-based metal oxide, and is provided as a stacked layer or a single layer.

Furthermore, by using a high-k material such as hafnium silicate (HfSiO _x ), nitrogen-added hafnium silicate (HfSi _x O _y N _z ), nitrogen-added hafnium aluminate (HfAl _x O _y N _z ), hafnium oxide, or yttrium oxide for the insulating layer 103, gate leakage of the transistor can be reduced.

A pair of electrodes
The pair of electrodes 105a and 105b function as source and drain electrodes of the transistor.

The pair of electrodes 105a and 105b are made of a conductive material such as aluminum, titanium, chromium,
Metals such as nickel, copper, yttrium, zirconium, molybdenum, silver, tantalum, or tungsten, or alloys containing these as the main component, can be used as a single layer structure or a laminated structure. For example, a single layer structure of an aluminum film containing silicon, a two-layer structure in which a titanium film is laminated on an aluminum film, a two-layer structure in which a titanium film is laminated on a tungsten film, a copper-
Examples of such a structure include a two-layer structure in which a copper film is laminated on a magnesium-aluminum alloy film, a three-layer structure in which a titanium film or titanium nitride film is laminated on the titanium film or titanium nitride film, an aluminum film or copper film is laminated on the titanium film or titanium nitride film, and a titanium film or titanium nitride film is further formed on that, and a three-layer structure in which a molybdenum film or molybdenum nitride film is laminated on the molybdenum film or molybdenum nitride film, an aluminum film or copper film is laminated on the molybdenum film or molybdenum nitride film, and a molybdenum film or molybdenum nitride film is further formed on that. Note that a transparent conductive material containing indium oxide, tin oxide, or zinc oxide may also be used.

Insulating layer
The insulating layer 106 is preferably formed using an oxide insulating film containing more oxygen than the stoichiometric composition. When an oxide insulating film containing more oxygen than the stoichiometric composition is heated, some oxygen is released. The oxide insulating film containing more oxygen than the stoichiometric composition is analyzed by thermal desorption spectroscopy (TDS).
In the ion spectroscopy analysis, the amount of oxygen released in terms of oxygen atoms was 1
0×10 ¹⁸ atoms/cm ³ or more, preferably 3.0×10 ²⁰ atoms/cm
The ^oxide insulating film has a surface temperature of 100° C. or higher and 700° C. or lower, or 100° C. or higher and 500° C. or lower, during the TDS analysis.

Silicon oxide, silicon oxynitride, etc. can be used for the insulating layer 106.

The insulating layer 106 is formed by insulating the oxide semiconductor layer 1 when the insulating layer 107 is formed later.
It also functions as a damage mitigating film for 04.

Further, an oxide film that transmits oxygen may be provided between the insulating layer 106 and the oxide semiconductor layer 104 .

The oxygen-permeable oxide film can be made of silicon oxide, silicon oxynitride, etc. In this specification, a silicon oxynitride film refers to a film whose composition contains more oxygen than nitrogen, and a silicon nitride oxide film refers to a film whose composition contains more nitrogen than oxygen.

The insulating layer 107 can be an insulating film having a blocking effect against oxygen, hydrogen, water, and the like. By providing the insulating layer 107 over the insulating layer 106, it is possible to prevent oxygen from diffusing from the oxide semiconductor layer 104 to the outside and prevent hydrogen, water, and the like from entering the oxide semiconductor layer 104 from the outside. Examples of insulating films having a blocking effect against oxygen, hydrogen, water, and the like include silicon nitride,
Examples of the oxide include silicon nitride oxide, aluminum oxide, aluminum oxynitride, gallium oxide, gallium oxynitride, yttrium oxide, yttrium oxynitride, hafnium oxide, and hafnium oxynitride.

<Example of a method for manufacturing a transistor>
Next, an example of a method for manufacturing the transistor 100 illustrated in FIGS.

First, as shown in FIG. 15A, a gate electrode 102 is formed on a substrate 101, and an insulating layer 103 is formed on the gate electrode 102.

Here, a glass substrate is used as the substrate 101.

<<Formation of gate electrode>>
The gate electrode 102 is formed by the following methods. First, a sputtering method, a CVD method,
A conductive film is formed by evaporation or the like, and a resist mask is formed over the conductive film by a photolithography process using a first photomask. Next, part of the conductive film is etched using the resist mask to form the gate electrode 102. After that, the resist mask is removed.

The gate electrode 102 may be formed by electrolytic plating, printing, ink jet printing, or the like instead of the above-mentioned formation method.

<<Formation of gate insulating layer>>
The insulating layer 103 is formed by a sputtering method, a PECVD method, a vapor deposition method, or the like.

When a silicon oxide film, a silicon oxynitride film, or a silicon nitride oxide film is formed as the insulating layer 103, a deposition gas containing silicon and an oxidizing gas are preferably used as a source gas. Typical examples of deposition gases containing silicon include silane, disilane, trisilane, and silane fluoride. Examples of oxidizing gases include oxygen, ozone, nitrous oxide, and nitrogen dioxide.

When a silicon nitride film is formed as the insulating layer 103, a two-stage formation method is preferably used. First, a first silicon nitride film with few defects is formed by a plasma CVD method using a mixed gas of silane, nitrogen, and ammonia as a source gas. Next,
The source gas is switched to a mixed gas of silane and nitrogen to form a second silicon nitride film having a low hydrogen concentration and capable of blocking hydrogen. By this formation method, a silicon nitride film having few defects and having hydrogen blocking properties can be formed as the insulating layer 103.

When a gallium oxide film is formed as the insulating layer 103, MOCVD (Metal
The organic chemical vapor deposition method can be used.

<<Formation of oxide semiconductor layer>>
Next, as shown in FIG. 15B, an oxide semiconductor layer 104 is formed over the insulating layer 103.

A method for forming the oxide semiconductor layer 104 is described below. First, an oxide semiconductor film is formed. Then, a resist mask is formed over the oxide semiconductor film by a photolithography process using a second photomask. Next, part of the oxide semiconductor film is etched using the resist mask to form the oxide semiconductor layer 104. Then, the resist mask is removed.

After this, a heat treatment may be performed. When the heat treatment is performed, it is preferably performed in an atmosphere containing oxygen. The temperature of the heat treatment is, for example, 150° C. or more and 600° C.
Preferably, the temperature is set to 200°C or higher and 500°C or lower.

<<Formation of a pair of electrodes>>
Next, as shown in FIG. 15C, a pair of electrodes 105a and 105b are formed.

The method for forming the pair of electrodes 105a and 105b is as follows. First, a conductive film is formed by sputtering, PECVD, evaporation, or the like. Next, a resist mask is formed on the conductive film by a photolithography process using a third photomask. Next, part of the conductive film is etched using the resist mask to form the pair of electrodes 105a and 105b. Then, the resist mask is removed.

Note that as shown in FIG. 15B , when the conductive film is etched, part of the upper portion of the oxide semiconductor layer 104 may be etched and thinned.
When forming the oxide semiconductor film, it is preferable to set the thickness of the oxide semiconductor film to a large value in advance.

<<Formation of insulating layer>>
Next, as shown in FIG. 15D, the oxide semiconductor layer 104 and the pair of electrodes 105a and 105b are
An insulating layer 106 is formed on the insulating layer 05b, and then an insulating layer 107 is formed on the insulating layer 106.

When a silicon oxide film or a silicon oxynitride film is formed as the insulating layer 106, a deposition gas containing silicon and an oxidizing gas are preferably used as a source gas. Typical examples of deposition gases containing silicon include silane, disilane, trisilane, and silane fluoride. Examples of oxidizing gases include oxygen, ozone, nitrous oxide, and nitrogen dioxide.

For example, a substrate placed in an evacuated processing chamber of a plasma CVD apparatus is maintained at 180°C or higher and 260°C or lower, more preferably 200°C or higher and 240°C or lower, a source gas is introduced into the processing chamber to adjust the pressure in the processing chamber to 100 Pa or higher and 250 Pa or lower, more preferably 100 Pa or higher and 200 Pa or lower, and an electrode provided in the processing chamber is supplied with a pressure of 0.17 W/ ^cm2 or higher and 0.5 W/ ^cm2 or lower, more preferably 0.25 W/ ^cm2 or higher and 0.35 W/cm2 ^.
A silicon oxide film or a silicon oxynitride film is formed under the following conditions for supplying high frequency power.

As a deposition condition, supplying high-frequency power with the above power density in a reaction chamber with the above pressure increases the decomposition efficiency of the source gas in the plasma, increases oxygen radicals, and promotes oxidation of the source gas, resulting in an oxygen content in the oxide insulating film greater than the stoichiometric ratio. However, when the substrate temperature is at the above temperature, the bonding strength between silicon and oxygen is weak, so some of the oxygen is desorbed by heating. As a result, an oxide insulating film can be formed that contains more oxygen than the oxygen required for the stoichiometric composition and from which some of the oxygen is desorbed by heating.

When an oxide insulating film is provided between the oxide semiconductor layer 104 and the insulating layer 106, the oxide insulating film serves as a protective film for the oxide semiconductor layer 104 in the step of forming the insulating layer 106. As a result, the insulating layer 106 can be formed using high-frequency power with high power density while reducing damage to the oxide semiconductor layer 104.

For example, a substrate placed in a vacuum-evacuated processing chamber of a PECVD device is heated to 180° C. or higher for 4 hours.
The temperature is kept at 200° C. or lower, more preferably 200° C. or higher and 370° C. or lower, and the pressure in the processing chamber is kept at 20 Pa or higher and 250 Pa or lower, more preferably 100 Pa or higher, by introducing a source gas into the processing chamber.
A silicon oxide film or a silicon oxynitride film can be formed as the oxide insulating film under the conditions of supplying high-frequency power to an electrode provided in the treatment chamber at a pressure of from 100 Pa to 250 Pa. Furthermore, by setting the pressure in the treatment chamber to from 100 Pa to 250 Pa, damage to the oxide semiconductor layer 104 can be reduced when the oxide insulating layer is formed.

As source gases for the oxide insulating film, a silicon-containing deposition gas and an oxidizing gas are preferably used. Typical examples of silicon-containing deposition gases include silane, disilane, trisilane, and fluorinated silane. Examples of oxidizing gases include oxygen, ozone, nitrous oxide, and nitrogen dioxide.

The insulating layer 107 can be formed by sputtering, PECVD, etc.

When a silicon nitride film or a silicon nitride oxide film is formed as the insulating layer 107, a deposition gas containing silicon, an oxidizing gas, and a gas containing nitrogen are preferably used as source gases. Typical examples of deposition gases containing silicon include silane, disilane, trisilane, and silane fluoride. Typical examples of oxidizing gases include oxygen, ozone, nitrous oxide, and nitrogen dioxide. Typical examples of nitrogen-containing gases include nitrogen and ammonia.

Through the above steps, the transistor 100 can be formed.

<Modification of Transistor>
Below, examples of the structure of a transistor that is partially different from the transistor 100 will be described.

<<Variation 1>>
16A is a schematic cross-sectional view of a transistor 110 described below as an example. The transistor 110 differs from the transistor 100 in the structure of the oxide semiconductor layer.

The oxide semiconductor layer 114 included in the transistor 110 has a stack of an oxide semiconductor layer 114a and an oxide semiconductor layer 114b.

Note that the boundary between the oxide semiconductor layer 114a and the oxide semiconductor layer 114b is sometimes unclear, and therefore is indicated by a dashed line in FIG. 16A and other drawings.

The oxide semiconductor layer 114a is typically formed of an In—Ga oxide, an In—Zn oxide, or an In—
In the oxide semiconductor layer 114a, an In-M-Zn oxide (M is Al, Ti, Ga, Y, Zr, La, Ce, Nd, or Hf) is used. When the oxide semiconductor layer 114a is an In-M-Zn oxide, the atomic ratio of In and M excluding Zn and O is preferably less than 50 atomic % for In and less than 50 atomic % for M.
is 50 atomic % or more, more preferably, In is less than 25 atomic % and M is 7
For example, the oxide semiconductor layer 114a is formed using a material whose energy gap is 2 eV or more, preferably 2.5 eV or more, more preferably 3 eV or more.

The oxide semiconductor layer 114b contains In or Ga, and is typically an In—Ga oxide.
In-Zn oxide, In-M-Zn oxide (M is Al, Ti, Ga, Y, Zr, La, C
and the energy of the bottom of the conduction band of the oxide semiconductor layer 114b is closer to the vacuum level than that of the oxide semiconductor layer 114a. Typically, the difference between the energy of the bottom of the conduction band of the oxide semiconductor layer 114b and the energy of the bottom of the conduction band of the oxide semiconductor layer 114a is 0.05 eV or more, 0.07 eV or more, 0.1 eV or more, or 0.15 eV or more and 2 eV or less, 1 eV or less,
It is preferable that the electron transport potential is 0.5 eV or less, 0.5 eV or less, or 0.4 eV or less.

When the oxide semiconductor layer 114b is an In-M-Zn oxide, the atomic ratio of In to M excluding Zn and O is preferably 25 atomic % or more and 75 atomic % or more.
More preferably, In is 34 atomic % or more and M is 66 atomic % or less.
It should be less than mic%.

For example, the oxide semiconductor layer 114a may contain In:Ga:Zn=1:1:1, In:Ga:
In-Ga- with an atomic ratio of Zn=1:1:1.2 or In:Ga:Zn=3:1:2
Zn oxide can be used as the oxide semiconductor layer 114b.
An In—Ga—Zn oxide having an atomic ratio of n=1:3:2, 1:6:4, or 1:9:6 can be used. Note that the atomic ratios of the oxide semiconductor layer 114a and the oxide semiconductor layer 114b each include a variation of ±20% from the above atomic ratio as an error.

By using an oxide having a high Ga content that functions as a stabilizer for the oxide semiconductor layer 114b provided on the upper layer, the oxide semiconductor layer 114a and the oxide semiconductor layer 11
This can suppress the release of oxygen from 4b.

Note that the present invention is not limited to these, and a suitable composition may be used depending on the semiconductor characteristics and electrical characteristics (field-effect mobility, threshold voltage, etc.) of the transistor.
It is preferable that the carrier density, impurity concentration, defect density, atomic ratio between metal elements and oxygen, interatomic distance, density, etc. of 14b be set to appropriate values.

Note that although the oxide semiconductor layer 114 has a structure in which two oxide semiconductor layers are stacked in the above example, it may have a structure in which three or more oxide semiconductor layers are stacked.

<<Variation 2>>
16B is a schematic cross-sectional view of a transistor 120 described below. The transistor 120 differs from the transistors 100 and 110 in the structure of the oxide semiconductor layer.

The oxide semiconductor layer 124 included in the transistor 120 has an oxide semiconductor layer 124a, an oxide semiconductor layer 124b, and an oxide semiconductor layer 124c stacked in this order.

The oxide semiconductor layer 124a and the oxide semiconductor layer 124b are stacked over the insulating layer 103. The oxide semiconductor layer 124c is provided in contact with the top surface of the oxide semiconductor layer 124b and the top surfaces and side surfaces of the pair of electrodes 105a and 105b.

For example, the oxide semiconductor layer 124b may be the oxide semiconductor layer 11 exemplified in the first modification.
For example, the oxide semiconductor layers 124a and 124b may have a similar structure to that of the oxide semiconductor layers 124a and 124b.
The oxide semiconductor layer 114c may have a structure similar to that of the oxide semiconductor layer 114b exemplified in the first modification.

For example, by using an oxide with a high Ga content that functions as a stabilizer for the oxide semiconductor layer 124a provided below the oxide semiconductor layer 124b and the oxide semiconductor layer 124c provided above the oxide semiconductor layer 124b, release of oxygen from the oxide semiconductor layer 124a, the oxide semiconductor layer 124b, and the oxide semiconductor layer 124c can be suppressed.

Furthermore, for example, when a channel is mainly formed in the oxide semiconductor layer 124b, the on-state current of the transistor 120 can be increased by using an oxide with a high In content for the oxide semiconductor layer 124b and providing a pair of electrodes 105a and 105b in contact with the oxide semiconductor layer 124b.

<Other configuration examples of transistors>
Below, a structural example of a top-gate transistor to which the oxide semiconductor film of one embodiment of the present invention can be applied will be described.

In the following, components having the same configuration or function as those described above will be referred to as follows:
The same reference numerals are used and duplicated explanations will be omitted.

<Configuration example>
FIG. 17A is a schematic cross-sectional view of a top-gate transistor 150 described below.

The transistor 150 includes an oxide semiconductor layer 104 provided over a substrate 101 provided with an insulating layer 151, a pair of electrodes 105 a and 105 b in contact with a top surface of the oxide semiconductor layer 104, an insulating layer 103 provided over the oxide semiconductor layer 104 and the pair of electrodes 105 a and 105 b, and a gate electrode 102 provided over the insulating layer 103 to overlap with the oxide semiconductor layer 104. In addition, an insulating layer 152 is provided to cover the insulating layer 103 and the gate electrode 102.

The insulating layer 151 has a function of suppressing diffusion of impurities from the substrate 101 to the oxide semiconductor layer 104. For example, the insulating layer 151 may have a structure similar to that of the insulating layer 107. Note that the insulating layer 151 is not necessarily provided if it is not necessary.

The insulating layer 152 can be an insulating film having a blocking effect against oxygen, hydrogen, water, and the like, similar to the insulating layer 107. Note that the insulating layer 107 does not have to be provided if it is not necessary.

<<Variation 1>>
Below, an example of the structure of a transistor that is partially different from the transistor 150 will be described.

17B is a schematic cross-sectional view of a transistor 160 described below as an example. The transistor 160 differs from the transistor 150 in the structure of the oxide semiconductor layer.

The oxide semiconductor layer 164 included in the transistor 160 has an oxide semiconductor layer 164a, an oxide semiconductor layer 164b, and an oxide semiconductor layer 164c stacked in this order.

Among the oxide semiconductor layers 164a, 164b, and 164c,
The above-described oxide semiconductor film can be applied to any one, two, or all of the layers.

For example, the oxide semiconductor layer 164b may be the oxide semiconductor layer 11 exemplified in the first modification.
For example, the oxide semiconductor layers 164a and 164b can have a structure similar to that of the oxide semiconductor layers 164a and 164b.
The oxide semiconductor layer 114c may have a structure similar to that of the oxide semiconductor layer 114b exemplified in the first modification.

Furthermore, by using an oxide with a high Ga content that functions as a stabilizer for the oxide semiconductor layer 164a provided below the oxide semiconductor layer 164b and the oxide semiconductor layer 164c provided above the oxide semiconductor layer 164b, release of oxygen from the oxide semiconductor layer 164a, the oxide semiconductor layer 164b, and the oxide semiconductor layer 164c can be suppressed.

<<Variation 2>>
Below, an example of the structure of a transistor that is partially different from the transistor 150 will be described.

17C is a schematic cross-sectional view of a transistor 170 described below. The transistor 170 is different from the transistor 150 in the shape of the pair of electrodes 105 a and 105 b in contact with the oxide semiconductor layer 104, the shape of the gate electrode 102, and the like.

The transistor 170 includes an oxide semiconductor layer 104 provided over a substrate 101 provided with an insulating layer 151, an insulating layer 103 over the oxide semiconductor layer 104, a gate electrode 102 over the insulating layer 103, an insulating layer 154 over the insulating layer 151 and the oxide semiconductor layer 104, and a gate electrode 102 over the insulating layer 103.
the insulating layer 156 over the oxide semiconductor layer 104, a pair of electrodes 105 a and 105 b electrically connected to the oxide semiconductor layer 104 through openings provided in the insulating layers 154 and 156, and an insulating layer 152 over the insulating layer 156 and the pair of electrodes 105 a and 105 b.

The insulating layer 154 is formed of, for example, an insulating film containing hydrogen. Examples of the insulating film containing hydrogen include a silicon nitride film. The hydrogen contained in the insulating layer 154 bonds with oxygen vacancies in the oxide semiconductor layer 104 to become carriers in the oxide semiconductor layer 104. Therefore, in the structure shown in FIG. 17C , regions where the oxide semiconductor layer 104 and the insulating layer 154 are in contact with each other are represented as n-type regions 104b and 104c. Note that the region sandwiched between the n-type regions 104b and 104c becomes the channel region 104a.

By providing n-type regions 104b and 104c in the oxide semiconductor layer 104, a pair of electrodes 1
The contact resistance between the n-type regions 104a and 105b can be reduced.
17C is a so-called self-aligned top-gate transistor. The self-aligned top-gate transistor structure prevents overlap between the gate electrode 102 and the pair of electrodes 105a and 105b functioning as a source electrode and a drain electrode, thereby reducing parasitic capacitance between the electrodes.

The insulating layer 156 included in the transistor 170 can be formed using, for example, a silicon oxynitride film.

This embodiment mode can be implemented in appropriate combination with other embodiment modes described in this specification.

(Embodiment 6)
In this embodiment, a structure of an oxide semiconductor that can be used for a display module of one embodiment of the present invention will be described.

An oxide semiconductor has a large energy gap of 3.0 eV or more. A transistor including an oxide semiconductor film obtained by processing an oxide semiconductor under appropriate conditions and sufficiently reducing the carrier density can have an off-state current that is significantly lower than that of a conventional transistor using silicon.

As applicable oxide semiconductors, at least indium (In) or zinc (Zn
In particular, it is preferable that the oxide semiconductor contains In and Zn. In addition to the above, gallium (Ga), tin (Sn), hafnium (Hf), zirconium (Zr), etc. can be used as a stabilizer for reducing variations in electrical characteristics of a transistor using the oxide semiconductor.
It is preferable that the material contains one or more elements selected from titanium (Ti), scandium (Sc), yttrium (Y), and lanthanides (e.g., cerium (Ce), neodymium (Nd), and gadolinium (Gd)).

Examples of oxide semiconductors include indium oxide, tin oxide, zinc oxide, In—Zn-based oxides, Sn—Zn-based oxides, Al—Zn-based oxides, Zn—Mg-based oxides, Sn—Mg-based oxides, In—Mg-based oxides, In—Ga-based oxides, and In—Ga—Zn-based oxides (IGZO
(also referred to as "In-Al-Zn oxides"), In-Sn-Zn oxides, Sn-Ga-
Zn-based oxides, Al-Ga-Zn-based oxides, Sn-Al-Zn-based oxides, In-Hf-Z
n-based oxides, In-Zr-Zn-based oxides, In-Ti-Zn-based oxides, In-Sc-Zn
In-based oxides, In-Y-Zn-based oxides, In-La-Zn-based oxides, In-Ce-Zn-based oxides, In-Pr-Zn-based oxides, In-Nd-Zn-based oxides, In-Sm-Zn-based oxides, In-Eu-Zn-based oxides, In-Gd-Zn-based oxides, In-Tb-Zn-based oxides, In-Dy-Zn-based oxides, In-Ho-Zn-based oxides, In-Er-Zn-based oxides,
In-Tm-Zn oxides, In-Yb-Zn oxides, In-Lu-Zn oxides, I
n-Sn-Ga-Zn oxide, In-Hf-Ga-Zn oxide, In-Al-Ga-
Zn-based oxides, In—Sn—Al—Zn-based oxides, In—Sn—Hf—Zn-based oxides, I
An n-Hf-Al-Zn oxide can be used.

Here, the In-Ga-Zn oxide means an oxide having In, Ga, and Zn as the main components, regardless of the ratio of In, Ga, and Zn. Also, metal elements other than In, Ga, and Zn may be contained.

Alternatively, a material expressed as _InMO3 (ZnO) _m (m>0 and m is not an integer) may be used as the oxide semiconductor. Note that M represents one or more metal elements selected from Ga, Fe, Mn, and Co, or the above-mentioned stabilizer element. Alternatively, a material expressed as _In2SnO5 ( _ZnO ) _n (n>0 and n is an integer) may be used as the oxide semiconductor.
Materials expressed as follows may also be used.

For example, In:Ga:Zn=1:1:1, In:Ga:Zn=1:3:2, In:Ga
It is preferable to use an In-Ga-Zn oxide having an atomic ratio of In:Ga:Zn=1:3:4, In:Ga:Zn=1:3:6, In:Ga:Zn=3:1:2, or In:Ga:Zn=2:1:3, or an oxide having a similar composition.

When a large amount of hydrogen is contained in an oxide semiconductor film, some of the hydrogen acts as a donor by bonding with the oxide semiconductor, generating electrons as carriers. This causes a negative shift in the threshold voltage of the transistor. Therefore, after the oxide semiconductor film is formed, it is preferable to purify the oxide semiconductor film by performing dehydration treatment (dehydrogenation treatment) to remove hydrogen or moisture from the oxide semiconductor film so that impurities are minimized.

Note that dehydration treatment (dehydrogenation treatment) of an oxide semiconductor film may simultaneously reduce oxygen from the oxide semiconductor film. Therefore, it is preferable to perform treatment of adding oxygen to the oxide semiconductor film to fill oxygen vacancies increased by the dehydration treatment (dehydrogenation treatment) of the oxide semiconductor film. In this specification and the like, supplying oxygen to an oxide semiconductor film may be referred to as oxygen-adding treatment. Alternatively, increasing the amount of oxygen contained in the oxide semiconductor film to a value higher than the stoichiometric composition may be referred to as excessive oxygen treatment.

In this manner, the oxide semiconductor film can be made into an i-type (intrinsic) oxide semiconductor film or an oxide semiconductor film that is nearly i-type or substantially i-type (intrinsic) by removing hydrogen or moisture through dehydration treatment (dehydrogenation treatment) and filling oxygen vacancies through oxygen addition treatment.
Note that the term "substantially intrinsic" means that the carrier density of the oxide semiconductor layer is less than 1×10 ¹⁷ /cm ³ , preferably less than 1×10 ¹⁵ /cm ^{3 , and further preferably less than 1×10 16 /cm 3 .}
less than 0 ¹³ /cm ³ , more preferably less than 8×10 ¹¹ /cm ³ , and even more preferably less than 1
× 10 ¹¹ /cm ³ or less, more preferably, 1 × 10 ¹⁰ /cm ³ or less, and
^-9 / ^cm3 or more.

In addition, a transistor including an i-type or substantially i-type oxide semiconductor film can have excellent off-state current characteristics. For example, when a transistor including an oxide semiconductor film has a drain current in an off state of 1×10 ⁻¹⁸ A or less at room temperature (about 25° C.),
Preferably, it is 1×10 ⁻²¹ A or less, more preferably, it is 1×10 ⁻²⁴ A or less, or 85
° C., 1×10 ⁻¹⁵ A or less, preferably 1×10 ⁻¹⁸ A or less, and more preferably 1×
The current can be 10 ⁻²¹ A or less. Note that, in the case of an n-channel transistor, a transistor is in an off state when its gate voltage is sufficiently lower than its threshold voltage. Specifically, when the gate voltage is lower than the threshold voltage by 1 V or more, 2 V or more, or 3 V or more, the transistor is in an off state.

The structure of the oxide semiconductor film is described below.

In this specification, "parallel" refers to a state in which two straight lines are arranged at an angle of -10° or more and 10° or less. Therefore, it also includes cases in which the angle is -5° or more and 5° or less. Furthermore, "substantially parallel" refers to a state in which two straight lines are arranged at an angle of -30° or more and 30° or less. Furthermore, "perpendicular" refers to a state in which two straight lines are arranged at an angle of 80° or more and 100° or less. Therefore, it also includes cases in which the angle is 85° or more and 95° or less. Furthermore, "substantially perpendicular"
refers to a state in which two straight lines are arranged at an angle of 60° or more and 120° or less.

In addition, in this specification, when the crystal is a trigonal or rhombohedral crystal, it is expressed as a hexagonal crystal system.

Oxide semiconductors are classified into single-crystal oxide semiconductors and other non-single-crystal oxide semiconductors.
Examples of the oxide semiconductor include a crystalline oxide semiconductor, a polycrystalline oxide semiconductor, a microcrystalline oxide semiconductor, and an amorphous oxide semiconductor.

From another viewpoint, oxide semiconductors are classified into amorphous oxide semiconductors and other crystalline oxide semiconductors. Crystalline oxide semiconductors include single-crystal oxide semiconductors, CAAC-
Examples of the oxide semiconductor include an OS, a polycrystalline oxide semiconductor, and a microcrystalline oxide semiconductor.

First, we will explain about CAAC-OS.
The oxide semiconductor may also be referred to as an oxide semiconductor having axis-aligned nanocrystals.

CAAC-OS is a type of oxide semiconductor having a plurality of crystal parts (also referred to as pellets) whose c-axes are aligned.

Transmission Electron Microscope (TEM)
When a composite analysis image (also referred to as a high-resolution TEM image) of a bright-field image and a diffraction pattern of a CAAC-OS is observed using a TEM (microscope), multiple pellets can be confirmed. On the other hand, the boundaries between the pellets, that is, the grain boundaries (also referred to as grain boundaries), cannot be clearly identified in the high-resolution TEM image. Therefore, it can be said that the CAAC-OS is less susceptible to a decrease in electron mobility due to the grain boundaries.

18A shows a high-resolution TEM image of a cross section of the CAAC-OS observed from a direction substantially parallel to the sample surface.
For high-resolution TEM imaging, spherical aberration correction is required.
The spherical aberration correction function was used. A high-resolution TEM image using the spherical aberration correction function is specifically called a Cs-corrected high-resolution TEM image. The Cs-corrected high-resolution TEM image can be obtained, for example, by
This can be done using an atomic resolution analytical electron microscope, such as JEM-ARM200F manufactured by JEOL Ltd.

Figure 18B shows an enlarged Cs-corrected high-resolution TEM image of region (1) in Figure 18A. Figure 18B shows that metal atoms are arranged in layers in the pellet. The arrangement of each metal atom layer is consistent with the surface on which the CAAC-OS film is formed (also referred to as the surface on which the film is formed).
Alternatively, the unevenness of the top surface is reflected, and the surface on which the CAAC-OS is formed or the top surface is parallel to the surface.

As shown in FIG. 18B, the CAAC-OS has a characteristic atomic arrangement.
18(B) and 18(C) show the characteristic atomic arrangements using auxiliary lines.
) it can be seen that the size of each pellet is about 1 nm to 3 nm, and the size of the gaps generated by the inclination between pellets is about 0.8 nm.
The pellets can also be referred to as nanocrystals (nc).

Here, based on the Cs-corrected high-resolution TEM image, the arrangement of CAAC-OS pellets 5100 on a substrate 5120 is schematically shown as a structure in which bricks or blocks are stacked (see FIG. 18D). The portion where the pellets are tilted as observed in FIG. 18C corresponds to a region 5161 shown in FIG. 18D.

FIG. 19A shows a plan view of the CAAC-OS observed from a direction substantially perpendicular to the sample surface.
19(A) shows the s-corrected high-resolution TEM images of the regions (1), (2) and (3) in FIG.
) are shown in Figures 19(B), 19(C), and 19(D), respectively. From Figures 19(B), 19(C), and 19(D), it can be seen that the metal atoms in the pellets are arranged in triangular, square, or hexagonal shapes. However, no regularity is observed in the arrangement of the metal atoms between different pellets.

Next, C analyzed by X-ray diffraction (XRD)
For example, CAAC-OS having _InGaZnO crystals will be described.
When S is subjected to a structural analysis using the out-of-plane method, a peak may appear at a diffraction angle (2θ) of around 31° as shown in FIG.
Since this is attributed to the (009) plane of the ZnO ₄ crystal, it can be confirmed that the CAAC-OS crystal has a c-axis orientation, and the c-axis faces in a direction approximately perpendicular to the surface on which the CAAC-OS is formed or the upper surface.

In the structural analysis of CAAC-OS by the out-of-plane method, 2θ is 31
In addition to the peak at around 2θ of 36°, a peak may also appear at around 2θ of 36°.
The peaks around 2θ indicate that some of the CAAC-OS contains crystals that do not have c-axis orientation. In a more preferred CAAC-OS, structural analysis by an out-of-plane method shows a peak at 2θ of around 31° and does not show a peak at 2θ of around 36°.

On the other hand, in-plane X-ray irradiation is performed on the CAAC-OS in a direction substantially perpendicular to the c-axis.
When structural analysis is performed using the NE method, a peak appears at 2θ of approximately 56°.
This is attributed to the (110) plane of the crystal of nGaZnO _4. In the case of CAAC-OS, 2θ is set to 5
2θ is fixed at around 6° and the sample is rotated around the normal vector of the sample surface as the axis (φ axis) for analysis (φ scan), no clear peak appears as shown in Figure 20(B). In contrast, in the case of a single crystal oxide semiconductor of _InGaZnO4 , 2θ is fixed at around 56° and φ
When scanned, six peaks attributable to a crystal plane equivalent to the (110) plane are observed, as shown in Figure 20(C) . Therefore, structural analysis using XRD confirms that the orientation of the a-axis and b-axis of the CAAC-OS is irregular.

Next, CAAC-OS analyzed by electron diffraction will be described.
For CAAC-OS with ZnO _crystals , a probe diameter of 300 nm was used parallel to the sample surface.
When an electron beam of InGaZnO ₄ is incident on the substrate, a diffraction pattern (also called a selected area transmission electron diffraction pattern) as shown in FIG.
The diffraction pattern of the same sample obtained by irradiating an electron beam with a probe diameter of 300 nm perpendicular to the sample surface is shown in FIG. 21B.
1(B) shows a ring-shaped diffraction pattern. Therefore, electron diffraction also reveals that the a-axis and b-axis of the pellets contained in CAAC-OS do not have any orientation. The first ring in FIG. 21(B) is thought to be due to the (010) and (100) planes of the InGaZnO ₄ crystal. The second ring in FIG. 21(B) is thought to be due to the (110) plane.

CAAC-OS is an oxide semiconductor with a low density of defect states. Examples of defects in an oxide semiconductor include defects due to impurities and oxygen vacancies.
AC-OS can also be said to be an oxide semiconductor with a low impurity concentration.
S can also be said to be an oxide semiconductor with few oxygen vacancies.

Impurities contained in an oxide semiconductor may become carrier traps or carrier generation sources. In addition, oxygen vacancies in an oxide semiconductor may become carrier traps or carrier generation sources.
By capturing hydrogen, it may become a carrier generation source.

Impurities are elements other than the main components of an oxide semiconductor, such as hydrogen, carbon, silicon, and transition metal elements. For example, elements such as silicon, which have stronger bonding strength with oxygen than metal elements constituting an oxide semiconductor, deprive the oxide semiconductor of oxygen, thereby disrupting the atomic arrangement of the oxide semiconductor and causing a decrease in crystallinity. In addition, heavy metals such as iron and nickel, argon,
Carbon dioxide and the like have a large atomic radius (or molecular radius), and therefore disrupt the atomic arrangement of the oxide semiconductor, which can cause a decrease in crystallinity.

Furthermore, an oxide semiconductor with a low density of defect states (few oxygen vacancies) can reduce the carrier density. Such an oxide semiconductor is called a highly purified intrinsic or substantially highly purified intrinsic oxide semiconductor. CAAC-OS has a low impurity concentration and a low density of defect states. That is, it is likely to become a highly purified intrinsic or substantially highly purified intrinsic oxide semiconductor. Therefore, CA
A transistor using an AC-OS rarely has electrical characteristics in which the threshold voltage is negative (also referred to as normally-on). Furthermore, a highly purified intrinsic or substantially highly purified intrinsic oxide semiconductor has few carrier traps. Charges trapped in carrier traps in the oxide semiconductor take a long time to be released and may behave as if they are fixed charges. Therefore, a transistor using an oxide semiconductor with a high impurity concentration and a high density of defect states may have unstable electrical characteristics. On the other hand, a transistor using a CAAC-OS has small fluctuations in its electrical characteristics and is highly reliable.

Furthermore, because the CAAC-OS has a low density of defect states, carriers generated by light irradiation or the like are less likely to be captured by the defect states. Therefore, in a transistor using the CAAC-OS, changes in electrical characteristics due to irradiation with visible light or ultraviolet light are small.

Next, we will explain microcrystalline oxide semiconductors.

A microcrystalline oxide semiconductor has regions where crystal parts can be confirmed and regions where crystal parts cannot be clearly confirmed in a high-resolution TEM image. The crystal parts contained in a microcrystalline oxide semiconductor often have a size of 1 nm to 100 nm, or 1 nm to 10 nm. In particular, an oxide semiconductor having nanocrystals that are microcrystals with a size of 1 nm to 10 nm, or 1 nm to 3 nm, is called nc-OS (nanocrystalline oxide semiconductor).
In nc-OS, for example, the grain boundaries may not be clearly observed in a high-resolution TEM image.
It is possible that the origin is the same as that of the pellets in C-OS.
The crystalline portion of the OS may be called a pellet.

The nc-OS has periodic atomic arrangement in a microscopic region (for example, a region of 1 nm to 10 nm, particularly a region of 1 nm to 3 nm). Furthermore, the nc-OS does not exhibit regularity in the crystal orientation between different pellets. Therefore, no orientation is observed throughout the film. Therefore, the nc-OS may be indistinguishable from an amorphous oxide semiconductor depending on the analysis method. For example, when the nc-OS is subjected to structural analysis using an XRD apparatus using X-rays with a diameter larger than that of the pellets, no peak indicating a crystal plane is detected in the analysis by the out-of-plane method. Furthermore, when the nc-OS is subjected to structural analysis using an XRD apparatus with a diameter larger than that of the pellets (
When electron diffraction (also called selected area electron diffraction) is performed using an electron beam with a diameter of, for example, 50 nm or more, a diffraction pattern resembling a halo pattern is observed. On the other hand, when nanobeam electron diffraction is performed on nc-OS using an electron beam with a probe diameter close to or smaller than the pellet size, spots are observed. Furthermore, when nanobeam electron diffraction is performed on nc-OS, a circular (ring-shaped) region of high brightness is sometimes observed. Furthermore, multiple spots are sometimes observed within the ring-shaped region.

In this way, since there is no regularity in the crystal orientation between the pellets (nanocrystals),
The OS is formed using an oxide semiconductor having random aligned nanocrystals (RANC) or non-aligned nanocrystals (NANC).
The oxide semiconductor may also be referred to as an oxide semiconductor having a ternary structure (s).

The nc-OS is an oxide semiconductor with higher ordering than an amorphous oxide semiconductor. Therefore, the nc-OS has a lower density of defect states than an amorphous oxide semiconductor.
In S, there is no regularity in the crystal orientation between different pellets.
The density of defect states is higher than that of AAC-OS.

Next, we will explain amorphous oxide semiconductors.

An amorphous oxide semiconductor is an oxide semiconductor in which the atomic arrangement in the film is disordered and there are no crystal parts, and an example is an oxide semiconductor having an amorphous state such as quartz.

In amorphous oxide semiconductors, no crystalline parts can be seen in high-resolution TEM images.

When the structure of an amorphous oxide semiconductor is analyzed using an XRD device, out-of-phase
In the analysis by the lane method, no peaks indicating crystal planes are detected. Furthermore, when electron diffraction is performed on an amorphous oxide semiconductor, a halo pattern is observed. Furthermore, when nanobeam electron diffraction is performed on an amorphous oxide semiconductor, no spots are observed, and only a halo pattern is observed.

There are various views on the amorphous structure. For example, a structure that has no order in the atomic arrangement is called a completely amorphous structure.
In addition, a structure that does not have long-range order but may have order in the range from a certain atom to the nearest neighbor atom or the second nearest neighbor atom may be called an amorphous structure. Therefore, according to the strictest definition, an oxide semiconductor that has even a slight degree of order in its atomic arrangement cannot be called an amorphous oxide semiconductor. In addition, at least
An oxide semiconductor having long-range order cannot be called an amorphous oxide semiconductor. Therefore, because they have crystalline parts, for example, CAAC-OS and nc-OS cannot be called amorphous oxide semiconductors or completely amorphous oxide semiconductors.

Note that an oxide semiconductor may have a structure between an nc-OS and an amorphous oxide semiconductor. An oxide semiconductor having such a structure is particularly referred to as an amorphous-like oxide semiconductor (a-l
ike OS: amorphous-like Oxide Semiconductor
This is called r).

In a high-resolution TEM image, voids may be observed in the a-like OS. The high-resolution TEM image also includes regions where crystalline parts can be clearly seen and regions where crystalline parts cannot be seen.

Because of the voids, the a-like OS has an unstable structure.
To demonstrate that e-OS has an unstable structure compared with CAAC-OS and nc-OS, the structural change due to electron irradiation is shown.

The samples to be irradiated with electrons were an a-like OS (referred to as sample A), an nc-OS,
A sample B and a CAAC-OS sample C were prepared. Both samples were In—Ga—Zn oxides.

First, a high-resolution cross-sectional TEM image of each sample is obtained. The high-resolution cross-sectional TEM image shows that each sample has a crystalline portion.

The determination of which part is considered to be a single crystal part can be made as follows. For example, it is known that the unit lattice of _{an InGaZnO4} crystal has a structure in which three In—O layers and six Ga—Zn—O layers are stacked in a layered manner in the c-axis direction, for a total of nine layers. The spacing between these adjacent layers is approximately the same as the lattice spacing (also known as the d value) of the (009) plane, and this value has been determined to be 0.29 nm from crystal structure analysis. Therefore, a part where the spacing of the lattice fringes is 0.28 nm or more and 0.30 nm or less can be considered to be a crystal part of _InGaZnO4 . The lattice fringes correspond to the a-b plane of the _InGaZnO4 crystal.

Figure 22 shows an example of investigating the average size of the crystalline parts (22 to 45 locations) of each sample. The length of the lattice fringes mentioned above is taken as the size of the crystalline parts.
22, the crystal part (also called initial nucleus) which was about 1.2 nm in size at the initial stage of TEM observation grew larger as the cumulative irradiation dose increased to 4.2×10 ⁸ e ⁻ /n
It can be seen that the size of the nc-O ^crystals grows to about 2.6 nm.
The cumulative electron irradiation dose from the start of electron irradiation was 4.2×10 ⁸ e ⁻
It can be seen that no change in the size of the crystal portion is observed within the range of ² nm/cm.
As shown by (2) and (3) in FIG. 22, the sizes of the crystal parts of the nc-OS and CAAC-OS are approximately 1.4 nm and 2.1 nm, respectively, regardless of the cumulative electron irradiation dose.

As described above, in the a-like OS, growth of crystal parts due to electron irradiation can be observed in some cases. On the other hand, in the nc-OS and CAAC-OS, growth of crystal parts due to electron irradiation can hardly be observed.
It can be seen that it has an unstable structure compared to the OS.

Furthermore, due to the presence of voids, the a-like OS has a structure with a lower density than the nc-OS and CAAC-OS. Specifically, the density of the a-like OS is 78.6% or more and less than 92.3% of the density of a single crystal of the same composition.
The density of C—OS is 92.3% or more and less than 100% of the density of a single crystal having the same composition. It is difficult to form an oxide semiconductor film having a density of less than 78% of the density of a single crystal.

For example, in an oxide semiconductor having an atomic ratio of In:Ga:Zn=1:1:1,
The density of single-crystal InGaZnO ₄ having a rhombohedral crystal structure is 6.357 g/cm ^3. Therefore, for example, in an oxide semiconductor that satisfies the atomic ratio of In:Ga:Zn=1:1:1, the density of an a-like OS is 5.0 g/cm ³ or more and less than 5.9 g/cm ^3. Furthermore, for example, in an oxide semiconductor that satisfies the atomic ratio of In:Ga:Zn=1:1:1, the density of an nc-OS and the density of a CAAC-OS are 5.9 g/cm ³ or more and 6.3 g/cm 3
It will be less than ³ .

In some cases, single crystals with the same composition do not exist. In such cases, the density corresponding to a single crystal with the desired composition can be estimated by combining single crystals with different compositions in any desired ratio. The density corresponding to a single crystal with the desired composition can be estimated using a weighted average of the ratio of the single crystals with different compositions combined. However, it is preferable to estimate the density by combining as few types of single crystals as possible.

As described above, oxide semiconductors have various structures, each of which has various characteristics.
Note that the oxide semiconductor may be a stacked film including two or more of an amorphous oxide semiconductor, an a-like OS, a microcrystalline oxide semiconductor, and a CAAC-OS, for example.

A CAAC-OS film can be formed, for example, by the following method.

The CAAC-OS film is formed, for example, by a sputtering method using a polycrystalline oxide semiconductor sputtering target.

By increasing the substrate temperature during film formation, migration of sputtered particles occurs after the sputtered particles reach the substrate. Specifically, film formation is performed at a substrate temperature of 100° C. or higher and 740° C. or lower, preferably 200° C. or higher and 500° C. or lower. By increasing the substrate temperature during film formation, when the sputtered particles reach the substrate, migration occurs on the substrate, and the flat surfaces of the sputtered particles adhere to the substrate. At this time, the sputtered particles are positively charged, and therefore the sputtered particles adhere to the substrate while repelling each other. This prevents the sputtered particles from unevenly overlapping, and a CAAC-OS film with a uniform thickness can be formed.

By reducing the amount of impurities mixed in during film formation, it is possible to prevent the crystal state from being destroyed by the impurities. For example, this can be achieved by reducing the concentration of impurities (such as hydrogen, water, carbon dioxide, and nitrogen) present in the film formation chamber. Alternatively, this can be achieved by reducing the concentration of impurities in the film formation gas. Specifically, a film formation gas having a dew point of −80°C or less, preferably −100°C or less, is used.

It is also preferable to increase the oxygen ratio in the deposition gas and optimize the power to reduce plasma damage during deposition. The oxygen ratio in the deposition gas is 30% by volume or more, preferably 100% by volume or more.
Expressed as volume percent.

Alternatively, a CAAC-OS film can be formed using the following method.

First, a first oxide semiconductor film is formed to a thickness of 1 nm or more and less than 10 nm by a sputtering method. Specifically, the substrate temperature is set to 100° C. or more and 500° C. or less, preferably 150° C. or more and 450° C. or less, and the proportion of oxygen in the film formation gas is set to 30.
The film is formed at a concentration of at least 100% by volume, preferably 100% by volume.

Next, heat treatment is performed to change the first oxide semiconductor film into a first CAAC-OS film with high crystallinity. The heat treatment temperature is 350° C. to 740° C., preferably 450° C. to 650° C.
°C or less. The heat treatment time is 1 minute to 24 hours, preferably 6 minutes to 4 hours. The heat treatment may be performed in an inert atmosphere or an oxidizing atmosphere. Preferably, the heat treatment is performed in an inert atmosphere and then in an oxidizing atmosphere. The heat treatment in an inert atmosphere can reduce the impurity concentration of the first oxide semiconductor film in a short time. On the other hand, the heat treatment in an inert atmosphere may cause oxygen vacancies in the first oxide semiconductor film. In this case, the heat treatment in an oxidizing atmosphere can reduce the oxygen vacancies. Note that the heat treatment may be performed under reduced pressure of 1000 Pa or less, 100 Pa or less, 10 Pa or less, or 1 Pa or less. Under reduced pressure, the impurity concentration of the first oxide semiconductor film can be reduced in an even shorter time.

The first oxide semiconductor film has a thickness of 1 nm or more and less than 10 nm.
In comparison with the case where the thickness is 0 nm or more, the film can be easily crystallized by heat treatment.

Next, a second oxide semiconductor film having the same composition as the first oxide semiconductor film is formed to a thickness of 10 nm or more and 5 nm or more.
The second oxide semiconductor film is formed by a sputtering method. Specifically, the substrate temperature is set to 100° C. or higher and 500° C. or lower, preferably 150° C. or higher and 450° C. or lower.
The film is formed at a temperature of 30% by volume or more, preferably 100% by volume, of oxygen in the film forming gas.

Next, heat treatment is performed to cause solid-phase growth of the second oxide semiconductor film from the first CAAC-OS film, thereby forming a second CAAC-OS film with high crystallinity.
The heat treatment temperature is from 0°C to 740°C, preferably from 450°C to 650°C. The heat treatment time is from 1 minute to 24 hours, preferably from 6 minutes to 4 hours.
The heat treatment may be performed in an inert atmosphere or an oxidizing atmosphere. Preferably, the heat treatment is performed in an inert atmosphere and then in an oxidizing atmosphere. The heat treatment in an inert atmosphere can reduce the impurity concentration of the second oxide semiconductor film in a short time. On the other hand, the heat treatment in an inert atmosphere may cause oxygen vacancies in the second oxide semiconductor film. In this case, the heat treatment in an oxidizing atmosphere can reduce the oxygen vacancies. Note that the heat treatment is performed for 1 hour.
The heating may be performed under reduced pressure of 000 Pa or less, 100 Pa or less, 10 Pa or less, or 1 Pa or less. Under reduced pressure, the impurity concentration of the second oxide semiconductor film can be reduced in a shorter time.

In the above manner, a CAAC-OS film with a total thickness of 10 nm or more can be formed.

A display module according to one embodiment of the present invention can be formed using an oxide semiconductor film having any of the above structures.

Note that this embodiment mode can be appropriately combined with other embodiment modes described in this specification.

Seventh Embodiment
In this embodiment, a structure of a display module according to one embodiment of the present invention will be described with reference to FIGS.

23A and 23B are diagrams illustrating a structure of a display module of one embodiment of the present invention, in which Fig. 23A is a top view of a display module of one embodiment of the present invention, and Fig. 23B is a cross-sectional view taken along the cutting line A2-B2 in Fig. 23A.

The display module shown in this embodiment is a top-emission type display module using a color filter system.
A single color can be expressed using three sub-pixels: R (red), G (green), and B (blue), or a single sub-pixel can be expressed using R, G, B, and W (blue).
A configuration in which one color is expressed by four sub-pixels of R, G, B, and Y (yellow) can be applied.
Other colors may be used, such as cyan or magenta.

The display module shown in FIG. 23A includes an insulating layer 890, a display portion 804, an operating circuit portion 80
6 and an FPC 808. The display portion 804 has an organic EL element as a light-emitting element. The operating circuit portion 806 includes, for example, a scanning line driver circuit and a signal line driver circuit.

In FIG. 23B, the display module is made up of a first base material 800 (substrate 801, adhesive layer 8
03, insulating layer 805), a plurality of transistors, a terminal 857, an insulating layer 815, an insulating layer 816
, an insulating layer 817, a plurality of light-emitting elements, an insulating layer 821, a bonding layer 822, a colored layer 845, a light-shielding layer 847, and a second base material 810 (insulating layer 815, adhesive layer 813, and substrate 811). The bonding layer 822, the insulating layer 815, the adhesive layer 813, and the substrate 811 transmit visible light.
The light emitting element and the transistor included in the operating circuit portion 804 are formed on the insulating layer 805 and the insulating layer 806.
15 and is sealed by a bonding layer 822.

The display module described in this embodiment includes a first base material 800 that supports a terminal 857,
The display module includes an insulating layer 890 that is in contact with a second substrate 810 that overlaps the first substrate 800 and a bonding layer 822 that bonds the first substrate 800 and the second substrate 810. This makes it possible to suppress the diffusion of impurities into the region surrounded by the insulating layer 890. As a result, a novel display module that is highly convenient and reliable can be provided.

As shown in FIGS. 28A and 28B, the insulating layer 890 may be formed so that the first base material 800 and the light emitting element 830 are contained in the space surrounded by the insulating layer 890.

The display portion 804 includes a transistor 820 and a light-emitting element 830 over a substrate 801 with an adhesive layer 803 and an insulating layer 805 interposed therebetween.
831, an EL layer 833 on the lower electrode 831, and an upper electrode 835 on the EL layer 833. That is, the light emitting element 830 has the lower electrode 831, the upper electrode 835, and the
31 and an upper electrode 835 sandwiching an EL layer 833 .

The lower electrode 831 is electrically connected to a source electrode or a drain electrode of the transistor 820. An end portion of the lower electrode 831 is covered with an insulating layer 821. The lower electrode 831 preferably reflects visible light. The upper electrode 835 transmits visible light.

The display portion 804 also includes a coloring layer 845 overlapping with the light-emitting element 830 and a light-shielding layer 847 overlapping with the insulating layer 821. A bonding layer 822 is filled between the light-emitting element 830 and the coloring layer 845.

The insulating layers 815 and 816 have the effect of suppressing diffusion of impurities into semiconductors that constitute transistors. For the insulating layer 817, an insulating layer having a planarization function is preferably selected in order to reduce surface irregularities caused by the transistors.

The operating circuit portion 806 includes a plurality of transistors over a substrate 801 with an adhesive layer 803 and an insulating layer 805 interposed therebetween. In FIG. 23B, the following transistors are included in the operating circuit portion 806:
One transistor is shown.

By using a highly moisture-proof film for the insulating layer 805 or 815, impurities such as water can be prevented from entering the light-emitting element 830 or the transistor 820, thereby improving the reliability of the display module. Furthermore, the display module preferably includes a substrate, because the surface of the display module can be protected from physical impact. The substrate 801 is bonded to the insulating layer 805 by an adhesive layer 803. The substrate 811 is bonded to the insulating layer 815 by an adhesive layer 813.

The terminal 857 is electrically connected to an external electrode that transmits an external signal (such as a video signal, a clock signal, a start signal, or a reset signal) or a potential to the operating circuit portion 806. Here, an example is shown in which an FPC 808 is provided as the external electrode. In order to prevent an increase in the number of steps, the terminal 857 is preferably manufactured using the same material and in the same process as the electrodes and wiring used in the display portion and the driver circuit portion. Here, an example is shown in which the terminal 857 is manufactured using the same material and in the same process as the electrodes that constitute the transistor 820.

In the display module shown in FIG. 23B, the FPC 808 is located over the insulating layer 815 .
The connector 825 is connected to the terminal 857 through an opening provided in the insulating layer 815, the bonding layer 822, the insulating layer 817, and the insulating layer 816. The connector 825 is also connected to the FPC 808. The FPC 808 and the terminal 857 are electrically connected through the connector 825.

<Examples of materials and forming methods>
Next, materials that can be used for the display module will be described. Note that the description of the configurations that have been previously described in this specification may be omitted.

The substrate can be made of a material such as glass, quartz, organic resin, metal, alloy, etc. The substrate on the side from which light from the light emitting element is extracted is made of a material that transmits the light.

In particular, it is preferable to use a flexible substrate, such as an organic resin, glass, metal, or alloy that is thick enough to be flexible.

Since organic resin has a smaller specific gravity than glass, when organic resin is used as a flexible substrate,
This is preferable because it allows the display module to be lighter than when glass is used.

It is preferable to use a highly tough material for the substrate. This allows for a display module that is highly impact resistant and less likely to break. For example, by using an organic resin substrate or a thin metal or alloy substrate, a display module that is lighter and less likely to break can be realized compared to a display module that uses a glass substrate.

Metallic and alloy materials have high thermal conductivity and can easily conduct heat throughout the substrate, which is preferable because it can suppress local temperature increases in the display module. The thickness of a substrate made of metallic or alloy materials is preferably 10 μm or more and 200 μm or less, and more preferably 20 μm or more and 50 μm or less.

The material for forming the metal substrate or alloy substrate is not particularly limited, but for example, aluminum, copper, nickel, or an alloy of a metal such as an aluminum alloy or stainless steel can be suitably used.

Furthermore, if a material with high thermal emissivity is used for the substrate, the surface temperature of the display module can be prevented from rising, and damage to the display module and a decrease in reliability can be prevented. For example, the substrate can be made of a metal substrate and a layer with high thermal emissivity (for example, a metal oxide or ceramic material can be used).
The laminated structure may be formed as follows.

Examples of flexible and light-transmitting substrates include film-like plastic substrates such as polyimide (PI), aramid, polyethylene terephthalate (PET), polyethersulfone (PES), polyethylene naphthalate (PEN), and polycarbonate (PC);
Nylon, polyetheretherketone (PEEK), polysulfone (PSF), polyetherimide (PEI), polyarylate (PAR), polybutylene terephthalate (P
Plastic substrates such as BT, silicone resin, etc. can be used. The substrate may contain fibers, for example, prepreg. The substrate is not limited to resin films, and may also be a transparent nonwoven fabric made by processing pulp into a continuous sheet,
Sheets containing artificial spider silk fibers containing a protein called fibroin, composites of these mixed with resin, laminates of nonwoven fabric made of cellulose fibers with a fiber width of 4 nm to 100 nm and a resin film, and laminates of sheets containing artificial spider silk fibers and a resin film may also be used.

The flexible substrate may be constructed by laminating a layer using the above-mentioned material with a hard coat layer (e.g., a silicon nitride layer) that protects the surface of the device from scratches, or a layer made of a material that can disperse pressure (e.g., an aramid resin layer).

The flexible substrate can also be used by stacking a plurality of layers. In particular, when a flexible substrate has a glass layer, the barrier property against water and oxygen can be improved, and a highly reliable display module can be obtained.

For example, a flexible substrate can be used in which a glass layer, an adhesive layer, and an organic resin layer are laminated from the side closer to the light emitting element. The thickness of the glass layer is 20 μm or more and 200 μm or less, preferably 25 μm or more and 100 μm or less. A glass layer with such a thickness can simultaneously achieve high barrier properties against water and oxygen and flexibility. In addition, the thickness of the organic resin layer can be 1 μm or more and 200 μm or less.
The thickness of the organic resin layer is set to 0 μm or more and 200 μm or less, preferably 20 μm or more and 50 μm or less. By providing such an organic resin layer, it is possible to suppress breakage or cracking of the glass layer and improve mechanical strength. By applying such a composite material of glass material and organic resin to the substrate, it is possible to obtain a flexible display module with extremely high reliability.

Here, we describe a method for forming a flexible display module.

For convenience, the term "element layer" refers to a configuration including pixels and driver circuits, a configuration including optical members such as color filters, a configuration including a touch sensor circuit, or a configuration including other functional members. The element layer includes, for example, display elements, and may also include wiring electrically connected to the display elements and elements such as transistors used in the pixels and circuits in addition to the display elements.

Here, a support having an insulating surface on which an element layer is formed is referred to as a substrate.

Methods for forming an element layer on a flexible substrate include forming the element layer directly on the substrate, and forming the element layer on a support substrate having a rigidity different from that of the substrate, and then peeling the element layer from the support substrate and transferring the element layer to the substrate.

When the material constituting the substrate is heat-resistant to the heat applied in the process of forming the element layer, it is preferable to form the element layer directly on the substrate, since this simplifies the process. In this case, it is preferable to form the element layer in a state where the substrate is fixed to a supporting substrate, since this facilitates transportation within and between devices.

In addition, when a method of forming an element layer on a support substrate and then transferring it to a substrate is used, a release layer and an insulating layer are first laminated on the support substrate, and the element layer is then formed on the insulating layer. Subsequently, the element layer is peeled from the support substrate and transferred to the substrate. In this case, a material that causes peeling at the interface between the support substrate and the release layer, the interface between the release layer and the insulating layer, or within the release layer may be selected as the release layer. This method allows the element layer to be formed at a temperature higher than the heat-resistant temperature of the substrate, thereby improving the reliability of the display module.

For example, it is preferable to use a layer containing a high-melting-point metal material such as tungsten and a layer containing an oxide of the metal material as a peeling layer, and to use a layer in which multiple layers of silicon nitride or silicon oxynitride are stacked on the peeling layer as an insulating layer. The use of a high-melting-point metal material allows high-temperature processing during the formation of the element layer, thereby improving reliability. For example, it is possible to further reduce impurities contained in the element layer and further improve the crystallinity of semiconductors and the like contained in the element layer.

The peeling may be performed by applying a mechanical force to peel it off, by removing the peeling layer by etching, or by dropping a liquid onto a part of the peeling interface and allowing it to penetrate the entire peeling interface.

Furthermore, if peeling is possible at the interface between the support substrate and the insulating layer, it is not necessary to provide a peel layer.
For example, glass is used as the support substrate, and an organic resin such as polyimide is used as the insulating layer. A part of the organic resin is locally heated with laser light or the like to form a peeling starting point.
Peeling may be performed at the interface between the glass and the insulating layer. Alternatively, a layer of a highly thermally conductive material such as a metal or semiconductor may be provided between the supporting substrate and the insulating layer containing an organic resin, and an electric current may be passed through the layer to heat it, thereby making it easier to peel, and then peeling may be performed. In this case, the insulating layer containing an organic resin can also be used as the substrate.

The adhesive layer may be made of various curable resins such as photocurable resins (e.g., ultraviolet curable resins), reactive curable resins, thermosetting resins, and anaerobic resins. Examples of such resins include epoxy resins,
Acrylic resin, silicone resin, phenolic resin, polyimide resin, imide resin, PVC
Examples of suitable resins include polyvinyl chloride (PVB) resin, polyvinyl butyral (PVB) resin, and ethylene vinyl acetate (EVA) resin. In particular, materials with low moisture permeability, such as epoxy resin, are preferred. Two-component resins may also be used. Adhesive sheets may also be used.

The resin may also contain a desiccant. For example, a substance that adsorbs moisture by chemical adsorption, such as an oxide of an alkaline earth metal (calcium oxide, barium oxide, etc.), may be used. Alternatively, a substance that adsorbs moisture by physical adsorption, such as zeolite or silica gel, may be used. The inclusion of a desiccant is preferable because it can prevent impurities such as moisture from entering the light-emitting element, thereby improving the reliability of the display module.

Furthermore, by mixing a filler with a high refractive index or a light scattering material into the resin, the light extraction efficiency from the light emitting element can be improved. For example, titanium oxide, barium oxide,
Zeolite, zirconium, etc. can be used.

It is preferable to use a highly moisture-proof insulating film as the insulating layers 805 and 815. Alternatively, it is preferable that the insulating layers 805 and 815 have a function of preventing impurities from diffusing into the light-emitting element.

Examples of insulating films with high moisture resistance include films containing nitrogen and silicon, such as silicon nitride films and silicon nitride oxide films, and films containing nitrogen and aluminum, such as aluminum nitride films.
A silicon oxide film, a silicon oxynitride film, an aluminum oxide film, or the like may also be used.

For example, the water vapor permeation rate of a highly moisture-proof insulating film is 1×10 ⁻⁵ [g/(m ² ·day)
] or less, preferably 1 × 10 ^-6 [g/(m ² · day)] or less, more preferably 1 × 1
0 ⁻⁷ [g/(m ² · day)] or less, more preferably 1 × 10 ⁻⁸ [g/(m ² · day
ay)] or less.

In the display module, at least the insulating layer on the light-emitting surface side of the insulating layer 805 or the insulating layer 815 needs to transmit light emitted from a light-emitting element. When the display module has the insulating layer 805 and the insulating layer 815, it is preferable that the insulating layer on the side that transmits light emitted from the light-emitting element has a higher average transmittance in a wavelength range of 400 nm to 800 nm than the other insulating layer.

The insulating layer 805 and the insulating layer 815 preferably contain oxygen, nitrogen, and silicon.
For example, the insulating layer 805 and the insulating layer 815 preferably contain silicon oxynitride. The insulating layer 805 and the insulating layer 815 preferably contain silicon nitride or silicon nitride oxide. The insulating layer 805 and the insulating layer 815 preferably contain a silicon oxynitride film and a silicon nitride film, and the silicon oxynitride film and the silicon nitride film are preferably in contact with each other. The silicon oxynitride films and the silicon nitride films are alternately stacked to increase antiphase interference in the visible region, thereby increasing the transmittance of the stack in the visible region.

The description of the insulating layer 290 in Embodiment 1 can be referred to for the material and formation method of the insulating layer 890. The insulating layer 890 may be formed using a material similar to that of the insulating layer 805 or the insulating layer 815.

The structure of the transistor included in the display module is not particularly limited. For example, a staggered transistor or an inverted staggered transistor may be used. Furthermore, either a top-gate or bottom-gate transistor structure may be used. The semiconductor material used for the transistor is not particularly limited, and examples thereof include silicon, germanium, and organic semiconductors. Alternatively, an oxide semiconductor containing at least one of indium, gallium, and zinc, such as an In—Ga—Zn-based metal oxide, may be used. Note that the transistor described in the above embodiment can be used as a structural example of a transistor using an oxide semiconductor.

It is preferable to provide a base film for stabilizing the characteristics of a transistor. The base film can be formed as a single layer or a stacked layer using an inorganic insulating film such as a silicon oxide film, a silicon nitride film, a silicon oxynitride film, or a silicon nitride oxide film. The base film can be formed by a sputtering method, a CVD (Chemical Vapor Deposition) method (plasma CVD),
method, thermal CVD method, MOCVD (Metal Organic CVD) method, etc.), ALD
The insulating layer 805 can be formed by an atomic layer deposition (ALD) method, a coating method, a printing method, or the like. Note that the base film does not have to be provided if it is not necessary. In each of the above structure examples, the insulating layer 805 can also serve as a base film of the transistor.

The light-emitting element may be a self-luminous element, and may include elements whose brightness is controlled by current or voltage, such as light-emitting diodes (LEDs), organic EL elements, and inorganic EL elements.

The light-emitting element may be any of a top-emission type, a bottom-emission type, and a dual-emission type. A conductive film that transmits visible light is used for the electrode from which light is extracted. It is also preferable to use a conductive film that reflects visible light for the electrode from which light is not extracted.

The conductive film that transmits visible light is made of, for example, indium oxide or indium tin oxide (ITO).
The conductive layer can be formed using, for example, indium tin oxide (InOxide), indium zinc oxide, zinc oxide (ZnO), or zinc oxide doped with gallium. Metallic materials such as gold, silver, platinum, magnesium, nickel, tungsten, chromium, molybdenum, iron, cobalt, copper, palladium, or titanium, alloys containing these metallic materials, or nitrides of these metallic materials (e.g., titanium nitride), can also be used by forming them thin enough to have light-transmitting properties. A stacked film of the above materials can also be used as the conductive layer. For example, a stacked film of an alloy of silver and magnesium and ITO is preferably used because it can increase conductivity. Graphene, for example, can also be used.

The conductive film that reflects visible light can be made of, for example, a metal material such as aluminum, gold, platinum, silver, nickel, tungsten, chromium, molybdenum, iron, cobalt, copper, or palladium, or an alloy containing these metal materials. Lanthanum, neodymium, germanium, or the like may be added to the above-mentioned metal materials or alloys. Also, alloys containing aluminum (aluminum alloys), such as an alloy of aluminum and titanium, an alloy of aluminum and nickel, an alloy of aluminum and neodymium, or an alloy of aluminum, nickel, and lanthanum (Al—Ni—La), an alloy of silver and copper, or an alloy of silver, palladium, and copper (Ag—Pd—Cu
The aluminum alloy film can be formed using an alloy containing silver, such as an alloy of silver and magnesium (also referred to as APC). An alloy containing silver and copper is preferable because of its high heat resistance. Furthermore, by laminating a metal film or a metal oxide film in contact with the aluminum alloy film, oxidation of the aluminum alloy film can be suppressed. Examples of materials for the metal film or metal oxide film include titanium and titanium oxide. Furthermore, the conductive film that transmits visible light may be laminated with a film made of a metal material. For example, a laminate film of silver and ITO, or a laminate film of an alloy of silver and magnesium and ITO can be used.

As a material used for the lower electrode 831 and the upper electrode 835, the above-mentioned conductive film that transmits visible light or the above-mentioned conductive film that reflects visible light can be used.

The electrodes may be formed by evaporation or sputtering, or alternatively, by a discharge method such as an ink-jet method, a printing method such as a screen printing method, or a plating method.

When a voltage higher than the threshold voltage of the light-emitting element is applied between the lower electrode 831 and the upper electrode 835, holes are injected from the anode side and electrons are injected from the cathode side into the EL layer 833. The injected electrons and holes are recombined in the EL layer 833, and the light-emitting substance contained in the EL layer 833 emits light.

The EL layer 833 includes at least a light-emitting layer. The EL layer 833 includes the following layers other than the light-emitting layer:
The layer may further include a layer containing a substance having a high hole-injection property, a substance having a high hole-transport property, a hole-blocking material, a substance having a high electron-transport property, a substance having a high electron-injection property, a bipolar substance (a substance having a high electron-transport property and a high hole-transport property), or the like.

Either a low molecular weight compound or a high molecular weight compound, or an inorganic compound, can be used for the EL layer 833. The layers constituting the EL layer 833 can be formed by a method such as vapor deposition (including vacuum deposition), a transfer method, a printing method, an inkjet method, or a coating method.

The light-emitting element 830 may contain two or more luminescent materials. This allows, for example, a light-emitting element that emits white light to be realized. For example, white light can be obtained by selecting luminescent materials so that the light emitted from each of the two or more luminescent materials has a complementary color relationship. For example, luminescent materials that emit light of R (red), G (green), B (blue), Y (yellow), O (orange), etc.,
It is possible to use a light-emitting substance that emits light containing spectral components of two or more colors of R, G, and B. For example, a light-emitting substance that emits blue light and a light-emitting substance that emits yellow light may be used.
In this case, the emission spectrum of the luminescent material that emits yellow light preferably includes green and red spectral components. The emission spectrum of the light-emitting element 830 preferably includes two wavelengths within the visible region (for example, 350 nm to 750 nm, or 400 nm to 800 nm).
It is preferable that the peaks are more than 100%.

The EL layer 833 may have a plurality of light-emitting layers. In the EL layer 833, the plurality of light-emitting layers may be stacked in contact with each other or may be stacked with a separating layer interposed therebetween.
For example, a separation layer may be provided between the fluorescent-emitting layer and the phosphorescent-emitting layer.

The separation layer can be provided, for example, to prevent energy transfer (especially triplet energy transfer) by the Dexter mechanism from the excited state of the phosphorescent material generated in the phosphorescent-emitting layer to the fluorescent material in the fluorescent-emitting layer. The separation layer may have a thickness of about several nm. Specifically,
1 nm or more and 20 nm or less, or 1 nm or more and 10 nm or less, or 1 nm or more and 5 nm or less
The separation layer may comprise a single material (preferably a bipolar material) or a plurality of materials (preferably a hole transporting material and an electron transporting material).

The separation layer may be formed using a material contained in the light-emitting layer in contact with the separation layer. This facilitates fabrication of the light-emitting device and reduces the driving voltage. For example, when the phosphorescent light-emitting layer is composed of a host material, an assist material, and a phosphorescent material (guest material), the separation layer may be formed from the host material and the assist material. In other words, the separation layer has a region that does not contain a phosphorescent material, and the phosphorescent light-emitting layer has a region that contains a phosphorescent material. This allows
The separation layer and the phosphorescent light-emitting layer can be deposited by selectively depositing them with or without a phosphorescent material.
Furthermore, this configuration allows the separation layer and the phosphorescent layer to be formed in the same chamber, thereby reducing manufacturing costs.

The light emitting element 830 may be a single element having one EL layer, or a tandem element having a plurality of EL layers stacked with a charge generating layer interposed therebetween.

The light emitting element is preferably surrounded by a highly moisture-proof insulating film, which can prevent impurities such as water from entering the light emitting element and prevent a decrease in the reliability of the display module.

The insulating layer 815 and the insulating layer 816 can be formed using an inorganic insulating film such as a silicon oxide film, a silicon oxynitride film, or an aluminum oxide film.
The insulating layer 816 may be formed of different materials.
For example, organic materials such as polyimide, acrylic, polyamide, polyimideamide, and benzocyclobutene-based resins can be used. Also, low-dielectric-constant materials (low-k materials) can be used. Each insulating layer may be formed by stacking multiple insulating layers.

The insulating layer 821 is formed using an organic insulating material or an inorganic insulating material. Examples of resin that can be used include polyimide resin, polyamide resin, acrylic resin, siloxane resin, epoxy resin, and phenol resin. In particular, it is preferable to use a photosensitive resin material, form an opening on the lower electrode 831, and form the sidewall of the opening to be an inclined surface formed with a continuous curvature.

The method for forming the insulating layer 821 is not particularly limited, and may be a photolithography method, a sputtering method, a vapor deposition method, a droplet discharge method (such as an inkjet method), a printing method (such as screen printing or offset printing), or the like.

A conductive layer used in a display module, which functions as an electrode or wiring of a transistor, an auxiliary electrode of a light-emitting element, or the like, is made of, for example, molybdenum, titanium, chromium, tantalum, tungsten,
The conductive layer can be formed as a single layer or a stacked layer using a metal material such as aluminum, copper, neodymium, or scandium, or an alloy material containing these elements. The conductive layer may also be formed using a conductive metal oxide. Examples of conductive metal oxides include indium oxide (In ₂ O
_3, etc.), tin oxide (SnO2 _{, etc.} ), ZnO, ITO, indium zinc oxide ( _In2O3
-ZnO, etc.) or a material obtained by adding silicon oxide to these metal oxide materials can be used.

The colored layer is a colored layer that transmits light in a specific wavelength band. For example, a color filter that transmits light in the red, green, blue, or yellow wavelength band can be used. Each colored layer is formed at a desired position using various materials by a printing method, an inkjet method, an etching method using photolithography, or the like. In addition, in the white subpixel, a transparent or white resin may be disposed so as to overlap the light-emitting element.

The light-shielding layer is provided between adjacent colored layers. The light-shielding layer blocks light from adjacent light-emitting elements and suppresses color mixing between adjacent light-emitting elements. By providing the ends of the colored layers so that they overlap the light-shielding layer, light leakage can be suppressed. The light-shielding layer may be:
A material that blocks light emitted from the light-emitting elements can be used, and for example, a black matrix can be formed using a metal material or a resin material containing a pigment or dye. Note that it is preferable to provide the light-shielding layer in an area other than the display area, such as the drive circuit area, because this can suppress unintended light leakage due to waveguide light, etc.

An overcoat may be provided to cover the colored layer and the light-shielding layer. By providing the overcoat, it is possible to prevent impurities contained in the colored layer from diffusing into the light-emitting element. The overcoat is made of a material that transmits light emitted from the light-emitting element, and can be, for example, an inorganic insulating film such as a silicon nitride film or a silicon oxide film, or an organic insulating film such as an acrylic film or a polyimide film, or may have a laminate structure of an organic insulating film and an inorganic insulating film.

In addition, when the material for the adhesive layer is applied onto the colored layer and the light-shielding layer, it is preferable to use a material that has high wettability with respect to the material for the adhesive layer as the material for the overcoat. For example, it is preferable to use an oxide conductive film such as an ITO film or a metal film such as an Ag film that is thin enough to have light transmission properties as the overcoat.

As the connector, various anisotropic conductive films (ACF)
Inductive Film) and Anisotropic Conductive Paste (ACP)
c Conductive Paste) can be used.

Note that this embodiment mode can be appropriately combined with other embodiment modes described in this specification.

Eighth Embodiment
In this embodiment, a structure of a display module according to one embodiment of the present invention, which is different from that in Embodiment 7, will be described with reference to FIGS. 24 and 25 .

24 is a top view illustrating a display module of one embodiment of the present invention. A display module 700 illustrated in FIG. 24 includes a pixel portion 702 provided over a first base material 701 and a display panel 702a, 702b, 702c, 702d, 702e, 702f, 702g, 702h, 702h, 702i, 702j, 702j, 702j, 702j, 702k ...
The source driver circuit portion 704 and the gate driver circuit portion 706 are provided in the pixel portion 7
02, a bonding layer 712 disposed so as to surround the source driver circuit portion 704 and the gate driver circuit portion 706, and a second base material 705 provided so as to face the first base material 701.
and an insulating layer 790 disposed so as to surround the bonding layer 712. The first base material 701 and the second base material 705 are sealed by the bonding layer 712 and the insulating layer 790.
That is, the pixel section 702, the source driver circuit section 704, and the gate driver circuit section 70
24, the display device 6 is sealed by the first base material 701, the bonding layer 712, the insulating layer 790, and the second base material 705. Although not shown in FIG.

In addition, the display module 700 includes an FPC terminal portion 708 (FPC: Flexible Printed Circuit) that is electrically connected to the pixel portion 702, the source driver circuit portion 704, and the gate driver circuit portion 706, in a region different from the region surrounded by the bonding layer 712 on the first base material 701.
In addition, an FPC terminal portion 70
An FPC 716 is connected to the FPC terminal portion 708, and various signals and the like are supplied to the pixel portion 702, the source driver circuit portion 704, and the gate driver circuit portion 706 through the FPC 716. Signal lines 710 are connected to the pixel portion 702, the source driver circuit portion 704, the gate driver circuit portion 706, and the FPC terminal portion 708. The various signals and the like supplied by the FPC 716 are given to the pixel portion 702, the source driver circuit portion 704, the gate driver circuit portion 706, and the FPC terminal portion 708 via the signal lines 710.

Furthermore, the display module 700 may be provided with a plurality of gate driver circuit portions 706. Although the display module 700 has been exemplified in which the source driver circuit portion 704 and the gate driver circuit portion 706 are formed on the same first base material 701 as the pixel portion 702, the present invention is not limited to this configuration. For example, only the gate driver circuit portion 706 may be formed on the first base material 701, or only the source driver circuit portion 704 may be formed on the first base material 701. In this case, a substrate (
For example, a drive circuit board formed of a single crystal semiconductor film or a polycrystalline semiconductor film is attached to a first substrate 7
01. The method for connecting the separately formed drive circuit board is not particularly limited, and COG (Chip On Glass) method, wire bonding method, etc. can be used.

The pixel portion 702, the source driver circuit portion 704, and the gate driver circuit portion 706 included in the display module 700 each include a plurality of transistors. The transistors described in the above embodiments can be used as the plurality of transistors.

The display module 700 can also include a liquid crystal element. Examples of display devices using such a liquid crystal element include liquid crystal displays (transmissive liquid crystal displays, semi-transmissive liquid crystal displays, reflective liquid crystal displays, direct-view liquid crystal displays, and projection liquid crystal displays). When realizing a semi-transmissive liquid crystal display or a reflective liquid crystal display, part or all of the pixel electrodes can function as reflective electrodes. For example, part or all of the pixel electrodes can be made to contain aluminum, silver, or the like. Furthermore, in this case, it is also possible to provide a memory circuit such as an SRAM below the reflective electrode. This can further reduce power consumption.

The display module 700 may use a progressive or interlaced display method. Furthermore, the color elements controlled by pixels during color display are not limited to the three colors of RGB (R represents red, G represents green, and B represents blue). For example, a pixel may be configured with four pixels: an R pixel, a G pixel, a B pixel, and a W (white) pixel. Alternatively, as in a Pentile arrangement, one color element may be configured with two of the RGB colors, and two different colors may be selected for each color element. Alternatively, one or more colors, such as yellow, cyan, or magenta, may be added to the RGB colors. The size of the display area for each dot of a color element may differ. However, the disclosed invention is not limited to color display devices and can also be applied to monochrome display devices.

In addition, the backlight (organic EL element, inorganic EL element, LED, fluorescent lamp, etc.) uses white light (
In order to make the display device display full color using the color filter, a colored layer (also called a color filter) may be used. The colored layer may be, for example, red (R), green (G), blue (B), etc.
, yellow (Y), etc. can be used in appropriate combination.
This allows for improved color reproducibility compared to when a colored layer is not used. In this case, by arranging a region with a colored layer and a region without a colored layer, white light from the region without a colored layer can be directly used for display. By arranging a region without a colored layer, the reduction in brightness due to the colored layer can be reduced during bright display, and power consumption may be reduced by approximately 20 to 30%. However, when using self-luminous elements such as organic EL elements or inorganic EL elements for full-color display, R, G, B, Y, and white (W) may be emitted from elements with their respective luminous colors. Using self-luminous elements may allow for even greater power consumption reduction than when a colored layer is used. In the present embodiment, a so-called reflective liquid crystal display module without a backlight or the like will be described below.

A cross-sectional view taken along the dashed dotted line A3-B3 shown in Fig. 24 is shown in Fig. 25. Details of the display module shown in Fig. 25 will be described below.

<Explanation about the display module>
25 includes a lead wiring portion 711, a pixel portion 702, a source driver circuit portion 704, and an FPC terminal portion 708. The lead wiring portion 711 includes a signal line 710. The pixel portion 702 includes a transistor 750 and a capacitor 740. The source driver circuit portion 704 includes a transistor 752.

The transistors 750 and 752 can be the transistors described above.

The transistor used in this embodiment includes a highly purified oxide semiconductor film in which oxygen vacancies are suppressed. The transistor can have a low current value in an off state (off-state current value). Therefore, the retention time of an electric signal such as an image signal can be extended, and the writing interval can be set long in a power-on state. Therefore, the frequency of a refresh operation can be reduced, thereby reducing power consumption.

Furthermore, the transistor used in this embodiment can achieve relatively high field-effect mobility and thus can be driven at high speed. For example, by using such a transistor capable of high-speed driving in a liquid crystal display device, a switching transistor in a pixel portion and a driver transistor used in a driver circuit portion can be formed over the same substrate. In other words, since there is no need to use a semiconductor device formed from a silicon wafer or the like as a separate driver circuit, the number of components in the semiconductor device can be reduced. Furthermore, by using a transistor capable of high-speed driving in the pixel portion, a high-quality image can be provided.

The capacitor 740 has a structure including a dielectric between a pair of electrodes. More specifically, a conductive film formed in the same process as a conductive film functioning as a gate electrode of the transistor 750 is used as one electrode of the capacitor 740, and a conductive film functioning as a source electrode and a drain electrode of the transistor 750 is used as the other electrode of the capacitor 740. In addition, an insulating layer functioning as a gate insulating layer of the transistor 750 is used as the dielectric sandwiched between the pair of electrodes.

25, a transistor 750, a transistor 752, and a capacitor 74
0, insulating layers 764 and 768 and a planarizing insulating layer 770 are provided.

The insulating layer 764 may be formed using, for example, a silicon oxide film, a silicon oxynitride film, or the like, using a PECVD apparatus. The insulating layer 768 may be formed using, for example, a silicon nitride film or the like, using a PECVD apparatus. The planarization insulating layer 770 may be formed using a heat-resistant organic material such as a polyimide resin, an acrylic resin, a polyimideamide resin, a benzocyclobutene resin, a polyamide resin, or an epoxy resin. The planarization insulating layer 770 may be formed by stacking a plurality of insulating layers formed using these materials. Alternatively, a structure without the planarization insulating layer 770 may be used. Regarding a material and a formation method of the insulating layer 790, the description of the insulating layer 290 in Embodiment 1 can be referred to.
The insulating layer 790 may be formed using a material similar to that of the insulating layer 764 or the insulating layer 768 .

The signal line 710 is formed in the same process as the conductive films that function as the source and drain electrodes of the transistors 750 and 752.
The signal line 710 may be a conductive film formed in a process different from that of the source and drain electrodes 752, for example, a conductive film that functions as a gate electrode. When a material containing copper is used for the signal line 710, for example, signal delay due to wiring resistance is reduced, and display on a large screen is possible.

The FPC terminal portion 708 includes a terminal 760, an anisotropic conductive film 780, and an FPC 716. The terminal 760 is formed in the same process as the conductive films that function as source and drain electrodes of the transistors 750 and 752. The terminal 760 is electrically connected to a terminal of the FPC 716 via the anisotropic conductive film 780.

Further, for example, a glass substrate can be used as the first base material 701 and the second base material 705. Further, a flexible substrate may be used as the first base material 701 and the second base material 705. For example, a plastic substrate can be used as the flexible substrate.

In addition, a structure 778 is provided between the first base material 701 and the second base material 705. The structure 778 is a columnar spacer obtained by selectively etching an insulating layer.
The structure 778 is provided to control the distance (cell gap) between the first base 701 and the second base 705. Note that a spherical spacer may be used as the structure 778. Although the structure 778 is provided on the first base 701 side in this embodiment, the present invention is not limited thereto. For example, the structure 778 may be provided on the second base 705 side, or the structure 778 may be provided on both the first base 701 and the second base 705.

The second substrate 705 is provided with a light-shielding film 738 that functions as a black matrix.
A colored film 736 functioning as a color filter, and an insulating layer 734 in contact with a light-shielding film 738 and the colored film 736 are provided.

The display module described in this embodiment includes a first base material 701 that supports a terminal 760,
The display module includes an insulating layer 790 that is in contact with a second substrate 705 that overlaps the first substrate 701 and a bonding layer 712 that bonds the first substrate 701 and the second substrate 705. This makes it possible to suppress the diffusion of impurities into the region surrounded by the insulating layer 790. As a result, a novel display module that is highly convenient and reliable can be provided.

<Configuration example using liquid crystal element as display element>
The display module 700 shown in FIG. 25 includes a liquid crystal element 775. The liquid crystal element 775 includes:
The display module 70 shown in FIG. 25 includes a conductive film 772, a conductive film 774, and a liquid crystal layer 776. The conductive film 774 is provided on the second base material 705 side and functions as a counter electrode.
In the liquid crystal display device 700, the orientation of the liquid crystal layer 776 changes depending on the voltage applied to the conductive films 772 and 774, and the transmittance or non-transmittance of light is controlled, thereby displaying an image.

Thermotropic liquid crystal, low molecular weight liquid crystal, polymer liquid crystal, polymer dispersed liquid crystal, ferroelectric liquid crystal, antiferroelectric liquid crystal, etc. can be used as the liquid crystal element for the liquid crystal layer 776. These liquid crystal materials exhibit a cholesteric phase, a smectic phase, a cubic phase, a chiral nematic phase, an isotropic phase, etc. depending on the conditions.

The conductive film 772 is connected to a conductive film that functions as one of a source electrode and a drain electrode of the transistor 750. The conductive film 772 is formed over the planarization insulating layer 770 and functions as a pixel electrode, that is, one electrode of a display element.
25 is a so-called reflective color liquid crystal display device that utilizes external light, reflects the light by a conductive film 772, and displays a picture via a colored film 736.

The conductive film 772 can be a conductive film that transmits visible light or a conductive film that reflects visible light.
For example, a material containing one selected from indium (In), zinc (Zn), and tin (Sn) may be used. As a conductive film that is reflective to visible light, a material containing aluminum or silver may be used. In this embodiment, the conductive film 772 is
A conductive film that is reflective in visible light is used.

In addition, when a conductive film that is reflective to visible light is used as the conductive film 772, the conductive film may have a stacked structure. For example, an aluminum film having a thickness of 100 nm is formed as a lower layer,
A silver alloy film (for example, an alloy film containing silver, palladium, and copper) having a thickness of 30 nm is formed on the upper layer. The above-described structure provides the following excellent effects.

(1) The adhesion between the base film and the conductive film 772 can be improved. (2) The aluminum film and the silver alloy film can be etched together using a chemical solution. (3) The cross-sectional shape of the conductive film 772 can be made to have a good shape (for example, a tapered shape).
The reason for this is that the etching rate of the aluminum film by chemicals is slower than that of the silver alloy film.
Alternatively, when the lower aluminum film is exposed after etching of the upper silver alloy film, electrons are extracted from aluminum, which is a less noble metal than the silver alloy film, in other words, a metal with a high ionization tendency, so etching of the silver alloy film is suppressed and etching of the lower aluminum film progresses more quickly.

In the display module 700 shown in FIG. 25, the planarization insulating layer 7
The unevenness can be formed, for example, by forming the planarization insulating layer 770 from an organic resin film or the like and providing the unevenness on the surface of the organic resin film.
The conductive film 772, which functions as a reflective electrode, is formed along the above-described unevenness. Therefore, when external light is incident on the conductive film 772, the light can be diffused on the surface of the conductive film 772, thereby improving visibility. As shown in Fig. 25, a reflective color liquid crystal display device can display without using a backlight, thereby reducing power consumption.

25 illustrates a reflective color liquid crystal display module, but the present invention is not limited thereto. For example, a transmissive color liquid crystal display module may be formed by using a conductive film that transmits visible light as the conductive film 772. In the case of a transmissive color liquid crystal display module, the unevenness provided in the planarization insulating layer 770 may not be provided.

25, an alignment film may be provided on each of the conductive films 772 and 774 on the side in contact with the liquid crystal layer 776. Although not shown in FIG. 25, optical members (optical substrates) such as a polarizing member, a retardation member, and an anti-reflection member may be provided as appropriate. For example, circularly polarized light produced by a polarizing substrate and a retardation substrate may be used. In the case of a transmissive display module or a semi-transmissive display module, a backlight, a sidelight, or the like may be provided as a light source.

When a lateral electric field mode is adopted as the liquid crystal element, a liquid crystal exhibiting a blue phase without using an alignment film may be used. The blue phase is one of the liquid crystal phases, and is a phase that appears when cholesteric liquid crystal is heated, just before the transition from the cholesteric phase to the isotropic phase. Since the blue phase appears only within a narrow temperature range, a liquid crystal composition containing several weight percent or more of a chiral agent is used in the liquid crystal layer to improve the temperature range. A liquid crystal composition containing a liquid crystal exhibiting a blue phase and a chiral agent has a short response speed and is optically isotropic, so alignment treatment is not required. In addition,
The blue phase liquid crystal material has a small viewing angle dependency, and since it does not require an alignment film, it does not require a rubbing process, which prevents electrostatic breakdown caused by the rubbing process and reduces defects and damage to the liquid crystal display device during the manufacturing process.

When a liquid crystal element is used as a display element, a TN (Twisted Nematic)
) mode, IPS (In-Plane-Switching) mode, FFS (Fr
Field Switching mode, ASM (Axially Symme
tric aligned Micro-cell) mode, OCB (Optical
Compensated Birefringence mode, FLC (Ferrero)
electric Liquid Crystal) mode, AFLC (AntiFerr
A fluoroelectric liquid crystal mode or the like can be used.

Furthermore, a normally black type liquid crystal display device, for example, a transmissive type liquid crystal display device employing a vertical alignment (VA) mode may be used. There are several types of vertical alignment modes, such as MVA (Multi-Domain Vertical Alignment)
) mode, PVA (Patterned Vertical Alignment) mode, ASV mode, etc. can be used.

Note that this embodiment mode can be appropriately combined with other embodiment modes described in this specification.

For example, when it is explicitly stated in this specification that X and Y are connected, it is assumed that the specification discloses the cases where X and Y are electrically connected, where X and Y are functionally connected, and where X and Y are directly connected. Therefore, it is not limited to a predetermined connection relationship, for example, a connection relationship shown in a drawing or text, and connection relationships other than those shown in a drawing or text are also assumed to be described in a drawing or text.

Here, X and Y are the object (for example, a device, an element, a circuit, a wiring, an electrode, a terminal, a conductive film,
layer, etc.).

An example of a case where X and Y are directly connected is a case where an element (e.g., a switch, a transistor, a capacitance element, an inductor, a resistance element, a diode, a display element, a light-emitting element, a load, etc.) that enables an electrical connection between X and Y is not connected between X and Y, and is a case where X and Y are connected without an element (e.g., a switch, a transistor, a capacitance element, an inductor, a resistance element, a diode, a display element, a light-emitting element, a load, etc.) that enables an electrical connection between X and Y.

As an example of a case where X and Y are electrically connected, one or more elements (for example, a switch, a transistor, a capacitance element, an inductor, a resistance element, a diode, a display element, a light-emitting element, a load, etc.) that enable the electrical connection between X and Y can be connected between X and Y. The switch has a function of controlling on/off. In other words, the switch has a function of being in a conductive state (on state) or a non-conductive state (off state) and controlling whether or not a current flows. Alternatively, the switch has a function of selecting and switching a path for the current to flow. When X and Y are electrically connected, X
This also includes the case where Y is directly connected to Y.

An example of a case where X and Y are functionally connected is a circuit that enables the functional connection between X and Y (for example, a logic circuit (an inverter, a NAND circuit, a NOR circuit, etc.), a signal conversion circuit (a DA conversion circuit, an AD conversion circuit, a gamma correction circuit, etc.), a potential level conversion circuit (
One or more power supply circuits (such as a step-up circuit or step-down circuit, a level shifter circuit that changes the potential level of a signal), voltage sources, current sources, switching circuits, amplifier circuits (such as circuits that can increase the signal amplitude or amount of current, such as an operational amplifier, a differential amplifier circuit, a source follower circuit, or a buffer circuit), signal generation circuits, memory circuits, or control circuits can be connected between X and Y. As an example, even if another circuit is sandwiched between X and Y, X and Y are considered to be functionally connected if a signal output from X is transmitted to Y. When X and Y are functionally connected, this includes a case where X and Y are directly connected and a case where X and Y are electrically connected.

In addition, when it is explicitly stated that X and Y are electrically connected,
are electrically connected (i.e., connected with another element or circuit between X and Y), X and Y are functionally connected (i.e., connected with another circuit between X and Y), and X and Y are directly connected (i.e., connected without another element or circuit between X and Y).
and are deemed to be disclosed in this specification, etc. In other words, when it is explicitly stated that they are electrically connected, the same content as when it is explicitly stated that they are simply connected is deemed to be disclosed in this specification, etc.

For example, the source (or first terminal, etc.) of the transistor is electrically connected to X via (or without) Z1, and the drain (or second terminal, etc.) of the transistor is
In the case where the transistor is electrically connected to Y via (or without) Z2, or where the source (or first terminal, etc.) of the transistor is directly connected to a part of Z1, another part of Z1 is directly connected to X, and the drain (or second terminal, etc.) of the transistor is directly connected to a part of Z2, and another part of Z2 is directly connected to Y, the following expression can be used:

For example, it can be expressed as follows: "X, Y, and the source (or first terminal, etc.) and drain (or second terminal, etc.) of the transistor are electrically connected to each other, and are electrically connected in the order of X, the source (or first terminal, etc.) of the transistor, the drain (or second terminal, etc.) of the transistor, and Y." Or, it can be expressed as follows: "The source (or first terminal, etc.) of the transistor is electrically connected to X, and the drain (or second terminal, etc.) of the transistor is electrically connected to Y, and X, the source (or first terminal, etc.) of the transistor, the drain (or second terminal, etc.) of the transistor, and Y are electrically connected in this order." Or, it can be expressed as follows: "X is electrically connected to Y via the source (or first terminal, etc.) and drain (or second terminal, etc.) of the transistor, and X, the source (or first terminal, etc.) of the transistor, the drain (or second terminal, etc.) of the transistor, and Y are provided in this connection order." By using expressions similar to these examples to define the order of connections in a circuit configuration, the source (or first terminal, etc.) and drain (or second terminal, etc.) of a transistor can be distinguished and the technical scope can be determined.

Alternatively, as another way of expressing it, for example, "the source (or first terminal, etc.) of a transistor is electrically connected to X via at least a first connection path, the first connection path does not have a second connection path, the second connection path is a path between the source (or first terminal, etc.) of the transistor and the drain (or second terminal, etc.) of the transistor via a transistor, the first connection path is a path via Z1, the drain (or second terminal, etc.) of the transistor is electrically connected to Y via at least a third connection path, the third connection path does not have the second connection path, and the third connection path does not have the second connection path,
The connection path of is a path via Z2." Alternatively, it can be expressed as "The source (or first terminal, etc.) of the transistor is electrically connected to X via Z1 by at least a first connection path, the first connection path does not have a second connection path, the second connection path has a connection path via a transistor, and the drain (or second terminal, etc.) of the transistor is electrically connected to Y via Z2 by at least a third connection path, and the third connection path does not have the second connection path." Alternatively, it can be expressed as follows: "The source (or first terminal, etc.) of the transistor is electrically connected to X via Z1 by at least a first electrical path, the first electrical path does not have a second electrical path, the second electrical path is an electrical path from the source (or first terminal, etc.) of the transistor to the drain (or second terminal, etc.) of the transistor, and the drain (or second terminal, etc.) of the transistor is electrically connected to Y via Z2 by at least a third electrical path, the third electrical path does not have a fourth electrical path, and the fourth electrical path is an electrical path from the drain (or second terminal, etc.) of the transistor to the source (or first terminal, etc.) of the transistor." By using an expression similar to these examples to define the connection path in the circuit configuration, it is possible to distinguish between the source (or first terminal, etc.) and the drain (or second terminal, etc.) of the transistor and determine the technical scope.

It should be noted that these expression methods are merely examples, and the present invention is not limited to these expression methods.
X, Y, Z1, and Z2 are assumed to be objects (for example, devices, elements, circuits, wiring, electrodes, terminals, conductive films, layers, etc.).

Note that even when independent components are shown electrically connected to each other in a circuit diagram, one component may have the functions of multiple components. For example, if part of a wiring also functions as an electrode, one conductive film has the functions of both a wiring and an electrode. Therefore, the term "electrically connected" in this specification also includes such cases where one conductive film has the functions of multiple components.

10 Processed member 100 Transistor 101 Substrate 102 Gate electrode 103 Insulating layer 104 Oxide semiconductor layer 104a Channel region 104b N-type region 104c N-type region 105a Electrode 105b Electrode 106 Insulating layer 107 Insulating layer 110 Transistor 114 Oxide semiconductor layer 114a Oxide semiconductor layer 114b Oxide semiconductor layer 120 Transistor 124 Oxide semiconductor layer 124a Oxide semiconductor layer 124b Oxide semiconductor layer 124c Oxide semiconductor layer 150 Transistor 151 Insulating layer 152 Insulating layer 154 Insulating layer 156 Insulating layer 160 Transistor 164 Oxide semiconductor layer 164a Oxide semiconductor layer 164b Oxide semiconductor layer 164c Oxide semiconductor layer 170 Transistor 180 Film formation chamber 181a Raw material supply unit 181b Raw material supply unit 182 Control unit 182a Flow rate controller 182b Flow rate controller 182c Flow rate controller 182h Heating mechanism 183 Inlet 184 Outlet 185 Exhaust device 186 Support 186a Mask 186B Support 187 Heating mechanism 188 Door 190 Film forming device 196 Separation film 199 Opening 200 Display panel 200B Display panel 200C Display panel 200D Display panel 200E Display panel 200F Display panel 200M Display module 200MB Display module 200MC Display module 200MD Display module 203G Drive circuit 205 Bonding layer 210 Base material 210a Barrier film 210b Base material 210c Adhesive layer 211 Wiring 219 Terminal 221 Flexible printed circuit board 222 Anisotropic conductive film 223 Mask 224 Mask 225 Microcrack 250 Display element 270 Substrate 270a Barrier film 270b Substrate 270c Adhesive layer 290 Insulating layer 291 Opening 292 Opening 295 Opening 298 Resin layer 700 Display module 701 Substrate 702 Pixel portion 704 Source driver circuit portion 705 Substrate 706 Gate driver circuit portion 708 FPC terminal portion 710 Signal line 711 Wiring portion 712 Bonding layer 716 FPC
734 Insulating layer 736 Colored film 738 Light-shielding film 740 Capacitor element 750 Transistor 752 Transistor 760 Terminal 764 Insulating layer 768 Insulating layer 770 Planarizing insulating layer 772 Conductive film 774 Conductive film 775 Liquid crystal element 776 Liquid crystal layer 778 Structure 780 Anisotropic conductive film 790 Insulating layer 800 Base material 801 Substrate 803 Adhesive layer 804 Display section 805 Insulating layer 806 Operating circuit section 808 FPC
810 Base material 811 Substrate 813 Adhesive layer 815 Insulating layer 816 Insulating layer 817 Insulating layer 820 Transistor 821 Insulating layer 822 Bonding layer 825 Connector 830 Light-emitting element 831 Lower electrode 833 EL layer 835 Upper electrode 845 Colored layer 847 Light-shielding layer 857 Terminal 890 Insulating layer 5100 Pellets 5120 Substrate 5161 Region

Claims (10)

A display panel is provided.
the display panel has a first region, a second region, and a third region;
a pixel section having a plurality of pixels is arranged in the first region;
the second region has terminals arranged therein that are electrically connected to a flexible printed circuit board;
the third region has a region in which wiring electrically connected to the terminal is disposed,
the wiring is electrically connected to the pixel portion,
the third region is disposed between the first region and the second region;
a display device in which the display panel can be stored in a housing by bending the display panel in the third region,
a portion of the insulating layer is disposed in the first region;
another portion of the insulating layer is disposed on a periphery of the second region;
The display device, wherein the insulating layer is not disposed in the third region. A display panel is provided.
the display panel has a first region, a second region, and a third region;
a pixel section having a plurality of pixels is arranged in the first region;
the second region has terminals arranged therein that are electrically connected to a flexible printed circuit board;
the third region has a region in which wiring electrically connected to the terminal is disposed,
the wiring is electrically connected to the pixel portion,
the third region is disposed between the first region and the second region;
a display device in which the display panel can be stored in a housing by bending the display panel in the third region,
a portion of the insulating layer is disposed in the first region;
another part of the insulating layer is disposed on the periphery of the second region so as to be in contact with the wiring;
The display device, wherein the insulating layer is not disposed in the third region. A display panel is provided.
the display panel has a first region, a second region, and a third region;
the first region includes a pixel section having a plurality of pixels and a gate driver circuit section;
the second region has terminals arranged therein that are electrically connected to a flexible printed circuit board;
the third region has a region in which wiring electrically connected to the terminal is disposed,
the wiring is electrically connected to the gate driver circuit unit,
the third region is disposed between the first region and the second region;
a display device in which the display panel can be stored in a housing by bending the display panel in the third region,
a portion of the insulating layer is disposed in the first region;
another portion of the insulating layer is disposed on a periphery of the second region;
The display device, wherein the insulating layer is not disposed in the third region. A display panel is provided.
the display panel has a first region, a second region, and a third region;
the first region includes a pixel section having a plurality of pixels and a gate driver circuit section;
the second region has terminals arranged therein that are electrically connected to a flexible printed circuit board;
the third region has a region in which wiring electrically connected to the terminal is disposed,
the wiring is electrically connected to the gate driver circuit unit,
the third region is disposed between the first region and the second region;
a display device in which the display panel can be stored in a housing by bending the display panel in the third region,
a portion of the insulating layer is disposed in the first region;
another part of the insulating layer is disposed on the periphery of the second region so as to be in contact with the wiring;
The display device, wherein the insulating layer is not disposed in the third region. In any one of claims 1 to 4 ,
The display device, wherein the insulating layer contains an inorganic compound. A display panel is provided.
the display panel has a first region, a second region, and a third region;
a pixel section having a plurality of pixels is arranged in the first region;
the second region has terminals arranged therein that are electrically connected to a flexible printed circuit board;
the third region has a region in which wiring electrically connected to the terminal is disposed,
the wiring is electrically connected to the pixel portion,
the third region is disposed between the first region and the second region;
a manufacturing method of a display device, wherein the display panel can be accommodated in a housing by bending the display panel in the third region,
After forming an insulating layer in the first region, the second region, and the third region,
The method for manufacturing a display device further comprises removing the insulating layer in the third region and leaving the insulating layer on a periphery of the second region. A display panel is provided.
the display panel has a first region, a second region, and a third region;
a pixel section having a plurality of pixels is arranged in the first region;
the second region has terminals arranged therein that are electrically connected to a flexible printed circuit board;
the third region has a region in which wiring electrically connected to the terminal is disposed,
the wiring is electrically connected to the pixel portion,
the third region is disposed between the first region and the second region;
a manufacturing method of a display device, wherein the display panel can be accommodated in a housing by bending the display panel in the third region,
After forming an insulating layer in the first region, the second region, and the third region,
a third region of the insulating layer being removed, and the insulating layer being left in a periphery of the second region so as to have a region in contact with the wiring; A display panel is provided.
the display panel has a first region, a second region, and a third region;
the first region includes a pixel section having a plurality of pixels and a gate driver circuit section;
the second region has terminals arranged therein that are electrically connected to a flexible printed circuit board;
the third region has a region in which wiring electrically connected to the terminal is disposed,
the wiring is electrically connected to the gate driver circuit unit,
the third region is disposed between the first region and the second region;
a manufacturing method of a display device, wherein the display panel can be accommodated in a housing by bending the display panel in the third region,
After forming an insulating layer in the first region, the second region, and the third region,
The method for manufacturing a display device further comprises removing the insulating layer in the third region and leaving the insulating layer on a periphery of the second region. A display panel is provided.
the display panel has a first region, a second region, and a third region;
the first region includes a pixel section having a plurality of pixels and a gate driver circuit section;
the second region has terminals arranged therein that are electrically connected to a flexible printed circuit board;
the third region has a region in which wiring electrically connected to the terminal is disposed,
the wiring is electrically connected to the gate driver circuit unit,
the third region is disposed between the first region and the second region;
a manufacturing method of a display device, wherein the display panel can be accommodated in a housing by bending the display panel in the third region,
After forming an insulating layer in the first region, the second region, and the third region,
a third region of the insulating layer being removed, and the insulating layer being left in a periphery of the second region so as to have a region in contact with the wiring; In any one of claims 6 to 9 ,
The method for manufacturing a display device, wherein the insulating layer contains an inorganic compound.