JP7797648B2 - Substrate liquid processing method and substrate liquid processing apparatus - Google Patents

Description

The present disclosure relates to a substrate liquid processing method and a substrate liquid processing apparatus.

Electroless plating can be used to form fine wiring on semiconductor wafers (also simply referred to as "wafers"). Patent Document 1 discloses an apparatus that uses electroless plating to fill vias (recesses) in a wafer with metal wiring.

International Publication No. 2019/163531

The present disclosure provides advantageous techniques for depositing plating metals onto a substrate.

One aspect of the present disclosure relates to a substrate solution processing method including the steps of: preparing a substrate having wiring and a laminate including an insulating film disposed on the wiring, the laminate having a recess that penetrates all the way to the wiring and exposes the wiring; scattering the exposed portion of the wiring in the recess by reverse sputtering and attaching it as a plating seed body to the surface of the laminate including a partition surface that defines the recess; covering the partition surface with a plating metal deposited by electroless plating while the plating seed body is attached to the partition surface; and filling the recess with the plating metal by either electroless plating or electroplating while the partition surface is covered with the plating metal.

The present disclosure is advantageous for depositing plating metals onto a substrate.

FIG. 1 is a diagram showing a schematic configuration example of a multilayer wiring forming system. FIG. 2 is a diagram showing an example of the configuration of a plating processing unit. FIG. 3 is a diagram showing an example of the configuration of a heat treatment unit. FIG. 4A is a diagram for explaining an example of a substrate liquid processing method, showing an enlarged cross section of a wafer (particularly a portion near one recess). FIG. 4B is a diagram for explaining an example of a substrate liquid processing method, showing an enlarged cross section of a wafer (particularly a portion near one recess). FIG. 4C is a diagram for explaining an example of a substrate liquid processing method, showing an enlarged cross section of a wafer (particularly a portion near one recess). FIG. 4D is a diagram for explaining an example of a substrate liquid processing method, showing an enlarged cross section of a wafer (particularly a portion near one recess). FIG. 4E is a diagram for explaining an example of a substrate liquid processing method, showing an enlarged cross section of a wafer (particularly a portion near one recess). FIG. 4F is a diagram for explaining an example of a substrate liquid processing method, showing an enlarged cross section of a wafer (particularly a portion near one recess).

Specific embodiments of the present disclosure will be described with reference to the accompanying drawings. The following embodiments are merely examples of substrate liquid processing methods and substrate liquid processing apparatus that embody the technical concepts of the present disclosure and do not limit the technical concepts of the present disclosure. Each element shown in each drawing is shown in a simplified form. The dimensions, shapes, and dimensional ratios of each element in each drawing do not necessarily correspond to the corresponding elements in an actual device, and do not necessarily correspond between drawings.

Figure 1 is a diagram showing an example of the schematic configuration of a multilayer wiring formation system 1. In Figure 1, the X-axis, Y-axis, and Z-axis are perpendicular to each other, the X-axis and Y-axis extend horizontally, and the positive direction of the Z-axis is the vertical upward direction.

The multilayer wiring formation system (substrate liquid processing system) 1 shown in Figure 1 comprises a loading/unloading station 2, a processing station 3, and a control device 4.

The loading/unloading station 2 includes a carrier placement section 11 and a first transport section 12. Multiple carriers C are placed on the carrier placement section 11, and each carrier C supports one or more wafers (substrates) W in a horizontal position. The first transport section 12 is located adjacent to the carrier placement section 11 and includes a first substrate transport device 13 and a delivery section 14.

The first substrate transfer device 13 transfers wafers W between each carrier C and the transfer section 14. In this example, the first substrate transfer device 13 is capable of holding a wafer W and moving the wafer W horizontally and vertically, and rotating (pivoting) the wafer W around a vertical axis. The transfer section 14 temporarily supports a wafer W received from the first substrate transfer device 13, and temporarily supports a wafer W to be transferred to the first substrate transfer device 13. The wafer W transferred from the transfer section 14 to the first substrate transfer device 13 is returned from the first substrate transfer device 13 to the corresponding carrier C.

The processing station 3 is located adjacent to the loading/unloading station 2 (particularly the first transport section 12) in the X direction and includes a second transport section 15 and multiple processing units 16.

The second transfer section 15 is equipped with a second substrate transfer device 20 that is movable along the transfer path. The second substrate transfer device 20 is capable of moving the wafer W horizontally and vertically and rotating (pivoting) the wafer W around a vertical axis. The second transfer section 15 transfers the wafer W received from the transfer section 14 to the desired processing unit 16, transfers the wafer W between processing units 16, and transfers the wafer W from the processing unit 16 to the transfer section 14.

The multiple processing units 16 included in the processing station 3 are lined up on both sides of the transport path of the second substrate transport device 20 (the transport path extending in the X direction in the example shown in Figure 1). The arrangement and number of these processing units 16 are not limited to the example shown in Figure 1, and any number of processing units 16 can be arranged in any configuration.

The substrate liquid processing apparatus, which performs liquid processing and other processes on each wafer W, includes one or more processing units 16. While the specific processes performed in each processing unit 16 are not limited, in this embodiment, processing units 16 are provided that function as at least a plating processing unit 17, a reverse sputtering processing unit 18, and a heat processing unit 19. In this embodiment, the plating processing unit 17 is configured as an electroless plating processing unit that performs electroless plating processing on the wafer W. The reverse sputtering processing unit 18 performs reverse sputtering processing on the wafer W. The heat processing unit 19 performs heat processing on the wafer W. Details of the electroless plating processing, reverse sputtering processing, and heat processing performed in the plating processing unit 17, reverse sputtering processing unit 18, and heat processing unit 19, respectively, will be described below.

As an example, the multiple processing units 16 provided in the processing station 3 may include a CMP processing unit and a cleaning processing unit in addition to a plating processing unit 17, a reverse sputtering processing unit 18, and a thermal processing unit 19. The CMP (Chemical Mechanical Polishing) processing unit performs CMP processing on the wafer W. The cleaning processing unit performs cleaning processing on the wafer W and includes, for example, a spin cleaning type cleaning device.

The control device 4 is, for example, a computer, and includes a control unit 21 and a memory unit 22. The control unit 21 includes a microcomputer and various circuits, including a CPU (Central Processing Unit), ROM (Read Only Memory), RAM (Random Access Memory), and input/output ports. The CPU of the microcomputer controls the first conveying unit 12, the second conveying unit 15, and each processing unit 16 by reading and executing programs stored in the ROM.

The program stored in the memory unit 22 of the control device 4 may be one that has been recorded on a computer-readable storage medium and installed into the memory unit 22 from that storage medium. Examples of computer-readable storage media include hard disks (HDs), flexible disks (FDs), compact disks (CDs), magnetic optical disks (MOs), and memory cards. The memory unit 22 can be realized by, for example, semiconductor memory elements such as RAM and flash memory, or storage devices such as hard disks and optical disks.

[Plating processing unit]
2 is a diagram showing an example of the configuration of the plating unit 17. In FIG. 2, the configuration inside the housing 30 is shown in perspective.

The plating processing unit 17 shown in Figure 2 is configured as a single-wafer processing unit 16 that processes wafers W one by one, and includes a housing 30, a substrate rotation and holding mechanism 31, at least a portion of which is provided inside the housing 30, a processing liquid supply mechanism 32, and a cup 33.

The housing 30 has an openable/closable loading/unloading section (not shown). Wafers W transported by the second substrate transport device 20 (see FIG. 1) are loaded into the housing 30 through the open loading/unloading section, and are unloaded from the housing 30 through the open loading/unloading section. Meanwhile, while the wafers W are undergoing various processes (including electroless plating processes) inside the housing 30, and while no processes are being performed inside the housing 30, the loading/unloading section is kept closed, restricting the inflow of outside air into the housing 30.

The substrate rotation and holding mechanism 31 holds the wafer W and is rotatable together with the wafer W. The substrate rotation and holding mechanism 31 has a hollow cylindrical rotation shaft 31a, a turntable 31b, a wafer chuck 31c, and a first rotation drive unit (not shown). The vertical length of the rotation shaft 31a inside the housing 30 is changed by a second lifting mechanism (not shown) driven under the control of the control device 4 (see FIG. 1). The turntable 31b is attached to the upper end of the rotation shaft 31a. The wafer chuck 31c is attached to the outer periphery of the upper surface of the turntable 31b and supports the wafer W. Changing the vertical length of the rotation shaft 31a changes the height positions (vertical positions) of the turntable 31b and wafer chuck 31c together. The first rotation drive unit transmits rotational power from a drive source such as a motor to the rotation shaft 31a, rotating the rotation shaft 31a, turntable 31b, and wafer chuck 31c together.

The substrate rotation and holding mechanism 31 is driven under the control of the control device 4 (see Figure 1), and the rotational power transmitted from the first rotation drive unit rotates the rotation shaft 31a, turntable 31b, and wafer chuck 31c, thereby rotating the wafer W supported by the wafer chuck 31c.

The processing liquid supply mechanism 32 is driven under the control of the control device 4 (see Figure 1) and supplies a processing liquid (e.g., electroless plating solution) to the surface of the wafer W held by the substrate rotation holding mechanism 31. In this example, the processing liquid supply mechanism 32 has a processing liquid supply unit 32a, a discharge head 32b, a discharge nozzle 32c, an arm 32d, a support shaft 32e, and a processing liquid supply path 32f.

The processing liquid supply unit 32a supplies the processing liquid to the discharge head 32b via the processing liquid supply path 32f. The processing liquid supplied to the discharge head 32b is discharged from a discharge nozzle 32c attached to the discharge head 32b and applied to, for example, the processing surface (upper surface) of a wafer W. The discharge head 32b and the discharge nozzle 32c are attached to the tip of an arm 32d and move integrally with the arm 32d. The arm 32d is supported by a support shaft 32e so that it can move up and down, and is provided inside the housing 30 so that it can move up and down. The arm 32d also rotates (pivots) integrally with the support shaft 32e so that it can move horizontally. The support shaft 32e is rotated around a central axis extending in the vertical direction by a second rotation drive unit (not shown).

The processing liquid supply mechanism 32 having the above-described configuration can eject processing liquid from an ejection nozzle 32c positioned at a desired height toward any location on the processing surface (upper surface) of the wafer W.

The cup 33 has two discharge ports 33a and 33b located at different positions in the vertical direction, and receives the processing liquid splashed from the wafer W. The cup 33 is movable in the vertical direction by a second lifting mechanism (not shown) driven under the control of the control device 4 (see Figure 1), and the height positions of the two discharge ports 33a and 33b are variable. The two discharge ports 33a and 33b are connected to liquid discharge mechanisms 34 and 35, respectively.

The liquid discharge mechanisms 34 and 35 discharge the processing liquid collected in the two discharge ports 33a and 33b outside the housing 30.

The liquid discharge mechanism 34 has a recovery flow path 34b and a waste flow path 34c connected to the discharge port 33a via a flow path switch 34a. The flow path switch 34a switches the flow path through which the processing liquid can flow from one of the discharge ports 33a, between the recovery flow path 34b and the waste flow path 34c. The recovery flow path 34b is a flow path for reusing the processing liquid recovered from one of the discharge ports 33a, and is provided with a cooling buffer 34d for cooling the processing liquid. The waste flow path 34c is a flow path for discarding the processing liquid recovered from one of the discharge ports 33a.

The liquid discharge mechanism 35 has a waste flow path 35a connected to the other discharge port 33b. The waste flow path 35a is a flow path for disposing of the treatment liquid recovered from the other discharge port 33b.

The processing liquid supply unit 32a is configured to supply electroless plating liquid and other processing liquids (e.g., cleaning liquid and rinsing liquid) as processing liquids to the discharge head 32b and discharge nozzle 32c. This allows the processing liquid supply mechanism 32 to perform cleaning processing using a cleaning liquid, rinsing processing using a rinsing liquid, or other liquid processing on the wafer W before or after applying electroless plating liquid to the wafer W.

2 shows a simplified view of the processing liquid supply mechanism 32, with one processing liquid supply unit 32a, one processing liquid supply path 32f, one ejection head 32b, and one ejection nozzle 32c. However, the number and configuration of the processing liquid supply unit 32a, the processing liquid supply path 32f, the ejection head 32b, and the ejection nozzle 32c are not limited.

For example, multiple processing liquid supply units 32a, processing liquid supply paths 32f, discharge heads 32b, and/or discharge nozzles 32c may be provided. In this case, for example, a dedicated processing liquid supply unit 32a, processing liquid supply path 32f, discharge head 32b, and/or discharge nozzle 32c may be provided for each of the multiple types of processing liquid supplied to the wafer W from the processing liquid supply mechanism 32. Alternatively, a dedicated processing liquid supply unit 32a, processing liquid supply path 32f, discharge head 32b, and/or discharge nozzle 32c may be provided only for one or more specific types of processing liquid. In this case, the processing liquid supply unit 32a, processing liquid supply path 32f, discharge head 32b, and/or discharge nozzle 32c are shared with other types of processing liquid.

[Heat treatment unit]
3 is a diagram showing an example of the configuration of the heat treatment unit 19. In FIG. 3, the internal configuration of the housing 19a is shown in a perspective manner.

The thermal processing unit 19 shown in Figure 3 is configured as a single-wafer processing unit 16 that processes wafers W one by one, and includes a housing 19a and a hot plate 19b arranged inside the housing 19a.

The housing 19a has an openable/closable loading/unloading section (not shown). Wafers W transported by the second substrate transport device 20 (see FIG. 1) are loaded into the housing 19a through the open loading/unloading section, and are unloaded from the housing 19a through the open loading/unloading section. Meanwhile, while the wafers W are undergoing heat treatment inside the housing 19a, or while no processing is being performed inside the housing 19a, the loading/unloading section is kept closed, restricting the inflow of outside air into the housing 19a.

The housing 19a is provided with a gas supply path 19c for supplying reducing gas into the housing 19a and a gas exhaust path 19d for exhausting atmospheric gas from within the housing 19a.

The specific composition of the reducing gas supplied into the housing 19a is not limited; for example, forming gas containing nitrogen gas and hydrogen gas is used as the reducing gas. The hydrogen gas concentration in forming gas is typically around 3-4%. By heating the wafer W to a high temperature of, for example, around 400°C in a forming gas atmosphere, the wafer W can be effectively reduced, thereby suppressing the effects of oxidation of the wafer W.

The wafer W is loaded into the housing 19a via the loading/unloading section and placed on the hot plate 19b. Reducing gas is then supplied from a gas supply source (not shown) through the gas supply path 19c into the housing 19a. With the housing 19a filled with reducing gas, the wafer W is heated by the hot plate 19b and subjected to heat treatment (reduction annealing). The ambient gas within the housing 19a is exhausted through the gas exhaust path 19d and recovered in a gas recovery section (not shown). While the wafer W is being heat-treated, the supply of reducing gas from the gas supply path 19c into the housing 19a and the exhaust of the ambient gas within the housing 19a through the gas exhaust path 19d may be continuous or may be stopped.

After the heat treatment of the wafer W is completed, the wafer W is unloaded from the housing 19a via the loading/unloading section.

[Substrate liquid processing method]
4A to 4F are diagrams for explaining an example of a substrate liquid processing method, showing an enlarged cross section of the wafer W (particularly a portion near one recess 43). The substrate liquid processing method described below is carried out by appropriately driving various devices of the multilayer wiring formation system 1 under the control of the control device 4.

First, a wafer W is prepared, which includes a wiring 41 and a laminate 42 that is provided on the wiring 41 and includes an insulating film. The wafer W is then placed in the reverse sputtering processing unit 18 (processing unit 16 (see Figure 1)) (see Figure 4A). The laminate 42 has multiple recesses 43, each of which penetrates to the wiring 41 and exposes it.

The wafer W then undergoes reverse sputtering processing in the reverse sputtering processing unit 18. That is, the reverse sputtering processing unit 18 uses the wafer W as a target and applies a high voltage to the wafer W to generate a glow discharge, ionizing the reverse sputtering gas G that fills the area around the wafer W and causing it to collide with the wiring 41 exposed in the recess 43 (see Figure 4B).

As a result, the exposed portion of the wiring 41 near the exposed surface in the recess 43 is blown away by the reverse sputtering gas G, exposing a fresh (new) surface of the wiring 41 at the bottom of the recess 43 (see Figure 4C). Meanwhile, the portion of the wiring 41 exposed in the recess 43 that has been blown away by the reverse sputtering gas G adheres to the surface 50 of the laminate 42 (including the partition surface 51 that defines the recess 43) as a plating seed body 45.

The specific equipment equipped in the reverse sputtering processing unit 18 is not limited. For example, the reverse sputtering processing unit 18 can perform the above-mentioned reverse sputtering process using an apparatus that applies a known sputtering apparatus equipped with a voltage application device and a reverse sputtering gas supply device. The specific composition of the reverse sputtering gas G is also not limited. For example, argon (Ar) can be used as the reverse sputtering gas G, but any other gas (for example, a rare gas element other than argon or nitrogen) may also be used.

The wafer W is then transferred from the reverse sputtering processing unit 18 and into the heat treatment unit 19 (see FIG. 3) (see FIG. 4D). In the heat treatment unit 19, the wafer W is subjected to heat treatment in a reducing gas atmosphere. In this embodiment, the wafer W is heat treated in a reducing gas atmosphere while the plating seed body 45 is attached to the surface of the stack 42 including the partition surface 51 and before the partition surface 51 is coated with the plating metal.

The wafer W is then unloaded from the heat treatment unit 19 and loaded into the plating treatment unit 17 (see Figure 2). Note that the heat treatment of the wafer W in the heat treatment unit 19 described above does not have to be performed. In this case, the wafer W (see Figure 4C) unloaded from the reverse sputtering treatment unit 18 is loaded into the plating treatment unit 17 without being loaded into the heat treatment unit 19.

The wafer W undergoes electroless plating in the plating unit 17, filling each recess 43 with plating metal 47 (see Figures 4E and 4F). The electroless plating process here includes a process of coating the surface 50 (including the partition surface 51) of the laminate 42 with plating metal 47, and a process of filling each recess 43 with the plating metal 47.

That is, first, with the plating seed body 45 attached to the surface 50 of the laminate 42, including the partition surface 51, the surface 50 (including the partition surface 51) of the laminate 42 is coated with plating metal 47 deposited by electroless plating (see Figure 4E). At this time, the plating seed body 45 acts as a seed to promote the deposition of plating metal 47. Then, with the surface 50 (including the partition surface 51) of the laminate 42 coated with plating metal 47, the plating metal 47 is filled into the entirety of each recess 43 by electroless plating (see Figure 4F).

In this embodiment, the process of coating the surface 50 of the laminate 42 with the plated metal 47 and the process of filling each recess 43 with the plated metal 47 are carried out continuously and without interruption by a common electroless plating process in a common plating process unit 17. Therefore, the plated metal 47 covering the surface 50 (including the partition surface 51) of the laminate 42 and the plated metal 47 filling each recess 43 have the same composition.

After the plating metal 47 has been filled into each recess 43 in this manner, the wafer W is subjected to any processing (e.g., heat treatment, CMP processing and/or cleaning processing) in another processing unit 16 as necessary, and then returned to the corresponding carrier C.

The specific composition of the plating metal 47 and wiring 41 embedded in each recess 43 is not limited, and they may or may not contain metal components common to each other.

For example, the wiring 41 may include at least one of cobalt (Co), nickel (Ni), ruthenium (Ru), copper (Cu), tungsten (W), and other conductive metals. As an example, if the wiring 41 is made of ruthenium, the ruthenium may be deposited in each recess 43 as the plating metal 47.

When the wiring 41 is made of copper or tungsten, the surface 50 (including the partition surface 51) of the laminate 42 may be made of a barrier layer (not shown) containing a barrier material such as nickel (Ni). In this case, the portion of the wiring 41 that is scattered by the reverse sputtering process and adheres to the surface 50 of the laminate 42 adheres to the barrier layer as a plating seed body 45. By adhering the plating seed body 45 to the barrier layer in this manner, even if the plating seed body 45 is made of copper or tungsten, it is possible to prevent the plating seed body 45 from diffusing into the insulating film.

The inventors actually performed an electroless plating process to fill each recess 43 of the wafer W with plating metal 47, and observed the filling state of the plating metal 47 through SEM (scanning electron microscope) images (specifically, SE (secondary electron) images and BSE (backscattered electron) images).

Specifically, the embedded state of the plating metal 47 in a wafer W (first example) that was sequentially subjected to reverse sputtering, heat treatment, and electroless plating in accordance with the above-described Figures 4A to 4F was visually confirmed by SEM images. Furthermore, the embedded state of the plating metal 47 in a wafer W (second example) that was sequentially subjected to heat treatment and electroless plating without being subjected to reverse sputtering (Figures 4B and 4C) was visually confirmed by SEM images.

The processing and environmental conditions other than the reverse sputtering process were the same between the wafer W of the first embodiment and the wafer W of the second embodiment. The wafer W of the first embodiment and the wafer W of the second embodiment were provided with ruthenium wiring 41, and an electroless plating process was performed on the wafer W of the first embodiment and the wafer W of the second embodiment to deposit ruthenium plating metal 47 in each recess 43. In the wafer W of the first embodiment and the wafer W of the second embodiment, the exposed surface of the wiring 41 in each recess 43 was exposed for a predetermined period of time to the etching gas used to etch each recess 43. In the reverse sputtering process on the wafer W of the first embodiment, argon was used as the reverse sputtering gas G.

As a result, in the wafer W of the second embodiment, in which the reverse sputtering process was not performed prior to the electroless plating process, the plating metal 47 was not properly deposited in each recess 43, and each recess 43 could not be filled with the plating metal 47.

On the other hand, in the wafer W of Example 1, SEM images taken after the reverse sputtering process and before the electroless plating process confirmed that plating seed bodies 45 (debris from ruthenium wiring 41) were attached to the surface 50 (including the partition surface 51) of the laminate 42. Furthermore, in the wafer W of Example 1, SEM images taken after the electroless plating process confirmed that a sufficient amount of plating metal 47 had been deposited in all recesses 43, and that each recess 43 was filled with plating metal 47.

As explained above, by using the reverse sputtering process to scatter a portion of the wiring 41 and attach it to the partition surface 51 of each recess 43, the scattered material can be suitably used as a seed for the electroless plating process. As a result, the deposition of the plating metal 47 is promoted in the subsequent electroless plating process, which is extremely advantageous for filling each recess 43 of the wafer W with the plating metal 47.

In particular, the reverse sputtering process exposes new (fresh) portions of the wiring 41 in each recess 43, improving the electroless plating catalytic properties of the exposed surface of the wiring 41 in each recess 43 (i.e., the bottom surface of each recess 43) and the deposition properties of the plating metal 47. As a result, improved bottom-up growth of the plating metal 47 in each recess 43 can also be expected.

[Modification]
In the above example (see FIGS. 4A to 4F), each wafer W is basically subjected to the reverse sputtering process only once, but each wafer W may be subjected to the reverse sputtering process multiple times.

As an example, prior to adhering the plating seed body 45 (see FIG. 4C) to the surface 50 of the laminate 42 by reverse sputtering, a preliminary reverse sputtering process may be performed, followed by a process of cleaning the surface 50 of the laminate 42 after the preliminary reverse sputtering process. That is, the portions of the wiring 41 exposed in each recess 43 may be scattered by the preliminary reverse sputtering process, and the material constituting the wiring 41 that was adhered to the surface 50 of the laminate 42 by the preliminary reverse sputtering process may be removed by a subsequent cleaning process.

In this case, a reverse sputtering process (see Figures 4B and 4C) is performed with the fresh portion of the wiring 41 exposed in each recess 43, and the fresh portion is attached to the surface 50 of the laminate 42 as a plating seed body 45. As a result, the deposition properties of the plating metal 47 in the subsequent plating process are improved.

In the above example, the process for coating the partition surface 51 of each recess 43 with plating metal 47 and the process for filling each recess 43 with plating metal 47 are performed by the same electroless plating process, but they may also be performed by separate plating processes. As an example, plating metal 47 may be filled into each recess 43 by a different electroless plating process from the electroless plating process for coating the partition surface 51 of each recess 43 with plating metal 47. Furthermore, while electroless plating may be performed to cover the partition surface 51 of each recess 43 with plating metal 47, an electroplating process may then be performed in which electricity is passed through the wafer W to fill each recess 43 with plating metal 47.

When the process for coating the partition surface 51 with the plating metal 47 and the process for filling each recess 43 with the plating metal 47 are performed by separate plating processes, both processes may be performed in the same plating process unit 17 or in separate plating process units 17. That is, the process for coating the partition surface 51 with the plating metal 47 deposited by electroless plating, with the plating seed body 45 attached to the partition surface 51, may be performed in a first plating process unit. On the other hand, the process for filling each recess 43 with the plating metal 47 by either electroless plating or electroplating, with the partition surface 51 coated with the plating metal 47, may be performed in a second plating process unit. These first and second plating process units may be the same process unit 16 or separate process units 16.

In addition, although the reverse sputtering process, heat treatment, and electroless plating process are performed in the same substrate liquid processing system (multilayer wiring formation system 1) in the above example, they may also be performed in separate substrate liquid processing systems.

However, from the perspective of performing high-quality electroless plating, it is preferable to shorten the elapsed time between the reverse sputtering process and the electroless plating process, it is preferable to shorten the travel distance of the wafer W, and it is preferable to reduce exposure of the wafer W to the outside air, which may contain foreign matter such as dust. Therefore, performing the reverse sputtering process, heat treatment, and electroless plating process in the same substrate liquid processing system rather than performing them in separate substrate liquid processing systems is expected to result in higher quality plating metal deposited on the wafer W by the electroless plating process.

The substrate liquid processing system referred to here may refer to a general system equipped with a loading/unloading station 2 and a processing station 3, as shown in FIG. 1, for example. In a certain substrate liquid processing system, a wafer W may be transferred from the loading/unloading station 2 to the processing station 3, and then subjected to reverse sputtering, heat treatment, and electroless plating in the processing unit 16 of the processing station 3 without being returned to the loading/unloading station 2. In this case, the wafer W may be subjected to reverse sputtering, heat treatment, and electroless plating to fill each recess 43 with plating metal 47, and then returned to the loading/unloading station 2. This allows the processes of attaching a plating seed body 45 to the surface 50 of the laminate 42, coating the partition surface 51 with plating metal 47, and filling the recess 43 with plating metal 47 to be performed efficiently in a short time.

It should be noted that the embodiments and modifications disclosed in this specification are merely illustrative in all respects and should not be construed as limiting. The above-described embodiments and modifications may be omitted, substituted, or altered in various ways without departing from the scope and spirit of the appended claims. For example, the above-described embodiments and modifications may be combined in part or in whole, and embodiments other than those described above may be combined in part or in whole with the above-described embodiments or modifications.

Furthermore, the technical categories that embody the above-mentioned technical ideas are not limited. For example, the above-mentioned device may be applied to other devices. The above-mentioned technical ideas may also be embodied by a computer program that causes a computer to execute one or more procedures (steps) included in the above-mentioned method. The above-mentioned technical ideas may also be embodied by a computer-readable, non-transitory recording medium on which such a computer program is recorded.

Claims (7)

A step of preparing a substrate including wiring and a laminated body provided on the wiring and including an insulating film, the laminated body having a recessed portion that penetrates to the wiring and exposes the wiring;
a step of scattering the exposed portion of the wiring in the recess by a reverse sputtering process and attaching the scattered portion as a plating seed body to a surface of the laminate including a partition surface that defines the recess;
a step of covering the partition surface with a plating metal deposited by electroless plating treatment while the plating seed body is attached to the partition surface;
a step of filling the recesses with a plating metal by either an electroless plating process or an electroplating process while the partition surface is covered with the plating metal;
and performing a heat treatment of the substrate in a reducing gas atmosphere while the plating seed body is attached to the partition surface and before the partition surface is covered with a plating metal .
Substrate liquid processing method. A step of preparing a substrate including wiring and a laminated body provided on the wiring and including an insulating film, the laminated body having a recessed portion that penetrates to the wiring and exposes the wiring;
a step of scattering the exposed portion of the wiring in the recess by a reverse sputtering process and attaching the scattered portion as a plating seed body to a surface of the laminate including a partition surface that defines the recess;
a step of covering the partition surface with a plating metal deposited by electroless plating treatment while the plating seed body is attached to the partition surface;
and filling the recesses with a plating metal by either an electroless plating process or an electroplating process while the partition surface is covered with the plating metal;
Prior to attaching the plating seed body to the surface of the laminate by the reverse sputtering process,
a step of scattering the portion of the wiring exposed in the recess by a preliminary reverse sputtering process;
a step of removing the material constituting the wiring that has adhered to the surface of the laminate by the preliminary reverse sputtering treatment;
A substrate liquid processing method in which the above steps are carried out. 3. The substrate liquid processing method according to claim 1 , wherein the wiring contains at least one of cobalt, nickel, ruthenium, and copper. The substrate liquid processing method according to claim 1 or 2, wherein the plating metal and the wiring contain a common metal component. The substrate liquid processing system includes a loading/unloading station and a processing station;
The substrate is
After being sent from the carry-in/out station to the processing station, the laminate is subjected to a process of attaching the plating seed body to the surface of the laminate, a process of covering the partition surface with a plating metal, and a process of filling the recesses with the plating metal at the processing station without being returned to the carry-in/out station,
3. The substrate liquid processing method according to claim 1, wherein the substrate is returned to the loading/unloading station after the plating metal has been filled into the recesses. a reverse sputtering processing unit that performs a reverse sputtering process on a substrate including wiring and a laminate including an insulating film provided on the wiring, the substrate having a recess that penetrates to the wiring and exposes the wiring, thereby scattering the portion of the wiring exposed in the recess and attaching it as a plating seed body to a surface of the laminate including a partition surface that defines the recess;
one or more plating processing units that, with the plating seed body attached to the partition surface, cover the partition surface with a plating metal deposited by electroless plating processing, and, with the partition surface covered with the plating metal, fill the recesses with the plating metal by either electroless plating processing or electroplating processing;
a heat treatment unit for performing a heat treatment on the substrate in a reducing gas atmosphere while the plating seed body is attached to the partition surface and before the partition surface is covered with a plating metal;
and,
Substrate liquid processing equipment. a reverse sputtering processing unit that performs a reverse sputtering process on a substrate including wiring and a laminate including an insulating film provided on the wiring, the substrate having a recess that penetrates to the wiring and exposes the wiring, thereby scattering the portion of the wiring exposed in the recess and attaching it as a plating seed body to a surface of the laminate including a partition surface that defines the recess;
one or more plating processing units that, with the plating seed body attached to the partition surface, cover the partition surface with a plating metal deposited by electroless plating processing, and, with the partition surface covered with the plating metal, fill the recesses with the plating metal by either electroless plating processing or electroplating processing;
Prior to attaching the plating seed body to the surface of the laminate by the reverse sputtering process,
the reverse sputtering processing unit causes the exposed portion of the wiring in the recess to be scattered by a preliminary reverse sputtering process;
a step of removing, by a cleaning processing unit, the material constituting the wiring that has adhered to the surface of the laminate by the preliminary reverse sputtering processing;
will be carried out,
Substrate liquid processing equipment.