JP7807971B2 - Manufacturing method of electronic component device - Google Patents

Description

The present invention relates to a method for manufacturing electronic component devices, such as semiconductor devices having semiconductor integrated circuits.

Conventionally, there are known methods for manufacturing electronic component devices, such as those used to manufacture semiconductor devices having semiconductor integrated circuits. In this type of electronic component device manufacturing method, for example, a semiconductor wafer serving as a substrate is attached to a dicing tape having a base layer and an adhesive layer, and the dicing tape is stretched to expand the area, dividing the semiconductor wafer into small pieces into semiconductor chips. The small pieces of semiconductor chips, which serve as substrates, are then adhered to an adherend.

Generally, manufacturing methods for this type of electronic component device include a front-end process of forming a circuit surface on one side of a wafer, with highly integrated circuit components arranged on that side, and a back-end process of cutting out chips from the wafer with the circuit surface formed and assembling them.

In a subsequent process, for example, weakened sections are formed on the wafer (semiconductor wafer) on which the circuit surface is formed, allowing it to be diced into small chips (dies), and an adhesive layer of dicing tape is attached to the surface opposite the circuit surface. Then, while the semiconductor wafer remains attached to the adhesive layer of the dicing tape, the dicing tape is stretched in the planar direction, dicing the semiconductor wafer into semiconductor chips along the weakened sections. The diced semiconductor chips are then peeled off from the adhesive layer of the dicing tape.

These post-processing steps include, for example, a stealth processing step in which weakened portions are formed in the wafer using laser light or other methods to separate the wafer into small chips (dies); a mounting step in which the surface of the semiconductor wafer opposite the circuit surface is attached to dicing tape to secure the semiconductor wafer; an expanding step in which the dicing tape is stretched in the planar direction to separate the semiconductor wafer into semiconductor chips (dies); a pick-up step in which the semiconductor chips are peeled off from the adhesive layer and removed; and a bonding step in which the removed semiconductor chips are bonded to an adherend. Semiconductor integrated circuits are manufactured through these steps, for example.

In the manufacturing method of the electronic component device described above, for example, in the bonding step, the circuit side of the semiconductor chip is placed on the adherend, and the two are bonded together (so-called flip-chip bonding).

One known method for manufacturing this type of electronic component device is to electrically connect a semiconductor chip and an adherend via bumps protruding from the circuit surface of the semiconductor chip and a conductive material (such as solder) on the surface of the adherend. Specifically, one known method for manufacturing this type of electronic component device is to electrically connect electrodes located on the circuit surface of the semiconductor chip to electrodes on the adherend while placing a specific underfill material between the semiconductor chip and the adherend (see, for example, Patent Document 1).

In detail, the method for manufacturing an electronic component device described in Patent Document 1 is a method for manufacturing an electronic component device including an adherend, a semiconductor element electrically connected to the adherend, and an underfill material that fills a space between the adherend and the semiconductor element,
A step of preparing a semiconductor element with an underfill material, in which a specific underfill material is bonded to the semiconductor element;
and a connecting step of electrically connecting the semiconductor element and the adherend while filling the space between the semiconductor element and the adherend with the underfill material.
More specifically, the specific underfill material has a melt viscosity of 50 Pa·s or more and 3000 Pa·s or less at 150°C before heat treatment,
a viscosity change rate [(η2/η1)×100] of 500% or less, where η1 is the melt viscosity at 150°C before the heat treatment and η2 is the melt viscosity at 150°C after the heat treatment at 130°C for 1 hour;
When the total heat generation during the temperature rise process from -50°C to 300°C in DSC measurement is Qt and the total heat generation during the temperature rise process from -50°C to 300°C after heating at 175°C for 2 hours is Qh, the reaction rate {[(Qt-Qh)/Qt] x 100} is 90% or more.

The method for manufacturing electronic component devices described in Patent Document 1 improves manufacturing efficiency by manufacturing electronic component devices using an underfill material with a specific viscosity change rate, melt viscosity, and reaction rate.

JP 2015-170754 A

In the above-described bonding process, bonding may be performed to reduce the gap between the adherend and the semiconductor chip. For example, a semiconductor chip already bonded to a substrate or the like may serve as the adherend, and another semiconductor chip may be bonded to this semiconductor chip. The same flip-chip bonding process may be repeated to stack the semiconductor chips. In this case, for example, the electrodes of adjacent semiconductor chips may be directly connected to each other. In particular, when the electrodes are directly connected to each other in this manner, the gap between the semiconductor chips is almost eliminated, and if foreign matter is attached to the circuit surface of the semiconductor chip, it may be difficult to perform reliable bonding.
This type of foreign matter may be generated, for example, when a semiconductor wafer serving as a substrate is cut into small pieces as described above, and may adhere to the circuit surface of a semiconductor chip, etc. Therefore, there is a demand for a method for manufacturing an electronic component device that can prevent this type of foreign matter from adhering to the circuit surface of a substrate chip such as a semiconductor chip.
Furthermore, if a large amount of foreign matter adheres to the circuit surface of a substrate chip such as a semiconductor chip, the reliability of an electronic component device made up of a substrate chip with a large amount of foreign matter attached thereto may be reduced as a product, regardless of whether or not the above-mentioned bonding process is performed.

However, it cannot be said that sufficient research has yet been conducted into manufacturing methods for electronic component devices that can prevent foreign matter from adhering to the circuit surfaces of diced substrate chips.

The present invention aims to provide a method for manufacturing electronic component devices that can prevent foreign matter from adhering to the circuit surface of the substrate chip being manufactured.

In order to solve the above problems, the manufacturing method of the electronic component device according to the present invention comprises:
a step of overlaying a protective sheet for protecting the circuit components on at least one surface of the substrate, the circuit surface on which the circuit components are arranged;
a step of dividing a laminate in which the substrate and the protective sheet are overlapped into small pieces at intervals in a surface direction, thereby producing small pieces of the laminate in which substrate chips obtained by dividing the substrate into small pieces and small pieces of the protective sheet are overlapped;
and removing the small pieces of the protective sheet that overlap the circuit surface of the substrate chip.

According to the above-described method for manufacturing an electronic component device, a protective sheet is superimposed on the side of the substrate on which the circuit components are arranged (hereinafter also referred to as the circuit side), thereby preventing foreign matter from adhering to the circuit side until the protective sheet is removed. Specifically, when the substrate is cut into small pieces with the substrate and protective sheet superimposed, foreign matter such as debris that may be generated during the cutting process can be prevented from adhering to the circuit side of the substrate chip. Even if foreign matter is adhering to the circuit side of the substrate chip before the protective sheet is superimposed, the foreign matter can be removed when the small pieces of the protective sheet are removed.
Therefore, it is possible to prevent foreign matter from adhering to the circuit surface of the substrate chip to be fabricated.

The above-described method for manufacturing an electronic component device may further include a step of placing the circuit surface of the substrate chip facing the adherend and bonding the substrate chip to the adherend.
In this method for manufacturing an electronic component device, it is possible to suppress adverse effects caused by foreign matter that has entered between the circuit surface of the substrate chip and the adherend.

In the method for producing an electronic component device, the protective sheet contains a water-soluble polymer compound,
In the removing step, the plurality of small pieces of the protective sheet may be removed by contacting a liquid containing water with the plurality of small pieces of the protective sheet, thereby dissolving at least a portion of each small piece in the liquid.
According to this method for manufacturing an electronic component device, the liquid can not only remove small pieces of the protective sheet, but also reduce the number of foreign substances adhering to the circuit surface of the substrate chip, and can also clean the circuit surface of the substrate chip with the liquid.

In the above-mentioned method for manufacturing an electronic component device, the removing step may involve peeling off a release adhesive tape attached to the plurality of small pieces of the protective sheet, thereby removing the plurality of small pieces of the protective sheet together with the release adhesive tape.
According to this method for manufacturing an electronic component device, the protective sheet can be removed relatively easily.

In the method for producing an electronic component device, the protective sheet contains a curable composition,
The protective sheet overlapping the substrate may be cured by a curing treatment, and then the laminate of the substrate and the protective sheet may be divided into small pieces.
According to this method for manufacturing an electronic component device, the protective sheet can be more easily divided into small pieces because the protective sheet is hardened by the curing treatment, and the protective sheet can be more easily removed by using a peel-off adhesive tape.

In the method for manufacturing the electronic component device, the electrode portions as the circuit components arranged on both surfaces of the substrate chip are electrically connected to each other,
In the joining step, at least two of the substrate chips may be stacked, and the electrode portion of one of the substrate chips, which is the adherend, may be directly connected to the electrode portion of the other substrate chip.
According to this method for manufacturing electronic component devices, substrate chips are stacked in such a way that foreign matter is prevented from adhering to the circuit surfaces, thereby reducing the number of foreign matter particles that get between the stacked substrate chips. This allows the electrodes of adjacent substrate chips to be more reliably connected to each other. This ensures that the circuits of multiple substrate chips are electrically connected to each other with high reliability.

The manufacturing method for electronic component devices according to the present invention can prevent foreign matter from adhering to the circuit surface of the substrate chip being manufactured.

FIG. 2 is a cross-sectional view of an example of a substrate cut in the thickness direction. FIG. 10 is a cross-sectional view schematically illustrating an example of a wetting step. FIG. 10 is a cross-sectional view schematically illustrating an example of a protection step. FIG. 10 is a cross-sectional view schematically illustrating an example of a protection step. FIG. 3 is a cross-sectional view schematically showing an example of a laminate of a substrate and a protective sheet before being divided into small pieces. FIG. 2 is a cross-sectional view schematically showing an example of a state in which a laminate of a substrate and a protective sheet is cut into small pieces. FIG. 10 is a cross-sectional view schematically illustrating an example of a state in which a small piece of a protective sheet overlapping a small piece of a substrate is removed. FIG. 2 is a cross-sectional view of an example of a protective sheet and a release liner cut in the thickness direction. FIG. 2 is a cross-sectional view of an example of a dicing tape cut in the thickness direction. FIG. 1 is a cross-sectional view of an example of a semiconductor wafer as a substrate cut in the thickness direction. 1 is a cross-sectional view of an example of a semiconductor chip produced by dividing a semiconductor wafer as a substrate, cut in the thickness direction. FIG. 4 is a cross-sectional view schematically illustrating a state before a mounting process in the first embodiment. 5A to 5C are cross-sectional views schematically illustrating a mounting process in the first embodiment. 5A to 5C are cross-sectional views schematically illustrating a mounting process in the first embodiment. 5A to 5C are cross-sectional views schematically illustrating a wetting step in the first embodiment. 5A to 5C are cross-sectional views schematically illustrating a protection step in the first embodiment. 5A to 5C are cross-sectional views schematically illustrating a stealth processing step in the first embodiment. FIG. 4 is a cross-sectional view schematically illustrating an expanding step in the first embodiment. 5A to 5C are cross-sectional views schematically illustrating a removal step in the first embodiment. 5A to 5C are cross-sectional views schematically illustrating a pickup process in the first embodiment. 5A to 5C are cross-sectional views schematically illustrating a joining step in the first embodiment. 10A to 10C are cross-sectional views schematically illustrating a mounting process according to the second embodiment. FIG. 10 is a cross-sectional view schematically illustrating a stealth processing step in the second embodiment. FIG. 10 is a cross-sectional view schematically illustrating a curing treatment of a protective sheet in a second embodiment. FIG. 11 is a cross-sectional view schematically illustrating the state in which the release liner is peeled off after the protective sheet has been subjected to a curing treatment in the second embodiment. FIG. 10 is a cross-sectional view schematically illustrating an expanding step in the second embodiment. 10A to 10C are cross-sectional views schematically illustrating a removal step according to a second embodiment. FIG. 11 is a cross-sectional view schematically illustrating a semiconductor wafer and a backgrind tape according to a third embodiment. FIG. 11 is a cross-sectional view schematically illustrating a protection step according to the third embodiment. FIG. 11 is a cross-sectional view schematically illustrating a state before a mounting step in a third embodiment. 10A to 10C are cross-sectional views schematically illustrating a mounting process according to the third embodiment. FIG. 10 is a cross-sectional view schematically illustrating the state of a semiconductor wafer and a backgrind tape in a fourth embodiment. FIG. 10 is a cross-sectional view schematically illustrating a stealth processing step in the fourth embodiment. FIG. 13 is a cross-sectional view schematically illustrating a protection step according to the fourth embodiment. FIG. 13 is a cross-sectional view schematically illustrating a state before a mounting step in a fourth embodiment. 13A to 13C are cross-sectional views schematically illustrating a mounting process according to the fourth embodiment. FIG. 10 is a cross-sectional view schematically illustrating a curing treatment of a protection sheet according to a fourth embodiment. FIG. 13 is a cross-sectional view schematically illustrating a grinding process in the fifth embodiment. FIG. 13 is a cross-sectional view schematically illustrating a state after grinding in the fifth embodiment. FIG. 13 is a cross-sectional view schematically illustrating a state after a mounting process in the fifth embodiment. FIG. 13 is a cross-sectional view schematically illustrating a state after a stealth processing process in the fifth embodiment. 3 is a photograph showing the state of observing the surface of a semiconductor chip manufactured by the manufacturing method of Example 1. 10 is a photograph showing the state of observing the surface of a semiconductor chip manufactured by a manufacturing method of a comparative example.

Below, an embodiment of a method for manufacturing an electronic component device according to the present invention will be described with reference to the drawings.

The method for manufacturing an electronic component device according to this embodiment includes the steps of:
a step of overlaying a protective sheet 10 for protecting the circuit components on at least one surface of the substrate, the circuit surface on which the circuit components are arranged (protection step);
a step of dividing the laminate in which the substrate and the protective sheet 10 are overlapped into small pieces at intervals in the surface direction to prepare small pieces of the laminate in which the substrate chips obtained by dividing the substrate into small pieces and the small pieces of the protective sheet 10 are overlapped (expanding step);
and a step of removing small pieces of the protective sheet 10 that overlap the circuit surface of the substrate chip (removal step).
The method for manufacturing an electronic component device of this embodiment may further include a step (a bonding step) of placing the circuit surface of the substrate chip facing the adherend and bonding the substrate chip to the adherend.

The method for manufacturing an electronic component device of this embodiment may further include a step of increasing the humidity of the gas in contact with the circuit surface Sa (wetting step) before overlaying the protective sheet on the circuit surface.

In the manufacturing method for electronic component devices of this embodiment, at least one surface of the substrate is protected by a protective sheet 10. The surface to be protected (the circuit surface Sa on which the circuit components are arranged) may be only one surface of the substrate or both surfaces.

The material of the substrate S is not particularly limited as long as it is plate-shaped, as shown in the cross-sectional view of Fig. 1A. Examples of the substrate include a semiconductor wafer, a substrate that will form a CMOS (Complementary Metal Oxide Semiconductor) or a MEMS (Micro Electro Mechanical System), a substrate that will form a pseudo wafer, and a wiring substrate.
Furthermore, circuit components are arranged on at least one surface of the substrate. The surface of the substrate on which the circuit components are arranged is a circuit surface. Examples of the circuit components include wiring, electrodes, and elements such as transistors, diodes, and sensors (such as light-receiving sensors or vibration sensors).
For example, only elements or only electrodes may be arranged on the circuit surface protected by protective sheet 10. In other words, at least one type of circuit component may be arranged on the circuit surface protected by protective sheet 10. At least one type of circuit component is then covered and protected by protective sheet 10.

The wetting step is performed as needed. It is particularly effective when using a protective sheet 10 containing a water-soluble polymer compound (described in detail below). The wetting step can be performed, for example, as shown in FIG. 1B, by bringing a gas containing water vapor into contact with the circuit surface Sa, or by spraying mist of water onto the circuit surface Sa. Alternatively, the wetting step can be performed by applying water to the circuit surface Sa. By performing the wetting step, the adhesion of the protective sheet 10 containing a water-soluble polymer compound to the circuit surface Sa can be improved.

In the above protection process, protective sheet 10 is laid over the surface (circuit side) of the substrate on which any of the circuit components are arranged (see Figure 1C). In other words, protective sheet 10 may be laid over the circuit side on which wiring is arranged as a circuit component, or over one side of the substrate on which a sensor is arranged as a circuit component, or over one side of the substrate on which an electrode portion is arranged as a circuit component. In the above protection process, protective sheet 10 is laid over at least one side of the substrate so as to cover the circuit components with protective sheet 10.

1D and 2A, the protective sheet 10 is formed in a sheet shape and has flexibility that allows it to be deformed with a relatively small force. The protective sheet 10 also has adhesiveness that allows it to adhere to the substrate S. Note that a release liner 15 may be superimposed on one or both surfaces of the protective sheet 10 before or during the manufacturing process.
It should be noted that the figures in the drawings are schematic diagrams and do not necessarily have the same aspect ratio as the actual product. The same applies to the other drawings.

In the above-mentioned expanding process, a substrate S is prepared with a weakened portion formed inside for fracture, as shown in Figure 1E, for example. Next, as shown in Figure 1F, for example, with a protective sheet 10 placed on one side of the substrate S, the laminate of the substrate S and protective sheet 10 is divided into small pieces. When dividing into small pieces, a dicing tape 20 placed on the other side of the substrate S is used, and the dicing tape 20 is stretched in the planar direction to increase the surface area of the dicing tape 20. This divides the laminate of the substrate S and protective sheet 10 into small pieces, and further increases the spacing between adjacent substrates S in the planar direction.

As shown in Figure 2B, the dicing tape 20 includes a base layer 21 and an adhesive layer 22 superimposed on the base layer 21. A commercially available product can be used as the dicing tape 20.

In the above-mentioned removal process, as shown schematically in Figure 1G, each small piece 10' of the protective sheet overlapping the small piece S' of the substrate is removed by dissolving at least a portion of each of the multiple small pieces 10' of the protective sheet or by peeling each small piece 10' off of the small piece S' of the substrate.

In the above-mentioned bonding step, for example, the substrate piece S' is bonded to the adherend Z directly or via a predetermined member. Note that in the bonding step, for example, a plurality of substrate pieces S' may be stacked. Also, for example, the substrate piece S' with a coating resin attached thereto may be bonded to the adherend Z.
Examples of the adherend Z include an interposer, a wiring circuit board, or a small piece of substrate (when small pieces of substrate are stacked and laminated).

The electronic component device manufactured by the electronic component device manufacturing method of this embodiment may be, for example, a semiconductor device including multiple semiconductor chips, a device including a system LSI with a complementary MOS (CMOS Complementary Metal Oxide Semiconductor), or a device including a MEMS (Micro Electro Mechanical Systems) device in which mechanical elements, sensors, actuators, and electronic circuits are integrated onto a single silicon substrate, glass substrate, organic material substrate, or the like using microfabrication technology. The manufactured electronic component device may also be a device including a wiring substrate.

The following describes a method for manufacturing a semiconductor device as an example of a method for manufacturing an electronic component device.

In semiconductor device manufacturing methods, semiconductor chips are generally cut out from a semiconductor wafer (substrate) that has circuit components arranged on at least one side, and a semiconductor device is assembled that includes the cut-out semiconductor chips. In the semiconductor device manufacturing method of this embodiment, the above-described protective sheet 10 and dicing tape 20 are used as at least auxiliary tools to manufacture a semiconductor device as follows.

Specific embodiments of the semiconductor device manufacturing method will be described in detail using the first to fifth embodiments.

First Embodiment
The method for manufacturing a semiconductor device according to the first embodiment includes an assembly step of cutting semiconductor chips X out of a semiconductor wafer W having at least one surface formed as a circuit surface, and assembling a semiconductor device having such semiconductor chips X.
The assembly process includes a step of overlaying a protective sheet 10 for protecting the circuit components on at least one circuit surface of the semiconductor wafer W, the circuit surface on which the circuit components are arranged;
a step of dividing a stack of overlapping semiconductor wafers (W) and protective sheets (10) into small pieces at intervals in a surface direction, thereby producing a plurality of small pieces of a stack of semiconductor chips (X) each obtained by dividing the semiconductor wafers (W) into small pieces and small pieces of protective sheets (10) overlapping each other;
a step of removing each small piece 10' of the protective sheet overlapping the circuit surface of the semiconductor chip X;
and a step of placing the circuit surface of the semiconductor chip X facing the adherend and bonding the semiconductor chip X to the adherend.

The assembly process of the first embodiment includes, for example, the following steps.
Specifically, the assembly process of the first embodiment includes the following steps:
a mounting step of attaching the semiconductor wafer W having circuit components arranged on both sides thereof to a dicing tape 20 and fixing the semiconductor wafer W to the dicing tape 20;
a protection step (the above-mentioned overlapping step) of protecting one circuit surface of the semiconductor wafer W by attaching a protective sheet 10 thereto;
a stealth processing step in which weak portions are formed inside the semiconductor wafer W with the protective sheet 10 attached by laser light, thereby preparing the semiconductor wafer W to be diced into semiconductor chips (dies);
an expanding step (a step of producing small pieces of the laminate) in which the semiconductor wafer W and the protective sheet 10 are both divided into small pieces by stretching the dicing tape 20;
a removing step (the removing step) of removing a plurality of small pieces 10′ of the protective sheet attached to the semiconductor chip X;
a pick-up step of peeling the semiconductor chip X from the adhesive layer 22 to remove the semiconductor chip X;
and a bonding step (the above-mentioned bonding step) of bonding the extracted semiconductor chip X to an adherend. When these steps are carried out, the above-mentioned protective sheet 10 and dicing tape 20 are used as manufacturing aids.

The semiconductor wafer W before being diced into semiconductor chips X may be ground to a desired thickness by, for example, backgrinding. Specifically, in backgrinding, a semiconductor wafer W with backgrinding tape B attached to its circuit surface may be ground to reduce the thickness of the semiconductor wafer W to the thickness of the semiconductor chips X that will be fabricated later.

The semiconductor wafer W is configured to obtain multiple semiconductor chips X. Specifically, the semiconductor wafer W is configured to be divided into small pieces at intervals along multiple directions along its surface (for example, directions along its surface that are perpendicular to each other), allowing multiple semiconductor chips X to be produced. Furthermore, circuit components are arranged on at least one surface of the semiconductor wafer W, making at least one surface a circuit surface. For example, the semiconductor wafer W used in the first embodiment has both surfaces as circuit surfaces. On the other hand, the semiconductor wafer W used in other embodiments has only one surface as a circuit surface. As shown in FIG. 2C , in the first embodiment, electrode portions D as circuit components are arranged on both surfaces of the semiconductor wafer W. One electrode portion D is electrically connected to the other electrode portion D.

Specifically, the semiconductor chip X produced by dividing the semiconductor wafer W has electrode portions D arranged on both surfaces thereof and electrically connected to each other. More specifically, as shown in FIG. 2D , the electrode portions D are arranged on both surfaces of the semiconductor chip X, and conductive through vias V extending through the semiconductor chip X in the thickness direction are arranged inside the semiconductor chip X. The electrode portions D on both surfaces are electrically connected to each other via the through vias V. The electrode portions D and the through vias V are both made of a conductive material such as a metal material. The through vias V are also called TSVs. The electrode portions D and the through vias V may be made of an integrated member, or may be made by joining separately formed members together.
In recent years, with the further advancement of integration technology in the semiconductor industry, thinner semiconductor chips (e.g., thicknesses of 20 μm to 50 μm) are desired. When viewed from one side in the thickness direction, the semiconductor chip has, for example, a rectangular shape, with a side length of, for example, 5 mm to 20 mm.

Hereinafter, drawings showing the manufacturing method of the first embodiment are marked with "I." Similarly, drawings showing the second to fifth embodiments are marked with "II" to "V," respectively.

In the mounting process, the semiconductor wafer W is fixed to the dicing tape 20. As shown in FIG. 3A, a glass carrier G, for example, is attached to one circuit side of the semiconductor wafer W. The glass carrier G is placed on one circuit side of the semiconductor wafer W to support a relatively thin semiconductor wafer and facilitate handling of the semiconductor wafer. For example, the glass carrier G is attached to one circuit side of the wafer after circuits have been formed on that side, and is used while still attached to the wafer to form further circuits on the other side. The thickness of the glass carrier G is, for example, 0.5 mm or more and 5.0 mm or less.

In the mounting process, a dicing ring R is attached to the adhesive layer 22 of the dicing tape 20, and a semiconductor wafer W is attached to the exposed surface of the adhesive layer 22 (see Figure 3B). Next, the glass carrier G is peeled off from the semiconductor wafer W (see Figure 3C).

Before the subsequent protection step, as shown in Figure 3D, a wetting step may be performed to increase the humidity of the gas in contact with the circuit surface Wa of the semiconductor wafer W. If the protective sheet 10 contains a water-soluble polymer compound, performing the wetting step will improve the adhesion between the circuit surface Wa of the semiconductor wafer W and the protective sheet 10. Note that the wetting step is not required and can be performed as needed.

In the protection step, a protection sheet 10 is superimposed on the one circuit surface of the semiconductor wafer W (see FIG. 3E).
In the protection step, for example, protective sheet 10 may be superimposed on the circuit surface by directly pressing and adhering protective sheet 10 to the circuit surface. Alternatively, protective sheet 10 may be superimposed on the circuit surface by preparing a protective sheet composition containing solid components that constitute protective sheet 10 and a solvent that dissolves the solid components, applying the composition to the circuit surface, and then volatilizing the solvent to form protective sheet 10 that contacts the circuit surface.
By overlapping the protective sheet 10 on the circuit surface of the semiconductor wafer W, it is possible to prevent dust and the like from adhering to the circuit surface of the semiconductor wafer W covered with the protective sheet 10 until the protective sheet 10 is peeled off.

In the stealth processing step, weakened portions are formed inside the semiconductor wafer W to separate the semiconductor wafer W into semiconductor chips X. The weakened portions are formed inside the semiconductor wafer W by irradiating the semiconductor wafer W with laser light L (see Figure 3F). The laser light L is irradiated onto the semiconductor wafer W, for example, from the dicing tape side. Note that the laser light L is irradiated onto the semiconductor wafer W so that each semiconductor chip X, which is produced by dividing the semiconductor wafer W in the subsequent expanding step, has the electrode portion D as designed in advance. The stealth processing step can be performed, for example, using a commercially available stealth dicing device.

In the expanding process, as shown in FIG. 3G , with the dicing tape 20 and protective sheet 10 positioned on both sides of the semiconductor wafer W, the dicing tape 20 is stretched in the planar direction to increase its surface area. This divides the laminate of the semiconductor wafer W and protective sheet 10 into small pieces, and the spacing between adjacent semiconductor chips X formed by the small pieces is increased in the planar direction. Specifically, a dicing ring R is attached to the adhesive layer 22 of the dicing tape 20, which is then fixed to a holder H of an expanding device. A push-up member U included in the expanding device is pushed up from below the dicing tape 20, stretching the dicing tape 20 so that it expands in the planar direction. This results in the semiconductor wafer W and protective sheet 10 being divided into small pieces under specific temperature conditions. The temperature conditions are, for example, between −20°C and 0°C. The expanded state is released by lowering the push-up member U (this is the low-temperature expanding process).
When the expanding step is carried out at such a low temperature, the protective sheet 10 needs to be broken into small pieces. The above-described protective sheet 10 is designed to be easily broken at this time.
Furthermore, in the expanding step, the dicing tape 20 is stretched under higher temperature conditions (for example, 10° C. or higher and 25° C. or lower) so as to increase the surface area of the dicing tape 20. This causes adjacent semiconductor chips X to be separated in the planar direction of the film surface, further increasing the kerf (gap) (room temperature expanding step).
In the expanding step, the dicing tape 20 is stretched in the planar direction so as to expand the area of the dicing tape 20, thereby dividing the protective sheet 10 into small pieces together with the semiconductor wafer W. More specifically, by stretching the dicing tape 20, the semiconductor wafer W can be divided into small semiconductor chips X along the boundaries of the above-mentioned weak portions inside the semiconductor wafer. At this time, as the semiconductor wafer W is divided into small semiconductor chips X, the protective sheet 10 is also divided into small pieces.

In the removal process, as shown in Figure 3H, each small piece 10' of the protective sheet overlapping the semiconductor chip X is removed by contacting a liquid containing water with the multiple small pieces 10' of the protective sheet and dissolving at least a portion of each small piece 10' in the liquid.
By removing the protective sheet pieces 10' in this manner, all of the protective sheet pieces 10' can be removed relatively easily, and the number of foreign matters adhering to the semiconductor chip surfaces can be reduced relatively easily using the liquid. In addition, the surfaces of the semiconductor chips X that were covered by the protective sheet pieces 10' can also be cleaned with the liquid.

The protective sheet fragments 10' may be removed by dissolving all of the fragmented protective sheet (multiple protective sheet fragments 10') in the liquid. Alternatively, the protective sheet fragments 10' may be removed by dissolving some of the components of the protective sheet fragments 10' in the liquid, and peeling each of the fragments 10', whose adhesion to the semiconductor chip X has weakened, from the semiconductor chip X.

The water-containing liquid is not particularly limited as long as it is a liquid substance containing water, and may contain 30% by mass or more of water, 50% by mass or more, 70% by mass or more, 80% by mass or more, or 90% by mass or more of water.
The liquid may contain, in addition to water, a component that dissolves in water. Examples of such components include water-soluble organic solvents. Examples of such water-soluble organic solvents include monohydric alcohols having four or fewer carbon atoms, such as methanol, ethanol, propanols such as isopropyl alcohol, and butanols such as t-butanol.

In the removal step of the first embodiment, the protective sheet pieces 10' may be immersed in the stirred liquid to bring the protective sheet pieces 10' into contact with the liquid. Alternatively, the protective sheet pieces 10' may be contacted with liquid sprayed from a nozzle or the like. The temperature of the liquid is not particularly limited and may be set to, for example, 10°C or higher and 90°C or lower. From the viewpoint of being able to remove the multiple protective sheet pieces 10' in a shorter time, it is preferable that the temperature of the liquid be 40°C or higher.

For example, in the removal process, the liquid is sprayed toward the multiple semiconductor chips X attached to the adhesive layer 22 of the dicing tape 20 while rotating a disk-shaped stage supporting the dicing tape 20 from below in the circumferential direction. This allows the multiple small pieces 10' of the protective sheet overlapping the semiconductor wafer W to be removed. The stage rotation speed may be, for example, 500 rpm or more and 4000 rpm or less, the liquid spray amount may be, for example, 0.05 L/min or more and 5.0 L/min or less, and the spray time may be, for example, 5 seconds or more and 300 seconds or less.

In the above-described semiconductor device manufacturing method, the protective sheet 10 is superimposed on the surface (circuit surface) of the semiconductor wafer W on which the circuit components are arranged, preventing foreign matter from adhering to the circuit surface until the protective sheet 10 is removed. Specifically, the semiconductor wafer W is diced into small pieces while the semiconductor wafer W and protective sheet 10 are superimposed on each other to produce the semiconductor chips X, preventing foreign matter such as debris that may be generated when the semiconductor wafer W is cleaved from adhering to the circuit surface of the semiconductor chips X. Even if foreign matter is adhering to the circuit surface of the semiconductor chips X before the protective sheet 10 is superimposed, the foreign matter can be removed when the small pieces 10' of the protective sheet superimposed on the circuit surface of the semiconductor chips X are removed. This prevents foreign matter from adhering to the circuit surfaces of the semiconductor chips X that are produced.

The ingredients and physical properties of the protective sheet 10 will be explained in detail later.

In the pick-up process, as shown in Figure 3I, the semiconductor chip X is peeled off from the adhesive layer 22 of the dicing tape 20. More specifically, the pin member P is raised to push up the semiconductor chip X to be picked up through the dicing tape 20. The pushed-up semiconductor chip X is held by the suction jig J.

When performing the pick-up step in this manner, it is necessary for the semiconductor chips X to be easily peeled from the adhesive layer 22 of the dicing tape 20. Furthermore, when performing the above-mentioned expanding step, it is necessary for the semiconductor wafer W and the protective sheet 10 to be efficiently divided into small pieces by stretching the dicing tape 20. The above-mentioned dicing tape 20 is designed to be able to efficiently perform these functions.
For example, the dicing tape 20 is configured so that, when irradiated with active energy rays (e.g., ultraviolet rays), the adhesive layer 22 hardens and the adhesive strength of the adhesive layer 22 decreases. Since the adhesive layer 22 hardens after irradiation, the adhesive strength of the adhesive layer 22 can be reduced, and therefore the semiconductor chip X can be relatively easily peeled off from the adhesive layer 22 after irradiation. Dicing tapes 20 configured in this manner are commercially available.

As described above, electrode portions D, which are electrically connected to each other, are arranged on both sides of the semiconductor chip X removed by the pickup process. Electrode portions D and non-electrode portions other than electrode portions D are formed on the surface layers of one and the other sides of the semiconductor chip X. The non-electrode portions are made of, for example, an insulating material (silicon oxide). As shown in FIG. 2D , the surfaces of the electrode portions D and non-electrode portions are flush with each other on both sides of the semiconductor chip X. The electrode portions D are formed to have a thickness of, for example, 5 nm to 10 μm from the outermost surface of the semiconductor chip X. The through vias V, which are arranged to penetrate the semiconductor chip X in the thickness direction, are covered with the insulating material except for the portions that contact the electrode portions D. In other words, a portion of the surface of the through vias V extending through the semiconductor chip X in the thickness direction is covered with the insulating material, and another portion contacts the electrode portions D.

The bonding process is performed after the removal process and the pick-up process. In the bonding process, as shown in Figure 3J, for example, the semiconductor chip X is bonded to the adherend with the surface (circuit surface) of the semiconductor chip X from which the protective sheet piece 10' has been removed facing the adherend. This method of bonding the adherend and the semiconductor chip X with the circuit surface of the semiconductor chip X facing the adherend is generally referred to as flip bonding. Even with this bonding method, the removal process described above can reduce the number of foreign particles adhering to the circuit surface of the semiconductor chip X, thereby reducing the adverse effects of foreign particles that have gotten between the circuit surface of the semiconductor chip X and the adherend.

In the bonding step, for example, a semiconductor chip X is bonded to an adherend Z (such as a wiring board) so that the electrode portions D on the adherend Z and the electrode portions D on the semiconductor chip X are electrically connected to each other.
Furthermore, for example, in the bonding process, at least two semiconductor chips X are stacked, and the electrode portions D on one semiconductor chip X, which is the adherend, are directly connected to the electrode portions D on the other semiconductor chip X. In other words, the semiconductor chips X are stacked by directly connecting the electrode portions D on one semiconductor chip X to the electrode portions D on the other semiconductor chip X so that they are electrically connected to each other. As described above, since the electrode portions and non-electrode portions are arranged flush with each other on the circuit surface of the semiconductor chip, it is preferable that as few foreign matter as possible be attached to the circuit surface of the semiconductor chip X when the electrodes are directly connected to each other. In particular, it is preferable that no foreign matter be attached to the surface of the electrode portions. The manufacturing method of this embodiment can prevent foreign matter from adhering to the surface of the semiconductor chip X, and is therefore particularly effective when bonding multiple semiconductor chips X to each other as described above.
When stacking multiple semiconductor chips X as described above in the bonding process, the multiple semiconductor chips X are stacked with foreign matter prevented from adhering to their circuit surfaces, which reduces the number of foreign matter that gets between one stacked semiconductor chip X and the other stacked semiconductor chip X. This makes it possible to more reliably connect the electrode portions D between adjacent semiconductor chips X. This allows the circuits of the multiple semiconductor chips X to be electrically connected to each other with high reliability.

When directly connecting the electrode portions D to each other, for example, atomic diffusion bonding can be used. The atomic diffusion bonding process can be performed using, for example, a commercially available atomic diffusion bonding device.

In the first embodiment, in order to protect the semiconductor chip X after the bonding process, a resin sealing process may be performed in which the semiconductor chip X is sealed (covered) with a thermosetting resin or the like.

<Details of the Protective Sheet in the First Embodiment>
The thickness of the protective sheet 10 is not particularly limited, but is, for example, 1 μm or more and 100 μm or less. This thickness may be 3 μm or more, or 5 μm or more. Alternatively, this thickness may be 40 μm or less. When the protective sheet 10 is a laminate, the above thickness is the total thickness of the laminate.

The protective sheet 10 is configured to be split into small pieces by being stretched in the planar direction in the expanding process to increase its area. Each small piece of protective sheet 10 has the same area as the circuit surface of the semiconductor chip X.

The protective sheet 10 contains at least a water-soluble polymer compound so that small pieces 10' of the protective sheet overlapping the semiconductor chip X can be removed by a liquid containing water in the removal process described above.

Examples of water-soluble polymer compounds include polyvinyl alcohol (PVA) and polyvinylpyrrolidone (PVP). One of these may be used as the water-soluble polymer compound, or two or more may be used in combination.

The degree of saponification (mol %) of the polyvinyl alcohol is preferably 50 or more, more preferably 60 or more. The degree of saponification is preferably 98 or less.
When the degree of saponification of the polyvinyl alcohol is 50 or more, the polyvinyl alcohol becomes more easily dissolved in a liquid containing water in the removal step.

The above-mentioned degree of saponification is measured by proton magnetic resonance spectroscopy ( ¹ H NMR) carried out under the following analytical conditions.
If protection sheet 10 contains components other than PVA, measurement is performed after separating and extracting the PVA by methanol extraction or the like to avoid overlapping peaks in the measurement chart.
Analytical equipment: FT-NMR: "AVANCEIII-400" manufactured by Bruker Biospin
Observation frequency: 400MHz (1H)
Measurement solvent: deuterated water or deuterated DMSO
Measurement temperature: 80℃
Chemical shift standard: External standard TSP-d4 (0.00ppm) (when measuring heavy water)
: Measurement solvent (2.50 ppm) (when measuring deuterated DMSO)
The degree of saponification is calculated using the following formula based on the peaks derived from the methylene groups of the vinyl alcohol unit (VOH) (heavy water: 2.0 to 1.1 ppm, heavy DMSO: 1.9 to 1.0 ppm) and the peaks derived from the acetyl groups of the vinyl acetate unit (VAc) (heavy water: around 2.1 ppm, heavy DMSO: around 2.0 ppm). In the formula, VOH ( _-CH2- ) is the intensity of the peak derived from the methylene groups of the vinyl alcohol unit (VOH), and VAc ( _CH3CO- ) is the intensity of the peak derived from the acetyl groups of the vinyl acetate unit (VAc).

The average degree of polymerization of the polyvinyl alcohol is preferably 100 or more, more preferably 200 or more. The average degree of polymerization is preferably 1000 or less, more preferably 800 or less.
When the average polymerization degree of the polyvinyl alcohol is 200 or more, it becomes easier to form the above-described protective sheet 10. On the other hand, when the average polymerization degree of the polyvinyl alcohol is 1000 or less, the polyvinyl alcohol becomes more easily dissolved in a liquid containing water in the removal step.

The average degree of polymerization is measured by gel permeation chromatography (GPC) under the following conditions:
Analytical device: Agilent Technologies, "1260Infinity"
Column: Tosoh Corporation, TSKgel G6000PWXL + TSKgel G3000PWXL (connected in series)
Column temperature: 40°C
Eluent: 0.2 M aqueous sodium nitrate solution Flow rate: 0.8 mL/min
Injection volume: 100μL
Detector: differential refractometer (RI)
Standard samples: polyethylene glycol (PEG), polyvinyl alcohol (PVA)
The weight-average molecular weight Mw of the test sample (PVA) and that of a PVA standard sample with a known average degree of polymerization are calculated by GPC measurement using a PEG standard sample. A calibration curve is prepared from the average degrees of polymerization of the PVA standard sample and the calculated weight-average molecular weight Mw of the PVA standard sample. Using this calibration curve, the average degree of polymerization of the test sample (PVA) is calculated from the weight-average molecular weight Mw of the test sample (PVA).

The breaking elongation of the protective sheet 10 used in the manufacturing method of the first embodiment, etc. is preferably 30.0% or less at −15° C. The breaking elongation may be 20.0% or less, or may be 10.0% or less. The breaking elongation may be 0.1% or more.
By having the breaking elongation be 0.1% or more and 30.0% or less, the protective sheet 10 can be more reliably broken into small pieces in the expanding step.

The above-mentioned breaking elongation can be increased, for example, by increasing the molecular weight of the water-soluble polymer compound contained in the protective sheet 10. On the other hand, the above-mentioned breaking elongation can be decreased, for example, by decreasing the molecular weight of the water-soluble polymer compound contained in the protective sheet 10.

The breaking elongation is measured under the following conditions.
- Measuring equipment: Tensile testing machine (such as Shimadzu's "Autograph AG-IS")
Measurement sample: 30 μm thick
Test piece: a strip of 10 mm width and 50 mm length, initial chuck distance 20 mm
Pulling speed: 10 mm/sec
Measurement temperature: -15°C (measurement started after maintaining at -15°C for 5 minutes)
The elongation at break (the ratio of the stretched length to the original length) is taken as the breaking elongation (breaking elongation).

The breaking strength of the protective sheet 10 may be 500 MPa or less, or may be 200 MPa or less, at −15° C. The breaking strength may be 1.0 MPa or more. The breaking strength is the tensile force at break in the measurement of the breaking elongation described above.
By having the breaking strength be 1.0 MPa or more and 500 MPa or less, the protective sheet 10 can be more reliably broken into small pieces in the expanding step.

The above-mentioned breaking strength can be increased, for example, by increasing the molecular weight of the water-soluble polymer compound contained in the protective sheet 10. On the other hand, the above-mentioned breaking strength can be decreased, for example, by decreasing the molecular weight of the water-soluble polymer compound contained in the protective sheet 10.

The adhesion of the protective sheet 10 to the semiconductor wafer W is indicated by the peel force when peeling the protective sheet 10 from a bare silicon wafer. The peel force of the protective sheet 10 at 25°C may be 10.0 [N/10 mm] or less, or may be 8.0 N/10 mm or less. The peel force may be 0.01 [N/10 mm] or more.
By setting the peeling force to 0.01 [N/10 mm] or more and 10.0 [N/10 mm] or less, when the protective sheet 10 is divided into small pieces in the expanding step, it is possible to further prevent the small pieces of the protective sheet 10 from being unintentionally peeled off from the semiconductor chip X.

The above peel force can be increased, for example, by increasing the molecular weight of the water-soluble polymer compound contained in the protective sheet 10. On the other hand, the above peel force can be decreased, for example, by decreasing the molecular weight of the water-soluble polymer compound contained in the protective sheet 10.

The peel force is measured under the following conditions.
To measure the peel strength of one surface of the protective sheet 10 (the surface to be attached to the semiconductor wafer W), a measurement sample was prepared as follows. First, a backing tape was attached to the surface opposite the one surface of the protective sheet 10 at 25°C using a hand roller. Next, a measurement sample was processed to a width of 100 mm, and a bare silicon wafer was attached to the one surface of the protective sheet 10. The attachment was performed under conditions of 90°C and 10 mm/sec. Then, in an atmosphere of 23°C, the protective sheet 10 together with the backing tape was peeled from the bare wafer at a peel angle of 180° and a peel rate of 300 mm/min to measure the peel strength. Finally, the measured value was converted to be expressed in units of [N/10 mm]. An Autograph (manufactured by Shimadzu Corporation), for example, can be used as a measuring device.

The tensile modulus (tensile storage modulus E') of the protective sheet 10 at -15°C is preferably 0.01 GPa or more and 10.0 GPa or less. The tensile modulus may be 0.05 GPa or more, or 0.10 GPa or more. The tensile modulus may be 5.0 GPa or less, or 3.0 GPa or less.
By ensuring that the tensile modulus at −15° C. is 0.01 GPa or more and 10.0 GPa or less, the protective sheet 10 can be more reliably broken into small pieces in the expanding step.

The modulus of elasticity (tensile modulus) of the protective sheet 10 can be increased, for example, by increasing the molecular weight of the water-soluble polymer compound contained in the protective sheet 10. On the other hand, the tensile modulus can be decreased, for example, by decreasing the molecular weight of the water-soluble polymer compound contained in the protective sheet 10.

The tensile modulus is measured under the following conditions.
Measurement equipment: Solid viscoelasticity measuring equipment (e.g., "RSAIII" manufactured by TA Instruments)
Measurement sample: thickness 50 μm
Test piece: a strip of 10 mm width and 40 mm length, initial chuck distance 20 mm
Measurement mode: Tensile mode Frequency: 1 Hz, heating rate: 10°C/min, distortion: 0.1%
Measurement temperature range: -40°C to 80°C (heating begins after holding at -40°C for 5 minutes)
- Read the tensile modulus (tensile storage modulus) [MPa] at -15°C and 25°C

The surface free energy of the protective sheet 10 may be 70 [mJ/m ² ] or less, or may be 65 [mJ/m ² ] or less at 25° C. The surface free energy may be 30 [mJ/m ² ] or more.
When the surface free energy is within the above range, the water wettability of the protective sheet 10 is suitably good, and the protective sheet 10 can be removed more easily in the removal step.

The above surface free energy can be increased, for example, by increasing the proportion of hydrophilic groups (such as -OH groups) in the molecules of the water-soluble polymer compound. On the other hand, the above surface free energy can be decreased, for example, by increasing the proportion of hydrophobic groups (such as alkyl groups) in the molecules of the water-soluble polymer compound.

The surface free energy is calculated from the results of contact angle measurements. Specifically, the contact angles of droplets of water (H ₂ O) and methylene iodide (CH ₂ I ₂ ) that come into contact with the surface of the protective sheet 10 are measured using a contact angle meter at 20°C and a relative humidity of 65%.
Next, the surface free energy is calculated from the measured values of the water contact angle θw and the methylene iodide contact angle θi as follows: Specifically, γs ^d (dispersion component of surface free energy) and ^γsh (polar component of surface free energy) are calculated according to the method of Owens et al. described in Journal of Applied Polymer Science, vol. 13, pp. 1741-1747 (1969).
The value γs (=γs ^d + ^γsh ) obtained by adding γs ^d and ^γsh is defined as the surface free energy of the protective sheet 10 .
The values of γs ^d (dispersion component) and ^γsh (polar component) are obtained as solutions to the simultaneous equations with two unknowns shown in the following formulas (1) and (2): In formulas (1) and (2), γw is the surface free energy of water, ^γwd is the dispersion component of the surface free energy of water, ^γwh is the polar component of the surface free energy of water, γi is the surface free energy of methyl iodide, ^γid is the dispersion component of the surface free energy of methyl iodide, and ^γih is the polar component of the surface free energy of methyl iodide, and are known values as shown below.
γw=72.8 [mJ/m ² ]
γw ^d =21.8 [mJ/m ² ]
γw ^h =51.0 [mJ/m ² ]
γi=50.8 [mJ/m ² ]
^γid = 48.5 [mJ/m ² ]
γi ^h =2.3 [mJ/m ² ]

Specifically, the surface free energy of one surface (the surface attached to the semiconductor wafer W) of the protective sheet 10 is measured. The contact angles of water and methylene iodide are measured, and the average of five measurements is used. 1 mL of liquid is dropped onto the surface, and the contact angle is measured within 5 seconds. The dispersive component and polar component are calculated from each contact angle measurement, and the surface free energy is determined by their sum.

Next, the second to fifth embodiments will be described in detail. Note that the same explanations as for the first embodiment will not be repeated for the second to fifth embodiments. Unless otherwise specified, the same operations as for the first embodiment can be performed in the second to fifth embodiments.

Second Embodiment
The method for manufacturing a semiconductor device according to the second embodiment includes the steps described above, similar to the method for manufacturing a semiconductor device according to the first embodiment.
However, the manufacturing method of the semiconductor device of the second embodiment differs from the manufacturing method of the semiconductor device of the first embodiment in that circuit components are arranged on one side of the semiconductor wafer W, in the structure and components contained in the protective sheet 10, and in the method of removing the protective sheet 10 in the removal process.

More specifically, in the semiconductor device manufacturing method of the second embodiment, the protective sheet 10 contains a curable composition, and the protective sheet 10 superimposed on the circuit surface of the semiconductor wafer W is cured by a curing process, and then the laminate of the semiconductor wafer W and the protective sheet 10 is cut into small pieces.

The protective sheet 10 used in the second embodiment contains a curable composition that is cured by a curing treatment. For example, the protective sheet 10 is formed from a curable composition.
The curable composition contains a curable compound that initiates a curing reaction by a curing treatment, such as irradiation with active energy rays such as ultraviolet rays or heat treatment.
In the second embodiment, since the protective sheet 10 is hardened by the curing treatment, the protective sheet 10 can be more easily divided into small pieces in the expanding step. Furthermore, the adhesive strength of the protective sheet 10 can be reduced by hardening the protective sheet 10 by the curing treatment. Therefore, after the curing treatment, each small piece 10' of the protective sheet can be relatively easily peeled off from each semiconductor chip X.

In the second embodiment, as shown in FIG. 4A, a semiconductor wafer W and a protective sheet 10 are stacked in this order on a dicing tape 20 in the same manner as in the first embodiment. A release liner 15 is preferably attached to the protective sheet 10. Then, as shown in FIG. 4B, a stealth processing step is performed on the semiconductor wafer W in the same manner as in the first embodiment.

For example, the protective sheet 10 used in the second embodiment is cured by irradiation with ultraviolet light M or the like, as shown in Figure 4C. Specifically, the adhesive layer 22 is adhered to one side of the semiconductor wafer W, and the protective sheet 10 is adhered to the other side of the semiconductor wafer W, and then ultraviolet light or the like is irradiated onto at least the protective sheet 10. The protective sheet 10 is cured by irradiation with ultraviolet light or the like. Thereafter, as shown in Figure 4D, the release liner 15 is peeled off from the protective sheet 10. Furthermore, as shown in Figure 4E, the semiconductor wafer W and protective sheet 10 are divided into small pieces in the same manner as in the first embodiment.

(Removal step in the second embodiment)
In the removal step in the second embodiment, a release adhesive tape T is used to peel off the small piece 10' of the protective sheet from the semiconductor chip X. As the release adhesive tape T, for example, a commercially available adhesive tape can be used.

In the removal process of the second embodiment, as shown in Figure 4F, the release adhesive tape T attached to the multiple small pieces 10' of the protective sheet is peeled off, thereby removing the multiple small pieces 10' of the protective sheet together with the release adhesive tape T.
In this way, by using the peeling adhesive tape T, it is possible to remove the multiple small pieces 10' of the protective sheet relatively easily. Furthermore, when peeling off the multiple small pieces 10' of the protective sheet, foreign matter adhering to the circuit surface of the semiconductor can also be removed.

The adhesion of the protective sheet 10 used in the second embodiment to the semiconductor wafer W is indicated, for example, by the peel force when peeling the protective sheet 10 from a bare silicon wafer. The method for measuring this peel force is as described above. Note that the peel force between the protective sheet 10 and the semiconductor chip X is smaller than the peel force between the protective sheet 10 and the release adhesive tape T after the curing treatment described above.

<Details of the Protective Sheet in the Second Embodiment>
The protective sheet 10 used in the second embodiment contains, for example, an acrylic polymer, an isocyanate compound, and a polymerization initiator.

The above acrylic polymer contains at least an alkyl (meth)acrylate structural unit, a hydroxyl group-containing (meth)acrylate structural unit, and a polymerizable group-containing (meth)acrylate structural unit in the molecule. The structural units are units that constitute the main chain of the acrylic polymer. Each side chain in the above acrylic polymer is included in each structural unit that constitutes the main chain.

The alkyl (meth)acrylate structural unit is derived from an alkyl (meth)acrylate monomer. In other words, the molecular structure resulting from the polymerization of the alkyl (meth)acrylate monomer is the alkyl (meth)acrylate structural unit. The term "alkyl" refers to the number of carbon atoms in the hydrocarbon moiety ester-bonded to the (meth)acrylic acid.
The hydrocarbon portion of the alkyl portion in the structural unit of the alkyl (meth)acrylate may be a saturated hydrocarbon or an unsaturated hydrocarbon. The number of carbon atoms in the alkyl portion may be 6 or more and 10 or less.

The acrylic polymer has a hydroxyl group-containing (meth)acrylate structural unit, and the hydroxyl group of such a structural unit easily reacts with an isocyanate group.
By allowing an acrylic polymer having a hydroxyl group-containing (meth)acrylate structural unit and an isocyanate compound to coexist in protective sheet 10, protective sheet 10 can be appropriately cured. This allows the acrylic polymer to be sufficiently gelled. As a result, protective sheet 10 can maintain its shape while exhibiting adhesive properties.

The structural unit of the hydroxyl group-containing (meth)acrylate is preferably a structural unit of a hydroxyl group-containing C2 to C14 alkyl (meth)acrylate. The term "C2 to C14 alkyl" refers to the number of carbon atoms (2 to 14) in the hydrocarbon moiety ester-bonded to the (meth)acrylic acid. In other words, the hydroxyl group-containing C2 to C14 alkyl (meth)acrylate monomer refers to a monomer in which (meth)acrylic acid is ester-bonded to an alcohol (usually a dihydric alcohol) having 2 to 14 carbon atoms.
The hydrocarbon portion of the C2 to C14 alkyl is usually a saturated hydrocarbon. For example, the hydrocarbon portion of the C2 to C14 alkyl is a linear saturated hydrocarbon or a branched saturated hydrocarbon. It is preferable that the hydrocarbon portion of the C2 to C14 alkyl does not contain a polar group containing oxygen (O), nitrogen (N), or the like.

Examples of structural units of hydroxyl group-containing C2 to C14 alkyl (meth)acrylate include structural units of hydroxybutyl (meth)acrylate, such as hydroxyethyl (meth)acrylate, hydroxypropyl (meth)acrylate, hydroxy n-butyl (meth)acrylate, and hydroxy isobutyl (meth)acrylate. In the structural unit of hydroxybutyl (meth)acrylate, the hydroxyl group (-OH group) may be bonded to a terminal carbon (C) of the hydrocarbon moiety, or to a carbon (C) other than the terminal of the hydrocarbon moiety.

The acrylic polymer contains a structural unit of a polymerizable group-containing (meth)acrylate having a polymerizable unsaturated double bond in the side chain.
Because the acrylic polymer contains a polymerizable group-containing (meth)acrylate structural unit, the protective sheet 10 can be cured by irradiation with active energy rays (such as ultraviolet rays) before the pickup step. Specifically, irradiation with active energy rays such as ultraviolet rays generates radicals from the photopolymerization initiator, and the action of these radicals can cause a crosslinking reaction between the acrylic polymers. This reduces the adhesive strength of the protective sheet 10 before irradiation. This allows the protective sheet pieces 10' to be easily peeled off from the semiconductor chip X.
The active energy rays include ultraviolet rays, radioactive rays, and electron beams.

Specifically, the structural unit of the polymerizable group-containing (meth)acrylate may have a molecular structure in which the isocyanate group of the isocyanate group-containing (meth)acrylate monomer is urethane-bonded to the hydroxyl group of the structural unit of the hydroxyl group-containing (meth)acrylate described above.

The polymerizable group-containing (meth)acrylate structural unit having a polymerizable group can be prepared after polymerization of the acrylic polymer. For example, after copolymerization of an alkyl (meth)acrylate monomer with a hydroxyl group-containing (meth)acrylate monomer, the hydroxyl groups in some of the hydroxyl group-containing (meth)acrylate structural units can be subjected to a urethane reaction with the isocyanate groups of the isocyanate group-containing polymerizable monomer to obtain the polymerizable group-containing (meth)acrylate structural unit.

The above-mentioned isocyanate group-containing (meth)acrylate monomer preferably has one isocyanate group and one (meth)acryloyl group in the molecule. An example of such a monomer is 2-isocyanatoethyl (meth)acrylate.

The protective sheet 10 may further contain an isocyanate compound having multiple isocyanate groups in its molecule. This allows the crosslinking reaction between the acrylic polymers in the protective sheet 10 to proceed. Specifically, one isocyanate group of the isocyanate compound can be reacted with a hydroxyl group of an acrylic polymer, and the other isocyanate group can be reacted with a hydroxyl group of another acrylic polymer, thereby allowing the crosslinking reaction via the isocyanate compound to proceed.

Examples of isocyanate compounds include diisocyanates such as aliphatic diisocyanates, alicyclic diisocyanates, and araliphatic diisocyanates. Further examples of isocyanate compounds include polymerized polyisocyanates such as diisocyanate dimers and trimers, and polymethylene polyphenylene polyisocyanates.

In addition, examples of the isocyanate compound include polyisocyanates obtained by reacting an excess amount of the above-mentioned isocyanate compound with an active hydrogen-containing compound, such as an active hydrogen-containing low molecular weight compound or an active hydrogen-containing high molecular weight compound.
As the isocyanate compound, allophanated polyisocyanate, biureted polyisocyanate, etc. may also be used.
The above isocyanate compounds may be used alone or in combination of two or more.

The above-mentioned isocyanate compound is preferably a reaction product of an aromatic diisocyanate and an active hydrogen-containing low-molecular-weight compound. Because the reaction rate of the isocyanate group in the reaction product of an aromatic diisocyanate is relatively slow, excessive curing of the protective sheet 10 containing such a reaction product is suppressed. The above-mentioned isocyanate compound is preferably one having three or more isocyanate groups in the molecule.

The polymerization initiator contained in the protective sheet 10 is a compound that can initiate a polymerization reaction when heat or light energy is applied. By including the polymerization initiator in the protective sheet 10, a cross-linking reaction between acrylic polymers can be promoted when heat energy or light energy is applied to the protective sheet 10. Specifically, a polymerization reaction between polymerizable groups can be initiated between acrylic polymers having structural units of polymerizable group-containing (meth)acrylate, thereby curing the protective sheet 10. This reduces the adhesive strength of the protective sheet 10, allowing the cured protective sheet pieces 10' to be easily peeled off from the semiconductor chip X in the removal process.
As the polymerization initiator, for example, a photopolymerization initiator or a thermal polymerization initiator is used. As the polymerization initiator, a general commercially available product can be used.

The protective sheet 10 in the second embodiment can be produced as follows. Specifically, an acrylic polymer is synthesized, and the solvent is volatilized from a pressure-sensitive adhesive composition containing the acrylic polymer, an isocyanate compound, a polymerization initiator, and a solvent to produce the protective sheet 10.

In the synthesis of an acrylic polymer, for example, an alkyl (meth)acrylate monomer and a hydroxyl group-containing (meth)acrylate monomer are radically polymerized to synthesize an acrylic polymer intermediate.
Radical polymerization can be carried out by a common method. For example, an acrylic polymer intermediate can be synthesized by dissolving the above-mentioned monomers in a solvent, stirring the mixture while heating, and adding a polymerization initiator. In order to adjust the molecular weight of the acrylic polymer, polymerization may be carried out in the presence of a chain transfer agent.
Next, some of the hydroxyl groups in the hydroxyl group-containing (meth)acrylate structural units contained in the acrylic polymer intermediate are bonded to the isocyanate groups of the isocyanate group-containing polymerizable monomer by a urethane reaction, whereby some of the hydroxyl group-containing (meth)acrylate structural units become polymerizable group-containing (meth)acrylate structural units.
The urethane reaction can be carried out by a conventional method. For example, an acrylic polymer intermediate and an isocyanate group-containing polymerizable monomer are stirred under heating in the presence of a solvent and a urethane catalyst. This allows the isocyanate groups of the isocyanate group-containing polymerizable monomer to form a urethane bond with some of the hydroxyl groups of the acrylic polymer intermediate.

Next, an acrylic polymer, an isocyanate compound, and a polymerization initiator are dissolved in a solvent to prepare a pressure-sensitive adhesive composition. The viscosity of the composition can be adjusted by changing the amount of solvent. Next, the pressure-sensitive adhesive composition is applied to a release liner 15 (described later). Typical application methods include roll coating, screen coating, and gravure coating. The applied composition is then subjected to a solvent removal process, solidification process, etc., to solidify the applied pressure-sensitive adhesive composition, producing the protective sheet 10.

2A , the protective sheet 10 in the second embodiment may have a release liner 15 superimposed on at least one surface thereof before or during use. The release liner 15 is configured to be easily peelable from the protective sheet 10.
More specifically, a release liner 15 may be attached before or during use to at least one of the surface of protective sheet 10 that will overlap the circuit surface of semiconductor wafer W or the surface opposite to said surface. Release liner 15 is used to protect protective sheet 10, and is peeled off and removed after protective sheet 10 is attached to semiconductor wafer W.

The release liner 15 can be used as a support material for supporting the protective sheet 10. The release liner 15 is preferably used when overlaying the protective sheet 10 on the semiconductor wafer W. Specifically, the protective sheet 10 can be attached to the semiconductor wafer W by overlaying the protective sheet 10 on the semiconductor wafer W while the release liner 15 and the protective sheet 10 are laminated together. The release liner 15 can then be peeled off.
Furthermore, a release liner 15 may be attached to the protective sheet 10 so that the protective sheet 10 is disposed between two release liners 15 .

The thickness of the release liner 15 may be, for example, 25 μm or more and 75 μm or less. The release liner 15 is preferably a resin film such as a polyethylene terephthalate resin film. The release liner 15 is preferably light-transmitting (ultraviolet-transmitting). The release liner 15 can be, for example, a plastic film or paper that has been surface-treated with a release agent such as a silicone-based, long-chain alkyl-based, fluorine-based, or molybdenum sulfide-based release agent. Commercially available release liner 15 products, such as "Diafoil MRA50" (biaxially oriented polyester film manufactured by Mitsubishi Chemical Corporation), can also be used.

The protective sheet 10 in the second embodiment may, for example, contain a curable compound that is cured by active energy rays as described above, or may contain a curable compound that can initiate a curing reaction by heat treatment.
Examples of curable compounds that can initiate a curing reaction by heat treatment include thermosetting resins.
Furthermore, examples of the curable compound that is cured by active energy rays include ultraviolet-curable polyurethane resins.
The curable compound also includes a curable silicone resin composition.

Examples of thermosetting resins include epoxy resins, phenolic resins, amino resins, unsaturated polyester resins, and thermosetting polyimide resins. Only one type of the above thermosetting resins may be used, or two or more types may be used.

Examples of the epoxy resins include bisphenol A, bisphenol F, bisphenol S, brominated bisphenol A, hydrogenated bisphenol A, bisphenol AF, biphenyl, naphthalene, fluorene, phenol novolac, orthocresol novolac, trishydroxyphenylmethane, tetraphenylolethane, hydantoin, trisglycidyl isocyanurate, and glycidylamine epoxy resins.

Phenol resins can act as curing agents for epoxy resins, and examples of phenolic resins include novolac-type phenolic resins, resol-type phenolic resins, and polyoxystyrenes such as polyparaoxystyrene.
Examples of novolac type phenolic resins include phenol novolac resins, phenol aralkyl resins, cresol novolac resins, tert-butylphenol novolac resins, and nonylphenol novolac resins.
As the phenolic resin, one kind alone or two or more kinds may be employed.

Examples of UV-curable polyurethane resins include compounds whose molecules contain a main chain composed of multiple urethane bonds and a side chain containing a (meth)acrylic group. Commercially available UV-curable polyurethane resins include the "8UH Series" manufactured by Taisei Fine Chemical Co., Ltd.

Examples of curable silicone resin compositions include compositions that contain silicone resins with silanol groups in the molecule and can be cured by a condensation reaction of the silanol groups, compositions that can be cured by a hydrosilylation reaction between alkenyl groups and SiH groups, and compositions that contain silicone resins with polymerizable unsaturated groups in the molecule and can be cured by a radical polymerization reaction.

In the second embodiment, the breaking elongation and breaking strength of the protective sheet 10 before and after the curing treatment may be the same as the breaking elongation and breaking strength of the protective sheet 10 in the first embodiment described above, respectively.

In the second embodiment, the adhesion of the protective sheet 10 to the semiconductor wafer W before and after the curing process can be measured using the peel force described in the first embodiment. This peel force may be the same as the peel force of the protective sheet 10 used in the first embodiment.

The protective sheet 10 used in the second embodiment preferably has a tensile modulus (tensile storage modulus E') at 25°C before curing treatment of 1.0 MPa or more and 1.0 GPa or less. Also, the tensile modulus (tensile storage modulus E') at -15°C before curing treatment of 2.0 MPa or more and 1.0 GPa or less.
The protective sheet 10 used in the second embodiment preferably has a tensile modulus (tensile storage modulus E') at 25°C after curing treatment of 5.0 MPa or more and 10.0 GPa or less. Also, the tensile modulus (tensile storage modulus E') at -15°C after curing treatment of 10.0 MPa or more and 10.0 GPa or less.

In the second embodiment, steps not specifically mentioned can be performed in the same manner as the steps in the first, third, fourth, or fifth embodiment.

Next, the third embodiment will be described in detail. Note that the same explanations as those for the first and second embodiments will not be repeated for the third embodiment. Unless otherwise specified, the same operations as those for the first or second embodiment can be performed in the third embodiment.

"Third embodiment"
The manufacturing method of the semiconductor device of the third embodiment differs from the second embodiment mainly in that, in the mounting process, the semiconductor wafer W superimposed on the glass carrier G is not attached to the adhesive layer 22 of the dicing tape 20, but the semiconductor wafer W is attached to the adhesive layer 22 in a state where the semiconductor wafer W and the protective sheet 10 are stacked.

More specifically, in the semiconductor device manufacturing method of the third embodiment, a semiconductor wafer W attached to a backgrind tape B is prepared, as shown in Figure 5A.

In the protection step, as shown in Figure 5B, a protective sheet 10 is attached to the semiconductor wafer W. At this time, the protective sheet 10 is attached to one side of the semiconductor wafer W, and backgrid tape is attached to the other side. The circuit components are arranged on one side of the semiconductor wafer W.

Next, in the mounting process, as shown in FIG. 5C, the backgrid tape is peeled off from the semiconductor wafer W while the semiconductor wafer W and protective sheet 10 are overlapping. This causes the semiconductor wafer W and protective sheet 10 to overlap, exposing the other surface (the non-circuit surface) of the semiconductor wafer W.

In the mounting process of the third embodiment, as shown in FIG. 5D, with the semiconductor wafer W and protective sheet 10 overlapping, the other exposed surface of the semiconductor wafer W is attached to the adhesive layer 22 of the dicing tape 20. At this time, because the protective sheet 10 and the release liner 15 are attached to one surface of the semiconductor wafer W, the semiconductor wafer W can be pressed against the adhesive layer 22 via the protective sheet 10 and the release liner 15. Therefore, the circuit surface of the semiconductor wafer W can be protected while the semiconductor wafer W is attached to the adhesive layer 22.

In the mounting process, the protective sheet 10 is placed on the semiconductor wafer W with the release liner 15 laminated to the protective sheet 10, and it is preferable to peel the release liner 15 from the protective sheet 10 before the protective sheet 10 is broken into small pieces in the expanding process.

In the third embodiment, steps not specifically mentioned can be performed in the same manner as the steps in the first, second, fourth, or fifth embodiment.
In the third embodiment, as well as the fourth and fifth embodiments described below, the removal step described in the first embodiment may be performed, or the removal step described in the second embodiment may be performed. In other words, in each of the removal steps in the third to fifth embodiments, the protective sheet pieces 10′ may be removed using a liquid containing water, or the protective sheet pieces 10′ may be removed using a releasing adhesive tape T, using a method similar to that described above.

Next, the fourth embodiment will be described in detail. Note that the same explanations as those for the first to third embodiments will not be repeated for the fourth embodiment. Unless otherwise specified, operations similar to those in the first to third embodiments can be performed in the fourth embodiment.

Fourth Embodiment
The method for manufacturing a semiconductor device according to the fourth embodiment differs from the third embodiment mainly in that, before the mounting step, a semiconductor wafer W is irradiated with laser light to form a fragile portion inside the wafer.
In detail, the method for manufacturing the semiconductor device according to the fourth embodiment includes the following steps:
a stealth processing step in which a weakened portion is formed inside the semiconductor wafer W to which the backgrind tape B is attached by a laser beam, thereby preparing the semiconductor wafer W for dicing;
a protection step of protecting the circuit surface of the semiconductor wafer W by attaching a protective sheet 10 to one surface of the semiconductor wafer W;
a mounting step of attaching the other surface (e.g., the surface opposite to the circuit surface) of the semiconductor wafer W to a dicing tape 20 to fix the semiconductor wafer W to the dicing tape 20;
a curing treatment step of curing protective sheet 10 by irradiation with active energy rays or the like to reduce the adhesive strength of protective sheet 10;
an expanding step of expanding the dicing tape 20 to divide the semiconductor wafer W and the protective sheet 10 into small pieces;
a removing step of removing the small piece 10' of the protective sheet attached to the semiconductor chip X;
a pick-up step of peeling the semiconductor chip X from the adhesive layer 22 to remove the semiconductor chip X;
and a bonding step of bonding the semiconductor chip X to an adherend.

In the fourth embodiment, as shown in FIG. 6A, a semiconductor wafer W is prepared overlapping a backgrind tape B. Note that the semiconductor wafer W in this state has been thinned to the desired thickness, for example, by undergoing backgrinding processing with the backgrind tape B still attached.

In the stealth processing step of the fourth embodiment, as shown in Figure 6B, laser light is irradiated onto a semiconductor wafer W overlapping with backgrind tape B. The backgrind tape B is attached, for example, to the surface of the semiconductor wafer W opposite the circuit surface. The laser light is irradiated, for example, from the circuit surface side of the semiconductor wafer W.

In the protection step of the fourth embodiment, as in the third embodiment, a protective sheet 10 is attached to the semiconductor wafer W as shown in FIG. 6C. This results in the protective sheet 10 overlapping one surface (circuit surface) of the semiconductor wafer W, and the backgrind tape B overlapping the other surface. The backgrind tape B is then peeled off from the semiconductor wafer W. Note that a release liner 15 may be overlapping the protective sheet 10, as shown in FIG. 6C.

Then, as shown in Figures 6D and 6E, the mounting process can be carried out in the same manner as in the second embodiment (see also Figure 4A). Then, as shown in Figure 6F, the protective sheet 10 can be subjected to a curing process in the same manner as in the second embodiment (see also Figure 4C).

In the fourth embodiment, steps not specifically mentioned can be performed in the same manner as the steps in the first, second, or third embodiment.

Finally, the fifth embodiment will be described in detail. Note that for the fifth embodiment, the same explanations as for the first to fourth embodiments will not be repeated. In the fifth embodiment, unless otherwise specified, operations similar to those in the first to fourth embodiments can be performed.

Fifth Embodiment
The manufacturing method of the semiconductor device of the fifth embodiment differs from the other embodiments mainly in that the semiconductor wafer W is attached to the adhesive layer 22 of the dicing tape 20 with a protective sheet 10 placed between the semiconductor wafer W and the backgrinding tape B.
7A , in the method for manufacturing a semiconductor device according to the fifth embodiment, a protective sheet 10 is superimposed on the circuit surface of a semiconductor wafer W, and then a backgrind tape B is superimposed on the protective sheet 10. Note that the backgrind tape B may be superimposed on one surface of the protective sheet 10, and then the semiconductor wafer W may be superimposed on the other surface of the protective sheet 10, or the semiconductor wafer W may be superimposed on the other surface of the protective sheet 10 before the backgrind tape B is superimposed on one surface of the protective sheet 10.

With the semiconductor wafer W, protective sheet 10, and backgrinding tape B stacked together, grinding is performed on the side of the semiconductor wafer W on which the circuit components are not located. More specifically, as shown in Figure 7A, grinding (backgrinding) is performed using a grinding pad K until the semiconductor wafer W reaches a predetermined thickness. Through grinding, the thickness of the semiconductor wafer W is reduced to the predetermined thickness (see Figure 7B).

Next, in the mounting process, the ground surface of the semiconductor wafer W (the surface without circuit components) is placed on the adhesive layer 22 of the dicing tape 20. At this time, as shown in Figure 7C, a protective sheet 10 is attached to the circuit surface of the semiconductor wafer W, and a backgrinding tape B is further attached to the protective sheet 10.

After the semiconductor wafer W is superimposed on the adhesive layer 22 of the dicing tape 20, the stealth processing step can be carried out using the same method as described above. Then, the protective sheet 10 attached to the semiconductor wafer W is peeled away from the backgrind tape B, and the backgrind tape B is removed (see Figure 7D). Note that the stealth processing step may also be carried out after the backgrind tape B has been removed.

Then, using methods similar to those described above, a curing process can be carried out to harden the protective sheet 10 and reduce its adhesive strength, an expanding process to break the semiconductor wafer W and protective sheet 10 into small pieces, a removal process to remove the small pieces 10' of the protective sheet attached to the semiconductor chip X, a pick-up process to remove the semiconductor chip X, and a bonding process to bond the semiconductor chip X to an adherend.

The manufacturing method of the electronic component device (for example, semiconductor device) according to the embodiment of the present invention is as exemplified above, but the present invention is not limited to the manufacturing method of the electronic component device exemplified above.
That is, various forms used in general manufacturing methods of electronic component devices can be adopted within the scope that does not impair the effects of the present invention.

For example, as described above, the substrate (e.g., a semiconductor wafer) used in the manufacturing method of the present invention may be a substrate having circuit components arranged on both sides, as described in the first embodiment, or may be a substrate having circuit components arranged on only one side, as described in the other embodiments. In other words, only one side of the substrate produced in the manufacturing method of the present invention may be a circuit surface, or both sides may be circuit surfaces.

The matters disclosed by this specification include the following.
(I)
a step of overlaying a protective sheet for protecting the circuit components on at least one surface of the substrate, the circuit surface on which the circuit components are arranged;
a step of dividing a laminate in which the substrate and the protective sheet are overlapped into small pieces at intervals in a surface direction, thereby producing small pieces of the laminate in which substrate chips obtained by dividing the substrate into small pieces and small pieces of the protective sheet are overlapped;
and removing the small pieces of the protective sheet that overlap the circuit surface of the substrate chip.
(II)
The method for manufacturing an electronic component device according to (I) above, further comprising the step of placing the circuit surface of the substrate chip facing the adherend and bonding the substrate chip to the adherend.
(III)
the protective sheet contains a water-soluble polymer compound,
The method for manufacturing an electronic component device described in (I) or (II) above, wherein the removing step removes the multiple small pieces of the protective sheet by contacting a liquid containing water with the multiple small pieces of the protective sheet and dissolving at least a portion of each small piece in the liquid.
(IV)
The method for manufacturing an electronic component device according to (III) above, further comprising the step of increasing humidity of the gas in contact with the circuit surface before the removing step.
(V)
The method for manufacturing an electronic component device according to (I) or (II) above, wherein in the removing step, the release adhesive tape attached to the plurality of small pieces of the protective sheet is peeled off, thereby removing the plurality of small pieces of the protective sheet together with the release adhesive tape.
(VI)
the protective sheet comprises a curable composition,
The method for manufacturing an electronic component device according to (V) above, wherein the protective sheet overlapping the substrate is cured by a curing treatment, and then the laminate of the substrate and the protective sheet is divided into small pieces.
(VII)
The electrode portions as the circuit components arranged on both surfaces of the substrate chip are electrically connected to each other,
A method for manufacturing an electronic component device according to any one of claims (II) to (VI), wherein in the joining step, a plurality of the substrate chips are stacked and the electrode portions of one of the substrate chips, which is the adherend, are directly connected to the electrode portions of the other of the substrate chips.

The subject matter disclosed by this specification further includes the following.
(1)
a step of overlaying a protective sheet for protecting the circuit components on at least one circuit surface of the semiconductor wafer on which the circuit components are arranged;
a step of dividing the stack of the semiconductor wafer and the protective sheet into small pieces at intervals in a surface direction, thereby producing small pieces of the stack in which semiconductor chips obtained by dividing the semiconductor wafer into small pieces and small pieces of the protective sheet are overlapped with each other;
and removing the small pieces of the protective sheet that overlap the circuit surface of the semiconductor chip.
(2)
The method for manufacturing a semiconductor device according to (1) above, further comprising the step of placing the circuit surface of the semiconductor chip facing the adherend and bonding the semiconductor chip to the adherend.
(3)
The method for manufacturing a semiconductor device described in (1) or (2) above, wherein the laminate of the semiconductor wafer and the protective sheet is overlapped on one side of a dicing tape, and the dicing tape is stretched in the planar direction to divide the laminate into small pieces, thereby producing the small pieces of the laminate.
(4)
the protective sheet contains a water-soluble polymer compound,
A method for manufacturing a semiconductor device described in any one of (1) to (3) above, wherein the removing step removes the multiple small pieces of the protective sheet by contacting a liquid containing water with the multiple small pieces of the protective sheet and dissolving at least a portion of each small piece in the liquid.
(5)
The method for manufacturing a semiconductor device according to (4) above, wherein the water-soluble polymer compound contains at least one of polyvinyl alcohol and polyvinylpyrrolidone.
(6)
The method for manufacturing an electronic component device according to (5) above, further comprising, before the removing step, a step of increasing humidity of the gas in contact with the circuit surface.
(7)
The method for manufacturing a semiconductor device according to any one of (1) to (3) above, wherein in the removing step, a release adhesive tape attached to the plurality of small pieces of the protective sheet is peeled off, thereby removing the plurality of small pieces of the protective sheet together with the release adhesive tape.
(8)
the protective sheet comprises a curable composition,
The method for manufacturing a semiconductor device described in (7) above, wherein the protective sheet overlapping the semiconductor wafer is hardened by a hardening treatment, and then the laminate of the semiconductor wafer and the protective sheet is divided into small pieces.
(9)
The method for manufacturing a semiconductor device according to (8) above, wherein the curable composition contains at least one curable compound selected from the group consisting of a compound containing a polymerizable carbon-carbon double bond in its molecule, a compound containing a glycidyl group in its molecule, a compound containing an isocyanate group in its molecule, a compound containing a carboxy group in its molecule, and a compound containing a hydroxy group in its molecule.
(10)
the semiconductor chip has electrodes arranged on both surfaces thereof and electrically connected to each other;
The method for manufacturing a semiconductor device according to any one of (1) to (9) above, wherein in the bonding step, at least two of the semiconductor chips are stacked and the electrode portion of one of the semiconductor chips, which is the adherend, is directly connected to the electrode portion of the other semiconductor chip.

The present invention will now be explained in more detail using experimental examples, but the present invention is not limited to these.

As an example of a method for manufacturing an electronic component device, a semiconductor device was manufactured as follows.

A commercially available dicing tape (product name "V-12SR" manufactured by Nitto Denko Corporation) was prepared. A bare silicon wafer was used instead of a semiconductor wafer.
A protective sheet was prepared as follows. When preparing the protective sheet, a solvent-containing composition for the protective sheet was applied to one side of a release liner, and the solvent was evaporated to laminate the protective sheet and release liner. The release liner was then attached to the protective sheet, leaving the protective sheet positioned between the two release liners. Note that a bare silicon wafer (disk-shaped, 50 μm thick and 300 mm in diameter) was used instead of a semiconductor wafer.

[Example 1]
(Preparation of protective sheet a)
Polyvinyl alcohol (commercially available) with a saponification degree of 65 (mol%) and an average degree of polymerization of 240 was prepared. This polyvinyl alcohol (PVA) was dispersed in water and then heated to 90°C to dissolve, preparing an aqueous PVA solution. This aqueous PVA solution was applied to release liner a (PET film, thickness 50 μm). Release liner a had a surface that had been treated with a silicone release agent, and the aqueous PVA solution was applied to this surface using an applicator. This was then dried at 110°C for 2 minutes to form a 10 μm thick protective sheet that was superimposed on one side of release liner a. Release liner b (PET film, thickness 25 μm) was then superimposed on the exposed surface of this protective sheet. Release liner b had a surface that had been treated with a silicone release agent, and this surface was attached to the protective sheet. In this manner, protective sheet a sandwiched between two release liners was produced.
(Mounting process and protection process)
The release liner b was peeled off and removed from the prepared protective sheet a to expose one side of the protective sheet a. This exposed side was attached to a bare silicon wafer that was overlapping a dicing tape.
Specifically, a bare silicon wafer and a glass carrier were attached to each other, and the attached wafer was then attached to a dicing tape. The glass carrier was then peeled off from the wafer, exposing one side of the wafer.
The exposed surface of the wafer (the surface opposite to the surface in contact with the dicing tape) was bonded to the exposed surface of protective sheet a from which release liner b had been peeled off. A Nitto Seiki MV3000 vacuum mounter with a stage temperature of 90°C was used for the bonding. In this way, the dicing tape, bare silicon wafer, and protective sheet a were laminated in this order.
(stealth processing process)
Next, the bare silicon wafer was irradiated with laser light using a DFL7361 manufactured by Disco Corporation to form a fragile portion inside the wafer, after which the release liner a was peeled off.
(Expanding process)
Next, the laminate of the wafer and the protective sheet was cut into small pieces using a DDS2300 manufactured by Disco Corporation at −15° C. and 200 mm/s to obtain small pieces (10 mm x 10 mm rectangular shapes) of chips (dies) and protective sheets.
(Removal process)
Thereafter, to remove the protective sheet, water was sprayed onto the protective sheet using the water washing mechanism of a DDS2300 cutting machine manufactured by Disco Corporation, thereby bringing the protective sheet into contact with water, thereby exposing one surface (temporary circuit surface) of the chip (die).

[Example 2]
(Preparation of protective sheet b)
Into a reaction vessel equipped with a cooling tube, a nitrogen inlet tube, a thermometer, and a stirrer, 11 parts by mass of hydroxyethyl acrylate (HEA) and 89 parts by mass of 2-ethylhexyl acrylate (2EHA) as monomers, and 0.2 parts by mass of azobisisobutyronitrile (AIBN) as a thermal polymerization initiator were added.
Further, butyl acetate was added as a reaction solvent so that the concentration of the monomer became 36% by mass, and then polymerization treatment was carried out under a nitrogen stream at 62°C for 4 hours and at 75°C for 2 hours to synthesize an acrylic polymer solution A.
13 parts by mass of 2-methacryloyloxyethyl isocyanate (product name "Karenz MOI", manufactured by Showa Denko K.K.) and 0.07 parts by mass of dibutyltin dilaurate were added to this acrylic polymer solution A. Then, an addition reaction treatment was carried out in an air stream at 50°C for 12 hours to obtain acrylic polymer solution A'.
Next, 0.8 parts by mass of a polyisocyanate compound (product name "Takenate D-101A", manufactured by Mitsui Chemicals, Inc.) serving as a crosslinking agent and 5 parts by mass of a photopolymerization initiator (product name "Omnirad 127", manufactured by IGM) were added to 100 parts by mass of the acrylic polymer solution A' to prepare a pressure-sensitive adhesive solution (hereinafter referred to as pressure-sensitive adhesive solution A).
Next, using an applicator, the above-mentioned PSA solution A was applied to the silicone release-treated surface of release liner a (PET film, 50 μm thick) having a surface that had been subjected to a silicone release treatment. Drying was carried out at 120°C for 2 minutes to form a 30 μm thick protective sheet b that overlapped one surface of release liner a. The exposed surface of protective sheet b was then bonded to the silicone release-treated surface of release liner b (PET film, 25 μm thick). This was stored at 50°C for 24 hours to produce a UV-curable protective sheet.
(Mounting process and protection process)
Release liner b was peeled off from the protective sheet to expose one side of the protective sheet, which was then bonded to a bare silicon wafer that was overlaid on dicing tape.
Specifically, the bare silicon wafer and the glass carrier G were attached to each other, and the attached wafer was then attached to a dicing tape. Thereafter, the glass carrier G was peeled off from the wafer, exposing one side of the wafer.
The exposed surface of the wafer (the surface opposite to the surface in contact with the dicing tape) was bonded to the exposed surface of protective sheet b from which release liner b had been peeled off. A Nitto Seiki MV3000 vacuum mounter with a stage temperature of 30°C was used for the bonding. In this way, the dicing tape, bare silicon wafer, and protective sheet a were laminated in this order.
(stealth processing process)
A laser beam was irradiated onto the wafer using a Disco DFL7361 to form a weakened portion inside the wafer.
(hardening treatment)
The protective sheet was then irradiated with ultraviolet light at 300 mJ/ ^cm2 from the side opposite the dicing tape (the release liner a side) to cure the protective sheet. Release liner a was then peeled off from the protective sheet.
(Expanding process)
Subsequently, the laminate of wafer and protective sheet was cut into small pieces using a DDS2300 manufactured by Disco Corporation at −15° C. and 200 mm/s to obtain small pieces of chips (dies) and protective sheets.
(Removal process)
Next, to remove the small pieces of protective sheet, a release adhesive tape (adhesive tape product name "No. 360UL") was attached to the UV-curable protective sheet overlapping the chip (die) using a laminator. The release adhesive tape was then peeled off. This removed the protective sheet together with the release adhesive tape, exposing one surface (temporary circuit surface) of the chip (die).

<Measurement of physical properties of protective sheets>
(Silicone adhesion)
The peel force of the protective sheet from the bare silicon wafer was measured at 25° C. using the measurement conditions and method described above.
(Breaking strength and breaking elongation)
The breaking strength and breaking elongation were measured at -15°C under the above-mentioned conditions and by the above-mentioned method.
(Tensile modulus)
The tensile modulus was measured at −15° C. and 25° C. under the above-mentioned conditions and by the above-mentioned method.
(surface free energy)
The surface free energy of the protection sheet at 25° C. was calculated using the measurement conditions, measurement method, and calculation method described above (only for Example 1).

[Comparative Example]
A chip (die) was produced in the same manner as in Example 1 or Example 2, except that the protective sheet was not bonded to the bare silicon wafer. Specifically, a laser beam was irradiated onto the bare silicon wafer attached to dicing tape using a Disco DFL7361 to form a fragile portion inside the wafer. The wafer was then cleaved into small pieces using a Disco DDS2300 at -15°C and 200 mm/s.

<Evaluation: Adhesion of foreign matter on chip (die) surface>
The exposed chip (die) surface (the surface from which the protective sheet was removed) was observed with a digital microscope, and the number of foreign matter particles in a randomly selected 10 x 10 mm square area was counted. A sample with 10 or more foreign matter particles was judged as defective (×), and a sample with less than 10 foreign matter particles was judged as good (◯).
Photographs of the surfaces of the chips (dies) with foreign matter attached thereto in Example 1 and Comparative Example are shown in FIGS. 8 and 9, respectively.

As described above, the manufacturing methods of the Examples and Comparative Examples were carried out. Details of the protective sheets used in each manufacturing method and the evaluation results are shown in Table 1.

As can be seen from the above evaluation results, by manufacturing a semiconductor device using the semiconductor device manufacturing method of the example, it was possible to prevent foreign matter from adhering to the circuit surface of the chip (die). This allowed for the electrode portions of the adherend to be closely attached to the electrode portions of the chip (die), ensuring electrical continuity. In particular, when multiple semiconductor chips having electrodes formed on both sides and connected to each other were stacked, the electrode portions of adjacent semiconductor chips could be closely attached to each other, ensuring electrical continuity. Therefore, it is believed that the reliability of the electrical conductivity performance of the manufactured semiconductor device can be maintained.

By implementing the manufacturing method for electronic component devices according to the above-described embodiment, semiconductor devices with multiple stacked semiconductor chips can be manufactured efficiently.

The method for manufacturing an electronic component device of the present invention is suitable for use, for example, in manufacturing semiconductor devices equipped with semiconductor integrated circuits.

10: Protective sheet, 10': Small piece of protective sheet,
15: release liner,
20: dicing tape,
21: Base material layer, 22: Adhesive layer,
G: glass carrier,
W: semiconductor wafer, X: semiconductor chip, V: through via, D: electrode portion,
T: Peelable adhesive tape,
B: Back grind tape.

Claims (4)

a step of attaching a substrate having circuit components arranged on at least one surface thereof and a glass carrier attached to the substrate to a dicing tape, and then peeling the glass carrier from the substrate;
a step of overlaying a protective sheet for protecting the circuit components on the circuit surface from which the glass carrier has been peeled off ;
a step of dividing a laminate in which the substrate and the protective sheet are overlapped into small pieces at intervals in a surface direction, thereby producing small pieces of the laminate in which substrate chips obtained by dividing the substrate into small pieces and small pieces of the protective sheet are overlapped;
removing a small piece of the protective sheet overlapping the circuit surface of the substrate chip,
In the step of overlapping the protective sheet, with release liners overlapping both sides of the protective sheet, one release liner is peeled off from one side of the protective sheet, and the protective sheet in a state where it is laminated on the other release liner is overlapped on the circuit side from which the glass carrier has been peeled off , and then the other release liner is peeled off and removed from the other side of the protective sheet;
the protective sheet has a breaking strength of 1.0 MPa or more and 500 MPa or less at −15° C.,
In the step of preparing the small pieces of the laminate, the dicing tape and the protective sheet are placed on both surfaces of the substrate, and the dicing tape is stretched in a surface direction to prepare the small pieces of the laminate.
A method for manufacturing an electronic component device. The method for manufacturing an electronic component device according to claim 1, further comprising the step of placing the circuit surface of the substrate chip facing the adherend and bonding the substrate chip to the adherend. the protective sheet contains a water-soluble polymer compound,
3. The method for manufacturing an electronic component device according to claim 1, wherein the removing step removes the plurality of small pieces of the protective sheet by contacting a liquid containing water with the plurality of small pieces of the protective sheet and dissolving at least a portion of each small piece in the liquid. The electrode portions as the circuit components arranged on both surfaces of the substrate chip are electrically connected to each other,
3. The method for manufacturing an electronic component device according to claim 2, wherein in the joining step, at least two of the substrate chips are stacked and the electrode portions of one of the substrate chips, which is the adherend, are directly connected to the electrode portions of the other substrate chip.