JP7809579B2 - Power Conversion Device - Google Patents

Description

The present invention relates to a power conversion device.

Power conversion devices that convert AC power into variable-voltage, variable-frequency power are known. The main circuit of these power conversion devices includes a converter that converts AC to DC and an inverter connected to the converter via a DC circuit that converts DC back to AC. The DC circuit also includes a large-capacity smoothing capacitor. The converter controls the converter output current so that the DC voltage, which is the voltage across the smoothing capacitor connected to the DC circuit, reaches a predetermined value, while the inverter controls the inverter output current so that the speed of the AC motor reaches a predetermined value, thereby converting AC power into variable-voltage, variable-frequency power. Generally, the inverter capacity is designed according to the maximum output characteristics of the load device connected to the power converter, and the converter capacity is designed to accommodate the power supply and demand relative to this inverter capacity. Examples of this type of technology are described in Patent Documents 1 and 2 below.

Japanese Patent Application Laid-Open No. 2009-232526 Japanese Patent Application Laid-Open No. 2007-215365

In the above-mentioned technology, it would be preferable if power conversion could be performed more appropriately.
The present invention has been made in view of the above circumstances, and an object of the present invention is to provide a power conversion device capable of performing appropriate power conversion.

To solve the above problems, the power conversion device of the present invention is characterized by comprising a converter power conversion unit that converts AC voltage to DC voltage, an inverter power conversion unit that converts input DC voltage to AC voltage, a smoothing capacitor inserted between the converter power conversion unit and the inverter power conversion unit, a DC voltage detector that detects the terminal voltage of the smoothing capacitor, and an inverter control device that suppresses the output power of the inverter power conversion unit to be equal to or less than a specified output power limit value, and that lowers the output power limit value as the rate of change of the terminal voltage detected by the DC voltage detector decreases increases.

This invention enables appropriate power conversion.

1 is an overall configuration diagram of a power conversion device according to a first embodiment; FIG. 2 is a block diagram of a control model of a main part of the first embodiment. FIG. 1 is a block diagram of a computer. 3A to 3C are waveform diagrams of various parts in the first embodiment. FIG. 10 is an overall configuration diagram of a power conversion device according to a second embodiment. FIG. 10 is a block diagram of a control model of a main part of a second embodiment. 10 is a flowchart of a DC power subtraction amount determination routine executed by a calculation unit according to a third embodiment. FIG. 4 is a diagram showing an example of a waveform of a DC voltage. FIG. 13 is a block diagram of a control model of a main part of the fifth embodiment. FIG. 13 is an overall configuration diagram of a power conversion device according to a sixth embodiment. FIG. 19 is a block diagram of a control model of a main part of the eighth embodiment. 13 is a flowchart of a DC power subtraction amount determination routine executed by a calculation unit of the eighth embodiment. 10A and 10B are waveform diagrams of the various parts in Comparative Example #1. FIG. 10 is an overall configuration diagram of a power conversion device according to Comparative Example #2. FIG. 10 is an overall configuration diagram of a power conversion device according to Comparative Example #3.

[Prerequisites for the embodiment]
By applying the technology of the above-mentioned Patent Document 1, it is considered possible to variably control the drive torque limiter value of the inverter control circuit by using a gain compensation signal corresponding to a deviation signal between the terminal voltage discharge threshold and the terminal voltage of the target power storage device. According to this technology, the instantaneous voltage drop compensation can be provided with an instantaneous voltage drop high-speed compensation unit that estimates the power required for discharge based on the discharge energy and outputs a discharge current command. However, to achieve such control, it is necessary to connect a DC power assist device having a chopper storage device to the DC circuit of the inverter.

Furthermore, by applying the technology of Patent Document 2 mentioned above, it is possible to define the maximum inverter output power determined by the converter control capability as a power limiter value, and to limit the torque current command value so that the inverter power value calculated from the current detection value and voltage detection value measured by the detector does not exceed the power limiter value. With this technology, when the amount of power on the inverter side exceeds the amount of power the converter can handle, the limiter value of the inverter output current command can be adjusted according to the amount of excess, thereby reducing the amount of power on the inverter side.

Furthermore, in the technology applying Patent Document 2, in order to deal with fluctuations in the amount of power that a converter can handle due to momentary power outages, the converter calculates the amount of power that the converter can handle in accordance with the amount of change in the AC power supply voltage, and can vary the inverter output current command limiter value so that the amount of power determined by this calculation does not exceed the amount of power. However, this technology requires transmission hardware equipment to perform power limiter control in accordance with the amount of change in the AC power supply voltage. In particular, when multiple inverters are connected to a converter, the amount of equipment required becomes enormous, and the hardware configuration becomes expensive.

The embodiments described below have been developed with the above issues in mind, and their purpose is to achieve appropriate power conversion by suppressing sudden DC voltage fluctuations caused by momentary sags or momentary power outages in power conversion equipment. Note that in the following description, the term "momentary sag" also includes "momentary power outages."

[First embodiment]
<Configuration of First Embodiment>
FIG. 1 is a diagram showing the overall configuration of a power conversion device 100 according to the first embodiment.
1 , the power conversion device 100 includes a converter unit 2, an inverter unit 3, a converter control device 5, and an inverter control device 6. The converter unit 2 converts AC power received from an AC power source 1 into DC power. The inverter unit 3 converts the DC power output by the converter unit 2 into desired AC power and supplies it to an electric motor 4. The converter control device 5 controls the converter unit 2. Furthermore, the inverter control device 6 controls the inverter unit 3.

Converter unit 2 is a so-called three-level converter that converts the input AC voltage into a DC voltage having a positive potential level, a neutral zero potential level, and a negative potential level. In this way, converter unit 2 converts the input AC power into DC power. Inverter unit 3 is a so-called three-level inverter that converts the DC voltage having a positive potential level, a neutral zero potential level, and a negative potential level into an AC voltage having the desired frequency and voltage to drive electric motor 4. In this way, inverter unit 3 converts DC power into AC power. The positive potential levels of converter unit 2 and inverter unit 3 are connected by P wiring 40, the neutral potential levels are connected by C wiring 41, and the negative potential levels are connected by N wiring 42.

The converter unit 2 includes a converter power conversion section 21, smoothing capacitors 22 and 23, DC voltage detectors 25 and 26, and a resistor 24. The DC voltage detectors 25 and 26 measure DC voltages V22 and V23, which are the terminal voltages of the smoothing capacitors 22 and 23. The sum of the DC voltages V22 and V23 is referred to as the DC voltage V_cnv. The smoothing capacitors 22 and 23 are provided to suppress fluctuations in the DC voltages V22 and V23. The resistor 24 is inserted into the C wiring 41 to suppress DC resonance.

The inverter unit 3 includes an inverter power conversion section 31, smoothing capacitors 32 and 33, DC voltage detectors 35 and 36, and a resistor 34. The DC voltage detectors 35 and 36 measure DC voltages V32 and V33, which are the terminal voltages of the smoothing capacitors 32 and 33. The sum of the DC voltages V32 and V33 is referred to as the DC voltage Vdc (input voltage, terminal voltage). The smoothing capacitors 32 and 33 are provided to suppress fluctuations in the DC voltages V32 and V33. The resistor 34 is inserted into the C wiring 41 to suppress DC resonance.

The converter control device 5 controls the converter power conversion unit 21 so that the converted DC power has the desired value. The inverter control device 6 controls the inverter power conversion unit 31 so that the output torque and speed of the electric motor 4 meet the desired characteristics.

The power conversion device 100 also includes a current detector 7, a speed detector 8, a current detector 9, and a voltage detector 10. The current detector 7 detects the input current to the converter unit 2 and supplies it to the converter control device 5. If losses in the converter unit 2 are negligible, the detected current is equal to the output current of the converter unit 2. Therefore, the detection result of the current detector 7 is called the converter output current I_cnv. The speed detector 8 is directly connected to the electric motor 4 and detects the rotation speed r of the electric motor 4 and supplies it to the inverter control device 6. The current detector 9 and voltage detector 10 detect the output current I_inv (inverter output current) and output voltage V_inv (inverter output voltage) of the inverter unit 3, respectively, and supply the detection results to the inverter control device 6.

The converter control device 5 performs various calculations based on the input detection values and controls the converter power conversion unit 21. Similarly, the inverter control device 6 performs various calculations based on the input detection values and controls the inverter power conversion unit 31.

The converter control device 5 includes a DC voltage command generator 51, a DC voltage controller 52, a current controller 53, and a pulse generator 54. The DC voltage command generator 51 outputs a command value for the DC voltage V_cnv to the DC voltage controller 52.

The DC voltage controller 52 calculates a command value for the converter output current I_cnv based on the difference between the DC voltage V_cnv and its command value, and supplies this to the current controller 53. More specifically, the DC voltage controller 52 outputs a command value for the converter output current I_cnv such that the DC voltage V_cnv approaches its command value (preferably so that the two match).

The current controller 53 calculates a converter voltage command such that the converter output current I_cnv approaches its command value (preferably so that the two match), and supplies this to the pulse generator 54. The pulse generator 54 calculates pulse signals for controlling the on/off of each switching element in the converter power conversion unit 21. In doing so, the pulse generator 54 calculates these pulse signals such that the output voltage from the converter power conversion unit 21 approaches these command values (preferably so that the two match).

The inverter control device 6 includes a speed command generator 61, a speed controller 62, a current controller 63, and a pulse generator 64.

The speed command generator 61 outputs a command value for the rotational speed r of the electric motor 4 to the speed controller 62. The speed controller 62 calculates the source current command value It_ref so that the rotational speed r approaches the command value (preferably so that the two match), and outputs this to the current limiter 67. The current limiter 67 performs limit processing on the source current command value It_ref as necessary (details will be described later), and outputs the result as the inverter output current command value I_iref.

The current controller 63 calculates a command value for the output voltage V_inv so that the output current I_inv of the inverter unit 3 approaches the inverter output current command value I_iref (preferably so that the two match), and outputs the command value to the pulse generator 64. The pulse generator 64 calculates a pulse signal for controlling the on/off of each switching element of the inverter power conversion section 31. In doing so, the pulse generator 64 calculates the pulse signal so that the output voltage V_inv of the inverter unit 3 approaches the command value (preferably so that the two match).

The inverter control device 6 further includes a power limiter setter 65 (output limiting unit), an inverter output current limiter value calculator 66 (output limiting unit), and a momentary sag observer 68 (output limiting unit). The operation of the momentary sag observer 68 will be described later. The power limiter setter 65 stores a power limiter set value P _SET (converter-side DC power set value) and outputs a power limiter maximum value P _MAX (output power limit value) based on this.

The power limiter maximum value P _MAX is the maximum value of output power permitted for the inverter unit 3. When no momentary sag or the like occurs, the power limiter maximum value P _MAX is equal to the power limiter set value P _SET . This power limiter set value P _SET is determined in advance based on the control capability of the converter unit 2. The inverter output current limiter value calculator 66 is supplied with the power limiter maximum value P _MAX , the output current I_inv, and the output voltage V_inv.

The inverter output current limiter value calculator 66 calculates the output power P_inv (not shown) of the inverter unit 3 based on the output current I_inv and the output voltage V_inv. Then, the inverter output current limiter value calculator 66 calculates a limiter value I_im of the output current I_inv so that the output power P_inv is equal to or less than the power limiter maximum value P _MAX , and supplies the limiter value I_im to a current limiter device 67.

The current limiter 67 performs limiting processing so that the source current command value It_ref is equal to or less than the limiter value I_im, and outputs the limiting processing result as the inverter output current command value I_iref. This prevents the inverter unit 3 from outputting power that exceeds the control capacity of the converter unit 2, and prevents fluctuations in the DC voltage Vdc (for example, a drop in the DC voltage Vdc).

Here, if, for example, an instantaneous power outage occurs in the AC power supply 1, the control capability of the converter unit 2 decreases. At that time, if the power limiter maximum value _PMAX output from the power limiter setter 65 is fixed, the output power of the inverter unit 3 exceeds the control capability of the converter unit 2 at the time of the instantaneous power outage, and the DC voltage Vdc decreases.

Therefore, it is conceivable to provide some kind of detection device (for example, a synchronous power detector on the converter side) for the AC power supply 1 and change the power limiter maximum value _PMAX based on the detection results. This method can suppress the decrease in the DC voltage Vdc, but it requires the above-mentioned detection device and means for transmitting the detection results.

Therefore, this embodiment uses a voltage sag observer 68, which will be described later, to change the power limiter maximum value P _MAX based on information that can be obtained inside the inverter unit 3. That is, the voltage sag observer 68 calculates a DC power subtraction amount STOBSOUT (see FIG. 2 ), which is an adjustment amount for the power limiter maximum value P _MAX , based on the output current I_inv and output voltage V_inv of the inverter unit 3 and the DC voltage Vdc, and outputs the calculated amount to the power limiter setter 65. The DC power subtraction amount STOBSOUT will be described in detail later.

FIG. 2 is a block diagram of a control model of the main parts of the first embodiment.
The function of the inverter unit 3 shown in FIG. 1 is represented in FIG. 2 as blocks 71, 72, and 73 that are virtually modeled, and it is assumed that the DC voltage Vdc is determined by this model.
First, the inverter output current unit 71 is a block that generates the inverter model output current I_i based on the inverter output current command value I_iref output by the current limiter 67 (see FIG. 1). Here, the inverter model output current I_i is slightly different from the actual output current I_inv described above, and is a current that is assumed to appear by following the inverter output current command value I_iref with a first-order lag response. The time constant of this first-order lag is called the response time constant Tcc. In other words, the function of the inverter output current unit 71 is as shown in the following equation (1):

I_i=I_iref×1/(1+Tcc・s)…(1)

The inverter-side DC power current conversion unit 72 is a block that generates the inverter-side DC power current Idc_i by multiplying the inverter model output current I_i output from the inverter output current unit 71 by a DC power current gain Kdc. That is, the function of the inverter-side DC power current conversion unit 72 is as shown in the following equation (2).

Idc_i=I_i×Kdc…(2)

In this specification, the term "power current" is used to mean "current assumed within the model," and its dimension is "current." In the DC circuit section shown in Figure 1, the inverter-side DC power current Idc_i corresponds to the DC current supplied from the DC circuit to the inverter power conversion section 31 via smoothing capacitors 32 and 33.

The subtraction unit 74 subtracts the inverter-side DC power current Idc_i from the converter-side DC power current Idc_c and outputs the subtraction result as the fluctuating power current ΔIdc. Here, the converter-side DC power current Idc_c indicates the DC power current generated on the converter unit 2 (see Figure 1) side and corresponds to the DC current supplied to the DC circuit from the converter power conversion unit 21 via the smoothing capacitors 22 and 23 within the converter unit 2. In the event of an instantaneous power outage, the control capability of the converter unit 2 decreases, causing the converter-side DC power current Idc_c to decrease.

The DC voltage unit 73 is a block that outputs a DC voltage Vdc according to the fluctuating power current ΔIdc. The DC voltage Vdc is proportional to the integration result of the fluctuating power current ΔIdc. The proportionality constant is 1/C, where C is the capacitance of the smoothing capacitors in the entire side panel. In other words, the function of the DC voltage unit 73 is as shown in the following equation (3).

Vdc=ΔIdc×1/C・(1/s)…(3)

Also, in FIG. 2, the sag observer 68 includes a fluctuating power current calculation unit 81, an inverter DC power current estimation unit 82, an adder 88, and a calculation unit 89. The fluctuating power current calculation unit 81 differentiates the DC voltage Vdc and multiplies it by the capacitance C to calculate the fluctuating power current estimated value ΔIdch, which is an estimate of the fluctuating power current ΔIdc.

The inverter DC power current estimation unit 82 also calculates the inverter side DC power current estimate Idch_i, which is an estimate of the inverter side DC power current Idc_i, based on the output current I_inv and output voltage V_inv of the inverter unit 3 output from the current detector 9 and voltage detector 10 (see Figure 1). That is, the inverter DC power current estimation unit 82 multiplies the output current I_inv, the output voltage V_inv, and a predetermined constant Kidc, and outputs the multiplication result as the inverter side DC power current estimate Idch_i.

The adder 88 adds the fluctuating power current estimate ΔIdch and the inverter side DC power current estimate Idch_i to output the converter side DC power current estimate Idch_c, which is an estimate of the converter side DC power current Idc_c. The calculator 89 also subtracts the converter side DC power current estimate Idch_c from the inverter side DC power current estimate Idch_i and outputs the subtraction result as the DC power subtraction amount STOBSOUT.

Under normal circumstances when no momentary power outage occurs, the converter control device 5 controls the converter unit 2 so that the inverter-side DC power current Idc_i and the converter-side DC power current Idc_c are balanced. As a result, the DC voltage Vdc remains approximately constant. On the other hand, when a momentary power outage occurs, the control capability of the converter unit 2 decreases, causing the converter-side DC power current Idc_c to become smaller than the inverter-side DC power current Idc_i, disrupting the balance between the two. As a result, the fluctuating power current ΔIdc becomes negative, and the DC voltage Vdc decreases.

When the two power currents Idc_i and Idc_c are balanced, the two estimated values Idch_i and Idch_c are also balanced, so the DC power subtraction amount STOBSOUT is close to "0." On the other hand, when Idc_c is smaller than Idc_i, the DC power subtraction amount STOBSOUT is significantly greater than "0." Therefore, STOBSOUT represents the degree of reduction in the control capability of converter unit 2 that occurs during a voltage sag (sometimes called the voltage sag amount or voltage sag degree).

The above-mentioned quantities in the voltage sag observer 68 can be expressed by the following equations (4) to (7).

ΔIdch=Vdc×C・S…(4)
Idch_i=Kidc×I_inv×V_inv…(5)
Idch_c=Idch_i+ΔIdch...(6)
STOBSOUT=Idch_i−Idch_c=−ΔIdch…(7)

The DC power subtraction amount STOBSOUT output from the instantaneous sag observer 68 is input to the power limiter setter 65. The power limiter setter 65 calculates the power limiter maximum value P _MAX based on the following equation (8).

P _MAX = P _SET -STOBSOUT...(8)

<Computer Configuration>
Fig. 3 is a block diagram of the computer 980. The converter control device 5 and the inverter control device 6 shown in Fig. 1 are each configured using one or more computers 980 shown in Fig. 3.
In FIG. 3, a computer 980 includes a CPU 981 , a storage unit 982 , a communication I/F (interface) 983 , an input/output I/F 984 , and a media I/F 985 .

Here, the memory unit 982 includes RAM 982a, ROM 982b, and HDD 982c. The communication I/F 983 is connected to the communication circuit 986. The input/output I/F 984 is connected to the input/output device 987. The media I/F 985 reads and writes data from the recording medium 988. The ROM 982b stores control programs executed by the CPU, various data, etc. The CPU 981 realizes various functions by executing the control programs loaded into RAM 982a. The interior of the converter control device 5 and inverter control device 6 shown in Figure 1 above is a block diagram of the functions realized by the control programs, etc.

<Operation of the First Embodiment>
Next, the operation of the first embodiment will be described.
FIG. 4 is a waveform diagram of each part in the first embodiment.
4, graph G41 represents the waveform of the converter-side DC power current Idc_c, graph G42 represents the waveform of the inverter model output current I_i, graph G43 represents the waveform of the inverter-side DC power current Idc_i, and graph G44 represents the waveform of the DC voltage Vdc. The horizontal axis of each graph represents time t. The fault detection level Vdcm in graph G44 is the minimum level allowed for the DC voltage Vdc. In other words, if the DC voltage Vdc falls below the fault detection level Vdcm, the inverter control device 6 determines that a fault has occurred in the inverter unit 3 and stops the inverter unit 3.

If a voltage sag occurs at time t20 in FIG. 4, the power supply from the AC power source 1 (see FIG. 1) is interrupted, causing a decrease in the control capability of the converter unit 2. As a result, as shown in graph G41, the converter-side DC power current Idc_c also decreases after time t20. However, in this embodiment, the voltage sag observer 68 (see FIG. 2) sets the DC power subtraction amount STOBSOUT to a value significantly greater than "0" by the calculations shown in the above-described equations (4) to (7). As a result, the power limiter maximum value _PMAX decreases according to the above-described equation (8), and accordingly, the limiter value I_im also decreases at time t20.

The current limiter 67 (see Figure 2) then reduces the inverter output current command value I_iref in accordance with the limiter value I_im. As a result, as shown in graph G42, after time t20, the inverter model output current I_i decreases to the limiter value I_im. As the inverter model output current I_i decreases, the inverter side DC power current Idc_i also decreases, as shown in graph G43. Furthermore, as shown in graph G44, this suppresses the decrease in the DC voltage Vdc, thereby preventing the DC voltage Vdc from falling below the fault detection level Vdcm.

After that, when the sag is resolved, the converter-side DC power current Idc_c returns to the value it had before time t20, as shown in graph G41. Furthermore, at the subsequent time t22, the limiter value I_im also returns to the value it had before time t20. As shown in graph G42, it is desirable to maintain the limitation of the inverter model output current I_i by the DC power subtraction amount STOBSOUT until the DC voltage returns to its normal voltage. For example, the DC voltage Vdc can be monitored by the sag observer 68 (see Figure 2), and the DC power subtraction amount STOBSOUT can be set to a value significantly greater than "0" until the DC voltage Vdc returns to a predetermined normal value or normal range.

2, as the fluctuating power current estimated value ΔIdch increases in the negative direction, the converter-side DC power current estimated value Idch_c decreases and the DC power subtraction amount STOBSOUT increases. The fluctuating power current estimated value ΔIdch increases in proportion to the rate of change |dVdc/dt| of the DC voltage Vdc. In this embodiment, it can be seen that the greater the rate of change |dVdc/dt|, the greater the DC power subtraction amount STOBSOUT, lowering the power limiter maximum value _PMAX .

Second Embodiment
5 is a diagram showing the overall configuration of a power conversion device 102 according to the second embodiment. In the following description, parts corresponding to those in the first embodiment described above are given the same reference numerals, and their description may be omitted.
In FIG. 5, the power conversion device 102 of the second embodiment is configured similarly to the power conversion device 100 of the first embodiment, except that an inverter control device 620 is provided instead of the inverter control device 6 (see FIG. 1).

As in the first embodiment, the speed command generator 61 outputs a command value for the rotational speed r of the electric motor 4 to the speed controller 62. The speed controller 62 calculates the source current command value It_ref so that the rotational speed r approaches the command value (preferably so that the two match). The inverter control device 620 includes an inverter output current variable gain calculator 622 and an inverter output current variable calculator 624.

6 is a block diagram of a control model of the main parts of the second embodiment. An inverter output current variable gain calculator 622 calculates an inverter output current variable gain value KSTOBS based on the power limiter set value _PSET on the converter side during normal operation and the DC power subtraction amount STOBSOUT, and outputs the calculated value to an inverter output current variable calculator 624.

Then, the inverter output current variable calculator 624 multiplies the source current command value It_ref by the inverter output current variable gain value KSTOBS and outputs the multiplication result as the inverter output current command value I_iref. Other than the above, the configuration of this embodiment is the same as that of the first embodiment (see Figure 1).

In the first embodiment described above, the DC power subtraction amount STOBSOUT output by the instantaneous sag observer 68 is used to control the power limiter maximum value _PMAX according to equation (8), thereby lowering the limiter value I_im of the inverter model output current I_i and suppressing the inverter model output current I_i. However, there are cases where it is preferable to change the inverter output current variable gain value KSTOBS rather than suppressing the maximum value of the inverter model output current I_i using the limiter value I_im. In such cases, this embodiment may be applied.

More specifically, the inverter output current variable gain calculator 622 calculates the inverter output current variable gain value KSTOBS based on the following equation (9).

KSTOBS=(P _SET - STOBSOUT)/P _SET ...(9)

As described above, the inverter output current variable calculator 624 may multiply the source current command value It_ref by the inverter output current variable gain value KSTOBS and output the multiplication result as the inverter output current command value I_iref.

Under normal circumstances, the inverter-side DC power current estimate Idch_i and the converter-side DC power current estimate Idch_c are balanced, so the DC power subtraction amount STOBSOUT is "0." Therefore, according to the above equation (9), the inverter output current variable gain value KSTOBS is "1," and the inverter output current variable calculator 624 outputs the source current command value It_ref as the inverter output current command value I_iref without any restrictions. Therefore, the inverter model output current I_i is not limited by the instantaneous sag observer 68.

On the other hand, when a voltage sag occurs, the balance between Idch_i and Idch_c is disrupted, and the DC power subtraction amount STOBSOUT becomes a positive value. As a result, the inverter output current variable gain value KSTOBS becomes a value less than 1, and the magnitude of the inverter model output current I_i is limited. Thus, according to this embodiment, the inverter control device 620 controls the inverter output current variable gain value KSTOBS in accordance with the DC power subtraction amount STOBSOUT to suppress the inverter model output current I_i. This makes it possible to suppress the magnitude of the inverter model output current I_i even when the inverter model output current I_i is lower than the limiter value I_im (see Figure 4), thereby suppressing fluctuations in the DC voltage Vdc and further improving the voltage sag tolerance.

[Third embodiment]
Next, a third embodiment will be described. In the following description, parts corresponding to those in the other embodiments described above will be given the same reference numerals, and the description thereof may be omitted.
The hardware configuration of the third embodiment is similar to that of the first embodiment (see FIG. 1 ), except that in this embodiment, a calculation unit 89 (see FIG. 2 ) does not simply calculate the DC power subtraction amount STOBSOUT by subtracting the converter-side DC power current Idc_c from the inverter-side DC power current Idc_i, but calculates the DC power subtraction amount STOBSOUT by performing the processing of FIG. 7 , which will be described later.

FIG. 7 is a flowchart of a DC power subtraction amount determination routine executed by the calculation unit 89 of the third embodiment.
7 , when the process proceeds to step S11, the calculator 89 calculates a difference value DF. This difference value DF is the result of subtracting the converter-side DC power current estimate value Idch_c from the inverter-side DC power current estimate value Idch_i, and is equal to the DC power subtraction amount STOBSOUT in the first embodiment. Next, when the process proceeds to step S12, the calculator 89 determines whether the difference value DF exceeds a predetermined voltage sag reference threshold value Sth.

If the determination here is "Yes," the process proceeds to step S13, where the calculation unit 89 outputs the difference value DF as the DC power subtraction amount STOBSOUT. Accordingly, the power limiter setter 65 (see FIG. 1) outputs "P _SET - STOBSOUT" as the power limiter maximum value P _MAX . On the other hand, if the determination in step S12 is "No," the process proceeds to step S14, where the calculation unit 89 outputs the DC power subtraction amount STOBSOUT that is "0." Accordingly, the power limiter setter 65 (see FIG. 1) outputs the power limiter set value P _SET as the power limiter maximum value P _MAX .

As described above, when a voltage sag occurs, the balance between the inverter-side DC power current estimate Idch_i and the converter-side DC power current estimate Idch_c is lost, but voltage sags are not the only factor that can cause this imbalance. For example, factors such as a delay in the control response of the converter unit 2 can cause the balance between Idch_i and Idch_c to be lost during a transient period, causing the DC voltage Vdc (see Figure 1) to fluctuate.

In this embodiment, therefore, an arbitrary voltage sag reference threshold Sth is set to prevent unnecessary suppression of the inverter model output current I_i except when a voltage sag occurs. Then, only when the difference value DF exceeds the voltage sag reference threshold Sth, is the difference value DF output as the DC power subtraction amount STOBSOUT. This prevents unnecessary reductions in the inverter model output current I_i during normal operation. Here, it is desirable to use the maximum value of the difference value DF when the DC voltage Vdc transiently fluctuates during normal operation as the voltage sag reference threshold Sth. In other words, if the difference value DF becomes larger than the normal maximum value, it is considered to be a voltage sag phenomenon, and the inverter model output current I_i should be limited.

[Fourth embodiment]
Next, a fourth embodiment will be described. In the following description, parts corresponding to those in the other embodiments described above will be given the same reference numerals, and the description thereof may be omitted.
The configuration of the fourth embodiment is the same as that of the third embodiment, except for the content of step S12 in Fig. 7. Therefore, the hardware configuration of the fourth embodiment is the same as that of the first embodiment (see Fig. 1).

In the third embodiment described above, the calculation unit 89 (see FIG. 2) determines whether or not the difference value DF exceeds the predetermined voltage sag reference threshold value Sth in step S12 of FIG.
In contrast to this, in this embodiment, the calculation unit 89 determines in step S12 whether "the rate of change |dVdc/dt| when the DC voltage Vdc decreases exceeds a predetermined rate of change threshold Dth."

The processing performed in response to the determination result in step S12 is the same as that in the third embodiment. That is, if the determination here is "Yes," processing proceeds to step S13, where the calculation unit 89 outputs the difference value DF as the DC power subtraction amount STOBSOUT. On the other hand, if the determination in step S12 is "No," processing proceeds to step S14, where the calculation unit 89 outputs a DC power subtraction amount STOBSOUT that is "0."

FIG. 8 is a diagram showing an example of the waveform of the DC voltage Vdc.
8, graph G81 shows an example of a waveform of the DC voltage Vdc that may occur during normal operation, and graph G82 shows an example of a waveform of the DC voltage Vdc that may occur during a momentary sag. As shown in graph G81, even during normal operation, the balance between the inverter-side DC power current estimate value Idch_i and the converter-side DC power current estimate value Idch_c is disrupted, causing the DC voltage Vdc to change. However, it can be seen that the rate of change |dVdc/dt| when the DC voltage Vdc decreases is relatively small.

On the other hand, as shown in graph G82, during a sag, the DC voltage Vdc drops sharply. In other words, it can be seen that the rate of change |dVdc/dt| when the DC voltage Vdc drops is relatively large. Therefore, if the maximum value of the rate of change |dVdc/dt| that occurs transiently in the DC voltage Vdc during normal operation is set to the rate of change threshold Dth, it is possible to determine whether the drop in the DC voltage Vdc is due to a sag based on a comparison of the rate of change |dVdc/dt| with the rate of change threshold Dth. In this embodiment, as in the third embodiment, it is possible to prevent unnecessary throttling of the inverter model output current I_i during normal operation.

Fifth Embodiment
Next, a fifth embodiment will be described. In the following description, parts corresponding to those in the other embodiments described above will be given the same reference numerals, and the description thereof may be omitted.
The hardware configuration of the fifth embodiment is similar to that of the first embodiment (see FIG. 1), except that the fifth embodiment uses a voltage sag observer 682 shown in FIG. 9 instead of the voltage sag observer 68 (see FIG. 2) of the first embodiment.

FIG. 9 is a block diagram of a control model of the main parts of the fifth embodiment.
In the voltage sag observer 682, a filter adjustment unit 83 is inserted between an adder 88 and a calculator 89. The configuration of this embodiment other than that described above is the same as that of the first embodiment.

The filter adjustment unit 83 performs filtering on the converter-side DC power current estimation value Idch_c output by the adder 88, and outputs the result as a converter-side DC power current adjustment value Idcfil_c (not shown). The function of the filter adjustment unit 83 is as shown in the following equation (9), where Tb is a filter time constant.

Idcfil_c=Idch_c×1/(1+Tb・s)…(9)

Because the calculations performed by the fluctuating power current calculation unit 81 described above use differentiation, if a noise signal is superimposed on the DC voltage Vdc, the noise signal may be amplified by the calculations performed by the fluctuating power current calculation unit 81. If the calculation unit 89 is affected by the amplified noise signal when calculating the DC power subtraction amount STOBSOUT, it may erroneously manipulate the output current I_inv of the inverter unit 3, causing the motor torque to oscillate.

In this embodiment, a filter adjustment unit 83 is added to remove noise from the converter-side DC power current estimate Idch_c. The larger the filter time constant Tb, the more the noise signal described above can be reduced. However, if the filter time constant Tb is made too large, the response of suppression to fluctuations in the DC voltage Vdc slows, and the voltage sag tolerance decreases. Therefore, it is desirable to consider in advance the amount of DC voltage ripple that occurs in the DC voltage Vdc and select a filter time constant Tb that can ensure voltage sag tolerance within an acceptable range of ripple.

As described above, in this embodiment, the filter adjustment unit 83 is added after the adder unit 88, so even if a noise signal is included in the detection result of the DC voltage Vdc, the influence of the noise signal can be suppressed. Note that the voltage sag observer 682 shown in Figure 9 is the voltage sag observer 68 of the first embodiment with the filter adjustment unit 83 added, but in the second embodiment, a similar filter adjustment unit 83 may also be added to the voltage sag observer 68 (see Figure 6).

Sixth Embodiment
10 is a diagram showing the overall configuration of a power conversion device 106 according to the sixth embodiment. In the following description, parts corresponding to those in the other embodiments described above are given the same reference numerals, and their description may be omitted.
The power conversion device 106 includes one converter unit 2, one converter control device 5, and one current detector 7, similar to the power conversion device 100 of the first embodiment (see FIG. 1).

Furthermore, the power conversion device 106 includes multiple inverter units 3a, 3b, 3c, etc. connected to the single converter unit 2, multiple electric motors 4a, 4b, 4c, etc., multiple inverter control devices 6a, 6b, 6c, etc., multiple speed detectors 8a, 8b, 8c, etc., multiple current detectors 9a, 9b, 9c, etc., and multiple voltage detectors 10a, 10b, 10c, etc.

Each of these is configured in the same manner as the inverter unit 3, motor 4, inverter control device 6, speed detector 8, current detector 9, and voltage detector 10 in the first embodiment (see Figure 1). Therefore, inverter units 3a, 3b, 3c, etc. are equipped with inverter power conversion sections 31a, 31b, etc., smoothing capacitors 32a, 32b, etc., 33a, 33b, etc., and resistors 34a, 34b, etc.

Each of the inverter control devices 6a, 6b, 6c, etc. is equipped with a sag observer 68 (see Figure 1). The DC voltage Vdc, output voltage V_inv, and output current I_inv of the corresponding inverter unit 3a, 3b, 3c, etc. are supplied to each sag observer 68. This allows each sag observer 68 to calculate the DC power subtraction amount STOBSOUT for the corresponding inverter unit 3a, 3b, 3c, etc., and limit the output power P_inv (not shown) of each inverter unit 3a, 3b, 3c, etc.

The operation of the voltage sag observer 68 is the same for each inverter control device 6a, 6b, 6c, etc., but the effect on the output current I_inv of each inverter unit 3a, 3b, 3c, etc. differs. In the first embodiment described above (see FIG. 1), the output current I_inv was controlled by the current limiter 67 in the inverter control device 6. Similarly, in this embodiment, the output current I_inv is suppressed for any inverter control device 6a, 6b, 6c, etc. that is operating at a high load that exceeds the converter control capability estimated by the voltage sag observer 68.

On the other hand, some of the inverter units 3a, 3b, 3c, etc. may be operating at a low load such that the DC power subtraction amount STOBSOUT (see Figure 2) is close to "0." In this embodiment, for inverter units operating at such a low load, the output current I_inv is not limited by the instantaneous sag observer 68, allowing normal operation to continue. Therefore, this embodiment makes it possible to reduce the number of inverter units whose operation is limited.

[Modification of the sixth embodiment, no title]
Next, we will explain the calculation of the fluctuating power current estimated value ΔIdch when the instantaneous sag observer 68 is applied to an equipment such as the power conversion device 106 in which multiple inverter units 3a, 3b, 3c, ... are connected to one converter unit 2. In FIG. 10, the DC voltages of the smoothing capacitors 32a, 32b, ..., 33a, 33b, ... fluctuate in relation to the capacitances of all the smoothing capacitors connected to them. Therefore, when calculating ΔIdch from these DC voltages, the capacitance C in equation (4) becomes the capacitance of all the smoothing capacitors used. In other words, the capacitances of all the smoothing capacitors and the inverter-side DC power current Idc_i in each of the inverter units 3a, 3b, 3c, ... are mutually related fluctuation amounts.

In this case, for example, even if the output current I_inv of an inverter unit with a small capacity among the multiple connected inverter units 3 a, 3 b, 3 c, ... is limited, it will hardly contribute to suppressing the amount of fluctuation in the DC voltage Vdc. Therefore, it is desirable to limit the inverter output current I_inv in each inverter unit 3 a, 3 b, 3 c, ... at a ratio that can contribute to suppressing fluctuations in the DC voltage Vdc.
Therefore, when calculating the DC voltages of the smoothing capacitors 32 a, 32 b, ..., 33 a, 33 b, ..., which are the involved fluctuation amounts, and the DC power currents of the inverter units 3 a, 3 b, 3 c, ..., the fluctuating power current calculation unit 81 of this embodiment multiplies various calculated values by the capacity ratios of the inverter units 3 a, 3 b, 3 c, .... In this way, each of the inverter units 3 a, 3 b, 3 c, ... is allowed to contribute to the fluctuation of the DC voltage Vdc to the limited amount that it can individually achieve.

For example, if one of the inverter units 3a, 3b, 3c, etc. has a capacity that accounts for 10% of the total, the calculation result (Equation (4)) can be multiplied by the inverter capacity ratio of "0.1" to calculate ΔIdch using the smoothing capacitor capacity corresponding to that inverter unit. Alternatively, ΔIdch can be calculated based on the capacity of the smoothing capacitors 32a, 32b, etc., 33a, 33b, etc. that are installed in each of the inverter units 3a, 3b, 3c, etc.

Seventh Embodiment
Next, a seventh embodiment will be described. In the following description, parts corresponding to those in the other embodiments described above will be given the same reference numerals, and the description thereof may be omitted.
The hardware configuration of the seventh embodiment is similar to that of the sixth embodiment (see FIG. 10 ), except that the inverter control device 620 according to the second embodiment (see FIG. 5 ) is applied to each of the inverter control devices 6 a, 6 b, 6 c, and so on in this embodiment.

As described above, in the inverter control device 620 of the second embodiment, when a momentary sag is detected (when the determination in step S12 of FIG. 7 is "Yes"), the DC power subtraction amount STOBSOUT becomes equal to the difference value DF, which is a value greater than "0". Then, the inverter output current variable gain calculator 622 calculates the inverter output current variable gain value KSTOBS, which is less than "1", using the above-mentioned equation (9). As a result, the inverter output current variable calculator 624 multiplies the source current command value It_ref by the inverter output current variable gain value KSTOBS, which is less than "1", and outputs the multiplication result as the inverter output current command value I_iref.

In this embodiment, the maximum value of the difference values DF calculated by each inverter control device 6a, 6b, 6c, etc. is called the maximum difference value DFmax (not shown). In this embodiment, this maximum difference value DFmax is applied as the difference value DF in Figure 7. In other words, when the maximum difference value DFmax exceeds the instantaneous sag reference threshold value Sth, all inverter control devices 6a, 6b, 6c, etc. limit the inverter output current command value I_iref using the inverter output current variable gain value KSTOBS that is smaller than "1."

In other words, in this embodiment, all inverter units 3a, 3b, 3c, etc. can be operated at reduced power simultaneously, and the voltage drop tolerance can be increased compared to the sixth embodiment. For these reasons, the sixth embodiment is preferable when the number of inverter units affected by a voltage drop should be reduced, and the seventh embodiment is preferable when it is desired to increase the voltage drop tolerance of the entire power conversion device.

Eighth Embodiment
Next, an eighth embodiment will be described. In the following description, parts corresponding to those in the other embodiments described above will be given the same reference numerals, and the description thereof may be omitted.
The hardware configuration of the eighth embodiment is similar to that of the sixth embodiment (see FIG. 10 ). However, in this embodiment, a voltage sag observer 684 shown in FIG. 11 is applied to each of the inverter control devices 6 a, 6 b, 6 c, ... instead of the voltage sag observer 68 of the sixth embodiment (which is the same as the voltage sag observer 68 of the first embodiment shown in FIG. 2 ).

FIG. 11 is a block diagram of a control model of the main parts of the eighth embodiment.
The voltage sag observer 684 has a configuration similar to that of the voltage sag observer 682 of the fifth embodiment (see FIG. 9 ), and further includes an operation mode processing unit 84. The output signal SG of the calculation unit 89 is the same as the DC power subtraction amount STOBSOUT in the fifth embodiment, and in this embodiment, the output signal of the operation mode processing unit 84 is called the DC power subtraction amount STOBSOUT.

Furthermore, the multiple inverter units 3a, 3b, 3c, etc. in this embodiment have two operating modes: a powering mode in which they output power to the electric motors 4a, 4b, 4c, etc. (see Figure 10), and a regenerative mode in which they absorb power from the corresponding electric motors. Other than the above, the configuration of this embodiment is the same as that of the sixth embodiment.

One objective of this embodiment, as with the other embodiments, is to use the instantaneous sag observer 684 to subtract the DC power subtraction amount STOBSOUT in the converter unit 2 during an instantaneous power outage, thereby limiting the output of the inverter unit. Furthermore, this embodiment aims to more efficiently suppress fluctuations in the DC voltage Vdc by using an operation mode.

For example, when the polarity of the rate of change of the DC voltage Vdc is negative (the DC voltage Vdc decreases) during a momentary sag, the power conversion device as a whole operates in powering mode. In this case, of the multiple inverter units, those operating in regenerative mode act to suppress the decrease in the DC voltage Vdc, so the output of the inverter units is not limited. On the other hand, inverter units operating in powering mode act to exacerbate the decrease in the DC voltage Vdc, so by limiting only the output of these inverter units, fluctuations in the DC voltage Vdc can be more effectively suppressed.

Conversely, when the polarity of the rate of change of the DC voltage Vdc during a momentary sag is positive (the DC voltage is increasing), the power conversion device as a whole is operating in regenerative mode. In this case, of the multiple inverter units, those operating in powering mode act to suppress the increase in the DC voltage Vdc, so the output of the inverter units is not limited. On the other hand, inverter units operating in regenerative mode act to amplify the increase in the DC voltage, so by limiting only the output of these inverter units, fluctuations in the DC voltage Vdc can be more effectively suppressed.

Therefore, in the sag observer of the eighth embodiment, an operation mode processing unit 84 is added to realize the above-mentioned operation. In FIG. 11, the inverter-side DC power current estimate Idch_i, the output signal SG, and the fluctuating power current estimate ΔIdch are input to the operation mode processing unit 84. The operation mode processing unit 84 then varies the DC power subtraction amount STOBSOUT based on the polarity of the fluctuating power current estimate ΔIdch.

12 is a flowchart of a DC power subtraction amount determination routine according to the eighth embodiment. This routine is executed by the voltage sag observer 682.
When the process proceeds to step S21 in Fig. 12, the calculator 89 calculates the difference value DF (=Idch_i-Idch_c) in the same manner as in step S11 in Fig. 7. Next, when the process proceeds to step S22, the calculator 89 determines whether the difference value DF exceeds a predetermined voltage sag reference threshold value Sth.

If the determination here is "Yes," processing proceeds to step S23, where the calculation unit 89 outputs the difference value DF as the output signal SG. On the other hand, if the determination in step S22 is "No," processing proceeds to step S24, where the calculation unit 89 outputs an output signal SG that is "0."

Once the output signal SG of the calculation unit 89 is determined as described above, processing proceeds to step S25. Here, the operation mode processing unit 84 determines whether the fluctuating power current estimate value ΔIdch is less than "0". If the determination here is "Yes", processing proceeds to step S26, where the operation mode processing unit 84 determines whether the inverter-side DC power current estimate value Idch_i exceeds "0".

If step S26 returns "Yes," processing proceeds to step S28. In this case, the DC voltage Vdc has decreased (ΔIdch<0) and the inverter unit is in powering mode (Idch_i>0). Therefore, in step S28, the operation mode processing unit 84 outputs the output signal SG of the calculation unit 89 as the DC power subtraction amount STOBSOUT.

On the other hand, if step S26 returns "No," processing proceeds to step S29. In this case, the DC voltage Vdc has decreased (ΔIdch<0) and the inverter unit is in regeneration mode (Idch_i≦0). Therefore, in step S29, the operation mode processing unit 84 outputs a DC power subtraction amount STOBSOUT of "0."

Also, if the determination in step S25 is "No," processing proceeds to step S27, where the operation mode processing unit 84 determines whether the inverter-side DC power current estimate value Idch_i is less than "0." A "Yes" determination here means that the DC voltage Vdc has not decreased (ΔIdch≧0) and the operation mode of the inverter unit is regeneration mode (Idch_i<0). Therefore, in this case, processing proceeds to step S28, where the operation mode processing unit 84 outputs the output signal SG of the calculation unit 89 as the DC power subtraction amount STOBSOUT.

On the other hand, if the determination in step S27 is "No," this means that the DC voltage Vdc has not decreased (ΔIdch≧0) and the inverter unit's operation mode is powering mode (Idch_i≧0). In this case, processing proceeds to step S29, and the operation mode processing unit 84 outputs a DC power subtraction amount STOBSOUT of "0."

As described above, according to this embodiment, in a power conversion device in which one converter unit 2 supplies DC voltage to multiple inverter units 3, inverter units 3 in an operation mode that suppresses fluctuations in the DC voltage Vdc continue to operate as before, and conversely, inverter units 3 operating in a mode that amplifies fluctuations are restricted in operation, thereby improving instantaneous voltage drop tolerance.

In this embodiment, the inverter control devices 6a, 6b, 6c, etc., like those in the first embodiment (see FIG. 1), are equipped with a power limiter setter 65, an inverter output current limiter value calculator 66, and a current limiter 67. However, similar processing can be achieved by applying the inverter output current variable gain calculator 622 and the inverter output current variable calculator 624, which are elements of the second embodiment (see FIG. 6), instead of these elements.

[Comparative Example]
Next, various comparative examples will be described to clarify the effects of the above-described embodiments.
Comparative Example #1
First, comparative example #1 will be described. The configuration of comparative example #1 is the same as that of the first embodiment (see FIG. 1) except that it does not have the instantaneous sag observer 68. That is, in comparative example #1, the power limiter maximum value P _MAX output by the power limiter setter 65 is always equal to the power limiter set value P _SET (see FIG. 2).

FIG. 13 is a waveform diagram of each part in Comparative Example #1.
13, graph G31 represents the waveform of the converter-side DC power current Idc_c, graph G32 represents the waveform of the inverter model output current I_i, graph G33 represents the waveform of the inverter-side DC power current Idc_i, and graph G34 represents the waveform of the DC voltage Vdc. The horizontal axis in each graph represents time t. The fault detection level Vdcm in graph G34 is the same as that in FIG. 4 and is the minimum level allowed for the DC voltage Vdc.

If a momentary sag occurs at time t10 in Figure 13, the power supply from the AC power source 1 (see Figure 1) is interrupted, reducing the control capability of the converter unit 2. As a result, as shown in graph G31, the converter-side DC power current Idc_c also decreases after time t10. Meanwhile, as shown in graph G32, the limiter value I_im and the inverter model output current I_i remain constant before and after time t10. Then, the inverter-side DC power current Idc_i exceeds the converter-side DC power current Idc_c (see Figure 2), disrupting the balance in the DC circuit. As a result, as shown in graph G34, the DC voltage Vdc decreases after time t10. When the DC voltage Vdc falls below the fault detection level Vdcm, the inverter control device 6 shuts down the inverter unit 3.

Comparative Example #2
FIG. 14 is a diagram showing the overall configuration of a power conversion device 150 according to Comparative Example #2.
The configuration of the power conversion device 150 is similar to that of the power conversion device 100 of the first embodiment, except for the following points.
That is, the inverter control device 6 of the power conversion device 150 is not provided with the instantaneous sag observer 68 (see FIG. 1 ). The power conversion device 150 also has a power supply voltage fluctuation detector 90. The power supply voltage fluctuation detector 90 detects the amount of voltage fluctuation in the AC power supply 1, calculates a signal equivalent to the DC power subtraction amount STOBSOUT in the first embodiment in proportion to the detected amount of voltage fluctuation, and supplies the signal to the power limiter setter 65.

Thereby, the power limiter setter 65, like that of the first embodiment, subtracts the DC power subtraction amount STOBSOUT from the pre-stored power limiter set value P _SET , and outputs the subtraction result as the power limiter maximum value P _MAX to the inverter output current limiter value calculator 66. Other than the above, the configuration of comparative example #2 is the same as that of the first embodiment.

In this comparative example as well, the inverter output current limiter value calculator 66 can set the limiter value I_im of the output current I_inv of the converter unit 2 based on the power limiter maximum value P _MAX . However, in this comparative example, it becomes necessary to provide a power supply voltage fluctuation detector 90, which is a hardware device, in order to detect the power supply voltage fluctuation, which leads to an increase in costs.

Comparative Example #3
FIG. 15 is a diagram showing the overall configuration of a power conversion device 160 according to Comparative Example #3.
In Figure 15, the power conversion device 160, like the power conversion device 106 of the sixth embodiment (see Figure 10), includes one converter unit 2, one converter control device 5, one current detector 7, a plurality of inverter units 3a, 3b, 3c, ..., a plurality of electric motors 4a, 4b, 4c, ..., a plurality of inverter control devices 6a, 6b, 6c, ..., a plurality of speed detectors 8a, 8b, 8c, ..., a plurality of current detectors 9a, 9b, 9c, ..., and a plurality of voltage detectors 10a, 10b, 10c, ....

However, the inverter control devices 6a, 6b, 6c, etc. in the power conversion device 106 of this comparative example #3 are not provided with a momentary sag observer 68 (see FIG. 1). The power conversion device 106 is also provided with a power supply voltage fluctuation detector 90. The power supply voltage fluctuation detector 90 detects the amount of voltage fluctuation in the AC power supply 1 and supplies a signal equivalent to the DC power subtraction amount STOBSOUT in the first embodiment in proportion to the detected amount of voltage fluctuation to the power limiter setter 65, as in comparative example #2 (see FIG. 14).

Thereby, the power limiter setter 65, similarly to the first embodiment, subtracts the DC power subtraction amount STOBSOUT from the pre-stored power limiter set value P _SET , and outputs the subtraction result as the power limiter maximum value P _MAX to the inverter output current limiter value calculator 66. Other than the above, the configuration of comparative example #3 is the same as that of the sixth embodiment.

As described above, in Comparative Example #3, the DC power subtraction amount STOBSOUT must be transmitted to the power limiter setter 65 in each inverter control device 6a, 6b, 6c, etc. Therefore, transmission circuits are required for the number of inverter units 3a, 3b, 3c, etc., which poses the problem of a huge amount of required hardware in equipment with a large number of connected inverter units 3a, 3b, 3c, etc.

In contrast, according to the sixth to eighth embodiments described above, the DC power subtraction amount STOBSOUT on the converter unit 2 side can be calculated using the instantaneous sag observers 68, 682, and 684 within the inverter control device based on the detected current and voltage values in each inverter unit. This eliminates the need for information transmission from the power supply voltage fluctuation detector 90, etc., and reduces the amount of hardware required for transmission.

[Effects of the embodiment]
As described above, according to the embodiment, the power conversion devices 100, 102, 106 include a converter power conversion unit 21 that converts AC voltage into DC voltage, an inverter power conversion unit (31) that converts input DC voltage into AC voltage, smoothing capacitors 32, 33 inserted between the converter power conversion unit 21 and the inverter power conversion unit (31), DC voltage detectors 35, 36 that detect the terminal voltage (Vdc) of the smoothing capacitors 32, 33, and an inverter control device (6, 620) that suppresses the output power of the inverter power conversion unit (31) to be equal to or less than a specified output power limit value (P _MAX ), and that lowers the output power limit value (P _MAX ) as the rate of change |dVdc/dt| when the terminal voltage Vdc detected by the DC voltage detectors 35, 36 decreases increases.

As a result, even if information cannot be obtained from the converter power conversion unit 21, limiting of the output power of the inverter power conversion unit (31) can be performed when a momentary sag or the like occurs, and appropriate power suppression can be performed to ensure appropriate power conversion.

The inverter control device (6, 620) also includes an inverter DC power current estimation unit 82 that calculates an inverter side DC power current estimate Idch_i, which is an estimate of the inverter side DC power current Idc_i, which is a current related to the inverter power conversion unit (31), based on the inverter output voltage (V_inv) and inverter output current (I_inv) output by the inverter power conversion unit (31), and an inverter side DC power current estimation unit 83 that calculates a converter side DC power current Idc_c, which is a current related to the converter power conversion unit 21, based on the terminal voltage (Vdc). It is even more preferable to provide a fluctuating power current calculation unit 81 that calculates a fluctuating power current estimated value ΔIdch, which is an estimate of the fluctuating power current ΔIdc, which is the difference between the inverter side DC power current Idc_i and the fluctuating power current estimated value ΔIdch, a calculation unit 89 that calculates a DC power subtraction amount STOBSOUT, which indicates the degree of degradation in the control capability of the output power of the converter power conversion unit 21, based on the inverter side DC power current Idc_i and the fluctuating power current estimated value ΔIdch, and an output limiting unit (65, 66, 67) that limits the output power of the inverter power conversion unit (31) in accordance with the DC power subtraction amount STOBSOUT.

This makes it possible to understand the behavior of the power conversion devices 100, 102, and 106 based on a control model using the inverter-side DC power current estimate Idch_i and the fluctuating power current estimate ΔIdch, etc., enabling more appropriate power suppression.

Furthermore, it is more preferable that the output limiting units (65, 66, ₆₇ ) include an inverter output current limiter value calculator 66 that calculates a limiter value I_im for the inverter output current (I_inv) based on the output power limit value (P MAX ), the inverter output current (I_inv), and the inverter output voltage (V_inv), a current limiter unit 67 that limits the maximum value of the inverter output current (I_inv) based on the limiter value I_im, and a power limiter setter 65 that changes the output power limit value (P _MAX ) based on the DC power subtraction amount STOBSOUT. This makes it possible to change the output power limit value (P _MAX ) based on the DC power subtraction amount STOBSOUT, enabling more appropriate power suppression.

Furthermore, it is more preferable that the inverter control device 620 comprises an inverter output current variable gain calculator 622 that calculates an inverter output current variable gain value KSTOBS based on the converter side DC power set value (P _SET ) during normal operation and the DC power subtraction amount STOBSOUT, and an inverter output current variable calculator 624 that limits the magnitude of the inverter output current (I_inv) in accordance with the inverter output current variable gain value KSTOBS. This enables the inverter output current variable calculator 624 to limit the magnitude of the inverter output current (I_inv) in accordance with the inverter output current variable gain value KSTOBS, enabling more appropriate power suppression.

More preferably, the inverter control device (6, 620) limits the magnitude of the inverter output current (I_inv) on the condition that the difference value DF, which is the result of subtracting the converter-side DC power current estimate Idch_c, which is an estimate of the converter-side DC power current Idc_c, from the inverter-side DC power current estimate Idch_i, exceeds a predetermined instantaneous sag reference threshold value Sth. This prevents situations in which the inverter output current (I_inv) is limited when the DC voltage Vdc fluctuates transiently during normal operation, enabling more appropriate power suppression.

More preferably, the inverter control device (6, 620) limits the magnitude of the inverter output current (I_inv) on the condition that the rate of change (|dVdc/dt|c) of the terminal voltage (Vdc) exceeds a predetermined rate of change threshold Dth. This also prevents situations in which the inverter output current (I_inv) is limited when the DC voltage Vdc fluctuates transiently during normal operation, enabling more appropriate power suppression.

More preferably, the inverter control device (6, 620) further includes an adder 88 that adds the inverter-side DC power current estimate Idch_i and the fluctuating power current estimate ΔIdch to output the converter-side DC power current estimate Idch_c, and a filter adjuster 83 that suppresses ripple components in the converter-side DC power current estimate Idch_c. This makes it possible to suppress the effects of noise superimposed on the input voltage (Vdc), enabling more appropriate power suppression.

Furthermore, from another perspective, the sixth to eighth embodiments include a converter power conversion unit 21 that converts AC voltage to DC voltage, multiple inverter power conversion units 31a, 31b, etc. that convert the DC voltages input from the converter power conversion unit 21 into AC voltages, and multiple inverter control devices 6a, 6b, 6c, etc. that control the respective inverter power conversion units 31a, 31b, etc. Each of the multiple inverter control devices 6a, 6b, 6c, etc. includes a momentary sag observer 68 that calculates a DC power subtraction amount STOBSOUT and controls the output power of the corresponding inverter power conversion unit 31a, 31b, etc. based on the respective DC power subtraction amount STOBSOUT. As a result, even in a power conversion device (106) that includes multiple inverter power conversion units 31a, 31b, etc., appropriate power suppression can be used to achieve appropriate power conversion.

Furthermore, it is more preferable that the plurality of inverter control devices 6 a, 6 b, 6 c, ... each include an inverter output current limiter value calculator 66 that calculates a limiter value I_im for the inverter output current (I_inv) based on the output power limit value (P _MAX ), inverter output current (I_inv), and inverter output voltage (V_inv) for the corresponding inverter power conversion unit 31 a, 31 b, ..., a current limiter unit 67 that limits the maximum value of the inverter output current (I_inv) of the corresponding inverter power conversion unit 31 a, 31 b, ... based on the limiter value I_im, and a power limiter setter 65 that changes the output power limit value (P _MAX ) based on the DC power subtraction amount STOBSOUT. This makes it possible to change each output power limit value (P _MAX ) based on the DC power subtraction amount STOBSOUT corresponding to each inverter power conversion unit 31 a, 31 b, ..., thereby enabling more appropriate power suppression.

Furthermore, it is more preferable that each of the plurality of inverter control devices 6a, 6b, 6c, ... comprises an inverter output current variable gain calculator 622 that calculates an inverter output current variable gain value KSTOBS based on the converter-side DC power set value (P _SET ) during normal operation and the DC power subtraction amount STOBSOUT, and an inverter output current variable calculator 624 that limits the magnitude of the inverter output current (I_inv) in accordance with the inverter output current variable gain value KSTOBS. This enables the inverter output current variable calculator 624 to limit the magnitude of the inverter output current (I_inv) in accordance with the inverter output current variable gain value KSTOBS for each of the inverter power conversion units 31a, 31b, ..., thereby enabling more appropriate power suppression.

Furthermore, the plurality of inverter control devices 6a, 6b, 6c, ... each include a variable power current calculation unit 81 having the following functions: a function of calculating the ratio of the capacity of the corresponding inverter power conversion unit 31a, 31b, ... to the overall capacity; a function of calculating a variable power current estimated value ΔIdch that is an estimate of the variable power current ΔIdc that is the difference between the converter side DC power current Idc_c, which is the current related to the converter power conversion unit 21, and the inverter side DC power current Idc_i, which is the current related to each of the inverter power conversion units 31a, 31b, ..., based on the input voltage (Vdc) to each of the inverter power conversion units 31a, 31b, ...; and a function of determining the multiplication result of the variable power current estimated value ΔIdch and the ratio, and it is more preferable that the plurality of inverter control devices 6a, 6b, 6c, ... determine the DC power subtraction amount STOBSOUT based on the multiplication result. The output power limit value (P _MAX ) of each inverter power conversion unit 31 a, 31 b, ... can be changed according to the ratio of the capacity of each inverter power conversion unit 31 a, 31 b, ... to the total capacity, making it possible to achieve more appropriate power suppression.

Furthermore, each of the multiple inverter control devices 6a, 6b, 6c, etc. operates in either a powering mode in which energy is output to a corresponding load, or a regenerative mode in which energy is absorbed from a corresponding load. It is preferable that the inverter power conversion units 31a, 31b, etc. operating in an operation mode that suppresses fluctuations in the input voltage (Vdc) to each of the inverter power conversion units 31a, 31b, etc. do not suppress output power based on the DC power subtraction amount STOBSOUT, while the inverter power conversion units 31a, 31b, etc. operating in an operation mode that amplifies fluctuations in the input voltage (Vdc) do suppress output power based on the DC power subtraction amount STOBSOUT. This makes it possible to set whether or not to suppress output power depending on the operation mode, enabling more appropriate power suppression.

[Modification]
The present invention is not limited to the above-described embodiments and various modifications are possible. The above-described embodiments are provided as examples to facilitate understanding of the present invention and are not necessarily limited to those including all of the described configurations. Furthermore, it is possible to replace part of the configuration of one embodiment with the configuration of another embodiment, or to add the configuration of another embodiment to the configuration of one embodiment. It is also possible to delete part of the configuration of each embodiment, or to add or replace other configurations. Furthermore, the control lines and information lines shown in the figures are those considered necessary for explanation, and do not necessarily represent all control lines and information lines necessary for the product. In reality, it is possible to consider that almost all components are interconnected. Possible modifications of the above-described embodiments include, for example, the following:

(1) In the above embodiments, three-level devices are used for the converter unit 2 and inverter unit 3, but two-level devices can also be used.

(2) In the above embodiments, the output voltage V_inv output from the voltage detector 10 is used to calculate the inverter-side DC power current estimate Idch_i. However, instead of the output voltage V_inv, a calculated value equivalent to the output voltage V_inv may be used to calculate the inverter-side DC power current estimate Idch_i.

(3) Since the hardware such as the converter control device 5 and inverter control device 6 in the above embodiment can be implemented by a general-purpose computer, the flowcharts shown in Figures 7 and 12 and other programs that execute the various processes described above may be stored on a storage medium (a computer-readable recording medium on which a program is recorded) or distributed via a transmission path.

(4) In the above embodiment, the processes shown in Figures 7 and 12, as well as the other processes described above, are described as software processes using programs. However, some or all of these processes may be replaced with hardware processes using an ASIC (Application Specific Integrated Circuit) or FPGA (Field Programmable Gate Array), etc.

(5) The various processes performed in the above embodiments may be executed by a server computer via a network (not shown), and the various data stored in the above embodiments may also be stored on the server computer.

6, 6a, 6b, 6c, ..., 620 Inverter control device 21 Converter power conversion unit 31, 31a, 31b, ... Inverter power conversion unit 32, 33 Smoothing capacitor 35, 36 DC voltage detector 65 Power limiter setting device (output limiting unit)
66 Inverter output current limiter value calculator (output limiting unit)
67 Current limiter (output limiter)
68: Voltage sag observer 81: Fluctuating power current calculation unit 82: Inverter DC power current estimation unit 83: Filter adjustment unit 88: Adder 89: Calculation units 100, 102, 106: Power conversion device 622: Inverter output current variable gain calculation unit 624: Inverter output current variable calculation unit DF: Difference value Dth: Change rate threshold Sth: Voltage sag reference threshold Vdc: DC voltage (input voltage, terminal voltage)
I_im limiter value ΔIdc fluctuating power current I_inv output current (inverter output current)
Idc_c: DC power current on the converter side Idc_i: DC power current on the inverter side V_inv: Output voltage (inverter output voltage)
ΔIdch: Estimated fluctuating power current value Idch_c: Estimated converter side DC power current value Idch_i: Estimated inverter side DC power current value
KSTOBS Inverter output current variable gain value P _MAX Power limiter maximum value (output power limit value)
P _SET power limiter setting value (converter side DC power setting value)
STOBSOUT DC power subtraction amount

Claims (13)

a converter power conversion unit that converts AC voltage into DC voltage;
an inverter power conversion unit that converts an input DC voltage into an AC voltage;
a smoothing capacitor inserted between the converter power conversion unit and the inverter power conversion unit;
a DC voltage detector that detects a terminal voltage of the smoothing capacitor;
an inverter control device that suppresses the output power of the inverter power conversion unit to be equal to or less than a specified output power limit value, and that lowers the output power limit value as a rate of change when the terminal voltage detected by the DC voltage detector decreases increases. The inverter control device includes:
an inverter DC power current estimation unit that calculates an inverter-side DC power current estimate that is an estimate of an inverter-side DC power current that is a current related to the inverter power conversion unit, based on an inverter output voltage and an inverter output current output from the inverter power conversion unit;
a fluctuating power current calculation unit that calculates a fluctuating power current estimated value that is an estimate of a fluctuating power current that is a difference between a converter-side DC power current that is a current related to the converter power conversion unit and the inverter-side DC power current, based on the terminal voltage;
a calculation unit that calculates a subtraction amount of DC power that indicates a degree of deterioration in the control capability of the output power of the converter power conversion unit based on the inverter-side DC power current and the fluctuating power current estimation value;
The power conversion device according to claim 1 , further comprising: an output limiting unit that limits the output power of the inverter power conversion unit in accordance with the amount of DC power subtraction. The output limiting unit
an inverter output current limiter value calculator that calculates a limiter value related to the inverter output current based on the output power limit value, the inverter output current, and the inverter output voltage;
a current limiter that limits a maximum value of the inverter output current based on the limiter value;
The power conversion device according to claim 2 , further comprising: a power limiter setting device that changes the output power limit value based on the amount of DC power subtraction. The inverter control device includes:
an inverter output current variable gain calculator that calculates an inverter output current variable gain value based on a converter side DC power setting value during normal operation and the DC power subtraction amount;
The power conversion device according to claim 2 , further comprising: an inverter output current variable calculator that limits the magnitude of the inverter output current in accordance with the inverter output current variable gain value. 5. The power conversion device according to claim 2, wherein the inverter control device limits the magnitude of the inverter output current on condition that a difference value obtained by subtracting a converter-side DC power current estimate value, which is an estimate of the converter-side DC power current, from the inverter-side DC power current estimate value exceeds a predetermined instantaneous sag reference threshold value. 5. The power conversion device according to claim 2, wherein the inverter control device limits the magnitude of the inverter output current on condition that the rate of change of the terminal voltage exceeds a predetermined rate of change threshold. The inverter control device includes:
an adder that adds the inverter-side DC power current estimate value and the fluctuating power current estimate value to output a converter-side DC power current estimate value;
The power conversion device according to any one of claims 2 to 4, further comprising a filter adjustment unit that suppresses a ripple component in the converter-side DC power current estimate value. a plurality of the inverter power conversion units and a plurality of the inverter control devices are provided;
2. The power conversion device according to claim 1, wherein each of the plurality of inverter control devices includes a momentary sag observer that calculates a DC power subtraction amount, and controls the output power of the corresponding inverter power conversion unit based on the DC power subtraction amount. a converter power conversion unit that converts AC voltage into DC voltage;
a plurality of inverter power conversion units that convert the DC voltages input from the converter power conversion units into AC voltages;
a plurality of inverter control devices that control the respective inverter power conversion units;
a smoothing capacitor inserted between each of the inverter power conversion units and the converter power conversion unit ,
The plurality of inverter control devices include
calculating a DC power subtraction amount based on the DC voltage of the corresponding smoothing capacitor so as to suppress the output power of the corresponding inverter power conversion unit ;
a power conversion device that controls the output power of the corresponding inverter power conversion unit based on the subtracted amount of DC power so as not to exceed a control capability of the converter power conversion unit. a converter power conversion unit that converts AC voltage into DC voltage;
a plurality of inverter power conversion units that convert the DC voltages input from the converter power conversion units into AC voltages;
a plurality of inverter control devices that control the respective inverter power conversion units,
each of the plurality of inverter control devices includes a momentary sag observer that calculates a DC power subtraction amount, and controls the output power of the corresponding inverter power conversion unit based on the DC power subtraction amount;
Each of the plurality of inverter control devices includes:
an inverter output current limiter value calculator that calculates a limiter value for the inverter output current based on an output power limit value, an inverter output current, and an inverter output voltage for the corresponding inverter power conversion unit;
a current limiter that limits a maximum value of an inverter output current of the corresponding inverter power conversion unit based on the limiter value;
a power limiter setter that changes the output power limit value based on the amount of DC power subtraction. a converter power conversion unit that converts AC voltage into DC voltage;
a plurality of inverter power conversion units that convert the DC voltages input from the converter power conversion units into AC voltages;
a plurality of inverter control devices that control the respective inverter power conversion units,
each of the plurality of inverter control devices includes a momentary sag observer that calculates a DC power subtraction amount, and controls the output power of the corresponding inverter power conversion unit based on the DC power subtraction amount;
Each of the plurality of inverter control devices includes:
an inverter output current variable gain calculator that calculates an inverter output current variable gain value based on a converter side DC power setting value during normal operation and the DC power subtraction amount;
an inverter output current variable calculator that limits the magnitude of the inverter output current in accordance with the inverter output current variable gain value. Each of the plurality of inverter control devices includes:
a fluctuating power current calculation unit having a function of calculating a ratio of a capacity of the corresponding inverter power conversion unit to an overall capacity, a function of calculating a fluctuating power current estimation value that is an estimate of a fluctuating power current that is a difference between a converter side DC power current that is a current related to the converter power conversion unit and an inverter side DC power current that is a current related to each of the inverter power conversion units, based on an input voltage to each of the inverter power conversion units, and a function of obtaining a multiplication result of the fluctuating power current estimation value and the ratio,
The power conversion device according to claim 9 , wherein the plurality of inverter control devices determine the amount of DC power subtraction based on the multiplication result. a converter power conversion unit that converts AC voltage into DC voltage;
a plurality of inverter power conversion units that convert the DC voltages input from the converter power conversion units into AC voltages;
a plurality of inverter control devices that control the respective inverter power conversion units,
each of the plurality of inverter control devices includes a momentary sag observer that calculates a DC power subtraction amount, and controls the output power of the corresponding inverter power conversion unit based on the DC power subtraction amount;
the plurality of inverter control devices each operate in an operation mode of either a powering mode in which energy is output to a corresponding load or a regeneration mode in which energy is absorbed from the corresponding load, and the inverter power conversion units operating in the operation mode in which fluctuations in input voltage to each of the inverter power conversion units are suppressed do not suppress the output power based on the DC power subtraction amount, and the inverter power conversion units operating in the operation mode in which fluctuations in the input voltage are increased are suppressed the output power based on the DC power subtraction amount.