JP7833587B2 - liquid crystal display device - Google Patents

Description

The inventions disclosed herein and elsewhere relate to semiconductor devices and methods for driving semiconductor devices.

In recent years, flat panel displays such as liquid crystal displays (LCDs) have become widely popular. In display devices such as LCDs, each pixel arranged in the row and column directions is provided with a transistor, which is a switching element, a liquid crystal element electrically connected to the transistor, and a holding capacitor connected in parallel to the liquid crystal element.

The semiconductor material that constitutes the semiconductor film included in the transistor is amorphous (
Silicon semiconductors such as amorphous silicon or polycrystalline silicon are commonly used.

Furthermore, metal oxides exhibiting semiconductor properties (hereinafter referred to as oxide semiconductors) are semiconductor materials that can be applied to semiconductor films contained in transistors. For example, zinc oxide or In-Ga-
A technique for fabricating transistors using Zn-based oxide semiconductors has been disclosed (see Patent Documents 1 and 2).

In display devices, the retaining capacitance is provided with a dielectric film between a pair of electrodes, and at least one of the pair of electrodes is often formed of a light-shielding conductive film, such as the gate electrode, source electrode, or drain electrode that constitutes a transistor.

Increasing the capacitance value of the retention capacity allows for a longer period during which the orientation of the liquid crystal molecules in the liquid crystal element can be kept constant when an electric field is applied, thus reducing the power consumption of the display device.

For example, to increase the charge capacity of the retaining capacitance, one method is to increase the area occupied by the retaining capacitance, specifically, the area over which the pair of electrodes overlap. However, in the above-mentioned display device, if the area of the light-shielding conductive film is increased in order to increase the area over which the pair of electrodes overlap, the aperture ratio of the pixels decreases, and the display quality of the image deteriorates.

Therefore, a technology has been disclosed that enables an increase in charge capacity without reducing the aperture ratio by providing a translucent storage capacity formed using a translucent material in a display device (see Patent Document 3).

Japanese Patent Publication No. 2007-123861 Japanese Patent Publication No. 2007-96055 U.S. Patent No. 8,102,476

The retention capacitance of the display device disclosed in Patent Document 3 uses a translucent semiconductor film for one electrode, a translucent conductive film (specifically a pixel electrode) for the other electrode, and a translucent insulating film for the dielectric film. Furthermore, one of the electrodes included in the retention capacitance is a thin-film transistor (Thin Film) which is a switching element included in the display device.
The transistor (TFT) is formed by a channel layer (specifically an oxide semiconductor) provided on the gate insulating layer. The oxide semiconductor used as one of the electrodes is an electron-density increased oxide semiconductor that can be used in depletion-type TFTs. The other electrode is a pixel electrode. In Patent Document 3, the retaining capacitance is operated by setting the range of the potential difference (voltage) between the common potential applied to the capacitance line connected to one of the electrodes and the pixel potential applied to the pixel electrode to around 0V.

As shown in Patent Document 3, when one electrode of the holding capacitance is an oxide semiconductor with increased electron density, considering the method of manufacturing the display device, the TFT included in the display device and functioning as a switching element can be a depletion-type TFT. When a depletion-type transistor is used as a switching element, the threshold voltage of the transistor is a voltage lower than 0V.

Furthermore, in general, the video data potential supplied to the display element in a display device uses a potential within a potential amplitude centered on the common potential, and this common potential is often set to 0V.

As described above, a display device that uses a depletion-type TFT as a switching element, as shown in Patent Document 3, and has a retention capacitance formed using the oxide semiconductor contained in the TFT, consumes more power because the voltage range required to drive the display device becomes wider. Furthermore, the need to constantly apply voltage to the TFT in order for it to function as a switching element also contributes to the increased power consumption of the display device.

Therefore, one aspect of the present invention relates to a semiconductor device having a translucent retention capacitance, comprising a translucent semiconductor film, a translucent conductive film, and a translucent insulating film,
One of the objectives is to provide a semiconductor device with reduced power consumption.

Furthermore, in the case of the retaining capacitor described in Patent Document 3, a positive bias is constantly applied to the other electrode, which is a translucent conductive film, during its operation. Therefore, the threshold voltage of the retaining capacitor fluctuates in the positive direction over time. Consequently, if the voltage range for operating the retaining capacitor is near 0V, the retaining capacitor may not operate due to the change in the threshold voltage over time.

Therefore, in a holding capacitance where one of the electrodes is an oxide semiconductor, expanding its operating range is significant.

Therefore, one aspect of the present invention relates to a semiconductor device having a translucent retention capacitance, comprising a translucent semiconductor film, a translucent conductive film, and a translucent insulating film,
One of the objectives is to provide a driving method for stably operating the said holding capacity.

Furthermore, one aspect of the present invention aims to provide a semiconductor device capable of stably operating a light-transmitting retention capacitance.

In view of the above problems, one aspect of the present invention comprises an enhancement-type transistor, a retaining capacitor electrically connected to the transistor, a capacitance line electrically connected to the retaining capacitor, and a display element electrically connected to the transistor and the retaining capacitor, wherein the retaining capacitor has a translucent semiconductor film electrically connected to the capacitance line and functioning as one electrode, a translucent conductive film functioning as the other electrode and included in the display element, and a dielectric film provided between the one electrode and the other electrode, and the threshold voltage is 0V or higher, and the retaining capacitor is
This semiconductor device is characterized in that the potential difference between a translucent conductive film and a capacitance line is such that the translucent semiconductor film becomes conductive.

Furthermore, one aspect of the present invention comprises an enhancement-type transistor, a retaining capacitor electrically connected to the transistor, a capacitance line electrically connected to the retaining capacitor, and a display element electrically connected to the transistor and the retaining capacitor, wherein the retaining capacitor is electrically connected to the capacitance line and comprises a translucent semiconductor film that functions as one electrode, and a component that functions as the other electrode.
A semiconductor device comprising a light-transmitting conductive film included in a display element and a dielectric film provided between one electrode and the other electrode, wherein the threshold voltage is 0V or higher, and the retaining capacitance operates when the potential difference between the light-transmitting conductive film and the capacitance line is greater than the threshold voltage of the retaining capacitance.

The retaining capacitance can be formed by utilizing the transistor's formation process. The translucent semiconductor film that functions as one electrode of the retaining capacitance can be formed by utilizing the semiconductor film formation process included in the transistor. In other words, the translucent semiconductor film that functions as one electrode of the retaining capacitance is formed on the same surface as the translucent semiconductor film of the transistor. An oxide semiconductor film can be used for the translucent semiconductor film of the transistor, and a transistor using an oxide semiconductor film formed by appropriate processing is an enhancement-type transistor. Furthermore, because such a transistor has an extremely low off-current, the power consumption of the semiconductor device can be reduced.

In the following, semiconductor films included in transistors and translucent semiconductor films with retaining capacitance will be described as oxide semiconductor films.

In the above, the oxide semiconductor film having retention capacitance and the oxide semiconductor film having transistors have equivalent carrier densities. Furthermore, the oxide semiconductor film having retention capacitance,
This is an oxide semiconductor film that has not undergone any processing to intentionally increase carrier density, such as adding impurities to increase conductivity.

In one embodiment of the present invention, the transistor functioning as a switching element is an enhancement-type transistor having an oxide semiconductor film, and by using an oxide semiconductor film formed simultaneously with the oxide semiconductor film constituting the enhancement-type transistor for one electrode of the holding capacitance, the voltage range for driving the semiconductor device can be narrowed compared to a semiconductor device using a depletion-type transistor, thereby reducing the power consumption of the semiconductor device.

Furthermore, the dielectric film for retaining capacitance can be an insulating film provided on an oxide semiconductor film included in the transistor, and the transparent conductive film that functions as the other electrode for retaining capacitance can be a pixel electrode included in the display element and electrically connected to the transistor.

In this way, since the retained capacitance is light-transmitting, it can be formed in a large area (large area) in the pixel, in regions other than where the transistor is formed. Therefore, according to one aspect of the present invention, a semiconductor device can be obtained that increases charge capacitance while increasing the aperture ratio. Furthermore, by improving the aperture ratio, a semiconductor device with excellent display quality can be obtained.

Furthermore, one aspect of the present invention includes not only the semiconductor device described above, but also a method for driving the semiconductor device.

One aspect of the present invention is a method for driving a display device having a pixel comprising an enhancement-type transistor, a pixel electrode to which a predetermined potential is supplied from a signal line via the transistor, and a retaining capacitance having a translucent semiconductor film that functions as one electrode and is electrically connected to a capacitance line and functions as the other electrode, characterized in that a potential greater than or equal to the threshold voltage of the transistor is supplied to the scanning line having the gate electrode of the transistor to make the transistor conduct, a predetermined potential is supplied to the pixel electrode from the signal line, and a potential is supplied to the capacitance line such that the potential difference between the translucent semiconductor film and the capacitance line is higher than the threshold voltage of the retaining capacitance, thereby causing the retaining capacitance to maintain the potential difference between the potential of the pixel electrode and the potential of the capacitance line for a certain period of time.

Furthermore, one aspect of the present invention includes an enhancement-type transistor, a pixel electrode to which a predetermined potential is supplied from a signal line via the transistor, and the pixel electrode functions as one of the electrodes.
A method for driving a display device having a pixel having a retaining capacitance having a light-transmitting semiconductor film electrically connected to a capacitance line and functioning as the other electrode, characterized in that a potential greater than or equal to the threshold voltage of the transistor is supplied to the scanning line having the gate electrode of the transistor to make the transistor conduct, a predetermined potential is supplied to the pixel electrode from the signal line, and a potential that is more than or equal to the threshold voltage of the retaining capacitance than the predetermined potential supplied to the pixel electrode is supplied to the capacitance line, thereby causing the retaining capacitance to maintain a potential difference between the potential of the pixel electrode and the potential of the capacitance line for a certain period of time.

The above driving method makes it possible to broaden the operating range of the retaining capacitor of a semiconductor device having a retaining capacitor comprising a light-transmitting semiconductor film, a light-transmitting conductive film, and a light-transmitting insulating film, and to operate the retaining capacitor stably.

In this specification, the threshold voltage for retained capacitance refers to the voltage at which a storage layer is formed in the transparent semiconductor film and the charge capacitance begins to increase, assuming that a so-called MOS capacitance is formed by a translucent semiconductor film, a pixel electrode, and an insulating film provided between them.

In a semiconductor device having a retaining capacitor having a translucent semiconductor film, a translucent conductive film, and a translucent insulating film, a method for stably operating the retaining capacitor can be provided. Furthermore, according to one aspect of the present invention, a semiconductor device can be provided that has a retaining capacitor with a high aperture ratio and a large charge capacity, thereby reducing power consumption.

A diagram showing a semiconductor device, and a circuit diagram of a pixel. A diagram showing the Id-Vg curve, CV curve of the retained capacitance, and potentials of the pixel electrodes and capacitance lines of a transistor included in a semiconductor device. A diagram illustrating the operation method of the retaining capacitance included in a semiconductor device. A top view showing the pixels of a semiconductor device. A cross-sectional view showing the pixels of a semiconductor device. A cross-sectional view showing a method for fabricating pixels in a semiconductor device. A cross-sectional view showing a method for fabricating pixels in a semiconductor device. A top view showing the pixels of a semiconductor device. A cross-sectional view showing the pixels of a semiconductor device. A cross-sectional view showing the pixels of a semiconductor device. A top view showing the pixels of a semiconductor device. A cross-sectional view showing the pixels of a semiconductor device. A top view showing the pixels of a semiconductor device. A cross-sectional view showing the pixels of a semiconductor device. A top view showing the pixels of a semiconductor device. A top view showing the pixels of a semiconductor device. A cross-sectional view showing a transistor that can be applied to the pixels of a semiconductor device. A top view showing a semiconductor device. Cross-sectional view showing a semiconductor device. Cross-sectional view showing a semiconductor device. A top view and a cross-sectional view showing a portion of the scanning line drive circuit of a semiconductor device. A top view and a cross-sectional view showing the common connection part of a semiconductor device. A diagram showing an electronic device using a semiconductor device. A diagram showing an electronic device using a semiconductor device.

Embodiments of the present invention will be described in detail below with reference to the drawings. However, it will be readily apparent to those skilled in the art that the present invention is not limited to the following description, and its form and details can be modified in various ways. Furthermore, the present invention is not to be interpreted as being limited to the embodiments described below.

In the configuration of the present invention described below, the same reference numerals are used in common across different drawings for identical parts or parts having similar functions, and repeated explanations are omitted. Furthermore, when referring to parts having similar functions, the hatch patterns are the same, and reference numerals may not be assigned.

In the figures described herein, the size of each component, the thickness of the film, or the area may be exaggerated for clarity. Therefore, the scale is not necessarily limited to that shown.

In this specification, ordinal numbers such as "First,""Second," etc., are used for convenience only and do not indicate the order of processes or layering. Furthermore, in this specification, they do not represent specific names that identify the invention.

Furthermore, the functions of "source" and "drain" in this invention may be reversed when the direction of current changes during circuit operation. For this reason, in this specification,
The terms "source" and "drain" may be used interchangeably.

Furthermore, voltage refers to the potential difference between two points, while electric potential refers to the electrostatic energy (electrical potential energy) possessed by a unit charge in an electrostatic field at a given point. However, generally, the potential difference between the electric potential at a given point and a reference electric potential (for example, ground potential) is simply called electric potential or voltage, and electric potential and voltage are often used as synonyms. For this reason, unless otherwise specified, electric potential may be read as voltage, and voltage may be read as electric potential in this specification.

In this specification, when etching is performed after photolithography, the mask formed by the photolithography is to be removed.

(Embodiment 1)
In this embodiment, a semiconductor device and a method for driving such a semiconductor device, which are aspects of the present invention, will be described with reference to the drawings. In this embodiment, the semiconductor device, which are aspects of the present invention, will be described as a liquid crystal display device.

<Configuration of a semiconductor device>
Figure 1(A) shows an example of the configuration of a semiconductor device. The semiconductor device shown in Figure 1(A) is
The pixel unit 100, the scan line drive circuit 104, and the signal line drive circuit 106 are arranged in parallel or substantially parallel to each other, and the potential of m scan lines 10 is controlled by the scan line drive circuit 104.
The device comprises 7 and n signal lines 109, each arranged in parallel or substantially parallel to the others, and whose potential is controlled by a signal line drive circuit 106. Furthermore, the pixel unit 100 has a plurality of pixels 101 arranged in a matrix. It also has capacitance lines 115, each arranged in parallel or substantially parallel to the others along the scan line 107. The capacitance lines 115 may also be arranged in parallel or substantially parallel to the signal lines 109.

Each scan line 107 is electrically connected to n pixels 101 located in any row of the m rows and n columns of pixels 101 arranged in the pixel section 100. Also, each signal line 109
This refers to m pixels 101 arranged in m rows and n columns, where m pixels 10 are located in any of the columns.
It is electrically connected to 1. m and n are both integers greater than or equal to 1. Also, each capacitance line 115
This refers to n pixels 101 arranged in m rows and n columns, which are located in any row.
It is electrically connected to 1. If the capacitance lines 115 are arranged parallel or nearly parallel to each other along the signal lines 109, they are electrically connected to m pixels 101 located in any of the m rows and n columns of pixels 101.

Figure 1(B) is an example of a circuit diagram of a pixel 101 in the semiconductor device shown in Figure 1(A). The pixel 101 shown in Figure 1(B) consists of a transistor 103 electrically connected to the scan line 107 and the signal line 109, and a retaining capacitor 1, one of which is electrically connected to a capacitance line 115 that supplies a constant potential, and the other electrode which is electrically connected to the drain electrode of the transistor 103.
The device includes 05 and a liquid crystal element 108, the pixel electrode 121 of which is electrically connected to the drain electrode of the transistor 103 and the other electrode of the retaining capacitor 105, and the electrode (counter electrode) provided opposite to the pixel electrode 121 which is electrically connected to wiring that supplies a counter potential.

Transistor 103 is an enhancement-type transistor. Therefore, when the threshold voltage is 0V or higher, that is, when the gate voltage (Vg) is 0V or higher, an on-current (drain current: Id) flows, and transistor 103 becomes conductive (see Figure 2(A)).
In other words, when no gate voltage is applied, no on-current flows, so transistor 103
Compared to the case where a depletion-type transistor is applied, the power consumption of the semiconductor device can be reduced. In this specification, gate voltage refers to the potential difference between the gate electrode and the source electrode.

Furthermore, by using an oxide semiconductor film processed under appropriate conditions in the channel formation region of the transistor, the off-current of the transistor can be significantly reduced. Transistor 103
Since the channel formation region uses an oxide semiconductor film 111 processed under appropriate conditions, the transistor 103 is a transistor with extremely low off-current. Therefore, one embodiment of the present invention is a semiconductor device with reduced power consumption.

Furthermore, a transistor using an oxide semiconductor with increased carrier density becomes a depletion-type transistor. On the other hand, transistor 103 is an enhancement-type transistor, and the oxide semiconductor film 111 contained in transistor 103 is an oxide semiconductor film that has not undergone any treatment such as adding impurities to increase conductivity in order to intentionally increase the carrier density.

The retaining capacitor 105 has a dielectric film provided between a pair of electrodes and is translucent. One electrode of the retaining capacitor 105 is an oxide semiconductor film 119, and the dielectric film is a translucent insulating film provided on the oxide semiconductor film 111 included in the transistor 103, and the other electrode is a pixel electrode 121. Therefore, the retaining capacitor 105 is located in the transistor 1
It can be formed using the formation process of 03. By controlling the potential applied to the pixel electrode 121 and making the oxide semiconductor film 119 conductive, the oxide semiconductor film 119 functions as one of the electrodes. Therefore, the retaining capacitance 105 is MOS (Metal Oxide Semiconductor).
It can be said that it has an oscillator (capacitor) structure.

Furthermore, since the oxide semiconductor film 119 of the retained capacitance 105 is formed using the formation process of the oxide semiconductor film 111 included in the enhancement-type transistor 103, the retained capacitance 105, like the transistor 103, begins to charge when the potential difference between the pixel electrode 121 and the capacitance line 115 becomes 0V or higher. In other words, the threshold voltage of the retained capacitance 105 is 0V or higher.

Figure 2(B) shows the CV curve of the retained capacitance 105. In Figure 2(B), the horizontal axis represents the potential difference (VP-VC) between the pixel electrode 121 and the capacitance line 115 of the retained capacitance 105, and the vertical axis represents the capacitance (C) for that potential difference. Note that CV measurement (Capacitance-Vo
When the voltage frequency during ltage-measurement is lower than the frame frequency of the semiconductor device, the CV curve is as shown in Figure 2(B).

In this specification, the potential difference between the pixel electrode 121 and the capacitance line 115 is defined as the potential difference between the pixel electrode 12
This is the value obtained by subtracting the potential of capacitance line 115 (VC) from the potential of point 1 (VP) (see Figure 2(C)).
Figure 2(C) shows the transistor 103 and the retaining capacitor 105 for clarity.

Furthermore, since the oxide semiconductor film 119 with a retention capacity of 105 can be formed using the formation process of the oxide semiconductor film 111 contained in the transistor 103, it is an oxide semiconductor film that has not undergone any treatment such as adding impurities to increase conductivity in order to intentionally increase the carrier density. The carrier density of the oxide semiconductor film 119 is equivalent to that of the oxide semiconductor film 111.

From the above, since the oxide semiconductor film 119 of the retaining capacitance 105 and the oxide semiconductor film 111 included in the transistor 103 have the same configuration, the threshold voltage (Vth) of the retaining capacitance 105 is
This is equivalent to the threshold voltage (Vth_Tr) of transistor 103 (see Figures 2(A) and 2(B)).

The liquid crystal element 108 is an element that controls the transmission or non-transmission of light by the optical modulation effect of the liquid crystal sandwiched between a substrate on which the transistor 103 and pixel electrode 121 are formed and a substrate on which the counter electrode is formed. The optical modulation effect of the liquid crystal is controlled by the electric field applied to the liquid crystal (including a vertical electric field or a diagonal electric field). When a counter electrode (also called a common electrode) is formed on the substrate on which the pixel electrode is formed, the electric field applied to the liquid crystal becomes a horizontal electric field.

The scan line drive circuit 104 and the signal line drive circuit 106 are broadly divided into a logic circuit section and a switch section or buffer section. While the detailed configuration of the scan line drive circuit 104 and the signal line drive circuit 106 is omitted here, both circuits contain transistors.

Furthermore, the transistors included in either or both of the scan line drive circuit 104 and the signal line drive circuit 106 can be formed using the transistor formation process of transistor 103. In other words,
The scan line drive circuit 104 and the signal line drive circuit 106, or both, can be provided on the substrate on which the transistor 103 and the pixel electrode 121 are provided. By integrally forming the scan line drive circuit 104 and the signal line drive circuit 106, or both, on the substrate in this way, the number of components in the semiconductor device can be reduced, and manufacturing costs can be reduced.

Furthermore, it is preferable that the transistors included in either or both of the scan line drive circuit 104 and the signal line drive circuit 106 be enhancement-type transistors rather than depletion-type transistors, in order to ensure that the scan line drive circuit 104 and the signal line drive circuit 106 operate correctly. For this reason as well, it is significant that transistor 103 is an enhancement-type transistor.

As described above, since the retaining capacitance 105 is light-transmitting, it can be formed in a large area (large area) in regions other than where the transistor 103 of the pixel 101 is formed. Therefore, the semiconductor device shown in Figure 1 is a semiconductor device that increases the charge capacitance while increasing the aperture ratio. It is also a semiconductor device with excellent display quality. For example, in a semiconductor device according to one aspect of the present invention, the pixel density is 300 ppi (pixels per inch) or more (for example, 300 pp
When the frequency is approximately i to 330 ppi, the aperture ratio of the pixels can be increased to 50% or more, further to 55% or more, and even further to 60% or more. Furthermore, one aspect of the present invention is a semiconductor device in which the aperture ratio of the pixels is higher than that of conventional semiconductor devices.

Here, a method for driving a semiconductor device according to one aspect of the present invention will be described. Since the semiconductor device according to one aspect of the present invention has a holding capacitance 105 of a MOS capacitor structure,
In order to ensure stable operation of the retaining capacitance 105, the potential applied to the oxide semiconductor film 119 (in other words, the capacitance line 115), which functions as one of the electrodes of the retaining capacitance 105, should be as follows.

The CV curve of the retaining capacitor 105 is a CV curve where the threshold voltage is 0V or higher, as shown in Figure 2(B). In order to operate the retaining capacitor 105 stably during the period in which it is operated, the retaining capacitor 105 must be kept in a sufficiently charged state. For example, the potential difference (VP) between the potential of the pixel electrode 121 of the retaining capacitor 105 and the potential of the capacitance line 115 during that period.
Apply a potential VC to the capacitance line 115 such that -VC is between V1 and V2 in Figure 2(B) (see Figures 2(B) and 2(C)).

Furthermore, during the period in which the holding capacitance 105 is operated, the potential of the pixel electrode 121 is the signal line 1
The amplitude has positive and negative directions depending on the signal input to 09. Specifically, it fluctuates in the positive and negative directions with respect to the center potential of the video signal. Therefore, in order to keep the potential difference (VP-VC) between V1 and V2 during that period, the potential (VC) of the capacitance line 115 (oxide semiconductor film 119) should be set to a potential that is lower than or equal to the threshold voltage of the retaining capacitance 105 from the low potential of the pixel electrode 121 (see Figure 3). In Figure 3, the lowest potential supplied to the scan line 107 is GVss, and the highest potential is GVdd.

In other words, in order for the retaining capacitor 105 to operate, the potential difference between the pixel electrode 121 and the capacitance line 115 (oxide semiconductor film 119) should be higher than the threshold voltage of the retaining capacitor 105 during the period in which the retaining capacitor 105 is operating.

Furthermore, since the threshold voltage of the retaining capacitor 105 is equivalent to the threshold voltage of the transistor 103, the potential of the capacitance line 115 (oxide semiconductor film 119) should be kept lower than or equal to the threshold voltage of the transistor 103. In this way, the oxide semiconductor film 119 can be kept in a conductive state at all times during the period in which the retaining capacitor 105 is operating, and the retaining capacitor 105 can be operated stably.

From the above, by using a driving method according to one aspect of the present invention, a light-transmitting semiconductor film can be obtained.
In a semiconductor device having a retaining capacitance having a light-transmitting conductive film and a light-transmitting insulating film, the retaining capacitance can be operated stably over time.

Furthermore, transistor 103 is an enhancement-type transistor, and its retention capacitance 10
5 is formed using the formation process of transistor 103, which is an enhancement-type transistor. For this reason, the voltage range required to drive the retaining capacitance in a semiconductor device according to one aspect of the present invention is narrower than the voltage range required to drive a retaining capacitance formed using an oxide semiconductor film with increased carrier density, which is formed by applying a depletion-type transistor to the transistor and using the formation process of a depletion-type transistor.
Therefore, by adopting one aspect of the present invention, the power consumption of a semiconductor device can be reduced.

<Upper surface structure and cross-sectional structure of a semiconductor device>
Next, the specific structure of the semiconductor device will be described. Here, we will use pixel 101 as an example. A top view of pixel 101 is shown in Figure 4. Note that for clarity, some components of the semiconductor device (for example, liquid crystal element 108) are omitted in Figure 4.

In Figure 4, the scan line 107 is provided extending in a direction substantially perpendicular to the signal line 109 (left-right direction in the figure). The signal line 109 is provided extending in a direction substantially perpendicular to the scan line 107 (up-down direction in the figure). The capacitance line 115 is provided extending in a direction parallel to the scan line 107. Note that the scan line 107 and the capacitance line 115 are connected to the scan line drive circuit 104 (Figure 1 (A
The signal line 109 is electrically connected to the signal line drive circuit 106 (see Figure 1 (
A) It is electrically connected to (see reference).

Transistor 103 is located in the region where scan line 107 and signal line 109 intersect. Transistor 103 is located in an oxide semiconductor film 11 having at least a channel-forming region.
It includes 1, a gate electrode, a gate insulating film (not shown in Figure 4), a source electrode, and a drain electrode.

Furthermore, scan line 107 includes a region that functions as the gate electrode of transistor 103, and signal line 109 includes a region that functions as the source electrode of transistor 103. Conductive film 113
This region includes an area that functions as the drain electrode of transistor 103 and is electrically connected to the pixel electrode 121 through the opening 117. Note that in Figure 4, the pixel electrode 121 is shown without hatching.

The region that functions as a gate electrode is at least an oxide semiconductor film 1 in scan line 107.
This is the region that overlaps with 11. The region that functions as the source electrode is the region that overlaps with at least the oxide semiconductor film 111 on the signal line 109. The region that functions as the drain electrode is the region that overlaps with at least the oxide semiconductor film 111 on the conductive film 113. In the following, the gate electrode of transistor 103 may also be referred to as scan line 107, and the source electrode of transistor 103 may also be referred to as signal line 109. The drain electrode of transistor 103 may also be referred to as conductive film 11
Write 3.

Furthermore, in the top surface shape, the end of the scan line 107 is located outside the edge of the semiconductor film.
Therefore, the scan line 107 functions as a light-shielding film that blocks light from a light source such as a backlight. As a result, the oxide semiconductor film 111 contained in the transistor is not irradiated with light, and fluctuations in the electrical characteristics of the transistor can be suppressed.

The retention capacitance 105 is located in the region enclosed by the scan line 107 and the signal line 109. The retention capacitance 105 is composed of an oxide semiconductor film 119, a translucent pixel electrode 121, and a translucent insulating film (not shown in Figure 4) formed on the transistor 103 as a dielectric film. Since the oxide semiconductor film 119, the translucent pixel electrode 121, and the dielectric film are all translucent, the retention capacitance 105 is translucent. Furthermore,
Since the oxide semiconductor film 119 is in contact with the capacitance line 115 through the conductive film 125 provided in the opening 123, the retained capacitance 105 is electrically connected to the capacitance line 115.

The retained capacitance changes depending on the area over which the pair of electrodes overlap.
Reducing the pixel size to increase resolution also reduces the size of the holding capacitance, thus decreasing the charge capacity that can be stored. As a result, it may not be possible to operate the liquid crystal elements sufficiently. Since the holding capacitance 105 is light-transmitting, it is possible to form the holding capacitance as large as possible (over a large area) within the pixel, and the holding capacitance can be formed over the entire operating range of the liquid crystal elements 108. As long as sufficient charge capacity is secured to operate the liquid crystal elements sufficiently, the pixel density can be increased and the resolution can be increased.

This section describes the characteristics of transistors using oxide semiconductors. Transistors using oxide semiconductors are n-channel type transistors. Furthermore, oxygen vacancies in the oxide semiconductor can generate carriers, which may degrade the electrical characteristics and reliability of the transistor. For example, if the threshold voltage of the transistor is changed in the negative direction, drain current may flow when the gate voltage is 0V. This phenomenon, where drain current flows when the gate voltage is 0V, is called the normally-on characteristic.
A transistor in which no drain current flows when the gate voltage is 0V is called a normally-off transistor.

Therefore, when using an oxide semiconductor film, it is preferable to reduce defects, particularly oxygen vacancies, contained in the oxide semiconductor film as much as possible. For example, it is preferable that the spin density (corresponding to the defect density contained in the oxide semiconductor film) with a g value of 1.93 measured by electron spin resonance with the magnetic field applied parallel to the film surface is reduced to below the detection limit of the measuring instrument. By reducing defects, particularly oxygen vacancies, contained in the oxide semiconductor film as much as possible, it is possible to suppress the transistor from exhibiting normally-on characteristics, thereby improving the electrical characteristics and reliability of the semiconductor device.

Negative fluctuations in the threshold voltage of a transistor can be caused not only by oxygen vacancies but also by hydrogen (including hydrogen compounds such as water) contained in the oxide semiconductor film. Hydrogen in the oxide semiconductor film reacts with oxygen bonded to metal atoms to form water, and also creates vacancies (which can also be called oxygen vacancies) in the lattice (or regions where oxygen has been removed).
This forms a normal-on structure. Furthermore, some of the hydrogen reacts with oxygen to generate electrons, which act as carriers. Therefore, transistors with oxide semiconductor films containing hydrogen tend to exhibit normally-on characteristics.

From the above, it is preferable that hydrogen is reduced as much as possible in the oxide semiconductor film 111 contained in the transistor 103. Specifically, in the oxide semiconductor film 111, Secondary Ion Mass Spectrometry (SIMS)
The hydrogen concentration obtained by (methylation) is less than 5 × ^10¹⁸ atoms/ ^cm³ , preferably 1 × ^10¹⁸ atoms/ ^cm³ or less, more preferably 5 × ^10¹⁷ atoms/cm³.
The concentration should be less than or equal to ^m³ , and more preferably less than or equal to 1 × ^10¹⁶ atoms/ ^cm³ .

Furthermore, the oxide semiconductor film 111 has an alkali metal or alkaline earth metal concentration obtained by secondary ion mass spectrometry of 1 × ^10¹⁸ atoms/ ^cm³ or less, preferably 2 × 1
The current should be ^0-16 atoms/ ^cm³ or less. Alkali metals and alkaline earth metals may generate carriers when combined with oxide semiconductors, which may increase the off-current of transistor 103.

Furthermore, if nitrogen is present in the oxide semiconductor film 111, electrons, which act as carriers, are generated, increasing the carrier density and making it easier to achieve n-type characteristics. As a result, transistors having an oxide semiconductor film containing nitrogen tend to exhibit normally-on characteristics. Therefore, the oxide semiconductor film 111
In this, it is preferable that nitrogen is reduced as much as possible, for example, the nitrogen concentration is 5 ×
It is preferable to keep the concentration at ^10-18 atoms/ ^cm³ or less.

Furthermore, if the oxide semiconductor contains Group 14 elements such as silicon and carbon, electrons, which act as carriers, are generated, increasing the carrier density and making it easier to achieve n-type transistorization. Therefore, in a transistor having an oxide semiconductor film, the silicon concentration obtained by secondary ion mass spectrometry at the interface between the gate insulating film 127 (not shown in Figure 4) and the oxide semiconductor film 111 is 3 × ^10¹⁸ atoms/ ^cm³ or less, preferably 3 × ^10¹⁷ atoms/ ^cm³.
The following applies. At the interface, the carbon concentration obtained by secondary ion mass spectrometry shall be 3 × ^10¹⁸ atoms/ ^cm³ or less, preferably 3 × ^10¹⁷ atoms/ ^cm³ or less.

As described above, by using an oxide semiconductor film 111 that has been purified to a high degree by reducing impurities (such as hydrogen, nitrogen, silicon, carbon, alkali metals, or alkaline earth metals) as much as possible, it is possible to suppress the normally-on characteristics of the transistor 103 and to drastically reduce the off-current of the transistor 103. Therefore, one aspect of the present invention is a semiconductor device with good electrical characteristics and excellent reliability. It should be noted that the purified oxide semiconductor can be said to be an intrinsic or substantially intrinsic semiconductor.

Furthermore, since transistor 103 is an enhancement-type transistor, and oxide semiconductor film 111 is an oxide semiconductor film that has not undergone any treatment such as adding impurities to increase conductivity in order to intentionally increase the carrier density, the carrier density of oxide semiconductor film 111 is 1 × ^10¹⁷ / ^cm³ or less, or 1 × ^10¹⁶ / ^cm³ or less, or 1 × ^10¹⁵ /cm³ or less, or 1 × ^10¹⁴ /cm³ or ^less , or ¹ × ^10¹³ /cm³
It is ³ or less.

Furthermore, the oxide semiconductor film 119 contained in the holding capacity 105 can be formed using the formation process of the oxide semiconductor film 111 contained in the transistor 103, so the oxide semiconductor film 1
Since the carrier density of 19 is equivalent to that of the oxide semiconductor film 111, the carrier density of the oxide semiconductor film 119 is within the above range.

Furthermore, the low off-current of transistors using highly purified oxide semiconductor films indicates that
This can be proven through various experiments. For example, if the channel width is 1 × ^10⁶ μm and the channel length L
Even if the element is 10 μm, the voltage between the source electrode and the drain electrode (drain voltage) is 1
In the range of V to 10V, the off-current can be obtained to be below the measurement limit of the semiconductor parameter analyzer, i.e., 1 × ^10⁻¹³ A or less. In this case, the off-current corresponding to the value obtained by dividing by the channel width of the transistor is found to be 100 zA/μm or less. Furthermore, the off-current was measured using a circuit in which a retaining capacitor and a transistor are connected and the charge flowing into or out of the retaining capacitor is controlled by the transistor. In this measurement, a highly purified oxide semiconductor film was used in the channel formation region of the transistor, and the off-current of the transistor was measured from the change in the amount of charge per unit time of the retaining capacitor. As a result, it was found that an even lower off-current of several tens of yA/μm can be obtained when the voltage between the source electrode and drain electrode of the transistor is 3V. Therefore, transistors using highly purified oxide semiconductor films have a remarkably low off-current.

Next, Figure 5 shows cross-sectional views between the dashed lines A1-A2 and B1-B2 in Figure 4.

The cross-sectional structure between dashed lines A1-A2 and B1-B2 is as follows: A scanning line 107 including a region that functions as a gate electrode and a capacitance line 115 are provided on the substrate 102. A gate insulating film 127 is provided on the scanning line 107 and the capacitance line 115. An oxide semiconductor film 111 is provided on the region of the gate insulating film 127 that overlaps with the scanning line 107. An oxide semiconductor film 119 is provided on the gate insulating film 127. A signal line 109 including a region that functions as a source electrode and a conductive film 113 including a region that functions as a drain electrode are provided on the oxide semiconductor film 111 and the gate insulating film 127. An opening 1 reaching the capacitance line 115 is provided in a part of the gate insulating film 127 that is in contact with the capacitance line 115.
An opening 123 is provided, and a conductive film 125 is provided on the gate insulating film 127 and the oxide semiconductor film 119. Insulating films 129, 131, and 132, which function as protective insulating films for the transistor 103, are provided on the gate insulating film 127, the signal line 109, the oxide semiconductor film 111, the conductive film 113, the conductive film 125, and the oxide semiconductor film 119.
An opening 117 reaching the conductive film 113 is provided in the insulating film 129, insulating film 131, and insulating film 132, and a pixel electrode 121 is provided on the opening 117 and insulating film 132.
A 158 is provided on the pixel electrode 121 and the insulating film 132. An underlayer insulating film may be provided between the substrate 102, the scan line 107 and the capacitance line 115, and the gate insulating film 127.

Furthermore, the cross-sectional structure of the liquid crystal element 108 is as follows. A light-shielding film 152 is provided on the surface of the substrate 150 facing the substrate 102 in a region that overlaps with the transistor 103, a light-transmitting conductive film, which is a counter electrode 154, is provided so as to cover the light-shielding film 152, and an alignment film 156 is provided so as to cover the counter electrode. An alignment film 158 is provided on the pixel electrode 121 and the insulating film 132. An alignment film 158 is provided on the insulating film 132 and the pixel electrode 121 on the substrate 102 side. The liquid crystal 160 is provided with the alignment film 156 and the alignment film 158
It is provided in contact with the substrate and is sandwiched between substrates 102 and 150.

When a semiconductor device according to one aspect of the present invention is used as a liquid crystal display device, a light source such as a backlight, optical components such as polarizing plates (optical substrates) provided on the substrate 102 side and the substrate 150 side respectively, and sealing materials for fixing the substrate 102 and the substrate 150 are required, but these will be described later.

As described above, in the holding capacity 105 shown in this embodiment, one of the pair of electrodes is an oxide semiconductor film 119, and the other of the pair of electrodes is a pixel electrode 121.
The dielectric films provided between the pair of electrodes are insulating film 129, insulating film 131, and insulating film 132
That is the case.

The components of the above cross-sectional structure are described in detail below.

There are no major restrictions on the material of the substrate 102, but it must have at least enough heat resistance to withstand the heat treatment performed in the semiconductor device manufacturing process. For example, glass substrates, ceramic substrates, and plastic substrates are available, and for glass substrates, alkali-free glass substrates such as barium borosilicate glass, aluminoborosilicate glass, or aluminosilicate glass are preferable. Non-transparent substrates such as stainless steel alloys can also be used. In that case, it is preferable to provide an insulating film on the substrate surface. Note that the substrate 102 can also be a quartz substrate, a sapphire substrate, or a single-crystal semiconductor substrate, a polycrystalline semiconductor substrate, a compound semiconductor substrate, or an SOI (Silicone-On-Insulator) substrate. Note that when the semiconductor device according to one aspect of the present invention is a transmissive liquid crystal display device, the substrate 102 is a transmissive substrate.

The scanning lines 107 and capacitance lines 115 are preferably formed of a metal film because they carry a large current, and are typically made of molybdenum (Mo), titanium (Ti), tungsten (W), tantalum (
It is provided in a single-layer or laminated structure using metallic materials such as Ta, aluminum (Al), copper (Cu), chromium (Cr), neodymium (Nd), scandium (Sc), or alloy materials mainly composed of these materials.

Examples of scanning lines 107 and capacitance lines 115 include a single-layer structure using silicon-containing aluminum, a two-layer structure with titanium laminated on aluminum, a two-layer structure with titanium laminated on titanium nitride, a two-layer structure with tungsten laminated on titanium nitride, a two-layer structure with tungsten laminated on tantalum nitride, a two-layer structure with copper laminated on a copper-magnesium-aluminum alloy, and a three-layer structure with copper laminated on titanium nitride and tungsten formed on top of that.

Furthermore, a light-transmitting conductive material applicable to the pixel electrode 121 can be used as the material for the scanning line 107 and the capacitance line 115. Note that when the semiconductor device, according to one aspect of the present invention, is a reflective display device, a non-light-transmitting conductive material (e.g., a metallic material) can be used for the pixel electrode 121. In that case, a non-light-transmitting substrate 102 can also be used.

Furthermore, as the material for the scanning line 107 and capacitance line 115, nitrogen-containing metal oxides, specifically nitrogen-containing In-Ga-Zn oxides, nitrogen-containing In-Sn oxides, nitrogen-containing In-Ga oxides, nitrogen-containing In-Zn oxides, nitrogen-containing Sn oxides, nitrogen-containing In oxides, and metal nitride films (InN, SnN, etc.) can be used. These materials have a work function of 5 eV (electron volts) or more. By using these nitrogen-containing metal oxides as the scanning line (gate electrode), the threshold voltage of the transistor 103 can be varied in the positive direction, thereby realizing a transistor with so-called normally-off characteristics. For example, when using nitrogen-containing In-Ga-Zn oxides, the nitrogen concentration must be at least higher than that of the oxide semiconductor film 111, specifically, a nitrogen concentration of 7 atomic percent or more.
n-Ga-Zn oxides can be used.

In the scanning line 107 and capacitance line 115, it is preferable to use aluminum or copper, which are low-resistance materials. By using aluminum or copper, signal delay can be reduced and display quality can be improved. However, aluminum has low heat resistance and is prone to defects due to hillock, whisker, or migration. To prevent aluminum migration, it is preferable to laminate the aluminum with a metal material that has a higher melting point than aluminum, such as molybdenum, titanium, or tungsten. Similarly, when using copper, it is preferable to laminate it with a metal material that has a higher melting point than copper, such as molybdenum, titanium, or tungsten, to prevent defects due to migration and diffusion of copper elements.

Furthermore, as shown in Figures 4 and 5, it is preferable that the scanning line 107 be provided in a shape that allows the oxide semiconductor film 111 to be provided within the region of the scanning line 107. As shown in Figure 4, the oxide semiconductor film 111 is provided in a protruding shape in the region where the oxide semiconductor film 111 is provided.
It is preferable to provide the scanning line 107 inside the scanning line 107. In this way, the light (light from a light source such as a backlight in a liquid crystal display device) irradiated from the side of the substrate 102 opposite to the side on which the scanning line 107 is provided (the back surface of the substrate 102) is directed towards the scanning line 107.
Since 07 blocks light, fluctuations or decreases in the electrical characteristics of transistor 103 (such as threshold voltage) can be suppressed.

The gate insulating film 127 is, for example, silicon oxide, silicon oxide nitride, silicon oxide nitride,
The gate insulating film 127 is provided in a single-layer or multilayer structure using an insulating material such as silicon nitride, aluminum oxide, hafnium oxide, gallium oxide, or Ga-Zn-based metal oxide. In order to improve the interface characteristics with the oxide semiconductor film 111, it is preferable that at least the region of the gate insulating film 127 that is in contact with the oxide semiconductor film 111 is formed of an oxide insulating film.

Furthermore, by providing an insulating film with barrier properties against oxygen, hydrogen, water, etc., on the gate insulating film 127, it is possible to prevent the diffusion of oxygen contained in the oxide semiconductor film 111 to the outside and the intrusion of hydrogen, water, etc. into the oxide semiconductor film 111 from the outside. Examples of insulating films with barrier properties against oxygen, hydrogen, water, etc. include aluminum oxide film, aluminum oxide nitride film, gallium oxide film, gallium oxide nitride film, yttrium oxide film, yttrium oxide nitride film, hafnium oxide film, hafnium oxide nitride film, and silicon nitride film.

Furthermore, by using high-k materials such as hafnium silicate (HfSiO _x ), nitrogen-containing hafnium silicate (HfSi _x O _y N _z ), nitrogen-containing hafnium aluminate (HfAl _x O _y N _z ), hafnium oxide, and yttrium oxide as the gate insulating film 127, the gate leakage current of the transistor 103 can be reduced.

Furthermore, the gate insulating film 127 is preferably provided with the following laminated structure: a silicon nitride film with a low defect content is provided as the first silicon nitride film, a silicon nitride film with low hydrogen desorption and ammonia desorption is provided on the first silicon nitride film as the second silicon nitride film, and any of the oxide insulating films applicable as the gate insulating film 127 is provided on the second silicon nitride film.

As for the second silicon nitride film, in the temperature-controlled desorption gas analysis method, the amount of hydrogen molecules desorbed was 5
The amount of ammonia molecules removed is less than ^10²¹ molecules/ ^cm³ , preferably 3 × ^10²¹ molecules/ ^cm³ or less, more preferably 1 × ^10²¹ molecules/ ^cm³ or less, and the amount of ammonia molecules removed is less than 1 × ^10²² molecules/ ^cm³ , preferably 5 × ^10²¹ molecules/ ^cm³ or less, more preferably 1 × ^10²
It is preferable to use a nitride insulating film with a density of ¹ molecule/ ^cm³ or less. By using the first silicon nitride film and the second silicon nitride film as part of the gate insulating film 127, it is possible to form a gate insulating film 127 with a low defect rate and low desorption of hydrogen and ammonia. As a result, it is possible to reduce the amount of hydrogen and nitrogen contained in the gate insulating film 127 that moves to the oxide semiconductor film 111.

In transistors using oxide semiconductors, the presence of trapping levels (also called interface levels) at the interface between the oxide semiconductor film and the gate insulating film, or at the gate insulating film itself, causes fluctuations in the transistor's threshold voltage, typically a negative fluctuation in the threshold voltage, and an increase in the subthreshold coefficient (S value), which indicates the gate voltage required for the drain current to change by an order of magnitude when the transistor turns on. As a result, there is a problem in that the electrical characteristics vary from transistor to transistor. Therefore, by using a silicon nitride film with a low defect content as the gate insulating film, and by providing an oxide insulating film in the region in contact with the oxide semiconductor film 111, the negative shift in the threshold voltage can be reduced, and the increase in the S value can be suppressed.

The thickness of the gate insulating film 127 is 5 nm or more and 400 nm or less, preferably 10 nm or more.
The wavelength should be 00 nm or less, more preferably 50 nm to 250 nm.

The oxide semiconductor film 111 and the oxide semiconductor film 119 can have an amorphous structure, a single crystal structure, or a polycrystalline structure. Furthermore, the thickness of the oxide semiconductor film 111 is 1 nm or more.
nm or less, more preferably 1 nm to 50 nm, more preferably 1 nm to 30 nm
More preferably, the wavelength should be between 3 nm and 20 nm.

Furthermore, oxide semiconductor film 111 and oxide semiconductor film 119 are composed of the same metal element.
The oxide semiconductor applicable to the oxide semiconductor film 111 has an energy gap of 2 eV or more, preferably 2.5 eV or more, and more preferably 3 eV or more. By using an oxide semiconductor with a wide energy gap in this way, the off-current of the transistor 103 can be reduced.

The oxide semiconductor applicable to the oxide semiconductor film 111 is preferably a metal oxide containing at least indium (In) or zinc (Zn). Alternatively, it is preferable that it contains both In and Zn. Furthermore, in order to reduce fluctuations in the electrical characteristics of the transistor using the oxide semiconductor, it is preferable to have one or more stabilizers together with them.

Stabilizers include gallium (Ga), tin (Sn), hafnium (Hf), aluminum (Al), or zirconium (Zr). Other stabilizers include lanthanides such as lanthanum (La), cerium (Ce), and praseodymium (P).
r), neodymium (Nd), samarium (Sm), europium (Eu), gadolinium (
Examples include Gd, terbium (Tb), dysprosium (Dy), holmium (Ho), erbium (Er), thulium (Tm), ytterbium (Yb), and lutetium (Lu).

Oxide semiconductors applicable to oxide semiconductor films 111 and 119 include:
For example, oxide semiconductors include indium oxide, tin oxide, zinc oxide, and oxides containing two types of metals such as In-Zn oxides, Sn-Zn oxides, Al-Zn oxides, and Zn-
Mg-based oxides, Sn-Mg-based oxides, In-Mg-based oxides, In-Ga-based oxides, and In-Ga-Zn-based oxides (also written as IGZO), which are oxides containing three types of metals.
-Al-Zn oxides, In-Sn-Zn oxides, Sn-Ga-Zn oxides, Al-
Ga-Zn oxides, Sn-Al-Zn oxides, In-Hf-Zn oxides, In-Z
r-Zn oxides, In-Ti-Zn oxides, In-Sc-Zn oxides, In-Y-
Zn oxides, In-La-Zn oxides, In-Ce-Zn oxides, In-Pr-Zn oxides
n-based oxides, In-Nd-Zn oxides, In-Sm-Zn oxides, In-Eu-Zn
In-Gd-Zn oxide, In-Tb-Zn oxide, In-Dy-Zn oxide, In-Ho-Zn oxide, In-Er-Zn oxide, In-Tm-Zn oxide, In-Yb-Zn oxide, In-Lu-Zn oxide, In-Sn-Ga-Zn oxide (an oxide containing four types of metals), In-Hf-Ga-Zn oxide, In-A
l-Ga-Zn oxides, In-Sn-Al-Zn oxides, In-Sn-Hf-Zn oxides, and In-Hf-Al-Zn oxides can be used.

Here, an In-Ga-Zn oxide refers to an oxide whose main components are In, Ga, and Zn, and the ratio of In, Ga, and Zn is not specified. Furthermore, other metallic elements besides In, Ga, and Zn may also be present.

Furthermore, as an oxide semiconductor, a material denoted as _InMO3 (ZnO) _m (m>0) may be used. Hereinafter, M represents one or more metallic elements selected from Ga, Fe, Mn, and Co, or the element used as a stabilizer as described above.

For example, In:Ga:Zn = 1:1:1 (= 1/3:1/3:1/3), In:Ga:
Zn = 2:2:1 (= 2/5:2/5:1/5), or In:Ga:Zn = 3:1:
In-Ga-Zn metal oxides with an atomic ratio of 2 (= 1/2 : 1/6 : 1/3) can be used. Alternatively, In:Sn:Zn = 1:1:1 (= 1/3 : 1/3 : 1/3),
In:Sn:Zn = 2:1:3 (= 1/3:1/6:1/2) or In:Sn:Zn
It is preferable to use an In-Sn-Zn metal oxide with an atomic ratio of 2:1:5 (= 1/4:1/8:5/8). Note that the atomic ratio of the metal elements contained in the metal oxide includes a variation of plus or minus 20% from the above atomic ratio as an error.

However, the selection is not limited to these, and an appropriate atomic ratio should be used depending on the required semiconductor and electrical properties (field-effect mobility, threshold voltage, variability, etc.). Furthermore, in order to obtain the required semiconductor properties, it is preferable to set appropriate carrier density, impurity concentration, defect density, atomic ratio of metal elements to oxygen, interatomic distance, density, etc. For example, In-S
High field-effect mobility can be obtained relatively easily with n-Zn oxides. However, In
Even with Ga-Zn oxides, the field-effect mobility can be increased by lowering the bulk defect density.

The oxide semiconductor film 119 can be made of an oxide semiconductor applicable to the oxide semiconductor film 111. Furthermore, since it is possible to form both the oxide semiconductor film 111 and the oxide semiconductor film 119, the oxide semiconductor film 119 contains the metal elements of the oxide semiconductor that constitute the oxide semiconductor film 111.

The insulating films 129, 131, and 132, which function as protective insulating films for transistor 103 and dielectric films for retention capacitance 105, are insulating films made of materials applicable to the gate insulating film 127. In particular, it is preferable that insulating films 129 and 131 be oxide insulating films and insulating film 132 be nitride insulating film. Furthermore, by making insulating film 132 a nitride insulating film, it is possible to suppress the intrusion of impurities such as hydrogen and water into transistor 103 (especially oxide semiconductor film 111) from the outside. Note that insulating film 129 may be omitted.

Furthermore, it is preferable that one or both of the insulating film 129 and the insulating film 131 are oxide insulating films containing more oxygen than the oxygen that satisfies the stoichiometric composition. This prevents the desorption of oxygen from the oxide semiconductor film 111 and allows the oxygen contained in the oxygen-excess region to move to the oxide semiconductor film 111, thereby reducing oxygen vacancies. For example,
By using an oxide insulating film in which the amount of oxygen molecules released, as measured by temperature-controlled desorption gas analysis (hereinafter referred to as TDS analysis), is 1.0 × ^10¹⁸ molecules/ ^cm³ or more, an oxide semiconductor film 1
The oxygen vacancies contained in 11 can be reduced. Note that insulating film 129 and insulating film 131
A region containing an excess of oxygen in one or both of the following (oxygen-rich region) compared to the stoichiometric composition.
Even if it is an oxide insulating film in which oxygen is partially present, the presence of an oxygen-rich region in at least the region superimposed on the oxide semiconductor film 111 prevents the desorption of oxygen from the oxide semiconductor film 111 and makes it possible to move the oxygen contained in the oxygen-rich region to the oxide semiconductor film 111, thereby reducing oxygen vacancies.

If the insulating film 131 is an oxide insulating film containing more oxygen than satisfies the stoichiometric composition, it is preferable that the insulating film 129 be an oxide insulating film that permeates oxygen.
In this case, not all of the oxygen that enters the insulating film 129 from the outside passes through the insulating film 129, and some oxygen remains in the insulating film 129. Also, the insulating film 129 is already contained in it,
Some oxygen also moves from 29 to the outside. Therefore, it is preferable that the insulating film 129 is an oxide insulating film with a large oxygen diffusion coefficient.

Furthermore, since the insulating film 129 is in contact with the oxide semiconductor film 111, it is preferable that the insulating film is an oxide insulating film that not only allows oxygen to pass through but also reduces the interface state density with the oxide semiconductor film 111. For example, it is preferable that the insulating film 129 is an oxide insulating film with a lower defect density in the film than the insulating film 131. Specifically, the g value measured by electron spin resonance = 2.001 (E')
The oxide insulating film has a spin density of 3.0 × ^10¹⁷ spins/ ^cm³ or less, preferably 5.0 × ^10¹⁶ spins/ ^cm³ or less at the -center. Note that a spin density of g = 2.001 determined by electron spin resonance measurement corresponds to the amount of dangling bonds present in the insulating film 129.

The thickness of the insulating film 129 can be 5 nm or more and 150 nm or less, preferably 5 nm or more and 50 nm or less, preferably 10 nm or more and 30 nm or less. The thickness of the insulating film 131 is
The wavelength can be 30 nm to 500 nm, preferably 150 nm to 400 nm.

Furthermore, by making the insulating film 129 provided on the oxide semiconductor film 111 an oxide insulating film that allows oxygen to pass through and reduces the interface state density with the oxide semiconductor film 111, and by making the insulating film 131 an oxide insulating film containing an oxygen-rich region or an oxide insulating film containing more oxygen than satisfies the stoichiometric composition, it becomes easier to supply oxygen to the oxide semiconductor film 111.
This prevents oxygen from being released from the oxide semiconductor film 111 and allows oxygen contained in the insulating film 131 to be transferred to the oxide semiconductor film 111, thereby compensating for oxygen deficiencies in the oxide semiconductor film 111. As a result, it is possible to suppress the transistor 103 from exhibiting normally-on characteristics.

Furthermore, if one or both of the insulating film 129 and the insulating film 131 are oxide insulating films containing nitrogen, such as silicon oxide nitride or silicon nitride oxide, the nitrogen concentration obtained from SIMS is:
SIMS detection limit or higher, less than 3 × ^10²⁰ atoms/ ^cm³ , preferably 1 × ^10¹⁸ a
It is preferable to set the nitrogen content to toms/ ^cm³ or more and 1 × ^10²⁰ atoms/ ^cm³ or less. By doing so, the amount of nitrogen transferred to the oxide semiconductor film 111 contained in the transistor 103 can be reduced. In addition, by doing so, the amount of defects in the nitrogen-containing oxide insulating film itself can be reduced.

When insulating film 132 is a nitride insulating film, it is preferable that one or both of insulating films 129 and 131 are insulating films that have barrier properties against nitrogen. For example, a dense oxide insulating film can have barrier properties against nitrogen, and specifically, it is preferable that the oxide insulating film has an etching rate of 10 nm/min or less when using 0.5 wt% hydrofluoric acid at 25°C.

A nitride insulating film with a low hydrogen content can be provided as the insulating film 132. For example, the amount of hydrogen molecules released by TDS analysis of the nitride insulating film is 5.0 ×
The nitride insulating film has a density of less than ^10²¹ / ^cm³ , preferably less than 3.0 × ^10²¹ / ^cm³ , and more preferably less than 1.0 × ^10²¹ / ^cm³ .

Furthermore, the above nitride insulating film is useful as a protective insulating film for transistor 103 because it has excellent step coverage properties.

The insulating film 132 is made to a thickness that can suppress the intrusion of impurities such as hydrogen and water from the outside. For example, it can be 50 nm to 200 nm, preferably 50 nm to 150 nm, and more preferably 50 nm to 100 nm.

Furthermore, by using a nitride insulating film as the insulating film 132 provided on the insulating film 131,
This can prevent impurities such as hydrogen and water from entering the oxide semiconductor film 111 from the outside.
Furthermore, by providing a nitride insulating film with a low hydrogen content as the insulating film 132, fluctuations in the electrical characteristics of the transistor 103 can be suppressed.

Furthermore, a silicon oxide film formed by a CVD method using organic silane gas may be provided between the insulating film 131 and the insulating film 132. Since this silicon oxide film has excellent step coverage, it is useful as a protective insulating film for the transistor 103. The silicon oxide film is 30
It can be provided in the range of 0 nm to 600 nm. Examples of organic silane gases include ethyl silicate (TEOS: chemical formula Si( _OC2H5 ) _{4 )} and tetramethylsilane (TMS: chemical formula Si
( _CH3 ) ₄ ), tetramethylcyclotetrasiloxane (TMCTS), octamethylcyclotetrasiloxane (OMCTS), hexamethyldisilazane (HMDS), triethoxysilane (SiH( _OC2H5 ) ₃ ), trisdimethylaminosilane (SiH( _N (C)
Silicon-containing compounds such as _H3 ) ₂ ) ₃ ) can be used.

The pixel electrode 121 is formed using a light-transmitting conductive film. The light-transmitting conductive film is made of a light-transmitting conductive material such as indium tin oxide, indium oxide containing tungsten oxide, indium zinc oxide containing tungsten oxide, indium oxide containing titanium oxide, indium tin oxide containing titanium oxide, indium zinc oxide, or indium tin oxide with silicon oxide added.

Substrate 150 can use a substrate that is applicable to substrate 102.

The light-shielding film 152, also called a black matrix, is provided in liquid crystal display devices to suppress light leakage from light sources such as backlights and to suppress contrast reduction due to color mixing that occurs when color display is performed using color filters. The light-shielding film 152 can be provided using commonly available materials. For example, metals and organic resins containing pigments can be used as light-shielding materials. The light-shielding film 152 is provided not only in the region superimposed on the transistor 103, but also in the pixel portion 10 such as the scan line drive circuit 104 and the signal line drive circuit 106 (see Figure 1).
It may be placed in a region other than 0.

Furthermore, in the pixel section 100, a colored film having the function of transmitting light of a predetermined wavelength may be provided between the light-shielding films provided on each pixel. Moreover, an overcoat film may be provided between the light-shielding film, the colored film, and the counter electrode.

The opposing electrode 154 is provided using a material suitable for use with the pixel electrode 121.

The orientation films 156 and 158 can be provided using commonly available materials such as polyamide.

Liquid crystal 160 includes thermotropic liquid crystal, low molecular weight liquid crystal, polymer liquid crystal, polymer dispersed liquid crystal,
Ferroelectric liquid crystals, antiferroelectric liquid crystals, etc., can be used. Depending on the conditions, these liquid crystal materials exhibit cholesteric phases, smectic phases, cubic phases, chiral nematic phases, isotropic phases, etc.

Furthermore, the liquid crystal 160 may be a liquid crystal exhibiting a blue phase without using an alignment film. The blue phase is one of the liquid crystal phases, and it appears just before the transition from the cholesteric phase to the isotropic phase when the temperature of the cholesteric liquid crystal is increased. Since the blue phase only appears in a narrow temperature range, a liquid crystal composition mixed with a chiral agent is used to improve the temperature range. Note that the alignment film is formed of an organic resin, and since organic resins contain hydrogen or water, there is a risk of degrading the electrical characteristics of the transistors in a semiconductor device according to one embodiment of the present invention. Therefore, by using the blue phase as the liquid crystal 160, a semiconductor device according to one embodiment of the present invention can be manufactured without using an organic resin, and a highly reliable semiconductor device can be obtained.

Furthermore, the liquid crystal element 108, based on the display mode of the liquid crystal element 108, the pixel electrode 12
The configuration can be changed as appropriate, such as by deforming the shape of 1 and the opposing electrode 154, or by forming protrusions called ribs.

<Methods for fabricating semiconductor devices>
Next, the method for fabricating the above-mentioned semiconductor device will be explained using Figures 6 and 7.

First, scan lines 107 and capacitance lines 115 are formed on the substrate 102, an insulating film 126 is formed so as to cover the scan lines 107 and capacitance lines 115, an oxide semiconductor film 111 is formed in the region of the insulating film 126 that overlaps with the scan lines 107, and later a pixel electrode 1
The oxide semiconductor film 119 is formed so as to overlap with the region where 21 is formed (see Figure 6(A)).

The scanning lines 107 and capacitance lines 115 can be formed by forming a conductive film using the materials listed above, forming a mask on the conductive film, and processing using the mask. Various film formation methods such as vapor deposition, CVD, sputtering, and spin coating can be used for the conductive film. The thickness of the conductive film is not particularly limited and can be determined considering the formation time and desired resistivity. The mask can be, for example, a resist mask formed by the first photolithography step. Furthermore, the conductive film can be processed by dry etching, wet etching, or both.

The insulating film 126 can be formed using a material applicable to the gate insulating film 127, using various film deposition methods such as CVD or sputtering.
When applying gallium oxide to 7, use MOCVD (Metal Organic Che
The insulating film 126 can be formed using the (mical Vapor Deposition) method.

The oxide semiconductor film 111 and oxide semiconductor film 119 can be formed by forming an oxide semiconductor film using the oxide semiconductor listed above, forming a mask on the oxide semiconductor film, and processing using the mask. Therefore, the oxide semiconductor film 111 and oxide semiconductor film 119 are composed of the same metal element. The oxide semiconductor film can be formed using sputtering, coating, pulsed laser deposition, laser ablation, etc. By using a printing method, the element-separated oxide semiconductor film 111 and oxide semiconductor film 11
9 can be formed directly on the gate insulating film 127. When forming the oxide semiconductor film by sputtering, the power supply for generating the plasma is an RF power supply, AC power supply, etc.
A power supply unit or DC power supply unit can be used as appropriate. The sputtering gas can be a noble gas (typically argon), oxygen, or a mixture of a noble gas and oxygen, as appropriate.
In the case of a mixed gas of a noble gas and oxygen, it is preferable to increase the gas ratio of oxygen to the noble gas. The target can be appropriately selected according to the composition of the oxide semiconductor film to be formed. The mask can be, for example, a resist mask formed by a second photolithography step. The oxide semiconductor film can be processed by dry etching, wet etching, or both. Etching conditions (etching gas, etching solution, etching time, temperature, etc.) are appropriately set according to the material so that the film can be etched into the desired shape.

It is preferable to perform a heat treatment after forming the oxide semiconductor film 111 and the oxide semiconductor film 119 to dehydrogenate or dehydrate the oxide semiconductor film 111 and the oxide semiconductor film 119.
The temperature of the heat treatment is typically 150°C or higher and below the substrate strain point, preferably 200°C.
The temperature should be 450°C or higher, more preferably 300°C or higher and 450°C or lower. This heat treatment may also be performed on the oxide semiconductor film before it is processed into oxide semiconductor film 111 and oxide semiconductor film 119.

In this heat treatment, the heat treatment apparatus is not limited to an electric furnace; it may also be an apparatus that heats the object to be treated by heat conduction from a heated medium such as a gas, or by thermal radiation. For example,
GRTA (Gas Rapid Thermal Anneal) device, LRTA (La
RTA (Rapid Th) of devices such as mp Rapid Thermal Anneal
An LRTA (Laser Radiation Therapy) device can be used. An LRTA device is a device that heats the workpiece by radiating light (electromagnetic waves) emitted from lamps such as halogen lamps, metal halide lamps, xenon arc lamps, carbon arc lamps, high-pressure sodium lamps, and high-pressure mercury lamps. A GRTA (Great Heat Treatment) device is a device that performs heat treatment using high-temperature gas.

The heat treatment may be carried out under an atmosphere of nitrogen, oxygen, ultra-dry air (air with a water content of 20 ppm or less, preferably 1 ppm or less, preferably 10 ppb or less), or a noble gas (argon, helium, etc.). It is preferable that the nitrogen, oxygen, ultra-dry air, or noble gas does not contain hydrogen, water, etc. Heating may be performed in an inert gas atmosphere first, followed by heating in an oxygen atmosphere. The treatment time should be 3 minutes to 24 hours.

Furthermore, when an underlayer insulating film is provided between the substrate 102 and the scanning lines 107, capacitance lines 115, and gate insulating film 127, the underlayer insulating film can be formed from silicon oxide, silicon oxide nitride, silicon nitride, silicon oxide nitride, gallium oxide, hafnium oxide, yttrium oxide, aluminum oxide, aluminum oxide nitride, etc. By forming the underlayer insulating film from silicon nitride, gallium oxide, hafnium oxide, yttrium oxide, aluminum oxide, etc., the diffusion of impurities, typically alkali metals, water, hydrogen, etc., from the substrate 102 into the oxide semiconductor film 111 can be suppressed. The underlayer insulating film can be formed using sputtering or CVD.

Next, an opening 123 reaching the capacitance line 115 is formed in the insulating film 126 to create the gate insulating film 127
After forming, the signal line 109 including the source electrode of transistor 103, transistor 10
A conductive film 113 containing the drain electrode 3, and a conductive film 125 that electrically connects the oxide semiconductor film 119 and the capacitance line 115 are formed (see Figure 6(B)).

The opening 123 can be formed by creating a mask in a third photolithography step such that a portion of the area overlapping with the capacitance lines 115 of the insulating film 126 is exposed, and then processing using the mask. The mask and processing can be carried out in the same manner as the scanning lines 107 and the capacitance lines 115.

The signal line 109, conductive film 113, and conductive film 125 can be formed by forming a conductive film using a material applicable to the signal line 109, conductive film 113, and conductive film 125, forming a mask on the conductive film by a fourth photolithography step, and processing using the mask. The mask and processing can be carried out in the same manner as for the scan line 107 and capacitance line 115. After forming the signal line 109 and conductive film 113, the oxide semiconductor film 111
By cleaning the surface, fluctuations in the electrical characteristics of transistor 103 can be reduced. For example, a diluted phosphoric acid solution can be used, specifically 85% phosphoric acid.
A phosphoric acid solution diluted to twice its original concentration can be used.

Next, oxide semiconductor film 111, oxide semiconductor film 119, signal line 109, conductive film 113,
An insulating film 128 is formed on the conductive film 125 and the gate insulating film 127, an insulating film 130 is formed on the insulating film 128, and an insulating film 133 is formed on the insulating film 130 (see Figure 7(A)). It is preferable that the insulating films 128, 130, and 133 are formed continuously.
In this way, it is possible to suppress the incorporation of impurities into the interfaces of insulating film 128, insulating film 130, and insulating film 133.

The insulating film 128 can be formed using a material applicable to the insulating film 129, using various film deposition methods such as CVD or sputtering. The insulating film 130 is formed using the insulating film 131
It can be formed using a material applicable to the insulating film 132. The insulating film 133 can be formed using a material applicable to the insulating film 132.

When an oxide insulating film that can reduce the interface state density with the oxide semiconductor film 111 is applied to the insulating film 129, the insulating film 128 can be formed using the following formation conditions. Here, we will describe the case in which a silicon oxide film or a silicon oxide nitride film is formed as the oxide insulating film. The formation conditions are as follows: The substrate placed in the vacuum-evacuated processing chamber of the plasma CVD apparatus is 1
The conditions are as follows: the temperature is maintained at 80°C to 400°C, more preferably 200°C to 370°C; a depositing gas containing silicon as a raw material gas and an oxidizing gas are introduced into the processing chamber to set the pressure inside the processing chamber to 20 Pa to 250 Pa, more preferably 40 Pa to 200 Pa; and high-frequency power is supplied to electrodes installed inside the processing chamber.

Typical examples of silicon-containing sedimentary gases include silanes, disilanes, trisilanes, and silane fluorides. Oxidizing gases include oxygen, ozone, nitrous oxide, and nitrogen dioxide.

Furthermore, by increasing the amount of oxidizing gas relative to the silicon-containing sedimentary gas to more than 100 times,
It is possible to reduce the hydrogen content in insulating film 128 (insulating film 129), and also to reduce the dangling bonds contained in insulating film 128 (insulating film 129). Oxygen moving from insulating film 130 (insulating film 131) may be trapped by the dangling bonds contained in insulating film 128 (insulating film 129), so if the dangling bonds contained in insulating film 128 (insulating film 129) are reduced, insulating film 130 (insulating film 13
1) The oxygen contained in the oxide semiconductor film 111 can be efficiently transferred to the oxide semiconductor film 111, and the oxygen vacancies contained in the oxide semiconductor film 111 can be reduced. As a result, the amount of hydrogen mixed into the oxide semiconductor film 111 can be reduced, and the oxygen vacancies contained in the oxide semiconductor film 111 can be reduced.

When the insulating film 131 is an oxide insulating film containing the above-mentioned oxygen-rich region or an oxide insulating film containing more oxygen than satisfies the stoichiometric composition, the insulating film 130 can be formed using the following formation conditions. Here, the case in which a silicon oxide film or a silicon oxidizide film is formed as the oxide insulating film is described. The formation conditions are as follows: The substrate placed in the vacuum-evacuated processing chamber of the plasma CVD apparatus is heated to 180°C or higher and 260°C or lower, more preferably 180°C.
Maintain the temperature between 230°C and 30°C, introduce the raw material gas into the processing chamber, and set the pressure inside the processing chamber to 10°C.
The conditions are that the current is 0 Pa or more and 250 Pa or less, more preferably 100 Pa or more and 200 Pa or less, and that high-frequency power of 0.17 W/ ^cm² or more and 0.5 W/ ^cm² or less, more preferably 0.25 W/ ^cm² or more and 0.35 W/ ^cm² or less is supplied to the electrodes installed in the processing chamber.

The raw material gas for the insulating film 130 can be a raw material gas applicable to the formation of the insulating film 128.

As a condition for forming the insulating film 130, supplying high-frequency power at the above power density in the pressure processing chamber increases the decomposition efficiency of the raw material gas in the plasma, increases oxygen radicals, and promotes oxidation of the raw material gas, resulting in an oxygen content in the insulating film 130 that exceeds the stoichiometric composition. However, at the above substrate temperature, the bonding force between silicon and oxygen is weak, so some of the oxygen is desorbed by heating. As a result, an oxide insulating film can be formed that contains more oxygen than satisfies the stoichiometric composition, and some of the oxygen is desorbed by heating. Furthermore, the insulating film 128 is provided on the oxide semiconductor film 111. Therefore, in the process of forming the insulating film 130, the insulating film 128 acts as a protective film for the oxide semiconductor film 111. As a result, even when forming the insulating film 130 using high-frequency power with a high power density, damage to the oxide semiconductor film 111 can be suppressed.

Furthermore, since increasing the thickness of the insulating film 130 can increase the amount of oxygen that is desorbed by heating, it is preferable to make the insulating film 130 thicker than the insulating film 128. Providing the insulating film 128 allows for good coverage even when the insulating film 130 is made thick.

When the insulating film 132 is made of a nitride insulating film with a low hydrogen content, the insulating film 133 can be formed using the following formation conditions. Here, we describe the case where a silicon nitride film is formed as the nitride insulating film. The formation conditions involve placing the substrate in the vacuum-evacuated processing chamber of a plasma CVD apparatus at a temperature of 80°C to 400°C, more preferably 200°C to 37°C.
The conditions are to maintain the temperature below 0°C, introduce the raw material gas into the processing chamber to maintain a pressure of 100 Pa to 250 Pa, preferably 100 Pa to 200 Pa, and supply high-frequency power to electrodes installed in the processing chamber.

It is preferable to use a silicon-containing depositing gas, nitrogen, and ammonia as the raw material gas for the insulating film 133. Typical examples of silicon-containing depositing gases include silane, disilane, trisilane, and silane fluoride. Furthermore, it is preferable that the flow rate of nitrogen be 5 to 50 times, preferably 10 to 50 times, the flow rate of ammonia. By using ammonia as the raw material gas, the decomposition of the silicon-containing depositing gas and nitrogen can be promoted. This is because ammonia dissociates due to plasma energy and thermal energy, and the energy generated by dissociation contributes to the decomposition of the bonds of silicon-containing depositing gas molecules and nitrogen molecules. In this way, a silicon nitride film with a low hydrogen content and the ability to suppress the intrusion of impurities such as hydrogen and water from the outside can be formed.

Furthermore, if a silicon oxide film formed by a CVD method using organic silane gas is to be placed between the insulating film 131 and the insulating film 132, the silicon oxide film is formed on the insulating film 130 by a CVD method using the organic silane gas listed above.

At least the insulating film 130 is formed, and then heat treatment is performed to form the insulating film 128 or insulating film 13
At least the oxygen contained in 0 is transferred to the oxide semiconductor film 111,
It is preferable to reduce the oxygen deficiency. This heat treatment can be carried out as appropriate by referring to the details of the heat treatment for dehydrogenating or dehydrating the oxide semiconductor film 111 and the oxide semiconductor film 119.

Furthermore, one preferred procedure for forming the transistor 103 is to form an oxide insulating film as the insulating film 130, which contains more oxygen than satisfactorily satisfying the oxygen composition and in which some of the oxygen is desorbed by heating; after forming the insulating film 130, perform a heat treatment at 350°C, and form a silicon oxide film by a CVD method using the organic silane gas listed above and maintaining the substrate temperature at 350°C, thereby forming a nitride insulating film with a low hydrogen content as the insulating film 132, with the substrate temperature at 350°C.

Next, a mask is formed in the region where the insulating film 128, insulating film 130, and insulating film 133 overlap with the conductive film 113 by a fifth photolithography step, and then insulating film 128, insulating film 13
The film 0 and insulating film 133 are etched to form an opening 117 that reaches the conductive film 113, and insulating films 129, 131, and 132 are formed (see Figure 7(B)). Next, a pixel electrode 121 is formed on the opening 117 and insulating film 132 (see Figure 5).

The opening 117 can be formed in the same manner as the opening 123. The pixel electrode 121 can be formed by using the materials listed above to form a conductive film that contacts the conductive film 113 through the opening 117, forming a mask on the conductive film by a sixth photolithography step, and processing using the mask. The mask and processing can be carried out in the same manner as the scan lines 107 and capacitance lines 115.

Next, an alignment film 158 is formed on the insulating film 132 and on the pixel electrode 121. Also, the substrate 1
A light-shielding film 152 is formed on 50. A counter electrode 154 is formed so as to cover the light-shielding film 152, and an alignment film 156 is formed on the counter electrode 154. Liquid crystal 160 is placed on the alignment film 158, and the substrate 150 is placed on the substrate 102 so as to be in contact with the liquid crystal 160, and the substrate 102 and the substrate 150 are fixed together with a sealing material (not shown).

The orientation films 156 and 158 can be formed using the above-mentioned materials by appropriately utilizing various film formation methods such as spin coating and printing.

The light-shielding film 152 can be formed by depositing it using the materials listed above by sputtering and then processing it using a mask.

The counter electrode 154 can be formed using a material applicable to the pixel electrode 121, utilizing various film deposition methods such as CVD and sputtering.

The liquid crystal 160 can be directly deposited on the alignment film 158 using a dispenser method (dropping method). Alternatively, the liquid crystal 160 can be deposited after bonding the substrate 102 and the substrate 150 using capillary action or the like.
Zero may be injected. Also, to facilitate alignment of the liquid crystal 160, an alignment film 156
Furthermore, it is preferable to perform a rubbing process on the orientation film 158.

By following the above steps, a semiconductor device according to one aspect of the present invention can be manufactured (see Figure 5).

<Variation 1>
In a semiconductor device according to one aspect of the present invention, the connection between the oxide semiconductor film, which functions as one of the electrodes constituting the retaining capacitance, and the capacitance line can be appropriately modified. For example, in order to further increase the aperture ratio, a structure can be adopted in which the semiconductor film is in direct contact with the capacitance line without an intervening conductive film. A specific example of this structure will be explained with reference to Figures 8 and 9.

In the following diagrams showing modified examples, the substrate 150, light-shielding film 152, counter electrode 154, alignment film 156, alignment film 158, and liquid crystal 160 are omitted for clarity. Furthermore, the reference numerals used in Figure 4 or Figure 5 are used as appropriate in the diagrams showing modified examples. In the following modifications, only the differences from the structures shown in Figures 4 and 5 will be explained.

A specific example of this structure will be explained using Figures 8 and 9. Figure 8 is a top view of pixel 101, and Figure 9(A) is a cross-sectional view between the dashed lines A1-A2 and B1-B2 in Figure 8.

In the pixel 101 shown in Figures 8 and 9, the oxide semiconductor film 119, which functions as one electrode of the retaining capacitance 145, is in direct contact with the capacitance line 115 at the aperture 143. As with the retaining capacitance 105 shown in Figures 4 and 5, the oxide semiconductor film 119 and the capacitance line 115 are in direct contact without the conductive film 125 interposed, and since the conductive film 125 that acts as a light-shielding film is not formed, the aperture ratio of the pixel can be further increased. This is because, in Figure 6(A), the oxide semiconductor film 1
Before forming 11 and 119, an opening that exposes the capacitance line 115 may be formed, and then the oxide semiconductor films 111 and 119 may be formed.

Furthermore, in Figure 9, the opening 143 is provided only on the capacitance line 115, but as shown in Figure 10, the gate insulating film 127 is provided so that a portion of the capacitance line 115 and the substrate 102 are exposed.
A gate insulating film 127 may be formed on the capacitance line 115 and the substrate 102 to increase the area in contact between the oxide semiconductor film 119 and the capacitance line 115. This is done in Figure 6(A) before forming the oxide semiconductor films 111 and 119, after forming the gate insulating film 127 so that a portion of the capacitance line 115 and the substrate 102 are exposed, and then the oxide semiconductor film 111,
The 119 can be formed. As a result, the aperture ratio can be increased, and the conductivity of the oxide semiconductor film 119 is increased, making it easy to make the oxide semiconductor film 119 conductive, so that the holding capacity 146 can be easily made to function.

<Example 2>
In a semiconductor device according to one aspect of the present invention, the connection between the oxide semiconductor film, which functions as one electrode constituting the retaining capacitance, and the capacitance line can be appropriately modified. For example, in order to reduce the contact resistance between the semiconductor film and the conductive film, the conductive film can be provided in contact with the outer circumference of the semiconductor film. A specific example of this structure will be described with reference to Figures 11 and 12. Figure 11 shows a top view of a pixel 101 of this structure, Figure 12(A) is a cross-sectional view between the dashed lines A1-A2 and B1-B2 in Figure 11, and Figure 12(B) is a cross-sectional view between the dashed lines C1-C2 in Figure 11.

In the pixel 101 shown in Figures 11 and 12, the conductive film 167 is an oxide semiconductor film 11
The conductive film 167 is in contact with the outer circumference of 9 and is provided in contact with the capacitance line 115 through the opening 123. The conductive film 167 is also provided so as to cover the end of the oxide semiconductor film 119. The conductive film 167 can be formed using the formation process of the signal line 109, conductive film 113, and conductive film 125. Therefore, since the conductive film 167 may have light-shielding properties, it is preferable to form it in a loop shape. Furthermore, the larger the contact area between the conductive film 167 and the oxide semiconductor film 119, the greater the conductivity of the oxide semiconductor film 119, and the easier it is to make the oxide semiconductor film 119 conductive, so it can easily function as one electrode of the retaining capacitance 165.

Furthermore, in the pixel 101 shown in Figures 11 and 12, the oxide semiconductor film 119 and capacitance lines 115 can be appropriately modified so that they are in contact with the conductive film 167.

Furthermore, the conductive film 167 may be provided in contact with the oxide semiconductor film 119 with the loop-shaped portion separated.

<Variation 3>
In a semiconductor device according to one aspect of the present invention, the connection between the oxide semiconductor film, which functions as one of the electrodes constituting the retaining capacitance, and the capacitance line can be appropriately changed. For example, as shown in the pixel 101 in Figures 13 and 14, the capacitance line 1 can be formed using the process of forming the signal line 109.
75 can be formed.

Figure 13 shows a top view of the pixel 101 of this structure, and Figure 14 shows the dashed line A1- in Figure 13.
This is a cross-sectional view between A2, between the dashed lines B1 and B2, and between the dashed lines D1 and D2.

The capacity line 175 is provided extending in a direction parallel to the signal line 109.
09 and capacitance line 175 are electrically connected to the signal line drive circuit 106 (see Figure 1(A)).

In the pixel 101 shown in Figures 13 and 14, the region where the oxide semiconductor film 119 and the pixel electrode 121 overlap via insulating films 129, 131, and 132 provided on the oxide semiconductor film 119 becomes the retention capacitance 174.

When capacitance lines are provided in a direction parallel to the signal line 109, such as capacitance line 175, it is preferable to have a pixel shape such that the side parallel to the scan line 107 is longer than the side parallel to the signal line 109, as shown in pixel 101 in Figure 13. This is because, compared to a pixel shape where the side parallel to the signal line 109 is longer than the side parallel to the scan line 107, it is possible to reduce the overlapping area of the pixel electrode 121 and capacitance line 175, thereby improving the aperture ratio.

<Variation 4>
In a semiconductor device according to one aspect of the present invention, one of the electrodes constituting the retaining capacitance and the capacitance line can be made of a semiconductor film (specifically, an oxide semiconductor film). A specific example is shown in Figure 1.
This will be explained using Figure 5. Here, only the oxide semiconductor film 198 will be described, which is different from the oxide semiconductor film 119 and capacitance line 115 described in Figures 4 and 5. Figure 15 is a top view of the pixel 101 of this modified example, and in the pixel 101 shown in Figure 15, an oxide semiconductor film 198 is provided that serves as both one electrode of the retaining capacitance 197 and a capacitance line. The oxide semiconductor film 198 has a region that extends in a direction parallel to the signal line 109, and this region functions as a capacitance line. In the oxide semiconductor film 198, the region that overlaps with the pixel electrode 121 functions as one electrode of the retaining capacitance 197. The oxide semiconductor film 198 can be formed using the process of forming the oxide semiconductor film 111 included in the transistor 103 provided in the pixel 101 shown in Figure 15.

The oxide semiconductor film 198 can be provided as a single oxide semiconductor film so as to overlap with the scan line 107 in each pixel 101. In other words, the oxide semiconductor film 198 is 1
It is possible to provide a continuous oxide semiconductor film without separation at all pixels 101 in a row.

Furthermore, if the oxide semiconductor film 198 is provided as a continuous oxide semiconductor film without separation across all pixels 101 in one row, the oxide semiconductor film 198 will overlap with the scan lines 107,
Due to the influence of potential changes in the scan line 107, one of the electrodes of the capacitance line and the retaining capacitance 197 may not function. Therefore, as shown in Figure 15, oxide semiconductor films 198 are provided spaced apart in each pixel 101. Furthermore, the spaced-apart oxide semiconductor films 198 are connected to the signal line 1
It is preferable to electrically connect using a conductive film 199 that can be formed using the process of forming 09 and the conductive film 113.

In Figure 15, the region of the oxide semiconductor film 198 that functions as a capacitance line extends in a direction parallel to the signal line 109. However, the region that functions as a capacitance line may also be structured to extend in a direction parallel to the scan line 107. In the case where the region of the oxide semiconductor film 198 that functions as a capacitance line extends in a direction parallel to the scan line 107, the transistor 103 and the retaining capacitor 19
In step 7, it is necessary to electrically separate the oxide semiconductor film 111 and the oxide semiconductor film 198 from the signal line 109 and the conductive film 113 by providing an insulating film.

As shown above, by providing an oxide semiconductor film as one of the electrodes and capacitance lines of the retention capacitance provided in the pixel, as in the pixel 101 shown in Figure 15, the aperture ratio of the pixel can be improved.

<Example 5>
Furthermore, in the pixel 101 described as a modified example above, the pixel electrode 121 and the conductive film 113
In order to reduce the parasitic capacitance that occurs between the two, or between the pixel electrode 121 and the conductive film 167, an organic insulating film can be provided in the region where such parasitic capacitance occurs. In other words, the organic insulating film can be provided partially in the pixel 101.

The organic insulating film can be either photosensitive or non-photosensitive organic resins, such as acrylic resins, benzocyclobutene-based resins, epoxy resins, or siloxane-based resins. Alternatively, polyamide can be used as the organic insulating film.

In order to partially provide the organic insulating film, it may be necessary to process the insulating film after forming it using the materials listed above. The method for forming the organic insulating film is not particularly limited and can be appropriately selected depending on the materials used. For example, spin coating, dip coating, spray coating, droplet ejection (inkjet method), screen printing, offset printing, etc., can be applied. Furthermore, by using a photosensitive organic resin as the organic insulating film, a resist mask is not required when forming the organic insulating film, and the process can be simplified.

<Variation 6>
Furthermore, in a semiconductor device according to one aspect of the present invention, the configuration of the capacitance lines can be appropriately changed. This structure will be explained with reference to Figure 16. Note that, in this case, the position of the capacitance line between two adjacent pixels differs from that of the capacitance line 115 described in Figure 4.

Figure 16 is a top view of pixels 401_1 and 401_2, which are adjacent in the extension direction of signal line 409.

Scan lines 407_1 and 407_2 are parallel to each other and extend in a direction substantially perpendicular to the signal line 109. Capacitance line 415 is provided between scan lines 407_1 and 407_2, parallel to each other. Capacitance line 415 is connected to the retaining capacitance 405_1 provided in pixel 401_1 and the retaining capacitance 405_2 provided in pixel 401_2.
The top shape of _2 and the arrangement of its components are symmetrical with respect to the capacitance line 415.

Each pixel 401_1 is provided with a transistor 403_1, a pixel electrode 421_1 connected to the transistor 403_1, and a retaining capacitor 405_1.

Transistor 403_1 is located in the region where the scan line 407_1 and the signal line 409 intersect. Transistor 403_1 includes at least an oxide semiconductor film 411_1 having a channel-forming region, a gate electrode, a gate insulating film (not shown in Figure 16), a source electrode, and a drain electrode. Note that in the scan line 407_1, the oxide semiconductor film 4
The region overlapping with 11_1 functions as the gate electrode of transistor 403_1. In signal line 409, the region overlapping with oxide semiconductor film 411_1 functions as the source electrode of transistor 403_1. In conductive film 413_1, the region overlapping with oxide semiconductor film 411_1 functions as the drain electrode of transistor 403_1. Conductive film 413_1
The pixel electrode 421_1 is connected at the aperture 417_1.

The retaining capacitor 405_1 is electrically connected to the capacitance line 415 through a conductive film 425 provided in the opening 423. The retaining capacitor 405_1 is composed of an oxide semiconductor film 419_1 formed of a light-transmitting oxide semiconductor, a light-transmitting pixel electrode 421_1, and a light-transmitting insulating film (not shown in Figure 16) included in the transistor 403_1 as a dielectric film. In other words, the retaining capacitor 405_1 is light-transmitting.

Pixel 401_2 is provided with a transistor 403_2 and a retaining capacitor 405_2 connected to the transistor 403_2.

Transistor 403_2 is located in the region where the scan line 407_2 and the signal line 409 intersect. Transistor 403_2 includes at least an oxide semiconductor film 411_2 having a channel-forming region, a gate electrode, a gate insulating film (not shown in Figure 16), a source electrode, and a drain electrode. In scan line 407_2, the region overlapping with the oxide semiconductor film 411_2 functions as the gate electrode of transistor 403_2. In signal line 409, the region overlapping with the oxide semiconductor film 411_2 functions as the gate electrode of transistor 403_2
It functions as the source electrode. In the conductive film 413_2, the region superimposed with the oxide semiconductor film 411_2 functions as the drain electrode of the transistor 403_2. Conductive film 413_
2 and the pixel electrode 421_2 are connected at the aperture 417_2.

The retaining capacitor 405_2, like the retaining capacitor 405_1, is electrically connected to the capacitance line 415 through a conductive film 425 provided in the opening 423. The retaining capacitor 405_2 is composed of an oxide semiconductor film 419_2 made of an oxide semiconductor, a pixel electrode 421_2, and an insulating film (not shown in Figure 16) included in the transistor 403_2 as a dielectric film. Since the oxide semiconductor film 419_2, the pixel electrode 421_2, and the dielectric film are all translucent, the retaining capacitor 405_2 is translucent.

Note that transistors 403_1 and 403_2, and the retaining capacitance 405_
The cross-sectional structures of transistor 1 and retaining capacitor 405_2 are the same as those of transistor 103 and retaining capacitor 105 shown in Figure 5, and are therefore omitted here. Furthermore, transistors 403_1 and 403_2, and retaining capacitors 405_1 and 405_2 can be appropriately referenced using the same reference numerals used to describe transistor 103 and retaining capacitor 105.

In the top surface shape, a capacitance line is provided between two adjacent pixels, and by connecting the retained capacitance contained in each pixel with this capacitance line, it is possible to reduce the number of capacitance lines. As a result, it is possible to further increase the aperture ratio of the pixels compared to a structure in which a capacitance line is provided for each pixel.

<Variation 7>
In a semiconductor device according to one aspect of the present invention, the shape of the transistor provided in the pixel is not limited to the shape of the transistor shown in the above modified example, but can be changed as appropriate. For example, in the transistor, the source electrode included in the signal line 109 may be U-shaped (C-shaped, U-shaped, or horseshoe-shaped), and the transistor may have a shape that surrounds the conductive film including the drain electrode. By adopting such a shape, it is possible to secure a sufficient channel width even if the area of the transistor is small, and it is possible to increase the amount of drain current (also called on-current) that flows when the transistor conducts.

<Variation 8>
In the modified example described above, in pixels 101, 401_1 and 401_2,
In this example, a transistor was used in which the oxide semiconductor film 111 is located between the gate insulating film 127 and the conductive film 113, which includes a signal line 109 that functions as a source electrode and a region that functions as a drain electrode. Alternatively, a transistor can be used in which the oxide semiconductor film 111 is located between the conductive film 113, which includes a signal line 109 that functions as a source electrode and a region that functions as a drain electrode, and the insulating film 129.

<Modification 9>
In the modified example described above, in pixels 101, 401_1 and 401_2,
Although a channel-etched transistor is shown as transistor 103, a channel-protected transistor can be used instead. By providing a channel protection film, the surface of the oxide semiconductor film 111 is not exposed to the etchant and etching gas used in the formation process of the signal line 109 and the conductive film 113, and impurities between the oxide semiconductor film 111 and the channel protection film can be reduced. As a result, it is possible to reduce the leakage current flowing between the source electrode and drain electrode of transistor 103.

<Variation 10>
In the modified example described above, in pixels 101, 401_1 and 401_2,
Although transistor 103 is shown as a transistor having one gate electrode, instead, a transistor having two opposing gate electrodes separated by an oxide semiconductor film 111 is shown (
A dual-gate transistor can be used.

The dual-gate transistor has a conductive film (also called a back gate electrode) on the insulating film 129 of the transistor 103 described in this embodiment. This conductive film overlaps with at least the channel formation region of the oxide semiconductor film 111. For example, the conductive film includes a signal line 10 that functions as the source electrode of the transistor in the width of the channel length.
The shape can be shorter than the width between 9 and the conductive film 113 which functions as a drain electrode. By providing the conductive film in a position that overlaps with the channel formation region of the oxide semiconductor film 111, it is preferable that the potential of the conductive film be set to the lowest potential of the video signal input to the signal line 109. As a result, it is possible to control the current flowing between the source electrode and the drain electrode on the surface of the oxide semiconductor film 111 facing the conductive film, thereby reducing variations in the electrical characteristics of the transistor. Furthermore, by providing the conductive film, the influence of changes in the surrounding electric field on the oxide semiconductor film 111 can be reduced, improving the reliability of the transistor 103.

The conductive film can be formed using the same materials and methods as the scanning lines 107, signal lines 109, and pixel electrodes 121. Furthermore, the conductive film can be formed using the process for forming the pixel electrodes 121. Therefore, by using a semiconductor film formed using the same formation process as the oxide semiconductor included in the transistor as one electrode of the retaining capacitance, it is possible to manufacture a semiconductor device with a retaining capacitance that increases both the aperture ratio and the charge capacitance.
Furthermore, by increasing the aperture ratio, it is possible to obtain a semiconductor device with excellent display quality.

Furthermore, by using an oxide semiconductor transistor for the transistor within the pixel, and by using an oxide semiconductor film in which oxygen vacancies are reduced and impurities such as hydrogen and nitrogen are reduced for the oxide semiconductor film contained in the transistor, a semiconductor device with good electrical properties can be obtained.

Furthermore, the configurations shown in this embodiment can be used in appropriate combination with the configurations shown in other embodiments.

(Embodiment 2)
In this embodiment, we will describe one aspect of the transistor and retention capacitance included in the semiconductor device described in the above embodiment that is applicable to an oxide semiconductor film, which is a semiconductor film.

The above oxide semiconductor film includes amorphous oxide semiconductors, single-crystal oxide semiconductors, and polycrystalline oxide semiconductors, as well as oxide semiconductors having crystalline portions (C Axis Aligned Cry...
It is preferable that it is composed of a static oxide semiconductor (CAAC-OS).

CAAC-OS film is an oxide semiconductor film having multiple crystalline regions, and most of the crystalline regions are small enough to fit within a cube with sides of less than 100 nm. Therefore, CAAC-
The crystalline portions contained in the OS film may be small enough to fit within a cube with sides of less than 10 nm, less than 5 nm, or less than 3 nm. CAAC-OS films are characterized by a lower defect level density than microcrystalline oxide semiconductor films. A detailed explanation of CAAC-OS films follows below.

CAAC-OS film is examined using a transmission electron microscope (TEM).
When observed with a tron microscope, clear boundaries between crystalline regions, i.e., grain boundaries (also called crystal grain boundaries), cannot be confirmed. Therefore, C
AAC-OS films are less susceptible to the decrease in electron mobility caused by grain boundaries.

When a CAAC-OS film is observed by TEM from a direction roughly parallel to the sample surface (cross-sectional TEM observation), it can be confirmed that metal atoms are arranged in layers in the crystalline region. Each layer of metal atoms has a shape that reflects the irregularities of the surface (also called the formed surface) or the upper surface of the CAAC-OS film, and is arranged parallel to the formed surface or upper surface of the CAAC-OS film.

On the other hand, the CAAC-OS film was observed by TEM from a direction roughly perpendicular to the sample surface (planar T).
EM observation reveals that metal atoms in the crystalline regions are arranged in triangular or hexagonal shapes. However, no regularity is observed in the arrangement of metal atoms between different crystalline regions.

Cross-sectional TEM observation and planar TEM observation reveal that the crystalline portion of the CAAC-OS film exhibits orientation.

X-ray diffraction (XRD) of CAAC-OS film
When structural analysis is performed using the device, for example, CAAC-OS having _InGaNO4 crystals
Analysis of the film using the out-of-plane method sometimes reveals a peak at a diffraction angle (2θ) near 31°. Since this peak is attributed to the (009) plane of the _InGaZnO4 crystal, it can be confirmed that the CAAC-OS film crystal has c-axis orientation, and that the c-axis is oriented in a direction approximately perpendicular to the surface on which it is formed or the upper surface.

On the other hand, in the CAAC-OS film, X-rays are incident from a direction approximately perpendicular to the c-axis in the in-p method.
In analysis using the lane method, a peak may appear when 2θ is around 56°. This peak is attributed to the (110) plane of the _InGaNO₄ crystal. For a single-crystal oxide semiconductor film of _InGaNO₄ , 2θ is fixed around 56°, and the normal vector of the sample plane is the axis (φ axis).
When the sample is rotated while being analyzed (φ scan), six peaks are observed that belong to a crystal plane equivalent to the (110) plane. In contrast, in the case of the CAAC-OS film, no clear peaks appear even when φ scan is performed with 2θ fixed near 56°.

From the above, it can be seen that in the CAAC-OS film, the orientation of the a-axis and b-axis is irregular between different crystalline regions, but the c-axis is oriented, and the c-axis is oriented in a direction parallel to the normal vector of the formed surface or the upper surface. Therefore, each layer of metal atoms arranged in layers as confirmed by the aforementioned cross-sectional TEM observation is a plane parallel to the ab-plane of the crystal.

The crystalline portion is formed when the CAAC-OS film is deposited or when crystallization treatment such as heat treatment is performed. As described above, the c-axis of the crystal is oriented parallel to the normal vector of the surface or top surface of the CAAC-OS film. Therefore, for example, if the shape of the CAAC-OS film is changed by etching or other means, the c-axis of the crystal may not be parallel to the normal vector of the surface or top surface of the CAAC-OS film.

Furthermore, the degree of crystallinity in the CAAC-OS film does not need to be uniform. For example, CAAC-OS
When the crystalline portion of the film is formed by crystal growth from near the top surface of the CAAC-OS film, the region near the top surface may have a higher degree of crystallinity than the region near the surface where the crystals are formed.
When impurities are added to an AC-OS film, the degree of crystallinity in the areas where the impurities are added changes, and regions with different degrees of crystallinity may be formed.

Furthermore, the out-of-plane of the CAAC-OS film having _InGaNO4 crystals
Analysis by this method may reveal a peak near 36° of 2θ, in addition to the peak near 31° of 2θ. The peak near 36° of 2θ indicates that a portion of the CAAC-OS film contains crystals that do not have c-axis orientation. It is preferable that the CAAC-OS film shows a peak near 31° of 2θ and does not show a peak near 36° of 2θ.

There are three possible methods for forming CAAC-OS.

The first method involves forming an oxide semiconductor film at a film formation temperature of 100°C to 450°C, thereby forming crystalline portions in which the c-axis of the crystalline portions contained in the oxide semiconductor film is aligned in a direction parallel to the normal vector of the surface to be formed or the normal vector of the surface.

The second method involves forming an oxide semiconductor film with a thin thickness, and then performing a heat treatment at a temperature of 200°C to 700°C to form crystal portions in the oxide semiconductor film in which the c-axis of the crystal portions is aligned in a direction parallel to the normal vector of the surface to be formed or the normal vector of the surface.

The third method involves forming a thin first layer of oxide semiconductor film, followed by heating at 200°C or above 700°C.
This method involves performing a heat treatment below °C and then depositing a second oxide semiconductor film, thereby forming crystalline portions in the oxide semiconductor film where the c-axis of the crystalline portions is aligned in a direction parallel to the normal vector of the surface being formed or the normal vector of the surface.

Transistors with CAAC-OS applied to oxide semiconductor films exhibit minimal fluctuations in electrical properties due to irradiation with visible or ultraviolet light. Therefore, transistors with CAAC-OS applied to oxide semiconductor films have excellent reliability.

Furthermore, CAAC-OS is preferably deposited by sputtering using a polycrystalline oxide semiconductor sputtering target. When ions collide with the sputtering target, the crystalline region contained in the sputtering target may cleave from the a-b plane and peel off as flat or pellet-shaped sputtering particles having a plane parallel to the a-b plane. In this case, the flat or pellet-shaped sputtering particles,
CAAC-OS can be deposited by reaching the film deposition surface while maintaining its crystalline state.

Furthermore, it is preferable to apply the following conditions for forming the CAAC-OS film.

Reducing the inclusion of impurities during film formation can suppress the disruption of the crystalline state caused by impurities. For example, the concentration of impurities present in the deposition chamber (hydrogen, water, carbon dioxide, nitrogen, etc.)
The problem can be solved by reducing the amount of impurities in the film-forming gas. Specifically, a film-forming gas with a dew point of -80°C or lower, preferably -100°C or lower, is used.

Furthermore, increasing the heating temperature of the film deposition surface (e.g., substrate heating temperature) during film deposition causes migration of sputtering particles after they reach the deposition surface. Specifically, the film deposition is performed at a temperature of 100°C to 740°C, preferably 150°C to 500°C.
By increasing the temperature of the film deposition surface during film formation, when flat or pellet-shaped sputtering particles reach the surface, migration occurs on the surface, causing the flat side of the sputtering particles to adhere to the surface.

Furthermore, it is preferable to reduce plasma damage during film deposition by increasing the oxygen content in the deposition gas and optimizing the power. The oxygen content in the deposition gas should be 30% by volume or more, preferably 100%.
This is expressed as a percentage by volume.

As an example of a target for sputtering, an In-Ga-Zn-O compound target is shown below.

InO _X powder, GaO _Y powder, and ZnO _Z powder are mixed in predetermined mole amounts, subjected to pressurization, and then heat-treated at a temperature of 1000°C to 1500°C to produce polycrystalline In-Ga
- A Zn-based metal oxide target is used. The pressurized treatment may be performed while cooling (or allowing to cool) or while heating. X, Y, and Z are arbitrary positive numbers. Here, the predetermined mole ratios are, for example, 2:2:1, 8:4:3, 3:1:1, ₁ :1:1, 4:2:3, or 3:1:2 for InO _X powder, GaO _Y powder, and ZnO Z powder. The type of powder and the mole ratio in which they are mixed may be appropriately changed depending on the sputtering target being manufactured.

Furthermore, the oxide semiconductor film may have a structure in which multiple oxide semiconductor films are stacked. For example,
The oxide semiconductor film may be constructed as a stack of a first oxide semiconductor film and a second oxide semiconductor film, with metal oxides having different atomic ratios in the first and second oxide semiconductor films. For example, the first oxide semiconductor film may be made from one of the following: an oxide containing two types of metals, an oxide containing three types of metals, or an oxide containing four types of metals, while the second oxide semiconductor film may be made from an oxide containing two different types of metals, an oxide containing three types of metals, or an oxide containing four types of metals different from those in the first oxide semiconductor film.

The oxide semiconductor film may have a two-layer structure, with the constituent elements of the first and second oxide semiconductor films being the same, but with different atomic ratios. For example, the atomic ratio of the first oxide semiconductor film may be In:Ga:Zn = 3:1:2, and the atomic ratio of the second oxide semiconductor film may be In
The ratio of atoms in the first oxide semiconductor film may be set to Ga:Zn = 1:1:1. Alternatively, the atomic ratio of the first oxide semiconductor film may be set to In
Let :Ga:Zn = 2:1:3, and set the atomic ratio of the second oxide semiconductor film to In:Ga:Zn =
A ratio of 1:3:2 is also acceptable. Note that the atomic ratio of each oxide semiconductor film includes a tolerance of plus or minus 20% from the above atomic ratio.

At this time, of the first oxide semiconductor film and the second oxide semiconductor film, the side closer to the terminal city (
It is preferable to set the atomic ratio of In to Ga in the oxide semiconductor film on the channel side to In ≥ Ga. Also, it is preferable to set the atomic ratio of In to Ga in the oxide semiconductor film on the side farther from the gate electrode (back channel side) to In < Ga. These stacked structures allow for the fabrication of transistors with high field-effect mobility. On the other hand, the atomic ratio of In to Ga in the oxide semiconductor film on the side closer to the gate electrode (channel side) should be set to In < Ga, and the atomic ratio of In to Ga in the oxide semiconductor film on the back channel side should be set to In < Ga.
By setting the atomic ratio of a to In ≥ Ga, it is possible to reduce the amount of fluctuation in the threshold voltage due to the aging of the transistor and reliability tests.

A first oxide semiconductor film with an atomic ratio of In:Ga:Zn = 1:3:2 can be formed by a sputtering method using an oxide target with an atomic ratio of In:Ga:Zn = 1:3:2. The substrate temperature is room temperature, and argon or a mixture of argon and oxygen is used as the sputtering gas. The atomic ratio is In:Ga:Zn = 3:1:2
The second oxide semiconductor film can be formed in the same manner as the first oxide semiconductor film, using an oxide target with an atomic ratio of In:Ga:Zn = 3:1:2.

Furthermore, the oxide semiconductor film may be configured as a three-layer structure, with the constituent elements of the first to third oxide semiconductor films being the same, but with different atomic ratios. A configuration of a three-layer oxide semiconductor film will be explained using Figure 17.

The transistor 297 shown in Figure 17 has a first oxide semiconductor film 299a, a second oxide semiconductor film 299b, and a third oxide semiconductor film 299c stacked in order from the gate insulating film 127 side. The materials constituting the first oxide semiconductor film 299a and the third oxide semiconductor film 299c are InM1 _x Zn _y O _z (x≧1, y＞1, z＞0, M1＝Ga, Hf, etc.)
Materials that can be expressed as are used. However, when Ga is included in the materials constituting the first oxide semiconductor film 299a and the third oxide semiconductor film 299c, if the proportion of included Ga is large, specifically if X exceeds 10 in materials that can be expressed as InM1 _X Zn _Y O _Z , there is a risk of powder generation during film formation, making it unsuitable. In addition, in transistor 297, the configuration other than the first oxide semiconductor film 299a, the second oxide semiconductor film 299b, and the third oxide semiconductor film 299c is the same as that of the transistor described in the above embodiment (for example, transistor 103 described in Embodiment 1).

Furthermore, the material constituting the second oxide semiconductor film 299b is InM2 _x Zn _y O _z (x ≥
1. Use materials that can be expressed as y≧x, z＞0, M2=Ga, Sn, etc.

The materials for the first, second, and third oxide semiconductor films are appropriately selected to form a well-type structure such that the conduction band of the second oxide semiconductor film 299b is the deepest from the vacuum level compared to the conduction band of the first oxide semiconductor film 299a and the third oxide semiconductor film 299c.

As described in Embodiment 1, silicon and carbon, which are Group 14 elements in oxide semiconductor films, generate electrons, which are carriers, and increase the carrier density. Therefore, when silicon or carbon is included in an oxide semiconductor film, the oxide semiconductor film becomes n-type. For this reason, the silicon concentration and carbon concentration in each oxide semiconductor film are 3 × ^10¹⁸ /C
^m³ or less, preferably 3 × ^10¹⁷ / ^cm³ or less. In particular, the second oxide semiconductor film 2
To prevent a large amount of Group 14 elements from being mixed into 99b, the first oxide semiconductor film 299a and the third
It is preferable that the first oxide semiconductor film 299a and the third oxide semiconductor film 299c sandwich or surround the second oxide semiconductor film 299b, which serves as a carrier path. That is, the first oxide semiconductor film 299a and the third oxide semiconductor film 299c can also be called barrier films that prevent Group 14 elements such as silicon and carbon from being mixed into the second oxide semiconductor film 299b.

For example, the atomic ratio of the first oxide semiconductor film 299a may be In:Ga:Zn = 1:3:2, the atomic ratio of the second oxide semiconductor film 299b may be In:Ga:Zn = 3:1:2, and the atomic ratio of the third oxide semiconductor film 299c may be In:Ga:Zn = 1:1:1.
The third oxide semiconductor film 299c can be formed by a sputtering method using an oxide target with an atomic ratio of In:Ga:Zn = 1:1:1.

Alternatively, the first oxide semiconductor film 299a has an atomic ratio of In:Ga:Zn = 1:3:2
The oxide semiconductor film is such that the second oxide semiconductor film 299b has an atomic ratio of In:Ga:
The oxide semiconductor film may have an atomic ratio of Zn = 1:1:1 or In:Ga:Zn = 1:3:2, and the third oxide semiconductor film 299c may be an oxide semiconductor film with an atomic ratio of In:Ga:Zn = 1:3:2, resulting in a three-layer structure.

Since the constituent elements of the first oxide semiconductor film 299a to the third oxide semiconductor film 299c are the same, the second oxide semiconductor film 299b has fewer defect levels (trap levels) at the interface with the first oxide semiconductor film 299a. More specifically, these defect levels (trap levels) are fewer than the defect levels at the interface between the gate insulating film 127 and the first oxide semiconductor film 299a. Therefore, by stacking the oxide semiconductor films as described above, it is possible to reduce the amount of variation in the threshold voltage due to the aging of the transistor and reliability tests.

Furthermore, by appropriately selecting the materials of the first, second, and third oxide semiconductor films to form a well-type structure in which the conduction band of the second oxide semiconductor film 299b is the deepest from the vacuum level compared to the conduction band of the first oxide semiconductor film 299a and the third oxide semiconductor film 299c, it is possible to increase the field-effect mobility of the transistor and reduce the amount of fluctuation in the threshold voltage due to the transistor's aging and reliability tests.

Furthermore, oxide semiconductors with different crystallinity may be applied to the first oxide semiconductor film 299a to the third oxide semiconductor film 299c. That is, a configuration may be used in which single-crystal oxide semiconductors, polycrystalline oxide semiconductors, amorphous oxide semiconductors, and CAAC-OS are appropriately combined.
Furthermore, by applying an amorphous oxide semiconductor to any one of the first oxide semiconductor film 299a to the third oxide semiconductor film 299c, internal and external stresses in the oxide semiconductor film are relieved, fluctuations in the electrical characteristics of the transistor are reduced, and fluctuations in the threshold voltage due to the transistor's aging and reliability tests can be reduced.

Furthermore, the second oxide semiconductor film 299b, which can at least become a channel formation region, is CAA
It is preferable that the back channel oxide semiconductor film is C-OS. Furthermore, it is preferable that the back channel oxide semiconductor film, in this embodiment, the third oxide semiconductor film 299c, is amorphous oxide semiconductor or CAAC-OS. By adopting such a structure, it is possible to reduce the amount of fluctuation in the threshold voltage due to the aging of the transistor and reliability tests.

Furthermore, in a semiconductor device according to one aspect of the present invention, when the transistor 297 shown in Figure 17 is applied to the transistor 103, the oxide semiconductor film 119 that functions as one electrode of the retaining capacitance 105 is also composed of three oxide semiconductor films: the first oxide semiconductor film 299a to the third oxide semiconductor film 299c.
It forms a layered structure.

In this case, the channel formation region of the transistor 297, which is the switching element of the pixel, can be said to be the second oxide semiconductor film 299b. And in the holding capacitance 105, the first
It can be said that the oxide semiconductor films 299a to the third oxide semiconductor film 299c function as one of the electrodes of the retention capacity 105.

In other words, in this configuration, the channel formation region of the transistor, which is the switching element of the pixel, is located on a different surface from the surface on which the oxide semiconductor film, which functions as one of the electrodes of the retaining capacitance, is provided.

Furthermore, the configurations shown in this embodiment can be used in appropriate combination with the configurations shown in other embodiments.

(Embodiment 3)
A semiconductor device (also called a display device) having a display function can be manufactured using the transistor and retention capacitor shown as an example in the above embodiment. Furthermore, a part or all of the drive circuit including the transistor can be integrally formed on the same substrate as the pixel section to form a system-on-panel. In this embodiment, an example of a display device using the transistor shown as an example in the above embodiment will be described with reference to the drawings.

In Figure 18(A), a sealing material 905 is provided so as to surround the pixel portion 902 provided on the first substrate 901, and is sealed by the second substrate 906.
In this case, a signal line drive circuit 903 and a scan line drive circuit 904, both made of single-crystal or polycrystalline semiconductor material on a separately prepared substrate, are mounted in a region different from the region surrounded by the sealing material 905 on the first substrate 901.
3. Various signals and potentials are supplied to the scan line drive circuit 904 or the pixel unit 902, FPC
(Flexible printed circuit) 918a, supplied from FPC918b.

In Figures 18(B) and 18(C), the pixel portion 90 is provided on the first substrate 901.
A sealing material 905 is provided so as to surround the first substrate 901 and the scan line drive circuit 904. A second substrate 906 is provided on top of the pixel section 902 and the scan line drive circuit 904. Therefore, the pixel section 902 and the scan line drive circuit 904 are separated by the first substrate 901 and the sealing material 905.
The display element is sealed together with the second substrate 906. (Figures 18(B) and 1)
In 8(C), a signal line drive circuit 903, formed of a single-crystal or polycrystalline semiconductor on a separately prepared substrate, is mounted in a region different from the region surrounded by the sealing material 905 on the first substrate 901. In Figures 18(B) and 18(C), various signals and potentials are supplied to the signal line drive circuit 903, the scan line drive circuit 904, or the pixel section 902 from the FPC 918.

Furthermore, while Figures 18(B) and 18(C) show an example in which a signal line drive circuit 903 is separately formed and mounted on the first substrate 901, the configuration is not limited to this. A scan line drive circuit may be separately formed and mounted, or only a part of the signal line drive circuit or a part of the scan line drive circuit may be separately formed and mounted.

Furthermore, the method of connecting the separately formed drive circuit is not particularly limited, and COG (C
Hip-on-Glass (HIP) method, wire bonding method, or TAB (Tape)
Methods such as Automated Bonding can be used. Figure 18(A) shows an example of implementing the signal line drive circuit 903 and the scan line drive circuit 904 using the COG method.
Figure 18(B) shows an example of implementing the signal line drive circuit 903 using the COG method, and Figure 18(
C) is an example of implementing the signal line drive circuit 903 using the TAB method.

Furthermore, the display device includes a panel in which the display elements are sealed, and a module on which an IC including a controller is mounted.

In this specification, "display device" refers to an image display device or a display device.
Furthermore, it can function as a light source (including lighting devices) instead of a display device. Also, modules to which connectors, such as FPCs or TCPs, are attached, modules to which printed circuit boards are provided at the end of TCPs, or modules to which ICs (integrated circuits) are directly mounted on the display element using the COG method are all included as display devices.

Furthermore, the pixel section 902 and the scan line driving circuit 904 provided on the first substrate 901 have multiple transistors, and the transistors shown in the above embodiment can be used.

Liquid crystal elements (also called liquid crystal display elements) and light-emitting elements (also called light-emitting display elements) can be used as display elements provided in a display device. Light-emitting elements include elements whose brightness is controlled by current or voltage, and specifically include organic EL (Electron).
This includes luminescence elements, inorganic EL elements, etc. Furthermore, display media whose contrast changes due to electrical action, such as electronic ink, can also be applied. (Figure 19)
The following shows an example of a liquid crystal display device that uses liquid crystal elements as display elements.

Figures 19 and 20 are cross-sectional views between the dashed line X1 and X2 in Figure 18(B). Note that only a portion of the pixel structure is shown in Figures 19 and 20.

The display devices shown in Figures 19 and 20 are vertical electric field type liquid crystal display devices. The liquid crystal display device has connection terminal electrodes 915 and terminal electrodes 916, and the connection terminal electrodes 915 and terminal electrodes 916 are electrically connected to terminals of the FPC 918 via an anisotropic conductive agent 919.

The connecting terminal electrode 915 is formed from the same conductive film as the first electrode 930, and the terminal electrode 916
It is formed of the same conductive film as the source and drain electrodes of transistors 910 and 911.

Furthermore, the pixel section 902 and the scan line driving circuit 904 provided on the first substrate 901 have multiple transistors, with the transistor 910 included in the pixel section 902 and the transistor 911 included in the scan line driving circuit 904 being examples. An insulating film 924 corresponding to the insulating film 129, insulating film 131, and insulating film 132 shown in Embodiment 1 is provided on the oxide semiconductor film included in transistors 910 and 911.
23 is an insulating film that functions as a base layer.

In this embodiment, either of the transistors shown in the above embodiment can be used as transistor 910 and transistor 911. Also, the oxide semiconductor film 92
7. The retaining capacitance 926 is constructed using the insulating film 924 and the first electrode 930. The oxide semiconductor film 927 is electrically connected via the capacitance line 929 and the electrode 928 formed in an opening in the gate insulating film 922. The capacitance line 929 is formed from the same conductive film as the scan line, which includes the region that functions as the gate electrode of transistors 910 and 911. Here, the retaining capacitance 926 is shown as the retaining capacitance with the configuration shown in Embodiment 1, but retaining capacitances with configurations shown in other embodiments can be used as appropriate.

Furthermore, in the transistor 911 included in the scan line drive circuit 904, Figure 19(A) shows a structure in which a conductive film 917 is provided on the insulating film 924 at a position overlapping with the channel formation region of the oxide semiconductor film. In Figure 19(B), an insulating film 951 is provided on the insulating film 924, and a conductive film 917 is provided on the insulating film 951 at a position overlapping with the channel formation region of the oxide semiconductor film.

The conductive film 917 can supply potential and functions as the gate electrode of the transistor 911. In other words, the transistor 911 is a dual-gate transistor. The conductive film 917 can be formed from the same conductive film as the first electrode 930. Furthermore, the conductive film 917 can have a shape that is shorter in the channel length direction than the width between the source electrode and the drain electrode of the transistor 911.

The transistor 911 included in the scan line drive circuit 904 is provided with a conductive film 917, which reduces fluctuations in the gate voltage (rising gate voltage) at which on-current begins to flow at different drain voltages.
The provision of this makes it possible to control the current flowing between the source electrode and drain electrode of the transistor 911 in the conductive film 917 region of the oxide semiconductor film. Therefore, fluctuations in electrical characteristics between multiple transistors included in the scan line drive circuit 904 can be reduced. Furthermore, by setting the potential of the conductive film 917 in transistor 911 to the same potential as the lowest potential of the scan line drive circuit 904, or a potential equivalent to that lowest potential, fluctuations in the threshold voltage of transistor 911 can be reduced, thereby improving reliability. The lowest potential of the scan line drive circuit 904 refers to the scan line drive circuit 90
This refers to the lowest potential supplied when operating 4. For example, when the potential supplied when operating the scan line drive circuit 104 is referenced to the potential of the source electrode of transistor 911, it is the potential of the source electrode (Vss).

In the transistor 911 included in the scan line drive circuit 904, if the thickness of the insulating film 924 is thin, the electric field from the conductive film 917 applied to the oxide semiconductor film may cause fluctuations in the electrical characteristics of the transistor 911. Therefore, as shown in Figure 19(B), the insulating film 95
By providing (1), the influence of the electric field can be controlled, and the electrical characteristics of the transistor 911 can be improved.

The insulating film 951 can be made of a material applicable to the insulating film 924. Alternatively, an organic insulating film can be used as the insulating film 951. Examples of such organic insulating films include photosensitive and non-photosensitive organic resins, such as acrylic resins, benzocyclobutene resins, epoxy resins, or siloxane resins. Polyamide can also be used as the organic insulating film. The method for forming the organic insulating film is not particularly limited and can be appropriately selected depending on the material used. For example, spin coating, dipping, spray coating, droplet ejection (inkjet method), screen printing, and offset printing can be applied.

Furthermore, the conductive film 917 also has the function of shielding against external electric fields. That is, it has the function of preventing external electric fields from acting on the inside (circuit part including the transistor) (particularly an electrostatic shielding function against static electricity). Due to the shielding function of the conductive film 917, the transistor 911 can suppress fluctuations in the electrical characteristics of the transistor due to the influence of external electric fields such as static electricity, thereby improving its reliability.

In Figure 19, the transistors included in the scan line drive circuit are shown, but the transistors included in the signal line drive circuit can also be dual-gate transistors, similar to transistor 911. By making the transistors included in the signal line drive circuit dual-gate transistors, these transistors will have the same effect as transistor 911.

Based on the above, one aspect of the present invention, the semiconductor device (display device), is a highly reliable semiconductor device.

Next, we will describe a structure that differs from the vertical electric field type liquid crystal display device shown in Figure 19. Specifically, we will describe the horizontal electric field type liquid crystal display device using Figure 20. Figure 20 is an example of a horizontal electric field type liquid crystal display device in FFS (Fringe Field Switching) mode.

In the liquid crystal display device shown in Figure 20, the connection terminal electrode 915 is formed from the same material and using the same process as the first electrode 940, and the terminal electrode 916 is formed from the same material and using the same process as the source electrode and drain electrode of transistors 910 and 911.

Furthermore, the liquid crystal element 943 includes a first electrode 940, a second electrode 941, and liquid crystal 908 formed on the insulating film 924. The liquid crystal element 943 can have the same structure as the holding capacitance 105 shown in Embodiment 1. The first electrode 940 can use the material shown for the first electrode 930 in Figure 19 as appropriate. Also, the planar shape of the first electrode 940 is...
The shape may be comb-like, stepped, ladder-like, etc. The second electrode 941 functions as a common electrode and can be formed in the same way as the oxide semiconductor film 119 shown in Embodiment 1. An insulating film 924 is provided between the first electrode 940 and the second electrode 941.

The second electrode 941 is connected to the common wiring 946 via electrode 945.
45 is formed from the same conductive film as the source and drain electrodes of transistors 910 and 911. The common wiring 946 is formed from the same material and using the same process as the gate electrodes of transistors 910 and 911. In this description, the retaining capacitance shown in Embodiment 1 was used as the liquid crystal element 943, but other retaining capacitances shown in other embodiments can be used as appropriate.

Note that the transistor 91 is included in the scan line driving circuit 904 of the liquid crystal display device shown in Figure 20.
In 1, an insulating film 951 can be provided between the conductive film 917 and the insulating film 924, similar to Figure 19(B).

Here, in a transistor included in a semiconductor device (display device) according to one aspect of the present invention, for example, in a plurality of transistors included in a scan line driving circuit 904, a structure in which a wiring including a gate electrode and a wiring including a source electrode or drain electrode are electrically connected by a conductive film will be described. Figure 21(A) shows a top view of the structure, and Figure 21(B) shows a cross-sectional view between the dashed lines Y1-Y2 and Z1-Z2 in Figure 21(A).

As shown in Figure 21(A), the wiring 950 including the gate electrode of transistor 911 and the wiring 952 including the source electrode of transistor 911 are in contact with the conductive film 958 provided in the openings 954 and 956.

As shown in Figure 21(B), the cross-sectional structure is such that an insulating film 923 is provided on the substrate 901, wiring 950 is provided on the insulating film 923, a gate insulating film 922 is provided on the wiring 950 and the insulating film 923, and wiring 952 is provided on the gate insulating film 922.
An insulating film 924 is provided on the gate insulating film 922 and the wiring 952. In the region of the dashed line Y1-Y2, an opening 954 reaching the wiring 950 is provided in the gate insulating film 922 and the insulating film 924, and in the region of the dashed line Z1-Z2, an opening 956 reaching the wiring 952 is provided in the insulating film 924. And on the insulating film 924 and the opening 95
A conductive film 958 is provided in both 4 and the opening 956.

From the above, wiring 950 including the gate electrode and wiring 95 including the source electrode or drain electrode
The two are electrically connected by a conductive film 958.

The conductive film 958 can be formed using the process for forming the conductive film 917 of the transistor 911. In the case of multiple transistors included in the scan line drive circuit 904, where the wiring including the gate electrode and the wiring including the source electrode or drain electrode are electrically connected by a conductive film, it is preferable not to provide a conductive film in a position that overlaps with the channel formation region of the transistor.

The openings 954 and 956 can be formed at once. Details are as follows: An insulating film to be processed into a gate insulating film 922 is formed on the wiring 950, the wiring 952 is formed on the insulating film, and an insulating film to be processed into an insulating film 924 is formed on the wiring 952. After that,
A mask is formed on the insulating film 924, and by processing using the mask, an opening 954 is formed.
And an opening 956 can be formed. A resist mask can be used as the mask. Dry etching can be used as the processing method. Wiring 95
By forming 0 with a metallic material, the etching selectivity ratio in the wiring 950 and gate insulating film 922 can be increased, allowing the openings 954 and 956 to be formed simultaneously by this dry etching.

The transistor 910 provided in the pixel section 902 is electrically connected to the display element.

The liquid crystal element 913, which is a display element, has a first electrode 930, a second electrode 931, and liquid crystal 9
This includes 08. Alignment films 932 and 933 are provided so as to sandwich the liquid crystal 908. The second electrode 931 is provided on the second substrate 906 side, and the first electrode 930 and the second electrode 931 are configured to overlap via the liquid crystal 908. The liquid crystal element 913 can refer to the liquid crystal element 108 described in Embodiment 1. The first electrode 930 corresponds to the pixel electrode 121 described in Embodiment 1, the second electrode 931 corresponds to the counter electrode 154 described in Embodiment 1, the liquid crystal 908 corresponds to the liquid crystal 160 described in Embodiment 1, the alignment film 932 corresponds to the alignment film 158 described in Embodiment 1, and the alignment film 933 corresponds to the alignment film 156 described in Embodiment 1.

In the first electrode 930 and the second electrode 931 (also called pixel electrode, common electrode, counter electrode, etc.) that apply voltage to the display element, the direction of the light extracted, the location where the electrodes are provided,
The transparency or reflectivity can be selected depending on the pattern structure of the electrodes.

The first electrode 930 and the second electrode 931 can be made of the same materials as the pixel electrode 121 and counter electrode 154 shown in Embodiment 1.

Furthermore, the spacer 935 is a columnar spacer obtained by selectively etching the insulating film, and is provided to control the distance (cell gap) between the first electrode 930 and the second electrode 931. A spherical spacer may also be used.

The first substrate 901 and the second substrate 906 are fixed together by a sealing material 905. The sealing material 905 can be an organic resin such as a thermosetting resin or a photocuring resin. Also,
The sealing material 905 is in contact with the insulating film 924.

Furthermore, in a semiconductor device (display device) according to one aspect of the present invention, optical components (optical substrates) such as a light-shielding film (black matrix), polarizing member, phase difference member, and anti-reflective member may be provided as appropriate. For example, circular polarization using a polarizing substrate and a phase difference substrate may be used. Also, a backlight, sidelight, etc. may be used as a light source.

Furthermore, since transistors are susceptible to damage from static electricity and other factors, it is preferable to provide a protection circuit to protect the drive circuit. The protection circuit is preferably constructed using nonlinear elements.

Figure 22 shows an example in which a common connection portion (pad portion) for electrically connecting to the second electrode 931 provided on the substrate 906 is formed on the substrate 901 in the display device shown in Figures 18 and 19.

The common connection portion is positioned to overlap with the sealing material 925 used to bond substrates 901 and 906, and is electrically connected to the second electrode 931 via conductive particles contained in the sealing material 925. Alternatively, the common connection portion may be provided in a location that does not overlap with the sealing material 925 (excluding the pixel portion), and a paste containing conductive particles may be provided separately from the sealing material 925 so as to overlap the common connection portion and electrically connected to the second electrode 931.

Figure 22(A) is a cross-sectional view of the common connection section, which corresponds to line I-J in the top view shown in Figure 22(B).

The common potential line 975 is provided on the gate insulating film 922, and the transistor 9 shown in Figure 22
The 10 source electrodes 971 or drain electrodes 973 are manufactured using the same materials and processes.

Furthermore, the common potential line 975 is covered with an insulating film 924, and the insulating film 924 covers the common potential line 97
Multiple openings are located in positions that overlap with 5. These openings are manufactured using the same process as the contact holes that connect either the source electrode 971 or the drain electrode 973 of the transistor 910 to the first electrode 930.

Furthermore, the common potential line 975 and the common electrode 977 are connected at the opening. Common electrode 977
It is provided on the insulating film 924 and is manufactured using the same material and process as the connection terminal electrode 915 and the first electrode 930 of the pixel portion.

In this way, the common connection section can be manufactured by sharing the manufacturing process with that of the switching element of the pixel section 902.

The common electrode 977 is an electrode that comes into contact with conductive particles contained in the sealing material, and is located on the substrate 906.
An electrical connection is made with the second electrode 931.

Alternatively, as shown in Figure 22(C), the common potential line 985 may be formed using the same material and process as the gate electrode of the transistor 910.

In the common connection shown in Figure 22(C), the common potential line 985 is provided in the lower layers of the gate insulating film 922 and the insulating film 924, and the gate insulating film 922 and the insulating film 924 have a plurality of openings in positions that overlap with the common potential line 985. These openings are formed by etching the insulating film 924 in the same process as etching the contact holes that connect one of the source electrode 971 or drain electrode 973 of the transistor 910 to the first electrode 930, and then selectively etching the gate insulating film 922.

Furthermore, the common potential line 985 and the common electrode 987 are connected at the opening. Common electrode 987
It is provided on the insulating film 924 and is manufactured using the same material and process as the connection terminal electrode 915 and the first electrode 930 of the pixel portion.

As described above, by using an oxide semiconductor film formed by the same formation process as the oxide semiconductor film included in the transistor as one electrode of the retaining capacitance, it is possible to manufacture a semiconductor device having a retaining capacitance with increased charge capacitance while increasing the aperture ratio. For example, in the semiconductor device of this embodiment, when the pixel density is 300 ppi or more, the aperture ratio of the pixels can be increased to 50% or more, further to 55% or more, and even further to 60% or more. In addition, by increasing the aperture ratio, a semiconductor device with excellent display quality can be obtained.

Furthermore, since the oxide semiconductor film contained in the transistor has reduced oxygen vacancies and reduced impurities such as hydrogen and nitrogen, one embodiment of the present invention is a semiconductor device with good electrical characteristics.

Furthermore, the configurations shown in this embodiment can be used in appropriate combination with the configurations shown in other embodiments.

(Embodiment 4)
One aspect of the present invention, a semiconductor device, can be applied to various electronic devices (including amusement machines). Examples of electronic devices include television equipment (also called televisions or television receivers), monitors for computers, digital cameras, digital video cameras, and more.
Digital photo frames, mobile phones, portable game consoles, personal digital assistants, audio playback devices,
Examples include amusement machines (pachinko machines, slot machines, etc.) and game cabinets. An example of these electronic devices is shown in Figure 23.

Figure 23(A) shows a table 9000 having a display unit. The table 9000 has a display unit 9003 incorporated into a housing 9001, and the display unit 9003 is capable of displaying images. The housing 9001 is supported by four legs 9002. A power cord 9005 for power supply is also attached to the housing 9001.

The semiconductor device shown in any of the above embodiments can be used in the display unit 9003. Therefore, the display quality of the display unit 9003 can be improved.

The display unit 9003 has a touch input function, and the display unit 9003 of the table 9000
By touching the display buttons 9004 shown on the screen with a finger, the user can operate the screen or input information. Furthermore, by enabling communication with or control of other home appliances, the device can also function as a control device that controls other home appliances through screen operation. For example, by using a semiconductor device with an image sensor function, the display unit 9003 can be given a touch input function.

Furthermore, the hinges provided on the housing 9001 allow the screen of the display unit 9003 to be positioned perpendicular to the floor, enabling its use as a television system. In a small room,
While installing a large-screen television system reduces available space, a table with a built-in display unit allows for more efficient use of room space.

Figure 23(B) shows the television device 9100.
In this configuration, a display unit 9103 is incorporated into the housing 9101, and the display unit 9103 is capable of displaying images. Note that this configuration shows the housing 9101 supported by a stand 9105.

The television device 9100 can be operated using the operation switches on the housing 9101 or a separate remote control unit 9110. The remote control unit 9110 has operation keys 9109 that allow for channel and volume control, and control of the image displayed on the display unit 9103. The remote control unit 9110 may also be configured to include a display unit 9107 that displays information output from the remote control unit 9110.

The television system 9100 shown in Figure 23(B) includes a receiver, a modem, and the like.
The television equipment 9100 can receive general television broadcasts using a receiver.
Furthermore, by connecting to a wired or wireless communication network via a modem, it is possible to perform one-way (sender to receiver) or two-way (sender to receiver, or receiver to receiver) information communication.

The semiconductor device shown in any of the above embodiments can be used in the display units 9103 and 9107. Therefore, the display quality of the television device can be improved.

Figure 23(C) shows the computer 9200, consisting of the main unit 9201, the casing 9202, and the display unit 9
203, Keyboard 9204, External connection port 9205, Pointing device 920
Includes 6, etc.

The semiconductor device shown in any of the above embodiments can be used in the display unit 9203. Therefore, the display quality of the computer 9200 can be improved.

The display unit 9003 has a touch input function, and the display unit 9003 of the table 9000
By touching the display buttons shown on the screen with a finger, users can operate the screen and input information. Furthermore, by enabling communication with or control of other home appliances, it can also function as a control device that controls other home appliances through screen operation. For example, by using a semiconductor device with an image sensor function, the display unit 9003 can be given a touch input function.

Furthermore, the hinges provided on the housing 9001 allow the screen of the display unit 9003 to be positioned perpendicular to the floor, enabling its use as a television system. In a small room,
While installing a large-screen television system reduces available space, a table with a built-in display unit allows for more efficient use of room space.

Figures 24(A) and 24(B) show a foldable tablet device.
The ) is in an open state, and the tablet terminal has a housing 9630, a display unit 9631a, a display unit 9631b, a display mode switching switch 9034, a power switch 9035, a power saving mode switching switch 9036, a fastener 9033, and an operation switch 9038.

The semiconductor device shown in any of the above embodiments includes a display unit 9631a and a display unit 9631b.
It can be used for this purpose. Therefore, it can improve the display quality of tablet devices.

The display unit 9631a can be partially designated as a touch panel area 9632a, allowing data input by touching the displayed operation keys 9638.
In 31a, as an example, a configuration is shown in which half of the area has a display-only function and the other half has a touch panel function, but the configuration is not limited to this.
The entire area of 31a may also be configured to have touch panel functionality. For example, the display unit 9
The entire surface of 631a can be used as a touch panel by displaying keyboard buttons, and the display unit 9631b can be used as a display screen.

Furthermore, similar to the display unit 9631a, a portion of the display unit 9631b can be designated as the touch panel area 9632b. Also, by touching the location where the keyboard display switching button 9639 on the touch panel is displayed with a finger or stylus, the keyboard buttons can be displayed on the display unit 9631b.

Furthermore, touch input can be performed simultaneously on both the touch panel area 9632a and the touch panel area 9632b.

Furthermore, the display mode switch 9034 allows switching between vertical and horizontal display orientations, and selecting between monochrome and color displays. The power saving mode switch 9036 optimizes the display brightness according to the amount of ambient light detected by the light sensor built into the tablet device during use. The tablet device may also incorporate other detection devices such as gyroscopes, accelerometers, and other sensors that detect tilt, in addition to the light sensor.

Furthermore, while Figure 24(A) shows an example where the display area of display unit 9631b and display unit 9631a are the same, this is not particularly limited, and the size of one and the other may be different, and the display quality may also be different. For example, one display panel may be capable of displaying a higher resolution than the other.

Figure 24(B) shows the closed state, and the tablet terminal consists of a housing 9630 and a solar cell 9
633, It has a charge/discharge control circuit 9634. Note that in Figure 24(B), the charge/discharge control circuit 96
As an example of 34, a configuration having a battery 9635 and a DC-DC converter 9636 is shown.

Furthermore, since the tablet device is foldable, the casing 9630 can be closed when not in use. Therefore, the display units 9631a and 9631b can be protected.
We can provide tablet devices that are highly durable and reliable from a long-term use perspective.

Furthermore, the tablet terminals shown in Figures 24(A) and 24(B) may also have functions such as displaying various information (still images, videos, text images, etc.), displaying a calendar, date, or time on the display unit, a touch input function for touch input operation or editing of the information displayed on the display unit, and a function for controlling processing by various software (programs).

The solar cell 9633 mounted on the surface of the tablet device can supply power to the touch panel, display unit, or video signal processing unit, etc.
It is preferable because it can be provided on one or both sides of the housing 9630, and allows for efficient charging of the battery 9635. Furthermore, using a lithium-ion battery as the battery 9635 has advantages such as enabling miniaturization.

Furthermore, the configuration and operation of the charge/discharge control circuit 9634 shown in Figure 24(B) are shown in Figure 24(
A block diagram is shown and explained in C). Figure 24(C) shows the solar cell 9633 and the battery 9
635, DC-DC converter 9636, converter 9637, switch SW1 to SW3
The display unit 9631 is shown, along with the battery 9635 and the DC-DC converter 963.
6. The converter 9637 and switches SW1 to SW3 correspond to the charge/discharge control circuit 9634 shown in Figure 24(B).

First, we will explain an example of operation when electricity is generated by the solar cell 9633 using ambient light. The power generated by the solar cell is set to a voltage that is sufficient to charge the battery 9635.
The CDC converter 9636 performs voltage boosting or bucking. When power from the solar cell 9633 is used to operate the display unit 9631, switch SW1 is turned on, and the converter 9637 boosts or bucks the voltage to the voltage required by the display unit 9631. When the display unit 9631 is not being used, SW1 is turned off and SW2 is turned on to charge the battery 9635.

The solar cell 9633 is shown as an example of a power generation means, but it is not particularly limited, and the battery 9635 may be charged using other power generation means such as piezoelectric elements or thermoelectric elements (Peltier elements). For example, a contactless power transmission module that transmits and receives power wirelessly (non-contact) to charge the battery, or a combination of other charging means may be used.

Furthermore, the configurations shown in this embodiment can be used in appropriate combination with the configurations shown in other embodiments.

Claims (2)

A first conductive layer and a second conductive layer,
A first insulating layer having a region above the first conductive layer and a region above the second conductive layer,
A first metal oxide layer having a region above the first insulating layer,
A second metal oxide layer having a region above the first insulating layer,
A third conductive layer,
A fourth conductive layer,
A fifth conductive layer,
A second insulating layer having a region above the third conductive layer, a region above the fourth conductive layer, and a region above the fifth conductive layer,
It has a sixth conductive layer that is translucent,
The first conductive layer has a region that functions as the gate electrode of a transistor in the pixel,
The second conductive layer has the function of supplying potential to the second metal oxide layer.
The first insulating layer has a region that functions as a gate insulating layer for the transistor,
The first metal oxide layer has a region that functions as a channel formation region of the transistor,
The second metal oxide layer is translucent,
The third conductive layer has the function of supplying a potential corresponding to the video signal to either the source or the drain of the transistor.
The fourth conductive layer has the function of electrically connecting the source or drain of the transistor to the sixth conductive layer.
The fifth conductive layer has the function of electrically connecting the second conductive layer and the second metal oxide layer.
The second insulating layer is translucent,
The sixth conductive layer has a region that functions as a pixel electrode of the liquid crystal element,
A portion of the sixth conductive layer, a portion of the second insulating layer, and a portion of the second metal oxide layer form a capacitance.
In a plan view of the pixel, the first conductive layer is arranged extending in a first direction.
In a plan view of the pixel, the second conductive layer is arranged extending in the first direction.
In a plan view of the pixel, the first conductive layer has a first region including a region protruding in a second direction intersecting the first direction, and a second region having a narrower width in the second direction than the first region.
In a plan view of the pixel, the entirety of the first metal oxide layer is arranged to overlap with the first region.
In a plan view of the pixel, the region where the fourth conductive layer and the sixth conductive layer are in contact is located in the region sandwiched between the second region and the second conductive layer.
In a plan view of the pixel, the region where the sixth conductive layer and the second metal oxide layer overlap has a width in the second direction greater than the width in the first direction.
In a plan view of the pixel, the distance between the first conductive layer and the second conductive layer in the second direction is smaller than the width of the region where the sixth conductive layer and the second metal oxide layer overlap in the second direction.
The fifth conductive layer is electrically connected to the second conductive layer via a first contact hole provided in the first insulating layer.
The sixth conductive layer is electrically connected to the fourth conductive layer via a second contact hole provided in the second insulating layer.
A liquid crystal display device wherein the light-shielding layer having a region above the liquid crystal layer of the liquid crystal element overlaps with the first metal oxide layer, overlaps with the first contact hole, overlaps with the second contact hole, and overlaps with the region where the fifth conductive layer and the second metal oxide layer overlap . In claim 1 ,
A liquid crystal display device wherein the first metal oxide layer and the second metal oxide layer contain indium.