JP7840656B2 - Laser chip for flip-chip bonding in silicon photonics chips - Google Patents

Description

This invention relates to optical communication techniques. More specifically, the invention provides a laser chip and method for flip-chip bonding in silicon photonics chips having enhanced passive alignment.

Over the past few decades, the use of communication networks has become widespread. In the early days of the internet, its primary uses were limited to email, message boards, and text-based web page surfing for information, and the amount of data transferred was usually relatively small. Today, internet and mobile applications require massive amounts of bandwidth to transfer photos, videos, music, and other multimedia files. For example, social networks like Facebook® process more than 500 TB of data daily. Such high demand for data and data transfer necessitates improvements to existing data communication systems to address these needs.

High-density wavelength division multiplexing (DWDM) optical transmission with data rates of 40 Gbit/s and 100 Gbit/s is the goal for next-generation optical fiber communication networks, replacing existing single-mode fibers. More recently, optical components have been integrated into silicon substrates to manufacture large-scale photonic integrated circuits that coexist with microelectronic chips. All photonic components, including filters, (de)multiplexers, splitters, modulators, and photodetectors, are primarily represented on silicon photonic platforms. Silicon photonic platforms on silicon-on-insulator substrates are particularly well-suited for the standard WDM communication bandwidths of 1300 nm and 1550 nm. This is because both silicon (n=3.48) and its oxide _SiO2 (n=1.44) are transparent, have a high refractive index difference, and form waveguides with high confinement performance that are ideally suited for medium-to-high-integration silicon photonic integrated circuits (SPICs).

Semiconductor lasers in silicon photonics platforms are implemented for numerous optoelectronic communication applications. In some applications, laser chips are applied to silicon photonics via flip-chip bonding for broadband, high-speed optical communication, improving spectral efficiency. However, technical challenges exist in achieving excellent and reliable passive alignment in the vertical, longitudinal, and transverse directions. Therefore, improved technology is desired. [Summary of Invention]

This invention relates to optical communication techniques. More specifically, the invention provides a laser chip and method for flip-chip bonding in silicon photonics chips having enhanced 3D passive alignment. More specifically, the invention provides a laser chip configured to have submicron precision in 3D passive alignment between the laser and waveguide in a silicon photonics chip. This has optical loss <3 dB and a 2x vertical alignment tolerance window for various high-speed data communication applications, although other applications are possible.

In an embodiment, the present invention provides a laser tip for flip-chip bonding in a silicon photonics chip having a 3D passive alignment feature. The laser tip includes a chip body extending longitudinally from the front to the back, fabricated in a p-region and an n-region in the vertical direction. The laser tip further includes a pair of first vertical stoppers, each formed beyond two sides of the chip body based on the wider width of the n-region. Furthermore, the laser tip includes a linear active region extending longitudinally from the front to the back, embedded in the chip body between the p-region and the n-region in the vertical direction. Furthermore, the laser tip includes a longitudinal first alignment mark formed on the upper surface of the p-region near the front, at a lateral distance defined with submicron precision with respect to the vertical projection line of the active region on the upper surface of the p-region. Furthermore, the laser tip includes a thin metal film on the surface of the p-region having a cleaved edge shared with the front.

In an alternative embodiment, the present invention provides a method for bonding a laser chip to a silicon photonics chip with enhanced 3D alignment accuracy and tolerances. The method includes a process for providing a laser chip, comprising the steps of: forming a chip body having an active region extending longitudinally from the front to the back, embedded between a p region and an n region in the vertical direction; forming a pair of first vertical stoppers positioned beyond two sides of each of the chip body; forming a first longitudinal alignment mark on the upper surface of the p region near the front, at a lateral distance defined with submicron precision with respect to the vertical projection line of the active region on the upper surface of the p region; and forming a thin metal film having a cleaved edge coinciding with the front. The method further includes the step of setting a chip site on a concave surface of a silicon photonics chip, having a waveguide port positioned at a height above the concave surface. The chip site includes a pair of second vertical stoppers standing on a concave surface and a second alignment mark on the concave surface, defined with submicron precision at a lateral distance from the perpendicular projection line of the waveguide port on the concave surface. Furthermore, the method includes the step of joining a laser tip having a downward-facing p-region upper surface to the chip site on the concave surface via a solder material, using a pair of first vertical stoppers, each joined to the pair of second vertical stoppers to determine the vertical alignment between the active region and the waveguide port. The method further includes the step of determining the lateral alignment by aligning the first alignment mark with the second alignment mark. Furthermore, the method includes the step of determining the longitudinal alignment by identifying the front surface based on the reflection contrast at the cleaved edge of a thin metal film.

In another alternative embodiment, the present invention provides a laser tip for flip-chip bonding in a silicon photonics chip having an enhanced passive alignment feature. The laser tip includes a tip body fabricated in a p-region and an n-region in the vertical direction, extending longitudinally from the front to the back. Furthermore, the laser tip includes a pair of first vertical stoppers formed beyond the two sides of the tip body, respectively. Furthermore, the laser tip includes a linear active region embedded in the tip body between the p-region and the n-region in the vertical direction, extending longitudinally from the front to the back. Furthermore, the laser tip includes a longitudinal first alignment mark formed on the upper surface of the p-region near the front, at a lateral distance defined with submicron precision with respect to the vertical projection line of the active region on the upper surface of the p-region.

In yet another alternative embodiment, the present invention provides a laser tip for flip-chip bonding in a silicon photonics chip having an enhanced passive alignment feature. The laser tip includes a chip body fabricated in a p-region and an n-region in the vertical direction, extending longitudinally from the front to the back. Furthermore, the laser tip includes a linearly shaped active region extending longitudinally from the front to the back, embedded in the chip body between the p-region and the n-region in the vertical direction. Furthermore, the laser tip includes a first longitudinal alignment mark formed on the upper surface of the p-region near the front, at a lateral distance defined with submicron precision with respect to the vertical projection line of the active region on the upper surface of the p-region. Furthermore, the laser tip includes a thin metal film on the surface of the p-region having a cleaved edge shared with the front.

This invention realizes these and other advantages within the context of known technologies for semiconductor lasers associated with silicon photonics platforms. However, a further understanding of the nature and features of this invention can be achieved by referring to the latter portions of the specification and accompanying drawings.

The following figures are for illustrative purposes only and should not unduly limit the claims of this specification. Those skilled in the art will recognize many other variations, modifications, and alternative forms. Furthermore, it should be understood that the examples and embodiments described herein are for illustrative purposes only, and various modifications or changes taking them into consideration are suggested to those skilled in the art and are included in the intent and authority of this process and scope of the appended claims.

This is a top view of a laser flip chip having a 3D alignment feature, which is bonded to the chip site of a silicon photonics chip, according to an embodiment of the present invention.

This is a side view of a laser flip chip having a 3D alignment feature, which is bonded to a chip site on a concave surface of a silicon photonics chip, according to an embodiment of the present invention.

This is a plot of optical coupling efficiency versus vertical misalignment for laser flip-chip bonding on a silicon photonics chip according to an embodiment of the present invention.

This is a schematic diagram illustrating a method for forming lateral alignment marks on a laser chip before regrowth of the cladding layer of a laser diode, according to an embodiment of the present invention.

This is a schematic diagram illustrating a method for forming lateral alignment marks on a laser chip after regrowth of the cladding layer of a laser diode, according to an embodiment of the present invention.

This is a plot of the InP growth rate versus the width of the oxide mask across the active layer for forming alignment marks after regrowth of the cladding layer, according to an embodiment of the present invention.

This is a schematic diagram illustrating a method for forming lateral alignment marks on a laser chip according to an embodiment of the present invention. This is a schematic diagram illustrating a method for forming lateral alignment marks on a laser chip according to an embodiment of the present invention. This is a schematic diagram illustrating a method for forming lateral alignment marks on a laser chip according to an embodiment of the present invention. This is a schematic diagram illustrating a method for forming lateral alignment marks on a laser chip according to an embodiment of the present invention.

This is a schematic diagram illustrating a method for forming lateral alignment marks on a laser chip before regrowth of the cladding layer of a laser diode, according to another embodiment of the present invention.

This is a schematic diagram illustrating a method for forming lateral alignment marks on a laser chip after regrowth of the cladding layer of a laser diode, according to another embodiment of the present invention.

This is a schematic top view illustrating a method for forming a thin metal film to identify the front surface of a laser chip, according to an embodiment of the present invention.

This invention relates to optical communication techniques. More specifically, the invention provides a laser chip and method for flip-chip bonding in silicon photonics chips having enhanced 3D passive alignment. More specifically, the invention provides a laser chip configured to have submicron precision in 3D passive alignment between the laser and waveguide in a silicon photonics chip. This has optical loss <3 dB and a 2x vertical alignment tolerance window for various high-speed data communication applications, although other applications are possible.

The following description is provided to enable those skilled in the art to create and use the invention and incorporate it into the context of their specific application. Various modifications and diverse uses in different applications will be readily apparent to those skilled in the art, and the general principles set forth herein may apply to a wide range of embodiments. Therefore, the invention is not intended to be limited to the embodiments presented, but rather to encompass the broadest scope consistent with the principles and novel features disclosed herein.

To provide a more complete understanding of the present invention, many specific details are described in the following detailed description. However, it will be apparent to those skilled in the art that the present invention can be implemented without necessarily being limited to these specific details. In other examples, to avoid obscuring the present invention, well-known structures and devices are shown in block diagrams rather than in detail.

The reader's attention is directed to all documents and papers submitted concurrently with this Specified and exposed to public scrutiny together with this Specified, and the contents of all such documents and papers are incorporated herein by reference. All features disclosed herein (including any attached claims, abstracts, and drawings) may be replaced by alternative features serving the same, equivalent, or similar purpose unless expressly stated otherwise. Thus, unless expressly stated otherwise, each disclosed feature is merely an example of a general set of equivalent or similar features.

Furthermore, any element in the claims that does not explicitly state a “means” for performing a specified function, or a “stage” for performing a particular function, shall not be construed as a “means” or “stage” as defined in 35 U.S.C. Section 112, Paragraph 6. In particular, the use of “stage” or “operation” in the claims herein is not intended to invoke the provisions of 35 U.S.C. 112, Paragraph 6.

When used, the labels inward, outward, left, right, front, back, top, bottom, edge, side, forward, reverse, vertical, longitudinal, transverse, concave, raised, valley, clockwise, and counterclockwise are for convenience only and are not intended to suggest any specific fixed direction. Instead, they are used to reflect the relative position and/or orientation between different parts of an object.

In one embodiment, the present disclosure provides a semiconductor laser chip for flip-chip bonding to a silicon photonics chip with enhanced 3D passive alignment. In one example, the laser may be configured for high-power operability of a semiconductor optical amplifier applied to a broadband wavelength tunable laser in a silicon photonics platform. Figure 1A is a top view, and Figure 1B is a side view of a laser flip-chip having a 3D alignment feature that bonds onto a chip site on a concave surface of a silicon photonics chip, according to an embodiment of the present invention. This figure is merely an example and should not unduly limit the scope of the claims herein. Those skilled in the art will recognize many variations, alternatives, and modifications. As shown, in the top view, a laser chip having an upward-facing p region 103 and a downward-facing n region 105 is shown on the left side of the figure. The laser tip includes an active region 101 (which should actually be located below the p region 103 and is not directly visible in the top view) positioned between the p region 103 and the n region 105, extending longitudinally (y-direction) from the front surface 107 to the back surface 108. Optionally, the n region 105 has a wider width than the p region 103. A pair of first vertical stoppers 201 are formed beyond the two opposite sides of the p region 103 based on the wider width of the n region 105. Optionally, the first vertical stoppers 201 have an elongated shape along the y-direction. In this top view, the laser tip also includes one or two alignment marks 203 on the top surface of the p region 103. Each alignment mark 203 is part of a linear feature along the longitudinal (y-direction) near the front surface 107, and is positioned at a lateral distance d from the projection line of the active region 101 on the top surface of the p region 103. Optionally, two alignment marks are formed symmetrically on two sides, at equal distances d from the projection line of the active region 101 on the upper surface of region p 103. Optionally, the distance d can be controlled with submicron precision by using photolithography masking and by performing a laser confinement/cladding layer regrowth process around the laser active region 101. Furthermore, a thin metal film 205 is formed to have an edge shared with the front surface 107, configured to identify the position of the laser front surface under a microscope to facilitate longitudinal (y) alignment.

Referring to Figure 1A, in the top view, the laser chip is designed to be flip-chip bonded to a pre-set-up chip site 300 on the surface 30 of the silicon photonics chip. As shown in the center of the top view, the chip site 300 stands on the surface 30 of the silicon photonics chip, has an elongated shape along the y-direction, and includes at least one pair of second vertical stoppers 301 with a lateral spacing substantially equal to that of a pair of first vertical stoppers 201. The chip site 300 also has two alignment marks 303 formed inscribed on the surface 30 of the silicon photonics chip, which are designed to align with the alignment marks 203 on the laser chip in the lateral (x) direction with submicron precision.

Referring again to Figure 1A, in the top view on the right, the laser tip is flip-bonded to the tip site 300 on the surface 30 of the silicon photonics chip. At the flip-chip bonding position, a pair of first vertical stoppers 201 on the laser tip rest on or bond with a pair of second vertical stoppers on the surface 30, because both the pair of first vertical stoppers 201 and the pair of second vertical stoppers 301 have substantially equal lateral spacing. As will be shown later, each of the first and second vertical stoppers has a specific height design to align the active region 101 of the laser tip with the waveguide in the silicon photonics chip in the direction perpendicular to (z). This has a desired optical coupling loss of <3 dB with a relatively large tolerance window for vertical distances. The alignment mark 203 on the laser tip is used to align the laser tip's active region 101 with the waveguide in the lateral (x) direction with submicron precision, thereby supporting the achievement of a coupling loss of <3 dB for the laser light passing from the active region to the waveguide. A thin metal film 205 can be used to generate good contrast of optical reflections to pinpoint the position of the front surface 107. This is a crucial reference point for alignment in the longitudinal y direction, supporting the achievement of a coupling loss of <3 dB for the laser light passing from the active region to the waveguide.

Referring to Figure 1B, the upper part of the side view shows a cross-sectional view along the AA' plane (along the x-direction) of the flip bonding of the laser chip on the concave surface 30 of the silicon photonics chip. As shown, the p-region 103 faces downward and bonds with the concave surface 30 (upper chip site 300) of the silicon photonics chip via the solder material 305. Simultaneously, the vertical position of the active region 101 is determined by bringing the pair of first vertical stoppers 201 closer and bonding them to the pair of second vertical stoppers 301, while the surface of the p-region flexibly pushes away the excess solder material 305, allowing it to adhere to the remaining portion of the solder material 305 on the upper part of the concave surface 30.

The lower part of the side view shows a cross-sectional view along the BB' plane (along the y-direction) of the flip bonding of the laser chip via solder material 305 on the concave surface 30 of the silicon photonics chip, along with a substantially linear active region 101 positioned between region p (bottom) and region n (top). Optionally, the active region 101 is positioned above the concave surface 30 to a height h ₁ once region p is fixed to the concave surface 30 via solder material 305. Once formed on the silicon photonics chip, the optical waveguide 310 is positioned horizontally along the y-direction, along with a receiving port in the sidewall associated with the concave surface 30 facing the front surface 107 of the laser flip chip. Optionally, the optical waveguide 310, including the port in the sidewall, is designed to have a height h ₂ above the concave surface 30. The ideal optical alignment that has the maximum coupling efficiency between the linear active region 101 and the optical waveguide 310 requires perfect vertical alignment such that _h1 = _h2 or vertical misalignment g = _h1 - _h2 = 0, as shown in Figure 2.

Referring to Figure 2, the maximum coupling efficiency corresponding to perfect vertical alignment can be associated with a coupling loss of approximately -2 dB. In the case of laser flip-chip bonding, the vertical alignment position of the laser's active region relative to the waveguide port in the silicon photonics chip is primarily determined by the relative positions of a pair of first vertical stoppers relative to the active region in the laser chip and a pair of second vertical stoppers relative to the optical waveguide in the silicon photonics chip. The maximum coupling efficiency is potentially given when the active region 101 is perfectly aligned with the port of the optical waveguide 310 in the side wall with a vertical displacement g = 0. However, in practice, there may always be some debris formed on the stopping surface of the second (or first) vertical stoppers, thereby physically forcing the active region 101 to be positioned higher when they are bonded together to the laser chip. This causes the coupling efficiency between the active region and the optical waveguide 310 to fall within the range of R0, given that the worst-case acceptable coupling efficiency is -3 dB. R0, therefore, represents the tolerance range for vertical alignment. Optionally, the tolerance range R0 is approximately 0 to 0.5–0.7 μm.

In embodiments of the present invention, the vertical alignment design of the laser chip is for adjusting the vertical height of the stopping surfaces of a pair of first vertical stoppers 201 in the laser chip relative to the active region 101, based on the vertical height of the stopping surface of a second vertical stopper 301 relative to the optical waveguide 310 on a concave surface 30 in the corresponding silicon photonics chip to which the laser chip is bonded during the laser chip formation process. The stopping surface referred to herein is the end face of the vertical stopper. The vertical height of the first vertical stopper 201 is the height of the corresponding stopping surface relative to its base in n region 105, which has a wider width than n region 103. The vertical height of the second vertical stopper 301 is the height of the stopping surface relative to its base on the concave surface 30. The target of the vertical alignment design is to intentionally set a vertical misalignment g < 0 approximately -0.5 μm to -0.7 μm below the optical waveguide 310. In this embodiment, as shown in Figure 2, for the same acceptable coupling efficiency of -3 dB between the active region 101 and the optical waveguide 310, the tolerance range R1 of the vertical alignment is approximately doubled, from a window size of -0.5 to -0.7 μm to +0.5 to 0.7 μm.

In another embodiment, the present invention provides a method for forming a laser chipset for flip-chip bonding to a silicon photonics chip with submicron-precision 3D passive optical alignment. Figure 1 shows a feature using a vertical stopper to control/adjust a submicron-precision vertical alignment tolerance, and a feature of alignment marks on the upper surface of the p-region of the laser chip to achieve lateral alignment at the chip site of the silicon photonics chip. Figures 3A and 3B are schematic diagrams illustrating a method for forming lateral alignment marks on a laser chip before and after regrowth of the cladding layer of a laser diode, according to embodiments of the present invention. These figures are merely examples and should not unduly limit the scope of the claims herein. Those skilled in the art will recognize many variations, alternatives, and modifications.

In an embodiment, Figure 3A shows a schematic diagram of the laser chip formation process midway through. As shown, the active layer 400 is formed over the confinement/cladding layer 40. Depending on the operating wavelength spectrum, the active layer 400 includes one or more compound semiconductors, or different semiconductor materials including combinations of InAsP, GaInNA, GaInAsP, GaInA, and AlGaInA configured as multiple quantum well structures. The confinement/cladding layer 40 typically includes an InP-based semiconductor material with various doping profiles and different energy gaps compared to that of the active layer 400. Optionally, the confinement/cladding layer 40 is doped with n-type impurities and configured as an n-region 105 (n-region 105 of the laser chip, see Figure 1).

Referring to Figure 3A, a method for forming a laser chipset for flip-chip bonding to a silicon photonics chip using 3D passive optical alignment includes placing a first oxide mask 401 with a first width w1 over an active layer 400 where an active region 101 (Figure 1) is formed, and a second oxide mask 402 with a second width w2 over an active layer 400 where a first alignment mark is formed. Figure 3A is a cross-sectional view showing the second oxide mask 402 with width w2 formed at a lateral distance s from the first oxide mask 401 with width w1. This is done using mature masking and photolithography techniques, which can achieve submicron precision for setting the dimensions of w1, w2, and s. Optionally, the first width w1 is set to about 1.5 μm to 3.5 μm. Optionally, the second width w2 is set to about 0.1 μm to 2 μm, or 1 to 3.5 μm, smaller than the first width w1, as shown in Figure 3A. Optionally, the second width w2 is set to be approximately 2.5 μm to 8.5 μm, or 1 μm to 5 μm, greater than the first width w1, as shown in Figure 6A in another embodiment. Optionally, the first width w1 and the second width w2 are configured to have a difference between 1 μm and 5 μm in their lateral positions with submicron precision. Optionally, a third oxide mask similar to the second oxide mask may be formed on the opposite side of the first oxide mask at equal intervals d, intended to form symmetrical first alignment marks.

Referring to Figure 3B, the method for forming a laser chipset for flip-chip bonding to a silicon photonics chip using 3D passive optical alignment includes the step of performing a regrowth process applied to the structure shown in Figure 3A in order to form alignment marks 203 on the regrowth surface of the p-region of the laser chip. Figure 3B shows a cross-sectional view of the finished p-region formed by the regrowth of the p-type confinement/cladding layer 40', with the mask removed between the p-type confinement/cladding layer 40' and the n-type confinement/cladding layer 40, leaving an active region 101 under the first oxide mask and a narrower section 112 of the active layer (400) under the second oxide mask (402). Although not shown in this cross-sectional view, note that the active region 101 has a long length extending in the longitudinal y-direction (perpendicular to the cross-section) from the front to the back of the laser chip, while the narrower section 112 has a simply short length in the longitudinal y-direction. In particular, the upper surface of the finished p-region includes a profile with a relatively flattened region 411 across the previously placed first oxide mask, resulting in the formation of an active region 101 due to a more uniform growth rate of the neighboring p-type confinement/cladding layer 40', and also includes a shallow bunker region 413 near a small, short-length peak-like/elevated region 203 across the previously placed second oxide mask, resulting in the formation of a narrower section 112 of the active layer due to a slower growth rate of the neighboring p-type confinement/cladding layer 40'.

Figure 4 is a plot of InP growth rate versus oxide mask width across the active layer for forming alignment marks after regrowth of the cladding layer, according to an embodiment of the present invention. As shown, the growth of the cladding layer under the regrowth process associated with different oxide masks exhibits an interesting effect: the increased growth of the InP-based cladding layer in the regrowth process depends almost linearly with the width of the oxide mask. This effect causes the growth rate of the InP-based material in the region associated with the second oxide mask of second width w2 to be lower than the growth rate of the InP-based material in the region associated with the first oxide mask of first width w1 (w1 > w2), which is greater than w2, during the regrowth process after the mask has been removed (see Figure 3A). Thus, as the regrowth process progresses, a shallow bunker region 413 is formed, effectively creating a short-length, raised elevation region 203 that is positioned substantially perpendicular to the top of the previously positioned second oxide mask 402 (now indicated by a narrower section of the active layer 112 remaining in the center of the cladding layer) (Figure 3B). Optionally, a second raised region may be formed based on a third oxide film mask on the other side, having an equal spacing d relative to the active region.

In another embodiment shown in Figure 6A, the second width w2 of the second mask 402 can be greater than the first width w1 of the first oxide mask 401. Optionally, the first width w1 and the second width w2 are configured to have a difference between 1 μm and 5 μm in their lateral positions, separated by a distance s in submicron precision. Optionally, the first width w1 is set to approximately 1.5 μm to 3.5 μm. The second width w2 is set to approximately 2.5 μm to 8.5 μm. The growth-enhancing effect shown in Figure 4 still operates similarly, thereby the growth-enhancing of the InP-based cladding layer in the regrowth process depends almost linearly with the width of the oxide mask. The growth rate of the cladding layer around the region near the second oxide mask is greater than that around the region near the first oxide mask. When the regrowth process is applied to the structure shown in Figure 6A, the regrowth process, having different growth rates for different oxide mask widths, results in the formation of alignment marks 203' (Figure 6B) on the top surface of the regrowth of the p-region of the laser tip. Figure 6B shows a cross-sectional view of the finished p-region formed by the regrowth of the p-type confinement/cladding layer 40', where the mask is removed between the p-type confinement/cladding layer 40' and the n-type confinement/cladding layer 40, leaving the active region 101 under the first oxide mask and the wider section 112' of the active layer (400) under the second oxide mask (402'). Although not shown in this cross-sectional view, it should be noted that the active region 101 has a long length extending in the longitudinal y-direction (perpendicular to the cross-section) from the front to the back of the laser tip, while the shorter section 112 has a simply short length in the longitudinal y-direction. The upper surface of the finished p-region in Figure 6B includes a profile with a relatively flattened region 411 across the previously placed first oxide mask, resulting in the formation of an active region 101 due to a more uniform growth rate of the neighboring p-type confinement/cladding layer 40', and also includes a small hill region 443 near a short-length valley-like depression region 203' across the previously placed second oxide mask, resulting in the formation of a wider section 112' of the active layer due to a faster growth rate of the neighboring p-type confinement/cladding layer 40'.

Ultimately, since the p-region of the laser tip is formed after the final growth of the formation of the p-region having an upper surface, the raised-up region 203 or the valley-like recessed region 203' is formed to be higher than the surrounding shallow bunker region 413 or lower than the surrounding hill region 443, becoming the first alignment mark 203 or 203' on the upper surface of the p-region, as seen in Figure 1. Optionally, the first alignment mark 203 (203') has a lateral position relative to the projection line of the active region 101 on the upper surface of the p-region, which is the same as the previously positioned second oxide mask 402 relative to the first oxide mask 401. Since the oxide masks can be positioned with submicron precision in their lateral position, the first alignment mark 203 (203') formed on the laser tip has the same submicron precision that can be used to achieve the desired lateral alignment for laser flip-chip bonding to a silicon photonics chip. Optionally, another first alignment mark having similar raised/valley-like regions may be formed symmetrically on the opposite side of the upper surface of region p, at equal intervals d from the projection line of the active region.

Figures 5A to 5D are schematic diagrams illustrating a method for forming lateral alignment marks on a laser tip according to an embodiment of the present invention. These figures are merely examples and should not unduly limit the scope of the claims herein. Those skilled in the art will recognize many variations, alternatives, and modifications. In a particular embodiment, the method includes the step of placing a first oxide mask 401 over an active layer 400 on which an active region 101 (Figure 1) is formed, and a second oxide mask 402 with a second width w2 over the active layer 400 on which alignment marks are formed. Optionally, the oxide layer is deposited on top of the active layer 400. Patterning/lithography is performed on the oxide layer to define a first mask 401 having a first width w1 (and a first length extending in the longitudinal y direction from the front position to the back position) and a second mask 402 having a second width w2 (and a second length of about 1 μm or less parallel to the first length). Optionally, the first width w1 and the second width w2 are configured to be separated by a distance s with submicron precision, and to have a difference of 1 μm and 5 μm in their lateral positions. Optionally, an oxide etching process is performed to result in the formation of the first oxide mask 401 and the second oxide mask 402 (see Figure 5A).

Furthermore, the method includes mesa etching to remove the unmasked active layer 400, including the excess portion of the n-type confinement/cladding layer 40 beneath the active layer 400, where gaps 421, 422, 423 are formed around the oxide mask (see Figure 5B). The method further includes the step of forming current-blocking layers 431, 432, 433 in those gaps 421, 422, 423, as shown in Figure 5C. Optionally, the current-blocking layers 431, 432, or 433 are fabricated from reverse-biased p-n junction layers (e.g., a p-type InP layer first, then an n-type InP layer). Optionally, the current-blocking layers 431, 432, or 433 may be p-n-i-n structures or Fe-doped insulating materials. The reverse-biased p-n junctions block the flow of current from the sides. Current flows only from the active region where the reverse-biased p-n junctions are not present. These current-blocking layers induce a regrowth enhancement effect, causing different growth rates around the oxide mask depending on the width of the oxide mask. Optionally, a faster regrowth rate is induced in the region above the current-blocking layer rather than above the second current-blocking layer. Optionally, the method includes removing the first and second oxide masks, leaving an active region 101 having a first length and a narrower second section of the active layer 112 having a shorter second length.

Furthermore, the method includes a step of performing a regrowth process to add a (p-type) confinement/cladding layer to the structure of Figure 5C after the oxide mask has been removed. The regrowth process includes a step of depositing a p-type InP-based material using MOCVD to grow a p-region 40' of the laser tip having different growth rates than the region induced by the current-blocking layer, around the periphery of the active region 101 and around the narrower second section of the active layer 112. Optionally, the growth rate of the InP-based material is made lower around the narrower second section of the active layer 112, resulting in a shallow bunker region 413, with a small hill region 203 just above the narrower second section of the active layer 112. The region above the active region 101 grows at a relatively uniform rate (faster than the shallow bunker region 413), resulting in a relatively flattened region 411. Furthermore, the method includes a step of performing final growth to complete the formation of the p-region 40' having an upper surface comprising a relatively flat region 411 for covering the active region 101 and a raised region 203 having a shorter longitudinal length over a narrower second section of the active layer 112. On the upper surface of the p-region 40', the raised region 203 becomes the first alignment mark. Optionally, another raised region with a similar structure can be formed on the opposite side by positioning a third oxide mask at an opposite site having an equal lateral distance s to the first oxide mask. Thus, optionally, the first alignment marks formed on the laser tip may be a pair of alignment marks having symmetrical lateral positions with respect to the active region. Optionally, the lateral positions of these alignment marks may be determined with submicron precision on one side or symmetrically on two sides of the active region of the laser tip. Optionally, these alignment marks may be formed on the upper surface of either the p-region or the n-region, depending on the manufacturing process settings.

Optionally, one or two first alignment marks formed on the laser tip as shown above can be used to laterally align the laser for flip-chip bonding to the chip site on the silicon photonics chip, using one or two corresponding second alignment marks formed on the (recessed) surface where the chip site is designed (see Figure 1). The second alignment marks on the silicon photonics chip (or its recessed surface) can be formed in many ways with submicron precision to satisfy the requirements for passive alignment between the active region and the waveguide port.

In another embodiment, the laser tip is formed using another alignment feature configured to ensure that the laser tip is properly positioned along its longitudinal direction (along the active region) by identifying the front surface of the tip body. Figure 7 is a schematic top view showing a method for forming a thin metal film to identify the front surface of a laser tip according to an embodiment of the present invention. This figure is merely an example and should not unduly limit the claims herein. Those skilled in the art will recognize many variations, alternatives, and modifications. As shown in the simplified figure, two adjacent tip dies are shown on a wafer for fabricating laser tips. Referring to die 1, which is nearly completed in the manufacturing process, the laser tip of die 1 includes all the features shown in Figure 1, including a p region 103, an n region 105, an active region 101 embedded between the p region and the n region, two vertical stoppers 201, and a pair of first alignment marks 203 formed on the upper surface of the p region 103. Furthermore, the laser tip of die 1 also includes a thin metal film 205 formed on the upper surface of the p region 103. Optionally, a thin metal film 205 may be formed in the same process as forming the patterned p-metal on the upper surface of the p-region 103, which is configured to form electrical contact with the laser chip. In particular, die 1 and die 2 are still separate entities on the wafer. The thin metal film 205 is patterned and formed by wafer processing across a boundary line 107 that is perpendicular to the active region 101 between die 1 and die 2. At the end of wafer processing for forming the laser chip, a dicing process is performed to cut the wafer through the boundary line with the covered thin metal film to separate die 1 from die 2 in order to obtain each individual laser chip. The dicing process automatically creates cleaved edges and facets of the thin metal film for each of the two laser chip bodies. Therefore, a laser chip is obtained having a front surface 107 that shares a cleaved edge with a thin metal film 205. When the laser chip is flip-bonded to a silicon photonics chip, the cleaved edge is automatically designated as an alignment feature that identifies the front surface 107 for optical alignment along the longitudinal direction.

The above description is a complete description of a particular embodiment, but various modifications, alternative structures, and equivalents may be used. Therefore, the above description and examples should not be construed as limiting the scope of the invention as defined by the appended claims.

Claims (22)

A laser chip for flip-chip bonding in a silicon photonics chip having a 3D passive alignment feature,
A chip body made from p-region and n-region in the vertical direction, extending from the front to the back in the longitudinal direction,
A pair of first vertical stoppers are formed on the outer sides of the chip body, respectively, based on the wider width of the n region , wherein the pair of first vertical stoppers are stopped or joined to a pair of second vertical stoppers formed on the silicon photonics chip ,
A linear active region extending from the front surface to the back surface in the longitudinal direction is embedded in the chip body between the p region and the n region in the vertical direction,
A first longitudinal alignment mark is formed on the upper surface of the p region near the front surface, at a lateral distance defined with submicron precision with respect to the vertical projection line of the active region on the upper surface of the p region,
A laser tip comprising a thin metal film on the upper surface of the p region having a cleaved edge shared with the front surface. The laser chip according to claim 1, wherein the cleaved edge of the thin metal film is used to identify the front surface for determining the longitudinal alignment between the laser chip and the silicon photonics chip. The pair of first vertical stoppers are joined to the pair of second vertical stoppers formed on the silicon photonics chip including the waveguide.
The p region is bonded to the surface of the silicon photonics chip.
The laser chip according to claim 1 or 2, wherein when the end faces of the pair of first vertical stoppers are joined to the end faces of the pair of second vertical stoppers and the p region is joined to the surface of the silicon photonics chip, the height of the active region from the surface of the silicon photonics chip is set to be lower than the height of the waveguide from the surface of the silicon photonics chip. The laser tip according to any one of claims 1 to 3, wherein the first alignment mark in the longitudinal direction is alternatively formed on the upper surface of the n region near the front surface, at a lateral distance defined with submicron precision with respect to the vertical projection line of the active region on the upper surface of the n region. A laser chip for flip-chip bonding in a silicon photonics chip having a 3D passive alignment feature,
A chip body made from p-region and n-region in the vertical direction, extending from the front to the back in the longitudinal direction,
Based on the wider width of the n region, a pair of first vertical stoppers are formed on the outer sides of the chip body,
A linear active region extending from the front surface to the back surface in the longitudinal direction is embedded in the chip body between the p region and the n region in the vertical direction,
A first longitudinal alignment mark is formed on the upper surface of the p region near the front surface, at a lateral distance defined with submicron precision with respect to the vertical projection line of the active region on the upper surface of the p region,
A thin metal film on the upper surface of the p region having a cleaved edge shared with the front surface,
Equipped with,
A laser chip having a chip site on its surface, each of the pair of first vertical stoppers is defined by a first stop surface perpendicular to the active region, which is design-dependent, and each of the pair of second vertical stoppers is defined by a pair of second vertical stoppers defined by a second stop surface perpendicular to the waveguide port located at a height above the surface of the silicon photonics chip, wherein the active region is set to be 0.5 μm to 0.7 μm lower than the height of the waveguide port when the laser chip is flipped so that the first stop surface joins with the second stop surface and the p region is joined to the chip site on the surface via solder material . The laser chip according to any one of claims 1 to 5 , wherein the active region has a heterojunction structure based on one or more compound semiconductors InAsP, GaInNAs , GaInAsP, GaInAs , and AlGaInAs , or a combination thereof. The laser chip according to any one of claims 1 to 6 , wherein the p region and the n region each have a p-type or n-type InP-based compound semiconductor. A method for forming a laser chip for flip-chip bonding in a silicon photonics chip having a 3D passive alignment feature,
A step of forming a chip body having a linearly shaped active region that extends from the front to the back in the longitudinal direction, embedded between the p region and the n region in the vertical direction,
The steps include forming a pair of first vertical stoppers positioned on the outer sides of each of the two sides of the chip body based on the wider width of the n region,
The steps include forming a first longitudinal alignment mark on the upper surface of the p region near the front surface, at a lateral distance defined with submicron precision with respect to the vertical projection line of the active region on the upper surface of the p region,
A step of forming a thin metal film on the upper surface of the p region having a cleaved edge shared with the front surface.
Equipped with,
The first alignment mark has one line feature on the upper surface of the p region,
The step of forming the first alignment mark is:
A step of forming the line feature via a regrowth process using a second width alignment oxide mask placed on the active layer, wherein the first alignment oxide mask is positioned at a lateral distance defined with submicron precision relative to a first width active region oxide mask placed on the same active layer to form the active region, and the first width differs from the second width by 1 μm to 5 μm.
A method having A method for forming a laser chip for flip-chip bonding in a silicon photonics chip having a 3D passive alignment feature,
A step of forming a chip body having a linearly shaped active region that extends from the front to the back in the longitudinal direction, embedded between the p region and the n region in the vertical direction,
The steps include forming a pair of first vertical stoppers positioned on the outer sides of each of the two sides of the chip body based on the wider width of the n region,
The steps include forming a first longitudinal alignment mark on the upper surface of the p region near the front surface, at a lateral distance defined with submicron precision with respect to the vertical projection line of the active region on the upper surface of the p region,
A step of forming a thin metal film on the upper surface of the p region having a cleaved edge shared with the front surface.
Equipped with,
The first alignment mark has two line features on the upper surface of the p region,
The step of forming the first alignment mark is:
A step of forming the two line features via a regrowth process using two alignment oxide masks of a second width arranged on an active layer, wherein the two alignment oxide masks are positioned at two locations with submicron precision at a lateral distance on each side of a first width active region oxide mask arranged on the same active layer to form the active region, and the first width differs from the second width by 1 μm to 5 μm.
A method having The step of forming the thin metal film includes the step of forming the thin metal film in the same wafer process as forming the contact metal layer on the upper surface of the p region.
The method according to claim 8 or 9. The wafer process further comprises the steps of forming the thin metal film on the upper surface of the p region across the boundary of two adjacent laser chip dies, and dicing the wafer through the boundary to obtain the cleaved edges in order to cleave the thin metal film and form the front surface that coincides with the cleaved edges of the two adjacent laser chip dies.
The method according to claim 10, including the method described in claim 10. A method for bonding a laser chip to a silicon photonics chip, wherein the method is
A laser chip comprising the steps of: forming a chip body having an active region that extends from the front to the back in the longitudinal direction, embedded between a p region and an n region in the vertical direction; forming a pair of first vertical stoppers positioned on the outer sides of each of the chip body; forming a first alignment mark in the longitudinal direction on the upper surface of the p region near the front surface, at a lateral distance defined with submicron precision with respect to the vertical projection line of the active region on the upper surface of the p region; and forming a thin metal film having a cleaved edge that coincides with the front surface.
A step of setting a chip site on the concave surface of a silicon photonics chip having a waveguide port positioned at a height above the concave surface, wherein the chip site includes a pair of second vertical stoppers standing on the concave surface and a second alignment mark on the concave surface, set at a lateral distance defined with submicron precision with respect to the vertical projection line of the waveguide port on the concave surface.
With the upper surface of the p region of the laser tip facing the chip site on the concave surface, the laser tip is joined to the chip site on the concave surface via a solder material using a pair of first vertical stoppers, each of which is joined to the pair of second vertical stoppers to determine the vertical alignment between the active region and the waveguide port.
The step of determining the lateral alignment by aligning the first alignment mark with the second alignment mark,
A method comprising the step of determining longitudinal alignment by identifying the front surface based on the reflective contrast at the cleaved edge of the thin metal film. The method according to claim 12 , wherein the step of setting the chip site comprises defining a second stop surface with respect to each of the pair of second vertical stoppers above the concave surface with submicron precision relative to the waveguide port. The method according to claim 13, wherein forming a pair of first vertical stoppers comprises defining a first stop surface for each of the pair of first vertical stoppers with respect to the active region of the laser chip, in accordance with the defined second stop surface for each of the pair of second vertical stoppers above the concave surface of the silicon photonics chip . The method according to claim 14, wherein defining the first stopping surface for each of the pair of first vertical stoppers is to position the etching stopping material at a position having a vertical distance defined with respect to the active region and a lateral distance defined outward from each of the p regions of the chip body. The method of claim 15, wherein defining the first stopping surface for each of the pair of first vertical stoppers further includes setting the position of the active region of the laser tip about 0.5 μm to 0.7 μm vertically below the height of the waveguide port, based on the defined vertical distance of the first stopping surface to the active region and the second stopping surface above the concave surface as the first stopping surface joins with the second stopping surface. The method according to claim 16, wherein setting the position of the active region approximately 0.5 μm to 0.7 μm vertically below the height of the waveguide port doubles the tolerance window for vertical alignment when flip-bonding the laser chip to the chip site on the concave surface of the silicon photonics chip via the solder material under a coupling loss limitation of < 3 dB. The formation of the first alignment mark is a step of forming an active layer in the n region of the laser chip, then arranging a first oxide mask of a first width over the active layer in which the active region is formed, and a second oxide mask of a second width over the active layer in which the first alignment mark is formed laterally with submicron precision relative to the first oxide mask, wherein the first width is about 1 μm to 5 μm larger than the second width; performing mesa etching to remove most of the active layer except for the active region under the first oxide mask and the narrower second section of the active layer under the second oxide mask; and forming a first current blocking layer around the active region and a second current blocking layer around the narrower second section of the active layer. The method according to any one of claims 12 to 17, comprising: a step in which a faster regrowth rate is induced in the region surrounding the first oxide mask rather than in the region surrounding the second oxide mask; a step in which the first oxide mask and the second oxide mask are removed; a step in which regrowth of the p region of the laser chip is performed at a faster growth rate around the active region and at a slower growth rate around the narrower second section of the active layer; and a step in which final growth is performed to complete the formation of the p region having an upper surface including a relatively flat region above the active region and a raised feature having a shorter longitudinal length above the narrower second section of the active layer, wherein the raised feature becomes the first alignment mark. Forming the first alignment mark is a step of forming an active layer in the n region of the laser chip, then placing a first oxide mask of a first width over the active layer in which the active region is formed, and a second oxide mask of a second width over the active layer in which the first alignment mark is formed laterally with submicron precision relative to the first oxide mask, wherein the first width is about 1 μm to 5 μm smaller than the second width; performing mesa etching to remove most of the active layer except for the active region under the first oxide mask and the wider second section of the active layer under the second oxide mask; and forming a first current blocking layer around the active region and a second current blocking layer around the wider second section of the active layer. The method according to any one of claims 12 to 17, comprising the steps of: having a slower regrowth rate induced above the first current-blocking layer than above the second current-blocking layer; removing the first oxide mask and the second oxide mask; performing regrowth of the p region of the laser chip at a slower growth rate around the active region and a faster growth rate around the wider second section of the active layer; and performing final growth to complete the formation of the p region having an upper surface including a relatively flat region above the active region and a valley -shaped feature having a shorter longitudinal length above the wider second section of the active layer, wherein the valley -shaped feature becomes the first alignment mark. The method according to any one of claims 12 to 19, wherein forming the thin metal film includes the step of performing a wafer process to form a metal contact layer on the upper surface of the p region including the thin metal film formed across the boundary of two adjacent laser chip dies , the wafer process further includes the step of cleaving the thin metal film to obtain the cleaved edges and performing dicing through the boundary to form the front surface that coincides with the cleaved edges of the two laser chips. A laser chip for flip-chip bonding in a silicon photonics chip having a passive alignment feature,
A chip body made from p-region and n-region in the vertical direction, extending from the front to the back in the longitudinal direction,
A pair of first vertical stoppers are formed on the outer sides of the chip body , the pair of first vertical stoppers are stopped or joined to a pair of second vertical stoppers formed on the silicon photonics chip ,
A linear active region extending from the front surface to the back surface in the longitudinal direction is embedded in the chip body between the p region and the n region in the vertical direction,
A first longitudinal alignment mark is formed on the upper surface of the p region near the front surface, at a lateral distance defined with submicron precision with respect to the vertical projection line of the active region on the upper surface of the p region ,
A thin metal film on the upper surface of the p region having a cleaved edge shared with the front surface,
A laser chip equipped with this feature. A laser chip for flip-chip bonding in a silicon photonics chip having a passive alignment feature,
A chip body made from p-region and n-region in the vertical direction, extending from the front to the back in the longitudinal direction,
A linear active region extending from the front surface to the back surface in the longitudinal direction is embedded in the chip body between the p region and the n region in the vertical direction,
A first longitudinal alignment mark is formed on the upper surface of the p region near the front surface, at a lateral distance defined with submicron precision with respect to the vertical projection line of the active region on the upper surface of the p region,
The upper surface of the p region having a cleaved edge shared with the front surface comprises a thin metal film ,
The cleaved edge of the thin metal film is used to identify a front surface for determining the longitudinal alignment between the laser tip and the silicon photonics tip, in a laser tip.