JP7849222B2 - Circuit using three-dimensional wiring and method for fabricating the same - Google Patents

Description

This invention relates to a circuit for driving TFTs (Thin Film Transistors) using three-dimensional wiring, and a method for manufacturing the same.

Conventionally, tiling displays, which are constructed by arranging multiple panel units, are known (see, for example, Non-Patent Documents 1 and 2). Tiling displays have the advantage of being able to achieve various sizes, shapes, and aspect ratios.

However, with typical panel units, signal wiring and other components must be formed around the periphery, making it difficult to eliminate the bezel. Therefore, when panel units are arranged in a tiled configuration to form a tiled display, the bezels create noticeable seams between the panel units, which is a problem.

To solve this problem, a structure is envisioned that uses three-dimensional wiring through through-holes to route signal wiring and other components to the back side of the panel unit. This structure eliminates the need to form signal wiring and other components around the periphery of the panel unit, enabling a bezel-less panel unit and allowing for seamless, inconspicuous tiling.

As a key technology for realizing such bezel-less panel units, a TFT (three-dimensional wiring TFT) has been developed that uses an ultra-thin polyimide (PI) film substrate and can be driven by three-dimensional wiring through through-holes on the back side of the film substrate (see, for example, Non-Patent Document 3).

Figure 6 is a schematic diagram showing the cross-sectional structure of a circuit including a TFT that can be driven by conventional three-dimensional wiring. This circuit 100 has a laminated structure in which a base film 105, insulating film 104, and protective film 102 are formed on the front side of a film substrate 101, and a planarization layer 106 is formed on the back side.

Furthermore, in this circuit 100, a gate electrode 107 is formed above the underlayer 105, a source electrode 108 and a drain electrode 109 are formed above the insulating film 104 and the semiconductor layer 103, and back surface electrodes 110-1, 110-2, and 110-3 are formed below the planarization layer 106.

Furthermore, this circuit 100 is provided with through-holes 111-1, 111-3, and 111-2, which pass through the insulating film 104, the undercoat 105, the film substrate 101, and the planarization layer 106.

Within the through-hole 111-1, a three-dimensional wiring 112-1 is formed for electrically connecting the drain electrode 109 and the back electrode 110-1. Within the through-hole 111-2, a three-dimensional wiring 112-2 is formed for electrically connecting the gate electrode 107 and the back electrode 110-2. Within the through-hole 111-3, a three-dimensional wiring 112-3 is formed for electrically connecting the source electrode 108 and the back electrode 110-3.

The back electrodes 110-1, 110-2, and 110-3 are collectively referred to as back electrode 110, the through holes 111-1, 111-2, and 111-3 are collectively referred to as through holes 111, and the three-dimensional wiring 112-1, 112-2, and 112-3 are collectively referred to as three-dimensional wiring 112.

Figure 7 shows the arrangement of each element constituting a conventional pixel circuit. It illustrates the arrangement of each element as viewed from the surface side of the film substrate 101 when the circuit 100 shown in Figure 6 is applied to a pixel circuit for driving a light-emitting element.

This pixel circuit 100' is equipped with three light-emitting elements 57. A switching TFT 50, a driving TFT 51, a holding capacitor 52, and a signal line 56 are formed corresponding to each of the three light-emitting elements 57. A common scan line 53 and ground line 54 are formed for all three light-emitting elements 57. Vias 60 are formed on the electrodes of the holding capacitor 52, the driving TFT 51, and the light-emitting elements 57.

Referring to Figures 6 and 7, in the pixel circuit 100', in order to drive the switching TFT 50 and driving TFT 51 (corresponding to the TFTs shown in the dotted frame in Figure 6) and the light-emitting element 57 formed on the surface side of the film substrate 101 using the three-dimensional wiring 112, it is necessary to electrically connect the scanning line 53, ground line 54, power line 55, and signal line 56 to the corresponding back surface electrodes 110 via the three-dimensional wiring 112 formed in the through-hole 111 that penetrates from the back side to the front side of the film substrate 101.

Here, the scan line 53, ground line 54, power line 55, and signal line 56 are surface-side wiring formed on the surface side of the film substrate 101, while the back electrode 110 is back-side wiring formed on the back side of the film substrate 101.

D. Nakamura et al., SID 2015 DIGEST, pp.1031-1034 (2015) G.Biwa et al., SID 2019 DIGEST, pp.121-124 (2019) H.Tsuji et al., Proceedings of the 28th International Display Workshops (IDW '21), p.143 (2021)

As described above, in the pixel circuit 100' shown in Figure 7, in order to drive the switching TFT 50, the driving TFT 51, and the light-emitting element 57 from the back side of the film substrate 101, it is necessary to electrically connect the front-side wiring and the back-side wiring using the three-dimensional wiring 112 formed in the through-hole 111 shown in Figure 6.

Here, when a display is constructed using multiple pixel circuits 100' as shown in Figure 7, the area per pixel decreases as the display resolution increases. Consequently, to reduce the area per pixel, it is necessary to narrow the width of the scan lines 53, ground lines 54, power lines 55, and signal lines 56 within the pixel circuit 100'.

However, narrowing the width of these wires can lead to electrical connection problems between them and the three-dimensional wiring 112, resulting in increased contact resistance. This problem is particularly likely to occur with signal lines 56, as their width is narrower than that of scan lines 53, ground lines 54, and power lines 55.

Figure 8 illustrates the width of the signal line 56 and the width of the through-hole 111 in the conventional pixel circuit 100' shown in Figure 7. The width (diameter) of the through-hole 111 is constant regardless of the display resolution (generally 10 μm or less), and here it is set to 10 μm.

(1) shows an example where the width of signal line 56-1 is greater than or equal to the diameter of the through hole 111. (2) shows an example where, as the display resolution increases, the wiring width of signal line 56-1 shown in (1) becomes narrower, that is, the width of signal line 56-2 is narrower than the diameter of the through hole 111.

As shown in (2), if the width of the signal line 56-2 is narrower than the diameter of the through hole 111, an electrical connection failure occurs between the signal line 56-2 and the three-dimensional wiring 112 formed in the through hole 111, resulting in an increase in contact resistance.

Therefore, the present invention was made to solve the aforementioned problems, and its objective is to provide a circuit and a method for manufacturing the same that can suppress the occurrence of electrical connection failures and the increase in contact resistance between the surface wiring and three-dimensional wiring of a film substrate.

To solve the aforementioned problems, the circuit of claim 1 is a circuit for driving a TFT formed on a film substrate using three-dimensional wiring, comprising: surface wiring formed on the surface side of the film substrate; back wiring formed on the back side of the film substrate; three-dimensional wiring formed in a through hole extending from the back side to the surface side of the film substrate for connecting the surface wiring and the back wiring; and the TFT formed on the surface side of the film substrate, driven from the back side of the film substrate by the surface wiring via the three-dimensional wiring, wherein the surface wiring is provided with a contact electrode that is partially widened to be greater than or equal to the width of the through hole in the middle of a strip-shaped longitudinal direction having a width narrower than the through hole when the width of the surface wiring is narrowed in accordance with the increase in resolution of the display configured using the circuit, and the three-dimensional wiring formed in the through hole is connected to the contact electrode.

Furthermore, the circuit according to claim 2 is characterized in that, in the circuit according to claim 1, the width of the contact electrode is set to a predetermined value greater than or equal to the width of the through-hole.

Furthermore, the circuit according to claim 3 is characterized in that, in the circuit according to claim 2, the width of the contact electrode is set to a predetermined value of 10 μm or more.

Furthermore, the circuit according to claim 4 is characterized in that, in the circuit according to claim 1, the contact electrode is formed of a metal multilayer film containing molybdenum.

Furthermore, the circuit of claim 5 is characterized in that, in the circuit of claim 1, the surface wiring is integrally formed from the same material as the contact electrode.

Furthermore, the circuit of claim 6 is characterized in that, in the circuit of claim 1, the surface-side wiring consists of a signal line, a scan line, a power line, and a ground line, and the signal line among the surface-side wiring is equipped with the contact electrode.

Furthermore, the manufacturing method of claim 7 is a method for manufacturing a circuit that drives a TFT formed on a film substrate by three-dimensional wiring, comprising: a first step of forming a base film on the surface side of the film substrate; a second step of forming a metal laminated film on the base film to form the gate electrode, scan line, ground line and power line of the TFT; a third step of forming an insulating film on the surface side of the base film, the gate electrode of the TFT, the scan line, the ground line and the power line; a fourth step of forming a semiconductor layer on the insulating film; a fifth step of forming a metal laminated film on the surface side of the insulating film and the semiconductor layer to form the source electrode and drain electrode of the TFT and the signal line; a sixth step of forming a protective film on the surface side of the insulating film, the semiconductor layer, the source electrode and drain electrode of the TFT and the signal line; and the film The circuit comprises a seventh step of forming a planarization layer on the back side of the substrate, an eighth step of forming a through hole extending from the back side to the front side of the film substrate, and a ninth step of forming the three-dimensional wiring in the through hole and forming back wiring for connecting to the gate electrode, source electrode and drain electrode of the TFT, the scan line, the ground line, the power line, and the signal line via the three-dimensional wiring, wherein the fifth step, when forming the signal line, forms a contact electrode that is partially widened to be greater than or equal to the width of the through hole in the middle of a strip-shaped longitudinal section having a width narrower than the through hole when the width of the signal line is narrowed in accordance with the high resolution of the display configured using the circuit, and the ninth step connects the three-dimensional wiring formed in the through hole to the contact electrode.

As described above, according to the present invention, it is possible to suppress the occurrence of electrical connection failures and the increase in contact resistance between the surface wiring and three-dimensional wiring of the film substrate.

(1) is a diagram showing an example of the arrangement of each element in a pixel circuit according to an embodiment of the present invention, as viewed from the surface side of the film substrate. (2) is a magnified view of the contact electrode formed on the signal line. (1) is a diagram showing an example of the arrangement of each element in a pixel circuit according to an embodiment of the present invention, as viewed from the back side of the film substrate. (2) is a magnified view of the contact electrodes and through holes formed on the signal lines in a pixel circuit according to an embodiment of the present invention. (3) is a magnified view of the signal lines and through holes in a conventional pixel circuit. This figure illustrates an example of the process for manufacturing a pixel circuit according to an embodiment of the present invention. This diagram explains the continuation of Figure 3. This figure shows a micrograph of an embodiment of the pixel circuit. This is a schematic diagram showing the cross-sectional structure of a circuit including a TFT that can be driven by conventional three-dimensional wiring. This diagram shows the arrangement of each element that makes up a conventional pixel circuit. This diagram illustrates the width of signal lines and through-holes in a conventional pixel circuit.

The embodiments for carrying out the present invention will be described in detail below with reference to the drawings. The present invention is a circuit that drives a TFT formed on the surface side of a film substrate by three-dimensional wiring connecting the surface-side wiring and the back-side wiring, characterized in that the surface-side wiring is provided with contact electrodes whose width is partially widened, and the three-dimensional wiring is connected to the contact electrodes.

This allows the width of the surface-side wiring to be partially wider than the width of the through-hole where the three-dimensional wiring is formed, in the contact electrodes provided on the surface-side wiring. Therefore, it is possible to suppress the occurrence of electrical connection failures and the increase in contact resistance between the surface-side wiring and the three-dimensional wiring.

[Pixel circuit configuration]
First, the configuration of the pixel circuit according to an embodiment of the present invention will be described. Figure 1(1) is a diagram showing an example of the arrangement of each element in the pixel circuit according to an embodiment of the present invention as viewed from the surface side of the film substrate 101, and shows the circuit formed on the surface side of the film substrate 101. Figure 1(2) is a magnified view of the contact electrode formed on the signal line.

Note that Figure 1(1) shows only the components related to the present invention, and components unrelated to the invention are omitted. The same applies to Figure 2(1), which will be described later.

This pixel circuit 1, similar to the circuit 100 shown in Figure 6, has a laminated structure in which a base film 105, insulating film 104, and protective film 102 are formed on the front side of a film substrate 101, and a planarization layer 106 is formed on the back side. It comprises a switching TFT 50, a driving TFT 51, a holding capacitor 52, front-side wiring (scanning line 53, ground line 54, power line 55, and signal line 10), a light-emitting element 57, back-side wiring (back electrode 110), and three-dimensional wiring 63 formed in the through-hole 62.

Note that Figure 1(1) shows an example of the arrangement of each element as viewed from the front side of the film substrate 101; therefore, the back-side wiring (back electrode 110), the three-dimensional wiring 63 formed in the through-hole 62, etc., are not shown.

The pixel circuit 1 has three light-emitting elements (LEDs in this example) 57 on the surface side of the film substrate 101. Each of the three light-emitting elements 57 is provided with a switching TFT 50 and a driving TFT 51 corresponding to the TFTs (dotted outlines) shown in Figure 6, along with a holding capacitor 52 and a signal line 10. Furthermore, the pixel circuit 1 has a common scanning line 53, ground line 54, and power line 55 formed for all three light-emitting elements 57.

The central squares of the switching TFT 50 and the driving TFT 51 represent the semiconductor layer 103. The signal line 10 is connected to the source electrode 108 of the switching TFT 50, and the scan line 53 also serves as the gate electrode 107 of the switching TFT 50.

Furthermore, vias 60 are formed on the electrodes of the holding capacitance 52, the driving TFT 51, and the light-emitting element 57. The vias 60 on the driving TFT 51 electrically connect the ground line 54 to the electrodes of the driving TFT 51, and the vias 60 on the light-emitting element 57 electrically connect the power line 55 to the electrodes of the light-emitting element 57.

In the pixel circuit 1, in order to drive the switching TFT 50, the driving TFT 51, and the light-emitting element 57 provided on the surface side of the film substrate 101, the surface-side wiring and the back-side wiring are electrically connected by three-dimensional wiring 63 (see Figure 2, described later) formed in a through-hole 62 that penetrates from the back side to the front side of the film substrate 101.

Furthermore, in the pixel circuit 1, a contact electrode 11 is integrally formed at a predetermined location along the longitudinal direction of the strip-shaped signal line 10. In other words, the signal line 10 is equipped with the contact electrode 11. Also, as shown in Figure 1(2), the contact electrode 11 has a protrusion 61 that partially widens the width of the signal line 10. The contact electrode 11 is an electrode for three-dimensional wiring 63 (not shown).

Although not shown in Figure 1(1), the film substrate 101 used in the pixel circuit 1 is, for example, a polyimide (PI) substrate, and various resin (plastic) substrates can be used depending on the application.

Figure 2(1) shows an example of the arrangement of each element in the pixel circuit 1 according to the embodiment of the present invention shown in Figure 1, as viewed from the back side of the film substrate 101, and shows the circuit formed on the back side of the film substrate 101. Figure 2(2) is an enlarged view of the contact electrode 11 and through-hole 62 formed on the signal line 10 in the pixel circuit 1 according to the embodiment of the present invention, and Figure 2(3) is an enlarged view of the signal line 56 and through-hole 111 in the conventional pixel circuit 100' shown in Figure 7.

Note that the arrangement example shown in Figure 2(1) is viewed from the back side of the film substrate 101, so the left and right orientation of each element is reversed compared to the arrangement example shown in Figure 1(1). Also, the back electrode 110 (see Figure 6) formed on the back side of the film substrate 101 is omitted. The three-dimensional wiring 63 formed in the through hole 62 is connected to the back electrode 110.

In the pixel circuit 1, the signal line 10 is provided with a contact electrode 11 whose width is partially widened. The contact electrode 11 is integrally formed with the signal line 10 at a predetermined location along the longitudinal direction of the strip-shaped signal line 10. As shown in Figure 2(2), the contact electrode 11 has a protrusion 61 that partially widens the signal line 10, and a three-dimensional wiring 63 formed in a through-hole 62 is connected to it.

In the conventional technology shown in Figure 2(3), the width of the signal line 56 is narrower than the width of the through-hole 111. In contrast, in the embodiment of the present invention shown in Figure 2(2), the width of the signal line 10 in the contact electrode 11 is greater than or equal to the width of the through-hole 62.

Furthermore, similar to the signal line 10, the strip-shaped scan line 53, ground line 54, and power line 55 are connected to the three-dimensional wiring 63 formed in the through-hole 62.

This allows the signal lines 10, scan lines 53, ground line 54, and power lines 55 on the front side of the film substrate 101 to be electrically connected to the back electrode 110 (not shown) on the back side of the film substrate 101 via three-dimensional wiring 63 formed in the through-hole 62. This enables the switching TFT 50, driving TFT 51, and light-emitting element 57 on the front side of the film substrate 101 to be driven.

[Method for fabricating pixel circuit 1]
Next, a method for manufacturing the pixel circuit 1 according to an embodiment of the present invention will be described. Figure 3 is a diagram illustrating an example of the manufacturing process for the pixel circuit 1 according to the embodiment of the present invention shown in Figures 1 and 2, and Figure 4 is a diagram illustrating a continuation of Figure 3.

First, a 10 μm thick PI film substrate 101 is formed on the first glass substrate (first glass substrate). Then, a 50 nm thick silicon nitride film is formed on the film substrate 101 (on the surface side of the film substrate 101) by sputtering (step P301).

Next, a 140 nm thick metal multilayer film composed of molybdenum alloy and aluminum is formed on the undercoat 105 (on the surface side) by sputtering. Then, the gate electrode 107 of the switching TFT 50, the gate electrode 107 of the driving TFT 51, the scan line 53, the ground line 54, and the power line 55 are formed by a photolithography process (step P302).

Next, a 200 nm thick insulating film 104, composed of silicon oxide, is formed on the base film 105, the gate electrode 107 of the switching TFT 50, the gate electrode 107 of the driving TFT 51, the scan line 53, the ground line 54, and the power line 55 (on the surface side) using a sputtering apparatus (step P303).

Next, a 30 nm thick semiconductor layer (active layer) 103 composed of In-Sn-Zn-O (ITZO) is deposited on the insulating film 104 using a sputtering apparatus, and a pattern is formed by a photolithography process (step P304).

Next, a heat treatment is performed using a hot plate at 300°C for 1 hour in air (step P305) to form vias 60 by dry etching (step P306).

Next, a 170 nm thick metal multilayer film composed of gold, molybdenum alloy, and aluminum is formed on the insulating film 104 and the semiconductor layer 103 (on the surface side) by sputtering. Then, the source electrode 108 and drain electrode 109 of the switching TFT 50, the source electrode 108 and drain electrode 109 of the driving TFT 51, the signal line 10 (including the contact electrode 11), and the contact electrode for the light-emitting element 57 are formed by a photolithography process (step P401).

Here, in step P401, the contact electrode 11 is formed as part of the signal line 10, simultaneously and integrally with the signal line 10.

Next, a protective film 102 is formed on the insulating film 104, the semiconductor layer 103, the source electrode 108 and drain electrode 109 of the switching TFT 50, the source electrode 108 and drain electrode 109 of the driving TFT 51, the signal line 10, and the contact electrode for the light-emitting element 57 (on the surface side) using a coating-compatible organic film. Then, a heat treatment is performed in air at 150°C for 1 hour (step P402).

Next, a second glass substrate (second glass substrate) is attached to the protective film 102 using an adhesive layer (fix film) (step P403). Then, the first glass substrate is peeled off by laser lift-off (step P404).

Next, after peeling off the first glass substrate in step P404, a planarization layer 106 is formed on the back side of the film substrate 101 using a coating-compatible organic film, and a heat treatment is performed in air at 150°C for 1 hour (step P405).

Next, through holes 62 are formed by dry etching (step P406), and three-dimensional wiring 63 and back-side wiring (back-side electrodes 110) made of molybdenum alloy are formed (step P407).

Finally, the second glass substrate and the adhesive layer (fix film) are peeled off (step P408).

This allows for the fabrication of a pixel circuit 1 using three-dimensional wiring 63. In step P406, the through-holes 62 may be formed by wet etching, laser drilling, or other methods in addition to dry etching.

[Examples]
Next, an embodiment of the pixel circuit 1 shown in Figures 1 and 2 will be described. Figure 5 is a micrograph of the embodiment of the pixel circuit 1 shown in Figure 1.

This micrograph shows an example of the arrangement of a pixel circuit 1 fabricated on a 10 μm thick PI film substrate 101, as viewed from the surface side of the film substrate 101, as shown in Figure 1. Note that the surrounding area, including the light-emitting element 57, is omitted from the micrograph and is not part of the image.

The signal line 10 formed on the surface side of the film substrate 101 is composed of a four-layer laminated film, stacked from top to bottom in the following order: 30 nm thick gold, 20 nm thick molybdenum alloy, 100 nm thick aluminum, and 20 nm thick molybdenum alloy.

The width of the signal line 10 (the width of the area excluding the contact electrode 11) is approximately 6 μm, which is narrower than the typical width of the through-hole 62, which is 10 μm.

Furthermore, a contact electrode 11 with a width of approximately 17 μm is formed at a predetermined location along the longitudinal direction of the signal line 10.

This allows the width of the signal line 10 at the contact electrode 11 to be sufficiently wider than the width of the through-hole 62. Therefore, the problems of electrical connection failure between the signal line 10 and the three-dimensional wiring 63 formed in the through-hole 62, and the increase in contact resistance, can be resolved.

Therefore, the three-dimensional wiring 63 ensures a reliable electrical connection between the signal lines 10 on the front surface of the film substrate 101 and the back surface electrodes 110 on the back surface of the film substrate 101.

Furthermore, the width of the contact electrode 11 provided on the signal line 10 must be greater than or equal to the width of the through hole 62 in order to suppress the occurrence of electrical connection failures and the increase in contact resistance. If the width of the through hole 62 is 10 μm, then preferably the width of the contact electrode 11 is 10 μm or greater.

As described above, according to the pixel circuit 1 of the embodiment of the present invention, in a pixel circuit 1 that drives a switching TFT 50, a driving TFT 51, and a light-emitting element 57 formed on the surface side of a film substrate 101, using three-dimensional wiring 63 that connects the back electrode 110, which is the back-side wiring of the film substrate 101, and the signal line 10, scan line 53, ground line 54, and power line 55, a contact electrode 11 is formed in the middle of the signal line 10, which is an electrode for connecting the three-dimensional wiring 63 and partially widens the width of the signal line 10.

This allows the width of the signal line 10 to be partially wider than the width of the through-hole 62 in which the three-dimensional wiring 63 is formed, in the contact electrode 11 provided on the signal line 10.

Therefore, it is possible to suppress the occurrence of electrical connection failures and the increase in contact resistance between the signal line 10 and the three-dimensional wiring 63.

Furthermore, the widths of all the surface-side wirings of the film substrate 101—the signal lines 10, scan lines 53, ground lines 54, and power lines 55—can be made wider than the width of the through-holes 62. Therefore, the three-dimensional wiring 63 ensures a reliable electrical connection between the surface-side and back-side wirings of the film substrate 101.

In other words, the switching TFT 50, driving TFT 51, and light-emitting element 57 formed on the front side of the film substrate 101 can be reliably driven from the back side of the film substrate 101.

Although the present invention has been described above with reference to embodiments, the present invention is not limited to the embodiments described above, and various modifications are possible without departing from the technical concept.

In the above embodiment, an example of a pixel circuit 1 comprising a switching TFT 50, a driving TFT 51, and a light-emitting element 57 was described. However, the present invention is applicable not only to pixel circuits 1 but also to circuits other than pixels. In short, the present invention is applicable to circuits that drive TFTs formed on a film substrate 101 using three-dimensional wiring 63.

Furthermore, in the above embodiment, a contact electrode 11 is formed at a predetermined location along the longitudinal direction of the signal line 10 to partially widen the width of the signal line 10. Alternatively, a contact electrode 11 may be formed at a predetermined location along the longitudinal direction of the scan line 53 to partially widen the width of the scan line 53. Also, a contact electrode 11 may be formed along the ground line 54 to partially widen its width, or along the power line 55 to partially widen its width.

Furthermore, in the above embodiment, as shown in step P401 of Figure 4, the contact electrode 11 is formed simultaneously and integrally with the signal line 10. In this case, the materials of the signal line 10 and the contact electrode 11 are the same: gold, molybdenum alloy, and aluminum.

In contrast, the contact electrode 11 may be formed in a separate process from the signal line 10 and using a different material. Specifically, after forming the signal line 10, the contact electrode 11 is formed using a different material from the signal line 10, at a predetermined location along the longitudinal direction of the signal line 10, so as to have the protrusion 61 shown in Figure 1(2). This results in the formation of a contact electrode 11 with a partially widened width at a predetermined location along the longitudinal direction of the signal line 10.

Furthermore, in the above embodiment, as shown in step P401 of Figure 4, the contact electrode 11 is formed from a metal multilayer film of gold, molybdenum alloy, and aluminum. However, this is just one example, and it may be formed from a multilayer film of other metals containing molybdenum. For example, the contact electrode 11 may be formed from a multilayer film of molybdenum plus one or more metals selected from gold, silver, copper, and aluminum. By including molybdenum, it is possible to form a contact electrode 11 that is resistant to oxidation and has stable properties.

1,100' Pixel circuit 10, 56 Signal line 11 Contact electrode 50 Switching TFT
51 Driving TFT
52 Holding capacitance 53 Scanning line 54 Ground line 55 Power line 57 Light-emitting element 60 Via 61 Protrusions 62, 111 Through holes 63, 112 Three-dimensional wiring 100 Circuit 101 Film substrate 102 Protective film 103 Semiconductor layer 104 Insulating film 105 Underlayment film 106 Planarization layer 107 Token electrode 108 Source electrode 109 Drain electrode 110 Backside electrode

Claims (7)

In a circuit that drives TFTs formed on a film substrate using three-dimensional wiring,
Surface wiring formed on the surface side of the film substrate,
The back side wiring formed on the back side of the film substrate,
The three-dimensional wiring is formed in a through hole that passes from the back side to the front side of the film substrate, and is used to connect the front-side wiring and the back-side wiring.
The film substrate comprises a TFT formed on the surface side and driven from the back side of the film substrate by the surface side wiring via the three-dimensional wiring from the back side wiring,
The circuit is characterized in that the surface wiring has a strip-shaped longitudinal section with a width narrower than the through-hole when the width of the surface wiring is narrowed in accordance with the increase in resolution of the display configured using the circuit, and a contact electrode is provided in the middle of the strip that is partially widened to be greater than or equal to the width of the through-hole , and the three-dimensional wiring formed in the through-hole is connected to the contact electrode. In the circuit described in claim 1,
A circuit characterized in that the width of the contact electrode is set to a predetermined value greater than or equal to the width of the through hole. In the circuit described in claim 2,
A circuit characterized in that the width of the contact electrode is set to a predetermined value of 10 μm or more. In the circuit described in claim 1,
The circuit is characterized in that the contact electrode is formed of a metal multilayer film containing molybdenum. In the circuit described in claim 1,
The circuit is characterized in that the surface wiring is integrally formed from the same material as the contact electrodes. In the circuit described in claim 1,
The surface-side wiring consists of signal lines, scan lines, power lines, and ground lines.
The circuit is characterized in that the signal line among the surface-side wiring is equipped with the contact electrode. In a method for fabricating a circuit that drives TFTs formed on a film substrate by three-dimensional wiring,
The first step is to form an underlayer on the surface side of the film substrate,
A second step involves forming a metal laminated film on the aforementioned underlayer to form the gate electrode, scan line, ground line, and power line of the TFT,
A third step involves forming an insulating film on the surface side of the undercoat, the gate electrode of the TFT, the scanning line, the ground line, and the power line.
A fourth step involves forming a semiconductor layer on the insulating film,
A fifth step involves forming a metal multilayer film on the surface side of the insulating film and the semiconductor layer to form the source electrode and drain electrode of the TFT, as well as the signal line.
A sixth step involves forming a protective film on the surface side of the insulating film, the semiconductor layer, the source electrode and drain electrode of the TFT, and the signal line.
A seventh step involves forming a planarization layer on the back side of the film substrate,
An eighth step involves forming a through hole that runs from the back side to the front side of the film substrate,
The ninth step involves forming the three-dimensional wiring in the through-hole, and forming back-side wiring via the three-dimensional wiring to connect to the gate electrode, source electrode and drain electrode of the TFT, the scan line, the ground line, the power line, and the signal line.
The fifth step is,
When forming the signal line, if the width of the signal line is narrowed in accordance with the increase in resolution of the display configured using the circuit, a contact electrode is formed in the middle of the longitudinal strip, which has a width narrower than the through hole, and is partially widened to be greater than or equal to the width of the through hole .
A manufacturing method characterized in that, by the ninth step, the three-dimensional wiring formed in the through hole is connected to the contact electrode.