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JPS5679451A - Production of semiconductor device - Google Patents
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JPS5679451A - Production of semiconductor device - Google Patents

Production of semiconductor device

Info

Publication number
JPS5679451A
JPS5679451A JP15662279A JP15662279A JPS5679451A JP S5679451 A JPS5679451 A JP S5679451A JP 15662279 A JP15662279 A JP 15662279A JP 15662279 A JP15662279 A JP 15662279A JP S5679451 A JPS5679451 A JP S5679451A
Authority
JP
Japan
Prior art keywords
pattern
resist
formation
film
semiconductor device
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP15662279A
Other languages
Japanese (ja)
Inventor
Masaharu Yorikane
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
CHIYOU LSI GIJUTSU KENKYU KUMIAI
Original Assignee
CHIYOU LSI GIJUTSU KENKYU KUMIAI
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by CHIYOU LSI GIJUTSU KENKYU KUMIAI filed Critical CHIYOU LSI GIJUTSU KENKYU KUMIAI
Priority to JP15662279A priority Critical patent/JPS5679451A/en
Publication of JPS5679451A publication Critical patent/JPS5679451A/en
Pending legal-status Critical Current

Links

Landscapes

  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)

Abstract

PURPOSE:To improve the reliability of a semiconductor device by completely removing a conductive material by lifting off after formation of a pattern on the most part of a conductive film with a selective etching. CONSTITUTION:A hole is made in an SiO2 film 102 on an Si substrate 101 to provide a resist 104 with a conductive pattern opposite to intended one. An Al 105 is stacked on the film 102 to provide a resist 106 with the intended pattern. An Al residue 107 which is left at a step in this process is removed simultaneously with the peeling off of the resist 104 and 106. Thus, a desired Al pattern can be obtained. This method enables formation of the desired pattern easily without damage to the substrate, and additionally facilitates the formation of a pattern for multilayer films containing a major conductive material thereby improving the reliability of the device.
JP15662279A 1979-12-03 1979-12-03 Production of semiconductor device Pending JPS5679451A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP15662279A JPS5679451A (en) 1979-12-03 1979-12-03 Production of semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP15662279A JPS5679451A (en) 1979-12-03 1979-12-03 Production of semiconductor device

Publications (1)

Publication Number Publication Date
JPS5679451A true JPS5679451A (en) 1981-06-30

Family

ID=15631727

Family Applications (1)

Application Number Title Priority Date Filing Date
JP15662279A Pending JPS5679451A (en) 1979-12-03 1979-12-03 Production of semiconductor device

Country Status (1)

Country Link
JP (1) JPS5679451A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4715109A (en) * 1985-06-12 1987-12-29 Texas Instruments Incorporated Method of forming a high density vertical stud titanium silicide for reachup contact applications
US5094979A (en) * 1989-03-03 1992-03-10 Mitsubishi Denki Kabushiki Kaisha Method of fabricating semiconductor device

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4715109A (en) * 1985-06-12 1987-12-29 Texas Instruments Incorporated Method of forming a high density vertical stud titanium silicide for reachup contact applications
US5094979A (en) * 1989-03-03 1992-03-10 Mitsubishi Denki Kabushiki Kaisha Method of fabricating semiconductor device

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