JPS5810686B2 - recorder - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a meter having a multi-channel input circuit and a recording mechanism.

In such a recorder, if the recording width is close to the full width of the recording paper, it is necessary to install multiple pens offset in the direction of travel of the recording paper, so even if they are recorded at the same time, it will not be possible to record on the recording paper. The recording is shifted by the interval of the pen difference in the traveling direction of the recording paper, making it inconvenient to know the time relationship of each input.

The present invention attempts to eliminate the above-mentioned drawbacks by delaying the signal by the time determined by the longitudinal deviation of the pen and the running speed of the recording paper. By changing it accordingly, a record with pen difference corrected can be obtained.

FIG. 1A shows a known sample-and-hold circuit (hereinafter abbreviated as SH) used in the present invention, in which 1 is a switch, 2 is a capacitor for storing a signal, and 3 is a voltage follower.

During the period when switch 1 is closed (sample mode), the input signal is stored in capacitor 2 and at the same time sent to voltage follower 3.
However, during the period when switch 1 is open (hold mode), the signal stored at both ends of the capacitor is output via the voltage follower, so although it is a signal that does not change, the input side Even if switch 1 is open, a signal can be obtained, and it has a kind of memory function.

Figure 1B shows the relationship between input and output. When the switch is closed, the input and output are the same, but when the switch is open, the input just before the switch was opened is output, so the figure As shown in the figure, a staircase condition occurs.

This output waveform is related to the degree of change in the input signal and the sampling period, but can be improved by providing a low-pass filter at the output end.

Figure 2 shows an analog delay circuit used in the recorder of the present invention, where S11 to 81N are input switches, and SH1 to SHN are sample and hold circuits (or analog equivalents) surrounded by broken lines in Figure 1. This is a circuit that temporarily stores input signals.

821 to 82N are output switches, LPF is a low-pass filter, and CON is a signal C11 to C1N, C21 to which controls the input/output switch from an external (or internal) clock.
This is a circuit that generates C2N.

The operation of this circuit will be explained with reference to the time chart in FIG. Sample bold circuit S by signals C21 to C2N
The signals stored in H1 to SHN are output, but in period T1, the input switch S11 is closed and the human input signal is stored in SH1.

At this time, the output switch 4 is closed in S22 and the signal stored in SH2 is connected to the output, so that the input signal during the period in which the 821 operation was performed is delayed and taken out.

During the period T2, the input switch 812 is closed and the output switch 823 is closed.

Since the sequential input/output switches operate with a one-by-one shift, if the clock period is T1 and the number of sample-and-hold circuits is N, the total signal delay is (N-1)T.

By inserting a low-pass filter LPF at the output end to smooth the waveform, an analog delay circuit can be obtained here.

FIG. 4 is a block diagram of a two-channel recorder according to an embodiment of the present invention in which the pen difference is corrected using the analog delay circuit described above, and the input of the first channel applied between input terminals 1 and 2 is The output reaches the balanced amplifier 5 as a deviation voltage between the reference voltage 4 and the internal voltage determined by the slip resistor 3, and the output drives the servo motor 6 to reduce the deviation voltage to zero, and at the same time is mechanically connected to the slider of the slip resistor 3. The first pen 7 is driven.

On the other hand, the input signal of the second channel is connected between the input terminals 89, and after being delayed through the analog delay circuit 10 described above, it is converted into a balanced amplifier as a deviation voltage between the reference voltage 12 and the internal voltage determined by the slip resistor 13. 13 and drives a second pen 15 by a servo motor 14.

A chart motor 17 that drives the recording paper 16 is driven by selecting a plurality of pulses obtained from a chart motor drive pulse generation circuit 18 using a recording paper speed selection switch 19.

Now, the recording paper feed speed......Vmm
/sec Recording paper feed pitch...Pmm/pulse 2
Misalignment of book panning... Number of DLL analog storage elements...N Chart morph drive pulse period... is in seconds, then the number of chart morph drive pulses is 1/l-Vmm/sec/Pmm/pulse-■/P pulse/
seconds... (1) The time the recording paper moves by the distance of the pen is Dim/Vmm/second = D/V seconds... (2) If this is equal to the delay time t(N-1) of the analog delay circuit, the pen The difference can be completely corrected.

Therefore t(N-1)-D/V...(3) From (1) and (3), finally P(N-1)2D...(4) is obtained.

Since equation (4) is unrelated to the recording paper feed speed, P
By selecting the number N of memory elements determined by and D, the pen difference can be corrected regardless of the recording paper feeding speed.

For example, if P=0.2 mm/pulse and D=5 mm, then N=26 and 26 sample-and-hold circuits SH shown in FIG. 2 may be provided.

In this example, if P=0.05mm/pulse, N=101
If the number is not realistic, use the analog delay circuit 1/
If a 4 frequency divider circuit is inserted to divide the clock pulse into 1/4, N=26, which is a practical value.

Since the analog delay circuit is provided with a low-pass filter at the output end, even if the sample rate is slightly lowered, signal fidelity is unlikely to be impaired.

As described above, according to the present invention, even if the recording width is set close to the full width of the recording paper, a plurality of signals can be recorded on the recording paper without positional deviation.

Further, according to the present invention, since the means for delaying the input signal is constituted by an electric circuit, there is an advantage that the structure is simple and miniaturization is possible.

Further, in the present invention, since the delayed signal is outputted through a low-pass filter, there is an advantage that the fidelity of the signal is not impaired.

[Brief explanation of the drawing]

FIG. 1A is a block diagram of a sample and hold circuit used in an embodiment of the present invention, FIG. 1B is a diagram of its operating characteristics, FIG. 2 is a block diagram of a delay circuit used in an embodiment of the present invention, and FIG. A time chart showing the operation, and FIG. 4 is a block diagram of a recorder in an embodiment of the present invention. 10...Analog delay circuit, 5,13...
...Balanced amplifier, 6,14...Servo motor,
7.15...pen, 16...recording paper.

Claims (1)

[Claims] 1 A plurality of recording systems having different pen positions with respect to the traveling direction of the recording paper are provided, a plurality of series circuits of an input switch, an analog storage element, and an output switch are connected in parallel to at least one recording system, and the Nth input switch and The plurality of input switches and the plurality of output switches are sequentially closed so that the (N+1)th output switch is closed at the same timing, and the delayed signal outputted via the output switch is passed through a low-pass filter. A recorder that outputs an output through a pen and moves a pen based on this output.