JPS5811753B2 - Kotai Satsuzousou Chino Seihou - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a method for manufacturing a solid-state imaging device having a charge transfer element CCD, particularly a solid-state imaging device whose charge transfer section has a two-phase clock type COD configuration.

A solid-state imaging device using a CCD, for example, based on a frame transfer method, as shown in FIG. A storage section 4 in which clock type CCDs 3 are arranged, and similarly, for example, a two-phase clock type CCD.
The electric charge generated in the imaging section 2 according to the optical image is temporarily transferred and accumulated in the storage section 4, and then sequentially transferred to the reshift register section 6. These data are sequentially read out from the output terminal t.

For example, the imaging section 2 of a solid-state imaging device with such a configuration
As shown in FIG. 2, for example, the CCD 1 that constitutes the CCD 1 has a dielectric layer, that is, an insulating film 8 formed on a semiconductor substrate, for example, a silicon substrate 7, and a plurality of electrodes (transfer electrodes) made of, for example, aluminum are formed on this. In this two-phase clock type CCD 1, each electrode T
In other words, the insulating film 8 in the charge transfer section has at least two portions 8A and 8B with different thicknesses, for example, 100 mm in thickness along the charge transfer direction.
It is composed of a portion 8A with a thickness of 0 Å and a portion 8B with a thickness of 3000 Å, and in each transfer portion, potential wells with different depths are formed along the charge transfer direction. Two-phase clock voltage φ1φ is applied to every other electrode 9.
2 is applied to transfer charges in one predetermined direction.

In a CCD having such a configuration, the light-receiving portion that receives the light is the gap 30 between the electrodes 9, so its light-receiving efficiency is quite low.

In order to increase this light reception efficiency, the width of the gap 30 must be increased, but this will reduce the transfer efficiency.

As described above, the CCD 1 having the configuration shown in FIG. 2 has an improvement in light receiving efficiency and an improvement in transfer efficiency that are incompatible with each other.

Further, as another example of this two-phase clock type CCD 1, as shown in FIG. 3, a thin insulating film 8a having a thickness of, for example, 1000 Å is formed on a similar semiconductor substrate T, and the required amount of film is formed on this. A polycrystalline semiconductor layer with a low resistivity while maintaining the spacing, that is,
First electrode portions 9A made of a polycrystalline silicon layer doped with impurities at a high concentration are deposited and arranged with required spacing, and a second insulating film 8b is deposited over the electrode portions 9A. In some cases, a second electrode part 9B made of aluminum is deposited on the insulating film 8b between adjacent electrode parts 9A.

Thus, a thin insulating film portion 8A such as the insulating film 8a is formed under the electrode portion 9A, and a thick insulating film portion in which the first and second insulating films 8a and 8b are stacked is formed below the aluminum electrode portion 9B. Although not shown, adjacent pairs of first and second electrode portions 9A and 9B constituting the electrode portion 8B are electrically connected to each other at respective extension portions of both electrode portions 9A and 9B for each pair. Each transfer electrode 9 is constituted by a pair of electrode portions 9A and 9B connected to each other, and every other transfer electrode 9 is supplied with a clock voltage φ1. Give φ2.

There is something like this.

In this case, the light is received through the gaps 31 between the aluminum electrode parts 9B, and in this case, the gaps 31 can be made sufficiently large without relatively reducing the transfer efficiency. Although the light reception efficiency can be increased, the light reception is caused by the second insulating film 8 existing in the gap 31.
b - First electrode part 9A - This is done through the thin insulating film 8a under this, and if the thickness of the electrode part 9A is increased in order to minimize its electrical resistance, the light receiving efficiency will be lowered. It has the disadvantage of being stored away.

In order to avoid such a drawback, as shown in FIG. A structure has been proposed in which a window 12 is formed in a part of the insulating film 8b on the electrode portion 9A by photoetching, and one side edge of the electrode 9B is brought into contact with the electrode portion 9B through the window 12.

In such a structure, the electrode part 9B made of a polycrystalline silicon layer can be made sufficiently thin, for example, with a thickness of 1000 to 2000 Å, so that the light receiving efficiency can be considerably improved. However, in manufacturing the window 12 in the insulating film 8b, during the photo-etching process, the electrode part 9A is so thin that pinholes are formed therein. The thin insulating film 8a below this is etched through the hole, creating a pinhole there as well. When the aluminum electrode section 9B is then deposited, for example, the electrode section 9 under this window 12 is removed.
This electrode portion 9
There is a drawback that an accident in which B is electrically short-circuited with the base body 7 is easily caused, and reliability is poor.

The present invention aims to provide a method for manufacturing a solid-state imaging device that eliminates the above-mentioned drawbacks.

First, an example of the manufacturing method of the present invention will be described with reference to FIG. 5. As shown in FIG. 5A, a semiconductor substrate 10 made of, for example, single crystal silicon is provided, and a first insulating film 11 is formed on this. Form.

In this example, the first insulating film 11 is an insulating film having a thickness of, for example, 3000 Å, which will eventually constitute the thick insulating film portion of the transfer section, and is formed of, for example, SiO2 by thermal oxidation.

Then, on this first insulating film 11, a polycrystalline semiconductor layer doped with impurities to have a low resistivity, for example, a polycrystalline silicon layer 12, is formed to a thickness of about 5000 Å by chemical vapor deposition (CVD). ).

Thereafter, as shown in FIG. 5B, a mask layer 13 made of Si3N4, for example, which can serve as an oxidation mask, is deposited on the polycrystalline silicon.

As shown in FIG. 5C, photoetching is performed on the mask layer 13, and using this as a mask, the polycrystalline silicon layer 12 and the insulating film 11 are sequentially selectively etched to finally form a thick insulating film in the charge transfer section. Leave the parts that need to be removed and remove the other parts by etching.

Next, as shown in Figure 5, a second thin insulating film 14 having a thickness of, for example, 1200 Å is formed on the surface of the substrate 10 by thermal oxidation in an oxidizing atmosphere.

In this case, the top surface of the polycrystalline silicon layer 12 is covered with an oxidation-resistant mask layer 13, so that the upper surface thereof is not oxidized. A similar SiO2 insulating film 15 is formed on the uncovered side surfaces.

Next, as shown in FIG. 5E, the mask layer 13 is etched away using, for example, heated phosphoric acid.

As shown in FIG. 5F, the entire surface of the insulating layer 14 and the polycrystalline silicon layer 12 is doped with impurities to have a relatively small thickness, e.g.
A polycrystalline semiconductor layer 16 of ~2000 layers, for example a polycrystalline silicon layer 16, is deposited by CVD, and a mask layer 17 made of an insulating film such as Si3N4 or SiO2 is deposited on top of this by CVD as well. Form the adhesion.

. Next, as shown in FIG. 5G, a window 17a is formed in the mask layer 17 by photoetching.

This window 17a is formed with a width W that opens from above one side of each polycrystalline silicon layer 12 to the thin insulating film 14 on the side adjacent to this one side.

Thereafter, a thermal oxidation process is performed to oxidize the polycrystalline silicon layer 16 exposed through the window 17a to form an insulating film 18 made of its oxide, that is, SiO2, as shown in FIG. 5H.

In this way, a plurality of electrodes 19 are formed by the polycrystalline silicon layers 12 and 16, respectively, each electrode 19 is electrically isolated by the insulating film 18, and a first insulating film portion, in this example, is formed under the electrode 19. In this case, the thick insulating film portion 20A is formed by the insulating film 11, and the other parts include a second insulating film portion,
In this example, a CCD is constructed in which the thin insulating film portion 20B has an insulating film 20 formed by the insulating film 14.

Similarly, the mask layer 17 can be etched away in the end, or it can be left as is.

According to the manufacturing method of the present invention described above, after forming the thin insulating film portion 20B, that is, the insulating film 11, and the electrode portion, that is, the polycrystalline layer 16 thereon, etching is performed to form an electrode window thereon, and the subsequent steps are performed. Since there is no process such as forming electrodes through electrode windows, shorts due to pinholes as mentioned above,
That is, lack of reliability and reduction in yield can be avoided, and by avoiding various drawbacks related to pinholes, the thickness of the layer 16 can be made sufficiently thin, and accordingly, its light receiving sensitivity, In particular, sensitivity can be improved on the short wavelength side.

In the above example, the polycrystalline layers 12 and 16 are doped with impurities at the time of their formation, but the fifth-F
It is also possible to dope the polycrystalline silicon layer 16 and the polycrystalline silicon layer 12 below it by diffusing impurities at a high concentration before forming the mask layer 17 in the step.

In addition, in the example described in step 4, the polycrystalline silicon layers 12 and 1
This is the case where impurities are doped over the entire area of 6 to make the resistivity low, and a part of it is made into a high resistivity layer that is not doped with impurities, and this high resistivity is formed between adjacent transfer electrodes 20. It is also possible to have a resistivity layer interposed.

An example of this case will be described with reference to FIG. 6. In FIG. 6, parts corresponding to those in FIG. 5 are denoted by the same reference numerals, and redundant explanation will be omitted.

That is, in this example as well, as shown in FIGS. 6A to 6E,
After going through the steps corresponding to FIGS. 5A to 5E, in particular, in this example, in the steps corresponding to FIG. 5A as shown in FIG. 6A,
For example, a polycrystalline silicon layer 12 that is not doped with impurities is formed on a semiconductor substrate 10 made of single crystal silicon with a thick insulating film 11 interposed therebetween.

Also, in this example, as shown in FIG. 6F, instead of the impurity-doped polycrystalline silicon layer 16 described in FIG. A mask layer 1 doped with impurities on this
7', for example, a SiO2 layer doped with a high concentration of boron B or phosphorus P, for example, is applied over the entire surface.

Thereafter, as shown in FIG. 6G, the impurity-doped layer 1
7' to form a window 17a' similar to the window 17a described with reference to FIG. 5G.

Next, as shown in FIG. 6H, thermal oxidation treatment is performed to form Si.
The polycrystalline silicon layer 16' exposed to the surface through the window 17'a of the O2 layer 17' is oxidized, and the impurities in the layer 17' are removed from the polycrystalline silicon layers 16' and 12' below the layer 17'.
polycrystalline silicon layers 16 and 1 doped with low resistivity.
form 2.

In this case, by appropriately selecting the oxidation time, the polycrystalline silicon layer 12 and the impurity-doped glass layer 17' are not doped with impurities, and moreover, a so-called semi-insulating portion 22 with a high specific resistance that is not oxidized can be formed. It remains between adjacent electrodes 19.

In this case, the substantial distance between the electrodes 19 can be made small to improve the transfer efficiency.

In the example explained in FIGS. 5 and 6, a thin oxide film is formed after forming a thick oxide film, but conversely, after forming a thin oxide film, It is also possible to form a thick oxide film.

An example of this case will be briefly explained with reference to FIG.

In this case as well, parts corresponding to those in FIGS. 5 and 6 are designated by the same reference numerals, and redundant explanation will be omitted.

In this example, first, as shown in FIG.
An insulating film 14 made of O2, a polycrystalline silicon layer 12 on top of this, and a mask layer 13 on top of this are formed, and photoetching is performed to leave only the area where a thin insulating film will be finally formed. Remove the part by etching.

As shown in FIG. 7B, one side of the mask layer 13 is removed by etching.

Next, as shown in FIG. 7C, oxidation treatment is performed to
A thick insulating film 1 made of SiO2 with a thickness of about 3000 Å, for example, is formed by thermal oxidation on the part directly deposited on the top.
form 1.

In this case, the mask layer 13 on the surface of the polycrystalline silicon layer 12
An oxide film is also formed in the area where the oxide is removed.

Thereafter, as shown in Figure 7, the mask layer 13 is removed and a conductive layer 23 made of a metal such as aluminum or a polycrystalline silicon layer is formed over the thick oxide film layer 11.

In this way, the transfer electrode 19 is formed by the layers 12 and 23, and the thin insulating film portion 20B is formed under the layer 12.
A two-phase clock type CCD is constructed in which a thick insulating film portion 20A is formed on the other portion.

The above example is a case in which the present invention is applied to a CCD serving as an imaging section of an imaging device using a frame transfer method, but the present invention can also be applied to a CCD serving as an accumulating section. , for example, the CCD in FIG.
A metal layer such as Al can be deposited on the entire surface of the substrate while leaving an insulating mask layer 17 on the surface of the substrate.

[Brief explanation of drawings]

FIG. 1 is a configuration diagram of a solid-state imaging device used for explaining the present invention;
FIGS. 2 to 4 are sectional views of an example of a CCD of a solid-state imaging device similarly used to explain the present invention, and FIGS. 5 to 7 are process diagrams of each image of the manufacturing method of the present invention, respectively. 10 is a semiconductor substrate, 11 is a thick oxide film, 14 is a thin oxide film, 12 and 16 are polycrystalline semiconductor layers, and 20 is an insulating film.
0A and 20B are respective parts thereof, and 19 is an electrode.

Claims (1)

[Claims] 1. A solid-state imaging device in which an insulating film formed on a semiconductor substrate of a charge transfer section has first and second insulating film portions having different thicknesses along the charge transfer direction. The manufacturing method includes a step of forming the first insulating film portion on the semiconductor substrate, a step of forming a polycrystalline semiconductor layer doped with impurities on the first insulating film portion, and a step of forming the first insulating film portion on the semiconductor substrate, and a step of forming the polycrystalline semiconductor layer doped with impurities thereon. a step of forming an oxidation mask layer on the first insulating film portion, a step of forming the second insulating film portion by oxidation treatment, and a step of removing the mask layer to form the polycrystalline semiconductor layer on the first insulating film portion and the second insulating film portion. A method for manufacturing a solid-state imaging device, comprising the step of forming a conductive layer over the second insulating film portion.