JPS5813874B2 - electronic display clock - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a fully electronic electrochromic display timepiece.

An object of the present invention is to provide a timepiece whose display body is driven by a more simplified electronic circuit.

FIG. 1 is a block diagram showing an embodiment of a timepiece according to the present invention.

4 from the 1 minute digit to the 10 o'clock digit using a crystal oscillator as the time standard
FIG. 3 is a block diagram in which digit display is performed using a dynamic drive.

Additional functions for time adjustment have been omitted, and the display may include seconds or date digits, depending on the specifications of the watch.

A brief explanation of the block diagram will be given.

The oscillation frequency generated by the crystal oscillation in the oscillation circuit 101 is determined by the frequency dividing circuit 1.
02, the signal is lowered to a one minute signal, and further time frequency division is performed by counters 103 to 106 of 1/10, 1/6, 1/10, 1/6, . . . to display the time.

The BCD output generated by each digit counter is a series of BCD outputs that are time-divided by the number of digits by a time division circuit 108 using a digit signal from a clock generator 107 for dynamic display.

The BCD output is converted into a segment output by a segment decoder 109 for digital display on an EC (electro-chromic) display 111, and an EC drive is obtained by a driver 110.

However, since the EC display utilizes a memory effect, unlike an LED display, there is no need to continuously drive the segments when turning them on and when turning them off.
has been established.

With the above configuration, an EC display clock using a dynamic drive can be realized.

EC displays require a drive circuit that allows current to flow in both directions between electrodes to turn on and off.

Furthermore, since this display has a memory effect, once it is turned on or off, it does not require power consumption and remains in that state.

Continuing to energize after that will lead to deterioration of the display.
There is a risk that the lifespan will be extremely shortened.

Rather, it is possible to reduce power consumption by actively utilizing the memory effect.

In order to allow current to flow in the forward direction, it is possible to use a power supply system with positive and negative voltages using a transformer or two batteries, or a voltage division method that causes a lot of power loss, but in either case, They also take up space, which increases costs, and power loss shortens battery life.

In particular, wristwatches and the like have strict requirements regarding space and power consumption, so it is not preferable to use the above method.

In addition, it is possible to make the current flow only when the display changes by providing a memory for each segment output.If the current display state is memorized, it can be changed from turning on to turning off.
Alternatively, it is possible to detect a change from off to on or no change.

However, if a memory is provided for each segment, the number of memories will increase considerably, and at the same time the number of other elements will also increase.
This means a significant increase in the cost of C.

The present invention is a dynamic drive type EC display timepiece that compensates for the above-mentioned drawbacks.

Figure 2 shows the EC drive method.

The voltage waveforms shown in FIG. 2b1 and FIG. 2C are applied to the A terminal and B terminal of FIG. 2a, respectively.

An alternating voltage of % duty is always applied to the B terminal at a certain period, and a voltage of ■H or VL is applied to the A terminal.

When the current is VH, the current flows from A to B, and when the current is ■L, the current flows from B to A.

To change the direction of the current, discontinuous energization is carried out every half cycle, but two power sources are not required, and it is only necessary to change the voltage of one electrode to vL and ■H.

Therefore, the EC display body can be easily turned on and off.
Valid for both static and dynamic drives.

FIG. 3 is a more detailed representation of FIG. 1, showing a part of the circuit of an EC display clock using a dynamic drive.

The oscillation frequency of the time standard oscillator is divided and reduced, and a carry signal is input from the input terminal 301 to the counter 302.

For example, if the IMIN signal is input, the counter 302 changes the BCD output every time an input pulse is input, and the counter 302 changes the BCD output to 1.
For each 0 shot input, 10 MIN signal is sent to the next stage % counter 3
Send to 03.

The BCD output is output from the AND gate group 3 while the digit signal assigned to each digit is output from the clock generator 304.
Pass through 05.

Similarly, the BCD output from the counter 303 also passes through the gate group at the timing of the digit signal.

Each BCD output (20, 21, 22
, 23), the timing is shifted by the digit pulse width, and BCD outputs with different digits are produced in series.

The signal is input to a decoder 308, converted into a segment signal, and drives a driver 309.

At the same time, input is input to the drive control circuit 316 to turn on the switching circuit 312 provided between the driver 309 and the segment electrode 311 of the EC display body 310.
- OFF control.

A digit drive control circuit 315 controls the switching circuit 314 on the common segment 313 side.

The circuit 315 uses a carry signal and a digit signal to scan the display digit corresponding to the counter with a digit pulse for a certain period of time only for a counter whose contents change.

This circuit is required for each counter related to the display, and any circuit other than the circuit shown in the figure may be used as long as the circuit has the function of operating the switching circuit of the digit for a certain period of time if there is a carry signal. For example, it can be constructed of a monostable multivibrator triggered by a carry pulse and a gate circuit that passes a digit signal.

The predetermined period is the time period during which the current required to turn on or off the EC display is passed.

In the figure, an IM with that time width is stored in the clock generator.
A pulse synchronized with the signal is generated and input to the control circuit together with a reset pulse for the FF to perform the above operation.

The segment drive control circuit 316 will be explained.

As the number representing the time changes, each segment repeatedly turns on and off.

When displaying numbers with the electrode configuration of seven segments A-G shown in Figure 4, when the numbers fluctuate from 0 to 9, A-G
The decoder segment output of is shown in FIG. 4b.

It lights up when it is at H level and goes off when it is at L level.

Current may be supplied to the display body at each transition point from lighting to lighting-off.

For this purpose, the segment switching circuit may be operated according to the waveform shown in FIG. 4C.

When the switch is turned on at H level, the thick line part of the waveform shown in Figure 4b is applied to the segment electrode, and the switching element for the digit is also turned on for a certain period of time every time there is a carry clock, so both switches are turned on. It can be seen that while the transistors are simultaneously turned on, the current flows either in the order or in the reverse direction, which satisfies the above conditions.

However, although FIG. 4 concerns decimal digits, a clock also requires hexadecimal digits.

Looking at Figure 4b, when the number moves from 9 to 0 and from 5 to 0
Comparing the case of moving to , only the B segment is different.

Therefore, in the case of hexadecimal digits, it is appropriate to use a waveform that becomes H level at the number 0 shown by the dotted line only for the B segment in FIG. 4C.

A segment drive control circuit produces the time-divided waveform shown in FIG. 4C as an output, and FIG. 5 shows an example of the circuit.

For the output to the B segment switching circuit, if you configure the circuit with diagonal lines as shown in the figure, when the signal is a decimal digit, the number is 0, that is, when all BCD inputs are at L level, the SB
is at L level, and becomes H level when the signal is a hexadecimal digit, causing no inconvenience.

Furthermore, even if there is a base other than hexadecimal, there is no problem with a similar circuit configuration.

FIG. 6 shows operating waveforms for only three segments of one digit out of a plurality of digits when dynamic driving is performed using the above-described circuit.

In the operation before and after inputting one carry CLK, driver output segment A changes from H to L (lit), and segment B changes.
This is a case where the segment C changes from L to H (light off) and segment C remains at L.

At that time, after the CLK input, the segment switching circuit of the drive circuit turns ON when the signal of both A and B is of that digit.
C remains OFF.

The digit switch on the common segment side remains OFF even after being turned ON several times.
It becomes FF.

Therefore, the potentials of the A and B segment electrodes are L and H, respectively, and since the common drive waveform is always applied as shown in the figure, the H and L potentials are alternately applied several times to the common segment electrodes.

Therefore, current flows from the common electrode to the segment electrode in the A segment and lights up, and in the B segment, the current flows in the opposite direction and turns off the light, and no current flows in the C segment, which remains lit.

The above operation is the same for other segments and segments of other digits, and EC dynamic drive display is performed.

When segments of the same digit and to which H and L potentials are applied simultaneously exist in the EC, several loops are formed through the common electrode and the EC, and it is conceivable that current flows.

The same thing can be said about the spaces between digits.

In reality, the distance between the segment electrode and the common electrode is several tens of microns.
Since the distance is much smaller than the distance between adjacent segment electrodes, the common electrode is mainly responsible for creating a loop.

However, the current characteristics of EC exhibit nonlinearity with respect to voltage, and a threshold voltage is observed.

This threshold voltage value changes depending on the composition of the EC and the electrode material, and it is not difficult to adjust. Therefore, if this threshold voltage is used, it is possible to sufficiently prevent the current from flowing into other segments. It is possible.

By configuring the circuit as described above, a dynamic drive EC clock can be easily realized.

In particular, all the circuits can be configured with low power consumption elements, such as C-MOS, so they can be made smaller by using C-MOS, and in combination with the memory function of the EC, it becomes a low power consumption watch with a long battery life. Since the short voltage can be lower than the general watch battery voltage (1.5V) and the response speed can be several milliseconds, an EC display wristwatch can be fully realized.

Since the EC display has the same electrode structure as the liquid crystal display, the number of leads drawn out from the display can be greatly reduced by using dynamic drive, so the connection to the circuit and the display itself can be minimized. It is highly significant that the reliability of the system can be increased.

[Brief explanation of the drawing]

FIG. 1 is a block diagram showing an embodiment of an EC display timepiece using a dynamic drive system. FIG. 2 is a diagram showing the EC drive method and drive waveform. FIG. 3 shows an embodiment in which a part of the circuit of an EC display clock using a dynamic drive is shown in more detail than in FIG. 1. FIG. 4 is a diagram showing the segment output when the number display by the segment changes from 0 to 9, and a diagram showing the output waveform corresponding to each number of the segment drive control circuit shown in FIG. FIG. 5 shows an embodiment of the segment drive control circuit including decimal and hexadecimal counters. FIG. 6 shows operating waveforms of the drive section for three segments of a certain single digit when the EC is dynamically driven. 101...Oscillation circuit, 102...Frequency dividing circuit, 103-1
06... Time division counter, 107... Clock generator, 108... Time division circuit, 109... Segment decoder, 110... Driver, 111... Electrochromic display, 112... Drive control circuit, 301...IMIN signal input terminal, 302
...1/10 counter, 303...1/6 counter, 3
04... Clock generator, 305, 306...A
ND gate, 307...OR gate, 308...segment decoder, 309...driver, 310...EC display body, 311...segment electrode, 312, 314...
Switching circuit, 313... Common segment, 315
, 316... Drive control circuit.

Claims (1)

[Claims] 1. In an electronic display clock whose display body is an electrochromic material having a memory effect, an alternating voltage is applied to the common electrode of the display body for a certain period of time by a carry signal, and the common electrode side is energized for each digit. A switching circuit, a drive control circuit for controlling the operation of the switching circuit for energizing the common electrode side, a segment switching circuit for energizing the segment electrodes of the display body, and a BCD output from a time-series counter are coded to perform the segment switching. An electronic display timepiece comprising a segment drive control circuit that controls the operation of a circuit, and a drive circuit that energizes the display body only when a display segment of the display body changes from off to on or from on to off. .