JPS5814739B2 - hand tai souchi no seizou houhou - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a method for manufacturing a semiconductor device, and is characterized in that a polycrystalline compound is used as a mask for selective diffusion or selective etching of impurities.

Conventionally, when selectively diffusing impurities or selectively etching a semiconductor, SiO2 film, Si
An insulating film such as 3N4 film was used.

FIG. 1 shows a conventional method of fabricating a P+ GaAs region 2 by partially performing Zn diffusion on an n-type GaAs 1 used as a substrate.

In this case, a SiO2 film 3 deposited by chemical vapor deposition is used as a diffusion prevention mask.

By the way, there is a very large difference in the coefficient of thermal expansion between the SiO2 film 3 and the n-GaAs 1, and due to the strain that occurs at the interface, when Zn diffusion is performed, the ZnH does not spread along the interface.
In extreme cases, the value of W can reach 2 to 3 times the diffusion depth d.

Diffusion along this interface has an adverse effect on the fabricated semiconductor device; for example, if an injection type light emitting device is fabricated from this wafer, its reverse characteristics will be soft.

Next, consider the case where a mesa-type injection type light emitting device is manufactured using the SiO2 film 3 as an etching prevention film.

FIG. 2 shows a conventional method for manufacturing a mesa stripe type laser from a P-n junction wafer consisting of a GaAs substrate 1 and a P+-GaAs region.

In this case, Si0 is also used as an etching prevention mask.
2 films 3 are used, but as in the case of selective diffusion, due to the difference in thermal expansion coefficient at the interface, etching is also performed along the interface, and the size of the etching is about the same as the WU etching depth d. become.

Therefore, if deep etching is desired, the etching W along the interface will also be large, and if the stripe width is narrow, H,
The Si02 film 3 may come off.

As described above, when an insulating film such as a SiOz film is used as a mask for impurity diffusion or a protective mask for selective etching, precise control becomes extremely difficult.

The present invention aims to eliminate the above-mentioned drawbacks, and uses a polycrystalline compound semiconductor that can be selectively etched instead of insulating films such as SiO2 film and SiSN4 film, which are conventional masks. It is used.

To avoid distortion at the interface, this polycrystalline semiconductor is preferably deposited at as low a temperature as possible.

Next, the manufacturing method of the present invention and its characteristics will be described with reference to Examples.

Example 1 Let us consider the case where Zn is diffused into an n-GaAs substrate 1 in a stripe pattern.

First, polycrystalline Ga1-xAlx is placed on an n-GaAs substrate 1.
As (0x≦)11 is deposited by pyrolysis to a thickness of 2μ.

The raw materials are Ga (CH3)3, AI (cns
) a and AsH3 at a deposition temperature of U600'C.

G a I -XA IX As deposited at this temperature
1 It was confirmed from an X-ray diffraction experiment that 1 was polycrystalline (Fig. 3a). Next, Ga1-XA IX A s
1 A SiO2 film 3 with a thickness of 5000 nm is deposited on 1 by chemical vapor deposition.
A was attached, and windows 20μ wide were opened at 250μ intervals using photoetching technology (Figure b).

Next, using a selective etching solution for Ga1, AIXAS, Ga, XAIXAS 1 below the value of the part where the window was opened
1 is removed so that its tip reaches GaA3 1.

In this example, G a 1 −X A LX As 1
Hot phosphoric acid was used as the selective enoting solution in step 1 (C in the same figure).

Next, Zn was diffused into this wafer, using ZnAs2 as a diffusion source, sealed in a vacuum, and heated at 800 °C.
Diffusion was performed for IO minutes at °C.

Due to this diffusion, a P+-GaAs2 region with a depth of 1 μm is formed only in the n-GaAs substrate 1 in the window portion.

By the way, since the lattice constants of GaAsl and Gal-XAIXAS 1 1 are well matched, almost no strain occurs at their interfaces, and therefore Zn hardly diffuses along the interfaces and can be diffused as designed. was created (
Figure d).

After diffusion, if necessary, Si02 film 3 and Ga1-XAIX
All you have to do is remove As11, but the above G a 1 -z A
The specific resistance of IXA81 1 is 104Ω. Since it has a high resistance of about 1.2 cm and is also used as an insulating film, it is not necessarily necessary to remove it (see e in the same figure).

The striped p-nGaAs junction diode produced by this method had very steep reverse characteristics and good reproducibility.

Example 2 A case will be considered in which a mesa type p-n junction GaAs light emitting diode is manufactured.

A p-GaAs layer 12 of 1 μm is grown on the n-GaAs substrate 1 using the liquid phase epitaxial method (FIG. 4a).
.

Next, polycrystalline Ga1-XAIxAs was prepared under the same conditions as in Example 1.
Attach 2μ of No. 11 (Figure 4b).

Then, using photo-etching technology, hot phosphoric acid was
As a selective etching solution for l'-XAIXAs, 25
Ga1-xA1xAs11 with a width of 20μ are left at 0μ intervals, and the others are removed (C in the same figure).

Next, mesa etching of the GaAs substrate 1 and the GaAs layer 120 is performed using a mixture of sulfuric acid and hydrogen peroxide.

In this case as well, as in Example 1, the GaAs layer 12 and Ga
, -XA LX AS11 have very good matching in lattice constant, so that etching hardly progresses along the interface between them (d in the same figure).

Next, Gal XA LX As 1 1 was removed using hot phosphoric acid, and Si
O2 film 3 is attached, n-GaAs1 and p-Ga
p-GaA formed by etching the As layer 12
By attaching electrode metals 6 and 7 to s2, a mesa type light emitting element wafer is completed.

(Figure e). In the above two examples, Ga1-xA1xAs was used as the polycrystalline compound semiconductor, but GaAsl
There are y etc.

This method can also be applied to general semiconductors other than GaAs.

Further, as a deposition method, in addition to the vapor phase method, vacuum evaporation method, sputtering method, etc. are also suitable.

As described above, since the method of the present invention does not cause lateral impurity diffusion and unnecessary etching, it has great industrial value in manufacturing semiconductor devices.

[Brief explanation of drawings]

Figures 1 and 2 are cross-sectional views of the structure of a semiconductor device to explain the conventional selective diffusion method and selective etching method, respectively, and Figures 3 a-eH are cross-sectional views of the manufacturing process using the selective diffusion method of an embodiment of the present invention. Figure 4a''eH is a sectional view of a manufacturing process using a selective etching method according to another embodiment of the present invention.

Claims (1)

[Scope of Claims] 1. A method for manufacturing a semiconductor device, characterized in that when selectively diffusing impurities into a semiconductor layer, a polycrystalline compound whose lattice constant matches that of the semiconductor layer is used as a diffusion mask. 2. A method for manufacturing a semiconductor device, characterized in that when selectively etching a semiconductor layer, a polycrystalline compound whose lattice constant matches that of the semiconductor layer is used as an etching mask.