JPS5819154B2 - Manufacturing method of through-hole printed board - Google Patents
Manufacturing method of through-hole printed boardInfo
- Publication number
- JPS5819154B2 JPS5819154B2 JP53027227A JP2722778A JPS5819154B2 JP S5819154 B2 JPS5819154 B2 JP S5819154B2 JP 53027227 A JP53027227 A JP 53027227A JP 2722778 A JP2722778 A JP 2722778A JP S5819154 B2 JPS5819154 B2 JP S5819154B2
- Authority
- JP
- Japan
- Prior art keywords
- hole
- copper plating
- electrolytic copper
- resist
- round
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
Landscapes
- Printing Elements For Providing Electric Connections Between Printed Circuits (AREA)
Description
【発明の詳細な説明】
本発明はスルーホールプリント板、特にスルーホールの
孔壁およびラウンド部にはんだ付は性のよいメッキが選
択的に施され、配線部には銅のみが形成されたスルーホ
ールプリント板の製造方法に関する。DETAILED DESCRIPTION OF THE INVENTION The present invention provides a through-hole printed board, in particular, a through-hole printed board in which the hole wall and round part of the through-hole are selectively plated with good solderability, and the wiring part is formed only with copper. The present invention relates to a method for manufacturing a hole printed board.
従来のスルーホールプリント板の製造方法の一例として
、銅張り積層板のごとき両面に銅箔を備えた基板の所望
位置に貫通孔をあけ、この孔の孔壁を含む基板全面に活
性化処理を施した後、無電解銅メッキ、電解銅メッキを
順次行ない、′次いで孔壁と孔のまわりのラウンド部に
のみはんだ付は性のよい金属例えぼはんだメッキ、ある
いは金メッキを行なった後に、基板表面の配線部を除く
不要な銅をエツチング処理により除去する方法があるに
こで、電解銅メッキは孔をスルーホール化するためのも
ので、その厚みは孔壁およびラウンド部において25μ
程度必要である。As an example of a conventional method for manufacturing through-hole printed boards, a through-hole is drilled at a desired position on a board with copper foil on both sides, such as a copper-clad laminate, and the entire surface of the board, including the hole walls, is subjected to activation treatment. After that, electroless copper plating and electrolytic copper plating are sequentially performed.Next, only the hole wall and the round part around the hole are plated with a metal with good soldering properties, such as solder, or gold plated, and then the board surface is plated with gold. There is a method of removing unnecessary copper except for the wiring part by etching, but electrolytic copper plating is used to make holes into through holes, and the thickness is 25μ on the hole wall and round part.
degree is necessary.
どころが上記従来法では、この所要め厚みの電解銅メッ
キを孔壁およびラウンド部を含む基板全面に1回で行な
っている。However, in the above-mentioned conventional method, electrolytic copper plating to a required thickness is performed on the entire surface of the substrate including the hole walls and round portions at one time.
このため電気容量が多く必要で、生産□性め点で問題が
あり、そのメッキ厚のバシ゛ジキも大きくなる。Therefore, a large amount of electric capacity is required, which poses a problem in terms of production efficiency, and the plating thickness also increases.
また、全面に厚く電解銅メッキを行なうことから、不要
な銅を除去する際のエツチング量が多くなり、配線部を
高精度かつ高密度に形成すること□が困難である。Furthermore, since thick electrolytic copper plating is applied to the entire surface, the amount of etching required to remove unnecessary copper increases, making it difficult to form wiring sections with high precision and high density.
さらに、高価な電解銅メッキ、エツチング液を多量に必
要とするため経済的にも不利である等の欠点があった。Furthermore, it has disadvantages such as being economically disadvantageous because it requires a large amount of expensive electrolytic copper plating and etching solution.
本発明は上記従来の欠点を除去し、生産性、経済性に優
れ、かつ配線部の高精度、高密度化を図ることができる
スルーホールプリント板の製造方法を提供することを目
的とする。SUMMARY OF THE INVENTION An object of the present invention is to provide a method for manufacturing a through-hole printed board that eliminates the above-mentioned conventional drawbacks, has excellent productivity and economical efficiency, and can achieve high precision and high density wiring sections.
本発明(ま電解銅メッキ工程を2回に分け、1次の電解
銅メッキは孔壁およびラウンジ部を含む基板全面に行な
い、2次の電解銅メッキはより厚いメッキ厚の必要な孔
壁およびラウンド部にのみ行なうようにしたことを特徴
とするものである。In the present invention, the electrolytic copper plating process is divided into two steps, the first electrolytic copper plating is performed on the entire surface of the board including the hole walls and the lounge area, and the second electrolytic copper plating is performed on the hole walls and the areas where thicker plating is required. It is characterized in that it is applied only to the round part.
以下図面を参照して本発明の一実施例を説明する。An embodiment of the present invention will be described below with reference to the drawings.
第1図はその工程図であ−る。第1図Aにおいて、1は
両面に銅箔2を被着させた絶縁基板、例えば銅張り積層
板であり、まずこの基板1の所望位置にドリルまたはパ
ンチング等で貫通孔3をあける(第1図B)。Figure 1 is a process diagram. In FIG. 1A, reference numeral 1 denotes an insulating substrate, such as a copper-clad laminate, with copper foil 2 coated on both sides. First, a through hole 3 is drilled or punched at a desired position on this substrate 1 (the first Figure B).
次に貫通孔3の孔壁を含む基板1の表面の銅箔2上に活
性化処理を施した後、無電解銅メッキ層4を形成して導
電性を与える(第1図C)。Next, an activation treatment is performed on the copper foil 2 on the surface of the substrate 1 including the hole walls of the through holes 3, and then an electroless copper plating layer 4 is formed to provide conductivity (FIG. 1C).
この無電解銅メッキ層4の上に、全面に1次の電解銅メ
ッキ層5を5〜10μ程度の厚さ形成する(第1図D)
。On this electroless copper plating layer 4, a primary electrolytic copper plating layer 5 with a thickness of about 5 to 10 μm is formed on the entire surface (Fig. 1D).
.
これにより孔3はスルーホール化される。This turns hole 3 into a through hole.
次に孔壁3aとラウンド部3bを除いて、印刷法または
感光膜によって耐メツキレシスト6を被覆する(第1図
E)。Next, except for the hole wall 3a and the round part 3b, the anti-stick resist 6 is covered by printing or a photosensitive film (FIG. 1E).
そして、この状態で露出している孔壁3aおよびラウン
ド部3bの電解銅メッキ層5上に、2次の電解銅メッキ
層7をこれらの厚さの合計が25μ程度となるように1
5〜20μ程度の厚さだけ形成し、さらにその上に半田
付は性のよい金属のメッキ(例えばはんだメッキ、金メ
ッキ等)層8を形成する(第1図F)。Then, on the electrolytic copper plating layer 5 of the hole wall 3a and the round part 3b exposed in this state, a secondary electrolytic copper plating layer 7 is applied so that the total thickness of these layers is about 25μ.
It is formed to a thickness of about 5 to 20 microns, and a metal plating layer 8 with good solderability (for example, solder plating, gold plating, etc.) is formed thereon (FIG. 1F).
次に前記耐メツキレシスト6を剥離しく第1図G)、そ
の後ラウンド部3bおよび配線部9以外の部分が露出す
るように印刷法。Next, the anti-stick resist 6 is peeled off (FIG. 1G), and then a printing method is applied so that the portions other than the round portion 3b and the wiring portion 9 are exposed.
または感光膜により耐エツチングレジスト10を被覆し
く第1図H)、エツチング処理によりラウンド部3bお
よび配線部9以外の基板1表面ある不要な銅を除去する
(第1図■)。Alternatively, the etching resist 10 is covered with a photoresist film (FIG. 1H), and unnecessary copper on the surface of the substrate 1 other than the round portion 3b and the wiring portion 9 is removed by etching treatment (FIG. 1).
このようにして、孔壁3aおよびラウンド部3bにはん
だ付け。In this way, the hole wall 3a and the round part 3b are soldered.
性のよいメッキ層8が形成され、配線部9には銅のみが
形成された第2図に示すようなスルーホールプリント板
が得られる。A through-hole printed board as shown in FIG. 2 is obtained in which a plating layer 8 with good properties is formed and only copper is formed in the wiring portion 9.
なお、実際には第1図Jに示すようにラウンド部3b以
外の部分にソルダーレジスト11を被覆し、さらにラウ
ンド部3bにフラックスを塗布して、全工程が終了する
。In fact, as shown in FIG. 1J, the entire process is completed by covering the parts other than the round part 3b with the solder resist 11, and then applying flux to the round part 3b.
以上一実施例を説明したように、本発明では電解銅メッ
キは1次と2次の2回に分けて行なわれ、しかも1次の
電解銅メッキは孔壁およびラウンド部を含む基板全面に
行なわれるのに対し、2次の電解銅メッキは孔壁および
ラウンド部にのみ行なわれる。As described above in one embodiment, in the present invention, electrolytic copper plating is performed in two stages, primary and secondary, and the primary electrolytic copper plating is performed on the entire surface of the board including the hole walls and round parts. In contrast, secondary electrolytic copper plating is applied only to the hole walls and round portions.
従って、1次の電解銅メッキを薄くすることで、電解銅
メッキ工程に要する電気容量を減少させることができ、
もって生産性が向上し、またメッキ厚のバラツキも少な
く均一なメッキ厚が得られる。Therefore, by making the primary electrolytic copper plating thinner, the capacitance required for the electrolytic copper plating process can be reduced.
As a result, productivity is improved, and uniform plating thickness can be obtained with less variation in plating thickness.
また、エツチング処理は2次の電解銅メッキについての
み行なえばよいので、エツチング量は少なくて済み、こ
のため配線部の高精度化、高密度化が図れる。Furthermore, since the etching process only needs to be carried out for the secondary electrolytic copper plating, the amount of etching is small, and therefore the wiring portion can be made with higher accuracy and higher density.
さらに、電解銅メッキの量およびエツチング液の消費量
が減少するため、経済的である。Furthermore, it is economical because the amount of electrolytic copper plating and the consumption of etching solution are reduced.
また、はんだ付は部分となるスルーホール部、。In addition, the soldering part becomes the through-hole part.
すなわち孔壁およびラウンド部にはんだ付は性のよいメ
ッキが行なわれていることから、長期保存に耐え、はん
だ付は作業を確実、容易に行なうことができる。In other words, since the hole walls and round portions are plated with good soldering properties, they can withstand long-term storage, and the soldering work can be performed reliably and easily.
第1図は本発明の一実施例を示す工程図、第2図は第1
図の工程で得られるスルーホールプリント板の平面図で
ある。
1・・・−・・絶縁基板、2・・・・・・銅箔、3・・
・・・・貫通孔、3a・・・・・・孔壁、3b・・・・
・・ラウンド部、4・・・・・・無電解銅メッキ層、5
・・・・・・電解銅メッキ層(1次)、6・・・・・・
耐メツキレシスト、7・・・・・・電解銅メッキ層、(
2次)、8・・・・・・はんだ付は性のよい金属のメッ
キ層、9・・・・・・配線部、10・・・・・・耐エツ
チングレジスト、11・・・・・・ソルダーレジスト。Fig. 1 is a process diagram showing one embodiment of the present invention, and Fig. 2 is a process diagram showing an embodiment of the present invention.
It is a top view of the through-hole printed board obtained by the process of a figure. 1...--Insulating substrate, 2...Copper foil, 3...
...Through hole, 3a... Hole wall, 3b...
... Round part, 4 ... Electroless copper plating layer, 5
・・・・・・Electrolytic copper plating layer (primary), 6・・・・・・
Anti-metallic resist, 7... Electrolytic copper plating layer, (
secondary), 8... Metal plating layer with good soldering properties, 9... Wiring section, 10... Etching resistant resist, 11... solder resist.
Claims (1)
設け、この貫通孔の孔壁を含む前記基板全面に活性化処
理を施した後、無電解銅メッキおよび電解銅メッキを順
次行ない、次いで前記孔壁および前記孔のまわりのラウ
ンド部を除いて耐メツキレシストを被覆してこれらの孔
壁およびラウンド部に電解銅メッキおよび半田付は性の
よい金属メッキを順次行ない、次いで前記耐メツキレシ
ストを除去した後、前記ラウンド部および配線部を耐エ
ツチングレジストで被覆して、不要な銅をエツチング処
理により除去することを特徴とするスルーホールプリン
ト板の製造力ム1. A through hole is provided at a desired position on an insulating substrate with copper foil on both sides, and after activation treatment is performed on the entire surface of the substrate including the hole wall of the through hole, electroless copper plating and electrolytic copper plating are sequentially performed. Next, the hole walls and round parts around the holes are coated with an anti-stick resist, and these hole walls and round parts are sequentially coated with electrolytic copper plating and metal plating with good soldering properties, and then the anti-stick resist is coated. After removing the copper, the round part and the wiring part are covered with an etching-resistant resist, and unnecessary copper is removed by etching.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP53027227A JPS5819154B2 (en) | 1978-03-10 | 1978-03-10 | Manufacturing method of through-hole printed board |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP53027227A JPS5819154B2 (en) | 1978-03-10 | 1978-03-10 | Manufacturing method of through-hole printed board |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS54120865A JPS54120865A (en) | 1979-09-19 |
| JPS5819154B2 true JPS5819154B2 (en) | 1983-04-16 |
Family
ID=12215194
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP53027227A Expired JPS5819154B2 (en) | 1978-03-10 | 1978-03-10 | Manufacturing method of through-hole printed board |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS5819154B2 (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH04151048A (en) * | 1990-10-09 | 1992-05-25 | Mitsuboshi Belting Ltd | V-ribbed and manufacture of belt thereof |
Families Citing this family (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP4330486B2 (en) | 2004-05-07 | 2009-09-16 | 日東電工株式会社 | Method for manufacturing double-sided printed wiring board |
Family Cites Families (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS49135163A (en) * | 1973-05-01 | 1974-12-26 | ||
| JPS5238825B2 (en) * | 1973-05-17 | 1977-10-01 |
-
1978
- 1978-03-10 JP JP53027227A patent/JPS5819154B2/en not_active Expired
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH04151048A (en) * | 1990-10-09 | 1992-05-25 | Mitsuboshi Belting Ltd | V-ribbed and manufacture of belt thereof |
Also Published As
| Publication number | Publication date |
|---|---|
| JPS54120865A (en) | 1979-09-19 |
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