JPS5820180B2 - Speed distortion detection method - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a speed distortion detection method, and particularly to a speed distortion detection method that can easily detect speed distortion of a start-stop signal or isochronous signal in telegraph and data transmission, distinguishing it from other distortions.

Digital signals such as start-stop signals and isochronous signals in telegraph and data transmission are composed of elements at unit intervals that take two significant states, and characters, etc. are given by a combination of predetermined focuses of these elements.

In general, a synchronization element is added to a digital signal, just as a start element and a stop element are added before and after an information element in the case of a start-stop signal.

Therefore, if we take the start-stop signal as an example, the interval between significant moments, which are the moments when the significant state changes within the same-start-stop signal, should correspond to a positive integer multiple of the normal unit interval of the start-stop signal, but distortion When this occurs, the interval of significant moments does not match a positive integer multiple of the normal unit interval (which leads to errors in information exchange).

Distortion can be divided into causes such as synchronization, bias distortion, characteristic distortion, and speed distortion.

Among these distortions, velocity distortion is caused by a change in the length of one element due to a shift in modulation speed, and distortion is accumulated one after another in each element, and the distortion increases as the elements become later.

Since velocity distortion has such a cumulative effect, special emphasis must be placed on velocity distortion, but conventionally this velocity distortion has not been detected very well, nor has it been easy to detect it.

On the other hand, in view of the increase in modulation speed and the increase in the number of bits of the start-stop signal, it is increasingly desirable to detect speed distortion in an appropriate manner.

The present invention aims to provide a speed distortion detection method that can simply and easily detect speed distortion based on the above-mentioned circumstances.

The configuration of the present invention that achieves such an object is such that when detecting velocity distortion of a digital signal that is not an element at a unit interval that takes two significant states, a predetermined number of elements counted from the synchronization element out of a series of digital signals For a plurality of elements having significant moments, the difference between the significant moments of the elements with respect to the regular significant moments based on the synchronization element is measured, and this difference is accumulated, and the cumulative value is the synchronization value of the element. The present invention is characterized in that it is determined that the digital signal has velocity distortion when the digital signal deviates from a predetermined reference range based on the order counted from the elements and the cumulative number of the differences.

Hereinafter, the present invention will be explained based on the drawings.

The present invention (Although it is possible to detect the speed distortion of a digital signal such as a start-stop signal or an isochronous signal consisting of elements at a unit interval that take two significant states), in this embodiment, the target is a start-stop signal. It's Toshide.

In Figure 1. 1 is a speed distortion detection device cited as an example of embodiment of the present invention, which includes a start element detector 5, a timer 6, a timer 7, a pulse generator 8, a significant moment detector 9,
Counter 10, subtracter 11, accumulator 12, counter 13
, a comparator 14, a delay reference value setter 15, an advance reference value setter 16, and a detection holder 17.

Further, 2 is an input/output circuit from a keyboard or printer, 3 is a modem for line connection, 4 is an input terminal for inputting a start-stop signal from the input/output circuit 2, and 18 is an output for outputting speed distortion detection. Terminal 19 is a reset terminal.

Hereinafter, the functions and operations of each part of the speed distortion detection device 1 will be explained with reference to FIGS. 2-3.

International Telegraph Alphabella 142 (,ITAA;,2
The start-stop signal used in the start-stop signal is composed of 5-bit information elements #1 to #5 as shown in FIG. It is distorted like.

Therefore, it was decided to detect velocity distortion based on the difference δ between the significant moment of the fourth information element #4 and the normal position.

Any element can be targeted, but it is convenient to target the element that is the largest power of 2 in terms of arithmetic processing and circuit configuration.

The start element detector 5 detects the q rise of the start element ST of the start-stop signal which is manually input one by one.
The timers 6 and 7 are operated based on the detection outputs.

Timer 6 outputs a virtual center pulse Pc at a position corresponding to the center of the third information element #3 of the regular start-stop signal [Figure 2 1] [Figure 2 3], while timer 7 outputs the regular start-stop signal [Figure 2 3]. A virtual central pulse Pc2 is output at a position corresponding to the center of the fourth information element #4 of the signal [Fig. 2 4]
.

The virtual central pulse Pc1 is applied to the pulse generator 8, the significant moment detector 9 and the counter 10, respectively, and the virtual central pulse Pc2 is applied to the significant moment detector 9 and the counter 10, respectively.

The pulse generator 8 then generates a pulse train having 15 pulses per regular unit interval in this case in synchronization with the virtual central pulse Pc, and inputs this pulse train into the counter 10.

By applying the virtual central pulse Pc1, the counter 10;
Counting of the pulse train is started, and this count is converted into a significant moment detection pulse Pd which is the output of the significant moment detector 9 [FIG. 2, 5]
The count value is continuously outputted to the subtracter 11 until .

When the significant instantaneous detection pulse Pd is not applied until the virtual central pulse P c 2 is applied, the counter 10
The counting is reset by the virtual central pulse Pc2.

By the way, the significant moment detector 9 detects only the significant moment of information element #4 from the start-stop signal inputted sequentially, and detects the significant moment occurring between the virtual central pulse Pc1 and the virtual central pulse PC2 as information element #4. Significant moment detection pulse Pd is detected at the same time as 4 significant moment.
Output.

This significant instantaneous detection pulse Pd is generated as described above (counter 10
The number of input start-stop signals that are applied to the counter 13 and have a significant moment in the information element #4 is counted here.

This counter 13 activates a comparator 14 when the count surface reaches a predetermined number m.

It is convenient for calculation if this predetermined number m is also a power of 2.

The subtracter 11, which receives the count value from the counter 10, subtracts 8 from the count value each time there is an input and adds the result to the accumulator 12.

The result of this subtraction is nothing but the distortion δ shown in FIG.

That is, 15 pulse trains per unit interval are used as the virtual central pulse Pc.

Since counting starts from 8, there is no distortion if the count value is 8, and if it is more than 8, the distortion is in the direction of delay, and vice versa.
If it is smaller, it means distortion in the advancing direction.

Therefore, as shown in FIG. 3, the distortion δ1~
When δm is accumulated in the accumulator 12, the comparator 14 determines based on the output of the counter 13 whether the accumulated value Σδi is outside the reference range.

In other words, if it is speed distortion, the cumulative result should uniformly increase or decrease each time it is accumulated, so when the cumulative value Σδi is outside the reference range, it is determined that there is speed distortion in the input series of start-stop signals. The detection holder 17 holds the output of the speed distortion detection output at the output terminal 18 .

This detection output is maintained by applying 5 to the reset terminal 19.
It is reset by an external reset signal such as ENSE 5TATUS request.

Further, when the comparator 14 performs a comparison operation using the output of the counter 13, the counter 13 and the accumulator 12 are reset for the next speed distortion detection.

By the way, the reference range for speed distortion detection is given by the detection threshold set in the delay reference value setter 15 and the advance reference value setter 16, and the delay reference value setter 15 is set to a positive number. A negative number -D is set in the advance reference value setter 16.

In this case, the detection thresholds D and -D are considered to be equivalent to 1.5 to 2.0% of the allowable distortion rate, but the detection thresholds D and -D are not only the allowable distortion rate but also the cumulative number m and the target element. It goes without saying that this depends on the order, since in this embodiment, the fourth information element counted from the synchronization start element ST was targeted for speed distortion detection.

Further, depending on the convenience of the calculation, it is preferable to scale the value by a power of 21 as shown in discriminant (a) as necessary.

It should be noted here that in the case of the speed strain detection device 1 mentioned in the embodiment, each measurement of the strains δ1 to δm is based on the counting of the pulse train generated by the pulse generator 8, so the speed strain detection is dependent on the pulse rate of the pulse train. This is where the accuracy depends,
In this case, although the pulse rate is 15 pulses per unit interval and the resolution is 100-5667%, if it is velocity distortion, the distortion is accumulated and expanded four times in the target information element #4 ( - Therefore, relative speed distortion of about 2% can be detected.

Therefore, it can be said that a pulse rate of about 15 to 31 pulses per unit interval is sufficient.

Note that if the pulse rate is sufficiently large, synchronization of the pulse generator 8 is not necessary.

On the other hand, the count output of the counter 10 is subtracted by a subtracter 11 every time the count is made.
Although the subtraction result is accumulated in the accumulator 12, it is also possible to omit the subtracter 11 and directly accumulate the count output of the counter 10 in the accumulator 12.

In this case, the accumulated value of the accumulator 12 is thicker by 8Xm than when the subtracter 11 is provided, so the detection thresholds of the delay reference value setter 15 and the advance reference value setter 16 are It is better to slide it in the positive direction by a value equivalent to 8×m.

Next, International Telegraph Alphabeso)/Fil;, 5 (I
A case will be described in which a start-stop signal using TAA, 5) is targeted for velocity distortion detection.

In this case, as shown in FIG. 4, when the fourth information element #4 and the eighth information element #8 are selected as the target elements, the arithmetic unit is satisfied.

Pass/fail δX1 to δxm of information element #4 and pass/fail δy1 of information element #8 with respect to a predetermined number m start-stop signals
Each distortion of ~δym is counted in the same manner as in the case where the IT A shop 2 is used.

Therefore, velocity distortion may be detected by setting separate detection thresholds for the cumulative value and the cumulative value, but if it is velocity distortion, the cumulative value Σδyi should be approximately twice the cumulative value Σδxi. Moreover, since their polarities (positive, negative) should be the same, it is better to use the following discriminant (b) or (/→).

However, the power of 2, 21, is used for scaling as necessary.

) In this case as well, the detection threshold for -D, D, and D2 is determined to be equivalent to an allowable distortion rate of 15 to 2.0%.

Although the present invention has been specifically explained using the embodiments above, the present invention is applicable not only to start-stop signals but also to general digital signals such as isochronous signals, which are composed of elements at unit intervals that take two significant states.

Moreover, the present invention is not limited to the specific configuration of the apparatus of the embodiment described, for example, to the point that strain measurement of a predetermined element is performed by counting by sampling a pulse train, or to the point of detecting a significant moment.

According to the present invention, speed distortion can be detected simply and easily.

Further, according to the present invention, the device itself for detecting velocity distortion has a simple configuration.

[Brief explanation of the drawing]

Fig. 1 is a block diagram showing one embodiment of the present invention, Fig. 2 and 3 are block diagrams showing one embodiment of the present invention.
The figure is a time chart for explaining the principle of the present invention and the operation of the embodiment of FIG. 1 for a start-stop signal using Kokusai Telegraph Alphavent-ya 2. However, FIG. 2 7 cannot be displayed enlarged. be. Further, FIG. 4 is a time chart for explaining the present invention in a case where a start-stop signal using the international telegraph alphabet J16.5 is targeted. In the drawing, 1 is a speed distortion detection device, 5 is a start element detector, 6 and 7 are timers, 8 is a pulse generator, 9 is a significant moment detector, 10 and 13 are counters, 12 is an accumulator, 1
4 is a comparator, 15 is a delay reference value setter, and 16 is an advance reference value setter.

Claims (1)

[Claims] 1. When detecting velocity distortion of a digital signal consisting of elements at unit intervals that take two significant states, for a plurality of elements in a series of digital signals that are a predetermined number from the synchronization element and have a significant moment, The difference between the significant moment of the element with respect to the regular significant moment based on the synchronization element is measured, and this difference is accumulated, and the cumulative value is based on the order of the element counted from the synchronization element and the number of times the difference is accumulated. A speed distortion detection method characterized in that it is determined that the digital signal has speed distortion when the digital signal deviates from a predetermined reference range.