JPS5820505B2 - CID signal detection device - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention is directed to a charge injection device.
The present invention relates to a signal detection device for onDevice (hereinafter abbreviated as CID).

Various types of imaging devices using semiconductors have been proposed, and recently charge-coupled devices have been proposed for the purpose of acquiring high-quality images.
vice (hereinafter referred to as CCD), CID, etc. have been put into practical use.

In particular, CID is excellent in terms of blooming, is suitable for high-speed driving, has a memory function, and is non-destructive for non-destructive readout by omitting the charge injection process.
It has many features such as being able to perform ive ReadOut (hereinafter referred to as NDRO).

Figure 1 shows a conventional CID light-receiving surface using silicon as a substrate and its imaging signal detection method.One section 1 surrounded by a dotted line corresponds to one pixel of the light-receiving surface, and this It consists of a pair of MOS gate electrodes 2 2X and 2Y arranged as follows.

Reference numeral 3 indicates a potential well generated on the silicon surface directly under the gate by application of a gate voltage, and 4 indicates a movable charge accumulated therein.

The operation of this CID will be explained step by step below.

First, a reference voltage Vs is applied to all the column (vertical) wirings (hereinafter referred to as After that, it is kept in a floating state by opening 81 to S4 again.

In addition, all row (horizontal) wiring (hereinafter referred to as Y bus) Y, ~
A voltage o having the same polarity and larger than Vs is applied to one end (the left end in FIG. 1) of Y4.

In this way, a difference in depth determined by the magnitudes of the bias voltages Vs and Vo is generated in the respective potential wells 3 immediately below the gate electrodes 2X and 2Y.

That is, a shallow well is formed directly below the gate 2X and a deep well is formed directly below the gate 2Y.

When an image is formed on the CID surface, the mobile charge 4 generated by photoexcitation is accumulated in the deep well on the right, and preparation for image signal detection is completed.

Next, if you select any one of the Y busbars, for example ¥3, and move its potential from Vo to zero (ground), the depth of the well directly under gate 2Y becomes zero, and all the movable charges 4 are transferred directly under gate 2X. is transferred to a shallow well.

Due to the image charge Q appearing on the gate 2X electrode due to this influence, a potential of 1-Qi/CGi is induced on the X bus line.

Here, cG is the gate capacitance, and the suffix i is i
Indicates the bus number.

In this state, the horizontal scanning circuit 10 selects the switch 811.
If you select one of ~814 and leave the others open while scanning the X bus group from left to right, the individual potentials (■) induced on all the X bus lines X1 to X4 will be
It can be sequentially supplied to the amplifier γ connected to the detection point 6.

Further, the voltage applied to the bus Y3 is returned from zero to Vo again, and another Y bus ¥4 is grounded, and scanning is performed in the same manner as described above.

The above steps cost ¥1. If you repeat this for ¥2,
Imaging for one screen is completed in one step.

At this point, by driving the reset terminal 8 and closing the switch 9, all the potential wells distributed over the entire surface of the CID imager disappear, and the accumulated charges 4 in the wells are injected toward the substrate, and all the data are It disappears from the silicon surface directly under 12X and 2Y.

Image readout for the next one screen is repeated again by the above procedure.

In conventional CID imaging devices, each pixel in the entire screen is
Since it is a method of scanning and sequentially reading out signals, it is sufficient to have one signal detection terminal 6, and thus one signal amplifier γ.

However, in reality, a part of the image signal distributed two-dimensionally over the image forming plane, for example, only one row in the horizontal direction, only one column in the vertical direction, or only a part thereof, can be identically distributed. We often encounter cases where we want to perform data processing by extracting all at once at time or by randomly reading out imaging plane signals, but it is impossible to meet these requirements with the conventional sequential readout method using X-Y scanning. It was impossible.

Further, in the case where random access for signal reading is enabled, the conventional scanning circuit must be replaced with a decoder, which has the disadvantage of complicating the circuit configuration considerably.

Therefore, the present invention proposes a new C
This is intended to provide an ID signal detection method, and will be described in detail using the drawings from FIG. 2 onwards.

FIG. 2a=b shows four basic modes for explaining the CID signal detection method according to the present invention, and the signal readout procedure is executed in the following order.

When accumulating movable charges excited by an image signal as shown in FIG. 2a, first apply the same bias voltage Vs to each bus line 5X, 5Y in both the The two wells 3 are formed to have the same depth to store the same amount of photo-excited movable charges 4 on the left and right sides corresponding to the intensity of the light-receiving surface image.

When reading out this accumulated signal in the horizontal direction, the second
As shown in the figure, after disconnecting the X bus lines 5X1 to 5X2 from the bias voltage Vs, the horizontal readout operational amplifier γX
If a voltage VSE of the same polarity lower than Vs is applied via the input terminals 1 to rX2, the left gate 2X
The potential well directly below becomes shallower, and the mobile charge 4 is transferred to the right gate 2.
They will all be moved to the deeper well directly below Y.

In this state, if any one of the X bus lines 5X1 to 5X2, for example 5Y2, is selected and grounded, the potential well 3 disappears immediately below the right gate 2Y in each picture element in the second row.

As a result, the mobile charge 4 existing in the right well is transferred to the left well, and due to the rapid increase in the charge in the left well, an image charge Qx is induced on the left gate 2X.

Therefore, the bus 5 to which the bias voltage VSF is applied
On X1, 5X2, Qx generated in each picture element in the second row
The photoelectric conversion signal voltages corresponding to . rx2 and can be taken out in parallel or all at once as a group of independent horizontal output voltages.

On the other hand, in the case of vertical readout, as shown in FIG.
After separating the bus lines 5Y1 to 5Y from the bias voltage Vs, operational amplifiers γY1 to γY2 for vertical signal reading are connected.
A voltage V of the same polarity lower than Vs is applied via the input terminal of
When SE is applied, the potential well immediately below the right gate 2Y becomes shallower, and all charges are transferred to the deeper well immediately below the left gate 2X.

In this state, any one of the X bus lines 5X1 to 5X2,
For example, if you select 5X2 and ground it, the potential well directly under the left gate 2X disappears in each picture element of 2Y1Ni, so
Charge is transferred to the right well, and as a result, an image charge Q is induced on the right gate 2Y.

Therefore, the X bus 5X to which the bias voltage V8E is applied
1 to 5X2, the photoelectric conversion signal voltages corresponding to Q generated in each picture element of the second column are taken out, respectively, and these signals are sent to the vertical readout amplifiers rY1. It is amplified by lY2 and taken out in parallel or all at once as an independent vertical output voltage group.

As described above, the signals of the entire surface of the CID imaging device are read out,
Next, in order to store a new image signal, it is necessary to eliminate the previous movable charge.

In this case, by grounding all the X and Y bus lines 5X and 5Y at once using switches, the potential wells directly under the gate electrodes 2X and 2Y are extinguished, and the movable charges in the wells are injected toward the substrate. By doing so and sweeping it away from the substrate surface, preparations can be made for imaging the next frame to be displayed subsequently.

As shown in FIG. 3, an embodiment of the present invention is based on the electrode bias switching procedure described above and the parallel or simultaneous detection method of each horizontal and vertical pixel signal group. This will be explained in detail using an example of a four-pixel configuration.

In FIG. 3, the right end of each of the Y bus groups Y1 to ¥4 includes charge amplifiers AY1 to AY provided for each X bus bar via switches SY1 to SY, which play a role as a vertical signal readout selection circuit. The amplifier output voltages are arranged so that they can be taken out independently in parallel or all at once for each X bus.

Similarly, the lower end of the X bus group X1 to X4 is connected to a switch SX1 that serves as a horizontal signal readout selection circuit.
~SX4 is connected to charge amplifiers AX1 to AX4 provided for each X bus, and each amplifier output voltage is connected to each X bus.
Each bus bar is connected independently in parallel or so that it can be taken out all at once.

Also, at the left end of the Y bus lines Y, ~Y4, there are switch groups ASY, ~ASY, which play the role of vertical address circuits.
4, and at the upper ends of the X bus lines X1 to X4, there are switch groups ASX1 to ASX1 to ASX1 to ASX1, which play the role of horizontal address circuits.
Contact 1 of all these switches is grounded, contact 2 is open end, and contact 3 is
are respectively wired to the bias voltage Vs.

Note that switches 5Y11 to 5Y14 and 5X11 to 5X14 span between the input and output terminals of each horizontal and vertical amplifier group.
The purpose is to remove the residual charge in the feedback capacitor Cf in advance by one opening/closing operation.

Now, open switches SX1 to SX, and switch SY1.
~SY, close, vertical address switch ASY1~
If you set all ASY4 to contact 2 and then set all address switches ASX1 to ASX4 to contact 3,
Vs〉■sE Therefore, among all picture elements, right gate 2Y
A shallow potential well is formed directly below, and a deep well is formed directly below the left gate 2X.

When imaging light is projected onto the CID surface, mobile charges generated according to the amount of light flow into the deep left well in each picture element and are stored, while the shallow wells are kept empty.

In this state, if only switch ASX1 is set to contact 1, the depth of the left well becomes zero in each picture element in a vertical row at the left end of the screen, and the charge in the left well is transferred to the right well.
Respective image charges are generated on each bus line from 1 to ¥4.

With this image charge group, the image signal group for one vertical column on the leftmost side can be read out all at once and in parallel as the respective outputs of the amplifiers AY1 to AY.

Figure 3 shows the state of simultaneous parallel readout of such vertical signals.
By sequentially switching and sweeping the switch to be turned down from ASXl to ASX, it is also possible to complete the entire frame.

In addition, for example, two adjacent switches among switches SX1 to SX4
By closing only ~3 pixels in advance, it is also possible to extract and read only 2 to 3 picture elements in the vertical direction.

On the other hand, open SX1 to SX4, and
Close the horizontal address switches ASX1 to A
If all of Become.

In this state, for example, if only the switch A S Yl is turned to contact 1, the depth of the right well becomes zero in each picture element connected to the upper horizontal row of the screen, and the charge in the right well is transferred to the left well. Then, image charges of each picture element are generated on each bus line of X1 to X, and this image signal group for one horizontal row is sent to amplifiers AX1 to A.
They are taken out all at once and in parallel as the output of X4.

Such horizontal signal readout can also be completed by sequentially switching and sweeping the switch whose contact point should be set to 1 from ASY1 to ASY, thereby completing the signal readout for the entire screen.

Also, as mentioned above, it is possible to extract only 2 to 3 pixels in any horizontal direction by closing, for example, only 2 to 3 adjacent pixels of the switches SX and ~SX4. This is similar to the case of vertical readout.

The above method is a two-dimensional reading method using parallel detection means for a so-called one-dimensional signal sequence of an image and sweeping means using either horizontal or vertical address circuits.

However, according to the CID signal readout device of the present invention, in addition to the above, full-screen readout using the X-Y sweep method for each unit pixel signal, which is performed in normal television image capture, is also possible. It is possible.

For example, in the vertical readout state of FIG.
After combining the output terminals of Y, ~AY, into one point as a new output terminal, horizontal scanning by a horizontal address circuit,
This objective is easily achieved in combination with a vertical sweep by successive activation of the vertical selection switches SY1 to SY4.

Of course, in the horizontal readout state, in contrast, the output terminals of the amplifiers AX1 to AX are combined into one point and a new output terminal is provided, and the vertical scanning by the vertical address circuit and the horizontal selection switch are performed. It is sufficient to use a combination with a horizontal sweep by sequentially applying SX1 to SX4.

In addition, in the CID imaging plane structure, each MOS gate is connected in parallel by the X or Y bus line, so if one of the gates generates an image charge Q on the bus line, all MOS gates are connected in parallel. At the same time, there is a risk that the potential of the image signal will be caused to drift, resulting in an undesirable situation in terms of the image signal detection technique.

In order to solve this problem, the present invention employs a charge amplifier as shown in FIG. 3 as a signal detection amplifier.

If the open loop gain of this charge amplifier is A and the feedback capacitance is Cf, the amplifier output voltage Vout is given by Vout=Q/Cf.

On the other hand, if you look at this amplifier side from the signal input terminal,
The input terminal is equivalent to having a capacitance given by 'A-Cf' connected to it, so due to the effect of this large capacitance, the potential drift on the gate wiring is extremely small. The signal detection technique problems mentioned above are completely resolved.

As described above, while the conventional CID signal detection method could only perform serial readout using Not only can readout or partial readout thereof be made possible, but also full screen readout by normal XY sweep is possible.

In particular, the ability to read horizontal and vertical components in parallel is extremely convenient and useful for performing signal processing for the purpose of band compression of image signals, character recognition, and the like.

Originally, in order to perform image processing signals, a photoelectric signal conversion element and a frame/frame that temporarily stores the output signal are required.
Memory is required.

Furthermore, if we rely on the conventional CID signal detection method, the image signal is given to the memory as a serial output, so the input circuit of the memory must be equipped with a serial-to-parallel converter. .

However, according to the configuration of CID signal detection according to the present invention,
Since the signal output can be read out in parallel in either the horizontal or vertical direction, such a special converter is not required at all.

Moreover, in addition to the imaging function, the CID itself also has a storage function (non-destructive storage function), so the entire frame memory can be omitted, which is extremely useful in terms of system simplification. It is.

[Brief explanation of drawings]

FIG. 1 is an explanatory diagram of the conventional CID image signal readout method,
FIG. 2 is an explanatory diagram of four modes that are the basis of the present invention, and FIG. 3 is an explanatory diagram of an embodiment of the CID image signal detection method according to the present invention. 1... CID unit picture element, 2X, 2Y...
...Gate electrode of MOS capacitor, 3... Potential well, 4... Mobile charge in well, 5X, 5
Y...Horizontal and vertical bus lines, 6...Image signal detection point, T...Signal amplifier, 8...
Reset terminal, 9...Reset switch transistor, 10...Horizontal scanning circuit, 11...
... Gate signal input terminal for applying bias voltage Vs, A
S
・・・Vertical direction selection circuit switch, SY1~SY,・
...Horizontal direction selection circuit switch, AY1 to AY
,...Charge amplifier for vertical component signal detection, AX1
~AX4...Charge amplifier for horizontal component signal detection.

Claims (1)

[Claims] 1 Gates of one and the other MOS capacitor elements forming each pixel of a CID device in which a picture element is formed by a pair of MOS capacitor elements provided adjacent to each other and the picture elements are arranged in a matrix. The horizontal and vertical busbar groups in which electrodes are connected in parallel in the horizontal force direction and the vertical direction, respectively, are separated, and a signal readout selection circuit in the horizontal and vertical directions and a charge amplifier for signal amplification are installed at one end of each busbar. 1. A CID signal detection device characterized in that the CID signal detection device is connected to the bus bar and further includes address circuits in horizontal and vertical directions at the other end of each of the busbars.