JPS5821506B2 - Gaibusingoudou Kigatahenkansouchi - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a conversion device that operates in synchronization with an external signal.

There are cases where it is desired to supply power from an inverter to a load such as a motor in synchronization with an external signal (for example, a commercial power source).

FIG. 1 shows a conventional device of this kind, in which electric power is supplied to a motor 1 from a voltage-controlled silice inverter 2. In FIG.

The output voltage of the inverter 2 is controlled by controlling the gate control circuit 3 using the output voltage and controlling the conduction phase of the thyristors forming the inverter.

The gate control circuit 3 must generate a gate signal to obtain an inverter output synchronized with the commercial frequency signal, but the commercial frequency signal must be directly transmitted to the gate control circuit 3.
phase lock without forming a gate signal in addition to
A gate signal is formed using a loop (hereinafter referred to as PLL) so that the inverter output is locked to the commercial frequency signal applied from the commercial frequency input terminal 4.

Reference numeral 5 denotes a phase comparison circuit, one input of which is connected to the commercial frequency input terminal 4 via a switch 6, and the other input connected to the output of the inverter 2.

This phase comparison circuit compares the phases of two inputs and generates a smoothed output corresponding to the difference.

T is a voltage controlled oscillator VCO, which outputs a frequency signal corresponding to the input voltage applied thereto.

A frequency divider 8 is connected to the output of the voltage controlled oscillator 7 via a switch 9.

Further, a fixed oscillator 10 is selectively connected to the input of the frequency divider 8 via a switch 9.

FIG. 2 specifically shows one example of the inverter 2. In FIG.

In this Sirisk inverter, DC power supply terminal 1
Four thyristors 13a, 13b, 1 between 1 and 12
3c and 13d are connected in a bridge type, and the output transformer 14
One end of the output transformer 14 is connected to the intermediate tap 16 of the commutation reactor 15 connected between the thyristors 13a and 13b, and the other end of the output transformer 14 is connected between the thyristors 13c and 13b.

Intermediate taps 18 of the commutation reactor 17 connected to the intermediate tap 18 are connected.

Note that 19a, 19b, 19c, and 19d are commutating capacitors, 20a, 20b, 20c, and 20d are diodes, and 21 is an output terminal.

To operate this inverter, thyristors 13a to 1
A gate signal as shown in FIGS. 3A to 3D is applied to the gate 3d.

As a result, when both thyristors 13a and 13b are in the on state, the output voltage in the first direction is obtained from the terminal 21, and when both the thyristors 13b and 13c are in the on state, the output voltage in the second direction is obtained. is obtained.

That is, an output voltage as shown in FIG. 3E is obtained.

When controlling the output voltage with this inverter, the phase of the gate signals C and D in FIG. 3 among the gate signals shown in FIG. 3 A to D provided from the gate control circuit 3 is shifted as shown by the dotted line. .

As a result, the output voltage changes as shown in FIG. 3E.

When operating the inverter 2 in synchronization with the commercial frequency signal in the circuit shown in FIG. 1, the switch 6 is turned on and the switch 9 is turned on to the contact a side.

Thereby, the commercial frequency signal as a reference signal and the inverter output signal as a comparison signal are input to the phase comparator circuit 5, and the phase of the inverter output signal is controlled by PLL operation so as to match the commercial frequency signal.

When the commercial frequency signal becomes abnormal, the switch 9 is turned on to the connection point side, and a gate signal is generated based on the output of the fixed oscillator 10.

If the inverter control circuit is configured as a PLL as described above,
It is possible to obtain an inverter output synchronized with an external reference signal (commercial frequency signal).

However, this conventional circuit sometimes fails to start smoothly.

That is, since no voltage is generated at the output of the inverter 2 in this conventional circuit when it is started, the operation of the phase comparison circuit 5 is prohibited, and the voltage controlled oscillator 6 is free-running without being controlled by the phase comparison output. This free-running oscillation output forms a gate signal for the inverter 2, and the inverter 2 is activated.

When the inverter 2 is started, the switch 6 is turned on to activate the phase comparator circuit 5 and switch to PLL operation.

When switching to this PLL operation, in order to synchronize the output of inverter 2 with the commercial frequency signal, a sudden change in the frequency and phase of the inverter occurs, which may saturate the inverter transformer, cause commutation failure, or cause the motor load to change. Mechanical shock may be applied.

The object of the present invention is to provide a conversion device in which the above-mentioned defects are corrected.

1. An external signal synchronous conversion device according to the present invention capable of achieving the above object includes a phase comparison circuit that generates a phase comparison output between a reference frequency signal and a signal to be compared, and a comparison output of the phase comparison circuit. a controlled oscillator that generates a corresponding frequency signal; a divider that divides the output frequency signal of the controlled oscillator and generates a plurality of divided outputs having the same period but different phases; a control circuit that forms an inverter control signal based on the output of the inverter; a voltage-controlled inverter that is driven by the control signal obtained from the control circuit and supplies a predetermined output i to a load; a first feedback circuit that feeds back the divided output of the divider having a phase substantially equal to the phase of the inverter output voltage at the time of completion of starting up the inverter to the phase comparison circuit; a second circuit that feeds back the signal to the phase comparator circuit;
and a feedback circuit.

The reference frequency signal of the present invention is, for example, a commercial frequency signal.

The controlled oscillator is preferably a voltage controlled oscillator, but is not limited to this, and may be a current controlled oscillator, an optically controlled oscillator, or the like.

It is desirable that this controlled oscillator is one that sends out a predetermined frequency signal by free-running oscillation when no phase comparison output is input.

The divider generates outputs having the same frequency division ratio and a phase difference of 30 degrees, for example.

The inverter is an inverter made of conversion elements such as silices or transistors.

By configuring the converter as described above, fluctuations in frequency and phase can be extremely reduced when the inverter is operated in synchronization with the reference frequency signal.

Next, one embodiment of the present invention will be described with reference to FIG.

However, in FIG. 4, the parts indicated by reference numerals 1 to 8 have substantially the same functions as the parts with the same reference numerals in FIG. 1, so their explanation will be omitted.

In this embodiment, the output of the frequency divider 8 is provided with a plurality of output terminals 31a to 31e. It is possible to obtain circumferential output.

A first feedback circuit 33 is provided which connects a selected frequency divider output terminal, for example 31c, to an input terminal 32 of the phase comparison circuit 5 for signals to be phase-compared via a changeover switch 34.

Further, a second feedback circuit 35 is provided which extends from the output of the inverter 2 to the input terminal 32 of the phase comparison circuit 5 via a changeover switch 34.

If the inverter 2 is now started with no load, the output terminal 31c for configuring the first feedback circuit 33 will provide a divided output with a phase approximately equal to the phase of the inverter output when the no-load start is completed. It has become a thing.

In this embodiment, when starting the inverter 2, the switch 6 is turned on, the switch 34 is switched to the contact a side,
For example, a commercial frequency signal is applied to the input terminal 4 as a reference frequency signal.

As a result, the phase and frequency of the output signal obtained from the output terminal 31c of the frequency divider 8 are adjusted to the standard commercial The frequency signal is locked substantially equal to the phase and frequency of the signal.

The output terminal 31a of the frequency divider 8 outputs a signal having a predetermined phase difference from the phase of the signal at the output terminal 31c, and this signal is applied to the gate control circuit 3.

The gate control circuit 3 forms gate signals as shown in FIGS. 3A to 3D based on this frequency-divided output signal.

The reason for providing a phase difference between the frequency-divided output signal applied to the first feedback circuit 33 and the frequency-divided output signal applied to the gate control circuit 3 is because the output voltage of the inverter 2 is controlled to a constant voltage. When there is no load, the pulse width of the output is, for example, 3rd.
This is because it is narrow as shown by the dotted line in Figure E, and does not necessarily match the phase of the output signal of the frequency divider 31a.

The output terminal of the frequency divider to which the feedback circuit 33 is connected is connected to a terminal from which a frequency-divided output J that matches the phase of the no-load output signal of the inverter 2, for example, the signal indicated by the dotted line in FIG. 3E, can be obtained. Ru.

When the startup of the inverter 2 is completed, the switch 34 is switched to the contact side.

As a result, a closed loop consisting of the phase comparator circuit 5, voltage controlled oscillator 1, branching unit 8, gate control circuit 3, inverter 2, and second feedback circuit 34 is formed, and the frequency of the output signal of the inverter 2 is and phase are equal to the frequency and phase of the commercial frequency signal.

Even if the switch 34 is switched from contact a to contact b, the first signal is approximately equal to the no-load output of the inverter 2 before switching.
Since the phase comparison output is applied from the feedback circuit 33 to the phase comparison circuit 5, the phase comparison output hardly changes.

Therefore, the inverter 2 is not controlled by the gate control circuit 8 so that the phase and frequency change rapidly.

As a result, the inverter extremely smoothly enters synchronous operation with the commercial frequency signal, and commutation failures and the like do not occur.

In the device of this embodiment, if the commercial frequency power supply fails, the voltage controlled oscillator 7 free-runs oscillation at a predetermined frequency and continues to supply the gate signal.

Although one embodiment of the present invention has been described above, the present invention is not limited to the above-described embodiment and can be further modified.

For example, based on the present invention, the inverter 2 may be configured as a multiple inverter, and the frequency divider 8 may be used to form the control signal.
A plurality of frequency-divided outputs having different phase differences may be sent from the gate control circuit 3 to the gate control circuit 3.

In this case, the first feedback circuit 33 may be coupled to a selected one of the divided outputs sent to the gate control circuit 3.

Furthermore, a phase shifter may be provided between the switch 34 and the phase comparison circuit 5 to obtain an inverter output having a constant phase difference with respect to the commercial frequency signal.

[Brief explanation of the drawing]

Figure 1 is a block diagram of a conventional external signal synchronous conversion device.
FIG. 2 is a circuit diagram specifically illustrating the inverters shown in FIGS. 1 and 4, FIG. 3 is a waveform diagram of each part of the inverter shown in FIG. 2, and FIG. 4 is an external diagram of an embodiment of the present invention. FIG. 2 is a block diagram of a signal synchronous conversion device. In the symbols used in the drawings, 2 is an inverter, 3 is a gate control circuit, 4 is a commercial frequency input terminal, 5 is a phase comparison circuit, 7 is a voltage controlled oscillator, 8 is a frequency divider, 31
A to 31e are output terminals, 33 is a first feedback circuit, 34 is a switch, and 35 is a second feedback circuit.

Claims (1)

[Claims] 1. A phase comparison circuit that generates a phase comparison output between a reference frequency signal and a signal to be compared; a controlled oscillator that generates a frequency signal corresponding to the comparison output of the phase comparison circuit; and the controlled oscillator. a frequency divider that divides the output frequency signal of the divider and generates a plurality of divided outputs having the same period but different phases; and a control circuit that forms an inverter control signal based on the output of the divider. a voltage controlled inverter that is driven by a control signal obtained from the control circuit and supplies a predetermined output to the load; a first feedback circuit that feeds back the frequency-divided output of the frequency divider to the phase comparison circuit; and a second feedback circuit that feeds back the output signal of the inverter to the phase comparison circuit after the inverter is started. External signal synchronous conversion device.