JPS5821985B2 - Signal discrimination circuit for automatic channel selection equipment - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a signal discrimination circuit suitable for a television receiver equipped with an automatic channel selection device that automatically performs channel selection operations.

In general, in television receivers, tuning is often done by rotating the channel heir, but especially when using continuously variable tuning operations such as when selecting UHF channels, the tuning operation is cumbersome and troublesome. Ta.

In addition, in the case of television receivers equipped with touch-type or remote-control type tuning devices, the tuning operation when changing channels is easy, but the preset tuning operation at the time of initial installation is still troublesome and requires inexperienced amateurs. It was difficult.

Therefore, automatic tuning devices that automatically perform such tuning operations have been proposed in the past, but the present invention relates to a signal discrimination circuit used in such automatic tuning devices, and relates to a signal discriminating circuit that is used in such automatic tuning devices, and In order to reliably receive a television signal that arrives mixed with noise, a circuit is provided that determines whether a received signal is a regular television signal or not.

This type of signal discrimination circuit has already been developed by the same applicant in Japanese Patent Application No.
51528C (see Japanese Patent Laid-Open No. 53-135513), the present invention is intended to further improve the prior art.

The signal discrimination circuit of the prior application discriminates signals by detecting the AFT detection output waveform (hereinafter simply referred to as an S curve), the presence or absence of a vertical synchronization signal, and counting the number of synchronization signals. In addition, a circuit for detecting the synchronization state of a horizontal or vertical synchronization signal is added to further improve signal discrimination accuracy.

DETAILED DESCRIPTION OF THE INVENTION The present invention will be described below with reference to the drawings, but first an automatic channel selection device in which a signal discrimination circuit according to the present invention is used will be described.

FIG. 1 is a block diagram showing an example of a television receiver having an automatic channel selection device, where 1 is an antenna, 2 is a tuner, 3 is an intermediate frequency circuit, 4 is an AFT circuit, and 5 is a video circuit, 6 is a synchronous separation circuit, 7 is a deflection circuit, 8
is a picture tube, and these constitute a normal television receiver.

Here, a start/stop circuit 9, a tuning voltage generating circuit 10, a memory circuit 11, and a signal discriminating circuit 12 are added to these to form an automatic tuning device.

When a search start command (automatic tuning command) is given to the start/stop circuit 9 during preset tuning, a search start pulse is generated from the circuit 9 and supplied to the tuning voltage generation circuit 10.

At this time, the tuning voltage generating circuit 10 generates a sweep voltage or staircase voltage that gradually increases or decreases, and this is supplied as a tuning voltage to the tuning diode of the tuner 2 via the memory circuit 11.

Therefore, at this time, the receiving frequency at the tuner 2 is gradually changed.

When the television radio waves of the current channel are received in this way, a television video signal is derived from the intermediate frequency circuit 3, and in conjunction with this, a synchronization signal is derived from the synchronization separation circuit 6 and supplied to the start/stop circuit 9.

On the other hand, the AFT detection output from the AFT circuit 4 is also supplied to the start/stop circuit 9.

First, when the AFT detection output voltage is derived from the AFT circuit 4 (at this point, it is not in an accurate reception state again), a sweep voltage or a staircase voltage is generated by the tuning voltage generation circuit 10 in response to the AFT detection output voltage. In other words, the rate of change of the tuning voltage is reduced, resulting in a slower search operation.

Next, when the television radio wave is correctly received during this low-speed search operation, the polarity of the AFT detection output voltage changes, so this time is detected and the search start pulse is generated from the start/stop circuit 9. It was stopped (
At this time, the search stop pulse may be generated separately), and accordingly, the generating circuit 10 stops the sweep wave (or staircase wave) generation operation, and thereafter this instantaneous voltage is held and this is used for tuning. Memory circuit 1 as voltage
1 to the tuner 2.

On the other hand, at this time, the vertical synchronization signal derived from the synchronization separation circuit 6 is supplied to a signal discrimination circuit 12, where it is discriminated whether or not the signal is a regular television signal.

When it is determined that this is a regular signal, a memory command is derived from the signal discrimination circuit 12, and the command is supplied to the memory circuit 11, which causes the memory circuit 11 to receive a tuning voltage supplied from the tuning voltage generation circuit 10. is stored in memory.

However, when a pseudo synchronization signal is derived from the synchronization separation circuit 6, it is detected by the signal discrimination circuit 12, and the circuit 12 generates a re-search start pulse.

This pulse is supplied to the start/stop circuit 9, whereby the same operation as when the above-mentioned first search start command was given is repeated again.

In this way, the same operation is repeated until a regular television vertical synchronization signal is derived from the synchronization separation circuit 6, that is, until correct reception is performed by the tuner 2, and only when the reception state of a certain channel is accurately achieved is the signal discrimination circuit 12
A memory command is issued from the memory circuit 11, and the tuning voltage at this moment is stored in the memory circuit 11. From then on, this memory voltage is supplied from the memory circuit 11 to the tuner 2.

Once the preset tuning operation for a specific channel as described above is performed, if a tuning command is given to this memory circuit 11 by touch or remote control during normal channel selection, the memory circuit 11 will be The memory voltage is supplied to the tuner 2 as a tuning voltage, and this channel is selectively received.

Although only one memory circuit 11 is shown here, similar memory circuits are actually provided for the same number of preset stations, and the tuning voltage stored in each memory circuit can be used for preset tuning operation (automatic tuning). operations) are sequentially performed by operations similar to those already described.

The present invention relates to a signal discrimination circuit used in the above-mentioned automatic channel selection device, and is a further improvement of the invention of the above-mentioned prior application.

That is, in the invention of the earlier application, a counter for signal discrimination is used to determine whether or not there are a predetermined number of synchronization signals within a certain period of time, and based on the number of synchronization signals, it is determined whether or not the signal is a regular television signal. However, in this case, when the above automatic tuning operation is performed on a television receiver with poor out-of-band characteristics, the audio carrier wave is confused with the video carrier wave, and the search stop occurs even when this audio carrier wave is detected. A synchronization signal appears along with the pulse, activating the signal discrimination circuit, and there is a risk that an incorrect tuning voltage may be stored in memory.

Therefore, in the present invention, in the signal discrimination circuit 12, in addition to the signal discrimination counter 13 that counts the synchronization signals and discriminates whether or not the synchronization signal is a regular synchronization signal depending on whether or not there are a predetermined number of synchronization signals within a certain period of time, Alternatively, a synchronization state detection circuit 14 for detecting a vertical synchronization state is provided, and the AND gate 15 is opened only when a normal synchronization state is detected in the detection circuit 14, and the memory command obtained from the signal discrimination counter 13 is sent to the AND gate. 15 to the memory circuit 11, and only then is the memory operation performed.

FIG. 2 shows a specific configuration diagram of the signal discrimination circuit 12, particularly the synchronous state detection circuit 14, of the present invention.

Here, the synchronization signal obtained from the synchronization separation circuit 6 is
1, R, and capacitors C1 and C2, only the horizontal synchronizing signal component is separated in frequency and applied to the base of the phase detection transistor Q0.

On the other hand, the horizontal flyback pulse obtained from the deflection circuit 7 is divided by resistors R3 and R4 and applied to the emitter of the transistor Q1 via the diode D□.

Here, when the horizontal synchronization state is in a normal synchronization state, the phases of the negative horizontal synchronization signal and the horizontal flyback pulse match, so at this time, the detection transistor Q1 becomes conductive, and the resistor R5 and capacitor C3 The collector potential of Q1 is increased, that is, the collector potential is “H”.
“A signal is obtained.

This H signal is applied to one input terminal of AND gate 15 via resistor R6, and AND gate 15 is opened.

Therefore, when a regular television signal is now received and a memory command signal is derived from the signal discrimination counter 13, it is supplied to the memory circuit 11 via the AND gate 5, where a tuning voltage memory operation is performed.

However, if the horizontal synchronization state is abnormal, the phases of the horizontal synchronization signal and the horizontal flyback pulse do not match, so the detection transistor Q1 does not conduct, and the AND gate 15
remains closed.

Therefore, even if an incorrect memory command is derived from the signal discrimination counter 13 at this time, it will not be supplied to the memory circuit 11.

In this way, in this embodiment, the memory command is derived only when the horizontal synchronization signal and the horizontal flyback pulse are in a normal horizontal synchronization state in phase, so when the AFT circuit 4 detects an audio carrier wave, the signal discrimination counter 1
Even if a memory command is erroneously derived from 3, since the horizontal synchronization state is disturbed at this time, this memory command will not be supplied to the memory circuit 11, and no memory operation will be performed using the erroneous tuning voltage.

In the above embodiment, it is detected whether the horizontal synchronization state is normal or not, but it is of course possible to detect the vertical synchronization state.

[Brief explanation of drawings]

FIG. 1 is a block diagram of a television receiver using an automatic channel selection device according to the present invention, and FIG. 2 is a circuit configuration diagram of an embodiment of a signal discrimination circuit according to the present invention. 1...Antenna, 2...Tuner, 3
...Intermediate frequency circuit, 4...AFT circuit, 5...Video circuit, 6...Synchronization separation circuit, 7...Deflection circuit , 8... picture tube,
9...Start/stop circuit, 10...
... Synchronous voltage generation circuit, 11 ... Memory circuit, 12 ... Signal discrimination circuit, 13 ... Signal discrimination counter, 14 ... Synchronous state detection circuit ,
15...and gate.

Claims (1)

[Claims] 1. A start/stop circuit that detects a search start command signal for an automatic channel selection operation and an incoming television signal and derives a search start signal and a search stop signal, respectively, and the search start signal and search stop signal. a tuning voltage generation circuit whose operation is controlled by the tuning voltage generation circuit; a memory circuit that stores the tuning voltage obtained from the tuning voltage generation circuit; A signal discriminating circuit that gives a memory command to the memory circuit when the memory circuit is not normal, and a signal discrimination circuit that gives a re-search start command to the start/stop circuit when it is not normal; and means for supplying the tuning voltage obtained from the memory circuit to the tuner. The channel selection device includes a signal discrimination counter that counts the number of television synchronization signals and determines whether the signal is a regular signal, a synchronization state detection circuit that detects whether the synchronization state is normal, and a synchronization state detection circuit that detects whether the synchronization state is normal or not. 1. A signal discriminating circuit for an automatic channel selection device, comprising a gate circuit that performs an AND gate between the output and the detection output of the detection circuit to derive a memory command. (2) A signal discrimination circuit for a patented automatic channel selection device, characterized in that the synchronization state detection circuit is provided with phase detection means for a horizontal synchronization signal and a horizontal flyback pulse.