JPS5822836B2 - 磁気バブルドメインのための交差接続 - Google Patents
磁気バブルドメインのための交差接続Info
- Publication number
- JPS5822836B2 JPS5822836B2 JP54026081A JP2608179A JPS5822836B2 JP S5822836 B2 JPS5822836 B2 JP S5822836B2 JP 54026081 A JP54026081 A JP 54026081A JP 2608179 A JP2608179 A JP 2608179A JP S5822836 B2 JPS5822836 B2 JP S5822836B2
- Authority
- JP
- Japan
- Prior art keywords
- information
- cross
- propagation path
- input
- propagation
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
- H03K19/02—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
- H03K19/16—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using saturable magnetic devices
- H03K19/168—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using saturable magnetic devices using thin-film devices
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C19/00—Digital stores in which the information is moved stepwise, e.g. shift registers
- G11C19/02—Digital stores in which the information is moved stepwise, e.g. shift registers using magnetic elements
- G11C19/08—Digital stores in which the information is moved stepwise, e.g. shift registers using magnetic elements using thin films in plane structure
- G11C19/0875—Organisation of a plurality of magnetic shift registers
- G11C19/0883—Means for switching magnetic domains from one path into another path, i.e. transfer switches, swap gates or decoders
Landscapes
- Physics & Mathematics (AREA)
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Computing Systems (AREA)
- General Engineering & Computer Science (AREA)
- Mathematical Physics (AREA)
- Multi Processors (AREA)
- Data Exchanges In Wide-Area Networks (AREA)
- Use Of Switch Circuits For Exchanges And Methods Of Control Of Multiplex Exchanges (AREA)
- Printers Or Recording Devices Using Electromagnetic And Radiation Means (AREA)
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US88697278A | 1978-03-15 | 1978-03-15 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS54127637A JPS54127637A (en) | 1979-10-03 |
| JPS5822836B2 true JPS5822836B2 (ja) | 1983-05-11 |
Family
ID=25390182
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP54026081A Expired JPS5822836B2 (ja) | 1978-03-15 | 1979-03-05 | 磁気バブルドメインのための交差接続 |
Country Status (6)
| Country | Link |
|---|---|
| JP (1) | JPS5822836B2 (sv) |
| DE (1) | DE2910285C2 (sv) |
| GB (1) | GB2016836B (sv) |
| IT (1) | IT1114453B (sv) |
| NL (1) | NL7901493A (sv) |
| SE (1) | SE443470B (sv) |
Family Cites Families (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US3543255A (en) * | 1969-06-18 | 1970-11-24 | Bell Telephone Labor Inc | Single wall domain apparatus having intersecting propagation channels |
| GB1381186A (en) * | 1972-04-06 | 1975-01-22 | Connollys Blackley Ltd | Method of and apparatus for impregnating and coating stranded bodies |
| JPS5623077B2 (sv) * | 1972-04-24 | 1981-05-28 | ||
| JPS5214066B2 (sv) * | 1972-06-06 | 1977-04-19 | ||
| US4040018A (en) * | 1975-03-07 | 1977-08-02 | International Business Machines Corporation | Ladder for information processing |
-
1979
- 1979-02-21 GB GB7906126A patent/GB2016836B/en not_active Expired
- 1979-02-26 NL NL7901493A patent/NL7901493A/xx not_active Application Discontinuation
- 1979-03-05 JP JP54026081A patent/JPS5822836B2/ja not_active Expired
- 1979-03-07 SE SE7902045A patent/SE443470B/sv unknown
- 1979-03-13 IT IT48331/79A patent/IT1114453B/it active
- 1979-03-15 DE DE2910285A patent/DE2910285C2/de not_active Expired
Also Published As
| Publication number | Publication date |
|---|---|
| GB2016836A (en) | 1979-09-26 |
| SE7902045L (sv) | 1979-09-16 |
| DE2910285A1 (de) | 1979-09-20 |
| IT7948331A0 (it) | 1979-03-13 |
| IT1114453B (it) | 1986-01-27 |
| NL7901493A (nl) | 1979-09-18 |
| GB2016836B (en) | 1982-02-10 |
| SE443470B (sv) | 1986-02-24 |
| JPS54127637A (en) | 1979-10-03 |
| DE2910285C2 (de) | 1983-03-31 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| US5490074A (en) | Constant delay interconnect for coupling configurable logic blocks | |
| US5255203A (en) | Interconnect structure for programmable logic device | |
| US5260881A (en) | Programmable gate array with improved configurable logic block | |
| US5233539A (en) | Programmable gate array with improved interconnect structure, input/output structure and configurable logic block | |
| US5208491A (en) | Field programmable gate array | |
| JP3083813B2 (ja) | プログラム可能論理装置 | |
| US5684980A (en) | FPGA virtual computer for executing a sequence of program instructions by successively reconfiguring a group of FPGA in response to those instructions | |
| KR920004936A (ko) | 프로그래머블 로직소자의 입력/출력 마크로셀 | |
| WO1987001485A1 (en) | A data processing device | |
| JPH0817502B2 (ja) | ネットワーク及び所与ネットワークの変更版形成方法 | |
| US4075611A (en) | Consecutive bit access of magnetic bubble domain memory devices | |
| JPS5822836B2 (ja) | 磁気バブルドメインのための交差接続 | |
| US3753253A (en) | Magnetic domain switching matrix and control arrangement | |
| US3751597A (en) | Time division multiplex network switching unit | |
| US4346455A (en) | Crossover junction for magnetic bubble domain circuits | |
| JP2000207364A (ja) | 制御信号を搬送するパイプラインを使用してデータを搬送するパイプラインを制御するための方法およびモジュール | |
| US3983383A (en) | Programmable arithmetic and logic bubble arrangement | |
| US20250279773A1 (en) | Plane transitioning at a global switch box | |
| US4085451A (en) | Bubble domain circuit organization | |
| US4198691A (en) | Compact exchange switch for bubble domain devices | |
| Habib et al. | Technology mapping algorithms for sequential circuits using look-up table based FPGAS | |
| WO2025188576A1 (en) | Plane transitioning at a global switch box | |
| JPH02305212A (ja) | 経路の敏感化を利用する広帯域空間スイッチ | |
| JPS61105195A (ja) | オメガネツトワ−クのセツテイング方式 | |
| US4384344A (en) | Layout for single level block access chip |