JPS582550B2 - Gate turn-off switch - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a protection device for a gate turn-off thyristor (GTO) that detects and protects the operating state of the GTO by monitoring the voltage between the gate and cathode when the gate turn-off thyristor (GTO) is used as a power control element. .

GTO is a semiconductor device with a three-terminal four-layer PNPN structure having an anode A, a cathode K, and a gate G, as shown in Figure 1a, and is a thyristor that can be turned on by a positive gate signal and turned off by a negative gate signal. It is also frequently used as a power control element.

The operating gain G of this GTO is G=IA/I, where the anode current is IA and the gate current peak value is IGP.
It is indicated by GP.

In this GTO operation, 100 ampere class GTO
Here, the operating gain G is selected to be 2 to 3 times the operating gain, and the accumulation time at that time is approximately 3 to 4 μs.

When this GTO is installed and operated in a device, there is an optimum operating gain, and if it is operated at a gain greater than that operating gain, it will cause an unnecessarily long accumulation time, and in addition, This may lead to an increase in switching loss and damage to the GTO.

Furthermore, if the operating gain becomes extremely large due to voltage fluctuations or overload of the gate pulser, the GTO will not lose its current cutting ability, and depending on the circuit, a power short circuit may occur and the GTO may be damaged.

Conventionally, GTO detection detects the magnitude of the anode current,
When the magnitude exceeds a certain value, protection is provided by tripping the no-fuse breaker in the main circuit.

However, in this method, detection and control are performed in the main circuit's high-voltage section, making handling inconvenient and troublesome.

By the way, in a GTO, by monitoring the electrical characteristics between the gate and the cathode, it is possible to determine the operating state of the GTO, that is, whether the operating gain is appropriate or inappropriate.

Therefore, GTO protection is possible by monitoring the electrical characteristics between the gate and the cathode.

This point will be considered below with reference to FIGS. 1b and 1c.

Figure b shows an operating circuit, EB and RL are a DC variable power supply and a load resistor that constitute the main circuit, and the anode A and cathode K of the GTOS are inserted in series with the load RL with the polarities shown.

The gate G and cathode K of GTOS are connected to a resistor RON on the gate G side, a diode DON with the polarity shown, and a resistor ROF.
The control circuit is connected to the gate pulser CP through a parallel circuit of F and a diode DOFF of the polarity shown.

A diode DE of the illustrated polarity and a constant voltage diode ZB between the gate G and cathode K are a protection circuit for the gate G and cathode K.

In this circuit shown in figure b, if a positive voltage on-gate pulse EON is supplied from the gate pulser GP to the gate G through the resistor RON and diode DON, GTOS becomes conductive, and a negative voltage off-gate pulse EOFF is supplied from the gate pulser GP to the resistor ROFF, If it is supplied to the gate G through the diode DOFF, GTOS becomes non-conductive.

Figure c schematically shows the relationship between the operational gain and storage time of this GTO.

Using this diagram c, consider the case of curve (1) where the operating gain is small.

Assuming that an on-gate pulse EON is applied to the gate G of the GTOS at time t1, the GTOS becomes conductive.

Next, when an off-gate pulse EOFF is applied to the gate G of GTOS at time t2, this off-gate pulse EOFF continues until time t5.

This pulse width is determined by the gate pulser GP, and is often set to about 30 to 40 μs.

At time t3, when the off-gate pulse is applied, the reverse polarity of the junction J1 in figure a is restored, but at this time the anode current IA has begun to decrease, and the gate G of the GTO,
The polarity of voltage VGK between cathode K is reversed.

Here, the time between time t2 and t3, that is, the time from the start of application of the off-gate pulse until the anode current IA starts to decrease, is the accumulation time, and this is calculated as Ts・ist(1)
Let's write it as =t3-t2.

The time from when the anode current IA starts decreasing at time t3 until it becomes zero is not shown, but is known as the fall time Tf of the anode current IA, and switching loss occurs during turn-off during this Tf. ing.

This time Tf is also affected by the gain of the GTO,
It is known that Tf tends to increase as the operating gain increases.

After the anode current IA becomes zero, the gate pulser GP continues to apply the off-gate pulse until time t5.

Next, consider the case where the operating gain of curve (2) is large.

This curve (2) is for example when the anode current IA is increased by decreasing the load resistance RL.

In this case, the period from time t1 to t2 is the same as curve (1).

In this case, the accumulation time Ts·ist(2)=t33−t2 is the period from when the off-gate pulse is applied at time t2 until time t33 when the anode current IA starts to decrease.

As is clear from the figure, the accumulation time when the operating gain is large is longer than the accumulation time when the operating gain is small.
Ts-ist(2)>Ts·iSt(1).

That is, the larger the operating gain, the longer the accumulation time tends to be, and the longer the current fall time described above also tends to be.

From these facts, it can be seen that it is possible to understand the operating gain by monitoring the GTO accumulation time.

Here, attention is paid to the gate-cathode voltage waveform VGK in diagram C.

The timing of the inversion of the voltage of VGK almost coincides with the start of falling of the anode current IA.

Therefore, by monitoring the time from time t2 when the off-gate pulse is applied to time t3 (or T33) when the voltage of VGK is reversed, the operational gain of the GTO can be indirectly understood.

Since the timing of this voltage reversal of voltage VGK can be detected by logical judgment, it is possible to detect an accumulation time of about 3 to 4 μs, for example.

Further, the voltage VGK has the advantage of being easy to handle since it is a quantity of electricity of a weak current section.

The present invention thus provides a GTO protection device that detects the GTO operating gain by monitoring the GTO gate-cathode voltage VGK and prevents the GTO from being damaged due to inappropriate operating gain. With the goal.

Hereinafter, one embodiment of the present invention will be described with reference to the drawings.

In FIG. 2, 1 is a direct current power supply, and 2 is a no-fuse breaker equipped with a tripping coil 3.

It is assumed that 1A is excluded for the time being.

4 is a load, and 5 is a GTO, which constitute the main circuit A of the heavy electric section.

Here, for convenience, it is assumed that the GTO 5 is used in a chopper circuit.

6 is a gate pulser that generates ON and OFF gate pulses of the GTO 5; a limiting resistor 7 and a diode 8 with the polarity shown are a circuit for passing the ON gate pulse from the gate pulser 6; a limiting resistor 9 and a diode 10 with the polarity shown are the gate pulser 6;
A diode 11 and a constant voltage diode 12, which pass the off-gate pulse from the GTO 5, are circuits that protect between the gate G and the cathode K of the GTO 5, and these constitute a control circuit B of the weak current section.

The gate pulser 6 not only generates the on/off gate pulse VG supplied to the gate G of the GTO 5 as shown in FIG. When inputting an interrupt, stop the normal on and off gate pulses,
An emergency on-gate pulse (or off-gate pulse) can be generated, and an off-gate pulse OFF application period signal 107 of the GTO5 and a reference value indicating that the operational gain of the GTO is inappropriate when that time is exceeded are generated. Maximum accumulation time Ts・soll signal 1 with a certain time width
It has the function of generating 10.

Next, the accumulation time comparison circuit C having a logic circuit configuration will be explained.

15 is the voltage VGK between the gate G and cathode K of GTO5
A positive voltage detection and waveform shaping circuit receives the voltage VGK and produces a logic "1" output signal 106 when the voltage VGK is positive.

That is, the signal 106 is a "VGK positive voltage signal" which becomes logic "1" when the voltage VGK is positive. For example, in FIG. 3, the anode current IA of the GTO 5 starts falling from t1 when the on-gate pulse ON is applied. This signal remains "1" until time t3.

This signal 106 is applied to the AND circuit 1 along with the signal 107.
6 is input.

The signal 107 is a signal that becomes "1" while the off-gate pulse OFF of GTO5 is generated as shown in FIG. 3b.
From the AND gate 16, “Actual accumulation time Ts・ist
A signal "109" will be output.

This signal 109 is a logic signal having a pulse width that matches the storage time of GTO5.

On the other hand, the maximum accumulation time Ts・soll signal 110 is inverted by the inverter 17, and the "actual accumulation time Ts-is" is
t signal" 109 and is input to the AND circuit 18.

For example, in a steady state when the accumulation time shown in the left half A of FIG.
is the inverted signal 1 of the maximum accumulation time Ts・soll signal 110
Since it is smaller than 12, the AND circuit 18 does not produce a "1" output.

Next, the operation when the accumulation time exceeds a predetermined time will be explained.

If the operating gain becomes inappropriate due to voltage fluctuations of the gate pulser 6 or the proper load of the main circuit section A, and the accumulation time increases, the actual accumulation time Ts. ist signal 109 is the maximum accumulation time T
becomes larger than the s.soll signal, and the signal 109 and signal 1
A state in which twelve “1” signals overlap appears (at time t30
), the GTO is output from the AND circuit 18 as shown in FIG.
A GTO operating gain excessive signal 114 is output indicating that the operating gain of GTO 5 has become dangerously excessive.

When the “1” output 114 is output from the AND circuit 18,
Flip-flop 13 is set and its set output 11
6 is given to the gate pulser 6 as an interrupt input.

When this interrupt input 116 is input, the gate pulser 6
As described above, the normal on-gate and off-gate pulse generation is stopped, and instead, an on-gate pulse is applied to the gate G of the GTO 5 by an interrupt.

On the other hand, at the same time as the on-gate pulse is generated due to the interrupt, the "1" output 114 of the AND circuit 18 is given to the trip signal amplification circuit 19, and after being amplified by this circuit 19, it is given to the tripping coil 3 of the no-fuse breaker 2. By energizing this coil 3, the no-fuse breaker 2 is pulled out.

A reset push button switch 20 sends a reset signal to the flip-flop 13.

The above is the circuit configuration.

Next, the operation of this circuit will be explained.

As is clear from the above description, if the GTO is operated at an inappropriate operating gain, switching loss at turn-off increases, which may lead to characteristic deterioration or damage.

Therefore, when using GTO, it is necessary to maintain the operating gain within the optimal (or operationally safe) range, and if you find that the operating gain is inappropriate during operation, immediately stop the device. It is necessary to secure the GTO by doing so.

The circuit shown in FIG. 2 attempts to carry out this protective operation by monitoring the voltage between the gate and cathode of the GTO.

In FIG. 3, the operating gain is within an appropriate range from time t1 to t5, and operation may be continued in this state.

Next, an off-gate pulse is applied to the GTO5 at time t20, and the turn-off process begins, but the accumulation time is extended because the operating gain is too large, and therefore, at time t30, the GTO5
A TO operating gain excessive signal 114 is generated.

In this state, the equipment must be shut down to protect the GTO.

Simultaneously with the occurrence of signal 114, the normal on and off gate pulses applied to the GTO 5 are stopped and an emergency on gate pulse is applied in its place to reignite the GTO which was in the process of turning off. do.

By doing this, as is clear from the above description, it is no longer necessary to impose excessive switching loss on the GTO at the time of turn-off when the operating gain is not appropriate.

At this time, if the GTO is left ignited again, a continuous current will be supplied to the GTO 5 through the power supply 1, so in order to avoid this, the no-fuse breaker 2 is tripped at the same time as the signal 114 described above is generated, and the power supply 1 Try to separate it.

With such a series of operations, it is possible to prevent the GTO from being operated with an inappropriate operating gain.

Next, in the main circuit A of FIG. 2, when the power supply 1 is constructed of a rectifier or the like, a smoothing capacitor 1A may be inserted for the purpose of smoothing the voltage of the power supply 1.

In order to apply the present invention to the main circuit having such a configuration, unlike the above explanation, the normal on/off gate pulses are stopped at the same time as the operating gain excess signal 114 is generated at time t30 in FIG. Instead, it is preferable to interrupt the GTO 5 with an emergency off-gate pulse having a time width longer than the normal off-gate pulse width, and simultaneously turn off the GTO and open the no-fuse breaker 2.

The reason why the off-gate pulse is used as the interrupt gate pulse is as follows.

That is, if the on-gate pulse is interrupted at the same time as the operating gain excessive signal 114 is generated, even if the no-fuse breaker 2 is tripped, current will be supplied to the GTO 5 by the accumulated charge in the smoothing capacitor 1A. This is to prevent damage to the GTO due to this current.

As is clear from the above description, the entire process from detecting the voltage VGK to determining that the operation of the GTO 5 is inappropriate is performed digitally, so the operation is fast and the GTO can be reliably protected.

Next, in the embodiment explained in FIGS. 2 and 3, signal processing is performed by detecting the positive voltage between the gate and cathode voltage VGK of the GTO. can also achieve a similar purpose.

FIGS. 4 and 5 show the accumulation time comparison circuit C and waveform diagrams in this case.

The difference between FIG. 4 and FIG. 2 is that instead of the positive voltage detection and waveform shaping circuit 15 for voltage VGK, a negative voltage detection and waveform shaping circuit 15A for voltage VGK is used, and its output 106A
is inverted through an inverter 21 to obtain a signal 106, and the rest is the same as that in FIG. 4, and its operation is the same as that of the embodiment in FIG. 2, so its explanation will be omitted.

As described above, in the present invention, the GTO operating gain is detected by monitoring the voltage VGK between the gate and cathode, and damage to the GTO due to inappropriate operating gain is prevented, so the detection operation is fast. Moreover, it is possible to provide a GTO protection device that is easy to handle.

[Brief explanation of drawings]

Figures 1a, b, and c are structural schematic diagrams for explaining the operation of the GTO, a GTO chopper circuit diagram, and waveform diagrams of various parts showing the relationship between operating gain and accumulation time. Figure 2 is an embodiment of the present invention. FIG. 3 is a circuit diagram of an example, and FIG. 3 is a waveform diagram of various parts for explaining the operation of FIG. 2, and FIGS. 4 and 5 are circuit diagrams of main parts and waveform diagrams of various parts of other embodiments. 2... No-fuse breaker, 3... Tripping coil, 5... Gate turn-off thyristor, 6... Gate pulser, 13... Flip-flop, 15... Positive voltage detection between gate and cathode and waveform shaping circuit, 15A
... Negative pressure detection and waveform shaping circuit between gate and cathode,
16.18...AND circuit, 17.21...Inperter, 19...Trip signal amplification circuit.

Claims (1)

[Claims] 1 A gate turn-off thyristor whose anode and cathode are connected to the main circuit, ON and OFF gate pulses that control the conduction and non-conduction of this thyristor, and OFF gate pulses that are the reference value for inappropriate operating gain of this thyristor. a gate pulser that outputs a maximum accumulation time signal of a signal that continues for a certain period of time; and a gate for the time from when the off-gate pulse is applied until the voltage between the gate and cathode of the gate turn-off thyristor reverses polarity or becomes zero. A circuit that detects the actual accumulation time of the turn-off thyristor, and a circuit that compares the actual accumulation time signal obtained by this detection circuit with the maximum accumulation time signal and generates an output when the actual accumulation time signal becomes large. Prepare,
When an output is generated in this circuit, this output is interrupted by the gate pulser to stop the normal on/off gate pulse of this gate pulser, output an emergency gate pulse, and open the main circuit. Thyristor protection device.