JPS5825738B2 - Vacuum evaporation mask - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a mask for vacuum evaporation for manufacturing high current thin film transistors.

One common method for manufacturing thin film semiconductor devices is vacuum deposition.

The vacuum evaporation method involves placing one or more metal evaporation sources in a vacuum chamber, placing a substrate spaced apart therefrom, and forming a thin film device on the surface of the substrate.

A suitable vacuum is created in the tank, one or more evaporation sources are placed inside the tank, and the desired layer is deposited on the substrate by vapor deposition or sputtering.

Using such techniques, metals, insulators, semiconductor devices, etc. are deposited in various steps to complete a thin film device.

One important element of a vacuum deposition apparatus is a deposition mask that is located between the evaporation source and the substrate and in direct proximity to the substrate.

The vapor from the source is blocked by the mask, and the source material is deposited on the substrate only in selected areas.

Deposition of each layer generally requires a different deposition mask, but
A device has been developed that automatically changes each mask without breaking the vacuum.

For details of this device, see commonly owned US Pat. No. 3,657,613.

One of the major difficulties in vacuum deposition is that the mask becomes clogged after some use.

In general, a mask is very delicate in terms of dimensions, so if it is used for about 100 depositions, it will become clogged with obstructions.

When the mask becomes clogged in this way, production must be stopped, the vacuum must be broken, and the deposition mask must be cleaned or replaced.

Another difficulty with the use of such deposition masks is that they require some geometric shape.

The fabrication of high current capacity thin film transistors requires a deposition mask that specifically forms interdigital source and drain electrodes, details of which are described in U.S. Pat. No. 3,652.
As shown in No. 907.

Unfortunately, it is difficult and expensive to manufacture such interdigital deposition masks.

In particular, such masks require cantilevered lever sections, which have the drawback of being mechanically unstable.

This invention eliminates the above-mentioned defects of the conventional apparatus by using a linear deposition mask, and the mask can be changed continuously or periodically during use without breaking the vacuum of the vacuum chamber. A cross-finger-shaped vapor deposition mask was obtained.

Furthermore, the present invention makes it possible to obtain a simple and improved high current thin film field effect transistor.

As for high current thin film transistors, which are described in detail in the above-mentioned US Pat. No. 3,652,907, it is necessary to form a low resistance lead portion by forming a part of the interdigital electrode into a thick film.

The present invention does not require the formation of thick film lead portions in the form of interdigital electrodes, but instead changes the resistance value of the lead portion gradually by changing the resistance value of the lead portion in a gradient manner along the length of the finger portions of the interdigital electrode shape. It has been changed.

The deposition mask for vacuum deposition can be replaced continuously or discontinuously during the deposition.

The vapor deposition mask includes a frame having an aperture for vapor deposition, a support device disposed on both sides of the aperture, and segment lines supported at intervals by the support device and disposed above the aperture, This segment line is used as a mask pattern through which a desired vapor deposition pattern can be formed on the substrate.

Preferably, the support device consists of at least two parallel support rods and is arranged across the aperture for vapor deposition.

Preferably, the support rod is provided with a number of circumferential grooves along the portion approaching the opening.

In this way, one or two segment lines can be supported across the circumferential grooves of the two support rods.

These segment wires can be configured to be fed out from a feeding device arranged on one side of the circumferential groove of the support rod and wound up on a winding device arranged on the other side of the frame.

Preferably, the segment lines are arranged in parallel and criss-crossing over the deposition apertures to provide an interdigital deposition pattern on the substrate.

In the most desirable example, this segment wire is wound around two support rods so as to have a first portion and a second portion on the front and back sides.

The segment lines of the first portion are spaced apart in parallel on the two support rods and are generally parallel to each other away from the deposition aperture.

The segment lines of the second portion are similarly spaced apart in parallel, but are arranged diagonally at an angle to the segment lines of the first portion.

The interdigitated mask line constructed as described above is used in the manufacture of high current thin film transistors.

The transistor has a substrate of a material with good electrical and thermal conductivity on both major surfaces.

At least one of the main surfaces of the base body has an insulating layer that is electrically insulating and thermally a good conductor.

Preferably, metal source and drain electrodes are placed on this insulating layer.

The source and drain electrodes are spaced apart and have interdigitated portions.

The finger-like portions of each electrode have an inclined shape so that the surface area decreases toward the other even when the finger-like portion falls, and the electrodes are spaced apart from each other.

The transistor thus forms a thin semiconductor in contact with the source and drain electrodes and completes contact with at least an insulating layer between the source and drain electrodes.

As an alternative to a transistor as described above, a semiconductor layer may be placed below the source and drain electrodes instead of above them, where the source and drain electrodes are located above the semiconductor layer instead of the insulating layer. .

The present invention will now be described in detail with reference to the accompanying drawings.

The vapor deposition mask according to the present invention can be applied to any standard vacuum vapor deposition apparatus.

FIG. 1 shows a vapor deposition apparatus as an example.

However, the invention may also be used in a variety of other systems that use RF discharge, RF sputtering, and other vacuum deposition systems.

Furthermore, this deposition mask is also applicable to the automatic vacuum deposition apparatus shown in US Pat. No. 3,657,613.

In FIG. 1, reference numeral 10 denotes a closed tank, which has a cylindrical side wall 11 made of metal, glass, ceramic, etc., and a disc-shaped end plate 12.
and 13.

The end plates 12,13 are constructed of an electrically conductive material, such as low carbon steel or aluminum.

Sidewall 11 is generally vertically oriented and end plates 12 and 13
are generally arranged horizontally.

The side wall 11 and the end plates 12 and 13 hermetically close the inside of the closed tank 10 using a standard L-shaped closure 14, and are configured to be easily assembled and removed as necessary.

Reference numeral 15 denotes a through hole provided at the center of the end plate 12, which is airtightly connected to the conduit 16 by a flange 17.

The conduit 16 connects the sealed tank 10 to a standard oil diffusion vacuum pump (not shown), and after assembling the sealed tank 1 x 10-5
toll (I x 10-7 torr or less is most desirable)
Evacuate and hold below.

A portion of the conduit 16 between the sealed tank 10 and the vacuum pump is generally equipped with a standard liquid nitrogen cooling trap (not shown).
is installed to remove impurity deposits during vapor deposition, which will be described later.

An evaporation source 18 is formed and arranged within the closed tank 10 .

This evaporation source 18 is desirably formed into a pellet shape to prevent it from scattering during evaporation, and is preferably formed into a high-density pellet to prevent a rapid change in volume, and is arranged to avoid difficulty in gasifying during evaporation. There is a need to.

The evaporation source 18 is placed above the heater 19 in the closed tank 10 .

The heater 19 has a horizontally arranged heater element 20, which has a generally circular configuration and has a screw 2.
2 is tightened and held at the upper end of the support rod 21.

The support rod 21 is vertically supported by an insulator 24 fitted into the opening 23 of the end plate 12, and its outer end is led out to the outside of the closed tank 10.

The contact surfaces between the opening 23 of the end plate 12 and the insulator 24 and between the insulator 24 and the support rod 21 are electrically insulated and mechanically connected to the watertight opening.

Thus, the heater 19 is electrically coupled to the support rod 21 and connected to an external power source.

Furthermore, the heater element 20 of the heater 19 has an upper thin central portion 2.
5 about 0.127 mm (5 mils) thick and a surrounding thick L-shaped section 26 about 1.57 nm (60 mils) thick.

The thin center portion 25 is made of a high resistance material and supports the evaporation source 18 thereon.

With this structure, the evaporation of the evaporation source 18 is controlled very precisely by the degree of resistance heating of the central portion 25 of the heater 19.

As an alternative to evaporating the evaporation source 18, induction heating or electron beam irradiation heating has been announced.

It is noted in this connection that evaporation by electron beam irradiation heating has been found to be particularly advantageous in preventing contamination of the heat generating source with impurities.

This is because the evaporated material is always supported on the clean source bed and never approaches the evaporation tank or the evaporation furnace.

In this case, for example, an electron gun (not shown) is placed 30CrfL away from the evaporation tank or water-cooled furnace that supports the evaporation source, and is designed to irradiate the evaporation source at an angle of about 30 degrees to the vertical line. Placed.

In the case of electron beam irradiation, the irradiation current is generally 5.5 to 6.0
At about 70 mA at kV, the radiation is about 3.2 mm (1
Forms a focal point with a diameter of 78 inches.

In evaporation by electron beam irradiation, care must be taken to prevent the substrate from being negatively charged by the electron beam.

This can be prevented by providing a 300 to 500 mesh tungsten mesh between the electron beam and the substrate.

Generally, this tungsten net is approximately 19 mm (3/3 mm) from the base.
They are placed 4 inches apart and given a negative potential of -1kV.

A base holder (or frame) 27 is supported at the center of the end plate 13 inside the sealed tank 10 .

Holder 27 includes a generally circular support plate 28 .

The support plate 28 is provided with a preferably rectangular diffusion opening 29 located in the center thereof.

Reference numeral 30 denotes a mechanical bias device, which is screwed onto the support plate 28 by screws 31.

In this way, the base 32 is connected to the diffusion opening 29 of the support plate 28.
, and is pressed against the support plate 28 by the bias device 30.

The support plate 28 is screwed onto the end plate 13 by screws 33.

34 is a ring-shaped spacing piece interposed between the support plate 28 and the end plate 13.

A shark assembly 35 is arranged inside the closed tank 10.

The shank assembly 35 includes a shank 36, which is disposed directly above the evaporation source 18 to allow or block the vapor flow flowing from the evaporation source toward the substrate.

The shank 36 is fixed around its outer circumference to a rod 37. The rod 37 passes through the end plate 12 in a gas-tight manner and is attached thereto.

With this arrangement, the shark assembly 35 can be assembled with the shark 36.
can be rotated around the support point of the rod 37, allowing vapor from the evaporation source 18 to flow toward the substrate 32.

This chamber 36 is closed to block vapor from the evaporation source to stabilize the deposition, and the chamber is opened again to start the deposition.

For details on the operation of this type of shark, see Holland (H.
It is described in ``Thin Film Microelectronics'', 11965 edition, p. 238, by Mr. Holland).

When using the vapor deposition mask according to the present invention, the vapor deposition mask is placed between the evaporation source 18 and the base 32 in the airtight tank 10.

The details are shown more clearly in FIGS. 2 and 3.

In FIGS. 2 and 3, the mast 38 includes a frame 39 arranged in a rectangular shape, and a rectangular opening 40 in the center of the frame 39.

This frame is preferably made of a hard, oxidation-resistant metal, such as stainless steel.

The frame 39 has parallel, spaced-apart sides 41 and 42 and parallel, spaced-apart ends 43 and 44, and defines an opening 40 therein. ing.

Ends 43 and 44 form a support for this frame, as will be explained below.

The opening 40 in the frame is the opening 2 in the support plate 28 described above.
9, and is configured to be convenient for assembly and operation.

Support rods 45 and 46 are disposed parallel to each other outside sides 41 and 42 of opening 40 to constitute a support device for the mask device.

Such a support device may be, for example, a wooden plug or the like provided along the side of the opening 40.

Support rods 45 and 46 are rotatably supported by fitting into through holes 47 and 48 provided in end piece 44 of opening 40 and holes 49 and 50 provided in end piece 43.

Reference numerals 51 and 52 denote collars attached to the support rods 45 and 46, which are fixed to the support rods 45 and 46, respectively, with, for example, set screws (not shown), abut against the end piece 44 of the frame 39, and are used to position the opening 40. do.

The support bars 45 and 46 are provided with equally spaced circumferential grooves 53 and 54 over their entire length between the end pieces 43,44.

First and second segment lines 55 and 56 are fitted into circumferential grooves 53 and 54 of support rod 45 , 46 and are configured to cover opening 40 .

The first and second segment lines are diagonally spaced apart and parallel to each other on the opening 40.

Segment wires 55 and 56 are double wrapped around continuous wires 57 and 58, respectively, through grooves 53 and 54 in support rods 45 and 46.

In view of this relationship, it is desirable that the sides 41 and 42 of the opening 40 are spaced apart from the outer diameter of the support rods by a width corresponding to the diameters of the support rods 45 and 46.

Segment lines 55 and 56 intersect and overlap over the apertures, forming a finger-like deposition pattern in which the segment lines intersect in parallel, as will be described below.

This will be explained in detail with reference to FIG.

The lines 57 and 58 on the back side of the mask are optically isolated from the substrate and have small diameters so that no shadow or mask effect is applied during deposition.

Segment wires 57 and 58 are preferably an iron-based alloy.

The outer diameter of the wire and the spacing between the grooves 53 and 54 in the support rods 45, 46 are determined by the desired deposition pattern and electrical characteristics.

For the manufacture of thin film field effect transistors, as discussed below, the outside diameter of the wire determines the channel width of the transistor and is generally between 0.0127 mm (0.5 mil) and 0.2 mm.
The standard is around 5 mils (10 mils), usually 0.025 mm.
(1 mil).

The spacing between adjacent grooves is determined by the current density through the device.

After these parts are assembled, they are mounted in the closed tank 10 so that the openings 40 and 29 of the support plate 28 overlap.

Next, the mask is fixed to the support plate 28 by tightening the screws 59.

That is, the screw 59 passes through a through hole in the corner of the frame 39,
It is screwed onto the support plate 28.

The support rods 45 and 46 are connected to the shaft 60 through gears as shown in the figure.
and 61.

The shafts 60 and 61 pass through the end plate 13 in an airtight manner and are led out of the closed tank 10.

Reference numeral 62 indicates a handle for simultaneously rotating the support rods 45 and 46 from outside the closed tank 10 via shafts 60 and 61.

One end of the segment wires 57 and 58 is unwound from supply wheels 63 and 64, and the other end is wound onto winding wheels 65 and 66, respectively.

It is desirable that the supply car and the take-up car be installed inside the sealed tank 10, and that they be equipped with suitable latches or other mechanisms, so that an appropriate tension is always applied to the segment wires, and the supply car and the take-up car are can be moved smoothly.

Segment lines 55 and 56 can thus be moved continuously or discontinuously to avoid evaporated material clogging the mask.

In particular, support rods 45 and 46 can be rotated simultaneously by external handle 62.

At this time, the segment wires fed out from the supply wheels 63 and 64 move along the grooves 53 and 54 of the support rods 45 and 46, and are wound up by the winding wheels 65 and 66.

Clutch mechanisms on supply wheels 63 and 64 maintain accurate line position on the support rod and maintain sufficient friction between the line and wheels to prevent slippage between the two.

The segment lines 55 and 56 are thus moved from the opening 40 before evaporated material can adhere to the surface and become a problem, yet it can be manipulated during operation without interrupting production.

Although it is desirable to construct an interdigital mask using two segment lines 57 and 58 as described above, a similar mask pattern can also be constructed using one or more lines.

If one wire is used to construct such a mask, the end 4 is first cut between the support bars 45 and 46.
The wire is wound from the end plate 3 toward the end portion 44, and the wire that reaches the end plate 44 is reversely wound from the end portion 44 to the end portion 43.

In this case, only one supply car and one coaxial take-up car are required.

When two or more wires are used, each wire is arranged adjacently between the grooves of support rods 45 and 46, and each wire is provided with a supply wheel and a take-up wheel.

Patterns other than the intersecting finger pattern shown in FIG. 2 can be constructed using multiple support bars.

FIG. 5 shows another embodiment of the invention using two pairs of support bars.

In the figure, 70 and 71 are openings 40' of the frame 39'.
A first pair of support rods 72 and 73 are arranged perpendicularly to the support rods 70 and 71 and are also opposite to each other.

Support rods 70, 71, 72 and 73 each have grooves 74.
, 75, 76 and 77 are provided.

A first segment wire 78 is wound around support rods 70 and 71;
The second segment wires 79 are wound around support rods 72 and 73 and are arranged in parallel with a constant interval.

The first and second segment lines intersect perpendicularly to form a checkerboard-like pattern as shown in FIG.

Thus, a suitable metal vapor is applied onto the substrate 82 through the segment lines 78 and 79 and the opening 40' to form a pattern deposited by the metal vapor, such as electrodes or pads 81.

It is desirable to form a new thin film field effect transistor by utilizing a segmented line mask as shown in FIG. 2 to form an interdigital deposition pattern as shown in FIG. 4.

Next, the details will be explained.

FIGS. 7 and 8 show a top view and a sectional view of a thin film field effect transistor manufactured using the vacuum evaporation mask according to the present invention.

Reference numeral 100 denotes a flexible semi-rigid or rigid substrate, which is made of a good electrical and thermal conductor and has an upper surface 101 and a lower surface 102, and is made of nickel, aluminum, copper, tin, molybdenum, tungsten, tantalum, silver, gold, platinum. , magnesium, etc., as well as alloys of these metals, iron alloys, and the like.

This substrate is preferably a heat absorber, and if it is, it may be a thin film fixed on the surface of the heat absorber by vapor deposition or sputtering.

The thickness of the base 100 is not particularly specified.

This substrate acts as a gate for a thin film transistor.

An insulating layer 103 made of a good thermal conductor is formed on the main surface 101 of the base 100 .

The insulating layer 103 is made of a metal oxide, such as silicon dioxide,
Silicon monoxide, aluminum oxide, aluminum oxide IJ IJ
It is preferable that the material contains aluminum or titanium oxide.

However, for example glasses made of lead silicate, lead borate, lead borosilicate or mixtures thereof can also be used.

Further examples include epoxy resins, polyester resins, silicone resins, polyurethane resins, and hexachlorobutadiene, guivinylbenzene, allylsulfone, fluorinated, alkenyl (polytetrafluoroethylene) and para-
A cured organic copolymer consisting of a copolymer such as xylene is used.

These resins contain up to about 20% by weight of a 40-50 mesh electrically insulating and thermally conductive filler, such as electrolytic aluminum or aluminum oxide powder.

Most preferably, substrate 100 is aluminum and insulating layer 103 is thick, non-porous aluminum oxide.

Such oxides can be obtained by plasma electrolysis or liquid electrolysis.

Therefore, a particularly good method for electrolyzing the substrate is to place the substrate in a 9% solution of chromium trioxide and treat it at a voltage of 40 V for 5 minutes.

A 9% solution is 72 grams of chromium trioxide dissolved in 800 milliliters of water.

In the power thin film transistor manufactured in this way, the layer 103 needs to have a thickness of about 500 to 4000 layers.

Of course, the desired thickness varies depending on the voltage used, and if the transistor is for 10 to 50V, the thickness is approximately 10V.
00 people is desirable.

If the working voltage is 100V, approximately 3000 people are required for the thickness, and if it is 200V (7), 6000 people are required, or 300V.
(7) In case of 10,000 people, in case of 600V, 2,000 people
0 people are required for each.

An evaporation mask as shown in FIG. 2 is applied to a substrate 100 with an insulating layer 103 applied thereto, and vacuum evaporation is performed in an airtight tank 10.

Source and drain electrodes 104 and 105 are deposited on insulating layer 103.

A pattern is formed on the insulating layer 103 by vapor deposition through the above-mentioned line mask, and an interdigitated pattern as shown in FIG. 4 is formed on the insulating layer 103.

The electrodes consist of metal in resistive contact with the semiconductor material.

Suitable metals are gold, nickel, silver, indium, aluminum and alloys based on these metals.

Certain metals are desirable for certain semiconductor materials.

For example, it is desirable to use gold or nickel for tellurium, and indium for cadmium sulfide and cadmium selenide.

The thickness of the deposition of electrodes 104 and 105 is related to the required operating current of the transistor.

Generally, this electrode thickness ranges from about 200 to 1000.

Planar metal contacts 106 and 107 are then spaced substantially parallel to complete the source and drain electrodes.

The contacts 106 and 107 connect the edges corresponding to the intersection 108 of the gap 109 between the interdigitated fingers 110 shown in FIG.

The source and drain electrodes 104 and 105 are thus completed and cross fingers 111 and 11, respectively.
form 2.

The fingers 111 and 112 form sloped portions 113 and 114 which gradually reduce in area, but maintain a distance between them.

Contacts 106 and 107 are each formed with interdigitated portions and a metallic material that forms resistive contact with the selected semiconductor material.

As such a metal material, for example, gold, an alloy of gold and platinum, an alloy of platinum and silver, etc. are used.

Source and drain electrodes 104 and 105 are then deposited on top of the semiconductor thin film 115, with the barrier layer 103 at least between the source and drain electrode fingers 111 and 112.
come into contact with.

The semiconductor material is deposited by any suitable vacuum deposition technique, using the same equipment that was used to deposit the interdigitated portions of source and drain electrodes 111 and 112.

A semiconductor layer 115 is deposited between adjacent source and drain electrodes 111 and 112.

The semiconductor layer 115 may be monocrystalline, polycrystalline, or amorphous, and the N layer may be composed of any P-type semiconductor material.

Suitable semiconductor materials include tellurium (P type), lead-tellurium compounds (P or N type), cadmium sulfide (N type),
These include cadmium-selenium compounds (N-type), indium-arsenic compounds (N-type), gallium-arsenic compounds (N-type), and tin oxide (N-type).

The thickness of semiconductor layer 115 varies depending on the specific semiconductor material used and the power capacity of the transistor.

For example, for tellurium, the thickness is about 40 to 130 mm.
It varies depending on the person.

Furthermore, if a material with a high resistivity, such as cadmium sulfide, is used, the thickness will be as high as 2,000.

If necessary, a field effect transistor can be formed using the semiconductor layer 11.
By depositing an insulating layer 116 on top of 5, the influence from the outside air is reduced.

Examples of the composition of such an insulating layer 116 include silicon dioxide, silicon monoxide, aluminum oxide, silicone resin, and epoxy resin.

These primarily form a hermetic and electrical sheath.

FIG. 9 shows a thin film field effect transistor according to another embodiment of the present invention.

What is shown in this embodiment is almost the same as shown in FIGS. 7 and 8, except that the semiconductor layer 115' is not on top of the source and drain electrodes 104' and 105'.
located at the bottom.

That is, electrodes 104' and 105' are located on semiconductor 115' instead of insulating layer 103.

However, the arrangement shown in this example is not recommended.

This is because the semiconductor layer 115' is not directly located between the source and drain electrodes, and the channel length of the device is not uniform, which has the disadvantage that the length of the current path from one electrode to the other varies. .

The electrical characteristics of the completed transistor in either embodiment are determined primarily by the number and geometry of electrode fingers 111 and 112 and the spacing between electrodes 104 and 105.

In particular, the spacing between fingers 111 and 112 is the length of the transistor channel, which is determined by the diameter of the wire used for the deposition mask.

The closer the spacing, the higher the cutoff frequency of the transistor.

However, the closer the electrodes are spaced, the greater the possibility of discharge and the greater the possibility of transistor burnout.

This spacing is generally 0.0127mm-0.254mm (
0.5-10 mils) with 0.0254 mm (1 mil) being the most common.

As described above, the current handling capacity of the transistor is determined by the number and geometrical shape of the electrode fingers, and this can be easily determined from the arrows shown in FIG.

The current flowing from the metal contact 106 of the source electrode 104 to the fingers 111 passes through the semiconductor layer 115 between the electrodes.
2 and further flows from the fingers 112 to the contact 107 of the drain electrode 105.

The current capacity is determined by the width of the transistor channel, and the current density is generally about 10 milliamperes per channel width.

The length of the spacing between the electrode fingers is therefore easily determined by knowing the required current carrying capacity of the transistor.

By determining this length, the length and number of fingers can be sequentially determined for a given required space.

By practicing the invention, an effective channel width of approximately 40 mm can be considered as 1 square mm.

Once the length and number of fingers are determined, the width of the base, the slope of the fingers, etc. are determined by taking into account the uniform current density in each part of the transistor channel.

It determines the width of the finger to narrow along its length, varying the current and keeping the voltage drop constant along the length of the finger.

Thus, hot spots along the channel are substantially eliminated to equalize the temperature of each section.

This uniform distribution of the voltage along the fingers is obtained by configuring the fingers with geometrically identical slopes relative to each other.

U.S. Pat.
It is detailed in No. 52,907.

Although the second embodiment of this invention has been described above, this invention is not limited to only these embodiments.
It can be used in various applications.

[Brief explanation of the drawing]

FIG. 1 shows a side cross-section of an apparatus suitable for carrying out vacuum deposition according to the invention. FIG. 2 shows a partially transparent top view of the deposition mask taken along line 1--2 in FIG. FIG. 3 shows a partial cross-sectional view of the deposition mask taken along the line ■--■ in FIG. FIG. 4 shows a partial view of the vapor deposition pattern on the substrate deposited through the mask shown in FIG. FIG. 5 shows a partial perspective view of a vapor deposition mask according to another embodiment of the present invention. FIG. 6 shows a partial view of the vapor deposition pattern of the substrate deposited through the vapor deposition mask shown in FIG. FIG. 7 shows the top surface of a thin film field effect transistor manufactured using the deposition mask shown in FIG. 2 and the deposition pattern shown in FIG. FIG. 8 shows a partial side cross section taken along the line ■--■ in FIG. FIG. 9 shows a partial side cross-section of a thin film field effect transistor according to another embodiment of the invention. In the figure, 10 is a sealed tank, 11 is a side wall, 12°, 13 is an end plate, 15 is a through hole, 16 is a conduit, 18 is an evaporation source, and 20
32 is a heater element, 32 is a substrate, 38 is a vapor deposition mask, 40 is an aperture for vapor deposition, 45 and 46 are mask support rods, 55 and 56 are segment lines, 100 is a substrate, and 104 and 105 are electrodes.

Claims (1)

[Scope of Claims] IA. A frame having an opening for vacuum deposition; B6. A segment line support device provided on both sides of the opening of the frame for arranging the segment line above the opening; C6 at least two parallel support rods spanning the opening; C6 the support rods are provided with diurnal grooves for inserting the segment lines at intervals; D. the segment lines; A mask for vacuum evaporation, which is arranged close to the opening to form a desired mask pattern on the vapor that reaches the substrate through the opening.