JPS5829620B2 - hand tai souchi no seizou houhou - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a method for manufacturing a semiconductor device having a selective oxide film, and provides an improved manufacturing method effective for high-density integrated circuits using, for example, an oxide film separation method. It is something.

As the degree of integration of semiconductor integrated circuits increases, the dimensional accuracy of mask alignment required in the manufacturing process becomes stricter, the dimensions themselves become smaller, and the yield of integrated circuits tends to deteriorate.

This is one of the oxide film separation methods, Locos (LOGO8=
Local Oxidation of 5ilic
The conventional technology will be explained by taking a semiconductor device using a semiconductor device (on) as an example.

As shown in FIG. 1, a region 3 of a conductivity type opposite to that of the semiconductor substrate 1 is formed using a selective oxide film 2 provided for junction isolation in a silicon semiconductor substrate 1 (the figure shows a p-type semiconductor) as a mask.
(N type in the figure), and a PN junction 4 is formed so as to be in contact with the oxide film 2.

Next, after providing an oxide film 5 on the selective oxide film 2 and the entire surface of the semiconductor substrate 10, holes 6 for taking out the electrodes are formed by photoetching.

If the hole 6 for taking out the electrode is formed to expose the N-type semiconductor region 3 or the mask is shifted, the selective oxide film 2 will be etched as shown in FIG.
When T is exposed and electrode 7 is applied, this electrode T results in shorting the junction 4.

Furthermore, even if the mask does not shift, if excessive etching is performed, the etching rate of the oxide film at the interface between the silicon and the oxide films 2 and 5 is high, so the oxide film 2 will be etched in the past and the edge of the junction 4 will be etched as well. This results in 8 being exposed.

In any case, especially if the junction 4 is formed shallowly, a slight etching of the oxide film 2 will expose the end 8 of the junction 4, which will be short-circuited by the electrode 7, resulting in a decrease in the yield of integrated circuits. cause

The present invention has been made to solve the above problems, and includes forming an insulating film on a semiconductor substrate and the selective oxide film in a semiconductor device having a selective oxide film. By partially etching the insulating film with an etching solution that has a low etching rate for the selective oxide film, etching of the selective oxide film can be eliminated and high-density integrated circuits can be formed. It is an object of the present invention to provide a method for manufacturing a semiconductor device that can improve the yield in the manufacturing process.

In the method of the present invention, for example, when a selective oxide film is provided on one part of the main surface of a semiconductor substrate, a silicon nitride insulating film (hereinafter referred to as an Si 3 N 4 film) is formed over the entire main surface including the oxide film. , this Si3N4 film is selectively etched.

This Si3N4 film etching solution is a solution that hardly etches the silicon oxide film, and can effectively prevent etching of the selective oxide film.

The principle of the present invention will be explained in detail below using FIG.

1. S i 3 is formed on the main surface of the P-type silicon semiconductor substrate 1.
After forming the N4 film, a portion of it is removed by etching and the main surface is selectively oxidized.

Thereafter, the Si3N4 film is removed to form a semiconductor substrate 1 having a selective oxide film 2.

After selectively diffusing the N-type region 3 from the exposed surface of the P-type semiconductor substrate 1, a Si 3 N4 film 51 is deposited to cover the selective oxide film 2 and the exposed surface of the semiconductor substrate 1, and further covers this. A Si02 film 52 is formed as shown in FIG. 3a.

Thereafter, the entire SiO2 film 52 used for the photoresistor film was etched using an HF-based etching solution, which has a high etching rate and a low etching rate for the 5i3N451 film, to form the holes 6 as shown in FIG. Open.

Next, after removing the photoresist film, the Si3N4 film 51 is etched through this hole using the Sin film 52 as a mask.

The etching solution used at this time is the entire SiO2 film 52.
The etching rate is low for the oxide film 2 and the silicon substrate 1, and the etching rate is high for the Si3N4 film 51.
The selective oxide film 2 is less likely to be attacked during etching of the film 51.

Therefore, even if the selective oxide film 2 is exposed due to displacement of the hole 6 for taking out the electrode as shown in FIG. 3C, the PN junction 4 will not be exposed.

Therefore, even if the electrode metal 7 is deposited, the junction 4 will not be short-circuited and the electrode 7 can be brought into contact with the region 3, as shown in FIG.

Next, specific application examples of the present invention will be explained in detail.

FIG. 4 shows the manufacturing process of an N-channel Si-1MO8 transistor using the selective oxidation method according to the present invention.

In FIG. 4a, after an isolation oxide film 2 is formed by a selective oxidation method, a gate oxide film 9 is formed, a polysilicon layer is grown to cover these, and this is coated with a photoresist, leaving only the gate polysilicon 10. After that, N-type impurities are diffused into the source, drain, and polysilicon gate portions 10.

3S. 3D is the source and drain regions.

The process in step 1 is no different from the conventional one.

In the present invention, as shown in FIG.
Approximately 1oooi of N4 film 51 is added, and SiO2 film 5 is placed on top of this.
2 all 52ooX, both CVD method (ChemicaLV
A photoresist film 11 is applied thereon, and a hole 61 for electrode formation is formed thereon.

When all 52 of the SiO2 films 52 are etched using an HF-based etching solution using this photoresist film 1'l mask, S
The i 3 N4 film 51 is partially exposed.

Next, after removing the photoresist film 11, the SiO2 film 5
Si3N4 film 51 with hot H2PO3 liquid as 2 total 52
The holes 6 are formed by etching.

In this case, even if the photomask is misaligned and the electrode connection hole 6 exposes the selective oxide film 2, the selective oxide film 2 will not be attacked.

That is, as shown in FIG. 4C, the junction 41 between the drain region 30 or source region 3S and the substrate is protected by the selective oxide film 2 and is not exposed.

Therefore, even if an electrode metal such as A1 is subsequently deposited, short-circuiting of the junction will not occur and the operation of the device will not be affected.

FIG. 5 shows an nPn transistor for integrated circuits using selective oxidation as another application example.

In the figure, 1 is a P-type silicon substrate, 31 is an N+ collector layer,
32 is an N collector layer, 33 is a P base layer, 34 is an N+ emitter layer, 35 and 36 are N and N+ collector connection layers,
71 is a collector electrode, 72 is a base electrode, and 73 is a vine electrode.

It will be easily understood from the example described in Section 1 that even if the holes in the membranes 51 and 52 for taking out the base electrode 72 are misaligned, no short circuit will occur.

Conventionally, as shown in Japanese Unexamined Patent Publication No. 47-41167, Si
However, the function of the Si 3 N4 film used in the conventional example described above is completely different from that used in the present invention.

That is, in a normal planar junction like the conventional example described above, as shown in FIG. 6a, after forming the PN junction 4',
The surface of the semiconductor substrate 1' is covered with a thick silicon oxide film 2' and a thin silicon oxide film 20 on the surface of the impurity diffusion layer 3'.

Therefore, when opening the contact hole 6', it is sufficient to etch only a portion of the thin oxide film 20 as shown in the same figure, and even if misalignment occurs due to poor mask alignment accuracy as shown in FIG. , the PN junction 4' protected by the thick oxide film 2' is never exposed to the surface.

The S i 3 N4 film used in the conventional example is merely one of the multiple insulation coatings of a semiconductor device having multiple insulation coatings.

In the above description, the Si3N4 film is shown as the first insulating film formed on the selective oxide film, but it is not the case that other insulating films such as anohena may be used.

According to the method of manufacturing a semiconductor device according to the present invention as described above, it is possible to eliminate the cause of a decrease in yield even in the production of high-density integrated circuits, and it is possible to improve mass productivity.

[Brief explanation of drawings]

1 and 2 are cross-sectional views for explaining a conventional method of manufacturing a semiconductor device, and FIGS. 3 a, b, c, and d are cross-sectional views for explaining a method of manufacturing a semiconductor device according to the present invention, 4a, b, and c are explanatory cross-sectional views when the method of the present invention is applied to an n-channel MO8 transistor, and FIG. 5 is an nPn transistor, respectively. FIG. 6 a+b is a cross-sectional view of a semiconductor device having a conventional planar junction. A cross-sectional view showing the manufacturing method,
FIG. 7 is a cross-sectional view when a mask alignment error occurs in the manufacturing method shown in FIG. 6. In the figure, 1 is a semiconductor substrate, 2 is a selective oxide film, 51 is a first insulating film, and 52 is a second insulating film. Note that the same symbols in the figures indicate the same or corresponding parts.

Claims (1)

[Claims] 1. In a method of manufacturing a semiconductor device having a selective oxide film on the surface of a semiconductor substrate, a step of forming an insulating film made of a material different from the selective oxide film on the surface of the semiconductor substrate and on the selective oxide film; The step of partially etching the insulating film to expose the surface of the semiconductor substrate using an etching solution having a sufficiently high etching rate for the selective oxide film and a sufficiently low etching rate for the selective oxide film. A method for manufacturing a semiconductor device.