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JPS5830782B2 - Pulse Densou Houshiki - Google Patents
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JPS5830782B2 - Pulse Densou Houshiki - Google Patents

Pulse Densou Houshiki

Info

Publication number
JPS5830782B2
JPS5830782B2 JP49112775A JP11277574A JPS5830782B2 JP S5830782 B2 JPS5830782 B2 JP S5830782B2 JP 49112775 A JP49112775 A JP 49112775A JP 11277574 A JP11277574 A JP 11277574A JP S5830782 B2 JPS5830782 B2 JP S5830782B2
Authority
JP
Japan
Prior art keywords
waveform
pulse
pulse train
densou
houshiki
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP49112775A
Other languages
Japanese (ja)
Other versions
JPS5140706A (en
Inventor
喜孝 高崎
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP49112775A priority Critical patent/JPS5830782B2/en
Publication of JPS5140706A publication Critical patent/JPS5140706A/ja
Publication of JPS5830782B2 publication Critical patent/JPS5830782B2/en
Expired legal-status Critical Current

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  • Dc Digital Transmission (AREA)
  • Optical Communication System (AREA)

Description

【発明の詳細な説明】 本発明はパルス伝送方式、更に詳しく言えば信号を2値
のパルスに変換して伝送する場合、中継器、受信器等に
おける受信側のパルス信号処理方式に関するものである
DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a pulse transmission method, and more specifically, to a pulse signal processing method on the receiving side in a repeater, receiver, etc. when a signal is converted into a binary pulse and transmitted. .

従来、光通信などの非線形性の大きい伝送路を通して通
信を行なう場合、この非線形性の影響をうけることの少
ない2値のパルス列を用いることが多い。
Conventionally, when communicating through a transmission path with large nonlinearity such as optical communication, a binary pulse train that is less affected by this nonlinearity is often used.

このような伝送路において受信機が信号の直流分を通さ
ない場合、あるいは低周波における動作不安定のため直
流分および低周波成分を通過させることか好ましくなく
、これを遮蔽する必要があるような場合、2値のパルス
列にある拘束を設けて、送信パルス列に直流付近の成分
が発生しないようにし、これによって信号の品質低下を
防止するのが通常的に行なわれる手法である。
If the receiver does not pass the DC component of the signal in such a transmission path, or if it is undesirable to pass the DC component and low frequency component due to unstable operation at low frequencies, it is necessary to shield this. In this case, the usual method is to place certain constraints on the binary pulse train to prevent components near DC from occurring in the transmitted pulse train, thereby preventing deterioration in signal quality.

この場合上記拘束のためパルス伝送のための所要帯域が
増加する。
In this case, the required bandwidth for pulse transmission increases due to the above constraints.

光ファイバーなどの広帯域の伝送路においてはこのよう
な帯域の増加はあまり問題にならないが、将来ファイバ
ーの損失がきわめて小さくなり伝送距離をきわめて大き
くとれるようになった場合、あるいはきわめて高速の伝
送を行なうような場合には、高周波までの減衰が、低周
波の場合よりも大きくなり、これを中継器あるいは受信
機で等化する必要が生じ、高周波での増幅度が大きくな
るため、帯域の増大が雑音の大幅な増大を招くこととな
り、信号対雑音比の低下が犬きな問題となる。
This increase in bandwidth will not be much of a problem in broadband transmission lines such as optical fibers, but in the future when fiber loss becomes extremely small and transmission distances can be extremely large, or extremely high-speed transmission will be possible. In such cases, the attenuation up to high frequencies will be greater than that for low frequencies, and this will need to be equalized by a repeater or receiver, and the amplification degree at high frequencies will increase, so the increase in the band will cause noise. This results in a significant increase in the signal-to-noise ratio, which poses a serious problem.

雑音の増加を招くことなく、かつ直流付近の成分を抑圧
した2値パルス伝送処理方式を実現することを目的とす
る。
The purpose of the present invention is to realize a binary pulse transmission processing method that suppresses components near DC without increasing noise.

すなわち、直流付近の成分を抑圧した拘束された2値パ
ルスで伝送するとともに、その場合に増大する高周波成
分減少させ等比容等による高周波成分の増幅を不要にす
るパルス伝送処理方式を実現することを目的とする。
That is, to realize a pulse transmission processing method that transmits a constrained binary pulse that suppresses components near DC, reduces the high frequency component that increases in that case, and eliminates the need for amplification of the high frequency component by equal volume etc. With the goal.

上記の目的を達成するために本発明においては送信側に
おいてタイムスロットの端あるいは中央において極性の
反転するような符号を用い、これを受信側において、受
信パルス列とそれを百タイムスロットを遅延させたもの
との和を作り、こねを用いて信号処理を行なう。
In order to achieve the above object, in the present invention, a code whose polarity is reversed at the edge or center of a time slot is used on the transmitting side, and this is used on the receiving side to delay the received pulse train by 100 time slots. Create a sum with things and perform signal processing using kneading.

すなわち第1図に示す如く原信号aにおいて符号1は交
互にその極性と反転して伝送し、0はタイムスロットの
中央で極性が反転するように、かつタイムスロットの端
では隣接するパルスと極性が反対になるように(同図す
参照)構成して送信し、受信側では受信波形すとこれを
7タイムスロツト遅延させた波形Cと和をとると同図す
のような、1に対応したパルスが交互に極性を反転する
ような波形が得られる。
That is, as shown in Fig. 1, in the original signal a, the code 1 is transmitted with its polarity inverted alternately, the 0 is transmitted with its polarity inverted at the center of the time slot, and the polarity of the 0 is reversed with the adjacent pulse at the end of the time slot. If the received waveform is summed with waveform C delayed by 7 time slots on the receiving side, it will correspond to 1 as shown in the same figure. A waveform in which the polarity of the pulses alternately reverses is obtained.

これはいわゆるAMI(バイポーラ)符号であり、送信
波形すのスペクトルが第2図aの如くパルス繰返し閉波
数f。
This is a so-called AMI (bipolar) code, and the spectrum of the transmitted waveform has a pulse repetition closed wave number f as shown in Fig. 2a.

の2倍にまで拡がっているのに対し、この波形dではf
However, in this waveform d, f
.

までの帯域ですむ(厳密に言えば帯域は無限に拡がり得
るが1.情報はすべてf。
(Strictly speaking, the bandwidth can be expanded infinitely, but 1. All information is f.

以下におさまっている。)したかって第1図すの波形を
そのまま処理する場合と比較して帯域が上になり高周波
の雑音の影響が小さく、信号対雑音比が大幅に(高周波
、に大きな利得をもつような等化を行なう場合)改善さ
れる。
It is below. ) Therefore, compared to processing the waveform shown in Figure 1 as is, the band is higher, the influence of high-frequency noise is smaller, and the signal-to-noise ratio is significantly improved (equalization with a large gain at high frequencies). ) will be improved.

これは第3図に示すように、符号1に対応してタイムス
ロットの中央で十−と極性を反転し、符号Oに対応して
−+と極性を反転するような波形すを送信し、受信波形
(同じくbとする)とそれと百タイムスロット遅延させ
た波形Cとの和をとり同図dのような一種のAMI波形
を得るような場合にも同様である。
As shown in FIG. 3, this transmits a waveform whose polarity is inverted to 10- at the center of the time slot corresponding to code 1, and which is inverted to -+ in response to code 0. The same applies to the case where a received waveform (also designated as b) and a waveform C delayed by 100 time slots are summed to obtain a type of AMI waveform as shown in d of the figure.

以下本発明を実施例によって詳細に説明する。The present invention will be explained in detail below using examples.

第1図あるいは第3図の波形aより波形すを作り出す装
置についてはよく知られているので説明は省略し、ここ
では波形Cより、波形dを作り出す装置について説明す
る。
Since the apparatus for producing waveform S from waveform a in FIG. 1 or 3 is well known, the explanation thereof will be omitted, and the apparatus for producing waveform d from waveform C will be explained here.

これは原理的には第4図に示す如く入力端子1に加えら
れた波形すとこれを7タイムスロツトの遅延線2を加え
た出力3とを加算器4に加えることにより出力信号5と
しで得られる。
In principle, this can be done by adding the waveform applied to the input terminal 1 and the output 3 obtained by adding the delay line 2 of 7 time slots to the adder 4 as shown in FIG. can get.

さらに具体的には第5図に示すように入力端子1に加え
られた受信信号(第3図の波形すに対応:はトランジス
タ6をバッファとして遅延線2に加えられた波形3と、
加算器4において加算抵抗7および8によって加算され
る。
More specifically, as shown in FIG. 5, the received signal applied to the input terminal 1 (corresponding to the waveform in FIG. 3) is a waveform 3 applied to the delay line 2 using the transistor 6 as a buffer,
They are added in adder 4 by summing resistors 7 and 8.

なおこの加算器において抵抗器9はトランジスター0に
対して負帰還を与えており、トランジスタへの入力イン
ピーダンスをきわめて低くする役割を果している。
Note that in this adder, resistor 9 provides negative feedback to transistor 0, and plays the role of making the input impedance to the transistor extremely low.

上記では遅延線を用いた例を示したが次に遅延線を用い
ないでも本発明の受信部が構成できることを示す。
Although an example using a delay line has been shown above, it will be shown next that the receiving section of the present invention can be constructed without using a delay line.

すなわち第4図の構成の伝達特性は第6図aに示すよう
になっているが、これは最終的にはさらに同図すに示す
ような雑音除去フィルタを通過するため、高周波の(f
o以上の)特性は必要でない。
In other words, the transfer characteristic of the configuration shown in FIG. 4 is as shown in FIG.
o or higher) characteristics are not required.

したがって、第6図aの伝達関数は近似的に同図Cおよ
びbに示すような伝達特性の縦続接続として表わすこと
ができる。
Therefore, the transfer function shown in FIG. 6a can be approximately expressed as a cascade of transfer characteristics as shown in FIG. 6C and b.

この場合の中継器(あるいは受信機)のp波増幅部の実
施例を第7図に示す。
An embodiment of the p-wave amplification section of the repeater (or receiver) in this case is shown in FIG.

すなわち、入力端子11に印加された受信信号(第1図
、第3図の波形すに対応する)は、増幅器12を経由し
て、第6図すの実線およびCの伝達特性を合成(第6図
すの点線)して実現したろ波器13を経て反共振回路1
4(第6図dの極を実現したもの)に加えられ、その出
力として第1図又は第3図の波形dを出力端子15に得
る。
That is, the received signal applied to the input terminal 11 (corresponding to the waveforms in FIGS. 1 and 3) passes through the amplifier 12, and is synthesized by the solid line in FIG. The anti-resonant circuit 1 passes through the filter 13 (dotted line in Figure 6).
4 (which realizes the pole in FIG. 6 d), and the waveform d in FIG. 1 or 3 is obtained at the output terminal 15 as its output.

場合によってはろ波器13および14を1つに合成でき
ることは言うまでもない。
It goes without saying that the filters 13 and 14 can be combined into one in some cases.

以上説明した如く、本発明によれば2値の直流成分を抑
圧するような符号化を行なったパルス列を、高周波を減
衰させるような伝送路を通して伝送を行ない、受信側で
等化を行なって高周波部の増幅を行なった都合にも高周
波雑音の影響をうけにくいパルス伝送方式を提供するこ
とができ、良質なパルス伝送を実現する上でその寄与は
きわめて太きい。
As explained above, according to the present invention, a pulse train encoded to suppress binary DC components is transmitted through a transmission path that attenuates high frequencies, and the receiving side performs equalization to reduce high frequencies. Because of the amplification of the parts, it is possible to provide a pulse transmission system that is less susceptible to the effects of high-frequency noise, and its contribution is extremely significant in realizing high-quality pulse transmission.

【図面の簡単な説明】[Brief explanation of drawings]

第1図および第3図は本発明の詳細な説明するタイムチ
ャート、第2図は本発明の詳細な説明する周波数スペク
トル図、第4図、第5図および第7図は本発明の実施例
、第6図は第7図の実施例の原理を説明する説明図であ
る。 1.11・・・・・・入力端子、2・・・・・・遅延線
、3・・・・・・遅延線出力信号、4・・・・・・加算
器、5,15・・・・・・出力端子、6,10・・・・
・・トランジスタ、1,8・・・・・・加算用抵抗器、
9・・・・・・負帰還用抵抗器、12・・・・・・増幅
器、13.14・・・・・・済波器。
1 and 3 are time charts explaining the present invention in detail, FIG. 2 is a frequency spectrum diagram explaining the present invention in detail, and FIGS. 4, 5, and 7 are examples of the present invention. , FIG. 6 is an explanatory diagram illustrating the principle of the embodiment of FIG. 7. 1.11...Input terminal, 2...Delay line, 3...Delay line output signal, 4...Adder, 5, 15...・・・Output terminal, 6, 10...
...Transistor, 1,8...Additional resistor,
9...Negative feedback resistor, 12...Amplifier, 13.14...Suppressor.

Claims (1)

【特許請求の範囲】[Claims] 1 各タイムスロットの端あるいは中央において極性が
反転するように構成された2値打号パルス列を送信し、
受信側において受信パルス列とこれを圭タイムスロット
遅延させたものを加算して3値バイポーラ符号にした後
、信号処理を行なうことを特徴とするパルス伝送方式。
1. Transmit a binary pulse train whose polarity is reversed at the edge or center of each time slot,
A pulse transmission method characterized in that a received pulse train and a time slot delayed version of the received pulse train are added to form a ternary bipolar code on the receiving side, and then signal processing is performed.
JP49112775A 1974-10-02 1974-10-02 Pulse Densou Houshiki Expired JPS5830782B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP49112775A JPS5830782B2 (en) 1974-10-02 1974-10-02 Pulse Densou Houshiki

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP49112775A JPS5830782B2 (en) 1974-10-02 1974-10-02 Pulse Densou Houshiki

Publications (2)

Publication Number Publication Date
JPS5140706A JPS5140706A (en) 1976-04-05
JPS5830782B2 true JPS5830782B2 (en) 1983-07-01

Family

ID=14595180

Family Applications (1)

Application Number Title Priority Date Filing Date
JP49112775A Expired JPS5830782B2 (en) 1974-10-02 1974-10-02 Pulse Densou Houshiki

Country Status (1)

Country Link
JP (1) JPS5830782B2 (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH06164405A (en) * 1992-11-25 1994-06-10 Matsushita Electric Works Ltd Signal transmitting system

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS4929003A (en) * 1972-07-12 1974-03-15

Also Published As

Publication number Publication date
JPS5140706A (en) 1976-04-05

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