JPS5831718B2 - induction heating cooker - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to an induction heating cooker that heats food in a cooking pot by induction heating the cooking pot using, for example, a high-frequency magnetic field.

Generally, in this type of induction heating cooker, as shown in FIG. It is connected to a DC inverter (DC power supply) 4, and a second NPN transistor 5 is connected in parallel to the series resonant circuit.

A current transformer 6, for example, as a current detector is inserted into the series resonant circuit.

This current transformer 6 detects the magnitude and direction of the current flowing through the heating coil 1 and outputs a voltage corresponding to the magnitude and direction.

The control circuit 7 detects the current direction of the heating coil 1 based on the output voltage of the current transformer 6, and controls the first and second transistors 3.
, 5 are controlled to alternately turn on and off.

The cooking @ 8 is made of a magnetic material, and generates eddy current loss due to the high frequency magnetic field applied from the heating coil 1 to self-heat, thereby heating the food inside.

In the induction heating cooker, when the first transistor 3 is turned on, a charging current flows through the capacitor 2 and the heating coil 1, and the current transformer 6 detects the point in time when this charging current becomes zero. 2 transistor 5 turns on.

As a result, the charge in the capacitor 2 is discharged, and the discharge current flows to the second transistor 5.

When the current transformer 6 detects the point in time when this discharge current becomes zero, the first transistor 3 is turned on again, and the same operation is repeated and the resonant operation of the resonant circuit continues.

Therefore, a high-frequency current close to a sine wave flows through the heating coil 1, and a high-frequency magnetic field is generated from the heating coil 1, and the food inside the cooking pot 8 is heated and cooked by the self-heating of the cooking pot 8.

By the way, in the above-mentioned induction heating cooker, the heating output is adjusted by the "1" level (1) of the output control signal given to the control circuit 7.
On) and "0" level (off) duty cycles are controlled, and when stopping the heating output, the output control signal is turned off and one drive pulse is supplied to the first and second transistors 3 and 5. I'm trying to stop it.

Therefore, the off-inversion timing of the output control signal is the second
If the transistor 5 is in the on state, the charge in the capacitor 2 can be discharged, so there is no problem.

However, if the off-inversion timing of the output control signal is when the second transistor 5 is in the off-state, it is dangerous because the charge in the capacitor 2 remains undischarged.

Therefore, in the past, a discharge resistor 9 was connected in parallel to the capacitor 2, which had the disadvantage of increasing component costs.

Further, since the voltage across the discharge resistor 9 is high, the withstand voltage of the resistor 9 becomes a problem, resulting in noise and energy loss.

The present invention has been made in order to eliminate the above-mentioned drawbacks, and when the heating output is stopped, the capacitor connected in series with the heating coil is discharged, and then the heating control signal is set to the OFF state (heating stop control state). By setting the timing, it is possible to omit a discharging resistor in parallel with a capacitor, and to provide an induction heating cooker that can reduce component costs.

Hereinafter, one embodiment of the present invention will be described in detail with reference to the drawings.

Fig. 2 shows an improved example of the control circuit shown in Fig. 1, in which the secondary output terminals (-) (+) of the current transformer (Fig. 1 6) are
The output terminals of the switching circuits 11 and 12 are respectively connected to the input terminals of the switching circuits 11 and 12, respectively, and the output terminal of the switching circuit 11 is connected to the first
It is connected to one input end of the NAND circuit 13.

The other input terminal of the first NAND circuit 13 is connected to the activation signal input terminal 14, and the output terminal of the NAND circuit 13 is connected to the negative trigger input terminal B of the first monomulti circuit 15.

This monomulti circuit 15 has a time constant circuit consisting of a capacitor C1 and a resistor R1.

The output terminal Q1 of this mono multi-circuit 15 is the first. It is connected to the input terminal of a drive circuit 16, and the output terminal of this drive circuit 16 is connected to the base of the first transistor (FIG. 1, 3).

On the other hand, the double-blade ends of the second NAND circuit 17 are connected to the load detection signal input terminal 18 and the output control signal input terminal 19, respectively, and the output end of the NAND circuit 17 is connected to the R
It is connected to the input terminal of the SS frill rough flop 2.

A set signal input terminal 21 is connected to a set input terminal PR of this flip-flop 20, and an output terminal Q is connected to input terminals CD on each side of the first mono multi-circuit 15 and the second mono multi-circuit 22. .

This second mono-multi circuit 22 has a time constant circuit made up of a capacitor C2 and a resistor R2, and the input terminal A of the main input terminal is connected to the output terminal of the switching circuit 12.

Further, the output terminal Q2 of the monomulti circuit 22 is connected to the clock input terminal OK of the flip-flop 20 and also to the input terminal of the second drive circuit 23, and the output terminal of this drive circuit 23 is connected to the clock input terminal OK of the flip-flop 20. Transistor (Figure 1 5)
connected to the base of.

Next, the operation shown in FIG. 2 will be explained with reference to FIG. 3.

The output voltage of the current transformer (FIG. 1, 6) is a sine wave as shown in FIG. potential, second
During the ON period of transistor 5, either (-) output side or (+)
The potential is higher than that on the output end side.

Therefore, as shown in the third diagram, the output voltage of the switching circuit 11 is at the power supply +■o level (11 levels) while the first and second transistors 3.5 are both off, and the second transistor 5 is on. It becomes the ground potential (“0” level) during the period, and becomes the “1” level during the on period of the first transistor 3.

On the other hand, the output voltage of the switching circuit 12 is 0 during the ON period of the first transistor 3, as shown in FIG.
" level, and during the on period of the second transistor 5, it becomes "1" level.
It becomes 1 rubel.

On the other hand, a starting signal of level "1" is applied to the starting signal input terminal 14 during cooking, as shown in FIG. 3d.

Therefore, the output voltage of the first NAND circuit 13 is the inverted level of the output voltage of the switching circuit 11, as shown in FIG. 3e.

On the other hand, the load detection signal input terminal 18 is connected to the load detection signal (in this example, the cooking pot 8
) is in use, a "1" level load detection signal is applied.

In addition, the output control signal input terminal 19 is connected to an output control signal that is turned on (level "1") during the resonance operation designated period and turned off ("0" level) during the resonance operation stop designated period, as shown in FIG. 3f. is marked η.

Therefore, the output voltage of the second NAND circuit 17 has the level of the output control signal inverted, as shown in FIG. 3C.

In addition, the set signal input terminal 21 is set to “1” when the power is turned on.
A level set signal is applied.

As a result, the output Q of the RS flip-flop 20 is “1”.
By applying this "I II level to the control input terminals CD of the first and second mono multi circuits 15 and 22, the mono multi circuits 15 and 22 become operable.

In this state, as described above, when the start signal is applied and the output of the first NAND circuit 13 is inverted from the "1" level to the "0" level as shown in FIG. On the downlink, the first monomulti circuit 15 is triggered, and its output terminal QI receives a pulse width of twt''at×R1 (seconds) (shorter than the resonant period of the series resonant circuit).

), a drive control signal of "0" level (see FIG. 3g) is generated.

This signal is waveform-shaped by the first drive circuit 16 to become a drive signal (see FIG. 3g), and then applied to the base of the first transistor 3.

As a result, the first transistor 3 is turned on, and the first transistor 3 is turned on.
Capacitor 2 of the series resonant circuit shown in the figure is charged.

At the point when the charging current finishes flowing, the polarity of the output voltage of the current transformer 6 is reversed, and the output voltage of the switching circuit 12 is reversed from "0" to "1" level as shown in FIG.
The second mono multi-circuit 22 is triggered by the rising edge of this inversion, and its output terminal Q2 is supplied with tw2cx:C2×R2(
The pulse width (seconds) is shorter than the resonant period of the series resonant circuit.

), a drive control signal (see FIG. 3g) of level "0" is generated.

This signal is the second signal. After being waveform-shaped by the drive circuit 23 to become a drive signal (see FIG. 3), it is applied to the base of the second transistor 5.

As a result, the second transistor 5 is turned on, and the first
The charged load of the capacitor 2 in the series resonant circuit shown in the figure is discharged.

At the point when the discharge current finishes flowing, the polarity of the output voltage of the current transformer 6 is reversed, and the output voltage of the switching circuit 11 is reversed from the "0" level to the "'1" level as shown in the third diagram, and becomes the first NAND voltage. When the output voltage of the circuit 13 is inverted from "'1" to "P0" level as shown in FIG. 3 is turned on.

That is, the oscillation state continues such that the first transistor 3 and the second transistor 5 are alternately turned on and off.

In the above oscillation state, since the "0" level is applied to the input terminal of the R, S flip-flop 20 from the second NAND circuit 17, the output of the second monomulti circuit 22 is applied to the clock input terminal OK. The level at the output terminal Q does not change even if

By the way, when specifying output stop, the output control signal changes from “1” to “
When the output of the second NAND circuit 17 is inverted to the "0" level, the output of the second NAND circuit 17 is inverted to the "0"-"1" level, and the output terminal Q of the RS flip-flop 20 is inverted in response to the rise of the output of the second mono multi circuit 22. As shown in FIG. 3, the level is reversed from "1" to "0".

As a result, each control input terminal CD of the first mono multi circuit 15 and the second mono multi circuit 22 becomes "0" level, so even if the trigger signal is input to the input terminal B or A, the trigger does not respond. A "0" level output with a pulse width tWl+tw2 is no longer generated.

Therefore, the oscillation operation in the first transistor 3, the second transistor 5, and the series resonant circuit stops.

That is, “0” at the output terminal Q of the RS flip-flop 20
'' level becomes an oscillation stop signal, that is, a resonance stop signal of the series resonant circuit.

In this case, the timing of stopping oscillation is always after the rise of the output of the second mono multi-circuit 22, that is, after the rise of the output voltage i of the switching circuit 12, that is, after the second transistor 5 is turned on, and the series resonance This is after the capacitor 2 of the circuit has discharged.

Therefore, due to the above operation, the conventionally required discharge resistor (FIG. 1, 9) becomes unnecessary.

Note that not only when the output control signal "1" to "0" level is reversed as described above, but also when the load on the heating coil 1, that is, the cooking pot 8
Even when the load detection signal goes to the "0" level when there is no load, the output of the second NAND circuit 17 is inverted from 0" to "1" level, so the second transistor 5 is turned on as described above. The oscillation operation then stops. As described above, the present invention includes a first transistor inserted in series between a series resonant circuit consisting of a heating coil and a capacitor and a DC power supply, and a second transistor connected in parallel to the series resonant circuit. By connecting the transistors, providing a current detector that detects the magnitude and direction of the current flowing through the resonant circuit, and alternately driving the first transistor and the second transistor on and off using the output signal of this detector. In an induction heating cooker in which a resonant current is passed through a series resonant circuit and a high frequency magnetic field generated from a heating coil is applied to a magnetic load, an output stop command is given by an output control signal, and then a heating stop signal is generated after the second transistor is turned on. The circuit is configured such that the stop signal causes the generation of drive signals for both transistors to stop.

As circuits for this purpose, switching circuits, NAND circuits, mono-multi circuits, drive circuits, flip-flops, etc. are used in this example, and by using ICs (integrated circuits), the circuits can be simplified and the number of components can be reduced. Miniaturization and cost reduction can be achieved.

Furthermore, LSI (Large Scale Integrated Circuit) implementation is also possible.

Therefore, according to such a circuit configuration, it is possible to omit the discharging resistor that is conventionally required in parallel with the capacitor of the series resonant circuit, so it is possible to reduce the overall component cost and reduce noise generation. It also reduces energy loss.

As described above, the present invention sets the timing so that when the heating output is stopped, the capacitor connected in series with the heating coil is discharged, and then the heating control signal is set to the OFF state (heating stop control state). It is possible to provide an induction heating cooker that can omit a discharge resistor in parallel with a capacitor, thereby reducing component costs and preventing noise.

[Brief explanation of the drawing]

FIG. 1 is a circuit diagram showing a conventional induction heating cooker, and FIG. 2 is a circuit diagram showing an embodiment of an induction heating cooker according to the present invention.
FIG. 3 is a timing waveform diagram for explaining the operation of FIG. 2. 1...Cut heating coil, 2...Capacitor, 3...First transistor, 5...Second transistor, 6...Current transformer , 8...
...Cooking pot, 11.12...Switching circuit, 13,17...Nand circuit, 15.22
...Mono multi circuit, 16, 23...
・Drive circuit, 20...R, S flip-flop.

Claims (1)

[Claims] 1. A first transistor is inserted in series between a series resonant circuit consisting of a heating coil and a capacitor and a DC power supply,
Connecting a second transistor in parallel to the series resonant circuit,
A current detector is provided to detect the magnitude and direction of the current flowing in the series resonant circuit, and the output signal of the detector is used to alternately drive the first transistor and the second transistor on and off, thereby forming the series resonant circuit. In an induction heating cooker that conducts resonant current and applies a high-frequency magnetic field generated from a heating coil to a magnetic load for induction heating, when stopping the driving of the first transistor and the second transistor, the second transistor is turned on/off. An induction heating cooker comprising a control circuit configured to stop generation of a drive signal for each transistor after generation of a control signal.